\n

PORT

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xA4 byte (0x0)
mem_usage : registers
protection : not protected

Registers

PCR0

PCR1

PCR16

PCR17

PCR18

PCR2

GPCLR

GPCHR

GICLR

GICHR

ISFR

PCR3


PCR0

Pin Control Register 0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR0 PCR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE DSE MUX IRQC ISF

PS : Pull Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.

#1 : 1

Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.

End of enumeration elements list.

PE : Pull Enable
bits : 1 - 1 (1 bit)
access : read-write

SRE : Slew Rate Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

#1 : 1

Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

End of enumeration elements list.

DSE : Drive Strength Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.

#1 : 1

High drive strength is configured on the corresponding pin, if pin is configured as a digital output.

End of enumeration elements list.

MUX : Pin Mux Control
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

#0000 : 000

Pin disabled (Alternative 0) (analog).

#0001 : 001

Alternative 1 (GPIO).

#0010 : 010

Alternative 2 (chip-specific).

#0011 : 011

Alternative 3 (chip-specific).

#0100 : 100

Alternative 4 (chip-specific).

#0101 : 101

Alternative 5 (chip-specific).

#0110 : 110

Alternative 6 (chip-specific).

#0111 : 111

Alternative 7 (chip-specific).

#1000 : 1000

Alternative 8 (chip-specific).

#1001 : 1001

Alternative 9 (chip-specific).

#1010 : 1010

Alternative 10 (chip-specific).

#1011 : 1011

Alternative 11 (chip-specific).

#1100 : 1100

Alternative 12 (chip-specific).

#1101 : 1101

Alternative 13 (chip-specific).

#1110 : 1110

Alternative 14 (chip-specific).

#1111 : 1111

Alternative 15 (chip-specific).

End of enumeration elements list.

IRQC : Interrupt Configuration
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

#0000 : 0000

Interrupt Status Flag (ISF) is disabled.

#0001 : 0001

ISF flag and DMA request on rising edge.

#0010 : 0010

ISF flag and DMA request on falling edge.

#0011 : 0011

ISF flag and DMA request on either edge.

#1000 : 1000

ISF flag and Interrupt when logic 0.

#1001 : 1001

ISF flag and Interrupt on rising-edge.

#1010 : 1010

ISF flag and Interrupt on falling-edge.

#1011 : 1011

ISF flag and Interrupt on either edge.

#1100 : 1100

ISF flag and Interrupt when logic 1.

End of enumeration elements list.

ISF : Interrupt Status Flag
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

#0 : 0

Configured interrupt is not detected.

End of enumeration elements list.


PCR1

Pin Control Register 1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR1 PCR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE DSE MUX IRQC ISF

PS : Pull Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.

#1 : 1

Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.

End of enumeration elements list.

PE : Pull Enable
bits : 1 - 1 (1 bit)
access : read-write

SRE : Slew Rate Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

#1 : 1

Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

End of enumeration elements list.

DSE : Drive Strength Enable
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.

#1 : 1

High drive strength is configured on the corresponding pin, if pin is configured as a digital output.

End of enumeration elements list.

MUX : Pin Mux Control
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

#0000 : 000

Pin disabled (Alternative 0) (analog).

#0001 : 001

Alternative 1 (GPIO).

#0010 : 010

Alternative 2 (chip-specific).

#0011 : 011

Alternative 3 (chip-specific).

#0100 : 100

Alternative 4 (chip-specific).

#0101 : 101

Alternative 5 (chip-specific).

#0110 : 110

Alternative 6 (chip-specific).

#0111 : 111

Alternative 7 (chip-specific).

#1000 : 1000

Alternative 8 (chip-specific).

#1001 : 1001

Alternative 9 (chip-specific).

#1010 : 1010

Alternative 10 (chip-specific).

#1011 : 1011

Alternative 11 (chip-specific).

#1100 : 1100

Alternative 12 (chip-specific).

#1101 : 1101

Alternative 13 (chip-specific).

#1110 : 1110

Alternative 14 (chip-specific).

#1111 : 1111

Alternative 15 (chip-specific).

End of enumeration elements list.

IRQC : Interrupt Configuration
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

#0000 : 0000

Interrupt Status Flag (ISF) is disabled.

#0001 : 0001

ISF flag and DMA request on rising edge.

#0010 : 0010

ISF flag and DMA request on falling edge.

#0011 : 0011

ISF flag and DMA request on either edge.

#1000 : 1000

ISF flag and Interrupt when logic 0.

#1001 : 1001

ISF flag and Interrupt on rising-edge.

#1010 : 1010

ISF flag and Interrupt on falling-edge.

#1011 : 1011

ISF flag and Interrupt on either edge.

#1100 : 1100

ISF flag and Interrupt when logic 1.

End of enumeration elements list.

ISF : Interrupt Status Flag
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

#0 : 0

Configured interrupt is not detected.

End of enumeration elements list.


PCR16

Pin Control Register 16
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR16 PCR16 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE MUX IRQC ISF

PS : Pull Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.

#1 : 1

Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.

End of enumeration elements list.

PE : Pull Enable
bits : 1 - 1 (1 bit)
access : read-write

SRE : Slew Rate Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

#1 : 1

Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

End of enumeration elements list.

MUX : Pin Mux Control
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

#0000 : 000

Pin disabled (Alternative 0) (analog).

#0001 : 001

Alternative 1 (GPIO).

#0010 : 010

Alternative 2 (chip-specific).

#0011 : 011

Alternative 3 (chip-specific).

#0100 : 100

Alternative 4 (chip-specific).

#0101 : 101

Alternative 5 (chip-specific).

#0110 : 110

Alternative 6 (chip-specific).

#0111 : 111

Alternative 7 (chip-specific).

#1000 : 1000

Alternative 8 (chip-specific).

#1001 : 1001

Alternative 9 (chip-specific).

#1010 : 1010

Alternative 10 (chip-specific).

#1011 : 1011

Alternative 11 (chip-specific).

#1100 : 1100

Alternative 12 (chip-specific).

#1101 : 1101

Alternative 13 (chip-specific).

#1110 : 1110

Alternative 14 (chip-specific).

#1111 : 1111

Alternative 15 (chip-specific).

End of enumeration elements list.

IRQC : Interrupt Configuration
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

#0000 : 0000

Interrupt Status Flag (ISF) is disabled.

#0001 : 0001

ISF flag and DMA request on rising edge.

#0010 : 0010

ISF flag and DMA request on falling edge.

#0011 : 0011

ISF flag and DMA request on either edge.

#1000 : 1000

ISF flag and Interrupt when logic 0.

#1001 : 1001

ISF flag and Interrupt on rising-edge.

#1010 : 1010

ISF flag and Interrupt on falling-edge.

#1011 : 1011

ISF flag and Interrupt on either edge.

#1100 : 1100

ISF flag and Interrupt when logic 1.

End of enumeration elements list.

ISF : Interrupt Status Flag
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

#0 : 0

Configured interrupt is not detected.

End of enumeration elements list.


PCR17

Pin Control Register 17
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR17 PCR17 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE MUX IRQC ISF

PS : Pull Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.

#1 : 1

Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.

End of enumeration elements list.

PE : Pull Enable
bits : 1 - 1 (1 bit)
access : read-write

SRE : Slew Rate Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

#1 : 1

Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

End of enumeration elements list.

MUX : Pin Mux Control
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

#0000 : 000

Pin disabled (Alternative 0) (analog).

#0001 : 001

Alternative 1 (GPIO).

#0010 : 010

Alternative 2 (chip-specific).

#0011 : 011

Alternative 3 (chip-specific).

#0100 : 100

Alternative 4 (chip-specific).

#0101 : 101

Alternative 5 (chip-specific).

#0110 : 110

Alternative 6 (chip-specific).

#0111 : 111

Alternative 7 (chip-specific).

#1000 : 1000

Alternative 8 (chip-specific).

#1001 : 1001

Alternative 9 (chip-specific).

#1010 : 1010

Alternative 10 (chip-specific).

#1011 : 1011

Alternative 11 (chip-specific).

#1100 : 1100

Alternative 12 (chip-specific).

#1101 : 1101

Alternative 13 (chip-specific).

#1110 : 1110

Alternative 14 (chip-specific).

#1111 : 1111

Alternative 15 (chip-specific).

End of enumeration elements list.

IRQC : Interrupt Configuration
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

#0000 : 0000

Interrupt Status Flag (ISF) is disabled.

#0001 : 0001

ISF flag and DMA request on rising edge.

#0010 : 0010

ISF flag and DMA request on falling edge.

#0011 : 0011

ISF flag and DMA request on either edge.

#1000 : 1000

ISF flag and Interrupt when logic 0.

#1001 : 1001

ISF flag and Interrupt on rising-edge.

#1010 : 1010

ISF flag and Interrupt on falling-edge.

#1011 : 1011

ISF flag and Interrupt on either edge.

#1100 : 1100

ISF flag and Interrupt when logic 1.

End of enumeration elements list.

ISF : Interrupt Status Flag
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

#0 : 0

Configured interrupt is not detected.

End of enumeration elements list.


PCR18

Pin Control Register 18
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR18 PCR18 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE PFE MUX IRQC ISF

PS : Pull Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.

#1 : 1

Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.

End of enumeration elements list.

PE : Pull Enable
bits : 1 - 1 (1 bit)
access : read-write

SRE : Slew Rate Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

#1 : 1

Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

End of enumeration elements list.

PFE : Passive Filter Enable
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

Passive input filter is disabled on the corresponding pin.

#1 : 1

Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics.

End of enumeration elements list.

MUX : Pin Mux Control
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

#0000 : 000

Pin disabled (Alternative 0) (analog).

#0001 : 001

Alternative 1 (GPIO).

#0010 : 010

Alternative 2 (chip-specific).

#0011 : 011

Alternative 3 (chip-specific).

#0100 : 100

Alternative 4 (chip-specific).

#0101 : 101

Alternative 5 (chip-specific).

#0110 : 110

Alternative 6 (chip-specific).

#0111 : 111

Alternative 7 (chip-specific).

#1000 : 1000

Alternative 8 (chip-specific).

#1001 : 1001

Alternative 9 (chip-specific).

#1010 : 1010

Alternative 10 (chip-specific).

#1011 : 1011

Alternative 11 (chip-specific).

#1100 : 1100

Alternative 12 (chip-specific).

#1101 : 1101

Alternative 13 (chip-specific).

#1110 : 1110

Alternative 14 (chip-specific).

#1111 : 1111

Alternative 15 (chip-specific).

End of enumeration elements list.

IRQC : Interrupt Configuration
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

#0000 : 0000

Interrupt Status Flag (ISF) is disabled.

#0001 : 0001

ISF flag and DMA request on rising edge.

#0010 : 0010

ISF flag and DMA request on falling edge.

#0011 : 0011

ISF flag and DMA request on either edge.

#1000 : 1000

ISF flag and Interrupt when logic 0.

#1001 : 1001

ISF flag and Interrupt on rising-edge.

#1010 : 1010

ISF flag and Interrupt on falling-edge.

#1011 : 1011

ISF flag and Interrupt on either edge.

#1100 : 1100

ISF flag and Interrupt when logic 1.

End of enumeration elements list.

ISF : Interrupt Status Flag
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

#0 : 0

Configured interrupt is not detected.

End of enumeration elements list.


PCR2

Pin Control Register 2
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR2 PCR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE MUX IRQC ISF

PS : Pull Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.

#1 : 1

Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.

End of enumeration elements list.

PE : Pull Enable
bits : 1 - 1 (1 bit)
access : read-write

SRE : Slew Rate Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

#1 : 1

Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

End of enumeration elements list.

MUX : Pin Mux Control
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

#0000 : 000

Pin disabled (Alternative 0) (analog).

#0001 : 001

Alternative 1 (GPIO).

#0010 : 010

Alternative 2 (chip-specific).

#0011 : 011

Alternative 3 (chip-specific).

#0100 : 100

Alternative 4 (chip-specific).

#0101 : 101

Alternative 5 (chip-specific).

#0110 : 110

Alternative 6 (chip-specific).

#0111 : 111

Alternative 7 (chip-specific).

#1000 : 1000

Alternative 8 (chip-specific).

#1001 : 1001

Alternative 9 (chip-specific).

#1010 : 1010

Alternative 10 (chip-specific).

#1011 : 1011

Alternative 11 (chip-specific).

#1100 : 1100

Alternative 12 (chip-specific).

#1101 : 1101

Alternative 13 (chip-specific).

#1110 : 1110

Alternative 14 (chip-specific).

#1111 : 1111

Alternative 15 (chip-specific).

End of enumeration elements list.

IRQC : Interrupt Configuration
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

#0000 : 0000

Interrupt Status Flag (ISF) is disabled.

#0001 : 0001

ISF flag and DMA request on rising edge.

#0010 : 0010

ISF flag and DMA request on falling edge.

#0011 : 0011

ISF flag and DMA request on either edge.

#1000 : 1000

ISF flag and Interrupt when logic 0.

#1001 : 1001

ISF flag and Interrupt on rising-edge.

#1010 : 1010

ISF flag and Interrupt on falling-edge.

#1011 : 1011

ISF flag and Interrupt on either edge.

#1100 : 1100

ISF flag and Interrupt when logic 1.

End of enumeration elements list.

ISF : Interrupt Status Flag
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

#0 : 0

Configured interrupt is not detected.

End of enumeration elements list.


GPCLR

Global Pin Control Low Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GPCLR GPCLR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPWD GPWE

GPWD : Global Pin Write Data
bits : 0 - 15 (16 bit)
access : write-only

GPWE : Global Pin Write Enable
bits : 16 - 31 (16 bit)
access : write-only


GPCHR

Global Pin Control High Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GPCHR GPCHR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPWD GPWE

GPWD : Global Pin Write Data
bits : 0 - 15 (16 bit)
access : write-only

GPWE : Global Pin Write Enable
bits : 16 - 31 (16 bit)
access : write-only


GICLR

Global Interrupt Control Low Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GICLR GICLR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GIWE GIWD

GIWE : Global Interrupt Write Enable
bits : 0 - 15 (16 bit)
access : write-only

GIWD : Global Interrupt Write Data
bits : 16 - 31 (16 bit)
access : write-only


GICHR

Global Interrupt Control High Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

GICHR GICHR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GIWE GIWD

GIWE : Global Interrupt Write Enable
bits : 0 - 15 (16 bit)
access : write-only

GIWD : Global Interrupt Write Data
bits : 16 - 31 (16 bit)
access : write-only


ISFR

Interrupt Status Flag Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISFR ISFR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ISF

ISF : Interrupt Status Flag
bits : 0 - 31 (32 bit)
access : read-write


PCR3

Pin Control Register 3
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCR3 PCR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PS PE SRE MUX IRQC ISF

PS : Pull Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.

#1 : 1

Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.

End of enumeration elements list.

PE : Pull Enable
bits : 1 - 1 (1 bit)
access : read-write

SRE : Slew Rate Enable
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

#1 : 1

Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.

End of enumeration elements list.

MUX : Pin Mux Control
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

#0000 : 000

Pin disabled (Alternative 0) (analog).

#0001 : 001

Alternative 1 (GPIO).

#0010 : 010

Alternative 2 (chip-specific).

#0011 : 011

Alternative 3 (chip-specific).

#0100 : 100

Alternative 4 (chip-specific).

#0101 : 101

Alternative 5 (chip-specific).

#0110 : 110

Alternative 6 (chip-specific).

#0111 : 111

Alternative 7 (chip-specific).

#1000 : 1000

Alternative 8 (chip-specific).

#1001 : 1001

Alternative 9 (chip-specific).

#1010 : 1010

Alternative 10 (chip-specific).

#1011 : 1011

Alternative 11 (chip-specific).

#1100 : 1100

Alternative 12 (chip-specific).

#1101 : 1101

Alternative 13 (chip-specific).

#1110 : 1110

Alternative 14 (chip-specific).

#1111 : 1111

Alternative 15 (chip-specific).

End of enumeration elements list.

IRQC : Interrupt Configuration
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

#0000 : 0000

Interrupt Status Flag (ISF) is disabled.

#0001 : 0001

ISF flag and DMA request on rising edge.

#0010 : 0010

ISF flag and DMA request on falling edge.

#0011 : 0011

ISF flag and DMA request on either edge.

#1000 : 1000

ISF flag and Interrupt when logic 0.

#1001 : 1001

ISF flag and Interrupt on rising-edge.

#1010 : 1010

ISF flag and Interrupt on falling-edge.

#1011 : 1011

ISF flag and Interrupt on either edge.

#1100 : 1100

ISF flag and Interrupt when logic 1.

End of enumeration elements list.

ISF : Interrupt Status Flag
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

#0 : 0

Configured interrupt is not detected.

End of enumeration elements list.



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