\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : AES enable
bits : 0 - 0 (1 bit)
DATATYPE : Data type selection (for data in and data out to/from the cryptographic block)
bits : 1 - 2 (2 bit)
MODE : AES operating mode
bits : 3 - 4 (2 bit)
CHMOD10 : AES chaining mode Bit1 Bit0
bits : 5 - 6 (2 bit)
CCFC : Computation Complete Flag Clear
bits : 7 - 7 (1 bit)
ERRC : Error clear
bits : 8 - 8 (1 bit)
CCFIE : CCF flag interrupt enable
bits : 9 - 9 (1 bit)
ERRIE : Error interrupt enable
bits : 10 - 10 (1 bit)
DMAINEN : Enable DMA management of data input phase
bits : 11 - 11 (1 bit)
DMAOUTEN : Enable DMA management of data output phase
bits : 12 - 12 (1 bit)
GCMPH : Used only for GCM, CCM and GMAC algorithms and has no effect when other algorithms are selected
bits : 13 - 14 (2 bit)
CHMOD2 : AES chaining mode Bit2
bits : 16 - 16 (1 bit)
KEYSIZE : Key size selection
bits : 18 - 18 (1 bit)
key register 0
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEYR0 : Data Output Register (LSB key [31:0])
bits : 0 - 31 (32 bit)
key register 1
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEYR1 : AES key register (key [63:32])
bits : 0 - 31 (32 bit)
key register 2
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEYR2 : AES key register (key [95:64])
bits : 0 - 31 (32 bit)
key register 3
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEYR3 : AES key register (MSB key [127:96])
bits : 0 - 31 (32 bit)
initialization vector register 0
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IVR0 : initialization vector register (LSB IVR [31:0])
bits : 0 - 31 (32 bit)
initialization vector register 1
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IVR1 : Initialization Vector Register (IVR [63:32])
bits : 0 - 31 (32 bit)
initialization vector register 2
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IVR2 : Initialization Vector Register (IVR [95:64])
bits : 0 - 31 (32 bit)
initialization vector register 3
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IVR3 : Initialization Vector Register (MSB IVR [127:96])
bits : 0 - 31 (32 bit)
key register 4
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEYR4 : AES key register (MSB key [159:128])
bits : 0 - 31 (32 bit)
key register 5
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEYR5 : AES key register (MSB key [191:160])
bits : 0 - 31 (32 bit)
key register 6
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEYR6 : AES key register (MSB key [223:192])
bits : 0 - 31 (32 bit)
key register 7
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEYR7 : AES key register (MSB key [255:224])
bits : 0 - 31 (32 bit)
status register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CCF : Computation complete flag
bits : 0 - 0 (1 bit)
RDERR : Read error flag
bits : 1 - 1 (1 bit)
WRERR : Write error flag
bits : 2 - 2 (1 bit)
BUSY : Busy flag
bits : 3 - 3 (1 bit)
AES suspend register 0
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_SUSP0R : AES suspend register 0
bits : 0 - 31 (32 bit)
AES suspend register 1
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_SUSP1R : AES suspend register 1
bits : 0 - 31 (32 bit)
AES suspend register 2
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_SUSP2R : AES suspend register 2
bits : 0 - 31 (32 bit)
AES suspend register 3
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_SUSP3R : AES suspend register 3
bits : 0 - 31 (32 bit)
AES suspend register 4
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_SUSP4R : AES suspend register 4
bits : 0 - 31 (32 bit)
AES suspend register 5
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_SUSP5R : AES suspend register 5
bits : 0 - 31 (32 bit)
AES suspend register 6
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_SUSP6R : AES suspend register 6
bits : 0 - 31 (32 bit)
AES suspend register 7
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_SUSP7R : AES suspend register 7
bits : 0 - 31 (32 bit)
data input register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_DINR : Data Input Register
bits : 0 - 31 (32 bit)
data output register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
AES_DOUTR : Data output register
bits : 0 - 31 (32 bit)
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