\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : RTC Enable
bits : 0 - 0 (1 bit)
access : read-write
DEBUGRUN : Debug Mode Run Enable
bits : 1 - 1 (1 bit)
access : read-write
COMP0TOP : Compare Channel 0 is Top Value
bits : 2 - 2 (1 bit)
access : read-write
Interrupt Flag Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
OF : Overflow Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-only
COMP0 : Compare Match 0 Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-only
COMP1 : Compare Match 1 Interrupt Flag
bits : 2 - 2 (1 bit)
access : read-only
Interrupt Flag Set Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
OF : Set Overflow Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only
COMP0 : Set Compare match 0 Interrupt Flag
bits : 1 - 1 (1 bit)
access : write-only
COMP1 : Set Compare match 1 Interrupt Flag
bits : 2 - 2 (1 bit)
access : write-only
Interrupt Flag Clear Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
OF : Clear Overflow Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only
COMP0 : Clear Compare match 0 Interrupt Flag
bits : 1 - 1 (1 bit)
access : write-only
COMP1 : Clear Compare match 1 Interrupt Flag
bits : 2 - 2 (1 bit)
access : write-only
Interrupt Enable Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OF : Overflow Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
COMP0 : Compare Match 0 Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
COMP1 : Compare Match 1 Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write
Freeze Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REGFREEZE : Register Update Freeze
bits : 0 - 0 (1 bit)
access : read-write
Synchronization Busy Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CTRL : CTRL Register Busy
bits : 0 - 0 (1 bit)
access : read-only
COMP0 : COMP0 Register Busy
bits : 1 - 1 (1 bit)
access : read-only
COMP1 : COMP1 Register Busy
bits : 2 - 2 (1 bit)
access : read-only
Counter Value Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CNT : Counter Value
bits : 0 - 23 (24 bit)
access : read-only
Compare Value Register 0
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMP0 : Compare Value 0
bits : 0 - 23 (24 bit)
access : read-write
Compare Value Register 1
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMP1 : Compare Value 1
bits : 0 - 23 (24 bit)
access : read-write
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