\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : Voltage Supply Comparator Enable
bits : 0 - 0 (1 bit)
access : read-write
INACTVAL : Inactive Value
bits : 2 - 2 (1 bit)
access : read-write
HYSTEN : Hysteresis Enable
bits : 4 - 4 (1 bit)
access : read-write
WARMTIME : Warm-Up Time
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
0x00000000 : 4CYCLES
4 HFPERCLK cycles
0x00000001 : 8CYCLES
8 HFPERCLK cycles
0x00000002 : 16CYCLES
16 HFPERCLK cycles
0x00000003 : 32CYCLES
32 HFPERCLK cycles
0x00000004 : 64CYCLES
64 HFPERCLK cycles
0x00000005 : 128CYCLES
128 HFPERCLK cycles
0x00000006 : 256CYCLES
256 HFPERCLK cycles
0x00000007 : 512CYCLES
512 HFPERCLK cycles
End of enumeration elements list.
IRISE : Rising Edge Interrupt Sense
bits : 16 - 16 (1 bit)
access : read-write
IFALL : Falling Edge Interrupt Sense
bits : 17 - 17 (1 bit)
access : read-write
BIASPROG : VCMP Bias Programming Value
bits : 24 - 27 (4 bit)
access : read-write
HALFBIAS : Half Bias Current
bits : 30 - 30 (1 bit)
access : read-write
Interrupt Flag Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
EDGE : Edge Triggered Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-only
WARMUP : Warm-up Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-only
Interrupt Flag Set Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
EDGE : Edge Triggered Interrupt Flag Set
bits : 0 - 0 (1 bit)
access : write-only
WARMUP : Warm-up Interrupt Flag Set
bits : 1 - 1 (1 bit)
access : write-only
Interrupt Flag Clear Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
EDGE : Edge Triggered Interrupt Flag Clear
bits : 0 - 0 (1 bit)
access : write-only
WARMUP : Warm-up Interrupt Flag Clear
bits : 1 - 1 (1 bit)
access : write-only
Input Selection Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TRIGLEVEL : Trigger Level
bits : 0 - 5 (6 bit)
access : read-write
LPREF : Low Power Reference
bits : 8 - 8 (1 bit)
access : read-write
Status Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
VCMPACT : Voltage Supply Comparator Active
bits : 0 - 0 (1 bit)
access : read-only
VCMPOUT : Voltage Supply Comparator Output
bits : 1 - 1 (1 bit)
access : read-only
Interrupt Enable Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EDGE : Edge Trigger Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
WARMUP : Warm-up Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
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