\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WARMUPMODE : Warm-up Mode
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0x00000000 : NORMAL
ADC is shut down after each conversion. 5us warmup time is used before each conversion.
0x00000001 : KEEPINSTANDBY
ADC is kept in standby mode between conversions. 1us warmup time is used before each conversion.
0x00000002 : KEEPINSLOWACC
ADC is kept in slow acquisition mode between conversions. 1us warmup time is used before each conversion.
0x00000003 : KEEPADCWARM
ADC is kept on after conversions, allowing for continuous conversion.
End of enumeration elements list.
SINGLEDMAWU : SINGLEFIFO DMA Wakeup
bits : 2 - 2 (1 bit)
access : read-write
SCANDMAWU : SCANFIFO DMA Wakeup
bits : 3 - 3 (1 bit)
access : read-write
TAILGATE : Conversion Tailgating
bits : 4 - 4 (1 bit)
access : read-write
ASYNCCLKEN : Selects ASYNC CLK Enable Mode When ADCCLKMODE=1
bits : 6 - 6 (1 bit)
access : read-write
ADCCLKMODE : ADC Clock Mode
bits : 7 - 7 (1 bit)
access : read-write
PRESC : Prescalar Setting for ADC Sample and Conversion Clock
bits : 8 - 14 (7 bit)
access : read-write
Enumeration:
0x00000000 : NODIVISION
None
End of enumeration elements list.
TIMEBASE : 1us Time Base
bits : 16 - 22 (7 bit)
access : read-write
OVSRSEL : Oversample Rate Select
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
0x00000000 : X2
2 samples for each conversion result
0x00000001 : X4
4 samples for each conversion result
0x00000002 : X8
8 samples for each conversion result
0x00000003 : X16
16 samples for each conversion result
0x00000004 : X32
32 samples for each conversion result
0x00000005 : X64
64 samples for each conversion result
0x00000006 : X128
128 samples for each conversion result
0x00000007 : X256
256 samples for each conversion result
0x00000008 : X512
512 samples for each conversion result
0x00000009 : X1024
1024 samples for each conversion result
0x0000000A : X2048
2048 samples for each conversion result
0x0000000B : X4096
4096 samples for each conversion result
End of enumeration elements list.
DBGHALT : Debug Mode Halt Enable
bits : 28 - 28 (1 bit)
access : read-write
CHCONMODE : Channel Connect
bits : 29 - 29 (1 bit)
access : read-write
CHCONREFWARMIDLE : Channel Connect and Reference Warm Sel When ADC is IDLE
bits : 30 - 31 (2 bit)
access : read-write
Enumeration:
0x00000000 : PREFSCAN
Keep scan reference warm and APORT switches for first scan channel closed if WARMUPMODE is not NORMAL
0x00000001 : PREFSINGLE
Keep single reference warm and keep APORT switches for single channel closed if WARMUPMODE is not NORMAL
0x00000002 : KEEPPREV
Keep last used reference warm and keep APORT switches for corresponding channel closed if WARMUPMODE is not NORMAL
End of enumeration elements list.
Single Channel Control Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REP : Single Channel Repetitive Mode
bits : 0 - 0 (1 bit)
access : read-write
DIFF : Single Channel Differential Mode
bits : 1 - 1 (1 bit)
access : read-write
ADJ : Single Channel Result Adjustment
bits : 2 - 2 (1 bit)
access : read-write
RES : Single Channel Resolution Select
bits : 3 - 4 (2 bit)
access : read-write
Enumeration:
0x00000000 : 12BIT
12-bit resolution.
0x00000001 : 8BIT
8-bit resolution.
0x00000002 : 6BIT
6-bit resolution.
0x00000003 : OVS
Oversampling enabled. Oversampling rate is set in OVSRSEL.
End of enumeration elements list.
REF : Single Channel Reference Selection
bits : 5 - 7 (3 bit)
access : read-write
Enumeration:
0x00000000 : 1V25
VFS = 1.25V with internal VBGR reference
0x00000001 : 2V5
VFS = 2.5V with internal VBGR reference
0x00000002 : VDD
VFS = AVDD with AVDD as reference source
0x00000003 : 5V
VFS = 5V with internal VBGR reference
0x00000004 : EXTSINGLE
Single ended external reference
0x00000005 : 2XEXTDIFF
Differential external reference, 2x
0x00000006 : 2XVDD
VFS = 2xAVDD with AVDD as the reference source
0x00000007 : CONF
Use SINGLECTRLX to configure reference
End of enumeration elements list.
POSSEL : Single Channel Positive Input Selection
bits : 8 - 15 (8 bit)
access : read-write
NEGSEL : Single Channel Negative Input Selection
bits : 16 - 23 (8 bit)
access : read-write
AT : Single Channel Acquisition Time
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
0x00000000 : 1CYCLE
1 conversion clock cycle acquisition time for single channel
0x00000001 : 2CYCLES
2 conversion clock cycles acquisition time for single channel
0x00000002 : 3CYCLES
3 conversion clock cycles acquisition time for single channel
0x00000003 : 4CYCLES
4 conversion clock cycles acquisition time for single channel
0x00000004 : 8CYCLES
8 conversion clock cycles acquisition time for single channel
0x00000005 : 16CYCLES
16 conversion clock cycles acquisition time for single channel
0x00000006 : 32CYCLES
32 conversion clock cycles acquisition time for single channel
0x00000007 : 64CYCLES
64 conversion clock cycles acquisition time for single channel
0x00000008 : 128CYCLES
128 conversion clock cycles acquisition time for single channel
0x00000009 : 256CYCLES
256 conversion clock cycles acquisition time for single channel
End of enumeration elements list.
PRSEN : Single Channel PRS Trigger Enable
bits : 29 - 29 (1 bit)
access : read-write
CMPEN : Compare Logic Enable for Single Channel
bits : 31 - 31 (1 bit)
access : read-write
Single Channel Control Register Continued
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VREFSEL : Single Channel Reference Selection
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0x00000000 : VBGR
Internal 0.83V Bandgap reference
0x00000001 : VDDXWATT
Scaled AVDD: AVDD*(the VREF attenuation factor)
0x00000002 : VREFPWATT
Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)
0x00000003 : VREFP
Raw single ended external Vref: ADCn_EXTP
0x00000004 : VENTROPY
Special mode used to generate ENTROPY.
0x00000005 : VREFPNWATT
Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)
0x00000006 : VREFPN
Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)
0x00000007 : VBGRLOW
Internal Bandgap reference at low setting 0.78V
End of enumeration elements list.
VREFATTFIX : Enable Fixed Scaling on VREF
bits : 3 - 3 (1 bit)
access : read-write
VREFATT : Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5
bits : 4 - 7 (4 bit)
access : read-write
VINATT : Code for VIN Attenuation Factor
bits : 8 - 11 (4 bit)
access : read-write
DVL : Single Channel DV Level Select
bits : 12 - 13 (2 bit)
access : read-write
FIFOOFACT : Single Channel FIFO Overflow Action
bits : 14 - 14 (1 bit)
access : read-write
PRSMODE : Single Channel PRS Trigger Mode
bits : 16 - 16 (1 bit)
access : read-write
PRSSEL : Single Channel PRS Trigger Select
bits : 17 - 20 (4 bit)
access : read-write
Enumeration:
0x00000000 : PRSCH0
PRS ch 0 triggers single channel
0x00000001 : PRSCH1
PRS ch 1 triggers single channel
0x00000002 : PRSCH2
PRS ch 2 triggers single channel
0x00000003 : PRSCH3
PRS ch 3 triggers single channel
0x00000004 : PRSCH4
PRS ch 4 triggers single channel
0x00000005 : PRSCH5
PRS ch 5 triggers single channel
0x00000006 : PRSCH6
PRS ch 6 triggers single channel
0x00000007 : PRSCH7
PRS ch 7 triggers single channel
0x00000008 : PRSCH8
PRS ch 8 triggers single channel
0x00000009 : PRSCH9
PRS ch 9 triggers single channel
0x0000000A : PRSCH10
PRS ch 10 triggers single channel
0x0000000B : PRSCH11
PRS ch 11 triggers single channel
0x0000000C : PRSCH12
PRS ch 12 triggers single channel
0x0000000D : PRSCH13
PRS ch 13 triggers single channel
0x0000000E : PRSCH14
PRS ch 14 triggers single channel
0x0000000F : PRSCH15
PRS ch 15 triggers single channel
End of enumeration elements list.
CONVSTARTDELAY : Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set
bits : 22 - 26 (5 bit)
access : read-write
CONVSTARTDELAYEN : Enable Delaying Next Conversion Start
bits : 27 - 27 (1 bit)
access : read-write
REPDELAY : REPDELAY Select for SINGLE REP Mode
bits : 29 - 31 (3 bit)
access : read-write
Enumeration:
0x00000000 : NODELAY
No delay
0x00000001 : 4CYCLES
4 conversion clock cycles
0x00000002 : 8CYCLES
8 conversion clock cycles
0x00000003 : 16CYCLES
16 conversion clock cycles
0x00000004 : 32CYCLES
32 conversion clock cycles
0x00000005 : 64CYCLES
64 conversion clock cycles
0x00000006 : 128CYCLES
128 conversion clock cycles
0x00000007 : 256CYCLES
256 conversion clock cycles
End of enumeration elements list.
Scan Control Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REP : Scan Sequence Repetitive Mode
bits : 0 - 0 (1 bit)
access : read-write
DIFF : Scan Sequence Differential Mode
bits : 1 - 1 (1 bit)
access : read-write
ADJ : Scan Sequence Result Adjustment
bits : 2 - 2 (1 bit)
access : read-write
RES : Scan Sequence Resolution Select
bits : 3 - 4 (2 bit)
access : read-write
Enumeration:
0x00000000 : 12BIT
12-bit resolution
0x00000001 : 8BIT
8-bit resolution
0x00000002 : 6BIT
6-bit resolution
0x00000003 : OVS
Oversampling enabled. Oversampling rate is set in OVSRSEL
End of enumeration elements list.
REF : Scan Sequence Reference Selection
bits : 5 - 7 (3 bit)
access : read-write
Enumeration:
0x00000000 : 1V25
VFS = 1.25V with internal VBGR reference
0x00000001 : 2V5
VFS = 2.5V with internal VBGR reference
0x00000002 : VDD
VFS = AVDD with AVDD as reference source
0x00000003 : 5V
VFS = 5V with internal VBGR reference
0x00000004 : EXTSINGLE
Single ended external reference
0x00000005 : 2XEXTDIFF
Differential external reference, 2x
0x00000006 : 2XVDD
VFS=2xAVDD with AVDD as the reference source
0x00000007 : CONF
Use SCANCTRLX to configure reference
End of enumeration elements list.
AT : Scan Acquisition Time
bits : 24 - 27 (4 bit)
access : read-write
Enumeration:
0x00000000 : 1CYCLE
1 conversion clock cycle acquisition time for scan
0x00000001 : 2CYCLES
2 conversion clock cycles acquisition time for scan
0x00000002 : 3CYCLES
3 conversion clock cycles acquisition time for scan
0x00000003 : 4CYCLES
4 conversion clock cycles acquisition time for scan
0x00000004 : 8CYCLES
8 conversion clock cycles acquisition time for scan
0x00000005 : 16CYCLES
16 conversion clock cycles acquisition time for scan
0x00000006 : 32CYCLES
32 conversion clock cycles acquisition time for scan
0x00000007 : 64CYCLES
64 conversion clock cycles acquisition time for scan
0x00000008 : 128CYCLES
128 conversion clock cycles acquisition time for scan
0x00000009 : 256CYCLES
256 conversion clock cycles acquisition time for scan
End of enumeration elements list.
PRSEN : Scan Sequence PRS Trigger Enable
bits : 29 - 29 (1 bit)
access : read-write
CMPEN : Compare Logic Enable for Scan
bits : 31 - 31 (1 bit)
access : read-write
Scan Control Register Continued
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VREFSEL : Scan Channel Reference Selection
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0x00000000 : VBGR
Internal 0.83V Bandgap reference
0x00000001 : VDDXWATT
Scaled AVDD: AVDD*(the VREF attenuation factor)
0x00000002 : VREFPWATT
Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)
0x00000003 : VREFP
Raw single ended external Vref: ADCn_EXTP
0x00000005 : VREFPNWATT
Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)
0x00000006 : VREFPN
Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)
0x00000007 : VBGRLOW
Internal Bandgap reference at low setting 0.78V
End of enumeration elements list.
VREFATTFIX : Enable Fixed Scaling on VREF
bits : 3 - 3 (1 bit)
access : read-write
VREFATT : Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5
bits : 4 - 7 (4 bit)
access : read-write
VINATT : Code for VIN Attenuation Factor
bits : 8 - 11 (4 bit)
access : read-write
DVL : Scan DV Level Select
bits : 12 - 13 (2 bit)
access : read-write
FIFOOFACT : Scan FIFO Overflow Action
bits : 14 - 14 (1 bit)
access : read-write
PRSMODE : Scan PRS Trigger Mode
bits : 16 - 16 (1 bit)
access : read-write
PRSSEL : Scan Sequence PRS Trigger Select
bits : 17 - 20 (4 bit)
access : read-write
Enumeration:
0x00000000 : PRSCH0
PRS ch 0 triggers scan sequence
0x00000001 : PRSCH1
PRS ch 1 triggers scan sequence
0x00000002 : PRSCH2
PRS ch 2 triggers scan sequence
0x00000003 : PRSCH3
PRS ch 3 triggers scan sequence
0x00000004 : PRSCH4
PRS ch 4 triggers scan sequence
0x00000005 : PRSCH5
PRS ch 5 triggers scan sequence
0x00000006 : PRSCH6
PRS ch 6 triggers scan sequence
0x00000007 : PRSCH7
PRS ch 7 triggers scan sequence
0x00000008 : PRSCH8
PRS ch 8 triggers scan sequence
0x00000009 : PRSCH9
PRS ch 9 triggers scan sequence
0x0000000A : PRSCH10
PRS ch 10 triggers scan sequence
0x0000000B : PRSCH11
PRS ch 11 triggers scan sequence
0x0000000C : PRSCH12
PRS ch 12 triggers scan sequence
0x0000000D : PRSCH13
PRS ch 13 triggers scan sequence
0x0000000E : PRSCH14
PRS ch 14 triggers scan sequence
0x0000000F : PRSCH15
PRS ch 15 triggers scan sequence
End of enumeration elements list.
CONVSTARTDELAY : Delay Next Conversion Start If CONVSTARTDELAYEN is Set
bits : 22 - 26 (5 bit)
access : read-write
CONVSTARTDELAYEN : Enable Delaying Next Conversion Start
bits : 27 - 27 (1 bit)
access : read-write
REPDELAY : REPDELAY Select for SCAN REP Mode
bits : 29 - 31 (3 bit)
access : read-write
Enumeration:
0x00000000 : NODELAY
No delay
0x00000001 : 4CYCLES
4 conversion clock cycles
0x00000002 : 8CYCLES
8 conversion clock cycles
0x00000003 : 16CYCLES
16 conversion clock cycles
0x00000004 : 32CYCLES
32 conversion clock cycles
0x00000005 : 64CYCLES
64 conversion clock cycles
0x00000006 : 128CYCLES
128 conversion clock cycles
0x00000007 : 256CYCLES
256 conversion clock cycles
End of enumeration elements list.
Scan Sequence Input Mask Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCANINPUTEN : Scan Sequence Input Mask
bits : 0 - 31 (32 bit)
access : read-write
Input Selection Register for Scan Mode
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INPUT0TO7SEL : Inputs Chosen for ADCn_INPUT7-ADCn_INPUT0 as Referred in SCANMASK
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
0x00000000 : APORT0CH0TO7
None
0x00000001 : APORT0CH8TO15
None
0x00000004 : APORT1CH0TO7
None
0x00000005 : APORT1CH8TO15
None
0x00000006 : APORT1CH16TO23
None
0x00000007 : APORT1CH24TO31
None
0x00000008 : APORT2CH0TO7
None
0x00000009 : APORT2CH8TO15
None
0x0000000A : APORT2CH16TO23
None
0x0000000B : APORT2CH24TO31
None
0x0000000C : APORT3CH0TO7
None
0x0000000D : APORT3CH8TO15
None
0x0000000E : APORT3CH16TO23
None
0x0000000F : APORT3CH24TO31
None
0x00000010 : APORT4CH0TO7
None
0x00000011 : APORT4CH8TO15
None
0x00000012 : APORT4CH16TO23
None
0x00000013 : APORT4CH24TO31
None
End of enumeration elements list.
INPUT8TO15SEL : Inputs Chosen for ADCn_INPUT8-ADCn_INPUT15 as Referred in SCANMASK
bits : 8 - 12 (5 bit)
access : read-write
Enumeration:
0x00000000 : APORT0CH0TO7
None
0x00000001 : APORT0CH8TO15
None
0x00000004 : APORT1CH0TO7
None
0x00000005 : APORT1CH8TO15
None
0x00000006 : APORT1CH16TO23
None
0x00000007 : APORT1CH24TO31
None
0x00000008 : APORT2CH0TO7
None
0x00000009 : APORT2CH8TO15
None
0x0000000A : APORT2CH16TO23
None
0x0000000B : APORT2CH24TO31
None
0x0000000C : APORT3CH0TO7
None
0x0000000D : APORT3CH8TO15
None
0x0000000E : APORT3CH16TO23
None
0x0000000F : APORT3CH24TO31
None
0x00000010 : APORT4CH0TO7
None
0x00000011 : APORT4CH8TO15
None
0x00000012 : APORT4CH16TO23
None
0x00000013 : APORT4CH24TO31
None
End of enumeration elements list.
INPUT16TO23SEL : Inputs Chosen for ADCn_INPUT16-ADCn_INPUT23 as Referred in SCANMASK
bits : 16 - 20 (5 bit)
access : read-write
Enumeration:
0x00000000 : APORT0CH0TO7
None
0x00000001 : APORT0CH8TO15
None
0x00000004 : APORT1CH0TO7
None
0x00000005 : APORT1CH8TO15
None
0x00000006 : APORT1CH16TO23
None
0x00000007 : APORT1CH24TO31
None
0x00000008 : APORT2CH0TO7
None
0x00000009 : APORT2CH8TO15
None
0x0000000A : APORT2CH16TO23
None
0x0000000B : APORT2CH24TO31
None
0x0000000C : APORT3CH0TO7
None
0x0000000D : APORT3CH8TO15
None
0x0000000E : APORT3CH16TO23
None
0x0000000F : APORT3CH24TO31
None
0x00000010 : APORT4CH0TO7
None
0x00000011 : APORT4CH8TO15
None
0x00000012 : APORT4CH16TO23
None
0x00000013 : APORT4CH24TO31
None
End of enumeration elements list.
INPUT24TO31SEL : Inputs Chosen for ADCn_INPUT24-ADCn_INPUT31 as Referred in SCANMASK
bits : 24 - 28 (5 bit)
access : read-write
Enumeration:
0x00000000 : APORT0CH0TO7
None
0x00000001 : APORT0CH8TO15
None
0x00000004 : APORT1CH0TO7
None
0x00000005 : APORT1CH8TO15
None
0x00000006 : APORT1CH16TO23
None
0x00000007 : APORT1CH24TO31
None
0x00000008 : APORT2CH0TO7
None
0x00000009 : APORT2CH8TO15
None
0x0000000A : APORT2CH16TO23
None
0x0000000B : APORT2CH24TO31
None
0x0000000C : APORT3CH0TO7
None
0x0000000D : APORT3CH8TO15
None
0x0000000E : APORT3CH16TO23
None
0x0000000F : APORT3CH24TO31
None
0x00000010 : APORT4CH0TO7
None
0x00000011 : APORT4CH8TO15
None
0x00000012 : APORT4CH16TO23
None
0x00000013 : APORT4CH24TO31
None
End of enumeration elements list.
Negative Input Select Register for Scan
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INPUT0NEGSEL : Negative Input Select Register for ADCn_INPUT0 in Differential Scan Mode
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0x00000000 : INPUT1
Selects ADCn_INPUT1 as negative channel input
0x00000001 : INPUT3
Selects ADCn_INPUT3 as negative channel input
0x00000002 : INPUT5
Selects ADCn_INPUT5 as negative channel input
0x00000003 : INPUT7
Selects ADCn_INPUT7 as negative channel input
End of enumeration elements list.
INPUT2NEGSEL : Negative Input Select Register for ADCn_INPUT2 in Differential Scan Mode
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0x00000000 : INPUT1
Selects ADCn_INPUT1 as negative channel input
0x00000001 : INPUT3
Selects ADCn_INPUT3 as negative channel input
0x00000002 : INPUT5
Selects ADCn_INPUT5 as negative channel input
0x00000003 : INPUT7
Selects ADCn_INPUT7 as negative channel input
End of enumeration elements list.
INPUT4NEGSEL : Negative Input Select Register for ADCn_INPUT4 in Differential Scan Mode
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
0x00000000 : INPUT1
Selects ADCn_INPUT1 as negative channel input
0x00000001 : INPUT3
Selects ADCn_INPUT3 as negative channel input
0x00000002 : INPUT5
Selects ADCn_INPUT5 as negative channel input
0x00000003 : INPUT7
Selects ADCn_INPUT7 as negative channel input
End of enumeration elements list.
INPUT6NEGSEL : Negative Input Select Register for ADCn_INPUT1 in Differential Scan Mode
bits : 6 - 7 (2 bit)
access : read-write
Enumeration:
0x00000000 : INPUT1
Selects ADCn_INPUT1 as negative channel input
0x00000001 : INPUT3
Selects ADCn_INPUT3 as negative channel input
0x00000002 : INPUT5
Selects ADCn_INPUT5 as negative channel input
0x00000003 : INPUT7
Selects ADCn_INPUT7 as negative channel input
End of enumeration elements list.
INPUT9NEGSEL : Negative Input Select Register for ADCn_INPUT9 in Differential Scan Mode
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
0x00000000 : INPUT8
Selects ADCn_INPUT8 as negative channel input
0x00000001 : INPUT10
Selects ADCn_INPUT10 as negative channel input
0x00000002 : INPUT12
Selects ADCn_INPUT12 as negative channel input
0x00000003 : INPUT14
Selects ADCn_INPUT14 as negative channel input
End of enumeration elements list.
INPUT11NEGSEL : Negative Input Select Register for ADCn_INPUT11 in Differential Scan Mode
bits : 10 - 11 (2 bit)
access : read-write
Enumeration:
0x00000000 : INPUT8
Selects ADCn_INPUT8 as negative channel input
0x00000001 : INPUT10
Selects ADCn_INPUT10 as negative channel input
0x00000002 : INPUT12
Selects ADCn_INPUT12 as negative channel input
0x00000003 : INPUT14
Selects ADCn_INPUT14 as negative channel input
End of enumeration elements list.
INPUT13NEGSEL : Negative Input Select Register for ADCn_INPUT13 in Differential Scan Mode
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0x00000000 : INPUT8
Selects ADCn_INPUT8 as negative channel input
0x00000001 : INPUT10
Selects ADCn_INPUT10 as negative channel input
0x00000002 : INPUT12
Selects ADCn_INPUT12 as negative channel input
0x00000003 : INPUT14
Selects ADCn_INPUT14 as negative channel input
End of enumeration elements list.
INPUT15NEGSEL : Negative Input Select Register for ADCn_INPUT15 in Differential Scan Mode
bits : 14 - 15 (2 bit)
access : read-write
Enumeration:
0x00000000 : INPUT8
Selects ADCn_INPUT8 as negative channel input
0x00000001 : INPUT10
Selects ADCn_INPUT10 as negative channel input
0x00000002 : INPUT12
Selects ADCn_INPUT12 as negative channel input
0x00000003 : INPUT14
Selects ADCn_INPUT14 as negative channel input
End of enumeration elements list.
Compare Threshold Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADLT : Less Than Compare Threshold
bits : 0 - 15 (16 bit)
access : read-write
ADGT : Greater Than Compare Threshold
bits : 16 - 31 (16 bit)
access : read-write
Bias Programming Register for Various Analog Blocks Used in ADC Operation
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADCBIASPROG : Bias Programming Value of Analog ADC Block
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
0x00000000 : NORMAL
Normal power (use for 1Msps operation)
0x00000004 : SCALE2
Scaling bias to 1/2
0x00000008 : SCALE4
Scaling bias to 1/4
0x0000000C : SCALE8
Scaling bias to 1/8
0x0000000E : SCALE16
Scaling bias to 1/16
0x0000000F : SCALE32
Scaling bias to 1/32
End of enumeration elements list.
VFAULTCLR : Clear VREFOF Flag
bits : 12 - 12 (1 bit)
access : read-write
GPBIASACC : Accuracy Setting for the System Bias During ADC Operation
bits : 16 - 16 (1 bit)
access : read-write
Calibration Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SINGLEOFFSET : Single Mode Offset Calibration Value for Differential or Positive Single-ended Mode
bits : 0 - 3 (4 bit)
access : read-write
SINGLEOFFSETINV : Single Mode Offset Calibration Value for Negative Single-ended Mode
bits : 4 - 7 (4 bit)
access : read-write
SINGLEGAIN : Single Mode Gain Calibration Value
bits : 8 - 14 (7 bit)
access : read-write
OFFSETINVMODE : Negative Single-ended Offset Calibration is Enabled
bits : 15 - 15 (1 bit)
access : read-write
SCANOFFSET : Scan Mode Offset Calibration Value for Differential or Positive Single-ended Mode
bits : 16 - 19 (4 bit)
access : read-write
SCANOFFSETINV : Scan Mode Offset Calibration Value for Negative Single-ended Mode
bits : 20 - 23 (4 bit)
access : read-write
SCANGAIN : Scan Mode Gain Calibration Value
bits : 24 - 30 (7 bit)
access : read-write
CALEN : Calibration Mode is Enabled
bits : 31 - 31 (1 bit)
access : read-write
Interrupt Flag Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SINGLE : Single Conversion Complete Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-only
SCAN : Scan Conversion Complete Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-only
SINGLEOF : Single FIFO Overflow Interrupt Flag
bits : 8 - 8 (1 bit)
access : read-only
SCANOF : Scan FIFO Overflow Interrupt Flag
bits : 9 - 9 (1 bit)
access : read-only
SINGLEUF : Single FIFO Underflow Interrupt Flag
bits : 10 - 10 (1 bit)
access : read-only
SCANUF : Scan FIFO Underflow Interrupt Flag
bits : 11 - 11 (1 bit)
access : read-only
SINGLECMP : Single Result Compare Match Interrupt Flag
bits : 16 - 16 (1 bit)
access : read-only
SCANCMP : Scan Result Compare Match Interrupt Flag
bits : 17 - 17 (1 bit)
access : read-only
VREFOV : VREF Over Voltage Interrupt Flag
bits : 24 - 24 (1 bit)
access : read-only
PROGERR : Programming Error Interrupt Flag
bits : 25 - 25 (1 bit)
access : read-only
SCANEXTPEND : External Scan Trigger Pending Flag
bits : 26 - 26 (1 bit)
access : read-only
SCANPEND : Scan Trigger Pending Flag
bits : 27 - 27 (1 bit)
access : read-only
PRSTIMEDERR : PRS Timed Mode Error Flag
bits : 28 - 28 (1 bit)
access : read-only
EM23ERR : EM23 Entry Error Flag
bits : 29 - 29 (1 bit)
access : read-only
Interrupt Flag Set Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
SINGLEOF : Set SINGLEOF Interrupt Flag
bits : 8 - 8 (1 bit)
access : write-only
SCANOF : Set SCANOF Interrupt Flag
bits : 9 - 9 (1 bit)
access : write-only
SINGLEUF : Set SINGLEUF Interrupt Flag
bits : 10 - 10 (1 bit)
access : write-only
SCANUF : Set SCANUF Interrupt Flag
bits : 11 - 11 (1 bit)
access : write-only
SINGLECMP : Set SINGLECMP Interrupt Flag
bits : 16 - 16 (1 bit)
access : write-only
SCANCMP : Set SCANCMP Interrupt Flag
bits : 17 - 17 (1 bit)
access : write-only
VREFOV : Set VREFOV Interrupt Flag
bits : 24 - 24 (1 bit)
access : write-only
PROGERR : Set PROGERR Interrupt Flag
bits : 25 - 25 (1 bit)
access : write-only
SCANEXTPEND : Set SCANEXTPEND Interrupt Flag
bits : 26 - 26 (1 bit)
access : write-only
SCANPEND : Set SCANPEND Interrupt Flag
bits : 27 - 27 (1 bit)
access : write-only
PRSTIMEDERR : Set PRSTIMEDERR Interrupt Flag
bits : 28 - 28 (1 bit)
access : write-only
EM23ERR : Set EM23ERR Interrupt Flag
bits : 29 - 29 (1 bit)
access : write-only
Interrupt Flag Clear Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
SINGLEOF : Clear SINGLEOF Interrupt Flag
bits : 8 - 8 (1 bit)
access : write-only
SCANOF : Clear SCANOF Interrupt Flag
bits : 9 - 9 (1 bit)
access : write-only
SINGLEUF : Clear SINGLEUF Interrupt Flag
bits : 10 - 10 (1 bit)
access : write-only
SCANUF : Clear SCANUF Interrupt Flag
bits : 11 - 11 (1 bit)
access : write-only
SINGLECMP : Clear SINGLECMP Interrupt Flag
bits : 16 - 16 (1 bit)
access : write-only
SCANCMP : Clear SCANCMP Interrupt Flag
bits : 17 - 17 (1 bit)
access : write-only
VREFOV : Clear VREFOV Interrupt Flag
bits : 24 - 24 (1 bit)
access : write-only
PROGERR : Clear PROGERR Interrupt Flag
bits : 25 - 25 (1 bit)
access : write-only
SCANEXTPEND : Clear SCANEXTPEND Interrupt Flag
bits : 26 - 26 (1 bit)
access : write-only
SCANPEND : Clear SCANPEND Interrupt Flag
bits : 27 - 27 (1 bit)
access : write-only
PRSTIMEDERR : Clear PRSTIMEDERR Interrupt Flag
bits : 28 - 28 (1 bit)
access : write-only
EM23ERR : Clear EM23ERR Interrupt Flag
bits : 29 - 29 (1 bit)
access : write-only
Interrupt Enable Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SINGLE : SINGLE Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
SCAN : SCAN Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
SINGLEOF : SINGLEOF Interrupt Enable
bits : 8 - 8 (1 bit)
access : read-write
SCANOF : SCANOF Interrupt Enable
bits : 9 - 9 (1 bit)
access : read-write
SINGLEUF : SINGLEUF Interrupt Enable
bits : 10 - 10 (1 bit)
access : read-write
SCANUF : SCANUF Interrupt Enable
bits : 11 - 11 (1 bit)
access : read-write
SINGLECMP : SINGLECMP Interrupt Enable
bits : 16 - 16 (1 bit)
access : read-write
SCANCMP : SCANCMP Interrupt Enable
bits : 17 - 17 (1 bit)
access : read-write
VREFOV : VREFOV Interrupt Enable
bits : 24 - 24 (1 bit)
access : read-write
PROGERR : PROGERR Interrupt Enable
bits : 25 - 25 (1 bit)
access : read-write
SCANEXTPEND : SCANEXTPEND Interrupt Enable
bits : 26 - 26 (1 bit)
access : read-write
SCANPEND : SCANPEND Interrupt Enable
bits : 27 - 27 (1 bit)
access : read-write
PRSTIMEDERR : PRSTIMEDERR Interrupt Enable
bits : 28 - 28 (1 bit)
access : read-write
EM23ERR : EM23ERR Interrupt Enable
bits : 29 - 29 (1 bit)
access : read-write
Single Conversion Result Data
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Single Conversion Result Data
bits : 0 - 31 (32 bit)
access : read-only
Scan Conversion Result Data
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Scan Conversion Result Data
bits : 0 - 31 (32 bit)
access : read-only
Single Conversion Result Data Peek Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATAP : Single Conversion Result Data Peek
bits : 0 - 31 (32 bit)
access : read-only
Scan Sequence Result Data Peek Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATAP : Scan Conversion Result Data Peek
bits : 0 - 31 (32 bit)
access : read-only
Scan Sequence Result Data + Data Source Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATA : Scan Conversion Result Data
bits : 0 - 15 (16 bit)
access : read-only
SCANINPUTID : Scan Conversion Input ID
bits : 16 - 20 (5 bit)
access : read-only
Scan Sequence Result Data + Data Source Peek Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DATAP : Scan Conversion Result Data Peek
bits : 0 - 15 (16 bit)
access : read-only
SCANINPUTIDPEEK : Scan Conversion Data Source Peek
bits : 16 - 20 (5 bit)
access : read-only
APORT Request Status Register
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
APORT0XREQ : 1 If the Bus Connected to APORT0X is Requested
bits : 0 - 0 (1 bit)
access : read-only
APORT0YREQ : 1 If the Bus Connected to APORT0Y is Requested
bits : 1 - 1 (1 bit)
access : read-only
APORT1XREQ : 1 If the Bus Connected to APORT1X is Requested
bits : 2 - 2 (1 bit)
access : read-only
APORT1YREQ : 1 If the Bus Connected to APORT1Y is Requested
bits : 3 - 3 (1 bit)
access : read-only
APORT2XREQ : 1 If the Bus Connected to APORT2X is Requested
bits : 4 - 4 (1 bit)
access : read-only
APORT2YREQ : 1 If the Bus Connected to APORT2Y is Requested
bits : 5 - 5 (1 bit)
access : read-only
APORT3XREQ : 1 If the Bus Connected to APORT3X is Requested
bits : 6 - 6 (1 bit)
access : read-only
APORT3YREQ : 1 If the Bus Connected to APORT3Y is Requested
bits : 7 - 7 (1 bit)
access : read-only
APORT4XREQ : 1 If the Bus Connected to APORT4X is Requested
bits : 8 - 8 (1 bit)
access : read-only
APORT4YREQ : 1 If the Bus Connected to APORT4Y is Requested
bits : 9 - 9 (1 bit)
access : read-only
Command Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
SINGLESTART : Single Channel Conversion Start
bits : 0 - 0 (1 bit)
access : write-only
SINGLESTOP : Single Channel Conversion Stop
bits : 1 - 1 (1 bit)
access : write-only
SCANSTART : Scan Sequence Start
bits : 2 - 2 (1 bit)
access : write-only
SCANSTOP : Scan Sequence Stop
bits : 3 - 3 (1 bit)
access : write-only
APORT Conflict Status Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
APORT0XCONFLICT : 1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral
bits : 0 - 0 (1 bit)
access : read-only
APORT0YCONFLICT : 1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral
bits : 1 - 1 (1 bit)
access : read-only
APORT1XCONFLICT : 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral
bits : 2 - 2 (1 bit)
access : read-only
APORT1YCONFLICT : 1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral
bits : 3 - 3 (1 bit)
access : read-only
APORT2XCONFLICT : 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral
bits : 4 - 4 (1 bit)
access : read-only
APORT2YCONFLICT : 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral
bits : 5 - 5 (1 bit)
access : read-only
APORT3XCONFLICT : 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral
bits : 6 - 6 (1 bit)
access : read-only
APORT3YCONFLICT : 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral
bits : 7 - 7 (1 bit)
access : read-only
APORT4XCONFLICT : 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral
bits : 8 - 8 (1 bit)
access : read-only
APORT4YCONFLICT : 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral
bits : 9 - 9 (1 bit)
access : read-only
Single FIFO Count Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SINGLEDC : Single Data Count
bits : 0 - 2 (3 bit)
access : read-only
Scan FIFO Count Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SCANDC : Scan Data Count
bits : 0 - 2 (3 bit)
access : read-only
Single FIFO Clear Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
SINGLEFIFOCLEAR : Clear Single FIFO Content
bits : 0 - 0 (1 bit)
access : write-only
Scan FIFO Clear Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
SCANFIFOCLEAR : Clear Scan FIFO Content
bits : 0 - 0 (1 bit)
access : write-only
APORT Bus Master Disable Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
APORT1XMASTERDIS : APORT1X Master Disable
bits : 2 - 2 (1 bit)
access : read-write
APORT1YMASTERDIS : APORT1Y Master Disable
bits : 3 - 3 (1 bit)
access : read-write
APORT2XMASTERDIS : APORT2X Master Disable
bits : 4 - 4 (1 bit)
access : read-write
APORT2YMASTERDIS : APORT2Y Master Disable
bits : 5 - 5 (1 bit)
access : read-write
APORT3XMASTERDIS : APORT3X Master Disable
bits : 6 - 6 (1 bit)
access : read-write
APORT3YMASTERDIS : APORT3Y Master Disable
bits : 7 - 7 (1 bit)
access : read-write
APORT4XMASTERDIS : APORT4X Master Disable
bits : 8 - 8 (1 bit)
access : read-write
APORT4YMASTERDIS : APORT4Y Master Disable
bits : 9 - 9 (1 bit)
access : read-write
Status Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SINGLEACT : Single Channel Conversion Active
bits : 0 - 0 (1 bit)
access : read-only
SCANACT : Scan Conversion Active
bits : 1 - 1 (1 bit)
access : read-only
SCANPENDING : Scan Conversion Pending
bits : 2 - 2 (1 bit)
access : read-only
SINGLEREFWARM : Single Channel Reference Warmed Up
bits : 8 - 8 (1 bit)
access : read-only
SCANREFWARM : Scan Reference Warmed Up
bits : 9 - 9 (1 bit)
access : read-only
PROGERR : Programming Error Status
bits : 10 - 11 (2 bit)
access : read-only
Enumeration:
0x00000001 : BUSCONF
None
0x00000002 : NEGSELCONF
None
End of enumeration elements list.
WARM : ADC Warmed Up
bits : 12 - 12 (1 bit)
access : read-only
SINGLEDV : Single Channel Data Valid
bits : 16 - 16 (1 bit)
access : read-only
SCANDV : Scan Data Valid
bits : 17 - 17 (1 bit)
access : read-only
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