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PIO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x200 byte (0x0)
mem_usage : registers
protection : not protected

Registers

PER

OER

ODR

OSR

IFER

IFDR

IFSR

SODR

CODR

ODSR

PDSR

PDR

IER

IDR

IMR

ISR

MDER

MDDR

MDSR

PUDR

PUER

PUSR

ASR

BSR

ABSR

PSR

OWER

OWDR

OWSR


PER

PIO Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PER PER write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : PIO Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : PIO Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : PIO Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : PIO Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : PIO Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : PIO Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : PIO Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : PIO Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : PIO Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : PIO Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : PIO Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : PIO Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : PIO Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : PIO Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : PIO Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : PIO Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : PIO Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : PIO Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : PIO Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : PIO Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : PIO Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : PIO Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : PIO Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : PIO Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : PIO Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : PIO Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : PIO Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : PIO Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : PIO Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : PIO Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : PIO Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : PIO Enable
bits : 31 - 31 (1 bit)
access : write-only


OER

Output Enable Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OER OER write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Enable
bits : 31 - 31 (1 bit)
access : write-only


ODR

Output Disable Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ODR ODR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Disable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Disable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Disable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Disable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Disable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Disable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Disable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Disable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Disable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Disable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Disable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Disable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Disable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Disable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Disable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Disable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Disable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Disable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Disable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Disable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Disable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Disable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Disable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Disable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Disable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Disable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Disable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Disable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Disable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Disable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Disable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Disable
bits : 31 - 31 (1 bit)
access : write-only


OSR

Output Status Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

OSR OSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Status
bits : 0 - 0 (1 bit)
access : read-only

P1 : Output Status
bits : 1 - 1 (1 bit)
access : read-only

P2 : Output Status
bits : 2 - 2 (1 bit)
access : read-only

P3 : Output Status
bits : 3 - 3 (1 bit)
access : read-only

P4 : Output Status
bits : 4 - 4 (1 bit)
access : read-only

P5 : Output Status
bits : 5 - 5 (1 bit)
access : read-only

P6 : Output Status
bits : 6 - 6 (1 bit)
access : read-only

P7 : Output Status
bits : 7 - 7 (1 bit)
access : read-only

P8 : Output Status
bits : 8 - 8 (1 bit)
access : read-only

P9 : Output Status
bits : 9 - 9 (1 bit)
access : read-only

P10 : Output Status
bits : 10 - 10 (1 bit)
access : read-only

P11 : Output Status
bits : 11 - 11 (1 bit)
access : read-only

P12 : Output Status
bits : 12 - 12 (1 bit)
access : read-only

P13 : Output Status
bits : 13 - 13 (1 bit)
access : read-only

P14 : Output Status
bits : 14 - 14 (1 bit)
access : read-only

P15 : Output Status
bits : 15 - 15 (1 bit)
access : read-only

P16 : Output Status
bits : 16 - 16 (1 bit)
access : read-only

P17 : Output Status
bits : 17 - 17 (1 bit)
access : read-only

P18 : Output Status
bits : 18 - 18 (1 bit)
access : read-only

P19 : Output Status
bits : 19 - 19 (1 bit)
access : read-only

P20 : Output Status
bits : 20 - 20 (1 bit)
access : read-only

P21 : Output Status
bits : 21 - 21 (1 bit)
access : read-only

P22 : Output Status
bits : 22 - 22 (1 bit)
access : read-only

P23 : Output Status
bits : 23 - 23 (1 bit)
access : read-only

P24 : Output Status
bits : 24 - 24 (1 bit)
access : read-only

P25 : Output Status
bits : 25 - 25 (1 bit)
access : read-only

P26 : Output Status
bits : 26 - 26 (1 bit)
access : read-only

P27 : Output Status
bits : 27 - 27 (1 bit)
access : read-only

P28 : Output Status
bits : 28 - 28 (1 bit)
access : read-only

P29 : Output Status
bits : 29 - 29 (1 bit)
access : read-only

P30 : Output Status
bits : 30 - 30 (1 bit)
access : read-only

P31 : Output Status
bits : 31 - 31 (1 bit)
access : read-only


IFER

Glitch Input Filter Enable Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IFER IFER write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Input Filter Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Input Filter Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Input Filter Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Input Filter Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Input Filter Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Input Filter Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Input Filter Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Input Filter Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Input Filter Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Input Filter Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Input Filter Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Input Filter Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Input Filter Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Input Filter Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Input Filter Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Input Filter Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Input Filter Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Input Filter Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Input Filter Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Input Filter Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Input Filter Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Input Filter Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Input Filter Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Input Filter Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Input Filter Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Input Filter Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Input Filter Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Input Filter Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Input Filter Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Input Filter Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Input Filter Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Input Filter Enable
bits : 31 - 31 (1 bit)
access : write-only


IFDR

Glitch Input Filter Disable Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IFDR IFDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Input Filter Disable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Input Filter Disable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Input Filter Disable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Input Filter Disable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Input Filter Disable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Input Filter Disable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Input Filter Disable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Input Filter Disable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Input Filter Disable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Input Filter Disable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Input Filter Disable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Input Filter Disable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Input Filter Disable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Input Filter Disable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Input Filter Disable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Input Filter Disable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Input Filter Disable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Input Filter Disable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Input Filter Disable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Input Filter Disable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Input Filter Disable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Input Filter Disable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Input Filter Disable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Input Filter Disable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Input Filter Disable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Input Filter Disable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Input Filter Disable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Input Filter Disable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Input Filter Disable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Input Filter Disable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Input Filter Disable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Input Filter Disable
bits : 31 - 31 (1 bit)
access : write-only


IFSR

Glitch Input Filter Status Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IFSR IFSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Input Filer Status
bits : 0 - 0 (1 bit)
access : read-only

P1 : Input Filer Status
bits : 1 - 1 (1 bit)
access : read-only

P2 : Input Filer Status
bits : 2 - 2 (1 bit)
access : read-only

P3 : Input Filer Status
bits : 3 - 3 (1 bit)
access : read-only

P4 : Input Filer Status
bits : 4 - 4 (1 bit)
access : read-only

P5 : Input Filer Status
bits : 5 - 5 (1 bit)
access : read-only

P6 : Input Filer Status
bits : 6 - 6 (1 bit)
access : read-only

P7 : Input Filer Status
bits : 7 - 7 (1 bit)
access : read-only

P8 : Input Filer Status
bits : 8 - 8 (1 bit)
access : read-only

P9 : Input Filer Status
bits : 9 - 9 (1 bit)
access : read-only

P10 : Input Filer Status
bits : 10 - 10 (1 bit)
access : read-only

P11 : Input Filer Status
bits : 11 - 11 (1 bit)
access : read-only

P12 : Input Filer Status
bits : 12 - 12 (1 bit)
access : read-only

P13 : Input Filer Status
bits : 13 - 13 (1 bit)
access : read-only

P14 : Input Filer Status
bits : 14 - 14 (1 bit)
access : read-only

P15 : Input Filer Status
bits : 15 - 15 (1 bit)
access : read-only

P16 : Input Filer Status
bits : 16 - 16 (1 bit)
access : read-only

P17 : Input Filer Status
bits : 17 - 17 (1 bit)
access : read-only

P18 : Input Filer Status
bits : 18 - 18 (1 bit)
access : read-only

P19 : Input Filer Status
bits : 19 - 19 (1 bit)
access : read-only

P20 : Input Filer Status
bits : 20 - 20 (1 bit)
access : read-only

P21 : Input Filer Status
bits : 21 - 21 (1 bit)
access : read-only

P22 : Input Filer Status
bits : 22 - 22 (1 bit)
access : read-only

P23 : Input Filer Status
bits : 23 - 23 (1 bit)
access : read-only

P24 : Input Filer Status
bits : 24 - 24 (1 bit)
access : read-only

P25 : Input Filer Status
bits : 25 - 25 (1 bit)
access : read-only

P26 : Input Filer Status
bits : 26 - 26 (1 bit)
access : read-only

P27 : Input Filer Status
bits : 27 - 27 (1 bit)
access : read-only

P28 : Input Filer Status
bits : 28 - 28 (1 bit)
access : read-only

P29 : Input Filer Status
bits : 29 - 29 (1 bit)
access : read-only

P30 : Input Filer Status
bits : 30 - 30 (1 bit)
access : read-only

P31 : Input Filer Status
bits : 31 - 31 (1 bit)
access : read-only


SODR

Set Output Data Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

SODR SODR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Set Output Data
bits : 0 - 0 (1 bit)
access : write-only

P1 : Set Output Data
bits : 1 - 1 (1 bit)
access : write-only

P2 : Set Output Data
bits : 2 - 2 (1 bit)
access : write-only

P3 : Set Output Data
bits : 3 - 3 (1 bit)
access : write-only

P4 : Set Output Data
bits : 4 - 4 (1 bit)
access : write-only

P5 : Set Output Data
bits : 5 - 5 (1 bit)
access : write-only

P6 : Set Output Data
bits : 6 - 6 (1 bit)
access : write-only

P7 : Set Output Data
bits : 7 - 7 (1 bit)
access : write-only

P8 : Set Output Data
bits : 8 - 8 (1 bit)
access : write-only

P9 : Set Output Data
bits : 9 - 9 (1 bit)
access : write-only

P10 : Set Output Data
bits : 10 - 10 (1 bit)
access : write-only

P11 : Set Output Data
bits : 11 - 11 (1 bit)
access : write-only

P12 : Set Output Data
bits : 12 - 12 (1 bit)
access : write-only

P13 : Set Output Data
bits : 13 - 13 (1 bit)
access : write-only

P14 : Set Output Data
bits : 14 - 14 (1 bit)
access : write-only

P15 : Set Output Data
bits : 15 - 15 (1 bit)
access : write-only

P16 : Set Output Data
bits : 16 - 16 (1 bit)
access : write-only

P17 : Set Output Data
bits : 17 - 17 (1 bit)
access : write-only

P18 : Set Output Data
bits : 18 - 18 (1 bit)
access : write-only

P19 : Set Output Data
bits : 19 - 19 (1 bit)
access : write-only

P20 : Set Output Data
bits : 20 - 20 (1 bit)
access : write-only

P21 : Set Output Data
bits : 21 - 21 (1 bit)
access : write-only

P22 : Set Output Data
bits : 22 - 22 (1 bit)
access : write-only

P23 : Set Output Data
bits : 23 - 23 (1 bit)
access : write-only

P24 : Set Output Data
bits : 24 - 24 (1 bit)
access : write-only

P25 : Set Output Data
bits : 25 - 25 (1 bit)
access : write-only

P26 : Set Output Data
bits : 26 - 26 (1 bit)
access : write-only

P27 : Set Output Data
bits : 27 - 27 (1 bit)
access : write-only

P28 : Set Output Data
bits : 28 - 28 (1 bit)
access : write-only

P29 : Set Output Data
bits : 29 - 29 (1 bit)
access : write-only

P30 : Set Output Data
bits : 30 - 30 (1 bit)
access : write-only

P31 : Set Output Data
bits : 31 - 31 (1 bit)
access : write-only


CODR

Clear Output Data Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CODR CODR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Set Output Data
bits : 0 - 0 (1 bit)
access : write-only

P1 : Set Output Data
bits : 1 - 1 (1 bit)
access : write-only

P2 : Set Output Data
bits : 2 - 2 (1 bit)
access : write-only

P3 : Set Output Data
bits : 3 - 3 (1 bit)
access : write-only

P4 : Set Output Data
bits : 4 - 4 (1 bit)
access : write-only

P5 : Set Output Data
bits : 5 - 5 (1 bit)
access : write-only

P6 : Set Output Data
bits : 6 - 6 (1 bit)
access : write-only

P7 : Set Output Data
bits : 7 - 7 (1 bit)
access : write-only

P8 : Set Output Data
bits : 8 - 8 (1 bit)
access : write-only

P9 : Set Output Data
bits : 9 - 9 (1 bit)
access : write-only

P10 : Set Output Data
bits : 10 - 10 (1 bit)
access : write-only

P11 : Set Output Data
bits : 11 - 11 (1 bit)
access : write-only

P12 : Set Output Data
bits : 12 - 12 (1 bit)
access : write-only

P13 : Set Output Data
bits : 13 - 13 (1 bit)
access : write-only

P14 : Set Output Data
bits : 14 - 14 (1 bit)
access : write-only

P15 : Set Output Data
bits : 15 - 15 (1 bit)
access : write-only

P16 : Set Output Data
bits : 16 - 16 (1 bit)
access : write-only

P17 : Set Output Data
bits : 17 - 17 (1 bit)
access : write-only

P18 : Set Output Data
bits : 18 - 18 (1 bit)
access : write-only

P19 : Set Output Data
bits : 19 - 19 (1 bit)
access : write-only

P20 : Set Output Data
bits : 20 - 20 (1 bit)
access : write-only

P21 : Set Output Data
bits : 21 - 21 (1 bit)
access : write-only

P22 : Set Output Data
bits : 22 - 22 (1 bit)
access : write-only

P23 : Set Output Data
bits : 23 - 23 (1 bit)
access : write-only

P24 : Set Output Data
bits : 24 - 24 (1 bit)
access : write-only

P25 : Set Output Data
bits : 25 - 25 (1 bit)
access : write-only

P26 : Set Output Data
bits : 26 - 26 (1 bit)
access : write-only

P27 : Set Output Data
bits : 27 - 27 (1 bit)
access : write-only

P28 : Set Output Data
bits : 28 - 28 (1 bit)
access : write-only

P29 : Set Output Data
bits : 29 - 29 (1 bit)
access : write-only

P30 : Set Output Data
bits : 30 - 30 (1 bit)
access : write-only

P31 : Set Output Data
bits : 31 - 31 (1 bit)
access : write-only


ODSR

Output Data Status Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODSR ODSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Data Status
bits : 0 - 0 (1 bit)
access : read-write

P1 : Output Data Status
bits : 1 - 1 (1 bit)
access : read-write

P2 : Output Data Status
bits : 2 - 2 (1 bit)
access : read-write

P3 : Output Data Status
bits : 3 - 3 (1 bit)
access : read-write

P4 : Output Data Status
bits : 4 - 4 (1 bit)
access : read-write

P5 : Output Data Status
bits : 5 - 5 (1 bit)
access : read-write

P6 : Output Data Status
bits : 6 - 6 (1 bit)
access : read-write

P7 : Output Data Status
bits : 7 - 7 (1 bit)
access : read-write

P8 : Output Data Status
bits : 8 - 8 (1 bit)
access : read-write

P9 : Output Data Status
bits : 9 - 9 (1 bit)
access : read-write

P10 : Output Data Status
bits : 10 - 10 (1 bit)
access : read-write

P11 : Output Data Status
bits : 11 - 11 (1 bit)
access : read-write

P12 : Output Data Status
bits : 12 - 12 (1 bit)
access : read-write

P13 : Output Data Status
bits : 13 - 13 (1 bit)
access : read-write

P14 : Output Data Status
bits : 14 - 14 (1 bit)
access : read-write

P15 : Output Data Status
bits : 15 - 15 (1 bit)
access : read-write

P16 : Output Data Status
bits : 16 - 16 (1 bit)
access : read-write

P17 : Output Data Status
bits : 17 - 17 (1 bit)
access : read-write

P18 : Output Data Status
bits : 18 - 18 (1 bit)
access : read-write

P19 : Output Data Status
bits : 19 - 19 (1 bit)
access : read-write

P20 : Output Data Status
bits : 20 - 20 (1 bit)
access : read-write

P21 : Output Data Status
bits : 21 - 21 (1 bit)
access : read-write

P22 : Output Data Status
bits : 22 - 22 (1 bit)
access : read-write

P23 : Output Data Status
bits : 23 - 23 (1 bit)
access : read-write

P24 : Output Data Status
bits : 24 - 24 (1 bit)
access : read-write

P25 : Output Data Status
bits : 25 - 25 (1 bit)
access : read-write

P26 : Output Data Status
bits : 26 - 26 (1 bit)
access : read-write

P27 : Output Data Status
bits : 27 - 27 (1 bit)
access : read-write

P28 : Output Data Status
bits : 28 - 28 (1 bit)
access : read-write

P29 : Output Data Status
bits : 29 - 29 (1 bit)
access : read-write

P30 : Output Data Status
bits : 30 - 30 (1 bit)
access : read-write

P31 : Output Data Status
bits : 31 - 31 (1 bit)
access : read-write


PDSR

Pin Data Status Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PDSR PDSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Data Status
bits : 0 - 0 (1 bit)
access : read-only

P1 : Output Data Status
bits : 1 - 1 (1 bit)
access : read-only

P2 : Output Data Status
bits : 2 - 2 (1 bit)
access : read-only

P3 : Output Data Status
bits : 3 - 3 (1 bit)
access : read-only

P4 : Output Data Status
bits : 4 - 4 (1 bit)
access : read-only

P5 : Output Data Status
bits : 5 - 5 (1 bit)
access : read-only

P6 : Output Data Status
bits : 6 - 6 (1 bit)
access : read-only

P7 : Output Data Status
bits : 7 - 7 (1 bit)
access : read-only

P8 : Output Data Status
bits : 8 - 8 (1 bit)
access : read-only

P9 : Output Data Status
bits : 9 - 9 (1 bit)
access : read-only

P10 : Output Data Status
bits : 10 - 10 (1 bit)
access : read-only

P11 : Output Data Status
bits : 11 - 11 (1 bit)
access : read-only

P12 : Output Data Status
bits : 12 - 12 (1 bit)
access : read-only

P13 : Output Data Status
bits : 13 - 13 (1 bit)
access : read-only

P14 : Output Data Status
bits : 14 - 14 (1 bit)
access : read-only

P15 : Output Data Status
bits : 15 - 15 (1 bit)
access : read-only

P16 : Output Data Status
bits : 16 - 16 (1 bit)
access : read-only

P17 : Output Data Status
bits : 17 - 17 (1 bit)
access : read-only

P18 : Output Data Status
bits : 18 - 18 (1 bit)
access : read-only

P19 : Output Data Status
bits : 19 - 19 (1 bit)
access : read-only

P20 : Output Data Status
bits : 20 - 20 (1 bit)
access : read-only

P21 : Output Data Status
bits : 21 - 21 (1 bit)
access : read-only

P22 : Output Data Status
bits : 22 - 22 (1 bit)
access : read-only

P23 : Output Data Status
bits : 23 - 23 (1 bit)
access : read-only

P24 : Output Data Status
bits : 24 - 24 (1 bit)
access : read-only

P25 : Output Data Status
bits : 25 - 25 (1 bit)
access : read-only

P26 : Output Data Status
bits : 26 - 26 (1 bit)
access : read-only

P27 : Output Data Status
bits : 27 - 27 (1 bit)
access : read-only

P28 : Output Data Status
bits : 28 - 28 (1 bit)
access : read-only

P29 : Output Data Status
bits : 29 - 29 (1 bit)
access : read-only

P30 : Output Data Status
bits : 30 - 30 (1 bit)
access : read-only

P31 : Output Data Status
bits : 31 - 31 (1 bit)
access : read-only


PDR

PIO Disable Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PDR PDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : PIO Disable
bits : 0 - 0 (1 bit)
access : write-only

P1 : PIO Disable
bits : 1 - 1 (1 bit)
access : write-only

P2 : PIO Disable
bits : 2 - 2 (1 bit)
access : write-only

P3 : PIO Disable
bits : 3 - 3 (1 bit)
access : write-only

P4 : PIO Disable
bits : 4 - 4 (1 bit)
access : write-only

P5 : PIO Disable
bits : 5 - 5 (1 bit)
access : write-only

P6 : PIO Disable
bits : 6 - 6 (1 bit)
access : write-only

P7 : PIO Disable
bits : 7 - 7 (1 bit)
access : write-only

P8 : PIO Disable
bits : 8 - 8 (1 bit)
access : write-only

P9 : PIO Disable
bits : 9 - 9 (1 bit)
access : write-only

P10 : PIO Disable
bits : 10 - 10 (1 bit)
access : write-only

P11 : PIO Disable
bits : 11 - 11 (1 bit)
access : write-only

P12 : PIO Disable
bits : 12 - 12 (1 bit)
access : write-only

P13 : PIO Disable
bits : 13 - 13 (1 bit)
access : write-only

P14 : PIO Disable
bits : 14 - 14 (1 bit)
access : write-only

P15 : PIO Disable
bits : 15 - 15 (1 bit)
access : write-only

P16 : PIO Disable
bits : 16 - 16 (1 bit)
access : write-only

P17 : PIO Disable
bits : 17 - 17 (1 bit)
access : write-only

P18 : PIO Disable
bits : 18 - 18 (1 bit)
access : write-only

P19 : PIO Disable
bits : 19 - 19 (1 bit)
access : write-only

P20 : PIO Disable
bits : 20 - 20 (1 bit)
access : write-only

P21 : PIO Disable
bits : 21 - 21 (1 bit)
access : write-only

P22 : PIO Disable
bits : 22 - 22 (1 bit)
access : write-only

P23 : PIO Disable
bits : 23 - 23 (1 bit)
access : write-only

P24 : PIO Disable
bits : 24 - 24 (1 bit)
access : write-only

P25 : PIO Disable
bits : 25 - 25 (1 bit)
access : write-only

P26 : PIO Disable
bits : 26 - 26 (1 bit)
access : write-only

P27 : PIO Disable
bits : 27 - 27 (1 bit)
access : write-only

P28 : PIO Disable
bits : 28 - 28 (1 bit)
access : write-only

P29 : PIO Disable
bits : 29 - 29 (1 bit)
access : write-only

P30 : PIO Disable
bits : 30 - 30 (1 bit)
access : write-only

P31 : PIO Disable
bits : 31 - 31 (1 bit)
access : write-only


IER

Interrupt Enable Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IER IER write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Input Change Interrupt Enable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Input Change Interrupt Enable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Input Change Interrupt Enable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Input Change Interrupt Enable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Input Change Interrupt Enable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Input Change Interrupt Enable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Input Change Interrupt Enable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Input Change Interrupt Enable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Input Change Interrupt Enable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Input Change Interrupt Enable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Input Change Interrupt Enable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Input Change Interrupt Enable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Input Change Interrupt Enable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Input Change Interrupt Enable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Input Change Interrupt Enable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Input Change Interrupt Enable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Input Change Interrupt Enable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Input Change Interrupt Enable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Input Change Interrupt Enable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Input Change Interrupt Enable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Input Change Interrupt Enable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Input Change Interrupt Enable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Input Change Interrupt Enable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Input Change Interrupt Enable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Input Change Interrupt Enable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Input Change Interrupt Enable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Input Change Interrupt Enable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Input Change Interrupt Enable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Input Change Interrupt Enable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Input Change Interrupt Enable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Input Change Interrupt Enable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Input Change Interrupt Enable
bits : 31 - 31 (1 bit)
access : write-only


IDR

Interrupt Disable Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IDR IDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Input Change Interrupt Disable
bits : 0 - 0 (1 bit)
access : write-only

P1 : Input Change Interrupt Disable
bits : 1 - 1 (1 bit)
access : write-only

P2 : Input Change Interrupt Disable
bits : 2 - 2 (1 bit)
access : write-only

P3 : Input Change Interrupt Disable
bits : 3 - 3 (1 bit)
access : write-only

P4 : Input Change Interrupt Disable
bits : 4 - 4 (1 bit)
access : write-only

P5 : Input Change Interrupt Disable
bits : 5 - 5 (1 bit)
access : write-only

P6 : Input Change Interrupt Disable
bits : 6 - 6 (1 bit)
access : write-only

P7 : Input Change Interrupt Disable
bits : 7 - 7 (1 bit)
access : write-only

P8 : Input Change Interrupt Disable
bits : 8 - 8 (1 bit)
access : write-only

P9 : Input Change Interrupt Disable
bits : 9 - 9 (1 bit)
access : write-only

P10 : Input Change Interrupt Disable
bits : 10 - 10 (1 bit)
access : write-only

P11 : Input Change Interrupt Disable
bits : 11 - 11 (1 bit)
access : write-only

P12 : Input Change Interrupt Disable
bits : 12 - 12 (1 bit)
access : write-only

P13 : Input Change Interrupt Disable
bits : 13 - 13 (1 bit)
access : write-only

P14 : Input Change Interrupt Disable
bits : 14 - 14 (1 bit)
access : write-only

P15 : Input Change Interrupt Disable
bits : 15 - 15 (1 bit)
access : write-only

P16 : Input Change Interrupt Disable
bits : 16 - 16 (1 bit)
access : write-only

P17 : Input Change Interrupt Disable
bits : 17 - 17 (1 bit)
access : write-only

P18 : Input Change Interrupt Disable
bits : 18 - 18 (1 bit)
access : write-only

P19 : Input Change Interrupt Disable
bits : 19 - 19 (1 bit)
access : write-only

P20 : Input Change Interrupt Disable
bits : 20 - 20 (1 bit)
access : write-only

P21 : Input Change Interrupt Disable
bits : 21 - 21 (1 bit)
access : write-only

P22 : Input Change Interrupt Disable
bits : 22 - 22 (1 bit)
access : write-only

P23 : Input Change Interrupt Disable
bits : 23 - 23 (1 bit)
access : write-only

P24 : Input Change Interrupt Disable
bits : 24 - 24 (1 bit)
access : write-only

P25 : Input Change Interrupt Disable
bits : 25 - 25 (1 bit)
access : write-only

P26 : Input Change Interrupt Disable
bits : 26 - 26 (1 bit)
access : write-only

P27 : Input Change Interrupt Disable
bits : 27 - 27 (1 bit)
access : write-only

P28 : Input Change Interrupt Disable
bits : 28 - 28 (1 bit)
access : write-only

P29 : Input Change Interrupt Disable
bits : 29 - 29 (1 bit)
access : write-only

P30 : Input Change Interrupt Disable
bits : 30 - 30 (1 bit)
access : write-only

P31 : Input Change Interrupt Disable
bits : 31 - 31 (1 bit)
access : write-only


IMR

Interrupt Mask Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IMR IMR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Input Change Interrupt Mask
bits : 0 - 0 (1 bit)
access : read-only

P1 : Input Change Interrupt Mask
bits : 1 - 1 (1 bit)
access : read-only

P2 : Input Change Interrupt Mask
bits : 2 - 2 (1 bit)
access : read-only

P3 : Input Change Interrupt Mask
bits : 3 - 3 (1 bit)
access : read-only

P4 : Input Change Interrupt Mask
bits : 4 - 4 (1 bit)
access : read-only

P5 : Input Change Interrupt Mask
bits : 5 - 5 (1 bit)
access : read-only

P6 : Input Change Interrupt Mask
bits : 6 - 6 (1 bit)
access : read-only

P7 : Input Change Interrupt Mask
bits : 7 - 7 (1 bit)
access : read-only

P8 : Input Change Interrupt Mask
bits : 8 - 8 (1 bit)
access : read-only

P9 : Input Change Interrupt Mask
bits : 9 - 9 (1 bit)
access : read-only

P10 : Input Change Interrupt Mask
bits : 10 - 10 (1 bit)
access : read-only

P11 : Input Change Interrupt Mask
bits : 11 - 11 (1 bit)
access : read-only

P12 : Input Change Interrupt Mask
bits : 12 - 12 (1 bit)
access : read-only

P13 : Input Change Interrupt Mask
bits : 13 - 13 (1 bit)
access : read-only

P14 : Input Change Interrupt Mask
bits : 14 - 14 (1 bit)
access : read-only

P15 : Input Change Interrupt Mask
bits : 15 - 15 (1 bit)
access : read-only

P16 : Input Change Interrupt Mask
bits : 16 - 16 (1 bit)
access : read-only

P17 : Input Change Interrupt Mask
bits : 17 - 17 (1 bit)
access : read-only

P18 : Input Change Interrupt Mask
bits : 18 - 18 (1 bit)
access : read-only

P19 : Input Change Interrupt Mask
bits : 19 - 19 (1 bit)
access : read-only

P20 : Input Change Interrupt Mask
bits : 20 - 20 (1 bit)
access : read-only

P21 : Input Change Interrupt Mask
bits : 21 - 21 (1 bit)
access : read-only

P22 : Input Change Interrupt Mask
bits : 22 - 22 (1 bit)
access : read-only

P23 : Input Change Interrupt Mask
bits : 23 - 23 (1 bit)
access : read-only

P24 : Input Change Interrupt Mask
bits : 24 - 24 (1 bit)
access : read-only

P25 : Input Change Interrupt Mask
bits : 25 - 25 (1 bit)
access : read-only

P26 : Input Change Interrupt Mask
bits : 26 - 26 (1 bit)
access : read-only

P27 : Input Change Interrupt Mask
bits : 27 - 27 (1 bit)
access : read-only

P28 : Input Change Interrupt Mask
bits : 28 - 28 (1 bit)
access : read-only

P29 : Input Change Interrupt Mask
bits : 29 - 29 (1 bit)
access : read-only

P30 : Input Change Interrupt Mask
bits : 30 - 30 (1 bit)
access : read-only

P31 : Input Change Interrupt Mask
bits : 31 - 31 (1 bit)
access : read-only


ISR

Interrupt Status Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ISR ISR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Input Change Interrupt Status
bits : 0 - 0 (1 bit)
access : read-only

P1 : Input Change Interrupt Status
bits : 1 - 1 (1 bit)
access : read-only

P2 : Input Change Interrupt Status
bits : 2 - 2 (1 bit)
access : read-only

P3 : Input Change Interrupt Status
bits : 3 - 3 (1 bit)
access : read-only

P4 : Input Change Interrupt Status
bits : 4 - 4 (1 bit)
access : read-only

P5 : Input Change Interrupt Status
bits : 5 - 5 (1 bit)
access : read-only

P6 : Input Change Interrupt Status
bits : 6 - 6 (1 bit)
access : read-only

P7 : Input Change Interrupt Status
bits : 7 - 7 (1 bit)
access : read-only

P8 : Input Change Interrupt Status
bits : 8 - 8 (1 bit)
access : read-only

P9 : Input Change Interrupt Status
bits : 9 - 9 (1 bit)
access : read-only

P10 : Input Change Interrupt Status
bits : 10 - 10 (1 bit)
access : read-only

P11 : Input Change Interrupt Status
bits : 11 - 11 (1 bit)
access : read-only

P12 : Input Change Interrupt Status
bits : 12 - 12 (1 bit)
access : read-only

P13 : Input Change Interrupt Status
bits : 13 - 13 (1 bit)
access : read-only

P14 : Input Change Interrupt Status
bits : 14 - 14 (1 bit)
access : read-only

P15 : Input Change Interrupt Status
bits : 15 - 15 (1 bit)
access : read-only

P16 : Input Change Interrupt Status
bits : 16 - 16 (1 bit)
access : read-only

P17 : Input Change Interrupt Status
bits : 17 - 17 (1 bit)
access : read-only

P18 : Input Change Interrupt Status
bits : 18 - 18 (1 bit)
access : read-only

P19 : Input Change Interrupt Status
bits : 19 - 19 (1 bit)
access : read-only

P20 : Input Change Interrupt Status
bits : 20 - 20 (1 bit)
access : read-only

P21 : Input Change Interrupt Status
bits : 21 - 21 (1 bit)
access : read-only

P22 : Input Change Interrupt Status
bits : 22 - 22 (1 bit)
access : read-only

P23 : Input Change Interrupt Status
bits : 23 - 23 (1 bit)
access : read-only

P24 : Input Change Interrupt Status
bits : 24 - 24 (1 bit)
access : read-only

P25 : Input Change Interrupt Status
bits : 25 - 25 (1 bit)
access : read-only

P26 : Input Change Interrupt Status
bits : 26 - 26 (1 bit)
access : read-only

P27 : Input Change Interrupt Status
bits : 27 - 27 (1 bit)
access : read-only

P28 : Input Change Interrupt Status
bits : 28 - 28 (1 bit)
access : read-only

P29 : Input Change Interrupt Status
bits : 29 - 29 (1 bit)
access : read-only

P30 : Input Change Interrupt Status
bits : 30 - 30 (1 bit)
access : read-only

P31 : Input Change Interrupt Status
bits : 31 - 31 (1 bit)
access : read-only


MDER

Multi-driver Enable Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

MDER MDER write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Multi Drive Enable.
bits : 0 - 0 (1 bit)
access : write-only

P1 : Multi Drive Enable.
bits : 1 - 1 (1 bit)
access : write-only

P2 : Multi Drive Enable.
bits : 2 - 2 (1 bit)
access : write-only

P3 : Multi Drive Enable.
bits : 3 - 3 (1 bit)
access : write-only

P4 : Multi Drive Enable.
bits : 4 - 4 (1 bit)
access : write-only

P5 : Multi Drive Enable.
bits : 5 - 5 (1 bit)
access : write-only

P6 : Multi Drive Enable.
bits : 6 - 6 (1 bit)
access : write-only

P7 : Multi Drive Enable.
bits : 7 - 7 (1 bit)
access : write-only

P8 : Multi Drive Enable.
bits : 8 - 8 (1 bit)
access : write-only

P9 : Multi Drive Enable.
bits : 9 - 9 (1 bit)
access : write-only

P10 : Multi Drive Enable.
bits : 10 - 10 (1 bit)
access : write-only

P11 : Multi Drive Enable.
bits : 11 - 11 (1 bit)
access : write-only

P12 : Multi Drive Enable.
bits : 12 - 12 (1 bit)
access : write-only

P13 : Multi Drive Enable.
bits : 13 - 13 (1 bit)
access : write-only

P14 : Multi Drive Enable.
bits : 14 - 14 (1 bit)
access : write-only

P15 : Multi Drive Enable.
bits : 15 - 15 (1 bit)
access : write-only

P16 : Multi Drive Enable.
bits : 16 - 16 (1 bit)
access : write-only

P17 : Multi Drive Enable.
bits : 17 - 17 (1 bit)
access : write-only

P18 : Multi Drive Enable.
bits : 18 - 18 (1 bit)
access : write-only

P19 : Multi Drive Enable.
bits : 19 - 19 (1 bit)
access : write-only

P20 : Multi Drive Enable.
bits : 20 - 20 (1 bit)
access : write-only

P21 : Multi Drive Enable.
bits : 21 - 21 (1 bit)
access : write-only

P22 : Multi Drive Enable.
bits : 22 - 22 (1 bit)
access : write-only

P23 : Multi Drive Enable.
bits : 23 - 23 (1 bit)
access : write-only

P24 : Multi Drive Enable.
bits : 24 - 24 (1 bit)
access : write-only

P25 : Multi Drive Enable.
bits : 25 - 25 (1 bit)
access : write-only

P26 : Multi Drive Enable.
bits : 26 - 26 (1 bit)
access : write-only

P27 : Multi Drive Enable.
bits : 27 - 27 (1 bit)
access : write-only

P28 : Multi Drive Enable.
bits : 28 - 28 (1 bit)
access : write-only

P29 : Multi Drive Enable.
bits : 29 - 29 (1 bit)
access : write-only

P30 : Multi Drive Enable.
bits : 30 - 30 (1 bit)
access : write-only

P31 : Multi Drive Enable.
bits : 31 - 31 (1 bit)
access : write-only


MDDR

Multi-driver Disable Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

MDDR MDDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Multi Drive Disable.
bits : 0 - 0 (1 bit)
access : write-only

P1 : Multi Drive Disable.
bits : 1 - 1 (1 bit)
access : write-only

P2 : Multi Drive Disable.
bits : 2 - 2 (1 bit)
access : write-only

P3 : Multi Drive Disable.
bits : 3 - 3 (1 bit)
access : write-only

P4 : Multi Drive Disable.
bits : 4 - 4 (1 bit)
access : write-only

P5 : Multi Drive Disable.
bits : 5 - 5 (1 bit)
access : write-only

P6 : Multi Drive Disable.
bits : 6 - 6 (1 bit)
access : write-only

P7 : Multi Drive Disable.
bits : 7 - 7 (1 bit)
access : write-only

P8 : Multi Drive Disable.
bits : 8 - 8 (1 bit)
access : write-only

P9 : Multi Drive Disable.
bits : 9 - 9 (1 bit)
access : write-only

P10 : Multi Drive Disable.
bits : 10 - 10 (1 bit)
access : write-only

P11 : Multi Drive Disable.
bits : 11 - 11 (1 bit)
access : write-only

P12 : Multi Drive Disable.
bits : 12 - 12 (1 bit)
access : write-only

P13 : Multi Drive Disable.
bits : 13 - 13 (1 bit)
access : write-only

P14 : Multi Drive Disable.
bits : 14 - 14 (1 bit)
access : write-only

P15 : Multi Drive Disable.
bits : 15 - 15 (1 bit)
access : write-only

P16 : Multi Drive Disable.
bits : 16 - 16 (1 bit)
access : write-only

P17 : Multi Drive Disable.
bits : 17 - 17 (1 bit)
access : write-only

P18 : Multi Drive Disable.
bits : 18 - 18 (1 bit)
access : write-only

P19 : Multi Drive Disable.
bits : 19 - 19 (1 bit)
access : write-only

P20 : Multi Drive Disable.
bits : 20 - 20 (1 bit)
access : write-only

P21 : Multi Drive Disable.
bits : 21 - 21 (1 bit)
access : write-only

P22 : Multi Drive Disable.
bits : 22 - 22 (1 bit)
access : write-only

P23 : Multi Drive Disable.
bits : 23 - 23 (1 bit)
access : write-only

P24 : Multi Drive Disable.
bits : 24 - 24 (1 bit)
access : write-only

P25 : Multi Drive Disable.
bits : 25 - 25 (1 bit)
access : write-only

P26 : Multi Drive Disable.
bits : 26 - 26 (1 bit)
access : write-only

P27 : Multi Drive Disable.
bits : 27 - 27 (1 bit)
access : write-only

P28 : Multi Drive Disable.
bits : 28 - 28 (1 bit)
access : write-only

P29 : Multi Drive Disable.
bits : 29 - 29 (1 bit)
access : write-only

P30 : Multi Drive Disable.
bits : 30 - 30 (1 bit)
access : write-only

P31 : Multi Drive Disable.
bits : 31 - 31 (1 bit)
access : write-only


MDSR

Multi-driver Status Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

MDSR MDSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Multi Drive Status.
bits : 0 - 0 (1 bit)
access : read-only

P1 : Multi Drive Status.
bits : 1 - 1 (1 bit)
access : read-only

P2 : Multi Drive Status.
bits : 2 - 2 (1 bit)
access : read-only

P3 : Multi Drive Status.
bits : 3 - 3 (1 bit)
access : read-only

P4 : Multi Drive Status.
bits : 4 - 4 (1 bit)
access : read-only

P5 : Multi Drive Status.
bits : 5 - 5 (1 bit)
access : read-only

P6 : Multi Drive Status.
bits : 6 - 6 (1 bit)
access : read-only

P7 : Multi Drive Status.
bits : 7 - 7 (1 bit)
access : read-only

P8 : Multi Drive Status.
bits : 8 - 8 (1 bit)
access : read-only

P9 : Multi Drive Status.
bits : 9 - 9 (1 bit)
access : read-only

P10 : Multi Drive Status.
bits : 10 - 10 (1 bit)
access : read-only

P11 : Multi Drive Status.
bits : 11 - 11 (1 bit)
access : read-only

P12 : Multi Drive Status.
bits : 12 - 12 (1 bit)
access : read-only

P13 : Multi Drive Status.
bits : 13 - 13 (1 bit)
access : read-only

P14 : Multi Drive Status.
bits : 14 - 14 (1 bit)
access : read-only

P15 : Multi Drive Status.
bits : 15 - 15 (1 bit)
access : read-only

P16 : Multi Drive Status.
bits : 16 - 16 (1 bit)
access : read-only

P17 : Multi Drive Status.
bits : 17 - 17 (1 bit)
access : read-only

P18 : Multi Drive Status.
bits : 18 - 18 (1 bit)
access : read-only

P19 : Multi Drive Status.
bits : 19 - 19 (1 bit)
access : read-only

P20 : Multi Drive Status.
bits : 20 - 20 (1 bit)
access : read-only

P21 : Multi Drive Status.
bits : 21 - 21 (1 bit)
access : read-only

P22 : Multi Drive Status.
bits : 22 - 22 (1 bit)
access : read-only

P23 : Multi Drive Status.
bits : 23 - 23 (1 bit)
access : read-only

P24 : Multi Drive Status.
bits : 24 - 24 (1 bit)
access : read-only

P25 : Multi Drive Status.
bits : 25 - 25 (1 bit)
access : read-only

P26 : Multi Drive Status.
bits : 26 - 26 (1 bit)
access : read-only

P27 : Multi Drive Status.
bits : 27 - 27 (1 bit)
access : read-only

P28 : Multi Drive Status.
bits : 28 - 28 (1 bit)
access : read-only

P29 : Multi Drive Status.
bits : 29 - 29 (1 bit)
access : read-only

P30 : Multi Drive Status.
bits : 30 - 30 (1 bit)
access : read-only

P31 : Multi Drive Status.
bits : 31 - 31 (1 bit)
access : read-only


PUDR

Pull-up Disable Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PUDR PUDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull Up Disable.
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull Up Disable.
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull Up Disable.
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull Up Disable.
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull Up Disable.
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull Up Disable.
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull Up Disable.
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull Up Disable.
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull Up Disable.
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull Up Disable.
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull Up Disable.
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull Up Disable.
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull Up Disable.
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull Up Disable.
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull Up Disable.
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull Up Disable.
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull Up Disable.
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull Up Disable.
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull Up Disable.
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull Up Disable.
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull Up Disable.
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull Up Disable.
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull Up Disable.
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull Up Disable.
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull Up Disable.
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull Up Disable.
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull Up Disable.
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull Up Disable.
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull Up Disable.
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull Up Disable.
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull Up Disable.
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull Up Disable.
bits : 31 - 31 (1 bit)
access : write-only


PUER

Pull-up Enable Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

PUER PUER write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull Up Enable.
bits : 0 - 0 (1 bit)
access : write-only

P1 : Pull Up Enable.
bits : 1 - 1 (1 bit)
access : write-only

P2 : Pull Up Enable.
bits : 2 - 2 (1 bit)
access : write-only

P3 : Pull Up Enable.
bits : 3 - 3 (1 bit)
access : write-only

P4 : Pull Up Enable.
bits : 4 - 4 (1 bit)
access : write-only

P5 : Pull Up Enable.
bits : 5 - 5 (1 bit)
access : write-only

P6 : Pull Up Enable.
bits : 6 - 6 (1 bit)
access : write-only

P7 : Pull Up Enable.
bits : 7 - 7 (1 bit)
access : write-only

P8 : Pull Up Enable.
bits : 8 - 8 (1 bit)
access : write-only

P9 : Pull Up Enable.
bits : 9 - 9 (1 bit)
access : write-only

P10 : Pull Up Enable.
bits : 10 - 10 (1 bit)
access : write-only

P11 : Pull Up Enable.
bits : 11 - 11 (1 bit)
access : write-only

P12 : Pull Up Enable.
bits : 12 - 12 (1 bit)
access : write-only

P13 : Pull Up Enable.
bits : 13 - 13 (1 bit)
access : write-only

P14 : Pull Up Enable.
bits : 14 - 14 (1 bit)
access : write-only

P15 : Pull Up Enable.
bits : 15 - 15 (1 bit)
access : write-only

P16 : Pull Up Enable.
bits : 16 - 16 (1 bit)
access : write-only

P17 : Pull Up Enable.
bits : 17 - 17 (1 bit)
access : write-only

P18 : Pull Up Enable.
bits : 18 - 18 (1 bit)
access : write-only

P19 : Pull Up Enable.
bits : 19 - 19 (1 bit)
access : write-only

P20 : Pull Up Enable.
bits : 20 - 20 (1 bit)
access : write-only

P21 : Pull Up Enable.
bits : 21 - 21 (1 bit)
access : write-only

P22 : Pull Up Enable.
bits : 22 - 22 (1 bit)
access : write-only

P23 : Pull Up Enable.
bits : 23 - 23 (1 bit)
access : write-only

P24 : Pull Up Enable.
bits : 24 - 24 (1 bit)
access : write-only

P25 : Pull Up Enable.
bits : 25 - 25 (1 bit)
access : write-only

P26 : Pull Up Enable.
bits : 26 - 26 (1 bit)
access : write-only

P27 : Pull Up Enable.
bits : 27 - 27 (1 bit)
access : write-only

P28 : Pull Up Enable.
bits : 28 - 28 (1 bit)
access : write-only

P29 : Pull Up Enable.
bits : 29 - 29 (1 bit)
access : write-only

P30 : Pull Up Enable.
bits : 30 - 30 (1 bit)
access : write-only

P31 : Pull Up Enable.
bits : 31 - 31 (1 bit)
access : write-only


PUSR

Pad Pull-up Status Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PUSR PUSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Pull Up Status.
bits : 0 - 0 (1 bit)
access : read-only

P1 : Pull Up Status.
bits : 1 - 1 (1 bit)
access : read-only

P2 : Pull Up Status.
bits : 2 - 2 (1 bit)
access : read-only

P3 : Pull Up Status.
bits : 3 - 3 (1 bit)
access : read-only

P4 : Pull Up Status.
bits : 4 - 4 (1 bit)
access : read-only

P5 : Pull Up Status.
bits : 5 - 5 (1 bit)
access : read-only

P6 : Pull Up Status.
bits : 6 - 6 (1 bit)
access : read-only

P7 : Pull Up Status.
bits : 7 - 7 (1 bit)
access : read-only

P8 : Pull Up Status.
bits : 8 - 8 (1 bit)
access : read-only

P9 : Pull Up Status.
bits : 9 - 9 (1 bit)
access : read-only

P10 : Pull Up Status.
bits : 10 - 10 (1 bit)
access : read-only

P11 : Pull Up Status.
bits : 11 - 11 (1 bit)
access : read-only

P12 : Pull Up Status.
bits : 12 - 12 (1 bit)
access : read-only

P13 : Pull Up Status.
bits : 13 - 13 (1 bit)
access : read-only

P14 : Pull Up Status.
bits : 14 - 14 (1 bit)
access : read-only

P15 : Pull Up Status.
bits : 15 - 15 (1 bit)
access : read-only

P16 : Pull Up Status.
bits : 16 - 16 (1 bit)
access : read-only

P17 : Pull Up Status.
bits : 17 - 17 (1 bit)
access : read-only

P18 : Pull Up Status.
bits : 18 - 18 (1 bit)
access : read-only

P19 : Pull Up Status.
bits : 19 - 19 (1 bit)
access : read-only

P20 : Pull Up Status.
bits : 20 - 20 (1 bit)
access : read-only

P21 : Pull Up Status.
bits : 21 - 21 (1 bit)
access : read-only

P22 : Pull Up Status.
bits : 22 - 22 (1 bit)
access : read-only

P23 : Pull Up Status.
bits : 23 - 23 (1 bit)
access : read-only

P24 : Pull Up Status.
bits : 24 - 24 (1 bit)
access : read-only

P25 : Pull Up Status.
bits : 25 - 25 (1 bit)
access : read-only

P26 : Pull Up Status.
bits : 26 - 26 (1 bit)
access : read-only

P27 : Pull Up Status.
bits : 27 - 27 (1 bit)
access : read-only

P28 : Pull Up Status.
bits : 28 - 28 (1 bit)
access : read-only

P29 : Pull Up Status.
bits : 29 - 29 (1 bit)
access : read-only

P30 : Pull Up Status.
bits : 30 - 30 (1 bit)
access : read-only

P31 : Pull Up Status.
bits : 31 - 31 (1 bit)
access : read-only


ASR

Peripheral A Select Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

ASR ASR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral A Select.
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral A Select.
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral A Select.
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral A Select.
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral A Select.
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral A Select.
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral A Select.
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral A Select.
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral A Select.
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral A Select.
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral A Select.
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral A Select.
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral A Select.
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral A Select.
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral A Select.
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral A Select.
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral A Select.
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral A Select.
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral A Select.
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral A Select.
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral A Select.
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral A Select.
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral A Select.
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral A Select.
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral A Select.
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral A Select.
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral A Select.
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral A Select.
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral A Select.
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral A Select.
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral A Select.
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral A Select.
bits : 31 - 31 (1 bit)
access : write-only


BSR

Peripheral B Select Register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BSR BSR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral B Select.
bits : 0 - 0 (1 bit)
access : write-only

P1 : Peripheral B Select.
bits : 1 - 1 (1 bit)
access : write-only

P2 : Peripheral B Select.
bits : 2 - 2 (1 bit)
access : write-only

P3 : Peripheral B Select.
bits : 3 - 3 (1 bit)
access : write-only

P4 : Peripheral B Select.
bits : 4 - 4 (1 bit)
access : write-only

P5 : Peripheral B Select.
bits : 5 - 5 (1 bit)
access : write-only

P6 : Peripheral B Select.
bits : 6 - 6 (1 bit)
access : write-only

P7 : Peripheral B Select.
bits : 7 - 7 (1 bit)
access : write-only

P8 : Peripheral B Select.
bits : 8 - 8 (1 bit)
access : write-only

P9 : Peripheral B Select.
bits : 9 - 9 (1 bit)
access : write-only

P10 : Peripheral B Select.
bits : 10 - 10 (1 bit)
access : write-only

P11 : Peripheral B Select.
bits : 11 - 11 (1 bit)
access : write-only

P12 : Peripheral B Select.
bits : 12 - 12 (1 bit)
access : write-only

P13 : Peripheral B Select.
bits : 13 - 13 (1 bit)
access : write-only

P14 : Peripheral B Select.
bits : 14 - 14 (1 bit)
access : write-only

P15 : Peripheral B Select.
bits : 15 - 15 (1 bit)
access : write-only

P16 : Peripheral B Select.
bits : 16 - 16 (1 bit)
access : write-only

P17 : Peripheral B Select.
bits : 17 - 17 (1 bit)
access : write-only

P18 : Peripheral B Select.
bits : 18 - 18 (1 bit)
access : write-only

P19 : Peripheral B Select.
bits : 19 - 19 (1 bit)
access : write-only

P20 : Peripheral B Select.
bits : 20 - 20 (1 bit)
access : write-only

P21 : Peripheral B Select.
bits : 21 - 21 (1 bit)
access : write-only

P22 : Peripheral B Select.
bits : 22 - 22 (1 bit)
access : write-only

P23 : Peripheral B Select.
bits : 23 - 23 (1 bit)
access : write-only

P24 : Peripheral B Select.
bits : 24 - 24 (1 bit)
access : write-only

P25 : Peripheral B Select.
bits : 25 - 25 (1 bit)
access : write-only

P26 : Peripheral B Select.
bits : 26 - 26 (1 bit)
access : write-only

P27 : Peripheral B Select.
bits : 27 - 27 (1 bit)
access : write-only

P28 : Peripheral B Select.
bits : 28 - 28 (1 bit)
access : write-only

P29 : Peripheral B Select.
bits : 29 - 29 (1 bit)
access : write-only

P30 : Peripheral B Select.
bits : 30 - 30 (1 bit)
access : write-only

P31 : Peripheral B Select.
bits : 31 - 31 (1 bit)
access : write-only


ABSR

AB Status Register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ABSR ABSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Peripheral A B Status.
bits : 0 - 0 (1 bit)
access : read-only

P1 : Peripheral A B Status.
bits : 1 - 1 (1 bit)
access : read-only

P2 : Peripheral A B Status.
bits : 2 - 2 (1 bit)
access : read-only

P3 : Peripheral A B Status.
bits : 3 - 3 (1 bit)
access : read-only

P4 : Peripheral A B Status.
bits : 4 - 4 (1 bit)
access : read-only

P5 : Peripheral A B Status.
bits : 5 - 5 (1 bit)
access : read-only

P6 : Peripheral A B Status.
bits : 6 - 6 (1 bit)
access : read-only

P7 : Peripheral A B Status.
bits : 7 - 7 (1 bit)
access : read-only

P8 : Peripheral A B Status.
bits : 8 - 8 (1 bit)
access : read-only

P9 : Peripheral A B Status.
bits : 9 - 9 (1 bit)
access : read-only

P10 : Peripheral A B Status.
bits : 10 - 10 (1 bit)
access : read-only

P11 : Peripheral A B Status.
bits : 11 - 11 (1 bit)
access : read-only

P12 : Peripheral A B Status.
bits : 12 - 12 (1 bit)
access : read-only

P13 : Peripheral A B Status.
bits : 13 - 13 (1 bit)
access : read-only

P14 : Peripheral A B Status.
bits : 14 - 14 (1 bit)
access : read-only

P15 : Peripheral A B Status.
bits : 15 - 15 (1 bit)
access : read-only

P16 : Peripheral A B Status.
bits : 16 - 16 (1 bit)
access : read-only

P17 : Peripheral A B Status.
bits : 17 - 17 (1 bit)
access : read-only

P18 : Peripheral A B Status.
bits : 18 - 18 (1 bit)
access : read-only

P19 : Peripheral A B Status.
bits : 19 - 19 (1 bit)
access : read-only

P20 : Peripheral A B Status.
bits : 20 - 20 (1 bit)
access : read-only

P21 : Peripheral A B Status.
bits : 21 - 21 (1 bit)
access : read-only

P22 : Peripheral A B Status.
bits : 22 - 22 (1 bit)
access : read-only

P23 : Peripheral A B Status.
bits : 23 - 23 (1 bit)
access : read-only

P24 : Peripheral A B Status.
bits : 24 - 24 (1 bit)
access : read-only

P25 : Peripheral A B Status.
bits : 25 - 25 (1 bit)
access : read-only

P26 : Peripheral A B Status.
bits : 26 - 26 (1 bit)
access : read-only

P27 : Peripheral A B Status.
bits : 27 - 27 (1 bit)
access : read-only

P28 : Peripheral A B Status.
bits : 28 - 28 (1 bit)
access : read-only

P29 : Peripheral A B Status.
bits : 29 - 29 (1 bit)
access : read-only

P30 : Peripheral A B Status.
bits : 30 - 30 (1 bit)
access : read-only

P31 : Peripheral A B Status.
bits : 31 - 31 (1 bit)
access : read-only


PSR

PIO Status Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PSR PSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : PIO Status
bits : 0 - 0 (1 bit)
access : read-only

P1 : PIO Status
bits : 1 - 1 (1 bit)
access : read-only

P2 : PIO Status
bits : 2 - 2 (1 bit)
access : read-only

P3 : PIO Status
bits : 3 - 3 (1 bit)
access : read-only

P4 : PIO Status
bits : 4 - 4 (1 bit)
access : read-only

P5 : PIO Status
bits : 5 - 5 (1 bit)
access : read-only

P6 : PIO Status
bits : 6 - 6 (1 bit)
access : read-only

P7 : PIO Status
bits : 7 - 7 (1 bit)
access : read-only

P8 : PIO Status
bits : 8 - 8 (1 bit)
access : read-only

P9 : PIO Status
bits : 9 - 9 (1 bit)
access : read-only

P10 : PIO Status
bits : 10 - 10 (1 bit)
access : read-only

P11 : PIO Status
bits : 11 - 11 (1 bit)
access : read-only

P12 : PIO Status
bits : 12 - 12 (1 bit)
access : read-only

P13 : PIO Status
bits : 13 - 13 (1 bit)
access : read-only

P14 : PIO Status
bits : 14 - 14 (1 bit)
access : read-only

P15 : PIO Status
bits : 15 - 15 (1 bit)
access : read-only

P16 : PIO Status
bits : 16 - 16 (1 bit)
access : read-only

P17 : PIO Status
bits : 17 - 17 (1 bit)
access : read-only

P18 : PIO Status
bits : 18 - 18 (1 bit)
access : read-only

P19 : PIO Status
bits : 19 - 19 (1 bit)
access : read-only

P20 : PIO Status
bits : 20 - 20 (1 bit)
access : read-only

P21 : PIO Status
bits : 21 - 21 (1 bit)
access : read-only

P22 : PIO Status
bits : 22 - 22 (1 bit)
access : read-only

P23 : PIO Status
bits : 23 - 23 (1 bit)
access : read-only

P24 : PIO Status
bits : 24 - 24 (1 bit)
access : read-only

P25 : PIO Status
bits : 25 - 25 (1 bit)
access : read-only

P26 : PIO Status
bits : 26 - 26 (1 bit)
access : read-only

P27 : PIO Status
bits : 27 - 27 (1 bit)
access : read-only

P28 : PIO Status
bits : 28 - 28 (1 bit)
access : read-only

P29 : PIO Status
bits : 29 - 29 (1 bit)
access : read-only

P30 : PIO Status
bits : 30 - 30 (1 bit)
access : read-only

P31 : PIO Status
bits : 31 - 31 (1 bit)
access : read-only


OWER

Output Write Enable
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OWER OWER write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Write Enable.
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Write Enable.
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Write Enable.
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Write Enable.
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Write Enable.
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Write Enable.
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Write Enable.
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Write Enable.
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Write Enable.
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Write Enable.
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Write Enable.
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Write Enable.
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Write Enable.
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Write Enable.
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Write Enable.
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Write Enable.
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Write Enable.
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Write Enable.
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Write Enable.
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Write Enable.
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Write Enable.
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Write Enable.
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Write Enable.
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Write Enable.
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Write Enable.
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Write Enable.
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Write Enable.
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Write Enable.
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Write Enable.
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Write Enable.
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Write Enable.
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Write Enable.
bits : 31 - 31 (1 bit)
access : write-only


OWDR

Output Write Disable
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

OWDR OWDR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Write Disable.
bits : 0 - 0 (1 bit)
access : write-only

P1 : Output Write Disable.
bits : 1 - 1 (1 bit)
access : write-only

P2 : Output Write Disable.
bits : 2 - 2 (1 bit)
access : write-only

P3 : Output Write Disable.
bits : 3 - 3 (1 bit)
access : write-only

P4 : Output Write Disable.
bits : 4 - 4 (1 bit)
access : write-only

P5 : Output Write Disable.
bits : 5 - 5 (1 bit)
access : write-only

P6 : Output Write Disable.
bits : 6 - 6 (1 bit)
access : write-only

P7 : Output Write Disable.
bits : 7 - 7 (1 bit)
access : write-only

P8 : Output Write Disable.
bits : 8 - 8 (1 bit)
access : write-only

P9 : Output Write Disable.
bits : 9 - 9 (1 bit)
access : write-only

P10 : Output Write Disable.
bits : 10 - 10 (1 bit)
access : write-only

P11 : Output Write Disable.
bits : 11 - 11 (1 bit)
access : write-only

P12 : Output Write Disable.
bits : 12 - 12 (1 bit)
access : write-only

P13 : Output Write Disable.
bits : 13 - 13 (1 bit)
access : write-only

P14 : Output Write Disable.
bits : 14 - 14 (1 bit)
access : write-only

P15 : Output Write Disable.
bits : 15 - 15 (1 bit)
access : write-only

P16 : Output Write Disable.
bits : 16 - 16 (1 bit)
access : write-only

P17 : Output Write Disable.
bits : 17 - 17 (1 bit)
access : write-only

P18 : Output Write Disable.
bits : 18 - 18 (1 bit)
access : write-only

P19 : Output Write Disable.
bits : 19 - 19 (1 bit)
access : write-only

P20 : Output Write Disable.
bits : 20 - 20 (1 bit)
access : write-only

P21 : Output Write Disable.
bits : 21 - 21 (1 bit)
access : write-only

P22 : Output Write Disable.
bits : 22 - 22 (1 bit)
access : write-only

P23 : Output Write Disable.
bits : 23 - 23 (1 bit)
access : write-only

P24 : Output Write Disable.
bits : 24 - 24 (1 bit)
access : write-only

P25 : Output Write Disable.
bits : 25 - 25 (1 bit)
access : write-only

P26 : Output Write Disable.
bits : 26 - 26 (1 bit)
access : write-only

P27 : Output Write Disable.
bits : 27 - 27 (1 bit)
access : write-only

P28 : Output Write Disable.
bits : 28 - 28 (1 bit)
access : write-only

P29 : Output Write Disable.
bits : 29 - 29 (1 bit)
access : write-only

P30 : Output Write Disable.
bits : 30 - 30 (1 bit)
access : write-only

P31 : Output Write Disable.
bits : 31 - 31 (1 bit)
access : write-only


OWSR

Output Write Status Register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

OWSR OWSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31

P0 : Output Write Status.
bits : 0 - 0 (1 bit)
access : read-only

P1 : Output Write Status.
bits : 1 - 1 (1 bit)
access : read-only

P2 : Output Write Status.
bits : 2 - 2 (1 bit)
access : read-only

P3 : Output Write Status.
bits : 3 - 3 (1 bit)
access : read-only

P4 : Output Write Status.
bits : 4 - 4 (1 bit)
access : read-only

P5 : Output Write Status.
bits : 5 - 5 (1 bit)
access : read-only

P6 : Output Write Status.
bits : 6 - 6 (1 bit)
access : read-only

P7 : Output Write Status.
bits : 7 - 7 (1 bit)
access : read-only

P8 : Output Write Status.
bits : 8 - 8 (1 bit)
access : read-only

P9 : Output Write Status.
bits : 9 - 9 (1 bit)
access : read-only

P10 : Output Write Status.
bits : 10 - 10 (1 bit)
access : read-only

P11 : Output Write Status.
bits : 11 - 11 (1 bit)
access : read-only

P12 : Output Write Status.
bits : 12 - 12 (1 bit)
access : read-only

P13 : Output Write Status.
bits : 13 - 13 (1 bit)
access : read-only

P14 : Output Write Status.
bits : 14 - 14 (1 bit)
access : read-only

P15 : Output Write Status.
bits : 15 - 15 (1 bit)
access : read-only

P16 : Output Write Status.
bits : 16 - 16 (1 bit)
access : read-only

P17 : Output Write Status.
bits : 17 - 17 (1 bit)
access : read-only

P18 : Output Write Status.
bits : 18 - 18 (1 bit)
access : read-only

P19 : Output Write Status.
bits : 19 - 19 (1 bit)
access : read-only

P20 : Output Write Status.
bits : 20 - 20 (1 bit)
access : read-only

P21 : Output Write Status.
bits : 21 - 21 (1 bit)
access : read-only

P22 : Output Write Status.
bits : 22 - 22 (1 bit)
access : read-only

P23 : Output Write Status.
bits : 23 - 23 (1 bit)
access : read-only

P24 : Output Write Status.
bits : 24 - 24 (1 bit)
access : read-only

P25 : Output Write Status.
bits : 25 - 25 (1 bit)
access : read-only

P26 : Output Write Status.
bits : 26 - 26 (1 bit)
access : read-only

P27 : Output Write Status.
bits : 27 - 27 (1 bit)
access : read-only

P28 : Output Write Status.
bits : 28 - 28 (1 bit)
access : read-only

P29 : Output Write Status.
bits : 29 - 29 (1 bit)
access : read-only

P30 : Output Write Status.
bits : 30 - 30 (1 bit)
access : read-only

P31 : Output Write Status.
bits : 31 - 31 (1 bit)
access : read-only



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