\n
address_offset : 0x0 Bytes (0x0)
size : 0x200 byte (0x0)
mem_usage : registers
protection : not protected
Mode Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PIV : Periodic Interval Value
bits : 0 - 19 (20 bit)
access : read-write
PITEN : Period Interval Timer Enabled
bits : 24 - 24 (1 bit)
access : read-write
PITIEN : Periodic Interval Timer Interrupt Enable
bits : 25 - 25 (1 bit)
access : read-write
Status Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PITS : Periodic Interval Timer Status
bits : 0 - 0 (1 bit)
access : read-only
Periodic Interval Value Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CPIV : Current Periodic Interval Value
bits : 0 - 19 (20 bit)
access : read-only
PICNT : Periodic Interval Counter
bits : 20 - 31 (12 bit)
access : read-only
Periodic Interval Image Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CPIV : Current Periodic Interval Value
bits : 0 - 19 (20 bit)
access : read-only
PICNT : Periodic Interval Counter
bits : 20 - 31 (12 bit)
access : read-only
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.