\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EM2BLOCK : Energy Mode 2 Block
bits : 1 - 1 (1 bit)
access : read-write
EM2BODDIS : Disable BOD in EM2
bits : 2 - 2 (1 bit)
access : read-write
EM01LD : Reserved for internal use. Do not change.
bits : 3 - 3 (1 bit)
access : read-write
EM23VSCALEAUTOWSEN : Automatically Configures Flash and Frequency to Wakeup From EM2 or EM3 at Low Voltage
bits : 4 - 4 (1 bit)
access : read-write
EM23VSCALE : EM23 Voltage Scale
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
0x00000000 : VSCALE2
Voltage Scale Level 2
0x00000002 : VSCALE0
Voltage Scale Level 0
0x00000003 : RESV
RESV
End of enumeration elements list.
EM4HVSCALE : EM4H Voltage Scale
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0x00000000 : VSCALE2
Voltage Scale Level 2
0x00000002 : VSCALE0
Voltage Scale Level 0
0x00000003 : RESV
RESV
End of enumeration elements list.
Command Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
EM4UNLATCH : EM4 Unlatch
bits : 0 - 0 (1 bit)
access : write-only
EM01VSCALE0 : EM01 Voltage Scale Command to Scale to Voltage Scale Level 0
bits : 4 - 4 (1 bit)
access : write-only
EM01VSCALE2 : EM01 Voltage Scale Command to Scale to Voltage Scale Level 2
bits : 6 - 6 (1 bit)
access : write-only
Clears Corresponding Bits in EM23PERNORETAINSTATUS Unlocking Access to Peripheral
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ACMP0UNLOCK : Clears Status Bit of ACMP0 and Unlocks Access to It
bits : 0 - 0 (1 bit)
access : write-only
ACMP1UNLOCK : Clears Status Bit of ACMP1 and Unlocks Access to It
bits : 1 - 1 (1 bit)
access : write-only
PCNT0UNLOCK : Clears Status Bit of PCNT0 and Unlocks Access to It
bits : 2 - 2 (1 bit)
access : write-only
I2C0UNLOCK : Clears Status Bit of I2C0 and Unlocks Access to It
bits : 5 - 5 (1 bit)
access : write-only
I2C1UNLOCK : Clears Status Bit of I2C1 and Unlocks Access to It
bits : 6 - 6 (1 bit)
access : write-only
DAC0UNLOCK : Clears Status Bit of DAC0 and Unlocks Access to It
bits : 7 - 7 (1 bit)
access : write-only
ADC0UNLOCK : Clears Status Bit of ADC0 and Unlocks Access to It
bits : 9 - 9 (1 bit)
access : write-only
LETIMER0UNLOCK : Clears Status Bit of LETIMER0 and Unlocks Access to It
bits : 10 - 10 (1 bit)
access : write-only
WDOG0UNLOCK : Clears Status Bit of WDOG0 and Unlocks Access to It
bits : 11 - 11 (1 bit)
access : write-only
LESENSE0UNLOCK : Clears Status Bit of LESENSE0 and Unlocks Access to It
bits : 13 - 13 (1 bit)
access : write-only
CSENUNLOCK : Clears Status Bit of CSEN and Unlocks Access to It
bits : 14 - 14 (1 bit)
access : write-only
LEUART0UNLOCK : Clears Status Bit of LEUART0 and Unlocks Access to It
bits : 15 - 15 (1 bit)
access : write-only
LCDUNLOCK : Clears Status Bit of LCD and Unlocks Access to It
bits : 17 - 17 (1 bit)
access : write-only
Status Indicating If Peripherals Were Powered Down in EM23, Subsequently Locking Access to It
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ACMP0LOCKED : Indicates If ACMP0 Powered Down During EM23
bits : 0 - 0 (1 bit)
access : read-only
ACMP1LOCKED : Indicates If ACMP1 Powered Down During EM23
bits : 1 - 1 (1 bit)
access : read-only
PCNT0LOCKED : Indicates If PCNT0 Powered Down During EM23
bits : 2 - 2 (1 bit)
access : read-only
I2C0LOCKED : Indicates If I2C0 Powered Down During EM23
bits : 5 - 5 (1 bit)
access : read-only
I2C1LOCKED : Indicates If I2C1 Powered Down During EM23
bits : 6 - 6 (1 bit)
access : read-only
DAC0LOCKED : Indicates If DAC0 Powered Down During EM23
bits : 7 - 7 (1 bit)
access : read-only
ADC0LOCKED : Indicates If ADC0 Powered Down During EM23
bits : 9 - 9 (1 bit)
access : read-only
LETIMER0LOCKED : Indicates If LETIMER0 Powered Down During EM23
bits : 10 - 10 (1 bit)
access : read-only
WDOG0LOCKED : Indicates If WDOG0 Powered Down During EM23
bits : 11 - 11 (1 bit)
access : read-only
LESENSE0LOCKED : Indicates If LESENSE0 Powered Down During EM23
bits : 13 - 13 (1 bit)
access : read-only
CSENLOCKED : Indicates If CSEN Powered Down During EM23
bits : 14 - 14 (1 bit)
access : read-only
LEUART0LOCKED : Indicates If LEUART0 Powered Down During EM23
bits : 15 - 15 (1 bit)
access : read-only
LCDLOCKED : Indicates If LCD Powered Down During EM23
bits : 17 - 17 (1 bit)
access : read-only
When Set Corresponding Peripherals May Get Powered Down in EM23
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACMP0DIS : Allow Power Down of ACMP0 During EM23
bits : 0 - 0 (1 bit)
access : read-write
ACMP1DIS : Allow Power Down of ACMP1 During EM23
bits : 1 - 1 (1 bit)
access : read-write
PCNT0DIS : Allow Power Down of PCNT0 During EM23
bits : 2 - 2 (1 bit)
access : read-write
I2C0DIS : Allow Power Down of I2C0 During EM23
bits : 5 - 5 (1 bit)
access : read-write
I2C1DIS : Allow Power Down of I2C1 During EM23
bits : 6 - 6 (1 bit)
access : read-write
VDAC0DIS : Allow Power Down of DAC0 During EM23
bits : 7 - 7 (1 bit)
access : read-write
ADC0DIS : Allow Power Down of ADC0 During EM23
bits : 9 - 9 (1 bit)
access : read-write
LETIMER0DIS : Allow Power Down of LETIMER0 During EM23
bits : 10 - 10 (1 bit)
access : read-write
WDOG0DIS : Allow Power Down of WDOG0 During EM23
bits : 11 - 11 (1 bit)
access : read-write
LESENSE0DIS : Allow Power Down of LESENSE0 During EM23
bits : 13 - 13 (1 bit)
access : read-write
CSENDIS : Allow Power Down of CSEN During EM23
bits : 14 - 14 (1 bit)
access : read-write
LEUART0DIS : Allow Power Down of LEUART0 During EM23
bits : 15 - 15 (1 bit)
access : read-write
LCDDIS : Allow Power Down of LCD During EM23
bits : 17 - 17 (1 bit)
access : read-write
EM4 Control Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EM4STATE : Energy Mode 4 State
bits : 0 - 0 (1 bit)
access : read-write
RETAINLFRCO : LFRCO Retain During EM4
bits : 1 - 1 (1 bit)
access : read-write
RETAINLFXO : LFXO Retain During EM4
bits : 2 - 2 (1 bit)
access : read-write
RETAINULFRCO : ULFRCO Retain During EM4S
bits : 3 - 3 (1 bit)
access : read-write
EM4IORETMODE : EM4 IO Retention Disable
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
0x00000000 : DISABLE
No Retention: Pads enter reset state when entering EM4
0x00000001 : EM4EXIT
Retention through EM4: Pads enter reset state when exiting EM4
0x00000002 : SWUNLATCH
Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention
End of enumeration elements list.
EM4ENTRY : Energy Mode 4 Entry
bits : 16 - 17 (2 bit)
access : write-only
Temperature Limits for Interrupt Generation
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TEMPLOW : Temperature Low Limit
bits : 0 - 7 (8 bit)
access : read-write
TEMPHIGH : Temperature High Limit
bits : 8 - 15 (8 bit)
access : read-write
EM4WUEN : Enable EM4 Wakeup Due to Low/high Temperature
bits : 16 - 16 (1 bit)
access : read-write
Value of Last Temperature Measurement
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TEMP : Temperature Measurement
bits : 0 - 7 (8 bit)
access : read-only
Interrupt Flag Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
VMONAVDDFALL : VMON AVDD Channel Fall
bits : 0 - 0 (1 bit)
access : read-only
VMONAVDDRISE : VMON AVDD Channel Rise
bits : 1 - 1 (1 bit)
access : read-only
VMONALTAVDDFALL : Alternate VMON AVDD Channel Fall
bits : 2 - 2 (1 bit)
access : read-only
VMONALTAVDDRISE : Alternate VMON AVDD Channel Rise
bits : 3 - 3 (1 bit)
access : read-only
VMONDVDDFALL : VMON DVDD Channel Fall
bits : 4 - 4 (1 bit)
access : read-only
VMONDVDDRISE : VMON DVDD Channel Rise
bits : 5 - 5 (1 bit)
access : read-only
VMONIO0FALL : VMON IOVDD0 Channel Fall
bits : 6 - 6 (1 bit)
access : read-only
VMONIO0RISE : VMON IOVDD0 Channel Rise
bits : 7 - 7 (1 bit)
access : read-only
VMONBUVDDFALL : VMON BACKUP Channel Fall
bits : 12 - 12 (1 bit)
access : read-only
VMONBUVDDRISE : VMON BUVDD Channel Rise
bits : 13 - 13 (1 bit)
access : read-only
VMONFVDDFALL : VMON VDDFLASH Channel Fall
bits : 14 - 14 (1 bit)
access : read-only
VMONFVDDRISE : VMON VDDFLASH Channel Rise
bits : 15 - 15 (1 bit)
access : read-only
PFETOVERCURRENTLIMIT : PFET Current Limit Hit
bits : 16 - 16 (1 bit)
access : read-only
NFETOVERCURRENTLIMIT : NFET Current Limit Hit
bits : 17 - 17 (1 bit)
access : read-only
DCDCLPRUNNING : LP Mode is Running
bits : 18 - 18 (1 bit)
access : read-only
DCDCLNRUNNING : LN Mode is Running
bits : 19 - 19 (1 bit)
access : read-only
DCDCINBYPASS : DCDC is in Bypass
bits : 20 - 20 (1 bit)
access : read-only
BURDY : Backup Functionality Ready Interrupt Flag
bits : 22 - 22 (1 bit)
access : read-only
EM23WAKEUP : Wakeup IRQ From EM2 and EM3
bits : 24 - 24 (1 bit)
access : read-only
VSCALEDONE : Voltage Scale Steps Done IRQ
bits : 25 - 25 (1 bit)
access : read-only
TEMP : New Temperature Measurement Valid
bits : 29 - 29 (1 bit)
access : read-only
TEMPLOW : Temperature Low Limit Reached
bits : 30 - 30 (1 bit)
access : read-only
TEMPHIGH : Temperature High Limit Reached
bits : 31 - 31 (1 bit)
access : read-only
Interrupt Flag Set Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
VMONAVDDFALL : Set VMONAVDDFALL Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only
VMONAVDDRISE : Set VMONAVDDRISE Interrupt Flag
bits : 1 - 1 (1 bit)
access : write-only
VMONALTAVDDFALL : Set VMONALTAVDDFALL Interrupt Flag
bits : 2 - 2 (1 bit)
access : write-only
VMONALTAVDDRISE : Set VMONALTAVDDRISE Interrupt Flag
bits : 3 - 3 (1 bit)
access : write-only
VMONDVDDFALL : Set VMONDVDDFALL Interrupt Flag
bits : 4 - 4 (1 bit)
access : write-only
VMONDVDDRISE : Set VMONDVDDRISE Interrupt Flag
bits : 5 - 5 (1 bit)
access : write-only
VMONIO0FALL : Set VMONIO0FALL Interrupt Flag
bits : 6 - 6 (1 bit)
access : write-only
VMONIO0RISE : Set VMONIO0RISE Interrupt Flag
bits : 7 - 7 (1 bit)
access : write-only
VMONBUVDDFALL : Set VMONBUVDDFALL Interrupt Flag
bits : 12 - 12 (1 bit)
access : write-only
VMONBUVDDRISE : Set VMONBUVDDRISE Interrupt Flag
bits : 13 - 13 (1 bit)
access : write-only
VMONFVDDFALL : Set VMONFVDDFALL Interrupt Flag
bits : 14 - 14 (1 bit)
access : write-only
VMONFVDDRISE : Set VMONFVDDRISE Interrupt Flag
bits : 15 - 15 (1 bit)
access : write-only
PFETOVERCURRENTLIMIT : Set PFETOVERCURRENTLIMIT Interrupt Flag
bits : 16 - 16 (1 bit)
access : write-only
NFETOVERCURRENTLIMIT : Set NFETOVERCURRENTLIMIT Interrupt Flag
bits : 17 - 17 (1 bit)
access : write-only
DCDCLPRUNNING : Set DCDCLPRUNNING Interrupt Flag
bits : 18 - 18 (1 bit)
access : write-only
DCDCLNRUNNING : Set DCDCLNRUNNING Interrupt Flag
bits : 19 - 19 (1 bit)
access : write-only
DCDCINBYPASS : Set DCDCINBYPASS Interrupt Flag
bits : 20 - 20 (1 bit)
access : write-only
BURDY : Set BURDY Interrupt Flag
bits : 22 - 22 (1 bit)
access : write-only
EM23WAKEUP : Set EM23WAKEUP Interrupt Flag
bits : 24 - 24 (1 bit)
access : write-only
VSCALEDONE : Set VSCALEDONE Interrupt Flag
bits : 25 - 25 (1 bit)
access : write-only
TEMP : Set TEMP Interrupt Flag
bits : 29 - 29 (1 bit)
access : write-only
TEMPLOW : Set TEMPLOW Interrupt Flag
bits : 30 - 30 (1 bit)
access : write-only
TEMPHIGH : Set TEMPHIGH Interrupt Flag
bits : 31 - 31 (1 bit)
access : write-only
Interrupt Flag Clear Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
VMONAVDDFALL : Clear VMONAVDDFALL Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only
VMONAVDDRISE : Clear VMONAVDDRISE Interrupt Flag
bits : 1 - 1 (1 bit)
access : write-only
VMONALTAVDDFALL : Clear VMONALTAVDDFALL Interrupt Flag
bits : 2 - 2 (1 bit)
access : write-only
VMONALTAVDDRISE : Clear VMONALTAVDDRISE Interrupt Flag
bits : 3 - 3 (1 bit)
access : write-only
VMONDVDDFALL : Clear VMONDVDDFALL Interrupt Flag
bits : 4 - 4 (1 bit)
access : write-only
VMONDVDDRISE : Clear VMONDVDDRISE Interrupt Flag
bits : 5 - 5 (1 bit)
access : write-only
VMONIO0FALL : Clear VMONIO0FALL Interrupt Flag
bits : 6 - 6 (1 bit)
access : write-only
VMONIO0RISE : Clear VMONIO0RISE Interrupt Flag
bits : 7 - 7 (1 bit)
access : write-only
VMONBUVDDFALL : Clear VMONBUVDDFALL Interrupt Flag
bits : 12 - 12 (1 bit)
access : write-only
VMONBUVDDRISE : Clear VMONBUVDDRISE Interrupt Flag
bits : 13 - 13 (1 bit)
access : write-only
VMONFVDDFALL : Clear VMONFVDDFALL Interrupt Flag
bits : 14 - 14 (1 bit)
access : write-only
VMONFVDDRISE : Clear VMONFVDDRISE Interrupt Flag
bits : 15 - 15 (1 bit)
access : write-only
PFETOVERCURRENTLIMIT : Clear PFETOVERCURRENTLIMIT Interrupt Flag
bits : 16 - 16 (1 bit)
access : write-only
NFETOVERCURRENTLIMIT : Clear NFETOVERCURRENTLIMIT Interrupt Flag
bits : 17 - 17 (1 bit)
access : write-only
DCDCLPRUNNING : Clear DCDCLPRUNNING Interrupt Flag
bits : 18 - 18 (1 bit)
access : write-only
DCDCLNRUNNING : Clear DCDCLNRUNNING Interrupt Flag
bits : 19 - 19 (1 bit)
access : write-only
DCDCINBYPASS : Clear DCDCINBYPASS Interrupt Flag
bits : 20 - 20 (1 bit)
access : write-only
BURDY : Clear BURDY Interrupt Flag
bits : 22 - 22 (1 bit)
access : write-only
EM23WAKEUP : Clear EM23WAKEUP Interrupt Flag
bits : 24 - 24 (1 bit)
access : write-only
VSCALEDONE : Clear VSCALEDONE Interrupt Flag
bits : 25 - 25 (1 bit)
access : write-only
TEMP : Clear TEMP Interrupt Flag
bits : 29 - 29 (1 bit)
access : write-only
TEMPLOW : Clear TEMPLOW Interrupt Flag
bits : 30 - 30 (1 bit)
access : write-only
TEMPHIGH : Clear TEMPHIGH Interrupt Flag
bits : 31 - 31 (1 bit)
access : write-only
Interrupt Enable Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VMONAVDDFALL : VMONAVDDFALL Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
VMONAVDDRISE : VMONAVDDRISE Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
VMONALTAVDDFALL : VMONALTAVDDFALL Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write
VMONALTAVDDRISE : VMONALTAVDDRISE Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write
VMONDVDDFALL : VMONDVDDFALL Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write
VMONDVDDRISE : VMONDVDDRISE Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write
VMONIO0FALL : VMONIO0FALL Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write
VMONIO0RISE : VMONIO0RISE Interrupt Enable
bits : 7 - 7 (1 bit)
access : read-write
VMONBUVDDFALL : VMONBUVDDFALL Interrupt Enable
bits : 12 - 12 (1 bit)
access : read-write
VMONBUVDDRISE : VMONBUVDDRISE Interrupt Enable
bits : 13 - 13 (1 bit)
access : read-write
VMONFVDDFALL : VMONFVDDFALL Interrupt Enable
bits : 14 - 14 (1 bit)
access : read-write
VMONFVDDRISE : VMONFVDDRISE Interrupt Enable
bits : 15 - 15 (1 bit)
access : read-write
PFETOVERCURRENTLIMIT : PFETOVERCURRENTLIMIT Interrupt Enable
bits : 16 - 16 (1 bit)
access : read-write
NFETOVERCURRENTLIMIT : NFETOVERCURRENTLIMIT Interrupt Enable
bits : 17 - 17 (1 bit)
access : read-write
DCDCLPRUNNING : DCDCLPRUNNING Interrupt Enable
bits : 18 - 18 (1 bit)
access : read-write
DCDCLNRUNNING : DCDCLNRUNNING Interrupt Enable
bits : 19 - 19 (1 bit)
access : read-write
DCDCINBYPASS : DCDCINBYPASS Interrupt Enable
bits : 20 - 20 (1 bit)
access : read-write
BURDY : BURDY Interrupt Enable
bits : 22 - 22 (1 bit)
access : read-write
EM23WAKEUP : EM23WAKEUP Interrupt Enable
bits : 24 - 24 (1 bit)
access : read-write
VSCALEDONE : VSCALEDONE Interrupt Enable
bits : 25 - 25 (1 bit)
access : read-write
TEMP : TEMP Interrupt Enable
bits : 29 - 29 (1 bit)
access : read-write
TEMPLOW : TEMPLOW Interrupt Enable
bits : 30 - 30 (1 bit)
access : read-write
TEMPHIGH : TEMPHIGH Interrupt Enable
bits : 31 - 31 (1 bit)
access : read-write
Regulator and Supply Lock Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LOCKKEY : Regulator and Supply Configuration Lock Key
bits : 0 - 15 (16 bit)
access : read-write
Enumeration:
0x00000000 : UNLOCKED
None
0x00000001 : LOCKED
None
End of enumeration elements list.
Power Control Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ANASW : Analog Switch Selection
bits : 5 - 5 (1 bit)
access : read-write
REGPWRSEL : This Field Selects the Input Supply Pin for the Digital LDO
bits : 10 - 10 (1 bit)
access : read-write
IMMEDIATEPWRSWITCH : Allows Immediate Switching of ANASW and REGPWRSEL Bitfields
bits : 13 - 13 (1 bit)
access : read-write
Status Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
VMONRDY : VMON Ready
bits : 0 - 0 (1 bit)
access : read-only
VMONAVDD : VMON AVDD Channel
bits : 1 - 1 (1 bit)
access : read-only
VMONALTAVDD : Alternate VMON AVDD Channel
bits : 2 - 2 (1 bit)
access : read-only
VMONDVDD : VMON DVDD Channel
bits : 3 - 3 (1 bit)
access : read-only
VMONIO0 : VMON IOVDD0 Channel
bits : 4 - 4 (1 bit)
access : read-only
VMONBUVDD : VMON BUVDD Channel
bits : 7 - 7 (1 bit)
access : read-only
VMONFVDD : VMON VDDFLASH Channel
bits : 8 - 8 (1 bit)
access : read-only
BURDY : Backup Mode Ready
bits : 12 - 12 (1 bit)
access : read-only
VSCALE : Current Voltage Scale Value
bits : 16 - 17 (2 bit)
access : read-only
Enumeration:
0x00000000 : VSCALE2
Voltage Scale Level 2
0x00000002 : VSCALE0
Voltage Scale Level 0
0x00000003 : RESV
RESV
End of enumeration elements list.
VSCALEBUSY : System is Busy Scaling Voltage
bits : 18 - 18 (1 bit)
access : read-only
EM4IORET : IO Retention Status
bits : 20 - 20 (1 bit)
access : read-only
TEMPACTIVE : Temperature Measurement Active
bits : 26 - 26 (1 bit)
access : read-only
DCDC Control
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DCDCMODE : Regulator Mode
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0x00000000 : BYPASS
DCDC regulator is operating in bypass mode. Prior to configuring DCDCMODE=BYPASS, software must set EMU_DCDCCLIMCTRL.BYPLIMEN=1 to prevent excessive current between VREGVDD and DVDD supplies.
0x00000001 : LOWNOISE
DCDC regulator is operating in low noise mode.
0x00000002 : LOWPOWER
DCDC regulator is operating in low power mode.
0x00000003 : OFF
DCDC regulator is off and the bypass switch is off. Note: DVDD must be supplied externally
End of enumeration elements list.
DCDCMODEEM23 : DCDC Mode EM23
bits : 4 - 4 (1 bit)
access : read-write
DCDCMODEEM4 : DCDC Mode EM4H
bits : 5 - 5 (1 bit)
access : read-write
DCDC Miscellaneous Control Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNFORCECCM : Force DCDC Into CCM Mode in Low Noise Operation
bits : 0 - 0 (1 bit)
access : read-write
LPCMPHYSDIS : Disable LP Mode Hysteresis in the State Machine Control
bits : 1 - 1 (1 bit)
access : read-write
LPCMPHYSHI : Comparator Threshold on the High Side
bits : 2 - 2 (1 bit)
access : read-write
LNFORCECCMIMM : Force DCDC Into CCM Mode Immediately, Based on LNFORCECCM
bits : 5 - 5 (1 bit)
access : read-write
PFETCNT : PFET Switch Number Selection
bits : 8 - 11 (4 bit)
access : read-write
NFETCNT : NFET Switch Number Selection
bits : 12 - 15 (4 bit)
access : read-write
BYPLIMSEL : Current Limit in Bypass Mode
bits : 16 - 19 (4 bit)
access : read-write
LPCLIMILIMSEL : Current Limit Level Selection for Current Limiter in LP Mode
bits : 20 - 22 (3 bit)
access : read-write
LNCLIMILIMSEL : Current Limit Level Selection for Current Limiter in LN Mode
bits : 24 - 26 (3 bit)
access : read-write
LPCMPBIASEM234H : LP Mode Comparator Bias Selection for EM23 or EM4H
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
0x00000000 : BIAS0
Maximum load current less than 75uA.
0x00000001 : BIAS1
Maximum load current less than 500uA.
0x00000002 : BIAS2
Maximum load current less than 2.5mA.
0x00000003 : BIAS3
Maximum load current less than 10mA.
End of enumeration elements list.
DCDC Power Train NFET Zero Current Detector Control Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ZDETILIMSEL : Reverse Current Limit Level Selection for Zero Detector
bits : 4 - 6 (3 bit)
access : read-write
ZDETBLANKDLY : Reserved for internal use. Do not change.
bits : 8 - 9 (2 bit)
access : read-write
DCDC Power Train PFET Current Limiter Control Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLIMBLANKDLY : Reserved for internal use. Do not change.
bits : 8 - 9 (2 bit)
access : read-write
BYPLIMEN : Bypass Current Limit Enable
bits : 13 - 13 (1 bit)
access : read-write
DCDC Low Noise Compensator Control Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COMPENR1 : Low Noise Mode Compensator R1 Trim Value
bits : 0 - 2 (3 bit)
access : read-write
COMPENR2 : Low Noise Mode Compensator R2 Trim Value
bits : 4 - 8 (5 bit)
access : read-write
COMPENR3 : Low Noise Mode Compensator R3 Trim Value
bits : 12 - 15 (4 bit)
access : read-write
COMPENC1 : Low Noise Mode Compensator C1 Trim Value
bits : 20 - 21 (2 bit)
access : read-write
COMPENC2 : Low Noise Mode Compensator C2 Trim Value
bits : 24 - 26 (3 bit)
access : read-write
COMPENC3 : Low Noise Mode Compensator C3 Trim Value
bits : 28 - 31 (4 bit)
access : read-write
DCDC Low Noise Voltage Register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LNATT : Low Noise Mode Feedback Attenuation
bits : 1 - 1 (1 bit)
access : read-write
LNVREF : Low Noise Mode VREF Trim
bits : 8 - 14 (7 bit)
access : read-write
DCDC Low Power Voltage Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LPATT : Low Power Feedback Attenuation
bits : 0 - 0 (1 bit)
access : read-write
LPVREF : LP Mode Reference Selection for EM23 and EM4H
bits : 1 - 8 (8 bit)
access : read-write
DCDC Low Power Control Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LPCMPHYSSELEM234H : LP Mode Hysteresis Selection for EM23 and EM4H
bits : 12 - 15 (4 bit)
access : read-write
LPVREFDUTYEN : LP Mode Duty Cycling Enable
bits : 24 - 24 (1 bit)
access : read-write
LPBLANK : Reserved for internal use. Do not change.
bits : 25 - 26 (2 bit)
access : read-write
DCDC Low Noise Controller Frequency Control
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RCOBAND : LN Mode RCO Frequency Band Selection
bits : 0 - 2 (3 bit)
access : read-write
RCOTRIM : Reserved for internal use. Do not change.
bits : 24 - 28 (5 bit)
access : read-write
DCDC Read Status Register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCDCCTRLBUSY : DCDC CTRL Register Transfer Busy
bits : 0 - 0 (1 bit)
access : read-only
Configuration Lock Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LOCKKEY : Configuration Lock Key
bits : 0 - 15 (16 bit)
access : read-write
Enumeration:
0x00000000 : UNLOCKED
None
0x00000001 : LOCKED
None
End of enumeration elements list.
VMON AVDD Channel Control
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : Enable
bits : 0 - 0 (1 bit)
access : read-write
RISEWU : Rise Wakeup
bits : 2 - 2 (1 bit)
access : read-write
FALLWU : Fall Wakeup
bits : 3 - 3 (1 bit)
access : read-write
FALLTHRESFINE : Falling Threshold Fine Adjust
bits : 8 - 11 (4 bit)
access : read-write
FALLTHRESCOARSE : Falling Threshold Coarse Adjust
bits : 12 - 15 (4 bit)
access : read-write
RISETHRESFINE : Rising Threshold Fine Adjust
bits : 16 - 19 (4 bit)
access : read-write
RISETHRESCOARSE : Rising Threshold Coarse Adjust
bits : 20 - 23 (4 bit)
access : read-write
Alternate VMON AVDD Channel Control
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : Enable
bits : 0 - 0 (1 bit)
access : read-write
RISEWU : Rise Wakeup
bits : 2 - 2 (1 bit)
access : read-write
FALLWU : Fall Wakeup
bits : 3 - 3 (1 bit)
access : read-write
THRESFINE : Threshold Fine Adjust
bits : 8 - 11 (4 bit)
access : read-write
THRESCOARSE : Threshold Coarse Adjust
bits : 12 - 15 (4 bit)
access : read-write
VMON DVDD Channel Control
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : Enable
bits : 0 - 0 (1 bit)
access : read-write
RISEWU : Rise Wakeup
bits : 2 - 2 (1 bit)
access : read-write
FALLWU : Fall Wakeup
bits : 3 - 3 (1 bit)
access : read-write
THRESFINE : Threshold Fine Adjust
bits : 8 - 11 (4 bit)
access : read-write
THRESCOARSE : Threshold Coarse Adjust
bits : 12 - 15 (4 bit)
access : read-write
VMON IOVDD0 Channel Control
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : Enable
bits : 0 - 0 (1 bit)
access : read-write
RISEWU : Rise Wakeup
bits : 2 - 2 (1 bit)
access : read-write
FALLWU : Fall Wakeup
bits : 3 - 3 (1 bit)
access : read-write
RETDIS : EM4 IO0 Retention Disable
bits : 4 - 4 (1 bit)
access : read-write
THRESFINE : Threshold Fine Adjust
bits : 8 - 11 (4 bit)
access : read-write
THRESCOARSE : Threshold Coarse Adjust
bits : 12 - 15 (4 bit)
access : read-write
VMON BUVDD Channel Control
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : Enable
bits : 0 - 0 (1 bit)
access : read-write
RISEWU : Rise Wakeup
bits : 2 - 2 (1 bit)
access : read-write
FALLWU : Fall Wakeup
bits : 3 - 3 (1 bit)
access : read-write
THRESFINE : Threshold Fine Adjust
bits : 8 - 11 (4 bit)
access : read-write
THRESCOARSE : Threshold Coarse Adjust
bits : 12 - 15 (4 bit)
access : read-write
Backup Power Configuration Register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : Enable Backup Mode
bits : 0 - 0 (1 bit)
access : read-write
STATEN : Enable Backup Mode Status Export
bits : 1 - 1 (1 bit)
access : read-write
BUVINPROBEEN : Enable BU_VIN Probing
bits : 2 - 2 (1 bit)
access : read-write
VOUTRES : BU_VOUT Resistor Select
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
0x00000000 : DIS
BU_VOUT is not connected
0x00000001 : WEAK
Enable weak switch between BU_VOUT and backup domain power supply.
0x00000002 : MED
Enable medium switch between BU_VOUT and backup domain power supply.
0x00000003 : STRONG
Enable strong switch between BU_VOUT and backup domain power supply.
End of enumeration elements list.
PWRRES : Power Domain Resistor Select
bits : 12 - 13 (2 bit)
access : read-write
Enumeration:
0x00000000 : RES0
Main power and backup power connected with RES0 series resistance.
0x00000001 : RES1
Main power and backup power connected with RES1 series resistance.
0x00000002 : RES2
Main power and backup power connected with RES2 series resistance.
0x00000003 : RES3
Main power and backup power connected with RES3 series resistance.
End of enumeration elements list.
BUACTPWRCON : Power Connection Configuration in Backup Mode
bits : 16 - 17 (2 bit)
access : read-write
Enumeration:
0x00000000 : NONE
No connection.
0x00000001 : MAINBU
Main power and backup power are connected through a diode, allowing current to flow from backup power source to main power source, but not the other way.
0x00000002 : BUMAIN
Main power and backup power are connected through a diode, allowing current to flow from main power source to backup power source, but not the other way.
0x00000003 : NODIODE
Main power and backup power are connected without diode.
End of enumeration elements list.
BUINACTPWRCON : Power Connection Configuration When Not in Backup Mode
bits : 20 - 21 (2 bit)
access : read-write
Enumeration:
0x00000000 : NONE
No connection.
0x00000001 : MAINBU
Main power and backup power are connected through a diode, allowing current to flow from main power source to backup power source, but not the other way.
0x00000002 : BUMAIN
Main power and backup power are connected through a diode, allowing current to flow from backup power source to main power source, but not the other way.
0x00000003 : NODIODE
Main power and backup power are connected without diode.
End of enumeration elements list.
DISMAXCOMP : Disable MAIN-BU Comparator
bits : 31 - 31 (1 bit)
access : read-write
Memory Control Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RAMPOWERDOWN : RAM0 Blockset Power-down
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0x00000000 : NONE
None of the RAM blocks powered down
0x00000004 : BLK3
Power down RAM block 3
0x00000006 : BLK2TO3
Power down RAM blocks 2 and above
0x00000007 : BLK1TO3
Power down RAM blocks 1 and above
End of enumeration elements list.
Configuration Bits for Low Power Mode to Be Applied During EM01, This Field is Only Relevant If LP Mode is Used in EM01
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LPCMPBIASEM01 : LP Mode Comparator Bias Selection for EM01
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
0x00000000 : BIAS0
Maximum load current less than 75uA.
0x00000001 : BIAS1
Maximum load current less than 500uA.
0x00000002 : BIAS2
Maximum load current less than 2.5mA.
0x00000003 : BIAS3
Maximum load current less than 10mA.
End of enumeration elements list.
LPCMPHYSSELEM01 : LP Mode Hysteresis Selection for EM01
bits : 12 - 15 (4 bit)
access : read-write
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