\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
No Description
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IPVERSION : IP Version ID
bits : 0 - 31 (32 bit)
access : read-only
No Description
address_offset : 0x10 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ERASEPAGE : Erase Page
bits : 1 - 1 (1 bit)
access : write-only
WRITEEND : End Write Mode
bits : 2 - 2 (1 bit)
access : write-only
ERASEABORT : Abort erase sequence
bits : 5 - 5 (1 bit)
access : write-only
ERASEMAIN0 : Mass erase region 0
bits : 8 - 8 (1 bit)
access : write-only
CLEARWDATA : Clear WDATA state
bits : 12 - 12 (1 bit)
access : write-only
No Description
address_offset : 0x120 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LOCKBIT : page lock bit
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x124 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LOCKBIT : page lock bit
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADDRB : Page Erase or Write Address Buffer
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATAW : Write Data
bits : 0 - 31 (32 bit)
access : read-write
No Description
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
BUSY : Erase/Write Busy
bits : 0 - 0 (1 bit)
access : read-only
LOCKED : Access Locked
bits : 1 - 1 (1 bit)
access : read-only
INVADDR : Invalid Write Address or Erase Page
bits : 2 - 2 (1 bit)
access : read-only
WDATAREADY : WDATA Write Ready
bits : 3 - 3 (1 bit)
access : read-only
ERASEABORTED : Erase Operation Aborted
bits : 4 - 4 (1 bit)
access : read-only
PENDING : Write Command In Queue
bits : 5 - 5 (1 bit)
access : read-only
TIMEOUT : Write Command Timeout
bits : 6 - 6 (1 bit)
access : read-only
REGLOCK : Register Lock Status
bits : 16 - 16 (1 bit)
access : read-only
Enumeration:
0 : UNLOCKED
Register lock is unlocked
1 : LOCKED
Register lock is locked.
End of enumeration elements list.
PWRON : Flash Power On Status
bits : 24 - 24 (1 bit)
access : read-only
WREADY : Flash Write Ready
bits : 27 - 27 (1 bit)
access : read-only
PWRUPCKBDFAILCOUNT : Flash power up checkerboard pattern chec
bits : 28 - 31 (4 bit)
access : read-only
No Description
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ERASE : Host Erase Done Interrupt Read Flag
bits : 0 - 0 (1 bit)
access : read-write
WRITE : Host Write Done Interrupt Read Flag
bits : 1 - 1 (1 bit)
access : read-write
WDATAOV : Host write buffer overflow
bits : 2 - 2 (1 bit)
access : read-write
PWRUPF : Flash Power Up Sequence Complete Flag
bits : 8 - 8 (1 bit)
access : read-write
PWROFFIF : Flash Power Off Sequence Complete Flag
bits : 9 - 9 (1 bit)
access : read-write
PWROFF : Flash Power Off Sequence Complete Flag
bits : 9 - 9 (1 bit)
access : read-write
No Description
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ERASE : Erase Done Interrupt enable
bits : 0 - 0 (1 bit)
access : read-write
WRITE : Write Done Interrupt enable
bits : 1 - 1 (1 bit)
access : read-write
WDATAOV : write data buffer overflow irq enable
bits : 2 - 2 (1 bit)
access : read-write
PWRUPF : Flash Power Up Seq done irq enable
bits : 8 - 8 (1 bit)
access : read-write
PWROFFIEN : Flash Power Off Seq done irq enable
bits : 9 - 9 (1 bit)
access : read-write
PWROFF : Flash Power Off Seq done irq enable
bits : 9 - 9 (1 bit)
access : read-write
No Description
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
USERDATASIZE : User Data Size
bits : 0 - 5 (6 bit)
access : read-only
No Description
address_offset : 0x38 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
PWRUP : Flash Power Up Command
bits : 0 - 0 (1 bit)
access : write-only
PWROFF : Flash power off/sleep command
bits : 4 - 4 (1 bit)
access : write-only
No Description
address_offset : 0x3C Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
LOCKKEY : Configuration Lock
bits : 0 - 15 (16 bit)
access : write-only
Enumeration:
0 : LOCK
Key to lock the register lock
7025 : UNLOCK
Key to unlock the register lock.
End of enumeration elements list.
No Description
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MELOCKBIT : Mass Erase Lock
bits : 0 - 0 (1 bit)
access : read-write
UDLOCKBIT : User Data Lock
bits : 4 - 4 (1 bit)
access : read-write
No Description
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PWROFFONEM1ENTRY : Power down Flash macro when enter EM1
bits : 0 - 0 (1 bit)
access : read-write
PWROFFONEM1PENTRY : Power down Flash macro when enter EM1P
bits : 1 - 1 (1 bit)
access : read-write
PWROFFENTRYAGAIN : POWER down flash again in EM1/EM1p
bits : 4 - 4 (1 bit)
access : read-write
PWROFFDLY : Power down delay
bits : 16 - 23 (8 bit)
access : read-write
No Description
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DOUTBUFEN : Flash dout pipeline buffer enable
bits : 12 - 12 (1 bit)
access : read-write
MODE : Read Mode
bits : 20 - 21 (2 bit)
access : read-write
Enumeration:
0 : WS0
Zero wait-states inserted in fetch or read transfers
1 : WS1
One wait-state inserted for each fetch or read transfer
2 : WS2
Two wait-states inserted for eatch fetch or read transfer
3 : WS3
Three wait-states inserted for eatch fetch or read transfer
End of enumeration elements list.
No Description
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WREN : Enable Write/Erase Controller
bits : 0 - 0 (1 bit)
access : read-write
IRQERASEABORT : Abort Page Erase on Interrupt
bits : 1 - 1 (1 bit)
access : read-write
LPWRITE : Low-Power Erase
bits : 3 - 3 (1 bit)
access : read-write
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