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USB

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

USB0FADDR

FADDR

USB0POWER

POWER

USB0CSRL0

CSRL0

USB0CSRH0

CSRH0

USB0COUNT0

COUNT0

USB0TYPE0

TYPE0

USB0NAKLMT

NAKLMT

USB0TXMAXP1

TXMAXP1

USB0TXCSRL1

TXCSRL1

USB0TXCSRH1

TXCSRH1

USB0RXMAXP1

RXMAXP1

USB0RXCSRL1

RXCSRL1

USB0RXCSRH1

RXCSRH1

USB0RXCOUNT1

RXCOUNT1

USB0TXTYPE1

TXTYPE1

USB0TXINTERVAL1

TXINTERVAL1

USB0RXTYPE1

RXTYPE1

USB0RXINTERVAL1

RXINTERVAL1

USB0TXMAXP2

TXMAXP2

USB0TXCSRL2

TXCSRL2

USB0TXCSRH2

TXCSRH2

USB0RXMAXP2

RXMAXP2

USB0RXCSRL2

RXCSRL2

USB0RXCSRH2

RXCSRH2

USB0RXCOUNT2

RXCOUNT2

USB0TXTYPE2

TXTYPE2

USB0TXINTERVAL2

TXINTERVAL2

USB0RXTYPE2

RXTYPE2

USB0RXINTERVAL2

RXINTERVAL2

USB0TXMAXP3

TXMAXP3

USB0TXCSRL3

TXCSRL3

USB0TXCSRH3

TXCSRH3

USB0RXMAXP3

RXMAXP3

USB0RXCSRL3

RXCSRL3

USB0RXCSRH3

RXCSRH3

USB0RXCOUNT3

RXCOUNT3

USB0TXTYPE3

TXTYPE3

USB0TXINTERVAL3

TXINTERVAL3

USB0RXTYPE3

RXTYPE3

USB0RXINTERVAL3

RXINTERVAL3

USB0TXMAXP4

TXMAXP4

USB0TXCSRL4

TXCSRL4

USB0TXCSRH4

TXCSRH4

USB0RXMAXP4

RXMAXP4

USB0RXCSRL4

RXCSRL4

USB0RXCSRH4

RXCSRH4

USB0RXCOUNT4

RXCOUNT4

USB0TXTYPE4

TXTYPE4

USB0TXINTERVAL4

TXINTERVAL4

USB0RXTYPE4

RXTYPE4

USB0RXINTERVAL4

RXINTERVAL4

USB0TXMAXP5

TXMAXP5

USB0TXCSRL5

TXCSRL5

USB0TXCSRH5

TXCSRH5

USB0RXMAXP5

RXMAXP5

USB0RXCSRL5

RXCSRL5

USB0RXCSRH5

RXCSRH5

USB0RXCOUNT5

RXCOUNT5

USB0TXTYPE5

TXTYPE5

USB0TXINTERVAL5

TXINTERVAL5

USB0RXTYPE5

RXTYPE5

USB0RXINTERVAL5

RXINTERVAL5

USB0TXMAXP6

TXMAXP6

USB0TXCSRL6

TXCSRL6

USB0TXCSRH6

TXCSRH6

USB0RXMAXP6

RXMAXP6

USB0RXCSRL6

RXCSRL6

USB0RXCSRH6

RXCSRH6

USB0RXCOUNT6

RXCOUNT6

USB0TXTYPE6

TXTYPE6

USB0TXINTERVAL6

TXINTERVAL6

USB0RXTYPE6

RXTYPE6

USB0RXINTERVAL6

RXINTERVAL6

USB0TXMAXP7

TXMAXP7

USB0TXCSRL7

TXCSRL7

USB0TXCSRH7

TXCSRH7

USB0RXMAXP7

RXMAXP7

USB0RXCSRL7

RXCSRL7

USB0RXCSRH7

RXCSRH7

USB0RXCOUNT7

RXCOUNT7

USB0TXTYPE7

TXTYPE7

USB0TXINTERVAL7

TXINTERVAL7

USB0RXTYPE7

RXTYPE7

USB0RXINTERVAL7

RXINTERVAL7

USB0TXMAXP8

TXMAXP8

USB0TXCSRL8

TXCSRL8

USB0TXCSRH8

TXCSRH8

USB0RXMAXP8

RXMAXP8

USB0RXCSRL8

RXCSRL8

USB0RXCSRH8

RXCSRH8

USB0RXCOUNT8

RXCOUNT8

USB0TXTYPE8

TXTYPE8

USB0TXINTERVAL8

TXINTERVAL8

USB0RXTYPE8

RXTYPE8

USB0RXINTERVAL8

RXINTERVAL8

USB0TXMAXP9

TXMAXP9

USB0TXCSRL9

TXCSRL9

USB0TXCSRH9

TXCSRH9

USB0RXMAXP9

RXMAXP9

USB0RXCSRL9

RXCSRL9

USB0RXCSRH9

RXCSRH9

USB0RXCOUNT9

RXCOUNT9

USB0TXTYPE9

TXTYPE9

USB0TXINTERVAL9

TXINTERVAL9

USB0RXTYPE9

RXTYPE9

USB0RXINTERVAL9

RXINTERVAL9

USB0TXMAXP10

TXMAXP10

USB0TXCSRL10

TXCSRL10

USB0TXCSRH10

TXCSRH10

USB0RXMAXP10

RXMAXP10

USB0RXCSRL10

RXCSRL10

USB0RXCSRH10

RXCSRH10

USB0RXCOUNT10

RXCOUNT10

USB0TXTYPE10

TXTYPE10

USB0TXINTERVAL10

TXINTERVAL10

USB0RXTYPE10

RXTYPE10

USB0RXINTERVAL10

RXINTERVAL10

USB0TXMAXP11

TXMAXP11

USB0TXCSRL11

TXCSRL11

USB0TXCSRH11

TXCSRH11

USB0RXMAXP11

RXMAXP11

USB0RXCSRL11

RXCSRL11

USB0RXCSRH11

RXCSRH11

USB0RXCOUNT11

RXCOUNT11

USB0TXTYPE11

TXTYPE11

USB0TXINTERVAL11

TXINTERVAL11

USB0RXTYPE11

RXTYPE11

USB0RXINTERVAL11

RXINTERVAL11

USB0TXMAXP12

TXMAXP12

USB0TXCSRL12

TXCSRL12

USB0TXCSRH12

TXCSRH12

USB0RXMAXP12

RXMAXP12

USB0RXCSRL12

RXCSRL12

USB0RXCSRH12

RXCSRH12

USB0RXCOUNT12

RXCOUNT12

USB0TXTYPE12

TXTYPE12

USB0TXINTERVAL12

TXINTERVAL12

USB0RXTYPE12

RXTYPE12

USB0RXINTERVAL12

RXINTERVAL12

USB0TXMAXP13

TXMAXP13

USB0TXCSRL13

TXCSRL13

USB0TXCSRH13

TXCSRH13

USB0RXMAXP13

RXMAXP13

USB0RXCSRL13

RXCSRL13

USB0RXCSRH13

RXCSRH13

USB0RXCOUNT13

RXCOUNT13

USB0TXTYPE13

TXTYPE13

USB0TXINTERVAL13

TXINTERVAL13

USB0RXTYPE13

RXTYPE13

USB0RXINTERVAL13

RXINTERVAL13

USB0TXMAXP14

TXMAXP14

USB0TXCSRL14

TXCSRL14

USB0TXCSRH14

TXCSRH14

USB0RXMAXP14

RXMAXP14

USB0RXCSRL14

RXCSRL14

USB0RXCSRH14

RXCSRH14

USB0RXCOUNT14

RXCOUNT14

USB0TXTYPE14

TXTYPE14

USB0TXINTERVAL14

TXINTERVAL14

USB0RXTYPE14

RXTYPE14

USB0RXINTERVAL14

RXINTERVAL14

USB0TXMAXP15

TXMAXP15

USB0TXCSRL15

TXCSRL15

USB0TXCSRH15

TXCSRH15

USB0RXMAXP15

RXMAXP15

USB0RXCSRL15

RXCSRL15

USB0RXCSRH15

RXCSRH15

USB0RXCOUNT15

RXCOUNT15

USB0TXTYPE15

TXTYPE15

USB0TXINTERVAL15

TXINTERVAL15

USB0RXTYPE15

RXTYPE15

USB0RXINTERVAL15

RXINTERVAL15

USB0TXIS

TXIS

USB0FIFO0

FIFO0

USB0FIFO1

FIFO1

USB0FIFO2

FIFO2

USB0FIFO3

FIFO3

USB0FIFO4

FIFO4

USB0RQPKTCOUNT1

RQPKTCOUNT1

USB0RQPKTCOUNT2

RQPKTCOUNT2

USB0RQPKTCOUNT3

RQPKTCOUNT3

USB0RQPKTCOUNT4

RQPKTCOUNT4

USB0RQPKTCOUNT5

RQPKTCOUNT5

USB0RQPKTCOUNT6

RQPKTCOUNT6

USB0RQPKTCOUNT7

RQPKTCOUNT7

USB0RQPKTCOUNT8

RQPKTCOUNT8

USB0RQPKTCOUNT9

RQPKTCOUNT9

USB0RQPKTCOUNT10

RQPKTCOUNT10

USB0RQPKTCOUNT11

RQPKTCOUNT11

USB0RQPKTCOUNT12

RQPKTCOUNT12

USB0RQPKTCOUNT13

RQPKTCOUNT13

USB0RQPKTCOUNT14

RQPKTCOUNT14

USB0RQPKTCOUNT15

RQPKTCOUNT15

USB0FIFO5

FIFO5

USB0RXDPKTBUFDIS

RXDPKTBUFDIS

USB0TXDPKTBUFDIS

TXDPKTBUFDIS

USB0FIFO6

FIFO6

USB0FIFO7

FIFO7

USB0RXIS

RXIS

USB0FIFO8

FIFO8

USB0EPC

EPC

USB0EPCRIS

EPCRIS

USB0EPCIM

EPCIM

USB0EPCISC

EPCISC

USB0DRRIS

DRRIS

USB0DRIM

DRIM

USB0DRISC

DRISC

USB0GPCS

GPCS

USB0VDC

VDC

USB0VDCRIS

VDCRIS

USB0VDCIM

VDCIM

USB0VDCISC

VDCISC

USB0FIFO9

FIFO9

USB0IDVRIS

IDVRIS

USB0IDVIM

IDVIM

USB0IDVISC

IDVISC

USB0DMASEL

DMASEL

USB0FIFO10

FIFO10

USB0FIFO11

FIFO11

USB0FIFO12

FIFO12

USB0FIFO13

FIFO13

USB0FIFO14

FIFO14

USB0FIFO15

FIFO15

USB0TXIE

TXIE

USB0DEVCTL

DEVCTL

USB0TXFIFOSZ

TXFIFOSZ

USB0RXFIFOSZ

RXFIFOSZ

USB0TXFIFOADD

TXFIFOADD

USB0RXFIFOADD

RXFIFOADD

USB0CONTIM

CONTIM

USB0VPLEN

VPLEN

USB0FSEOF

FSEOF

USB0LSEOF

LSEOF

USB0RXIE

RXIE

USB0TXFUNCADDR0

TXFUNCADDR0

USB0TXHUBADDR0

TXHUBADDR0

USB0TXHUBPORT0

TXHUBPORT0

USB0TXFUNCADDR1

TXFUNCADDR1

USB0TXHUBADDR1

TXHUBADDR1

USB0TXHUBPORT1

TXHUBPORT1

USB0RXFUNCADDR1

RXFUNCADDR1

USB0RXHUBADDR1

RXHUBADDR1

USB0RXHUBPORT1

RXHUBPORT1

USB0TXFUNCADDR2

TXFUNCADDR2

USB0TXHUBADDR2

TXHUBADDR2

USB0TXHUBPORT2

TXHUBPORT2

USB0RXFUNCADDR2

RXFUNCADDR2

USB0RXHUBADDR2

RXHUBADDR2

USB0RXHUBPORT2

RXHUBPORT2

USB0TXFUNCADDR3

TXFUNCADDR3

USB0TXHUBADDR3

TXHUBADDR3

USB0TXHUBPORT3

TXHUBPORT3

USB0RXFUNCADDR3

RXFUNCADDR3

USB0RXHUBADDR3

RXHUBADDR3

USB0RXHUBPORT3

RXHUBPORT3

USB0IS

IS

USB0TXFUNCADDR4

TXFUNCADDR4

USB0TXHUBADDR4

TXHUBADDR4

USB0TXHUBPORT4

TXHUBPORT4

USB0RXFUNCADDR4

RXFUNCADDR4

USB0RXHUBADDR4

RXHUBADDR4

USB0RXHUBPORT4

RXHUBPORT4

USB0TXFUNCADDR5

TXFUNCADDR5

USB0TXHUBADDR5

TXHUBADDR5

USB0TXHUBPORT5

TXHUBPORT5

USB0RXFUNCADDR5

RXFUNCADDR5

USB0RXHUBADDR5

RXHUBADDR5

USB0RXHUBPORT5

RXHUBPORT5

USB0IE

IE

USB0TXFUNCADDR6

TXFUNCADDR6

USB0TXHUBADDR6

TXHUBADDR6

USB0TXHUBPORT6

TXHUBPORT6

USB0RXFUNCADDR6

RXFUNCADDR6

USB0RXHUBADDR6

RXHUBADDR6

USB0RXHUBPORT6

RXHUBPORT6

USB0TXFUNCADDR7

TXFUNCADDR7

USB0TXHUBADDR7

TXHUBADDR7

USB0TXHUBPORT7

TXHUBPORT7

USB0RXFUNCADDR7

RXFUNCADDR7

USB0RXHUBADDR7

RXHUBADDR7

USB0RXHUBPORT7

RXHUBPORT7

USB0FRAME

FRAME

USB0TXFUNCADDR8

TXFUNCADDR8

USB0TXHUBADDR8

TXHUBADDR8

USB0TXHUBPORT8

TXHUBPORT8

USB0RXFUNCADDR8

RXFUNCADDR8

USB0RXHUBADDR8

RXHUBADDR8

USB0RXHUBPORT8

RXHUBPORT8

USB0TXFUNCADDR9

TXFUNCADDR9

USB0TXHUBADDR9

TXHUBADDR9

USB0TXHUBPORT9

TXHUBPORT9

USB0RXFUNCADDR9

RXFUNCADDR9

USB0RXHUBADDR9

RXHUBADDR9

USB0RXHUBPORT9

RXHUBPORT9

USB0TXFUNCADDR10

TXFUNCADDR10

USB0TXHUBADDR10

TXHUBADDR10

USB0TXHUBPORT10

TXHUBPORT10

USB0RXFUNCADDR10

RXFUNCADDR10

USB0RXHUBADDR10

RXHUBADDR10

USB0RXHUBPORT10

RXHUBPORT10

USB0TXFUNCADDR11

TXFUNCADDR11

USB0TXHUBADDR11

TXHUBADDR11

USB0TXHUBPORT11

TXHUBPORT11

USB0RXFUNCADDR11

RXFUNCADDR11

USB0RXHUBADDR11

RXHUBADDR11

USB0RXHUBPORT11

RXHUBPORT11

USB0EPIDX

EPIDX

USB0TXFUNCADDR12

TXFUNCADDR12

USB0TXHUBADDR12

TXHUBADDR12

USB0TXHUBPORT12

TXHUBPORT12

USB0RXFUNCADDR12

RXFUNCADDR12

USB0RXHUBADDR12

RXHUBADDR12

USB0RXHUBPORT12

RXHUBPORT12

USB0TXFUNCADDR13

TXFUNCADDR13

USB0TXHUBADDR13

TXHUBADDR13

USB0TXHUBPORT13

TXHUBPORT13

USB0RXFUNCADDR13

RXFUNCADDR13

USB0RXHUBADDR13

RXHUBADDR13

USB0RXHUBPORT13

RXHUBPORT13

USB0TEST

TEST

USB0TXFUNCADDR14

TXFUNCADDR14

USB0TXHUBADDR14

TXHUBADDR14

USB0TXHUBPORT14

TXHUBPORT14

USB0RXFUNCADDR14

RXFUNCADDR14

USB0RXHUBADDR14

RXHUBADDR14

USB0RXHUBPORT14

RXHUBPORT14

USB0TXFUNCADDR15

TXFUNCADDR15

USB0TXHUBADDR15

TXHUBADDR15

USB0TXHUBPORT15

TXHUBPORT15

USB0RXFUNCADDR15

RXFUNCADDR15

USB0RXHUBADDR15

RXHUBADDR15

USB0RXHUBPORT15

RXHUBPORT15


USB0FADDR

USB Device Functional Address
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FADDR USB0FADDR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_FADDR

USB_FADDR : Function Address
bits : 0 - 6 (7 bit)


FADDR

USB Device Functional Address
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FADDR FADDR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_FADDR

USB_FADDR : Function Address
bits : 0 - 6 (7 bit)


USB0POWER

USB Power
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0POWER USB0POWER read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_POWER_PWRDNPHY USB_POWER_SUSPEND USB_POWER_RESUME USB_POWER_RESET USB_POWER_SOFTCONN USB_POWER_ISOUP

USB_POWER_PWRDNPHY : Power Down PHY
bits : 0 - 0 (1 bit)

USB_POWER_SUSPEND : SUSPEND Mode
bits : 1 - 2 (2 bit)

USB_POWER_RESUME : RESUME Signaling
bits : 2 - 4 (3 bit)

USB_POWER_RESET : RESET Signaling
bits : 3 - 6 (4 bit)

USB_POWER_SOFTCONN : Soft Connect/Disconnect
bits : 6 - 12 (7 bit)

USB_POWER_ISOUP : Isochronous Update
bits : 7 - 14 (8 bit)


POWER

USB Power
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

POWER POWER read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_POWER_PWRDNPHY USB_POWER_SUSPEND USB_POWER_RESUME USB_POWER_RESET USB_POWER_SOFTCONN USB_POWER_ISOUP

USB_POWER_PWRDNPHY : Power Down PHY
bits : 0 - 0 (1 bit)

USB_POWER_SUSPEND : SUSPEND Mode
bits : 1 - 2 (2 bit)

USB_POWER_RESUME : RESUME Signaling
bits : 2 - 4 (3 bit)

USB_POWER_RESET : RESET Signaling
bits : 3 - 6 (4 bit)

USB_POWER_SOFTCONN : Soft Connect/Disconnect
bits : 6 - 12 (7 bit)

USB_POWER_ISOUP : Isochronous Update
bits : 7 - 14 (8 bit)


USB0CSRL0

USB Control and Status Endpoint 0 Low
address_offset : 0x102 Bytes (0x0)
size : 8 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

USB0CSRL0 USB0CSRL0 write-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_CSRL0_RXRDY USB_CSRL0_TXRDY USB_CSRL0_STALLED USB_CSRL0_DATAEND USB_CSRL0_SETEND USB_CSRL0_STALL USB_CSRL0_RXRDYC USB_CSRL0_SETENDC

USB_CSRL0_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)
access : write-only

USB_CSRL0_TXRDY : Transmit Packet Ready
bits : 1 - 2 (2 bit)
access : write-only

USB_CSRL0_STALLED : Endpoint Stalled
bits : 2 - 4 (3 bit)
access : write-only

USB_CSRL0_DATAEND : Data End
bits : 3 - 6 (4 bit)
access : write-only

USB_CSRL0_SETEND : Setup End
bits : 4 - 8 (5 bit)
access : write-only

USB_CSRL0_STALL : Send Stall
bits : 5 - 10 (6 bit)
access : write-only

USB_CSRL0_RXRDYC : RXRDY Clear
bits : 6 - 12 (7 bit)
access : write-only

USB_CSRL0_SETENDC : Setup End Clear
bits : 7 - 14 (8 bit)
access : write-only


CSRL0

USB Control and Status Endpoint 0 Low
address_offset : 0x102 Bytes (0x0)
size : 8 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CSRL0 CSRL0 write-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_CSRL0_RXRDY USB_CSRL0_TXRDY USB_CSRL0_STALLED USB_CSRL0_DATAEND USB_CSRL0_SETUP USB_CSRL0_SETEND USB_CSRL0_ERROR USB_CSRL0_STALL USB_CSRL0_REQPKT USB_CSRL0_RXRDYC USB_CSRL0_STATUS USB_CSRL0_SETENDC USB_CSRL0_NAKTO

USB_CSRL0_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)
access : write-only

USB_CSRL0_TXRDY : Transmit Packet Ready
bits : 1 - 2 (2 bit)
access : write-only

USB_CSRL0_STALLED : Endpoint Stalled
bits : 2 - 4 (3 bit)
access : write-only

USB_CSRL0_DATAEND : Data End
bits : 3 - 6 (4 bit)
access : write-only

USB_CSRL0_SETUP : Setup Packet
bits : 3 - 6 (4 bit)
access : write-only

USB_CSRL0_SETEND : Setup End
bits : 4 - 8 (5 bit)
access : write-only

USB_CSRL0_ERROR : Error
bits : 4 - 8 (5 bit)
access : write-only

USB_CSRL0_STALL : Send Stall
bits : 5 - 10 (6 bit)
access : write-only

USB_CSRL0_REQPKT : Request Packet
bits : 5 - 10 (6 bit)
access : write-only

USB_CSRL0_RXRDYC : RXRDY Clear
bits : 6 - 12 (7 bit)
access : write-only

USB_CSRL0_STATUS : STATUS Packet
bits : 6 - 12 (7 bit)
access : write-only

USB_CSRL0_SETENDC : Setup End Clear
bits : 7 - 14 (8 bit)
access : write-only

USB_CSRL0_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)
access : write-only


USB0CSRH0

USB Control and Status Endpoint 0 High
address_offset : 0x103 Bytes (0x0)
size : 8 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

USB0CSRH0 USB0CSRH0 write-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_CSRH0_FLUSH USB_CSRH0_DT USB_CSRH0_DTWE

USB_CSRH0_FLUSH : Flush FIFO
bits : 0 - 0 (1 bit)
access : write-only

USB_CSRH0_DT : Data Toggle
bits : 1 - 2 (2 bit)
access : write-only

USB_CSRH0_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)
access : write-only


CSRH0

USB Control and Status Endpoint 0 High
address_offset : 0x103 Bytes (0x0)
size : 8 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CSRH0 CSRH0 write-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_CSRH0_FLUSH USB_CSRH0_DT USB_CSRH0_DTWE

USB_CSRH0_FLUSH : Flush FIFO
bits : 0 - 0 (1 bit)
access : write-only

USB_CSRH0_DT : Data Toggle
bits : 1 - 2 (2 bit)
access : write-only

USB_CSRH0_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)
access : write-only


USB0COUNT0

USB Receive Byte Count Endpoint 0
address_offset : 0x108 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0COUNT0 USB0COUNT0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_COUNT0_COUNT

USB_COUNT0_COUNT : FIFO Count
bits : 0 - 6 (7 bit)


COUNT0

USB Receive Byte Count Endpoint 0
address_offset : 0x108 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

COUNT0 COUNT0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_COUNT0_COUNT

USB_COUNT0_COUNT : FIFO Count
bits : 0 - 6 (7 bit)


USB0TYPE0

USB Type Endpoint 0
address_offset : 0x10A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TYPE0 USB0TYPE0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TYPE0_SPEED

USB_TYPE0_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x2 : USB_TYPE0_SPEED_FULL

Full

0x3 : USB_TYPE0_SPEED_LOW

Low

End of enumeration elements list.


TYPE0

USB Type Endpoint 0
address_offset : 0x10A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TYPE0 TYPE0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TYPE0_SPEED

USB_TYPE0_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x2 : USB_TYPE0_SPEED_FULL

Full

0x3 : USB_TYPE0_SPEED_LOW

Low

End of enumeration elements list.


USB0NAKLMT

USB NAK Limit
address_offset : 0x10B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0NAKLMT USB0NAKLMT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_NAKLMT_NAKLMT

USB_NAKLMT_NAKLMT : EP0 NAK Limit
bits : 0 - 4 (5 bit)


NAKLMT

USB NAK Limit
address_offset : 0x10B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NAKLMT NAKLMT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_NAKLMT_NAKLMT

USB_NAKLMT_NAKLMT : EP0 NAK Limit
bits : 0 - 4 (5 bit)


USB0TXMAXP1

USB Maximum Transmit Data Endpoint 1
address_offset : 0x110 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP1 USB0TXMAXP1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP1_MAXLOAD

USB_TXMAXP1_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP1

USB Maximum Transmit Data Endpoint 1
address_offset : 0x110 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP1 TXMAXP1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP1_MAXLOAD

USB_TXMAXP1_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL1

USB Transmit Control and Status Endpoint 1 Low
address_offset : 0x112 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL1 USB0TXCSRL1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL1_TXRDY USB_TXCSRL1_FIFONE USB_TXCSRL1_ERROR USB_TXCSRL1_FLUSH USB_TXCSRL1_SETUP USB_TXCSRL1_STALLED USB_TXCSRL1_CLRDT USB_TXCSRL1_NAKTO

USB_TXCSRL1_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL1_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL1_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL1_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL1_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL1_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL1_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL1_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL1

USB Transmit Control and Status Endpoint 1 Low
address_offset : 0x112 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL1 TXCSRL1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL1_TXRDY USB_TXCSRL1_FIFONE USB_TXCSRL1_ERROR USB_TXCSRL1_UNDRN USB_TXCSRL1_FLUSH USB_TXCSRL1_SETUP USB_TXCSRL1_STALL USB_TXCSRL1_STALLED USB_TXCSRL1_CLRDT USB_TXCSRL1_NAKTO

USB_TXCSRL1_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL1_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL1_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL1_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL1_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL1_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL1_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL1_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL1_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL1_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH1

USB Transmit Control and Status Endpoint 1 High
address_offset : 0x113 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH1 USB0TXCSRH1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH1_DT USB_TXCSRH1_DTWE USB_TXCSRH1_DMAMOD USB_TXCSRH1_FDT USB_TXCSRH1_DMAEN USB_TXCSRH1_MODE USB_TXCSRH1_ISO USB_TXCSRH1_AUTOSET

USB_TXCSRH1_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH1_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH1_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH1_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH1_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH1_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH1_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH1_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH1

USB Transmit Control and Status Endpoint 1 High
address_offset : 0x113 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH1 TXCSRH1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH1_DT USB_TXCSRH1_DTWE USB_TXCSRH1_DMAMOD USB_TXCSRH1_FDT USB_TXCSRH1_DMAEN USB_TXCSRH1_MODE USB_TXCSRH1_ISO USB_TXCSRH1_AUTOSET

USB_TXCSRH1_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH1_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH1_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH1_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH1_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH1_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH1_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH1_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP1

USB Maximum Receive Data Endpoint 1
address_offset : 0x114 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP1 USB0RXMAXP1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP1_MAXLOAD

USB_RXMAXP1_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP1

USB Maximum Receive Data Endpoint 1
address_offset : 0x114 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP1 RXMAXP1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP1_MAXLOAD

USB_RXMAXP1_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL1

USB Receive Control and Status Endpoint 1 Low
address_offset : 0x116 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL1 USB0RXCSRL1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL1_RXRDY USB_RXCSRL1_FULL USB_RXCSRL1_OVER USB_RXCSRL1_DATAERR USB_RXCSRL1_FLUSH USB_RXCSRL1_STALL USB_RXCSRL1_STALLED USB_RXCSRL1_CLRDT

USB_RXCSRL1_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL1_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL1_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL1_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL1_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL1_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL1_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL1_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL1

USB Receive Control and Status Endpoint 1 Low
address_offset : 0x116 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL1 RXCSRL1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL1_RXRDY USB_RXCSRL1_FULL USB_RXCSRL1_OVER USB_RXCSRL1_ERROR USB_RXCSRL1_DATAERR USB_RXCSRL1_NAKTO USB_RXCSRL1_FLUSH USB_RXCSRL1_STALL USB_RXCSRL1_REQPKT USB_RXCSRL1_STALLED USB_RXCSRL1_CLRDT

USB_RXCSRL1_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL1_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL1_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL1_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL1_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL1_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL1_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL1_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL1_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL1_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL1_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH1

USB Receive Control and Status Endpoint 1 High
address_offset : 0x117 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH1 USB0RXCSRH1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH1_DT USB_RXCSRH1_DTWE USB_RXCSRH1_DMAMOD USB_RXCSRH1_PIDERR USB_RXCSRH1_DMAEN USB_RXCSRH1_AUTORQ USB_RXCSRH1_AUTOCL

USB_RXCSRH1_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH1_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH1_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH1_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH1_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH1_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH1_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH1

USB Receive Control and Status Endpoint 1 High
address_offset : 0x117 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH1 RXCSRH1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH1_DT USB_RXCSRH1_DTWE USB_RXCSRH1_DMAMOD USB_RXCSRH1_PIDERR USB_RXCSRH1_DISNYET USB_RXCSRH1_DMAEN USB_RXCSRH1_AUTORQ USB_RXCSRH1_ISO USB_RXCSRH1_AUTOCL

USB_RXCSRH1_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH1_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH1_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH1_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH1_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH1_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH1_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH1_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH1_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT1

USB Receive Byte Count Endpoint 1
address_offset : 0x118 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT1 USB0RXCOUNT1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT1_COUNT

USB_RXCOUNT1_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT1

USB Receive Byte Count Endpoint 1
address_offset : 0x118 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT1 RXCOUNT1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT1_COUNT

USB_RXCOUNT1_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE1

USB Host Transmit Configure Type Endpoint 1
address_offset : 0x11A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE1 USB0TXTYPE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE1_TEP USB_TXTYPE1_PROTO USB_TXTYPE1_SPEED

USB_TXTYPE1_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE1_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE1_PROTO_CTRL

Control

0x1 : USB_TXTYPE1_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE1_PROTO_BULK

Bulk

0x3 : USB_TXTYPE1_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE1_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE1_SPEED_DFLT

Default

0x2 : USB_TXTYPE1_SPEED_FULL

Full

0x3 : USB_TXTYPE1_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE1

USB Host Transmit Configure Type Endpoint 1
address_offset : 0x11A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE1 TXTYPE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE1_TEP USB_TXTYPE1_PROTO USB_TXTYPE1_SPEED

USB_TXTYPE1_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE1_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE1_PROTO_CTRL

Control

0x1 : USB_TXTYPE1_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE1_PROTO_BULK

Bulk

0x3 : USB_TXTYPE1_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE1_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE1_SPEED_DFLT

Default

0x2 : USB_TXTYPE1_SPEED_FULL

Full

0x3 : USB_TXTYPE1_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL1

USB Host Transmit Interval Endpoint 1
address_offset : 0x11B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL1 USB0TXINTERVAL1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL1_TXPOLL

USB_TXINTERVAL1_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL1

USB Host Transmit Interval Endpoint 1
address_offset : 0x11B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL1 TXINTERVAL1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL1_TXPOLL USB_TXINTERVAL1_NAKLMT

USB_TXINTERVAL1_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL1_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE1

USB Host Configure Receive Type Endpoint 1
address_offset : 0x11C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE1 USB0RXTYPE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE1_TEP USB_RXTYPE1_PROTO USB_RXTYPE1_SPEED

USB_RXTYPE1_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE1_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE1_PROTO_CTRL

Control

0x1 : USB_RXTYPE1_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE1_PROTO_BULK

Bulk

0x3 : USB_RXTYPE1_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE1_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE1_SPEED_DFLT

Default

0x2 : USB_RXTYPE1_SPEED_FULL

Full

0x3 : USB_RXTYPE1_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE1

USB Host Configure Receive Type Endpoint 1
address_offset : 0x11C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE1 RXTYPE1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE1_TEP USB_RXTYPE1_PROTO USB_RXTYPE1_SPEED

USB_RXTYPE1_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE1_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE1_PROTO_CTRL

Control

0x1 : USB_RXTYPE1_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE1_PROTO_BULK

Bulk

0x3 : USB_RXTYPE1_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE1_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE1_SPEED_DFLT

Default

0x2 : USB_RXTYPE1_SPEED_FULL

Full

0x3 : USB_RXTYPE1_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL1

USB Host Receive Polling Interval Endpoint 1
address_offset : 0x11D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL1 USB0RXINTERVAL1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL1_TXPOLL

USB_RXINTERVAL1_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL1

USB Host Receive Polling Interval Endpoint 1
address_offset : 0x11D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL1 RXINTERVAL1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL1_TXPOLL USB_RXINTERVAL1_NAKLMT

USB_RXINTERVAL1_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL1_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP2

USB Maximum Transmit Data Endpoint 2
address_offset : 0x120 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP2 USB0TXMAXP2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP2_MAXLOAD

USB_TXMAXP2_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP2

USB Maximum Transmit Data Endpoint 2
address_offset : 0x120 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP2 TXMAXP2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP2_MAXLOAD

USB_TXMAXP2_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL2

USB Transmit Control and Status Endpoint 2 Low
address_offset : 0x122 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL2 USB0TXCSRL2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL2_TXRDY USB_TXCSRL2_FIFONE USB_TXCSRL2_ERROR USB_TXCSRL2_FLUSH USB_TXCSRL2_SETUP USB_TXCSRL2_STALLED USB_TXCSRL2_CLRDT USB_TXCSRL2_NAKTO

USB_TXCSRL2_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL2_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL2_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL2_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL2_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL2_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL2_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL2_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL2

USB Transmit Control and Status Endpoint 2 Low
address_offset : 0x122 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL2 TXCSRL2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL2_TXRDY USB_TXCSRL2_FIFONE USB_TXCSRL2_ERROR USB_TXCSRL2_UNDRN USB_TXCSRL2_FLUSH USB_TXCSRL2_SETUP USB_TXCSRL2_STALL USB_TXCSRL2_STALLED USB_TXCSRL2_CLRDT USB_TXCSRL2_NAKTO

USB_TXCSRL2_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL2_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL2_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL2_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL2_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL2_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL2_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL2_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL2_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL2_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH2

USB Transmit Control and Status Endpoint 2 High
address_offset : 0x123 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH2 USB0TXCSRH2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH2_DT USB_TXCSRH2_DTWE USB_TXCSRH2_DMAMOD USB_TXCSRH2_FDT USB_TXCSRH2_DMAEN USB_TXCSRH2_MODE USB_TXCSRH2_ISO USB_TXCSRH2_AUTOSET

USB_TXCSRH2_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH2_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH2_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH2_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH2_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH2_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH2_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH2_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH2

USB Transmit Control and Status Endpoint 2 High
address_offset : 0x123 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH2 TXCSRH2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH2_DT USB_TXCSRH2_DTWE USB_TXCSRH2_DMAMOD USB_TXCSRH2_FDT USB_TXCSRH2_DMAEN USB_TXCSRH2_MODE USB_TXCSRH2_ISO USB_TXCSRH2_AUTOSET

USB_TXCSRH2_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH2_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH2_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH2_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH2_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH2_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH2_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH2_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP2

USB Maximum Receive Data Endpoint 2
address_offset : 0x124 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP2 USB0RXMAXP2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP2_MAXLOAD

USB_RXMAXP2_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP2

USB Maximum Receive Data Endpoint 2
address_offset : 0x124 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP2 RXMAXP2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP2_MAXLOAD

USB_RXMAXP2_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL2

USB Receive Control and Status Endpoint 2 Low
address_offset : 0x126 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL2 USB0RXCSRL2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL2_RXRDY USB_RXCSRL2_FULL USB_RXCSRL2_OVER USB_RXCSRL2_DATAERR USB_RXCSRL2_FLUSH USB_RXCSRL2_STALL USB_RXCSRL2_STALLED USB_RXCSRL2_CLRDT

USB_RXCSRL2_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL2_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL2_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL2_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL2_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL2_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL2_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL2_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL2

USB Receive Control and Status Endpoint 2 Low
address_offset : 0x126 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL2 RXCSRL2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL2_RXRDY USB_RXCSRL2_FULL USB_RXCSRL2_OVER USB_RXCSRL2_ERROR USB_RXCSRL2_DATAERR USB_RXCSRL2_NAKTO USB_RXCSRL2_FLUSH USB_RXCSRL2_STALL USB_RXCSRL2_REQPKT USB_RXCSRL2_STALLED USB_RXCSRL2_CLRDT

USB_RXCSRL2_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL2_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL2_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL2_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL2_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL2_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL2_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL2_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL2_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL2_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL2_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH2

USB Receive Control and Status Endpoint 2 High
address_offset : 0x127 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH2 USB0RXCSRH2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH2_DT USB_RXCSRH2_DTWE USB_RXCSRH2_DMAMOD USB_RXCSRH2_PIDERR USB_RXCSRH2_DMAEN USB_RXCSRH2_AUTORQ USB_RXCSRH2_AUTOCL

USB_RXCSRH2_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH2_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH2_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH2_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH2_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH2_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH2_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH2

USB Receive Control and Status Endpoint 2 High
address_offset : 0x127 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH2 RXCSRH2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH2_DT USB_RXCSRH2_DTWE USB_RXCSRH2_DMAMOD USB_RXCSRH2_PIDERR USB_RXCSRH2_DISNYET USB_RXCSRH2_DMAEN USB_RXCSRH2_AUTORQ USB_RXCSRH2_ISO USB_RXCSRH2_AUTOCL

USB_RXCSRH2_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH2_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH2_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH2_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH2_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH2_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH2_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH2_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH2_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT2

USB Receive Byte Count Endpoint 2
address_offset : 0x128 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT2 USB0RXCOUNT2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT2_COUNT

USB_RXCOUNT2_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT2

USB Receive Byte Count Endpoint 2
address_offset : 0x128 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT2 RXCOUNT2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT2_COUNT

USB_RXCOUNT2_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE2

USB Host Transmit Configure Type Endpoint 2
address_offset : 0x12A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE2 USB0TXTYPE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE2_TEP USB_TXTYPE2_PROTO USB_TXTYPE2_SPEED

USB_TXTYPE2_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE2_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE2_PROTO_CTRL

Control

0x1 : USB_TXTYPE2_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE2_PROTO_BULK

Bulk

0x3 : USB_TXTYPE2_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE2_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE2_SPEED_DFLT

Default

0x2 : USB_TXTYPE2_SPEED_FULL

Full

0x3 : USB_TXTYPE2_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE2

USB Host Transmit Configure Type Endpoint 2
address_offset : 0x12A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE2 TXTYPE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE2_TEP USB_TXTYPE2_PROTO USB_TXTYPE2_SPEED

USB_TXTYPE2_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE2_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE2_PROTO_CTRL

Control

0x1 : USB_TXTYPE2_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE2_PROTO_BULK

Bulk

0x3 : USB_TXTYPE2_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE2_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE2_SPEED_DFLT

Default

0x2 : USB_TXTYPE2_SPEED_FULL

Full

0x3 : USB_TXTYPE2_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL2

USB Host Transmit Interval Endpoint 2
address_offset : 0x12B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL2 USB0TXINTERVAL2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL2_TXPOLL

USB_TXINTERVAL2_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL2

USB Host Transmit Interval Endpoint 2
address_offset : 0x12B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL2 TXINTERVAL2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL2_TXPOLL USB_TXINTERVAL2_NAKLMT

USB_TXINTERVAL2_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL2_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE2

USB Host Configure Receive Type Endpoint 2
address_offset : 0x12C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE2 USB0RXTYPE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE2_TEP USB_RXTYPE2_PROTO USB_RXTYPE2_SPEED

USB_RXTYPE2_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE2_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE2_PROTO_CTRL

Control

0x1 : USB_RXTYPE2_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE2_PROTO_BULK

Bulk

0x3 : USB_RXTYPE2_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE2_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE2_SPEED_DFLT

Default

0x2 : USB_RXTYPE2_SPEED_FULL

Full

0x3 : USB_RXTYPE2_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE2

USB Host Configure Receive Type Endpoint 2
address_offset : 0x12C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE2 RXTYPE2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE2_TEP USB_RXTYPE2_PROTO USB_RXTYPE2_SPEED

USB_RXTYPE2_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE2_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE2_PROTO_CTRL

Control

0x1 : USB_RXTYPE2_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE2_PROTO_BULK

Bulk

0x3 : USB_RXTYPE2_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE2_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE2_SPEED_DFLT

Default

0x2 : USB_RXTYPE2_SPEED_FULL

Full

0x3 : USB_RXTYPE2_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL2

USB Host Receive Polling Interval Endpoint 2
address_offset : 0x12D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL2 USB0RXINTERVAL2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL2_TXPOLL

USB_RXINTERVAL2_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL2

USB Host Receive Polling Interval Endpoint 2
address_offset : 0x12D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL2 RXINTERVAL2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL2_TXPOLL USB_RXINTERVAL2_NAKLMT

USB_RXINTERVAL2_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL2_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP3

USB Maximum Transmit Data Endpoint 3
address_offset : 0x130 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP3 USB0TXMAXP3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP3_MAXLOAD

USB_TXMAXP3_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP3

USB Maximum Transmit Data Endpoint 3
address_offset : 0x130 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP3 TXMAXP3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP3_MAXLOAD

USB_TXMAXP3_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL3

USB Transmit Control and Status Endpoint 3 Low
address_offset : 0x132 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL3 USB0TXCSRL3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL3_TXRDY USB_TXCSRL3_FIFONE USB_TXCSRL3_ERROR USB_TXCSRL3_FLUSH USB_TXCSRL3_SETUP USB_TXCSRL3_STALLED USB_TXCSRL3_CLRDT USB_TXCSRL3_NAKTO

USB_TXCSRL3_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL3_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL3_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL3_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL3_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL3_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL3_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL3_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL3

USB Transmit Control and Status Endpoint 3 Low
address_offset : 0x132 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL3 TXCSRL3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL3_TXRDY USB_TXCSRL3_FIFONE USB_TXCSRL3_ERROR USB_TXCSRL3_UNDRN USB_TXCSRL3_FLUSH USB_TXCSRL3_SETUP USB_TXCSRL3_STALL USB_TXCSRL3_STALLED USB_TXCSRL3_CLRDT USB_TXCSRL3_NAKTO

USB_TXCSRL3_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL3_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL3_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL3_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL3_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL3_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL3_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL3_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL3_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL3_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH3

USB Transmit Control and Status Endpoint 3 High
address_offset : 0x133 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH3 USB0TXCSRH3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH3_DT USB_TXCSRH3_DTWE USB_TXCSRH3_DMAMOD USB_TXCSRH3_FDT USB_TXCSRH3_DMAEN USB_TXCSRH3_MODE USB_TXCSRH3_ISO USB_TXCSRH3_AUTOSET

USB_TXCSRH3_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH3_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH3_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH3_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH3_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH3_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH3_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH3_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH3

USB Transmit Control and Status Endpoint 3 High
address_offset : 0x133 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH3 TXCSRH3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH3_DT USB_TXCSRH3_DTWE USB_TXCSRH3_DMAMOD USB_TXCSRH3_FDT USB_TXCSRH3_DMAEN USB_TXCSRH3_MODE USB_TXCSRH3_ISO USB_TXCSRH3_AUTOSET

USB_TXCSRH3_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH3_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH3_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH3_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH3_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH3_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH3_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH3_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP3

USB Maximum Receive Data Endpoint 3
address_offset : 0x134 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP3 USB0RXMAXP3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP3_MAXLOAD

USB_RXMAXP3_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP3

USB Maximum Receive Data Endpoint 3
address_offset : 0x134 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP3 RXMAXP3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP3_MAXLOAD

USB_RXMAXP3_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL3

USB Receive Control and Status Endpoint 3 Low
address_offset : 0x136 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL3 USB0RXCSRL3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL3_RXRDY USB_RXCSRL3_FULL USB_RXCSRL3_OVER USB_RXCSRL3_DATAERR USB_RXCSRL3_FLUSH USB_RXCSRL3_STALL USB_RXCSRL3_STALLED USB_RXCSRL3_CLRDT

USB_RXCSRL3_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL3_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL3_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL3_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL3_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL3_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL3_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL3_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL3

USB Receive Control and Status Endpoint 3 Low
address_offset : 0x136 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL3 RXCSRL3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL3_RXRDY USB_RXCSRL3_FULL USB_RXCSRL3_OVER USB_RXCSRL3_ERROR USB_RXCSRL3_DATAERR USB_RXCSRL3_NAKTO USB_RXCSRL3_FLUSH USB_RXCSRL3_STALL USB_RXCSRL3_REQPKT USB_RXCSRL3_STALLED USB_RXCSRL3_CLRDT

USB_RXCSRL3_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL3_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL3_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL3_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL3_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL3_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL3_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL3_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL3_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL3_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL3_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH3

USB Receive Control and Status Endpoint 3 High
address_offset : 0x137 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH3 USB0RXCSRH3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH3_DT USB_RXCSRH3_DTWE USB_RXCSRH3_DMAMOD USB_RXCSRH3_PIDERR USB_RXCSRH3_DMAEN USB_RXCSRH3_AUTORQ USB_RXCSRH3_AUTOCL

USB_RXCSRH3_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH3_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH3_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH3_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH3_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH3_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH3_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH3

USB Receive Control and Status Endpoint 3 High
address_offset : 0x137 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH3 RXCSRH3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH3_DT USB_RXCSRH3_DTWE USB_RXCSRH3_DMAMOD USB_RXCSRH3_PIDERR USB_RXCSRH3_DISNYET USB_RXCSRH3_DMAEN USB_RXCSRH3_AUTORQ USB_RXCSRH3_ISO USB_RXCSRH3_AUTOCL

USB_RXCSRH3_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH3_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH3_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH3_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH3_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH3_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH3_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH3_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH3_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT3

USB Receive Byte Count Endpoint 3
address_offset : 0x138 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT3 USB0RXCOUNT3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT3_COUNT

USB_RXCOUNT3_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT3

USB Receive Byte Count Endpoint 3
address_offset : 0x138 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT3 RXCOUNT3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT3_COUNT

USB_RXCOUNT3_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE3

USB Host Transmit Configure Type Endpoint 3
address_offset : 0x13A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE3 USB0TXTYPE3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE3_TEP USB_TXTYPE3_PROTO USB_TXTYPE3_SPEED

USB_TXTYPE3_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE3_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE3_PROTO_CTRL

Control

0x1 : USB_TXTYPE3_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE3_PROTO_BULK

Bulk

0x3 : USB_TXTYPE3_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE3_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE3_SPEED_DFLT

Default

0x2 : USB_TXTYPE3_SPEED_FULL

Full

0x3 : USB_TXTYPE3_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE3

USB Host Transmit Configure Type Endpoint 3
address_offset : 0x13A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE3 TXTYPE3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE3_TEP USB_TXTYPE3_PROTO USB_TXTYPE3_SPEED

USB_TXTYPE3_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE3_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE3_PROTO_CTRL

Control

0x1 : USB_TXTYPE3_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE3_PROTO_BULK

Bulk

0x3 : USB_TXTYPE3_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE3_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE3_SPEED_DFLT

Default

0x2 : USB_TXTYPE3_SPEED_FULL

Full

0x3 : USB_TXTYPE3_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL3

USB Host Transmit Interval Endpoint 3
address_offset : 0x13B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL3 USB0TXINTERVAL3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL3_TXPOLL

USB_TXINTERVAL3_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL3

USB Host Transmit Interval Endpoint 3
address_offset : 0x13B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL3 TXINTERVAL3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL3_TXPOLL USB_TXINTERVAL3_NAKLMT

USB_TXINTERVAL3_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL3_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE3

USB Host Configure Receive Type Endpoint 3
address_offset : 0x13C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE3 USB0RXTYPE3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE3_TEP USB_RXTYPE3_PROTO USB_RXTYPE3_SPEED

USB_RXTYPE3_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE3_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE3_PROTO_CTRL

Control

0x1 : USB_RXTYPE3_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE3_PROTO_BULK

Bulk

0x3 : USB_RXTYPE3_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE3_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE3_SPEED_DFLT

Default

0x2 : USB_RXTYPE3_SPEED_FULL

Full

0x3 : USB_RXTYPE3_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE3

USB Host Configure Receive Type Endpoint 3
address_offset : 0x13C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE3 RXTYPE3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE3_TEP USB_RXTYPE3_PROTO USB_RXTYPE3_SPEED

USB_RXTYPE3_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE3_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE3_PROTO_CTRL

Control

0x1 : USB_RXTYPE3_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE3_PROTO_BULK

Bulk

0x3 : USB_RXTYPE3_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE3_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE3_SPEED_DFLT

Default

0x2 : USB_RXTYPE3_SPEED_FULL

Full

0x3 : USB_RXTYPE3_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL3

USB Host Receive Polling Interval Endpoint 3
address_offset : 0x13D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL3 USB0RXINTERVAL3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL3_TXPOLL

USB_RXINTERVAL3_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL3

USB Host Receive Polling Interval Endpoint 3
address_offset : 0x13D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL3 RXINTERVAL3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL3_TXPOLL USB_RXINTERVAL3_NAKLMT

USB_RXINTERVAL3_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL3_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP4

USB Maximum Transmit Data Endpoint 4
address_offset : 0x140 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP4 USB0TXMAXP4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP4_MAXLOAD

USB_TXMAXP4_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP4

USB Maximum Transmit Data Endpoint 4
address_offset : 0x140 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP4 TXMAXP4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP4_MAXLOAD

USB_TXMAXP4_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL4

USB Transmit Control and Status Endpoint 4 Low
address_offset : 0x142 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL4 USB0TXCSRL4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL4_TXRDY USB_TXCSRL4_FIFONE USB_TXCSRL4_ERROR USB_TXCSRL4_FLUSH USB_TXCSRL4_SETUP USB_TXCSRL4_STALLED USB_TXCSRL4_CLRDT USB_TXCSRL4_NAKTO

USB_TXCSRL4_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL4_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL4_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL4_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL4_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL4_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL4_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL4_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL4

USB Transmit Control and Status Endpoint 4 Low
address_offset : 0x142 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL4 TXCSRL4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL4_TXRDY USB_TXCSRL4_FIFONE USB_TXCSRL4_ERROR USB_TXCSRL4_UNDRN USB_TXCSRL4_FLUSH USB_TXCSRL4_SETUP USB_TXCSRL4_STALL USB_TXCSRL4_STALLED USB_TXCSRL4_CLRDT USB_TXCSRL4_NAKTO

USB_TXCSRL4_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL4_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL4_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL4_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL4_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL4_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL4_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL4_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL4_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL4_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH4

USB Transmit Control and Status Endpoint 4 High
address_offset : 0x143 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH4 USB0TXCSRH4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH4_DT USB_TXCSRH4_DTWE USB_TXCSRH4_DMAMOD USB_TXCSRH4_FDT USB_TXCSRH4_DMAEN USB_TXCSRH4_MODE USB_TXCSRH4_ISO USB_TXCSRH4_AUTOSET

USB_TXCSRH4_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH4_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH4_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH4_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH4_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH4_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH4_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH4_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH4

USB Transmit Control and Status Endpoint 4 High
address_offset : 0x143 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH4 TXCSRH4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH4_DT USB_TXCSRH4_DTWE USB_TXCSRH4_DMAMOD USB_TXCSRH4_FDT USB_TXCSRH4_DMAEN USB_TXCSRH4_MODE USB_TXCSRH4_ISO USB_TXCSRH4_AUTOSET

USB_TXCSRH4_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH4_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH4_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH4_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH4_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH4_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH4_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH4_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP4

USB Maximum Receive Data Endpoint 4
address_offset : 0x144 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP4 USB0RXMAXP4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP4_MAXLOAD

USB_RXMAXP4_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP4

USB Maximum Receive Data Endpoint 4
address_offset : 0x144 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP4 RXMAXP4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP4_MAXLOAD

USB_RXMAXP4_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL4

USB Receive Control and Status Endpoint 4 Low
address_offset : 0x146 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL4 USB0RXCSRL4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL4_RXRDY USB_RXCSRL4_FULL USB_RXCSRL4_OVER USB_RXCSRL4_DATAERR USB_RXCSRL4_FLUSH USB_RXCSRL4_STALL USB_RXCSRL4_STALLED USB_RXCSRL4_CLRDT

USB_RXCSRL4_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL4_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL4_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL4_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL4_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL4_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL4_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL4_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL4

USB Receive Control and Status Endpoint 4 Low
address_offset : 0x146 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL4 RXCSRL4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL4_RXRDY USB_RXCSRL4_FULL USB_RXCSRL4_OVER USB_RXCSRL4_ERROR USB_RXCSRL4_DATAERR USB_RXCSRL4_NAKTO USB_RXCSRL4_FLUSH USB_RXCSRL4_STALL USB_RXCSRL4_REQPKT USB_RXCSRL4_STALLED USB_RXCSRL4_CLRDT

USB_RXCSRL4_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL4_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL4_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL4_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL4_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL4_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL4_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL4_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL4_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL4_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL4_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH4

USB Receive Control and Status Endpoint 4 High
address_offset : 0x147 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH4 USB0RXCSRH4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH4_DT USB_RXCSRH4_DTWE USB_RXCSRH4_DMAMOD USB_RXCSRH4_PIDERR USB_RXCSRH4_DMAEN USB_RXCSRH4_AUTORQ USB_RXCSRH4_AUTOCL

USB_RXCSRH4_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH4_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH4_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH4_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH4_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH4_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH4_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH4

USB Receive Control and Status Endpoint 4 High
address_offset : 0x147 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH4 RXCSRH4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH4_DT USB_RXCSRH4_DTWE USB_RXCSRH4_DMAMOD USB_RXCSRH4_PIDERR USB_RXCSRH4_DISNYET USB_RXCSRH4_DMAEN USB_RXCSRH4_AUTORQ USB_RXCSRH4_ISO USB_RXCSRH4_AUTOCL

USB_RXCSRH4_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH4_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH4_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH4_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH4_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH4_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH4_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH4_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH4_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT4

USB Receive Byte Count Endpoint 4
address_offset : 0x148 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT4 USB0RXCOUNT4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT4_COUNT

USB_RXCOUNT4_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT4

USB Receive Byte Count Endpoint 4
address_offset : 0x148 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT4 RXCOUNT4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT4_COUNT

USB_RXCOUNT4_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE4

USB Host Transmit Configure Type Endpoint 4
address_offset : 0x14A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE4 USB0TXTYPE4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE4_TEP USB_TXTYPE4_PROTO USB_TXTYPE4_SPEED

USB_TXTYPE4_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE4_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE4_PROTO_CTRL

Control

0x1 : USB_TXTYPE4_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE4_PROTO_BULK

Bulk

0x3 : USB_TXTYPE4_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE4_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE4_SPEED_DFLT

Default

0x2 : USB_TXTYPE4_SPEED_FULL

Full

0x3 : USB_TXTYPE4_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE4

USB Host Transmit Configure Type Endpoint 4
address_offset : 0x14A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE4 TXTYPE4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE4_TEP USB_TXTYPE4_PROTO USB_TXTYPE4_SPEED

USB_TXTYPE4_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE4_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE4_PROTO_CTRL

Control

0x1 : USB_TXTYPE4_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE4_PROTO_BULK

Bulk

0x3 : USB_TXTYPE4_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE4_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE4_SPEED_DFLT

Default

0x2 : USB_TXTYPE4_SPEED_FULL

Full

0x3 : USB_TXTYPE4_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL4

USB Host Transmit Interval Endpoint 4
address_offset : 0x14B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL4 USB0TXINTERVAL4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL4_TXPOLL

USB_TXINTERVAL4_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL4

USB Host Transmit Interval Endpoint 4
address_offset : 0x14B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL4 TXINTERVAL4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL4_TXPOLL USB_TXINTERVAL4_NAKLMT

USB_TXINTERVAL4_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL4_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE4

USB Host Configure Receive Type Endpoint 4
address_offset : 0x14C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE4 USB0RXTYPE4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE4_TEP USB_RXTYPE4_PROTO USB_RXTYPE4_SPEED

USB_RXTYPE4_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE4_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE4_PROTO_CTRL

Control

0x1 : USB_RXTYPE4_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE4_PROTO_BULK

Bulk

0x3 : USB_RXTYPE4_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE4_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE4_SPEED_DFLT

Default

0x2 : USB_RXTYPE4_SPEED_FULL

Full

0x3 : USB_RXTYPE4_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE4

USB Host Configure Receive Type Endpoint 4
address_offset : 0x14C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE4 RXTYPE4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE4_TEP USB_RXTYPE4_PROTO USB_RXTYPE4_SPEED

USB_RXTYPE4_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE4_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE4_PROTO_CTRL

Control

0x1 : USB_RXTYPE4_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE4_PROTO_BULK

Bulk

0x3 : USB_RXTYPE4_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE4_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE4_SPEED_DFLT

Default

0x2 : USB_RXTYPE4_SPEED_FULL

Full

0x3 : USB_RXTYPE4_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL4

USB Host Receive Polling Interval Endpoint 4
address_offset : 0x14D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL4 USB0RXINTERVAL4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL4_TXPOLL

USB_RXINTERVAL4_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL4

USB Host Receive Polling Interval Endpoint 4
address_offset : 0x14D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL4 RXINTERVAL4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL4_TXPOLL USB_RXINTERVAL4_NAKLMT

USB_RXINTERVAL4_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL4_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP5

USB Maximum Transmit Data Endpoint 5
address_offset : 0x150 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP5 USB0TXMAXP5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP5_MAXLOAD

USB_TXMAXP5_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP5

USB Maximum Transmit Data Endpoint 5
address_offset : 0x150 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP5 TXMAXP5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP5_MAXLOAD

USB_TXMAXP5_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL5

USB Transmit Control and Status Endpoint 5 Low
address_offset : 0x152 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL5 USB0TXCSRL5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL5_TXRDY USB_TXCSRL5_FIFONE USB_TXCSRL5_ERROR USB_TXCSRL5_FLUSH USB_TXCSRL5_SETUP USB_TXCSRL5_STALLED USB_TXCSRL5_CLRDT USB_TXCSRL5_NAKTO

USB_TXCSRL5_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL5_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL5_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL5_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL5_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL5_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL5_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL5_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL5

USB Transmit Control and Status Endpoint 5 Low
address_offset : 0x152 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL5 TXCSRL5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL5_TXRDY USB_TXCSRL5_FIFONE USB_TXCSRL5_ERROR USB_TXCSRL5_UNDRN USB_TXCSRL5_FLUSH USB_TXCSRL5_SETUP USB_TXCSRL5_STALL USB_TXCSRL5_STALLED USB_TXCSRL5_CLRDT USB_TXCSRL5_NAKTO

USB_TXCSRL5_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL5_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL5_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL5_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL5_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL5_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL5_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL5_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL5_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL5_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH5

USB Transmit Control and Status Endpoint 5 High
address_offset : 0x153 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH5 USB0TXCSRH5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH5_DT USB_TXCSRH5_DTWE USB_TXCSRH5_DMAMOD USB_TXCSRH5_FDT USB_TXCSRH5_DMAEN USB_TXCSRH5_MODE USB_TXCSRH5_ISO USB_TXCSRH5_AUTOSET

USB_TXCSRH5_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH5_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH5_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH5_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH5_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH5_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH5_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH5_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH5

USB Transmit Control and Status Endpoint 5 High
address_offset : 0x153 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH5 TXCSRH5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH5_DT USB_TXCSRH5_DTWE USB_TXCSRH5_DMAMOD USB_TXCSRH5_FDT USB_TXCSRH5_DMAEN USB_TXCSRH5_MODE USB_TXCSRH5_ISO USB_TXCSRH5_AUTOSET

USB_TXCSRH5_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH5_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH5_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH5_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH5_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH5_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH5_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH5_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP5

USB Maximum Receive Data Endpoint 5
address_offset : 0x154 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP5 USB0RXMAXP5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP5_MAXLOAD

USB_RXMAXP5_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP5

USB Maximum Receive Data Endpoint 5
address_offset : 0x154 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP5 RXMAXP5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP5_MAXLOAD

USB_RXMAXP5_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL5

USB Receive Control and Status Endpoint 5 Low
address_offset : 0x156 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL5 USB0RXCSRL5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL5_RXRDY USB_RXCSRL5_FULL USB_RXCSRL5_OVER USB_RXCSRL5_DATAERR USB_RXCSRL5_FLUSH USB_RXCSRL5_STALL USB_RXCSRL5_STALLED USB_RXCSRL5_CLRDT

USB_RXCSRL5_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL5_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL5_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL5_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL5_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL5_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL5_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL5_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL5

USB Receive Control and Status Endpoint 5 Low
address_offset : 0x156 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL5 RXCSRL5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL5_RXRDY USB_RXCSRL5_FULL USB_RXCSRL5_OVER USB_RXCSRL5_ERROR USB_RXCSRL5_DATAERR USB_RXCSRL5_NAKTO USB_RXCSRL5_FLUSH USB_RXCSRL5_STALL USB_RXCSRL5_REQPKT USB_RXCSRL5_STALLED USB_RXCSRL5_CLRDT

USB_RXCSRL5_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL5_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL5_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL5_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL5_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL5_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL5_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL5_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL5_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL5_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL5_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH5

USB Receive Control and Status Endpoint 5 High
address_offset : 0x157 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH5 USB0RXCSRH5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH5_DT USB_RXCSRH5_DTWE USB_RXCSRH5_DMAMOD USB_RXCSRH5_PIDERR USB_RXCSRH5_DMAEN USB_RXCSRH5_AUTORQ USB_RXCSRH5_AUTOCL

USB_RXCSRH5_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH5_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH5_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH5_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH5_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH5_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH5_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH5

USB Receive Control and Status Endpoint 5 High
address_offset : 0x157 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH5 RXCSRH5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH5_DT USB_RXCSRH5_DTWE USB_RXCSRH5_DMAMOD USB_RXCSRH5_PIDERR USB_RXCSRH5_DISNYET USB_RXCSRH5_DMAEN USB_RXCSRH5_AUTORQ USB_RXCSRH5_ISO USB_RXCSRH5_AUTOCL

USB_RXCSRH5_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH5_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH5_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH5_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH5_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH5_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH5_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH5_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH5_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT5

USB Receive Byte Count Endpoint 5
address_offset : 0x158 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT5 USB0RXCOUNT5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT5_COUNT

USB_RXCOUNT5_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT5

USB Receive Byte Count Endpoint 5
address_offset : 0x158 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT5 RXCOUNT5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT5_COUNT

USB_RXCOUNT5_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE5

USB Host Transmit Configure Type Endpoint 5
address_offset : 0x15A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE5 USB0TXTYPE5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE5_TEP USB_TXTYPE5_PROTO USB_TXTYPE5_SPEED

USB_TXTYPE5_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE5_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE5_PROTO_CTRL

Control

0x1 : USB_TXTYPE5_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE5_PROTO_BULK

Bulk

0x3 : USB_TXTYPE5_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE5_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE5_SPEED_DFLT

Default

0x2 : USB_TXTYPE5_SPEED_FULL

Full

0x3 : USB_TXTYPE5_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE5

USB Host Transmit Configure Type Endpoint 5
address_offset : 0x15A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE5 TXTYPE5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE5_TEP USB_TXTYPE5_PROTO USB_TXTYPE5_SPEED

USB_TXTYPE5_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE5_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE5_PROTO_CTRL

Control

0x1 : USB_TXTYPE5_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE5_PROTO_BULK

Bulk

0x3 : USB_TXTYPE5_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE5_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE5_SPEED_DFLT

Default

0x2 : USB_TXTYPE5_SPEED_FULL

Full

0x3 : USB_TXTYPE5_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL5

USB Host Transmit Interval Endpoint 5
address_offset : 0x15B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL5 USB0TXINTERVAL5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL5_TXPOLL

USB_TXINTERVAL5_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL5

USB Host Transmit Interval Endpoint 5
address_offset : 0x15B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL5 TXINTERVAL5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL5_TXPOLL USB_TXINTERVAL5_NAKLMT

USB_TXINTERVAL5_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL5_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE5

USB Host Configure Receive Type Endpoint 5
address_offset : 0x15C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE5 USB0RXTYPE5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE5_TEP USB_RXTYPE5_PROTO USB_RXTYPE5_SPEED

USB_RXTYPE5_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE5_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE5_PROTO_CTRL

Control

0x1 : USB_RXTYPE5_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE5_PROTO_BULK

Bulk

0x3 : USB_RXTYPE5_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE5_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE5_SPEED_DFLT

Default

0x2 : USB_RXTYPE5_SPEED_FULL

Full

0x3 : USB_RXTYPE5_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE5

USB Host Configure Receive Type Endpoint 5
address_offset : 0x15C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE5 RXTYPE5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE5_TEP USB_RXTYPE5_PROTO USB_RXTYPE5_SPEED

USB_RXTYPE5_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE5_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE5_PROTO_CTRL

Control

0x1 : USB_RXTYPE5_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE5_PROTO_BULK

Bulk

0x3 : USB_RXTYPE5_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE5_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE5_SPEED_DFLT

Default

0x2 : USB_RXTYPE5_SPEED_FULL

Full

0x3 : USB_RXTYPE5_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL5

USB Host Receive Polling Interval Endpoint 5
address_offset : 0x15D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL5 USB0RXINTERVAL5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL5_TXPOLL

USB_RXINTERVAL5_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL5

USB Host Receive Polling Interval Endpoint 5
address_offset : 0x15D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL5 RXINTERVAL5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL5_TXPOLL USB_RXINTERVAL5_NAKLMT

USB_RXINTERVAL5_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL5_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP6

USB Maximum Transmit Data Endpoint 6
address_offset : 0x160 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP6 USB0TXMAXP6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP6_MAXLOAD

USB_TXMAXP6_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP6

USB Maximum Transmit Data Endpoint 6
address_offset : 0x160 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP6 TXMAXP6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP6_MAXLOAD

USB_TXMAXP6_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL6

USB Transmit Control and Status Endpoint 6 Low
address_offset : 0x162 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL6 USB0TXCSRL6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL6_TXRDY USB_TXCSRL6_FIFONE USB_TXCSRL6_ERROR USB_TXCSRL6_FLUSH USB_TXCSRL6_SETUP USB_TXCSRL6_STALLED USB_TXCSRL6_CLRDT USB_TXCSRL6_NAKTO

USB_TXCSRL6_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL6_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL6_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL6_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL6_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL6_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL6_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL6_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL6

USB Transmit Control and Status Endpoint 6 Low
address_offset : 0x162 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL6 TXCSRL6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL6_TXRDY USB_TXCSRL6_FIFONE USB_TXCSRL6_ERROR USB_TXCSRL6_UNDRN USB_TXCSRL6_FLUSH USB_TXCSRL6_SETUP USB_TXCSRL6_STALL USB_TXCSRL6_STALLED USB_TXCSRL6_CLRDT USB_TXCSRL6_NAKTO

USB_TXCSRL6_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL6_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL6_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL6_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL6_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL6_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL6_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL6_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL6_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL6_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH6

USB Transmit Control and Status Endpoint 6 High
address_offset : 0x163 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH6 USB0TXCSRH6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH6_DT USB_TXCSRH6_DTWE USB_TXCSRH6_DMAMOD USB_TXCSRH6_FDT USB_TXCSRH6_DMAEN USB_TXCSRH6_MODE USB_TXCSRH6_ISO USB_TXCSRH6_AUTOSET

USB_TXCSRH6_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH6_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH6_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH6_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH6_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH6_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH6_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH6_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH6

USB Transmit Control and Status Endpoint 6 High
address_offset : 0x163 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH6 TXCSRH6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH6_DT USB_TXCSRH6_DTWE USB_TXCSRH6_DMAMOD USB_TXCSRH6_FDT USB_TXCSRH6_DMAEN USB_TXCSRH6_MODE USB_TXCSRH6_ISO USB_TXCSRH6_AUTOSET

USB_TXCSRH6_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH6_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH6_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH6_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH6_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH6_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH6_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH6_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP6

USB Maximum Receive Data Endpoint 6
address_offset : 0x164 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP6 USB0RXMAXP6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP6_MAXLOAD

USB_RXMAXP6_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP6

USB Maximum Receive Data Endpoint 6
address_offset : 0x164 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP6 RXMAXP6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP6_MAXLOAD

USB_RXMAXP6_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL6

USB Receive Control and Status Endpoint 6 Low
address_offset : 0x166 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL6 USB0RXCSRL6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL6_RXRDY USB_RXCSRL6_FULL USB_RXCSRL6_OVER USB_RXCSRL6_DATAERR USB_RXCSRL6_FLUSH USB_RXCSRL6_STALL USB_RXCSRL6_STALLED USB_RXCSRL6_CLRDT

USB_RXCSRL6_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL6_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL6_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL6_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL6_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL6_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL6_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL6_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL6

USB Receive Control and Status Endpoint 6 Low
address_offset : 0x166 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL6 RXCSRL6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL6_RXRDY USB_RXCSRL6_FULL USB_RXCSRL6_OVER USB_RXCSRL6_ERROR USB_RXCSRL6_DATAERR USB_RXCSRL6_NAKTO USB_RXCSRL6_FLUSH USB_RXCSRL6_STALL USB_RXCSRL6_REQPKT USB_RXCSRL6_STALLED USB_RXCSRL6_CLRDT

USB_RXCSRL6_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL6_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL6_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL6_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL6_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL6_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL6_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL6_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL6_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL6_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL6_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH6

USB Receive Control and Status Endpoint 6 High
address_offset : 0x167 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH6 USB0RXCSRH6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH6_DT USB_RXCSRH6_DTWE USB_RXCSRH6_DMAMOD USB_RXCSRH6_PIDERR USB_RXCSRH6_DMAEN USB_RXCSRH6_AUTORQ USB_RXCSRH6_AUTOCL

USB_RXCSRH6_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH6_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH6_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH6_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH6_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH6_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH6_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH6

USB Receive Control and Status Endpoint 6 High
address_offset : 0x167 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH6 RXCSRH6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH6_DT USB_RXCSRH6_DTWE USB_RXCSRH6_DMAMOD USB_RXCSRH6_PIDERR USB_RXCSRH6_DISNYET USB_RXCSRH6_DMAEN USB_RXCSRH6_AUTORQ USB_RXCSRH6_ISO USB_RXCSRH6_AUTOCL

USB_RXCSRH6_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH6_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH6_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH6_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH6_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH6_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH6_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH6_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH6_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT6

USB Receive Byte Count Endpoint 6
address_offset : 0x168 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT6 USB0RXCOUNT6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT6_COUNT

USB_RXCOUNT6_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT6

USB Receive Byte Count Endpoint 6
address_offset : 0x168 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT6 RXCOUNT6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT6_COUNT

USB_RXCOUNT6_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE6

USB Host Transmit Configure Type Endpoint 6
address_offset : 0x16A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE6 USB0TXTYPE6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE6_TEP USB_TXTYPE6_PROTO USB_TXTYPE6_SPEED

USB_TXTYPE6_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE6_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE6_PROTO_CTRL

Control

0x1 : USB_TXTYPE6_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE6_PROTO_BULK

Bulk

0x3 : USB_TXTYPE6_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE6_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE6_SPEED_DFLT

Default

0x2 : USB_TXTYPE6_SPEED_FULL

Full

0x3 : USB_TXTYPE6_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE6

USB Host Transmit Configure Type Endpoint 6
address_offset : 0x16A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE6 TXTYPE6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE6_TEP USB_TXTYPE6_PROTO USB_TXTYPE6_SPEED

USB_TXTYPE6_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE6_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE6_PROTO_CTRL

Control

0x1 : USB_TXTYPE6_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE6_PROTO_BULK

Bulk

0x3 : USB_TXTYPE6_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE6_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE6_SPEED_DFLT

Default

0x2 : USB_TXTYPE6_SPEED_FULL

Full

0x3 : USB_TXTYPE6_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL6

USB Host Transmit Interval Endpoint 6
address_offset : 0x16B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL6 USB0TXINTERVAL6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL6_TXPOLL

USB_TXINTERVAL6_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL6

USB Host Transmit Interval Endpoint 6
address_offset : 0x16B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL6 TXINTERVAL6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL6_TXPOLL USB_TXINTERVAL6_NAKLMT

USB_TXINTERVAL6_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL6_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE6

USB Host Configure Receive Type Endpoint 6
address_offset : 0x16C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE6 USB0RXTYPE6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE6_TEP USB_RXTYPE6_PROTO USB_RXTYPE6_SPEED

USB_RXTYPE6_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE6_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE6_PROTO_CTRL

Control

0x1 : USB_RXTYPE6_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE6_PROTO_BULK

Bulk

0x3 : USB_RXTYPE6_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE6_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE6_SPEED_DFLT

Default

0x2 : USB_RXTYPE6_SPEED_FULL

Full

0x3 : USB_RXTYPE6_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE6

USB Host Configure Receive Type Endpoint 6
address_offset : 0x16C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE6 RXTYPE6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE6_TEP USB_RXTYPE6_PROTO USB_RXTYPE6_SPEED

USB_RXTYPE6_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE6_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE6_PROTO_CTRL

Control

0x1 : USB_RXTYPE6_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE6_PROTO_BULK

Bulk

0x3 : USB_RXTYPE6_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE6_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE6_SPEED_DFLT

Default

0x2 : USB_RXTYPE6_SPEED_FULL

Full

0x3 : USB_RXTYPE6_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL6

USB Host Receive Polling Interval Endpoint 6
address_offset : 0x16D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL6 USB0RXINTERVAL6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL6_TXPOLL

USB_RXINTERVAL6_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL6

USB Host Receive Polling Interval Endpoint 6
address_offset : 0x16D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL6 RXINTERVAL6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL6_TXPOLL USB_RXINTERVAL6_NAKLMT

USB_RXINTERVAL6_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL6_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP7

USB Maximum Transmit Data Endpoint 7
address_offset : 0x170 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP7 USB0TXMAXP7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP7_MAXLOAD

USB_TXMAXP7_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP7

USB Maximum Transmit Data Endpoint 7
address_offset : 0x170 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP7 TXMAXP7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP7_MAXLOAD

USB_TXMAXP7_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL7

USB Transmit Control and Status Endpoint 7 Low
address_offset : 0x172 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL7 USB0TXCSRL7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL7_TXRDY USB_TXCSRL7_FIFONE USB_TXCSRL7_ERROR USB_TXCSRL7_FLUSH USB_TXCSRL7_SETUP USB_TXCSRL7_STALLED USB_TXCSRL7_CLRDT USB_TXCSRL7_NAKTO

USB_TXCSRL7_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL7_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL7_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL7_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL7_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL7_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL7_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL7_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL7

USB Transmit Control and Status Endpoint 7 Low
address_offset : 0x172 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL7 TXCSRL7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL7_TXRDY USB_TXCSRL7_FIFONE USB_TXCSRL7_ERROR USB_TXCSRL7_UNDRN USB_TXCSRL7_FLUSH USB_TXCSRL7_SETUP USB_TXCSRL7_STALL USB_TXCSRL7_STALLED USB_TXCSRL7_CLRDT USB_TXCSRL7_NAKTO

USB_TXCSRL7_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL7_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL7_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL7_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL7_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL7_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL7_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL7_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL7_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL7_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH7

USB Transmit Control and Status Endpoint 7 High
address_offset : 0x173 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH7 USB0TXCSRH7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH7_DT USB_TXCSRH7_DTWE USB_TXCSRH7_DMAMOD USB_TXCSRH7_FDT USB_TXCSRH7_DMAEN USB_TXCSRH7_MODE USB_TXCSRH7_ISO USB_TXCSRH7_AUTOSET

USB_TXCSRH7_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH7_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH7_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH7_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH7_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH7_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH7_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH7_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH7

USB Transmit Control and Status Endpoint 7 High
address_offset : 0x173 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH7 TXCSRH7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH7_DT USB_TXCSRH7_DTWE USB_TXCSRH7_DMAMOD USB_TXCSRH7_FDT USB_TXCSRH7_DMAEN USB_TXCSRH7_MODE USB_TXCSRH7_ISO USB_TXCSRH7_AUTOSET

USB_TXCSRH7_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH7_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH7_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH7_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH7_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH7_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH7_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH7_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP7

USB Maximum Receive Data Endpoint 7
address_offset : 0x174 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP7 USB0RXMAXP7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP7_MAXLOAD

USB_RXMAXP7_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP7

USB Maximum Receive Data Endpoint 7
address_offset : 0x174 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP7 RXMAXP7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP7_MAXLOAD

USB_RXMAXP7_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL7

USB Receive Control and Status Endpoint 7 Low
address_offset : 0x176 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL7 USB0RXCSRL7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL7_RXRDY USB_RXCSRL7_FULL USB_RXCSRL7_OVER USB_RXCSRL7_DATAERR USB_RXCSRL7_FLUSH USB_RXCSRL7_STALL USB_RXCSRL7_STALLED USB_RXCSRL7_CLRDT

USB_RXCSRL7_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL7_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL7_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL7_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL7_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL7_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL7_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL7_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL7

USB Receive Control and Status Endpoint 7 Low
address_offset : 0x176 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL7 RXCSRL7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL7_RXRDY USB_RXCSRL7_FULL USB_RXCSRL7_OVER USB_RXCSRL7_ERROR USB_RXCSRL7_DATAERR USB_RXCSRL7_NAKTO USB_RXCSRL7_FLUSH USB_RXCSRL7_STALL USB_RXCSRL7_REQPKT USB_RXCSRL7_STALLED USB_RXCSRL7_CLRDT

USB_RXCSRL7_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL7_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL7_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL7_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL7_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL7_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL7_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL7_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL7_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL7_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL7_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH7

USB Receive Control and Status Endpoint 7 High
address_offset : 0x177 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH7 USB0RXCSRH7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH7_DT USB_RXCSRH7_DTWE USB_RXCSRH7_DMAMOD USB_RXCSRH7_PIDERR USB_RXCSRH7_DMAEN USB_RXCSRH7_AUTORQ USB_RXCSRH7_AUTOCL

USB_RXCSRH7_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH7_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH7_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH7_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH7_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH7_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH7_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH7

USB Receive Control and Status Endpoint 7 High
address_offset : 0x177 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH7 RXCSRH7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH7_DT USB_RXCSRH7_DTWE USB_RXCSRH7_DMAMOD USB_RXCSRH7_PIDERR USB_RXCSRH7_DISNYET USB_RXCSRH7_DMAEN USB_RXCSRH7_AUTORQ USB_RXCSRH7_ISO USB_RXCSRH7_AUTOCL

USB_RXCSRH7_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH7_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH7_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH7_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH7_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH7_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH7_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH7_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH7_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT7

USB Receive Byte Count Endpoint 7
address_offset : 0x178 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT7 USB0RXCOUNT7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT7_COUNT

USB_RXCOUNT7_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT7

USB Receive Byte Count Endpoint 7
address_offset : 0x178 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT7 RXCOUNT7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT7_COUNT

USB_RXCOUNT7_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE7

USB Host Transmit Configure Type Endpoint 7
address_offset : 0x17A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE7 USB0TXTYPE7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE7_TEP USB_TXTYPE7_PROTO USB_TXTYPE7_SPEED

USB_TXTYPE7_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE7_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE7_PROTO_CTRL

Control

0x1 : USB_TXTYPE7_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE7_PROTO_BULK

Bulk

0x3 : USB_TXTYPE7_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE7_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE7_SPEED_DFLT

Default

0x2 : USB_TXTYPE7_SPEED_FULL

Full

0x3 : USB_TXTYPE7_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE7

USB Host Transmit Configure Type Endpoint 7
address_offset : 0x17A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE7 TXTYPE7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE7_TEP USB_TXTYPE7_PROTO USB_TXTYPE7_SPEED

USB_TXTYPE7_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE7_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE7_PROTO_CTRL

Control

0x1 : USB_TXTYPE7_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE7_PROTO_BULK

Bulk

0x3 : USB_TXTYPE7_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE7_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE7_SPEED_DFLT

Default

0x2 : USB_TXTYPE7_SPEED_FULL

Full

0x3 : USB_TXTYPE7_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL7

USB Host Transmit Interval Endpoint 7
address_offset : 0x17B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL7 USB0TXINTERVAL7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL7_TXPOLL

USB_TXINTERVAL7_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL7

USB Host Transmit Interval Endpoint 7
address_offset : 0x17B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL7 TXINTERVAL7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL7_TXPOLL USB_TXINTERVAL7_NAKLMT

USB_TXINTERVAL7_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL7_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE7

USB Host Configure Receive Type Endpoint 7
address_offset : 0x17C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE7 USB0RXTYPE7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE7_TEP USB_RXTYPE7_PROTO USB_RXTYPE7_SPEED

USB_RXTYPE7_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE7_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE7_PROTO_CTRL

Control

0x1 : USB_RXTYPE7_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE7_PROTO_BULK

Bulk

0x3 : USB_RXTYPE7_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE7_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE7_SPEED_DFLT

Default

0x2 : USB_RXTYPE7_SPEED_FULL

Full

0x3 : USB_RXTYPE7_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE7

USB Host Configure Receive Type Endpoint 7
address_offset : 0x17C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE7 RXTYPE7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE7_TEP USB_RXTYPE7_PROTO USB_RXTYPE7_SPEED

USB_RXTYPE7_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE7_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE7_PROTO_CTRL

Control

0x1 : USB_RXTYPE7_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE7_PROTO_BULK

Bulk

0x3 : USB_RXTYPE7_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE7_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE7_SPEED_DFLT

Default

0x2 : USB_RXTYPE7_SPEED_FULL

Full

0x3 : USB_RXTYPE7_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL7

USB Host Receive Polling Interval Endpoint 7
address_offset : 0x17D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL7 USB0RXINTERVAL7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL7_TXPOLL

USB_RXINTERVAL7_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL7

USB Host Receive Polling Interval Endpoint 7
address_offset : 0x17D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL7 RXINTERVAL7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL7_TXPOLL USB_RXINTERVAL7_NAKLMT

USB_RXINTERVAL7_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL7_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP8

USB Maximum Transmit Data Endpoint 8
address_offset : 0x180 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP8 USB0TXMAXP8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP8_MAXLOAD

USB_TXMAXP8_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP8

USB Maximum Transmit Data Endpoint 8
address_offset : 0x180 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP8 TXMAXP8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP8_MAXLOAD

USB_TXMAXP8_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL8

USB Transmit Control and Status Endpoint 8 Low
address_offset : 0x182 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL8 USB0TXCSRL8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL8_TXRDY USB_TXCSRL8_FIFONE USB_TXCSRL8_ERROR USB_TXCSRL8_FLUSH USB_TXCSRL8_SETUP USB_TXCSRL8_STALLED USB_TXCSRL8_CLRDT USB_TXCSRL8_NAKTO

USB_TXCSRL8_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL8_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL8_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL8_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL8_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL8_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL8_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL8_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL8

USB Transmit Control and Status Endpoint 8 Low
address_offset : 0x182 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL8 TXCSRL8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL8_TXRDY USB_TXCSRL8_FIFONE USB_TXCSRL8_ERROR USB_TXCSRL8_UNDRN USB_TXCSRL8_FLUSH USB_TXCSRL8_SETUP USB_TXCSRL8_STALL USB_TXCSRL8_STALLED USB_TXCSRL8_CLRDT USB_TXCSRL8_NAKTO

USB_TXCSRL8_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL8_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL8_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL8_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL8_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL8_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL8_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL8_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL8_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL8_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH8

USB Transmit Control and Status Endpoint 8 High
address_offset : 0x183 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH8 USB0TXCSRH8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH8_DT USB_TXCSRH8_DTWE USB_TXCSRH8_DMAMOD USB_TXCSRH8_FDT USB_TXCSRH8_DMAEN USB_TXCSRH8_MODE USB_TXCSRH8_ISO USB_TXCSRH8_AUTOSET

USB_TXCSRH8_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH8_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH8_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH8_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH8_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH8_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH8_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH8_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH8

USB Transmit Control and Status Endpoint 8 High
address_offset : 0x183 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH8 TXCSRH8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH8_DT USB_TXCSRH8_DTWE USB_TXCSRH8_DMAMOD USB_TXCSRH8_FDT USB_TXCSRH8_DMAEN USB_TXCSRH8_MODE USB_TXCSRH8_ISO USB_TXCSRH8_AUTOSET

USB_TXCSRH8_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH8_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH8_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH8_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH8_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH8_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH8_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH8_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP8

USB Maximum Receive Data Endpoint 8
address_offset : 0x184 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP8 USB0RXMAXP8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP8_MAXLOAD

USB_RXMAXP8_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP8

USB Maximum Receive Data Endpoint 8
address_offset : 0x184 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP8 RXMAXP8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP8_MAXLOAD

USB_RXMAXP8_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL8

USB Receive Control and Status Endpoint 8 Low
address_offset : 0x186 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL8 USB0RXCSRL8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL8_RXRDY USB_RXCSRL8_FULL USB_RXCSRL8_OVER USB_RXCSRL8_DATAERR USB_RXCSRL8_FLUSH USB_RXCSRL8_STALL USB_RXCSRL8_STALLED USB_RXCSRL8_CLRDT

USB_RXCSRL8_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL8_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL8_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL8_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL8_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL8_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL8_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL8_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL8

USB Receive Control and Status Endpoint 8 Low
address_offset : 0x186 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL8 RXCSRL8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL8_RXRDY USB_RXCSRL8_FULL USB_RXCSRL8_OVER USB_RXCSRL8_ERROR USB_RXCSRL8_DATAERR USB_RXCSRL8_NAKTO USB_RXCSRL8_FLUSH USB_RXCSRL8_STALL USB_RXCSRL8_REQPKT USB_RXCSRL8_STALLED USB_RXCSRL8_CLRDT

USB_RXCSRL8_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL8_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL8_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL8_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL8_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL8_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL8_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL8_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL8_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL8_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL8_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH8

USB Receive Control and Status Endpoint 8 High
address_offset : 0x187 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH8 USB0RXCSRH8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH8_DT USB_RXCSRH8_DTWE USB_RXCSRH8_DMAMOD USB_RXCSRH8_PIDERR USB_RXCSRH8_DMAEN USB_RXCSRH8_AUTORQ USB_RXCSRH8_AUTOCL

USB_RXCSRH8_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH8_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH8_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH8_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH8_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH8_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH8_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH8

USB Receive Control and Status Endpoint 8 High
address_offset : 0x187 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH8 RXCSRH8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH8_DT USB_RXCSRH8_DTWE USB_RXCSRH8_DMAMOD USB_RXCSRH8_PIDERR USB_RXCSRH8_DISNYET USB_RXCSRH8_DMAEN USB_RXCSRH8_AUTORQ USB_RXCSRH8_ISO USB_RXCSRH8_AUTOCL

USB_RXCSRH8_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH8_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH8_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH8_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH8_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH8_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH8_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH8_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH8_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT8

USB Receive Byte Count Endpoint 8
address_offset : 0x188 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT8 USB0RXCOUNT8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT8_COUNT

USB_RXCOUNT8_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT8

USB Receive Byte Count Endpoint 8
address_offset : 0x188 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT8 RXCOUNT8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT8_COUNT

USB_RXCOUNT8_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE8

USB Host Transmit Configure Type Endpoint 8
address_offset : 0x18A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE8 USB0TXTYPE8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE8_TEP USB_TXTYPE8_PROTO USB_TXTYPE8_SPEED

USB_TXTYPE8_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE8_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE8_PROTO_CTRL

Control

0x1 : USB_TXTYPE8_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE8_PROTO_BULK

Bulk

0x3 : USB_TXTYPE8_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE8_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE8_SPEED_DFLT

Default

0x2 : USB_TXTYPE8_SPEED_FULL

Full

0x3 : USB_TXTYPE8_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE8

USB Host Transmit Configure Type Endpoint 8
address_offset : 0x18A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE8 TXTYPE8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE8_TEP USB_TXTYPE8_PROTO USB_TXTYPE8_SPEED

USB_TXTYPE8_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE8_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE8_PROTO_CTRL

Control

0x1 : USB_TXTYPE8_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE8_PROTO_BULK

Bulk

0x3 : USB_TXTYPE8_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE8_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE8_SPEED_DFLT

Default

0x2 : USB_TXTYPE8_SPEED_FULL

Full

0x3 : USB_TXTYPE8_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL8

USB Host Transmit Interval Endpoint 8
address_offset : 0x18B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL8 USB0TXINTERVAL8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL8_TXPOLL

USB_TXINTERVAL8_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL8

USB Host Transmit Interval Endpoint 8
address_offset : 0x18B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL8 TXINTERVAL8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL8_TXPOLL USB_TXINTERVAL8_NAKLMT

USB_TXINTERVAL8_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL8_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE8

USB Host Configure Receive Type Endpoint 8
address_offset : 0x18C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE8 USB0RXTYPE8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE8_TEP USB_RXTYPE8_PROTO USB_RXTYPE8_SPEED

USB_RXTYPE8_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE8_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE8_PROTO_CTRL

Control

0x1 : USB_RXTYPE8_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE8_PROTO_BULK

Bulk

0x3 : USB_RXTYPE8_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE8_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE8_SPEED_DFLT

Default

0x2 : USB_RXTYPE8_SPEED_FULL

Full

0x3 : USB_RXTYPE8_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE8

USB Host Configure Receive Type Endpoint 8
address_offset : 0x18C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE8 RXTYPE8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE8_TEP USB_RXTYPE8_PROTO USB_RXTYPE8_SPEED

USB_RXTYPE8_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE8_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE8_PROTO_CTRL

Control

0x1 : USB_RXTYPE8_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE8_PROTO_BULK

Bulk

0x3 : USB_RXTYPE8_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE8_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE8_SPEED_DFLT

Default

0x2 : USB_RXTYPE8_SPEED_FULL

Full

0x3 : USB_RXTYPE8_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL8

USB Host Receive Polling Interval Endpoint 8
address_offset : 0x18D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL8 USB0RXINTERVAL8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL8_TXPOLL

USB_RXINTERVAL8_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL8

USB Host Receive Polling Interval Endpoint 8
address_offset : 0x18D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL8 RXINTERVAL8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL8_TXPOLL USB_RXINTERVAL8_NAKLMT

USB_RXINTERVAL8_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL8_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP9

USB Maximum Transmit Data Endpoint 9
address_offset : 0x190 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP9 USB0TXMAXP9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP9_MAXLOAD

USB_TXMAXP9_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP9

USB Maximum Transmit Data Endpoint 9
address_offset : 0x190 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP9 TXMAXP9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP9_MAXLOAD

USB_TXMAXP9_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL9

USB Transmit Control and Status Endpoint 9 Low
address_offset : 0x192 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL9 USB0TXCSRL9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL9_TXRDY USB_TXCSRL9_FIFONE USB_TXCSRL9_ERROR USB_TXCSRL9_FLUSH USB_TXCSRL9_SETUP USB_TXCSRL9_STALLED USB_TXCSRL9_CLRDT USB_TXCSRL9_NAKTO

USB_TXCSRL9_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL9_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL9_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL9_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL9_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL9_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL9_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL9_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL9

USB Transmit Control and Status Endpoint 9 Low
address_offset : 0x192 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL9 TXCSRL9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL9_TXRDY USB_TXCSRL9_FIFONE USB_TXCSRL9_ERROR USB_TXCSRL9_UNDRN USB_TXCSRL9_FLUSH USB_TXCSRL9_SETUP USB_TXCSRL9_STALL USB_TXCSRL9_STALLED USB_TXCSRL9_CLRDT USB_TXCSRL9_NAKTO

USB_TXCSRL9_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL9_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL9_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL9_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL9_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL9_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL9_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL9_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL9_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL9_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH9

USB Transmit Control and Status Endpoint 9 High
address_offset : 0x193 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH9 USB0TXCSRH9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH9_DT USB_TXCSRH9_DTWE USB_TXCSRH9_DMAMOD USB_TXCSRH9_FDT USB_TXCSRH9_DMAEN USB_TXCSRH9_MODE USB_TXCSRH9_ISO USB_TXCSRH9_AUTOSET

USB_TXCSRH9_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH9_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH9_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH9_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH9_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH9_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH9_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH9_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH9

USB Transmit Control and Status Endpoint 9 High
address_offset : 0x193 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH9 TXCSRH9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH9_DT USB_TXCSRH9_DTWE USB_TXCSRH9_DMAMOD USB_TXCSRH9_FDT USB_TXCSRH9_DMAEN USB_TXCSRH9_MODE USB_TXCSRH9_ISO USB_TXCSRH9_AUTOSET

USB_TXCSRH9_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH9_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH9_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH9_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH9_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH9_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH9_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH9_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP9

USB Maximum Receive Data Endpoint 9
address_offset : 0x194 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP9 USB0RXMAXP9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP9_MAXLOAD

USB_RXMAXP9_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP9

USB Maximum Receive Data Endpoint 9
address_offset : 0x194 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP9 RXMAXP9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP9_MAXLOAD

USB_RXMAXP9_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL9

USB Receive Control and Status Endpoint 9 Low
address_offset : 0x196 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL9 USB0RXCSRL9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL9_RXRDY USB_RXCSRL9_FULL USB_RXCSRL9_OVER USB_RXCSRL9_DATAERR USB_RXCSRL9_FLUSH USB_RXCSRL9_STALL USB_RXCSRL9_STALLED USB_RXCSRL9_CLRDT

USB_RXCSRL9_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL9_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL9_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL9_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL9_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL9_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL9_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL9_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL9

USB Receive Control and Status Endpoint 9 Low
address_offset : 0x196 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL9 RXCSRL9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL9_RXRDY USB_RXCSRL9_FULL USB_RXCSRL9_OVER USB_RXCSRL9_ERROR USB_RXCSRL9_DATAERR USB_RXCSRL9_NAKTO USB_RXCSRL9_FLUSH USB_RXCSRL9_STALL USB_RXCSRL9_REQPKT USB_RXCSRL9_STALLED USB_RXCSRL9_CLRDT

USB_RXCSRL9_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL9_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL9_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL9_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL9_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL9_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL9_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL9_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL9_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL9_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL9_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH9

USB Receive Control and Status Endpoint 9 High
address_offset : 0x197 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH9 USB0RXCSRH9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH9_DT USB_RXCSRH9_DTWE USB_RXCSRH9_DMAMOD USB_RXCSRH9_PIDERR USB_RXCSRH9_DMAEN USB_RXCSRH9_AUTORQ USB_RXCSRH9_AUTOCL

USB_RXCSRH9_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH9_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH9_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH9_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH9_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH9_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH9_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH9

USB Receive Control and Status Endpoint 9 High
address_offset : 0x197 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH9 RXCSRH9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH9_DT USB_RXCSRH9_DTWE USB_RXCSRH9_DMAMOD USB_RXCSRH9_PIDERR USB_RXCSRH9_DISNYET USB_RXCSRH9_DMAEN USB_RXCSRH9_AUTORQ USB_RXCSRH9_ISO USB_RXCSRH9_AUTOCL

USB_RXCSRH9_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH9_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH9_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH9_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH9_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH9_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH9_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH9_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH9_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT9

USB Receive Byte Count Endpoint 9
address_offset : 0x198 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT9 USB0RXCOUNT9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT9_COUNT

USB_RXCOUNT9_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT9

USB Receive Byte Count Endpoint 9
address_offset : 0x198 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT9 RXCOUNT9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT9_COUNT

USB_RXCOUNT9_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE9

USB Host Transmit Configure Type Endpoint 9
address_offset : 0x19A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE9 USB0TXTYPE9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE9_TEP USB_TXTYPE9_PROTO USB_TXTYPE9_SPEED

USB_TXTYPE9_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE9_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE9_PROTO_CTRL

Control

0x1 : USB_TXTYPE9_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE9_PROTO_BULK

Bulk

0x3 : USB_TXTYPE9_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE9_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE9_SPEED_DFLT

Default

0x2 : USB_TXTYPE9_SPEED_FULL

Full

0x3 : USB_TXTYPE9_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE9

USB Host Transmit Configure Type Endpoint 9
address_offset : 0x19A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE9 TXTYPE9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE9_TEP USB_TXTYPE9_PROTO USB_TXTYPE9_SPEED

USB_TXTYPE9_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE9_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE9_PROTO_CTRL

Control

0x1 : USB_TXTYPE9_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE9_PROTO_BULK

Bulk

0x3 : USB_TXTYPE9_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE9_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE9_SPEED_DFLT

Default

0x2 : USB_TXTYPE9_SPEED_FULL

Full

0x3 : USB_TXTYPE9_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL9

USB Host Transmit Interval Endpoint 9
address_offset : 0x19B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL9 USB0TXINTERVAL9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL9_TXPOLL

USB_TXINTERVAL9_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL9

USB Host Transmit Interval Endpoint 9
address_offset : 0x19B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL9 TXINTERVAL9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL9_TXPOLL USB_TXINTERVAL9_NAKLMT

USB_TXINTERVAL9_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL9_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE9

USB Host Configure Receive Type Endpoint 9
address_offset : 0x19C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE9 USB0RXTYPE9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE9_TEP USB_RXTYPE9_PROTO USB_RXTYPE9_SPEED

USB_RXTYPE9_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE9_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE9_PROTO_CTRL

Control

0x1 : USB_RXTYPE9_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE9_PROTO_BULK

Bulk

0x3 : USB_RXTYPE9_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE9_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE9_SPEED_DFLT

Default

0x2 : USB_RXTYPE9_SPEED_FULL

Full

0x3 : USB_RXTYPE9_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE9

USB Host Configure Receive Type Endpoint 9
address_offset : 0x19C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE9 RXTYPE9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE9_TEP USB_RXTYPE9_PROTO USB_RXTYPE9_SPEED

USB_RXTYPE9_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE9_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE9_PROTO_CTRL

Control

0x1 : USB_RXTYPE9_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE9_PROTO_BULK

Bulk

0x3 : USB_RXTYPE9_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE9_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE9_SPEED_DFLT

Default

0x2 : USB_RXTYPE9_SPEED_FULL

Full

0x3 : USB_RXTYPE9_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL9

USB Host Receive Polling Interval Endpoint 9
address_offset : 0x19D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL9 USB0RXINTERVAL9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL9_TXPOLL

USB_RXINTERVAL9_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL9

USB Host Receive Polling Interval Endpoint 9
address_offset : 0x19D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL9 RXINTERVAL9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL9_TXPOLL USB_RXINTERVAL9_NAKLMT

USB_RXINTERVAL9_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL9_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP10

USB Maximum Transmit Data Endpoint 10
address_offset : 0x1A0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP10 USB0TXMAXP10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP10_MAXLOAD

USB_TXMAXP10_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP10

USB Maximum Transmit Data Endpoint 10
address_offset : 0x1A0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP10 TXMAXP10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP10_MAXLOAD

USB_TXMAXP10_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL10

USB Transmit Control and Status Endpoint 10 Low
address_offset : 0x1A2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL10 USB0TXCSRL10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL10_TXRDY USB_TXCSRL10_FIFONE USB_TXCSRL10_ERROR USB_TXCSRL10_FLUSH USB_TXCSRL10_SETUP USB_TXCSRL10_STALLED USB_TXCSRL10_CLRDT USB_TXCSRL10_NAKTO

USB_TXCSRL10_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL10_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL10_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL10_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL10_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL10_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL10_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL10_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL10

USB Transmit Control and Status Endpoint 10 Low
address_offset : 0x1A2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL10 TXCSRL10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL10_TXRDY USB_TXCSRL10_FIFONE USB_TXCSRL10_ERROR USB_TXCSRL10_UNDRN USB_TXCSRL10_FLUSH USB_TXCSRL10_SETUP USB_TXCSRL10_STALL USB_TXCSRL10_STALLED USB_TXCSRL10_CLRDT USB_TXCSRL10_NAKTO

USB_TXCSRL10_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL10_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL10_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL10_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL10_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL10_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL10_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL10_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL10_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL10_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH10

USB Transmit Control and Status Endpoint 10 High
address_offset : 0x1A3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH10 USB0TXCSRH10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH10_DT USB_TXCSRH10_DTWE USB_TXCSRH10_DMAMOD USB_TXCSRH10_FDT USB_TXCSRH10_DMAEN USB_TXCSRH10_MODE USB_TXCSRH10_ISO USB_TXCSRH10_AUTOSET

USB_TXCSRH10_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH10_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH10_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH10_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH10_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH10_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH10_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH10_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH10

USB Transmit Control and Status Endpoint 10 High
address_offset : 0x1A3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH10 TXCSRH10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH10_DT USB_TXCSRH10_DTWE USB_TXCSRH10_DMAMOD USB_TXCSRH10_FDT USB_TXCSRH10_DMAEN USB_TXCSRH10_MODE USB_TXCSRH10_ISO USB_TXCSRH10_AUTOSET

USB_TXCSRH10_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH10_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH10_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH10_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH10_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH10_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH10_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH10_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP10

USB Maximum Receive Data Endpoint 10
address_offset : 0x1A4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP10 USB0RXMAXP10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP10_MAXLOAD

USB_RXMAXP10_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP10

USB Maximum Receive Data Endpoint 10
address_offset : 0x1A4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP10 RXMAXP10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP10_MAXLOAD

USB_RXMAXP10_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL10

USB Receive Control and Status Endpoint 10 Low
address_offset : 0x1A6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL10 USB0RXCSRL10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL10_RXRDY USB_RXCSRL10_FULL USB_RXCSRL10_OVER USB_RXCSRL10_DATAERR USB_RXCSRL10_FLUSH USB_RXCSRL10_STALL USB_RXCSRL10_STALLED USB_RXCSRL10_CLRDT

USB_RXCSRL10_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL10_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL10_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL10_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL10_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL10_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL10_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL10_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL10

USB Receive Control and Status Endpoint 10 Low
address_offset : 0x1A6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL10 RXCSRL10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL10_RXRDY USB_RXCSRL10_FULL USB_RXCSRL10_OVER USB_RXCSRL10_ERROR USB_RXCSRL10_DATAERR USB_RXCSRL10_NAKTO USB_RXCSRL10_FLUSH USB_RXCSRL10_STALL USB_RXCSRL10_REQPKT USB_RXCSRL10_STALLED USB_RXCSRL10_CLRDT

USB_RXCSRL10_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL10_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL10_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL10_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL10_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL10_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL10_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL10_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL10_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL10_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL10_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH10

USB Receive Control and Status Endpoint 10 High
address_offset : 0x1A7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH10 USB0RXCSRH10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH10_DT USB_RXCSRH10_DTWE USB_RXCSRH10_DMAMOD USB_RXCSRH10_PIDERR USB_RXCSRH10_DMAEN USB_RXCSRH10_AUTORQ USB_RXCSRH10_AUTOCL

USB_RXCSRH10_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH10_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH10_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH10_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH10_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH10_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH10_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH10

USB Receive Control and Status Endpoint 10 High
address_offset : 0x1A7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH10 RXCSRH10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH10_DT USB_RXCSRH10_DTWE USB_RXCSRH10_DMAMOD USB_RXCSRH10_PIDERR USB_RXCSRH10_DISNYET USB_RXCSRH10_DMAEN USB_RXCSRH10_AUTORQ USB_RXCSRH10_ISO USB_RXCSRH10_AUTOCL

USB_RXCSRH10_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH10_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH10_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH10_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH10_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH10_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH10_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH10_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH10_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT10

USB Receive Byte Count Endpoint 10
address_offset : 0x1A8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT10 USB0RXCOUNT10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT10_COUNT

USB_RXCOUNT10_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT10

USB Receive Byte Count Endpoint 10
address_offset : 0x1A8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT10 RXCOUNT10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT10_COUNT

USB_RXCOUNT10_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE10

USB Host Transmit Configure Type Endpoint 10
address_offset : 0x1AA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE10 USB0TXTYPE10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE10_TEP USB_TXTYPE10_PROTO USB_TXTYPE10_SPEED

USB_TXTYPE10_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE10_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE10_PROTO_CTRL

Control

0x1 : USB_TXTYPE10_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE10_PROTO_BULK

Bulk

0x3 : USB_TXTYPE10_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE10_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE10_SPEED_DFLT

Default

0x2 : USB_TXTYPE10_SPEED_FULL

Full

0x3 : USB_TXTYPE10_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE10

USB Host Transmit Configure Type Endpoint 10
address_offset : 0x1AA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE10 TXTYPE10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE10_TEP USB_TXTYPE10_PROTO USB_TXTYPE10_SPEED

USB_TXTYPE10_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE10_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE10_PROTO_CTRL

Control

0x1 : USB_TXTYPE10_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE10_PROTO_BULK

Bulk

0x3 : USB_TXTYPE10_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE10_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE10_SPEED_DFLT

Default

0x2 : USB_TXTYPE10_SPEED_FULL

Full

0x3 : USB_TXTYPE10_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL10

USB Host Transmit Interval Endpoint 10
address_offset : 0x1AB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL10 USB0TXINTERVAL10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL10_TXPOLL

USB_TXINTERVAL10_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL10

USB Host Transmit Interval Endpoint 10
address_offset : 0x1AB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL10 TXINTERVAL10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL10_TXPOLL USB_TXINTERVAL10_NAKLMT

USB_TXINTERVAL10_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL10_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE10

USB Host Configure Receive Type Endpoint 10
address_offset : 0x1AC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE10 USB0RXTYPE10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE10_TEP USB_RXTYPE10_PROTO USB_RXTYPE10_SPEED

USB_RXTYPE10_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE10_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE10_PROTO_CTRL

Control

0x1 : USB_RXTYPE10_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE10_PROTO_BULK

Bulk

0x3 : USB_RXTYPE10_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE10_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE10_SPEED_DFLT

Default

0x2 : USB_RXTYPE10_SPEED_FULL

Full

0x3 : USB_RXTYPE10_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE10

USB Host Configure Receive Type Endpoint 10
address_offset : 0x1AC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE10 RXTYPE10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE10_TEP USB_RXTYPE10_PROTO USB_RXTYPE10_SPEED

USB_RXTYPE10_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE10_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE10_PROTO_CTRL

Control

0x1 : USB_RXTYPE10_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE10_PROTO_BULK

Bulk

0x3 : USB_RXTYPE10_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE10_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE10_SPEED_DFLT

Default

0x2 : USB_RXTYPE10_SPEED_FULL

Full

0x3 : USB_RXTYPE10_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL10

USB Host Receive Polling Interval Endpoint 10
address_offset : 0x1AD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL10 USB0RXINTERVAL10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL10_TXPOLL

USB_RXINTERVAL10_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL10

USB Host Receive Polling Interval Endpoint 10
address_offset : 0x1AD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL10 RXINTERVAL10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL10_TXPOLL USB_RXINTERVAL10_NAKLMT

USB_RXINTERVAL10_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL10_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP11

USB Maximum Transmit Data Endpoint 11
address_offset : 0x1B0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP11 USB0TXMAXP11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP11_MAXLOAD

USB_TXMAXP11_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP11

USB Maximum Transmit Data Endpoint 11
address_offset : 0x1B0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP11 TXMAXP11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP11_MAXLOAD

USB_TXMAXP11_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL11

USB Transmit Control and Status Endpoint 11 Low
address_offset : 0x1B2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL11 USB0TXCSRL11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL11_TXRDY USB_TXCSRL11_FIFONE USB_TXCSRL11_ERROR USB_TXCSRL11_FLUSH USB_TXCSRL11_SETUP USB_TXCSRL11_STALLED USB_TXCSRL11_CLRDT USB_TXCSRL11_NAKTO

USB_TXCSRL11_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL11_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL11_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL11_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL11_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL11_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL11_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL11_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL11

USB Transmit Control and Status Endpoint 11 Low
address_offset : 0x1B2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL11 TXCSRL11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL11_TXRDY USB_TXCSRL11_FIFONE USB_TXCSRL11_ERROR USB_TXCSRL11_UNDRN USB_TXCSRL11_FLUSH USB_TXCSRL11_SETUP USB_TXCSRL11_STALL USB_TXCSRL11_STALLED USB_TXCSRL11_CLRDT USB_TXCSRL11_NAKTO

USB_TXCSRL11_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL11_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL11_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL11_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL11_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL11_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL11_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL11_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL11_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL11_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH11

USB Transmit Control and Status Endpoint 11 High
address_offset : 0x1B3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH11 USB0TXCSRH11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH11_DT USB_TXCSRH11_DTWE USB_TXCSRH11_DMAMOD USB_TXCSRH11_FDT USB_TXCSRH11_DMAEN USB_TXCSRH11_MODE USB_TXCSRH11_ISO USB_TXCSRH11_AUTOSET

USB_TXCSRH11_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH11_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH11_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH11_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH11_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH11_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH11_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH11_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH11

USB Transmit Control and Status Endpoint 11 High
address_offset : 0x1B3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH11 TXCSRH11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH11_DT USB_TXCSRH11_DTWE USB_TXCSRH11_DMAMOD USB_TXCSRH11_FDT USB_TXCSRH11_DMAEN USB_TXCSRH11_MODE USB_TXCSRH11_ISO USB_TXCSRH11_AUTOSET

USB_TXCSRH11_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH11_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH11_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH11_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH11_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH11_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH11_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH11_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP11

USB Maximum Receive Data Endpoint 11
address_offset : 0x1B4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP11 USB0RXMAXP11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP11_MAXLOAD

USB_RXMAXP11_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP11

USB Maximum Receive Data Endpoint 11
address_offset : 0x1B4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP11 RXMAXP11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP11_MAXLOAD

USB_RXMAXP11_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL11

USB Receive Control and Status Endpoint 11 Low
address_offset : 0x1B6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL11 USB0RXCSRL11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL11_RXRDY USB_RXCSRL11_FULL USB_RXCSRL11_OVER USB_RXCSRL11_DATAERR USB_RXCSRL11_FLUSH USB_RXCSRL11_STALL USB_RXCSRL11_STALLED USB_RXCSRL11_CLRDT

USB_RXCSRL11_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL11_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL11_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL11_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL11_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL11_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL11_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL11_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL11

USB Receive Control and Status Endpoint 11 Low
address_offset : 0x1B6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL11 RXCSRL11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL11_RXRDY USB_RXCSRL11_FULL USB_RXCSRL11_OVER USB_RXCSRL11_ERROR USB_RXCSRL11_DATAERR USB_RXCSRL11_NAKTO USB_RXCSRL11_FLUSH USB_RXCSRL11_STALL USB_RXCSRL11_REQPKT USB_RXCSRL11_STALLED USB_RXCSRL11_CLRDT

USB_RXCSRL11_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL11_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL11_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL11_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL11_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL11_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL11_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL11_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL11_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL11_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL11_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH11

USB Receive Control and Status Endpoint 11 High
address_offset : 0x1B7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH11 USB0RXCSRH11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH11_DT USB_RXCSRH11_DTWE USB_RXCSRH11_DMAMOD USB_RXCSRH11_PIDERR USB_RXCSRH11_DMAEN USB_RXCSRH11_AUTORQ USB_RXCSRH11_AUTOCL

USB_RXCSRH11_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH11_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH11_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH11_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH11_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH11_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH11_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH11

USB Receive Control and Status Endpoint 11 High
address_offset : 0x1B7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH11 RXCSRH11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH11_DT USB_RXCSRH11_DTWE USB_RXCSRH11_DMAMOD USB_RXCSRH11_PIDERR USB_RXCSRH11_DISNYET USB_RXCSRH11_DMAEN USB_RXCSRH11_AUTORQ USB_RXCSRH11_ISO USB_RXCSRH11_AUTOCL

USB_RXCSRH11_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH11_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH11_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH11_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH11_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH11_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH11_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH11_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH11_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT11

USB Receive Byte Count Endpoint 11
address_offset : 0x1B8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT11 USB0RXCOUNT11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT11_COUNT

USB_RXCOUNT11_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT11

USB Receive Byte Count Endpoint 11
address_offset : 0x1B8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT11 RXCOUNT11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT11_COUNT

USB_RXCOUNT11_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE11

USB Host Transmit Configure Type Endpoint 11
address_offset : 0x1BA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE11 USB0TXTYPE11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE11_TEP USB_TXTYPE11_PROTO USB_TXTYPE11_SPEED

USB_TXTYPE11_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE11_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE11_PROTO_CTRL

Control

0x1 : USB_TXTYPE11_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE11_PROTO_BULK

Bulk

0x3 : USB_TXTYPE11_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE11_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE11_SPEED_DFLT

Default

0x2 : USB_TXTYPE11_SPEED_FULL

Full

0x3 : USB_TXTYPE11_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE11

USB Host Transmit Configure Type Endpoint 11
address_offset : 0x1BA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE11 TXTYPE11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE11_TEP USB_TXTYPE11_PROTO USB_TXTYPE11_SPEED

USB_TXTYPE11_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE11_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE11_PROTO_CTRL

Control

0x1 : USB_TXTYPE11_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE11_PROTO_BULK

Bulk

0x3 : USB_TXTYPE11_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE11_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE11_SPEED_DFLT

Default

0x2 : USB_TXTYPE11_SPEED_FULL

Full

0x3 : USB_TXTYPE11_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL11

USB Host Transmit Interval Endpoint 11
address_offset : 0x1BB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL11 USB0TXINTERVAL11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL11_TXPOLL

USB_TXINTERVAL11_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL11

USB Host Transmit Interval Endpoint 11
address_offset : 0x1BB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL11 TXINTERVAL11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL11_TXPOLL USB_TXINTERVAL11_NAKLMT

USB_TXINTERVAL11_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL11_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE11

USB Host Configure Receive Type Endpoint 11
address_offset : 0x1BC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE11 USB0RXTYPE11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE11_TEP USB_RXTYPE11_PROTO USB_RXTYPE11_SPEED

USB_RXTYPE11_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE11_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE11_PROTO_CTRL

Control

0x1 : USB_RXTYPE11_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE11_PROTO_BULK

Bulk

0x3 : USB_RXTYPE11_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE11_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE11_SPEED_DFLT

Default

0x2 : USB_RXTYPE11_SPEED_FULL

Full

0x3 : USB_RXTYPE11_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE11

USB Host Configure Receive Type Endpoint 11
address_offset : 0x1BC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE11 RXTYPE11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE11_TEP USB_RXTYPE11_PROTO USB_RXTYPE11_SPEED

USB_RXTYPE11_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE11_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE11_PROTO_CTRL

Control

0x1 : USB_RXTYPE11_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE11_PROTO_BULK

Bulk

0x3 : USB_RXTYPE11_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE11_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE11_SPEED_DFLT

Default

0x2 : USB_RXTYPE11_SPEED_FULL

Full

0x3 : USB_RXTYPE11_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL11

USB Host Receive Polling Interval Endpoint 11
address_offset : 0x1BD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL11 USB0RXINTERVAL11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL11_TXPOLL

USB_RXINTERVAL11_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL11

USB Host Receive Polling Interval Endpoint 11
address_offset : 0x1BD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL11 RXINTERVAL11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL11_TXPOLL USB_RXINTERVAL11_NAKLMT

USB_RXINTERVAL11_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL11_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP12

USB Maximum Transmit Data Endpoint 12
address_offset : 0x1C0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP12 USB0TXMAXP12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP12_MAXLOAD

USB_TXMAXP12_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP12

USB Maximum Transmit Data Endpoint 12
address_offset : 0x1C0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP12 TXMAXP12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP12_MAXLOAD

USB_TXMAXP12_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL12

USB Transmit Control and Status Endpoint 12 Low
address_offset : 0x1C2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL12 USB0TXCSRL12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL12_TXRDY USB_TXCSRL12_FIFONE USB_TXCSRL12_ERROR USB_TXCSRL12_FLUSH USB_TXCSRL12_SETUP USB_TXCSRL12_STALLED USB_TXCSRL12_CLRDT USB_TXCSRL12_NAKTO

USB_TXCSRL12_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL12_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL12_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL12_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL12_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL12_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL12_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL12_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL12

USB Transmit Control and Status Endpoint 12 Low
address_offset : 0x1C2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL12 TXCSRL12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL12_TXRDY USB_TXCSRL12_FIFONE USB_TXCSRL12_ERROR USB_TXCSRL12_UNDRN USB_TXCSRL12_FLUSH USB_TXCSRL12_SETUP USB_TXCSRL12_STALL USB_TXCSRL12_STALLED USB_TXCSRL12_CLRDT USB_TXCSRL12_NAKTO

USB_TXCSRL12_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL12_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL12_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL12_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL12_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL12_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL12_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL12_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL12_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL12_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH12

USB Transmit Control and Status Endpoint 12 High
address_offset : 0x1C3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH12 USB0TXCSRH12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH12_DT USB_TXCSRH12_DTWE USB_TXCSRH12_DMAMOD USB_TXCSRH12_FDT USB_TXCSRH12_DMAEN USB_TXCSRH12_MODE USB_TXCSRH12_ISO USB_TXCSRH12_AUTOSET

USB_TXCSRH12_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH12_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH12_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH12_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH12_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH12_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH12_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH12_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH12

USB Transmit Control and Status Endpoint 12 High
address_offset : 0x1C3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH12 TXCSRH12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH12_DT USB_TXCSRH12_DTWE USB_TXCSRH12_DMAMOD USB_TXCSRH12_FDT USB_TXCSRH12_DMAEN USB_TXCSRH12_MODE USB_TXCSRH12_ISO USB_TXCSRH12_AUTOSET

USB_TXCSRH12_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH12_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH12_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH12_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH12_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH12_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH12_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH12_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP12

USB Maximum Receive Data Endpoint 12
address_offset : 0x1C4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP12 USB0RXMAXP12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP12_MAXLOAD

USB_RXMAXP12_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP12

USB Maximum Receive Data Endpoint 12
address_offset : 0x1C4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP12 RXMAXP12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP12_MAXLOAD

USB_RXMAXP12_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL12

USB Receive Control and Status Endpoint 12 Low
address_offset : 0x1C6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL12 USB0RXCSRL12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL12_RXRDY USB_RXCSRL12_FULL USB_RXCSRL12_OVER USB_RXCSRL12_DATAERR USB_RXCSRL12_FLUSH USB_RXCSRL12_STALL USB_RXCSRL12_STALLED USB_RXCSRL12_CLRDT

USB_RXCSRL12_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL12_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL12_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL12_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL12_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL12_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL12_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL12_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL12

USB Receive Control and Status Endpoint 12 Low
address_offset : 0x1C6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL12 RXCSRL12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL12_RXRDY USB_RXCSRL12_FULL USB_RXCSRL12_OVER USB_RXCSRL12_ERROR USB_RXCSRL12_DATAERR USB_RXCSRL12_NAKTO USB_RXCSRL12_FLUSH USB_RXCSRL12_STALL USB_RXCSRL12_REQPKT USB_RXCSRL12_STALLED USB_RXCSRL12_CLRDT

USB_RXCSRL12_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL12_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL12_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL12_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL12_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL12_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL12_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL12_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL12_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL12_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL12_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH12

USB Receive Control and Status Endpoint 12 High
address_offset : 0x1C7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH12 USB0RXCSRH12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH12_DT USB_RXCSRH12_DTWE USB_RXCSRH12_DMAMOD USB_RXCSRH12_PIDERR USB_RXCSRH12_DMAEN USB_RXCSRH12_AUTORQ USB_RXCSRH12_AUTOCL

USB_RXCSRH12_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH12_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH12_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH12_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH12_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH12_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH12_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH12

USB Receive Control and Status Endpoint 12 High
address_offset : 0x1C7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH12 RXCSRH12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH12_DT USB_RXCSRH12_DTWE USB_RXCSRH12_DMAMOD USB_RXCSRH12_PIDERR USB_RXCSRH12_DISNYET USB_RXCSRH12_DMAEN USB_RXCSRH12_AUTORQ USB_RXCSRH12_ISO USB_RXCSRH12_AUTOCL

USB_RXCSRH12_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH12_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH12_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH12_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH12_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH12_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH12_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH12_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH12_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT12

USB Receive Byte Count Endpoint 12
address_offset : 0x1C8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT12 USB0RXCOUNT12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT12_COUNT

USB_RXCOUNT12_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT12

USB Receive Byte Count Endpoint 12
address_offset : 0x1C8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT12 RXCOUNT12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT12_COUNT

USB_RXCOUNT12_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE12

USB Host Transmit Configure Type Endpoint 12
address_offset : 0x1CA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE12 USB0TXTYPE12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE12_TEP USB_TXTYPE12_PROTO USB_TXTYPE12_SPEED

USB_TXTYPE12_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE12_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE12_PROTO_CTRL

Control

0x1 : USB_TXTYPE12_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE12_PROTO_BULK

Bulk

0x3 : USB_TXTYPE12_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE12_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE12_SPEED_DFLT

Default

0x2 : USB_TXTYPE12_SPEED_FULL

Full

0x3 : USB_TXTYPE12_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE12

USB Host Transmit Configure Type Endpoint 12
address_offset : 0x1CA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE12 TXTYPE12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE12_TEP USB_TXTYPE12_PROTO USB_TXTYPE12_SPEED

USB_TXTYPE12_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE12_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE12_PROTO_CTRL

Control

0x1 : USB_TXTYPE12_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE12_PROTO_BULK

Bulk

0x3 : USB_TXTYPE12_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE12_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE12_SPEED_DFLT

Default

0x2 : USB_TXTYPE12_SPEED_FULL

Full

0x3 : USB_TXTYPE12_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL12

USB Host Transmit Interval Endpoint 12
address_offset : 0x1CB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL12 USB0TXINTERVAL12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL12_TXPOLL

USB_TXINTERVAL12_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL12

USB Host Transmit Interval Endpoint 12
address_offset : 0x1CB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL12 TXINTERVAL12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL12_TXPOLL USB_TXINTERVAL12_NAKLMT

USB_TXINTERVAL12_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL12_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE12

USB Host Configure Receive Type Endpoint 12
address_offset : 0x1CC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE12 USB0RXTYPE12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE12_TEP USB_RXTYPE12_PROTO USB_RXTYPE12_SPEED

USB_RXTYPE12_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE12_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE12_PROTO_CTRL

Control

0x1 : USB_RXTYPE12_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE12_PROTO_BULK

Bulk

0x3 : USB_RXTYPE12_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE12_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE12_SPEED_DFLT

Default

0x2 : USB_RXTYPE12_SPEED_FULL

Full

0x3 : USB_RXTYPE12_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE12

USB Host Configure Receive Type Endpoint 12
address_offset : 0x1CC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE12 RXTYPE12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE12_TEP USB_RXTYPE12_PROTO USB_RXTYPE12_SPEED

USB_RXTYPE12_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE12_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE12_PROTO_CTRL

Control

0x1 : USB_RXTYPE12_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE12_PROTO_BULK

Bulk

0x3 : USB_RXTYPE12_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE12_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE12_SPEED_DFLT

Default

0x2 : USB_RXTYPE12_SPEED_FULL

Full

0x3 : USB_RXTYPE12_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL12

USB Host Receive Polling Interval Endpoint 12
address_offset : 0x1CD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL12 USB0RXINTERVAL12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL12_TXPOLL

USB_RXINTERVAL12_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL12

USB Host Receive Polling Interval Endpoint 12
address_offset : 0x1CD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL12 RXINTERVAL12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL12_TXPOLL USB_RXINTERVAL12_NAKLMT

USB_RXINTERVAL12_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL12_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP13

USB Maximum Transmit Data Endpoint 13
address_offset : 0x1D0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP13 USB0TXMAXP13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP13_MAXLOAD

USB_TXMAXP13_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP13

USB Maximum Transmit Data Endpoint 13
address_offset : 0x1D0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP13 TXMAXP13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP13_MAXLOAD

USB_TXMAXP13_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL13

USB Transmit Control and Status Endpoint 13 Low
address_offset : 0x1D2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL13 USB0TXCSRL13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL13_TXRDY USB_TXCSRL13_FIFONE USB_TXCSRL13_ERROR USB_TXCSRL13_FLUSH USB_TXCSRL13_SETUP USB_TXCSRL13_STALLED USB_TXCSRL13_CLRDT USB_TXCSRL13_NAKTO

USB_TXCSRL13_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL13_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL13_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL13_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL13_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL13_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL13_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL13_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL13

USB Transmit Control and Status Endpoint 13 Low
address_offset : 0x1D2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL13 TXCSRL13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL13_TXRDY USB_TXCSRL13_FIFONE USB_TXCSRL13_ERROR USB_TXCSRL13_UNDRN USB_TXCSRL13_FLUSH USB_TXCSRL13_SETUP USB_TXCSRL13_STALL USB_TXCSRL13_STALLED USB_TXCSRL13_CLRDT USB_TXCSRL13_NAKTO

USB_TXCSRL13_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL13_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL13_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL13_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL13_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL13_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL13_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL13_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL13_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL13_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH13

USB Transmit Control and Status Endpoint 13 High
address_offset : 0x1D3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH13 USB0TXCSRH13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH13_DT USB_TXCSRH13_DTWE USB_TXCSRH13_DMAMOD USB_TXCSRH13_FDT USB_TXCSRH13_DMAEN USB_TXCSRH13_MODE USB_TXCSRH13_ISO USB_TXCSRH13_AUTOSET

USB_TXCSRH13_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH13_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH13_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH13_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH13_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH13_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH13_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH13_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH13

USB Transmit Control and Status Endpoint 13 High
address_offset : 0x1D3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH13 TXCSRH13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH13_DT USB_TXCSRH13_DTWE USB_TXCSRH13_DMAMOD USB_TXCSRH13_FDT USB_TXCSRH13_DMAEN USB_TXCSRH13_MODE USB_TXCSRH13_ISO USB_TXCSRH13_AUTOSET

USB_TXCSRH13_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH13_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH13_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH13_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH13_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH13_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH13_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH13_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP13

USB Maximum Receive Data Endpoint 13
address_offset : 0x1D4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP13 USB0RXMAXP13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP13_MAXLOAD

USB_RXMAXP13_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP13

USB Maximum Receive Data Endpoint 13
address_offset : 0x1D4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP13 RXMAXP13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP13_MAXLOAD

USB_RXMAXP13_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL13

USB Receive Control and Status Endpoint 13 Low
address_offset : 0x1D6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL13 USB0RXCSRL13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL13_RXRDY USB_RXCSRL13_FULL USB_RXCSRL13_OVER USB_RXCSRL13_DATAERR USB_RXCSRL13_FLUSH USB_RXCSRL13_STALL USB_RXCSRL13_STALLED USB_RXCSRL13_CLRDT

USB_RXCSRL13_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL13_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL13_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL13_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL13_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL13_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL13_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL13_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL13

USB Receive Control and Status Endpoint 13 Low
address_offset : 0x1D6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL13 RXCSRL13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL13_RXRDY USB_RXCSRL13_FULL USB_RXCSRL13_OVER USB_RXCSRL13_ERROR USB_RXCSRL13_DATAERR USB_RXCSRL13_NAKTO USB_RXCSRL13_FLUSH USB_RXCSRL13_STALL USB_RXCSRL13_REQPKT USB_RXCSRL13_STALLED USB_RXCSRL13_CLRDT

USB_RXCSRL13_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL13_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL13_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL13_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL13_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL13_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL13_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL13_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL13_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL13_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL13_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH13

USB Receive Control and Status Endpoint 13 High
address_offset : 0x1D7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH13 USB0RXCSRH13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH13_DT USB_RXCSRH13_DTWE USB_RXCSRH13_DMAMOD USB_RXCSRH13_PIDERR USB_RXCSRH13_DMAEN USB_RXCSRH13_AUTORQ USB_RXCSRH13_AUTOCL

USB_RXCSRH13_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH13_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH13_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH13_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH13_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH13_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH13_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH13

USB Receive Control and Status Endpoint 13 High
address_offset : 0x1D7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH13 RXCSRH13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH13_DT USB_RXCSRH13_DTWE USB_RXCSRH13_DMAMOD USB_RXCSRH13_PIDERR USB_RXCSRH13_DISNYET USB_RXCSRH13_DMAEN USB_RXCSRH13_AUTORQ USB_RXCSRH13_ISO USB_RXCSRH13_AUTOCL

USB_RXCSRH13_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH13_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH13_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH13_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH13_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH13_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH13_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH13_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH13_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT13

USB Receive Byte Count Endpoint 13
address_offset : 0x1D8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT13 USB0RXCOUNT13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT13_COUNT

USB_RXCOUNT13_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT13

USB Receive Byte Count Endpoint 13
address_offset : 0x1D8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT13 RXCOUNT13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT13_COUNT

USB_RXCOUNT13_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE13

USB Host Transmit Configure Type Endpoint 13
address_offset : 0x1DA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE13 USB0TXTYPE13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE13_TEP USB_TXTYPE13_PROTO USB_TXTYPE13_SPEED

USB_TXTYPE13_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE13_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE13_PROTO_CTRL

Control

0x1 : USB_TXTYPE13_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE13_PROTO_BULK

Bulk

0x3 : USB_TXTYPE13_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE13_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE13_SPEED_DFLT

Default

0x2 : USB_TXTYPE13_SPEED_FULL

Full

0x3 : USB_TXTYPE13_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE13

USB Host Transmit Configure Type Endpoint 13
address_offset : 0x1DA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE13 TXTYPE13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE13_TEP USB_TXTYPE13_PROTO USB_TXTYPE13_SPEED

USB_TXTYPE13_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE13_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE13_PROTO_CTRL

Control

0x1 : USB_TXTYPE13_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE13_PROTO_BULK

Bulk

0x3 : USB_TXTYPE13_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE13_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE13_SPEED_DFLT

Default

0x2 : USB_TXTYPE13_SPEED_FULL

Full

0x3 : USB_TXTYPE13_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL13

USB Host Transmit Interval Endpoint 13
address_offset : 0x1DB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL13 USB0TXINTERVAL13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL13_TXPOLL

USB_TXINTERVAL13_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL13

USB Host Transmit Interval Endpoint 13
address_offset : 0x1DB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL13 TXINTERVAL13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL13_TXPOLL USB_TXINTERVAL13_NAKLMT

USB_TXINTERVAL13_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL13_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE13

USB Host Configure Receive Type Endpoint 13
address_offset : 0x1DC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE13 USB0RXTYPE13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE13_TEP USB_RXTYPE13_PROTO USB_RXTYPE13_SPEED

USB_RXTYPE13_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE13_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE13_PROTO_CTRL

Control

0x1 : USB_RXTYPE13_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE13_PROTO_BULK

Bulk

0x3 : USB_RXTYPE13_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE13_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE13_SPEED_DFLT

Default

0x2 : USB_RXTYPE13_SPEED_FULL

Full

0x3 : USB_RXTYPE13_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE13

USB Host Configure Receive Type Endpoint 13
address_offset : 0x1DC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE13 RXTYPE13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE13_TEP USB_RXTYPE13_PROTO USB_RXTYPE13_SPEED

USB_RXTYPE13_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE13_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE13_PROTO_CTRL

Control

0x1 : USB_RXTYPE13_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE13_PROTO_BULK

Bulk

0x3 : USB_RXTYPE13_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE13_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE13_SPEED_DFLT

Default

0x2 : USB_RXTYPE13_SPEED_FULL

Full

0x3 : USB_RXTYPE13_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL13

USB Host Receive Polling Interval Endpoint 13
address_offset : 0x1DD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL13 USB0RXINTERVAL13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL13_TXPOLL

USB_RXINTERVAL13_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL13

USB Host Receive Polling Interval Endpoint 13
address_offset : 0x1DD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL13 RXINTERVAL13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL13_TXPOLL USB_RXINTERVAL13_NAKLMT

USB_RXINTERVAL13_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL13_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP14

USB Maximum Transmit Data Endpoint 14
address_offset : 0x1E0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP14 USB0TXMAXP14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP14_MAXLOAD

USB_TXMAXP14_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP14

USB Maximum Transmit Data Endpoint 14
address_offset : 0x1E0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP14 TXMAXP14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP14_MAXLOAD

USB_TXMAXP14_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL14

USB Transmit Control and Status Endpoint 14 Low
address_offset : 0x1E2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL14 USB0TXCSRL14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL14_TXRDY USB_TXCSRL14_FIFONE USB_TXCSRL14_ERROR USB_TXCSRL14_FLUSH USB_TXCSRL14_SETUP USB_TXCSRL14_STALLED USB_TXCSRL14_CLRDT USB_TXCSRL14_NAKTO

USB_TXCSRL14_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL14_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL14_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL14_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL14_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL14_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL14_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL14_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL14

USB Transmit Control and Status Endpoint 14 Low
address_offset : 0x1E2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL14 TXCSRL14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL14_TXRDY USB_TXCSRL14_FIFONE USB_TXCSRL14_ERROR USB_TXCSRL14_UNDRN USB_TXCSRL14_FLUSH USB_TXCSRL14_SETUP USB_TXCSRL14_STALL USB_TXCSRL14_STALLED USB_TXCSRL14_CLRDT USB_TXCSRL14_NAKTO

USB_TXCSRL14_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL14_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL14_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL14_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL14_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL14_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL14_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL14_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL14_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL14_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH14

USB Transmit Control and Status Endpoint 14 High
address_offset : 0x1E3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH14 USB0TXCSRH14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH14_DT USB_TXCSRH14_DTWE USB_TXCSRH14_DMAMOD USB_TXCSRH14_FDT USB_TXCSRH14_DMAEN USB_TXCSRH14_MODE USB_TXCSRH14_ISO USB_TXCSRH14_AUTOSET

USB_TXCSRH14_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH14_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH14_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH14_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH14_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH14_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH14_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH14_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH14

USB Transmit Control and Status Endpoint 14 High
address_offset : 0x1E3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH14 TXCSRH14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH14_DT USB_TXCSRH14_DTWE USB_TXCSRH14_DMAMOD USB_TXCSRH14_FDT USB_TXCSRH14_DMAEN USB_TXCSRH14_MODE USB_TXCSRH14_ISO USB_TXCSRH14_AUTOSET

USB_TXCSRH14_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH14_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH14_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH14_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH14_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH14_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH14_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH14_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP14

USB Maximum Receive Data Endpoint 14
address_offset : 0x1E4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP14 USB0RXMAXP14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP14_MAXLOAD

USB_RXMAXP14_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP14

USB Maximum Receive Data Endpoint 14
address_offset : 0x1E4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP14 RXMAXP14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP14_MAXLOAD

USB_RXMAXP14_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL14

USB Receive Control and Status Endpoint 14 Low
address_offset : 0x1E6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL14 USB0RXCSRL14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL14_RXRDY USB_RXCSRL14_FULL USB_RXCSRL14_OVER USB_RXCSRL14_DATAERR USB_RXCSRL14_FLUSH USB_RXCSRL14_STALL USB_RXCSRL14_STALLED USB_RXCSRL14_CLRDT

USB_RXCSRL14_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL14_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL14_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL14_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL14_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL14_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL14_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL14_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL14

USB Receive Control and Status Endpoint 14 Low
address_offset : 0x1E6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL14 RXCSRL14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL14_RXRDY USB_RXCSRL14_FULL USB_RXCSRL14_OVER USB_RXCSRL14_ERROR USB_RXCSRL14_DATAERR USB_RXCSRL14_NAKTO USB_RXCSRL14_FLUSH USB_RXCSRL14_STALL USB_RXCSRL14_REQPKT USB_RXCSRL14_STALLED USB_RXCSRL14_CLRDT

USB_RXCSRL14_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL14_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL14_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL14_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL14_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL14_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL14_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL14_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL14_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL14_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL14_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH14

USB Receive Control and Status Endpoint 14 High
address_offset : 0x1E7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH14 USB0RXCSRH14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH14_DT USB_RXCSRH14_DTWE USB_RXCSRH14_DMAMOD USB_RXCSRH14_PIDERR USB_RXCSRH14_DMAEN USB_RXCSRH14_AUTORQ USB_RXCSRH14_AUTOCL

USB_RXCSRH14_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH14_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH14_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH14_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH14_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH14_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH14_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH14

USB Receive Control and Status Endpoint 14 High
address_offset : 0x1E7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH14 RXCSRH14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH14_DT USB_RXCSRH14_DTWE USB_RXCSRH14_DMAMOD USB_RXCSRH14_PIDERR USB_RXCSRH14_DISNYET USB_RXCSRH14_DMAEN USB_RXCSRH14_AUTORQ USB_RXCSRH14_ISO USB_RXCSRH14_AUTOCL

USB_RXCSRH14_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH14_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH14_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH14_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH14_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH14_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH14_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH14_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH14_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT14

USB Receive Byte Count Endpoint 14
address_offset : 0x1E8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT14 USB0RXCOUNT14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT14_COUNT

USB_RXCOUNT14_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT14

USB Receive Byte Count Endpoint 14
address_offset : 0x1E8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT14 RXCOUNT14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT14_COUNT

USB_RXCOUNT14_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE14

USB Host Transmit Configure Type Endpoint 14
address_offset : 0x1EA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE14 USB0TXTYPE14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE14_TEP USB_TXTYPE14_PROTO USB_TXTYPE14_SPEED

USB_TXTYPE14_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE14_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE14_PROTO_CTRL

Control

0x1 : USB_TXTYPE14_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE14_PROTO_BULK

Bulk

0x3 : USB_TXTYPE14_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE14_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE14_SPEED_DFLT

Default

0x2 : USB_TXTYPE14_SPEED_FULL

Full

0x3 : USB_TXTYPE14_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE14

USB Host Transmit Configure Type Endpoint 14
address_offset : 0x1EA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE14 TXTYPE14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE14_TEP USB_TXTYPE14_PROTO USB_TXTYPE14_SPEED

USB_TXTYPE14_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE14_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE14_PROTO_CTRL

Control

0x1 : USB_TXTYPE14_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE14_PROTO_BULK

Bulk

0x3 : USB_TXTYPE14_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE14_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE14_SPEED_DFLT

Default

0x2 : USB_TXTYPE14_SPEED_FULL

Full

0x3 : USB_TXTYPE14_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL14

USB Host Transmit Interval Endpoint 14
address_offset : 0x1EB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL14 USB0TXINTERVAL14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL14_TXPOLL

USB_TXINTERVAL14_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL14

USB Host Transmit Interval Endpoint 14
address_offset : 0x1EB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL14 TXINTERVAL14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL14_TXPOLL USB_TXINTERVAL14_NAKLMT

USB_TXINTERVAL14_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL14_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE14

USB Host Configure Receive Type Endpoint 14
address_offset : 0x1EC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE14 USB0RXTYPE14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE14_TEP USB_RXTYPE14_PROTO USB_RXTYPE14_SPEED

USB_RXTYPE14_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE14_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE14_PROTO_CTRL

Control

0x1 : USB_RXTYPE14_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE14_PROTO_BULK

Bulk

0x3 : USB_RXTYPE14_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE14_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE14_SPEED_DFLT

Default

0x2 : USB_RXTYPE14_SPEED_FULL

Full

0x3 : USB_RXTYPE14_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE14

USB Host Configure Receive Type Endpoint 14
address_offset : 0x1EC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE14 RXTYPE14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE14_TEP USB_RXTYPE14_PROTO USB_RXTYPE14_SPEED

USB_RXTYPE14_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE14_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE14_PROTO_CTRL

Control

0x1 : USB_RXTYPE14_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE14_PROTO_BULK

Bulk

0x3 : USB_RXTYPE14_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE14_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE14_SPEED_DFLT

Default

0x2 : USB_RXTYPE14_SPEED_FULL

Full

0x3 : USB_RXTYPE14_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL14

USB Host Receive Polling Interval Endpoint 14
address_offset : 0x1ED Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL14 USB0RXINTERVAL14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL14_TXPOLL

USB_RXINTERVAL14_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL14

USB Host Receive Polling Interval Endpoint 14
address_offset : 0x1ED Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL14 RXINTERVAL14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL14_TXPOLL USB_RXINTERVAL14_NAKLMT

USB_RXINTERVAL14_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL14_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXMAXP15

USB Maximum Transmit Data Endpoint 15
address_offset : 0x1F0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXMAXP15 USB0TXMAXP15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP15_MAXLOAD

USB_TXMAXP15_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


TXMAXP15

USB Maximum Transmit Data Endpoint 15
address_offset : 0x1F0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXMAXP15 TXMAXP15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXMAXP15_MAXLOAD

USB_TXMAXP15_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0TXCSRL15

USB Transmit Control and Status Endpoint 15 Low
address_offset : 0x1F2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRL15 USB0TXCSRL15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL15_TXRDY USB_TXCSRL15_FIFONE USB_TXCSRL15_ERROR USB_TXCSRL15_FLUSH USB_TXCSRL15_SETUP USB_TXCSRL15_STALLED USB_TXCSRL15_CLRDT USB_TXCSRL15_NAKTO

USB_TXCSRL15_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL15_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL15_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL15_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL15_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL15_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL15_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL15_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


TXCSRL15

USB Transmit Control and Status Endpoint 15 Low
address_offset : 0x1F2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRL15 TXCSRL15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRL15_TXRDY USB_TXCSRL15_FIFONE USB_TXCSRL15_ERROR USB_TXCSRL15_UNDRN USB_TXCSRL15_FLUSH USB_TXCSRL15_SETUP USB_TXCSRL15_STALL USB_TXCSRL15_STALLED USB_TXCSRL15_CLRDT USB_TXCSRL15_NAKTO

USB_TXCSRL15_TXRDY : Transmit Packet Ready
bits : 0 - 0 (1 bit)

USB_TXCSRL15_FIFONE : FIFO Not Empty
bits : 1 - 2 (2 bit)

USB_TXCSRL15_ERROR : Error
bits : 2 - 4 (3 bit)

USB_TXCSRL15_UNDRN : Underrun
bits : 2 - 4 (3 bit)

USB_TXCSRL15_FLUSH : Flush FIFO
bits : 3 - 6 (4 bit)

USB_TXCSRL15_SETUP : Setup Packet
bits : 4 - 8 (5 bit)

USB_TXCSRL15_STALL : Send STALL
bits : 4 - 8 (5 bit)

USB_TXCSRL15_STALLED : Endpoint Stalled
bits : 5 - 10 (6 bit)

USB_TXCSRL15_CLRDT : Clear Data Toggle
bits : 6 - 12 (7 bit)

USB_TXCSRL15_NAKTO : NAK Timeout
bits : 7 - 14 (8 bit)


USB0TXCSRH15

USB Transmit Control and Status Endpoint 15 High
address_offset : 0x1F3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXCSRH15 USB0TXCSRH15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH15_DT USB_TXCSRH15_DTWE USB_TXCSRH15_DMAMOD USB_TXCSRH15_FDT USB_TXCSRH15_DMAEN USB_TXCSRH15_MODE USB_TXCSRH15_ISO USB_TXCSRH15_AUTOSET

USB_TXCSRH15_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH15_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH15_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH15_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH15_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH15_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH15_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH15_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


TXCSRH15

USB Transmit Control and Status Endpoint 15 High
address_offset : 0x1F3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXCSRH15 TXCSRH15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXCSRH15_DT USB_TXCSRH15_DTWE USB_TXCSRH15_DMAMOD USB_TXCSRH15_FDT USB_TXCSRH15_DMAEN USB_TXCSRH15_MODE USB_TXCSRH15_ISO USB_TXCSRH15_AUTOSET

USB_TXCSRH15_DT : Data Toggle
bits : 0 - 0 (1 bit)

USB_TXCSRH15_DTWE : Data Toggle Write Enable
bits : 1 - 2 (2 bit)

USB_TXCSRH15_DMAMOD : DMA Request Mode
bits : 2 - 4 (3 bit)

USB_TXCSRH15_FDT : Force Data Toggle
bits : 3 - 6 (4 bit)

USB_TXCSRH15_DMAEN : DMA Request Enable
bits : 4 - 8 (5 bit)

USB_TXCSRH15_MODE : Mode
bits : 5 - 10 (6 bit)

USB_TXCSRH15_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_TXCSRH15_AUTOSET : Auto Set
bits : 7 - 14 (8 bit)


USB0RXMAXP15

USB Maximum Receive Data Endpoint 15
address_offset : 0x1F4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXMAXP15 USB0RXMAXP15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP15_MAXLOAD

USB_RXMAXP15_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


RXMAXP15

USB Maximum Receive Data Endpoint 15
address_offset : 0x1F4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXMAXP15 RXMAXP15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXMAXP15_MAXLOAD

USB_RXMAXP15_MAXLOAD : Maximum Payload
bits : 0 - 10 (11 bit)


USB0RXCSRL15

USB Receive Control and Status Endpoint 15 Low
address_offset : 0x1F6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRL15 USB0RXCSRL15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL15_RXRDY USB_RXCSRL15_FULL USB_RXCSRL15_OVER USB_RXCSRL15_DATAERR USB_RXCSRL15_FLUSH USB_RXCSRL15_STALL USB_RXCSRL15_STALLED USB_RXCSRL15_CLRDT

USB_RXCSRL15_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL15_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL15_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL15_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL15_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL15_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL15_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL15_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


RXCSRL15

USB Receive Control and Status Endpoint 15 Low
address_offset : 0x1F6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRL15 RXCSRL15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRL15_RXRDY USB_RXCSRL15_FULL USB_RXCSRL15_OVER USB_RXCSRL15_ERROR USB_RXCSRL15_DATAERR USB_RXCSRL15_NAKTO USB_RXCSRL15_FLUSH USB_RXCSRL15_STALL USB_RXCSRL15_REQPKT USB_RXCSRL15_STALLED USB_RXCSRL15_CLRDT

USB_RXCSRL15_RXRDY : Receive Packet Ready
bits : 0 - 0 (1 bit)

USB_RXCSRL15_FULL : FIFO Full
bits : 1 - 2 (2 bit)

USB_RXCSRL15_OVER : Overrun
bits : 2 - 4 (3 bit)

USB_RXCSRL15_ERROR : Error
bits : 2 - 4 (3 bit)

USB_RXCSRL15_DATAERR : Data Error
bits : 3 - 6 (4 bit)

USB_RXCSRL15_NAKTO : NAK Timeout
bits : 3 - 6 (4 bit)

USB_RXCSRL15_FLUSH : Flush FIFO
bits : 4 - 8 (5 bit)

USB_RXCSRL15_STALL : Send STALL
bits : 5 - 10 (6 bit)

USB_RXCSRL15_REQPKT : Request Packet
bits : 5 - 10 (6 bit)

USB_RXCSRL15_STALLED : Endpoint Stalled
bits : 6 - 12 (7 bit)

USB_RXCSRL15_CLRDT : Clear Data Toggle
bits : 7 - 14 (8 bit)


USB0RXCSRH15

USB Receive Control and Status Endpoint 15 High
address_offset : 0x1F7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCSRH15 USB0RXCSRH15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH15_DT USB_RXCSRH15_DTWE USB_RXCSRH15_DMAMOD USB_RXCSRH15_PIDERR USB_RXCSRH15_DMAEN USB_RXCSRH15_AUTORQ USB_RXCSRH15_AUTOCL

USB_RXCSRH15_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH15_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH15_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH15_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH15_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH15_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH15_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


RXCSRH15

USB Receive Control and Status Endpoint 15 High
address_offset : 0x1F7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCSRH15 RXCSRH15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXCSRH15_DT USB_RXCSRH15_DTWE USB_RXCSRH15_DMAMOD USB_RXCSRH15_PIDERR USB_RXCSRH15_DISNYET USB_RXCSRH15_DMAEN USB_RXCSRH15_AUTORQ USB_RXCSRH15_ISO USB_RXCSRH15_AUTOCL

USB_RXCSRH15_DT : Data Toggle
bits : 1 - 2 (2 bit)

USB_RXCSRH15_DTWE : Data Toggle Write Enable
bits : 2 - 4 (3 bit)

USB_RXCSRH15_DMAMOD : DMA Request Mode
bits : 3 - 6 (4 bit)

USB_RXCSRH15_PIDERR : PID Error
bits : 4 - 8 (5 bit)

USB_RXCSRH15_DISNYET : Disable NYET
bits : 4 - 8 (5 bit)

USB_RXCSRH15_DMAEN : DMA Request Enable
bits : 5 - 10 (6 bit)

USB_RXCSRH15_AUTORQ : Auto Request
bits : 6 - 12 (7 bit)

USB_RXCSRH15_ISO : Isochronous Transfers
bits : 6 - 12 (7 bit)

USB_RXCSRH15_AUTOCL : Auto Clear
bits : 7 - 14 (8 bit)


USB0RXCOUNT15

USB Receive Byte Count Endpoint 15
address_offset : 0x1F8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXCOUNT15 USB0RXCOUNT15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT15_COUNT

USB_RXCOUNT15_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


RXCOUNT15

USB Receive Byte Count Endpoint 15
address_offset : 0x1F8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXCOUNT15 RXCOUNT15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXCOUNT15_COUNT

USB_RXCOUNT15_COUNT : Receive Packet Count
bits : 0 - 12 (13 bit)


USB0TXTYPE15

USB Host Transmit Configure Type Endpoint 15
address_offset : 0x1FA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXTYPE15 USB0TXTYPE15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE15_TEP USB_TXTYPE15_PROTO USB_TXTYPE15_SPEED

USB_TXTYPE15_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE15_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE15_PROTO_CTRL

Control

0x1 : USB_TXTYPE15_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE15_PROTO_BULK

Bulk

0x3 : USB_TXTYPE15_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE15_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE15_SPEED_DFLT

Default

0x2 : USB_TXTYPE15_SPEED_FULL

Full

0x3 : USB_TXTYPE15_SPEED_LOW

Low

End of enumeration elements list.


TXTYPE15

USB Host Transmit Configure Type Endpoint 15
address_offset : 0x1FA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXTYPE15 TXTYPE15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXTYPE15_TEP USB_TXTYPE15_PROTO USB_TXTYPE15_SPEED

USB_TXTYPE15_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_TXTYPE15_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_TXTYPE15_PROTO_CTRL

Control

0x1 : USB_TXTYPE15_PROTO_ISOC

Isochronous

0x2 : USB_TXTYPE15_PROTO_BULK

Bulk

0x3 : USB_TXTYPE15_PROTO_INT

Interrupt

End of enumeration elements list.

USB_TXTYPE15_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_TXTYPE15_SPEED_DFLT

Default

0x2 : USB_TXTYPE15_SPEED_FULL

Full

0x3 : USB_TXTYPE15_SPEED_LOW

Low

End of enumeration elements list.


USB0TXINTERVAL15

USB Host Transmit Interval Endpoint 15
address_offset : 0x1FB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXINTERVAL15 USB0TXINTERVAL15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL15_TXPOLL

USB_TXINTERVAL15_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)


TXINTERVAL15

USB Host Transmit Interval Endpoint 15
address_offset : 0x1FB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXINTERVAL15 TXINTERVAL15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXINTERVAL15_TXPOLL USB_TXINTERVAL15_NAKLMT

USB_TXINTERVAL15_TXPOLL : TX Polling
bits : 0 - 7 (8 bit)

USB_TXINTERVAL15_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0RXTYPE15

USB Host Configure Receive Type Endpoint 15
address_offset : 0x1FC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXTYPE15 USB0RXTYPE15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE15_TEP USB_RXTYPE15_PROTO USB_RXTYPE15_SPEED

USB_RXTYPE15_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE15_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE15_PROTO_CTRL

Control

0x1 : USB_RXTYPE15_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE15_PROTO_BULK

Bulk

0x3 : USB_RXTYPE15_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE15_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE15_SPEED_DFLT

Default

0x2 : USB_RXTYPE15_SPEED_FULL

Full

0x3 : USB_RXTYPE15_SPEED_LOW

Low

End of enumeration elements list.


RXTYPE15

USB Host Configure Receive Type Endpoint 15
address_offset : 0x1FC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXTYPE15 RXTYPE15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXTYPE15_TEP USB_RXTYPE15_PROTO USB_RXTYPE15_SPEED

USB_RXTYPE15_TEP : Target Endpoint Number
bits : 0 - 3 (4 bit)

USB_RXTYPE15_PROTO : Protocol
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : USB_RXTYPE15_PROTO_CTRL

Control

0x1 : USB_RXTYPE15_PROTO_ISOC

Isochronous

0x2 : USB_RXTYPE15_PROTO_BULK

Bulk

0x3 : USB_RXTYPE15_PROTO_INT

Interrupt

End of enumeration elements list.

USB_RXTYPE15_SPEED : Operating Speed
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : USB_RXTYPE15_SPEED_DFLT

Default

0x2 : USB_RXTYPE15_SPEED_FULL

Full

0x3 : USB_RXTYPE15_SPEED_LOW

Low

End of enumeration elements list.


USB0RXINTERVAL15

USB Host Receive Polling Interval Endpoint 15
address_offset : 0x1FD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXINTERVAL15 USB0RXINTERVAL15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL15_TXPOLL

USB_RXINTERVAL15_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)


RXINTERVAL15

USB Host Receive Polling Interval Endpoint 15
address_offset : 0x1FD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXINTERVAL15 RXINTERVAL15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXINTERVAL15_TXPOLL USB_RXINTERVAL15_NAKLMT

USB_RXINTERVAL15_TXPOLL : RX Polling
bits : 0 - 7 (8 bit)

USB_RXINTERVAL15_NAKLMT : NAK Limit
bits : 0 - 7 (8 bit)


USB0TXIS

USB Transmit Interrupt Status
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXIS USB0TXIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXIS_EP0 USB_TXIS_EP1 USB_TXIS_EP2 USB_TXIS_EP3 USB_TXIS_EP4 USB_TXIS_EP5 USB_TXIS_EP6 USB_TXIS_EP7 USB_TXIS_EP8 USB_TXIS_EP9 USB_TXIS_EP10 USB_TXIS_EP11 USB_TXIS_EP12 USB_TXIS_EP13 USB_TXIS_EP14 USB_TXIS_EP15

USB_TXIS_EP0 : TX and RX Endpoint 0 Interrupt
bits : 0 - 0 (1 bit)

USB_TXIS_EP1 : TX Endpoint 1 Interrupt
bits : 1 - 2 (2 bit)

USB_TXIS_EP2 : TX Endpoint 2 Interrupt
bits : 2 - 4 (3 bit)

USB_TXIS_EP3 : TX Endpoint 3 Interrupt
bits : 3 - 6 (4 bit)

USB_TXIS_EP4 : TX Endpoint 4 Interrupt
bits : 4 - 8 (5 bit)

USB_TXIS_EP5 : TX Endpoint 5 Interrupt
bits : 5 - 10 (6 bit)

USB_TXIS_EP6 : TX Endpoint 6 Interrupt
bits : 6 - 12 (7 bit)

USB_TXIS_EP7 : TX Endpoint 7 Interrupt
bits : 7 - 14 (8 bit)

USB_TXIS_EP8 : TX Endpoint 8 Interrupt
bits : 8 - 16 (9 bit)

USB_TXIS_EP9 : TX Endpoint 9 Interrupt
bits : 9 - 18 (10 bit)

USB_TXIS_EP10 : TX Endpoint 10 Interrupt
bits : 10 - 20 (11 bit)

USB_TXIS_EP11 : TX Endpoint 11 Interrupt
bits : 11 - 22 (12 bit)

USB_TXIS_EP12 : TX Endpoint 12 Interrupt
bits : 12 - 24 (13 bit)

USB_TXIS_EP13 : TX Endpoint 13 Interrupt
bits : 13 - 26 (14 bit)

USB_TXIS_EP14 : TX Endpoint 14 Interrupt
bits : 14 - 28 (15 bit)

USB_TXIS_EP15 : TX Endpoint 15 Interrupt
bits : 15 - 30 (16 bit)


TXIS

USB Transmit Interrupt Status
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXIS TXIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXIS_EP0 USB_TXIS_EP1 USB_TXIS_EP2 USB_TXIS_EP3 USB_TXIS_EP4 USB_TXIS_EP5 USB_TXIS_EP6 USB_TXIS_EP7 USB_TXIS_EP8 USB_TXIS_EP9 USB_TXIS_EP10 USB_TXIS_EP11 USB_TXIS_EP12 USB_TXIS_EP13 USB_TXIS_EP14 USB_TXIS_EP15

USB_TXIS_EP0 : TX and RX Endpoint 0 Interrupt
bits : 0 - 0 (1 bit)

USB_TXIS_EP1 : TX Endpoint 1 Interrupt
bits : 1 - 2 (2 bit)

USB_TXIS_EP2 : TX Endpoint 2 Interrupt
bits : 2 - 4 (3 bit)

USB_TXIS_EP3 : TX Endpoint 3 Interrupt
bits : 3 - 6 (4 bit)

USB_TXIS_EP4 : TX Endpoint 4 Interrupt
bits : 4 - 8 (5 bit)

USB_TXIS_EP5 : TX Endpoint 5 Interrupt
bits : 5 - 10 (6 bit)

USB_TXIS_EP6 : TX Endpoint 6 Interrupt
bits : 6 - 12 (7 bit)

USB_TXIS_EP7 : TX Endpoint 7 Interrupt
bits : 7 - 14 (8 bit)

USB_TXIS_EP8 : TX Endpoint 8 Interrupt
bits : 8 - 16 (9 bit)

USB_TXIS_EP9 : TX Endpoint 9 Interrupt
bits : 9 - 18 (10 bit)

USB_TXIS_EP10 : TX Endpoint 10 Interrupt
bits : 10 - 20 (11 bit)

USB_TXIS_EP11 : TX Endpoint 11 Interrupt
bits : 11 - 22 (12 bit)

USB_TXIS_EP12 : TX Endpoint 12 Interrupt
bits : 12 - 24 (13 bit)

USB_TXIS_EP13 : TX Endpoint 13 Interrupt
bits : 13 - 26 (14 bit)

USB_TXIS_EP14 : TX Endpoint 14 Interrupt
bits : 14 - 28 (15 bit)

USB_TXIS_EP15 : TX Endpoint 15 Interrupt
bits : 15 - 30 (16 bit)


USB0FIFO0

USB FIFO Endpoint 0
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO0 USB0FIFO0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO0_EPDATA

USB_FIFO0_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO0

USB FIFO Endpoint 0
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO0 FIFO0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO0_EPDATA

USB_FIFO0_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0FIFO1

USB FIFO Endpoint 1
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO1 USB0FIFO1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO1_EPDATA

USB_FIFO1_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO1

USB FIFO Endpoint 1
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO1 FIFO1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO1_EPDATA

USB_FIFO1_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0FIFO2

USB FIFO Endpoint 2
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO2 USB0FIFO2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO2_EPDATA

USB_FIFO2_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO2

USB FIFO Endpoint 2
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO2 FIFO2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO2_EPDATA

USB_FIFO2_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0FIFO3

USB FIFO Endpoint 3
address_offset : 0x2C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO3 USB0FIFO3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO3_EPDATA

USB_FIFO3_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO3

USB FIFO Endpoint 3
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO3 FIFO3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO3_EPDATA

USB_FIFO3_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0FIFO4

USB FIFO Endpoint 4
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO4 USB0FIFO4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO4_EPDATA

USB_FIFO4_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO4

USB FIFO Endpoint 4
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO4 FIFO4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO4_EPDATA

USB_FIFO4_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0RQPKTCOUNT1

USB Request Packet Count in Block Transfer Endpoint 1
address_offset : 0x304 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT1 USB0RQPKTCOUNT1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT1

USB_RQPKTCOUNT1 : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT1

USB Request Packet Count in Block Transfer Endpoint 1
address_offset : 0x304 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT1 RQPKTCOUNT1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT1

USB_RQPKTCOUNT1 : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT2

USB Request Packet Count in Block Transfer Endpoint 2
address_offset : 0x308 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT2 USB0RQPKTCOUNT2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT2

USB_RQPKTCOUNT2 : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT2

USB Request Packet Count in Block Transfer Endpoint 2
address_offset : 0x308 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT2 RQPKTCOUNT2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT2

USB_RQPKTCOUNT2 : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT3

USB Request Packet Count in Block Transfer Endpoint 3
address_offset : 0x30C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT3 USB0RQPKTCOUNT3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT3

USB_RQPKTCOUNT3 : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT3

USB Request Packet Count in Block Transfer Endpoint 3
address_offset : 0x30C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT3 RQPKTCOUNT3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT3

USB_RQPKTCOUNT3 : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT4

USB Request Packet Count in Block Transfer Endpoint 4
address_offset : 0x310 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT4 USB0RQPKTCOUNT4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT4_COUNT

USB_RQPKTCOUNT4_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT4

USB Request Packet Count in Block Transfer Endpoint 4
address_offset : 0x310 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT4 RQPKTCOUNT4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT4_COUNT

USB_RQPKTCOUNT4_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT5

USB Request Packet Count in Block Transfer Endpoint 5
address_offset : 0x314 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT5 USB0RQPKTCOUNT5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT5_COUNT

USB_RQPKTCOUNT5_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT5

USB Request Packet Count in Block Transfer Endpoint 5
address_offset : 0x314 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT5 RQPKTCOUNT5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT5_COUNT

USB_RQPKTCOUNT5_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT6

USB Request Packet Count in Block Transfer Endpoint 6
address_offset : 0x318 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT6 USB0RQPKTCOUNT6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT6_COUNT

USB_RQPKTCOUNT6_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT6

USB Request Packet Count in Block Transfer Endpoint 6
address_offset : 0x318 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT6 RQPKTCOUNT6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT6_COUNT

USB_RQPKTCOUNT6_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT7

USB Request Packet Count in Block Transfer Endpoint 7
address_offset : 0x31C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT7 USB0RQPKTCOUNT7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT7_COUNT

USB_RQPKTCOUNT7_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT7

USB Request Packet Count in Block Transfer Endpoint 7
address_offset : 0x31C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT7 RQPKTCOUNT7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT7_COUNT

USB_RQPKTCOUNT7_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT8

USB Request Packet Count in Block Transfer Endpoint 8
address_offset : 0x320 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT8 USB0RQPKTCOUNT8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT8_COUNT

USB_RQPKTCOUNT8_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT8

USB Request Packet Count in Block Transfer Endpoint 8
address_offset : 0x320 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT8 RQPKTCOUNT8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT8_COUNT

USB_RQPKTCOUNT8_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT9

USB Request Packet Count in Block Transfer Endpoint 9
address_offset : 0x324 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT9 USB0RQPKTCOUNT9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT9_COUNT

USB_RQPKTCOUNT9_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT9

USB Request Packet Count in Block Transfer Endpoint 9
address_offset : 0x324 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT9 RQPKTCOUNT9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT9_COUNT

USB_RQPKTCOUNT9_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT10

USB Request Packet Count in Block Transfer Endpoint 10
address_offset : 0x328 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT10 USB0RQPKTCOUNT10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT10_COUNT

USB_RQPKTCOUNT10_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT10

USB Request Packet Count in Block Transfer Endpoint 10
address_offset : 0x328 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT10 RQPKTCOUNT10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT10_COUNT

USB_RQPKTCOUNT10_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT11

USB Request Packet Count in Block Transfer Endpoint 11
address_offset : 0x32C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT11 USB0RQPKTCOUNT11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT11_COUNT

USB_RQPKTCOUNT11_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT11

USB Request Packet Count in Block Transfer Endpoint 11
address_offset : 0x32C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT11 RQPKTCOUNT11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT11_COUNT

USB_RQPKTCOUNT11_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT12

USB Request Packet Count in Block Transfer Endpoint 12
address_offset : 0x330 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT12 USB0RQPKTCOUNT12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT12_COUNT

USB_RQPKTCOUNT12_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT12

USB Request Packet Count in Block Transfer Endpoint 12
address_offset : 0x330 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT12 RQPKTCOUNT12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT12_COUNT

USB_RQPKTCOUNT12_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT13

USB Request Packet Count in Block Transfer Endpoint 13
address_offset : 0x334 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT13 USB0RQPKTCOUNT13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT13_COUNT

USB_RQPKTCOUNT13_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT13

USB Request Packet Count in Block Transfer Endpoint 13
address_offset : 0x334 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT13 RQPKTCOUNT13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT13_COUNT

USB_RQPKTCOUNT13_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT14

USB Request Packet Count in Block Transfer Endpoint 14
address_offset : 0x338 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT14 USB0RQPKTCOUNT14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT14_COUNT

USB_RQPKTCOUNT14_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT14

USB Request Packet Count in Block Transfer Endpoint 14
address_offset : 0x338 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT14 RQPKTCOUNT14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT14_COUNT

USB_RQPKTCOUNT14_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0RQPKTCOUNT15

USB Request Packet Count in Block Transfer Endpoint 15
address_offset : 0x33C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RQPKTCOUNT15 USB0RQPKTCOUNT15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT15_COUNT

USB_RQPKTCOUNT15_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


RQPKTCOUNT15

USB Request Packet Count in Block Transfer Endpoint 15
address_offset : 0x33C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RQPKTCOUNT15 RQPKTCOUNT15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RQPKTCOUNT15_COUNT

USB_RQPKTCOUNT15_COUNT : Block Transfer Packet Count
bits : 0 - 15 (16 bit)


USB0FIFO5

USB FIFO Endpoint 5
address_offset : 0x34 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO5 USB0FIFO5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO5_EPDATA

USB_FIFO5_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO5

USB FIFO Endpoint 5
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO5 FIFO5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO5_EPDATA

USB_FIFO5_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0RXDPKTBUFDIS

USB Receive Double Packet Buffer Disable
address_offset : 0x340 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXDPKTBUFDIS USB0RXDPKTBUFDIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXDPKTBUFDIS_EP1 USB_RXDPKTBUFDIS_EP2 USB_RXDPKTBUFDIS_EP3 USB_RXDPKTBUFDIS_EP4 USB_RXDPKTBUFDIS_EP5 USB_RXDPKTBUFDIS_EP6 USB_RXDPKTBUFDIS_EP7 USB_RXDPKTBUFDIS_EP8 USB_RXDPKTBUFDIS_EP9 USB_RXDPKTBUFDIS_EP10 USB_RXDPKTBUFDIS_EP11 USB_RXDPKTBUFDIS_EP12 USB_RXDPKTBUFDIS_EP13 USB_RXDPKTBUFDIS_EP14 USB_RXDPKTBUFDIS_EP15

USB_RXDPKTBUFDIS_EP1 : EP1 RX Double-Packet Buffer Disable
bits : 1 - 2 (2 bit)

USB_RXDPKTBUFDIS_EP2 : EP2 RX Double-Packet Buffer Disable
bits : 2 - 4 (3 bit)

USB_RXDPKTBUFDIS_EP3 : EP3 RX Double-Packet Buffer Disable
bits : 3 - 6 (4 bit)

USB_RXDPKTBUFDIS_EP4 : EP4 RX Double-Packet Buffer Disable
bits : 4 - 8 (5 bit)

USB_RXDPKTBUFDIS_EP5 : EP5 RX Double-Packet Buffer Disable
bits : 5 - 10 (6 bit)

USB_RXDPKTBUFDIS_EP6 : EP6 RX Double-Packet Buffer Disable
bits : 6 - 12 (7 bit)

USB_RXDPKTBUFDIS_EP7 : EP7 RX Double-Packet Buffer Disable
bits : 7 - 14 (8 bit)

USB_RXDPKTBUFDIS_EP8 : EP8 RX Double-Packet Buffer Disable
bits : 8 - 16 (9 bit)

USB_RXDPKTBUFDIS_EP9 : EP9 RX Double-Packet Buffer Disable
bits : 9 - 18 (10 bit)

USB_RXDPKTBUFDIS_EP10 : EP10 RX Double-Packet Buffer Disable
bits : 10 - 20 (11 bit)

USB_RXDPKTBUFDIS_EP11 : EP11 RX Double-Packet Buffer Disable
bits : 11 - 22 (12 bit)

USB_RXDPKTBUFDIS_EP12 : EP12 RX Double-Packet Buffer Disable
bits : 12 - 24 (13 bit)

USB_RXDPKTBUFDIS_EP13 : EP13 RX Double-Packet Buffer Disable
bits : 13 - 26 (14 bit)

USB_RXDPKTBUFDIS_EP14 : EP14 RX Double-Packet Buffer Disable
bits : 14 - 28 (15 bit)

USB_RXDPKTBUFDIS_EP15 : EP15 RX Double-Packet Buffer Disable
bits : 15 - 30 (16 bit)


RXDPKTBUFDIS

USB Receive Double Packet Buffer Disable
address_offset : 0x340 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXDPKTBUFDIS RXDPKTBUFDIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXDPKTBUFDIS_EP1 USB_RXDPKTBUFDIS_EP2 USB_RXDPKTBUFDIS_EP3 USB_RXDPKTBUFDIS_EP4 USB_RXDPKTBUFDIS_EP5 USB_RXDPKTBUFDIS_EP6 USB_RXDPKTBUFDIS_EP7 USB_RXDPKTBUFDIS_EP8 USB_RXDPKTBUFDIS_EP9 USB_RXDPKTBUFDIS_EP10 USB_RXDPKTBUFDIS_EP11 USB_RXDPKTBUFDIS_EP12 USB_RXDPKTBUFDIS_EP13 USB_RXDPKTBUFDIS_EP14 USB_RXDPKTBUFDIS_EP15

USB_RXDPKTBUFDIS_EP1 : EP1 RX Double-Packet Buffer Disable
bits : 1 - 2 (2 bit)

USB_RXDPKTBUFDIS_EP2 : EP2 RX Double-Packet Buffer Disable
bits : 2 - 4 (3 bit)

USB_RXDPKTBUFDIS_EP3 : EP3 RX Double-Packet Buffer Disable
bits : 3 - 6 (4 bit)

USB_RXDPKTBUFDIS_EP4 : EP4 RX Double-Packet Buffer Disable
bits : 4 - 8 (5 bit)

USB_RXDPKTBUFDIS_EP5 : EP5 RX Double-Packet Buffer Disable
bits : 5 - 10 (6 bit)

USB_RXDPKTBUFDIS_EP6 : EP6 RX Double-Packet Buffer Disable
bits : 6 - 12 (7 bit)

USB_RXDPKTBUFDIS_EP7 : EP7 RX Double-Packet Buffer Disable
bits : 7 - 14 (8 bit)

USB_RXDPKTBUFDIS_EP8 : EP8 RX Double-Packet Buffer Disable
bits : 8 - 16 (9 bit)

USB_RXDPKTBUFDIS_EP9 : EP9 RX Double-Packet Buffer Disable
bits : 9 - 18 (10 bit)

USB_RXDPKTBUFDIS_EP10 : EP10 RX Double-Packet Buffer Disable
bits : 10 - 20 (11 bit)

USB_RXDPKTBUFDIS_EP11 : EP11 RX Double-Packet Buffer Disable
bits : 11 - 22 (12 bit)

USB_RXDPKTBUFDIS_EP12 : EP12 RX Double-Packet Buffer Disable
bits : 12 - 24 (13 bit)

USB_RXDPKTBUFDIS_EP13 : EP13 RX Double-Packet Buffer Disable
bits : 13 - 26 (14 bit)

USB_RXDPKTBUFDIS_EP14 : EP14 RX Double-Packet Buffer Disable
bits : 14 - 28 (15 bit)

USB_RXDPKTBUFDIS_EP15 : EP15 RX Double-Packet Buffer Disable
bits : 15 - 30 (16 bit)


USB0TXDPKTBUFDIS

USB Transmit Double Packet Buffer Disable
address_offset : 0x342 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXDPKTBUFDIS USB0TXDPKTBUFDIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXDPKTBUFDIS_EP1 USB_TXDPKTBUFDIS_EP2 USB_TXDPKTBUFDIS_EP3 USB_TXDPKTBUFDIS_EP4 USB_TXDPKTBUFDIS_EP5 USB_TXDPKTBUFDIS_EP6 USB_TXDPKTBUFDIS_EP7 USB_TXDPKTBUFDIS_EP8 USB_TXDPKTBUFDIS_EP9 USB_TXDPKTBUFDIS_EP10 USB_TXDPKTBUFDIS_EP11 USB_TXDPKTBUFDIS_EP12 USB_TXDPKTBUFDIS_EP13 USB_TXDPKTBUFDIS_EP14 USB_TXDPKTBUFDIS_EP15

USB_TXDPKTBUFDIS_EP1 : EP1 TX Double-Packet Buffer Disable
bits : 1 - 2 (2 bit)

USB_TXDPKTBUFDIS_EP2 : EP2 TX Double-Packet Buffer Disable
bits : 2 - 4 (3 bit)

USB_TXDPKTBUFDIS_EP3 : EP3 TX Double-Packet Buffer Disable
bits : 3 - 6 (4 bit)

USB_TXDPKTBUFDIS_EP4 : EP4 TX Double-Packet Buffer Disable
bits : 4 - 8 (5 bit)

USB_TXDPKTBUFDIS_EP5 : EP5 TX Double-Packet Buffer Disable
bits : 5 - 10 (6 bit)

USB_TXDPKTBUFDIS_EP6 : EP6 TX Double-Packet Buffer Disable
bits : 6 - 12 (7 bit)

USB_TXDPKTBUFDIS_EP7 : EP7 TX Double-Packet Buffer Disable
bits : 7 - 14 (8 bit)

USB_TXDPKTBUFDIS_EP8 : EP8 TX Double-Packet Buffer Disable
bits : 8 - 16 (9 bit)

USB_TXDPKTBUFDIS_EP9 : EP9 TX Double-Packet Buffer Disable
bits : 9 - 18 (10 bit)

USB_TXDPKTBUFDIS_EP10 : EP10 TX Double-Packet Buffer Disable
bits : 10 - 20 (11 bit)

USB_TXDPKTBUFDIS_EP11 : EP11 TX Double-Packet Buffer Disable
bits : 11 - 22 (12 bit)

USB_TXDPKTBUFDIS_EP12 : EP12 TX Double-Packet Buffer Disable
bits : 12 - 24 (13 bit)

USB_TXDPKTBUFDIS_EP13 : EP13 TX Double-Packet Buffer Disable
bits : 13 - 26 (14 bit)

USB_TXDPKTBUFDIS_EP14 : EP14 TX Double-Packet Buffer Disable
bits : 14 - 28 (15 bit)

USB_TXDPKTBUFDIS_EP15 : EP15 TX Double-Packet Buffer Disable
bits : 15 - 30 (16 bit)


TXDPKTBUFDIS

USB Transmit Double Packet Buffer Disable
address_offset : 0x342 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXDPKTBUFDIS TXDPKTBUFDIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXDPKTBUFDIS_EP1 USB_TXDPKTBUFDIS_EP2 USB_TXDPKTBUFDIS_EP3 USB_TXDPKTBUFDIS_EP4 USB_TXDPKTBUFDIS_EP5 USB_TXDPKTBUFDIS_EP6 USB_TXDPKTBUFDIS_EP7 USB_TXDPKTBUFDIS_EP8 USB_TXDPKTBUFDIS_EP9 USB_TXDPKTBUFDIS_EP10 USB_TXDPKTBUFDIS_EP11 USB_TXDPKTBUFDIS_EP12 USB_TXDPKTBUFDIS_EP13 USB_TXDPKTBUFDIS_EP14 USB_TXDPKTBUFDIS_EP15

USB_TXDPKTBUFDIS_EP1 : EP1 TX Double-Packet Buffer Disable
bits : 1 - 2 (2 bit)

USB_TXDPKTBUFDIS_EP2 : EP2 TX Double-Packet Buffer Disable
bits : 2 - 4 (3 bit)

USB_TXDPKTBUFDIS_EP3 : EP3 TX Double-Packet Buffer Disable
bits : 3 - 6 (4 bit)

USB_TXDPKTBUFDIS_EP4 : EP4 TX Double-Packet Buffer Disable
bits : 4 - 8 (5 bit)

USB_TXDPKTBUFDIS_EP5 : EP5 TX Double-Packet Buffer Disable
bits : 5 - 10 (6 bit)

USB_TXDPKTBUFDIS_EP6 : EP6 TX Double-Packet Buffer Disable
bits : 6 - 12 (7 bit)

USB_TXDPKTBUFDIS_EP7 : EP7 TX Double-Packet Buffer Disable
bits : 7 - 14 (8 bit)

USB_TXDPKTBUFDIS_EP8 : EP8 TX Double-Packet Buffer Disable
bits : 8 - 16 (9 bit)

USB_TXDPKTBUFDIS_EP9 : EP9 TX Double-Packet Buffer Disable
bits : 9 - 18 (10 bit)

USB_TXDPKTBUFDIS_EP10 : EP10 TX Double-Packet Buffer Disable
bits : 10 - 20 (11 bit)

USB_TXDPKTBUFDIS_EP11 : EP11 TX Double-Packet Buffer Disable
bits : 11 - 22 (12 bit)

USB_TXDPKTBUFDIS_EP12 : EP12 TX Double-Packet Buffer Disable
bits : 12 - 24 (13 bit)

USB_TXDPKTBUFDIS_EP13 : EP13 TX Double-Packet Buffer Disable
bits : 13 - 26 (14 bit)

USB_TXDPKTBUFDIS_EP14 : EP14 TX Double-Packet Buffer Disable
bits : 14 - 28 (15 bit)

USB_TXDPKTBUFDIS_EP15 : EP15 TX Double-Packet Buffer Disable
bits : 15 - 30 (16 bit)


USB0FIFO6

USB FIFO Endpoint 6
address_offset : 0x38 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO6 USB0FIFO6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO6_EPDATA

USB_FIFO6_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO6

USB FIFO Endpoint 6
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO6 FIFO6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO6_EPDATA

USB_FIFO6_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0FIFO7

USB FIFO Endpoint 7
address_offset : 0x3C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO7 USB0FIFO7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO7_EPDATA

USB_FIFO7_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO7

USB FIFO Endpoint 7
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO7 FIFO7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO7_EPDATA

USB_FIFO7_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0RXIS

USB Receive Interrupt Status
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXIS USB0RXIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXIS_EP1 USB_RXIS_EP2 USB_RXIS_EP3 USB_RXIS_EP4 USB_RXIS_EP5 USB_RXIS_EP6 USB_RXIS_EP7 USB_RXIS_EP8 USB_RXIS_EP9 USB_RXIS_EP10 USB_RXIS_EP11 USB_RXIS_EP12 USB_RXIS_EP13 USB_RXIS_EP14 USB_RXIS_EP15

USB_RXIS_EP1 : RX Endpoint 1 Interrupt
bits : 1 - 2 (2 bit)

USB_RXIS_EP2 : RX Endpoint 2 Interrupt
bits : 2 - 4 (3 bit)

USB_RXIS_EP3 : RX Endpoint 3 Interrupt
bits : 3 - 6 (4 bit)

USB_RXIS_EP4 : RX Endpoint 4 Interrupt
bits : 4 - 8 (5 bit)

USB_RXIS_EP5 : RX Endpoint 5 Interrupt
bits : 5 - 10 (6 bit)

USB_RXIS_EP6 : RX Endpoint 6 Interrupt
bits : 6 - 12 (7 bit)

USB_RXIS_EP7 : RX Endpoint 7 Interrupt
bits : 7 - 14 (8 bit)

USB_RXIS_EP8 : RX Endpoint 8 Interrupt
bits : 8 - 16 (9 bit)

USB_RXIS_EP9 : RX Endpoint 9 Interrupt
bits : 9 - 18 (10 bit)

USB_RXIS_EP10 : RX Endpoint 10 Interrupt
bits : 10 - 20 (11 bit)

USB_RXIS_EP11 : RX Endpoint 11 Interrupt
bits : 11 - 22 (12 bit)

USB_RXIS_EP12 : RX Endpoint 12 Interrupt
bits : 12 - 24 (13 bit)

USB_RXIS_EP13 : RX Endpoint 13 Interrupt
bits : 13 - 26 (14 bit)

USB_RXIS_EP14 : RX Endpoint 14 Interrupt
bits : 14 - 28 (15 bit)

USB_RXIS_EP15 : RX Endpoint 15 Interrupt
bits : 15 - 30 (16 bit)


RXIS

USB Receive Interrupt Status
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIS RXIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXIS_EP1 USB_RXIS_EP2 USB_RXIS_EP3 USB_RXIS_EP4 USB_RXIS_EP5 USB_RXIS_EP6 USB_RXIS_EP7 USB_RXIS_EP8 USB_RXIS_EP9 USB_RXIS_EP10 USB_RXIS_EP11 USB_RXIS_EP12 USB_RXIS_EP13 USB_RXIS_EP14 USB_RXIS_EP15

USB_RXIS_EP1 : RX Endpoint 1 Interrupt
bits : 1 - 2 (2 bit)

USB_RXIS_EP2 : RX Endpoint 2 Interrupt
bits : 2 - 4 (3 bit)

USB_RXIS_EP3 : RX Endpoint 3 Interrupt
bits : 3 - 6 (4 bit)

USB_RXIS_EP4 : RX Endpoint 4 Interrupt
bits : 4 - 8 (5 bit)

USB_RXIS_EP5 : RX Endpoint 5 Interrupt
bits : 5 - 10 (6 bit)

USB_RXIS_EP6 : RX Endpoint 6 Interrupt
bits : 6 - 12 (7 bit)

USB_RXIS_EP7 : RX Endpoint 7 Interrupt
bits : 7 - 14 (8 bit)

USB_RXIS_EP8 : RX Endpoint 8 Interrupt
bits : 8 - 16 (9 bit)

USB_RXIS_EP9 : RX Endpoint 9 Interrupt
bits : 9 - 18 (10 bit)

USB_RXIS_EP10 : RX Endpoint 10 Interrupt
bits : 10 - 20 (11 bit)

USB_RXIS_EP11 : RX Endpoint 11 Interrupt
bits : 11 - 22 (12 bit)

USB_RXIS_EP12 : RX Endpoint 12 Interrupt
bits : 12 - 24 (13 bit)

USB_RXIS_EP13 : RX Endpoint 13 Interrupt
bits : 13 - 26 (14 bit)

USB_RXIS_EP14 : RX Endpoint 14 Interrupt
bits : 14 - 28 (15 bit)

USB_RXIS_EP15 : RX Endpoint 15 Interrupt
bits : 15 - 30 (16 bit)


USB0FIFO8

USB FIFO Endpoint 8
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO8 USB0FIFO8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO8_EPDATA

USB_FIFO8_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO8

USB FIFO Endpoint 8
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO8 FIFO8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO8_EPDATA

USB_FIFO8_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0EPC

USB External Power Control
address_offset : 0x400 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0EPC USB0EPC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_EPC_EPEN USB_EPC_EPENDE USB_EPC_PFLTEN USB_EPC_PFLTSEN_HIGH USB_EPC_PFLTAEN USB_EPC_PFLTACT

USB_EPC_EPEN : External Power Supply Enable Configuration
bits : 0 - 1 (2 bit)

Enumeration:

0x0 : USB_EPC_EPEN_LOW

Power Enable Active Low

0x1 : USB_EPC_EPEN_HIGH

Power Enable Active High

0x2 : USB_EPC_EPEN_VBLOW

Power Enable High if VBUS Low

0x3 : USB_EPC_EPEN_VBHIGH

Power Enable High if VBUS High

End of enumeration elements list.

USB_EPC_EPENDE : EPEN Drive Enable
bits : 2 - 4 (3 bit)

USB_EPC_PFLTEN : Power Fault Input Enable
bits : 4 - 8 (5 bit)

USB_EPC_PFLTSEN_HIGH : Power Fault Sense
bits : 5 - 10 (6 bit)

USB_EPC_PFLTAEN : Power Fault Action Enable
bits : 6 - 12 (7 bit)

USB_EPC_PFLTACT : Power Fault Action
bits : 8 - 17 (10 bit)

Enumeration:

0x0 : USB_EPC_PFLTACT_UNCHG

Unchanged

0x1 : USB_EPC_PFLTACT_TRIS

Tristate

0x2 : USB_EPC_PFLTACT_LOW

Low

0x3 : USB_EPC_PFLTACT_HIGH

High

End of enumeration elements list.


EPC

USB External Power Control
address_offset : 0x400 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPC EPC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_EPC_EPEN USB_EPC_EPENDE USB_EPC_PFLTEN USB_EPC_PFLTSEN_HIGH USB_EPC_PFLTAEN USB_EPC_PFLTACT

USB_EPC_EPEN : External Power Supply Enable Configuration
bits : 0 - 1 (2 bit)

Enumeration:

0x0 : USB_EPC_EPEN_LOW

Power Enable Active Low

0x1 : USB_EPC_EPEN_HIGH

Power Enable Active High

0x2 : USB_EPC_EPEN_VBLOW

Power Enable High if VBUS Low

0x3 : USB_EPC_EPEN_VBHIGH

Power Enable High if VBUS High

End of enumeration elements list.

USB_EPC_EPENDE : EPEN Drive Enable
bits : 2 - 4 (3 bit)

USB_EPC_PFLTEN : Power Fault Input Enable
bits : 4 - 8 (5 bit)

USB_EPC_PFLTSEN_HIGH : Power Fault Sense
bits : 5 - 10 (6 bit)

USB_EPC_PFLTAEN : Power Fault Action Enable
bits : 6 - 12 (7 bit)

USB_EPC_PFLTACT : Power Fault Action
bits : 8 - 17 (10 bit)

Enumeration:

0x0 : USB_EPC_PFLTACT_UNCHG

Unchanged

0x1 : USB_EPC_PFLTACT_TRIS

Tristate

0x2 : USB_EPC_PFLTACT_LOW

Low

0x3 : USB_EPC_PFLTACT_HIGH

High

End of enumeration elements list.


USB0EPCRIS

USB External Power Control Raw Interrupt Status
address_offset : 0x404 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0EPCRIS USB0EPCRIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_EPCRIS_PF

USB_EPCRIS_PF : USB Power Fault Interrupt Status
bits : 0 - 0 (1 bit)


EPCRIS

USB External Power Control Raw Interrupt Status
address_offset : 0x404 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPCRIS EPCRIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_EPCRIS_PF

USB_EPCRIS_PF : USB Power Fault Interrupt Status
bits : 0 - 0 (1 bit)


USB0EPCIM

USB External Power Control Interrupt Mask
address_offset : 0x408 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0EPCIM USB0EPCIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_EPCIM_PF

USB_EPCIM_PF : USB Power Fault Interrupt Mask
bits : 0 - 0 (1 bit)


EPCIM

USB External Power Control Interrupt Mask
address_offset : 0x408 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPCIM EPCIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_EPCIM_PF

USB_EPCIM_PF : USB Power Fault Interrupt Mask
bits : 0 - 0 (1 bit)


USB0EPCISC

USB External Power Control Interrupt Status and Clear
address_offset : 0x40C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0EPCISC USB0EPCISC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_EPCISC_PF

USB_EPCISC_PF : USB Power Fault Interrupt Status and Clear
bits : 0 - 0 (1 bit)


EPCISC

USB External Power Control Interrupt Status and Clear
address_offset : 0x40C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPCISC EPCISC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_EPCISC_PF

USB_EPCISC_PF : USB Power Fault Interrupt Status and Clear
bits : 0 - 0 (1 bit)


USB0DRRIS

USB Device RESUME Raw Interrupt Status
address_offset : 0x410 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0DRRIS USB0DRRIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_DRRIS_RESUME

USB_DRRIS_RESUME : RESUME Interrupt Status
bits : 0 - 0 (1 bit)


DRRIS

USB Device RESUME Raw Interrupt Status
address_offset : 0x410 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DRRIS DRRIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_DRRIS_RESUME

USB_DRRIS_RESUME : RESUME Interrupt Status
bits : 0 - 0 (1 bit)


USB0DRIM

USB Device RESUME Interrupt Mask
address_offset : 0x414 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0DRIM USB0DRIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_DRIM_RESUME

USB_DRIM_RESUME : RESUME Interrupt Mask
bits : 0 - 0 (1 bit)


DRIM

USB Device RESUME Interrupt Mask
address_offset : 0x414 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DRIM DRIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_DRIM_RESUME

USB_DRIM_RESUME : RESUME Interrupt Mask
bits : 0 - 0 (1 bit)


USB0DRISC

USB Device RESUME Interrupt Status and Clear
address_offset : 0x418 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

USB0DRISC USB0DRISC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_DRISC_RESUME

USB_DRISC_RESUME : RESUME Interrupt Status and Clear
bits : 0 - 0 (1 bit)
access : write-only


DRISC

USB Device RESUME Interrupt Status and Clear
address_offset : 0x418 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

DRISC DRISC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_DRISC_RESUME

USB_DRISC_RESUME : RESUME Interrupt Status and Clear
bits : 0 - 0 (1 bit)
access : write-only


USB0GPCS

USB General-Purpose Control and Status
address_offset : 0x41C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0GPCS USB0GPCS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_GPCS_DEVMOD USB_GPCS_DEVMODOTG

USB_GPCS_DEVMOD : Device Mode
bits : 0 - 0 (1 bit)

USB_GPCS_DEVMODOTG : Enable Device Mode
bits : 1 - 2 (2 bit)


GPCS

USB General-Purpose Control and Status
address_offset : 0x41C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPCS GPCS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_GPCS_DEVMOD USB_GPCS_DEVMODOTG

USB_GPCS_DEVMOD : Device Mode
bits : 0 - 0 (1 bit)

USB_GPCS_DEVMODOTG : Enable Device Mode
bits : 1 - 2 (2 bit)


USB0VDC

USB VBUS Droop Control
address_offset : 0x430 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0VDC USB0VDC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_VDC_VBDEN

USB_VDC_VBDEN : VBUS Droop Enable
bits : 0 - 0 (1 bit)


VDC

USB VBUS Droop Control
address_offset : 0x430 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VDC VDC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_VDC_VBDEN

USB_VDC_VBDEN : VBUS Droop Enable
bits : 0 - 0 (1 bit)


USB0VDCRIS

USB VBUS Droop Control Raw Interrupt Status
address_offset : 0x434 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0VDCRIS USB0VDCRIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_VDCRIS_VD

USB_VDCRIS_VD : VBUS Droop Raw Interrupt Status
bits : 0 - 0 (1 bit)


VDCRIS

USB VBUS Droop Control Raw Interrupt Status
address_offset : 0x434 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VDCRIS VDCRIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_VDCRIS_VD

USB_VDCRIS_VD : VBUS Droop Raw Interrupt Status
bits : 0 - 0 (1 bit)


USB0VDCIM

USB VBUS Droop Control Interrupt Mask
address_offset : 0x438 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0VDCIM USB0VDCIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_VDCIM_VD

USB_VDCIM_VD : VBUS Droop Interrupt Mask
bits : 0 - 0 (1 bit)


VDCIM

USB VBUS Droop Control Interrupt Mask
address_offset : 0x438 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VDCIM VDCIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_VDCIM_VD

USB_VDCIM_VD : VBUS Droop Interrupt Mask
bits : 0 - 0 (1 bit)


USB0VDCISC

USB VBUS Droop Control Interrupt Status and Clear
address_offset : 0x43C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0VDCISC USB0VDCISC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_VDCISC_VD

USB_VDCISC_VD : VBUS Droop Interrupt Status and Clear
bits : 0 - 0 (1 bit)


VDCISC

USB VBUS Droop Control Interrupt Status and Clear
address_offset : 0x43C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VDCISC VDCISC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_VDCISC_VD

USB_VDCISC_VD : VBUS Droop Interrupt Status and Clear
bits : 0 - 0 (1 bit)


USB0FIFO9

USB FIFO Endpoint 9
address_offset : 0x44 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO9 USB0FIFO9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO9_EPDATA

USB_FIFO9_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO9

USB FIFO Endpoint 9
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO9 FIFO9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO9_EPDATA

USB_FIFO9_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0IDVRIS

USB ID Valid Detect Raw Interrupt Status
address_offset : 0x444 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0IDVRIS USB0IDVRIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_IDVRIS_ID

USB_IDVRIS_ID : ID Valid Detect Raw Interrupt Status
bits : 0 - 0 (1 bit)


IDVRIS

USB ID Valid Detect Raw Interrupt Status
address_offset : 0x444 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IDVRIS IDVRIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_IDVRIS_ID

USB_IDVRIS_ID : ID Valid Detect Raw Interrupt Status
bits : 0 - 0 (1 bit)


USB0IDVIM

USB ID Valid Detect Interrupt Mask
address_offset : 0x448 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0IDVIM USB0IDVIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_IDVIM_ID

USB_IDVIM_ID : ID Valid Detect Interrupt Mask
bits : 0 - 0 (1 bit)


IDVIM

USB ID Valid Detect Interrupt Mask
address_offset : 0x448 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IDVIM IDVIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_IDVIM_ID

USB_IDVIM_ID : ID Valid Detect Interrupt Mask
bits : 0 - 0 (1 bit)


USB0IDVISC

USB ID Valid Detect Interrupt Status and Clear
address_offset : 0x44C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0IDVISC USB0IDVISC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_IDVISC_ID

USB_IDVISC_ID : ID Valid Detect Interrupt Status and Clear
bits : 0 - 0 (1 bit)


IDVISC

USB ID Valid Detect Interrupt Status and Clear
address_offset : 0x44C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IDVISC IDVISC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_IDVISC_ID

USB_IDVISC_ID : ID Valid Detect Interrupt Status and Clear
bits : 0 - 0 (1 bit)


USB0DMASEL

USB DMA Select
address_offset : 0x450 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0DMASEL USB0DMASEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_DMASEL_DMAARX USB_DMASEL_DMAATX USB_DMASEL_DMABRX USB_DMASEL_DMABTX USB_DMASEL_DMACRX USB_DMASEL_DMACTX

USB_DMASEL_DMAARX : DMA A RX Select
bits : 0 - 3 (4 bit)

USB_DMASEL_DMAATX : DMA A TX Select
bits : 4 - 11 (8 bit)

USB_DMASEL_DMABRX : DMA B RX Select
bits : 8 - 19 (12 bit)

USB_DMASEL_DMABTX : DMA B TX Select
bits : 12 - 27 (16 bit)

USB_DMASEL_DMACRX : DMA C RX Select
bits : 16 - 35 (20 bit)

USB_DMASEL_DMACTX : DMA C TX Select
bits : 20 - 43 (24 bit)


DMASEL

USB DMA Select
address_offset : 0x450 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DMASEL DMASEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_DMASEL_DMAARX USB_DMASEL_DMAATX USB_DMASEL_DMABRX USB_DMASEL_DMABTX USB_DMASEL_DMACRX USB_DMASEL_DMACTX

USB_DMASEL_DMAARX : DMA A RX Select
bits : 0 - 3 (4 bit)

USB_DMASEL_DMAATX : DMA A TX Select
bits : 4 - 11 (8 bit)

USB_DMASEL_DMABRX : DMA B RX Select
bits : 8 - 19 (12 bit)

USB_DMASEL_DMABTX : DMA B TX Select
bits : 12 - 27 (16 bit)

USB_DMASEL_DMACRX : DMA C RX Select
bits : 16 - 35 (20 bit)

USB_DMASEL_DMACTX : DMA C TX Select
bits : 20 - 43 (24 bit)


USB0FIFO10

USB FIFO Endpoint 10
address_offset : 0x48 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO10 USB0FIFO10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO10_EPDATA

USB_FIFO10_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO10

USB FIFO Endpoint 10
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO10 FIFO10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO10_EPDATA

USB_FIFO10_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0FIFO11

USB FIFO Endpoint 11
address_offset : 0x4C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO11 USB0FIFO11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO11_EPDATA

USB_FIFO11_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO11

USB FIFO Endpoint 11
address_offset : 0x4C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO11 FIFO11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO11_EPDATA

USB_FIFO11_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0FIFO12

USB FIFO Endpoint 12
address_offset : 0x50 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO12 USB0FIFO12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO12_EPDATA

USB_FIFO12_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO12

USB FIFO Endpoint 12
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO12 FIFO12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO12_EPDATA

USB_FIFO12_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0FIFO13

USB FIFO Endpoint 13
address_offset : 0x54 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO13 USB0FIFO13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO13_EPDATA

USB_FIFO13_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO13

USB FIFO Endpoint 13
address_offset : 0x54 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO13 FIFO13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO13_EPDATA

USB_FIFO13_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0FIFO14

USB FIFO Endpoint 14
address_offset : 0x58 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO14 USB0FIFO14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO14_EPDATA

USB_FIFO14_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO14

USB FIFO Endpoint 14
address_offset : 0x58 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO14 FIFO14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO14_EPDATA

USB_FIFO14_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0FIFO15

USB FIFO Endpoint 15
address_offset : 0x5C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FIFO15 USB0FIFO15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO15_EPDATA

USB_FIFO15_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


FIFO15

USB FIFO Endpoint 15
address_offset : 0x5C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FIFO15 FIFO15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FIFO15_EPDATA

USB_FIFO15_EPDATA : Endpoint Data
bits : 0 - 31 (32 bit)


USB0TXIE

USB Transmit Interrupt Enable
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXIE USB0TXIE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXIE_EP0 USB_TXIE_EP1 USB_TXIE_EP2 USB_TXIE_EP3 USB_TXIE_EP4 USB_TXIE_EP5 USB_TXIE_EP6 USB_TXIE_EP7 USB_TXIE_EP8 USB_TXIE_EP9 USB_TXIE_EP10 USB_TXIE_EP11 USB_TXIE_EP12 USB_TXIE_EP13 USB_TXIE_EP14 USB_TXIE_EP15

USB_TXIE_EP0 : TX and RX Endpoint 0 Interrupt Enable
bits : 0 - 0 (1 bit)

USB_TXIE_EP1 : TX Endpoint 1 Interrupt Enable
bits : 1 - 2 (2 bit)

USB_TXIE_EP2 : TX Endpoint 2 Interrupt Enable
bits : 2 - 4 (3 bit)

USB_TXIE_EP3 : TX Endpoint 3 Interrupt Enable
bits : 3 - 6 (4 bit)

USB_TXIE_EP4 : TX Endpoint 4 Interrupt Enable
bits : 4 - 8 (5 bit)

USB_TXIE_EP5 : TX Endpoint 5 Interrupt Enable
bits : 5 - 10 (6 bit)

USB_TXIE_EP6 : TX Endpoint 6 Interrupt Enable
bits : 6 - 12 (7 bit)

USB_TXIE_EP7 : TX Endpoint 7 Interrupt Enable
bits : 7 - 14 (8 bit)

USB_TXIE_EP8 : TX Endpoint 8 Interrupt Enable
bits : 8 - 16 (9 bit)

USB_TXIE_EP9 : TX Endpoint 9 Interrupt Enable
bits : 9 - 18 (10 bit)

USB_TXIE_EP10 : TX Endpoint 10 Interrupt Enable
bits : 10 - 20 (11 bit)

USB_TXIE_EP11 : TX Endpoint 11 Interrupt Enable
bits : 11 - 22 (12 bit)

USB_TXIE_EP12 : TX Endpoint 12 Interrupt Enable
bits : 12 - 24 (13 bit)

USB_TXIE_EP13 : TX Endpoint 13 Interrupt Enable
bits : 13 - 26 (14 bit)

USB_TXIE_EP14 : TX Endpoint 14 Interrupt Enable
bits : 14 - 28 (15 bit)

USB_TXIE_EP15 : TX Endpoint 15 Interrupt Enable
bits : 15 - 30 (16 bit)


TXIE

USB Transmit Interrupt Enable
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXIE TXIE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXIE_EP0 USB_TXIE_EP1 USB_TXIE_EP2 USB_TXIE_EP3 USB_TXIE_EP4 USB_TXIE_EP5 USB_TXIE_EP6 USB_TXIE_EP7 USB_TXIE_EP8 USB_TXIE_EP9 USB_TXIE_EP10 USB_TXIE_EP11 USB_TXIE_EP12 USB_TXIE_EP13 USB_TXIE_EP14 USB_TXIE_EP15

USB_TXIE_EP0 : TX and RX Endpoint 0 Interrupt Enable
bits : 0 - 0 (1 bit)

USB_TXIE_EP1 : TX Endpoint 1 Interrupt Enable
bits : 1 - 2 (2 bit)

USB_TXIE_EP2 : TX Endpoint 2 Interrupt Enable
bits : 2 - 4 (3 bit)

USB_TXIE_EP3 : TX Endpoint 3 Interrupt Enable
bits : 3 - 6 (4 bit)

USB_TXIE_EP4 : TX Endpoint 4 Interrupt Enable
bits : 4 - 8 (5 bit)

USB_TXIE_EP5 : TX Endpoint 5 Interrupt Enable
bits : 5 - 10 (6 bit)

USB_TXIE_EP6 : TX Endpoint 6 Interrupt Enable
bits : 6 - 12 (7 bit)

USB_TXIE_EP7 : TX Endpoint 7 Interrupt Enable
bits : 7 - 14 (8 bit)

USB_TXIE_EP8 : TX Endpoint 8 Interrupt Enable
bits : 8 - 16 (9 bit)

USB_TXIE_EP9 : TX Endpoint 9 Interrupt Enable
bits : 9 - 18 (10 bit)

USB_TXIE_EP10 : TX Endpoint 10 Interrupt Enable
bits : 10 - 20 (11 bit)

USB_TXIE_EP11 : TX Endpoint 11 Interrupt Enable
bits : 11 - 22 (12 bit)

USB_TXIE_EP12 : TX Endpoint 12 Interrupt Enable
bits : 12 - 24 (13 bit)

USB_TXIE_EP13 : TX Endpoint 13 Interrupt Enable
bits : 13 - 26 (14 bit)

USB_TXIE_EP14 : TX Endpoint 14 Interrupt Enable
bits : 14 - 28 (15 bit)

USB_TXIE_EP15 : TX Endpoint 15 Interrupt Enable
bits : 15 - 30 (16 bit)


USB0DEVCTL

USB Device Control
address_offset : 0x60 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0DEVCTL USB0DEVCTL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_DEVCTL_SESSION USB_DEVCTL_HOSTREQ USB_DEVCTL_HOST USB_DEVCTL_VBUS USB_DEVCTL_LSDEV USB_DEVCTL_FSDEV USB_DEVCTL_DEV

USB_DEVCTL_SESSION : Session Start/End
bits : 0 - 0 (1 bit)

USB_DEVCTL_HOSTREQ : Host Request
bits : 1 - 2 (2 bit)

USB_DEVCTL_HOST : Host Mode
bits : 2 - 4 (3 bit)

USB_DEVCTL_VBUS : VBUS Level
bits : 3 - 7 (5 bit)

Enumeration:

0x0 : USB_DEVCTL_VBUS_NONE

Below SessionEnd

0x1 : USB_DEVCTL_VBUS_SEND

Above SessionEnd, below AValid

0x2 : USB_DEVCTL_VBUS_AVALID

Above AValid, below VBUSValid

0x3 : USB_DEVCTL_VBUS_VALID

Above VBUSValid

End of enumeration elements list.

USB_DEVCTL_LSDEV : Low-Speed Device Detected
bits : 5 - 10 (6 bit)

USB_DEVCTL_FSDEV : Full-Speed Device Detected
bits : 6 - 12 (7 bit)

USB_DEVCTL_DEV : Device Mode
bits : 7 - 14 (8 bit)


DEVCTL

USB Device Control
address_offset : 0x60 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DEVCTL DEVCTL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_DEVCTL_SESSION USB_DEVCTL_HOSTREQ USB_DEVCTL_HOST USB_DEVCTL_VBUS USB_DEVCTL_LSDEV USB_DEVCTL_FSDEV USB_DEVCTL_DEV

USB_DEVCTL_SESSION : Session Start/End
bits : 0 - 0 (1 bit)

USB_DEVCTL_HOSTREQ : Host Request
bits : 1 - 2 (2 bit)

USB_DEVCTL_HOST : Host Mode
bits : 2 - 4 (3 bit)

USB_DEVCTL_VBUS : VBUS Level
bits : 3 - 7 (5 bit)

Enumeration:

0x0 : USB_DEVCTL_VBUS_NONE

Below SessionEnd

0x1 : USB_DEVCTL_VBUS_SEND

Above SessionEnd, below AValid

0x2 : USB_DEVCTL_VBUS_AVALID

Above AValid, below VBUSValid

0x3 : USB_DEVCTL_VBUS_VALID

Above VBUSValid

End of enumeration elements list.

USB_DEVCTL_LSDEV : Low-Speed Device Detected
bits : 5 - 10 (6 bit)

USB_DEVCTL_FSDEV : Full-Speed Device Detected
bits : 6 - 12 (7 bit)

USB_DEVCTL_DEV : Device Mode
bits : 7 - 14 (8 bit)


USB0TXFIFOSZ

USB Transmit Dynamic FIFO Sizing
address_offset : 0x62 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFIFOSZ USB0TXFIFOSZ read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFIFOSZ_SIZE USB_TXFIFOSZ_DPB

USB_TXFIFOSZ_SIZE : Max Packet Size
bits : 0 - 3 (4 bit)

Enumeration:

0x0 : USB_TXFIFOSZ_SIZE_8

8

0x1 : USB_TXFIFOSZ_SIZE_16

16

0x2 : USB_TXFIFOSZ_SIZE_32

32

0x3 : USB_TXFIFOSZ_SIZE_64

64

0x4 : USB_TXFIFOSZ_SIZE_128

128

0x5 : USB_TXFIFOSZ_SIZE_256

256

0x6 : USB_TXFIFOSZ_SIZE_512

512

0x7 : USB_TXFIFOSZ_SIZE_1024

1024

0x8 : USB_TXFIFOSZ_SIZE_2048

2048

End of enumeration elements list.

USB_TXFIFOSZ_DPB : Double Packet Buffer Support
bits : 4 - 8 (5 bit)


TXFIFOSZ

USB Transmit Dynamic FIFO Sizing
address_offset : 0x62 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFIFOSZ TXFIFOSZ read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFIFOSZ_SIZE USB_TXFIFOSZ_DPB

USB_TXFIFOSZ_SIZE : Max Packet Size
bits : 0 - 3 (4 bit)

Enumeration:

0x0 : USB_TXFIFOSZ_SIZE_8

8

0x1 : USB_TXFIFOSZ_SIZE_16

16

0x2 : USB_TXFIFOSZ_SIZE_32

32

0x3 : USB_TXFIFOSZ_SIZE_64

64

0x4 : USB_TXFIFOSZ_SIZE_128

128

0x5 : USB_TXFIFOSZ_SIZE_256

256

0x6 : USB_TXFIFOSZ_SIZE_512

512

0x7 : USB_TXFIFOSZ_SIZE_1024

1024

0x8 : USB_TXFIFOSZ_SIZE_2048

2048

End of enumeration elements list.

USB_TXFIFOSZ_DPB : Double Packet Buffer Support
bits : 4 - 8 (5 bit)


USB0RXFIFOSZ

USB Receive Dynamic FIFO Sizing
address_offset : 0x63 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFIFOSZ USB0RXFIFOSZ read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFIFOSZ_SIZE USB_RXFIFOSZ_DPB

USB_RXFIFOSZ_SIZE : Max Packet Size
bits : 0 - 3 (4 bit)

Enumeration:

0x0 : USB_RXFIFOSZ_SIZE_8

8

0x1 : USB_RXFIFOSZ_SIZE_16

16

0x2 : USB_RXFIFOSZ_SIZE_32

32

0x3 : USB_RXFIFOSZ_SIZE_64

64

0x4 : USB_RXFIFOSZ_SIZE_128

128

0x5 : USB_RXFIFOSZ_SIZE_256

256

0x6 : USB_RXFIFOSZ_SIZE_512

512

0x7 : USB_RXFIFOSZ_SIZE_1024

1024

0x8 : USB_RXFIFOSZ_SIZE_2048

2048

End of enumeration elements list.

USB_RXFIFOSZ_DPB : Double Packet Buffer Support
bits : 4 - 8 (5 bit)


RXFIFOSZ

USB Receive Dynamic FIFO Sizing
address_offset : 0x63 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFIFOSZ RXFIFOSZ read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFIFOSZ_SIZE USB_RXFIFOSZ_DPB

USB_RXFIFOSZ_SIZE : Max Packet Size
bits : 0 - 3 (4 bit)

Enumeration:

0x0 : USB_RXFIFOSZ_SIZE_8

8

0x1 : USB_RXFIFOSZ_SIZE_16

16

0x2 : USB_RXFIFOSZ_SIZE_32

32

0x3 : USB_RXFIFOSZ_SIZE_64

64

0x4 : USB_RXFIFOSZ_SIZE_128

128

0x5 : USB_RXFIFOSZ_SIZE_256

256

0x6 : USB_RXFIFOSZ_SIZE_512

512

0x7 : USB_RXFIFOSZ_SIZE_1024

1024

0x8 : USB_RXFIFOSZ_SIZE_2048

2048

End of enumeration elements list.

USB_RXFIFOSZ_DPB : Double Packet Buffer Support
bits : 4 - 8 (5 bit)


USB0TXFIFOADD

USB Transmit FIFO Start Address
address_offset : 0x64 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFIFOADD USB0TXFIFOADD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXFIFOADD_ADDR

USB_TXFIFOADD_ADDR : Transmit/Receive Start Address
bits : 0 - 8 (9 bit)


TXFIFOADD

USB Transmit FIFO Start Address
address_offset : 0x64 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFIFOADD TXFIFOADD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_TXFIFOADD_ADDR

USB_TXFIFOADD_ADDR : Transmit/Receive Start Address
bits : 0 - 8 (9 bit)


USB0RXFIFOADD

USB Receive FIFO Start Address
address_offset : 0x66 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFIFOADD USB0RXFIFOADD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXFIFOADD_ADDR

USB_RXFIFOADD_ADDR : Transmit/Receive Start Address
bits : 0 - 8 (9 bit)


RXFIFOADD

USB Receive FIFO Start Address
address_offset : 0x66 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFIFOADD RXFIFOADD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXFIFOADD_ADDR

USB_RXFIFOADD_ADDR : Transmit/Receive Start Address
bits : 0 - 8 (9 bit)


USB0CONTIM

USB Connect Timing
address_offset : 0x7A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0CONTIM USB0CONTIM read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_CONTIM_WTID USB_CONTIM_WTCON

USB_CONTIM_WTID : Wait ID
bits : 0 - 3 (4 bit)

USB_CONTIM_WTCON : Connect Wait
bits : 4 - 11 (8 bit)


CONTIM

USB Connect Timing
address_offset : 0x7A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONTIM CONTIM read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_CONTIM_WTID USB_CONTIM_WTCON

USB_CONTIM_WTID : Wait ID
bits : 0 - 3 (4 bit)

USB_CONTIM_WTCON : Connect Wait
bits : 4 - 11 (8 bit)


USB0VPLEN

USB OTG VBUS Pulse Timing
address_offset : 0x7B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0VPLEN USB0VPLEN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_VPLEN_VPLEN

USB_VPLEN_VPLEN : VBUS Pulse Length
bits : 0 - 7 (8 bit)


VPLEN

USB OTG VBUS Pulse Timing
address_offset : 0x7B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VPLEN VPLEN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_VPLEN_VPLEN

USB_VPLEN_VPLEN : VBUS Pulse Length
bits : 0 - 7 (8 bit)


USB0FSEOF

USB Full-Speed Last Transaction to End of Frame Timing
address_offset : 0x7D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FSEOF USB0FSEOF read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_FSEOF_FSEOFG

USB_FSEOF_FSEOFG : Full-Speed End-of-Frame Gap
bits : 0 - 7 (8 bit)


FSEOF

USB Full-Speed Last Transaction to End of Frame Timing
address_offset : 0x7D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FSEOF FSEOF read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_FSEOF_FSEOFG

USB_FSEOF_FSEOFG : Full-Speed End-of-Frame Gap
bits : 0 - 7 (8 bit)


USB0LSEOF

USB Low-Speed Last Transaction to End of Frame Timing
address_offset : 0x7E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0LSEOF USB0LSEOF read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_LSEOF_LSEOFG

USB_LSEOF_LSEOFG : Low-Speed End-of-Frame Gap
bits : 0 - 7 (8 bit)


LSEOF

USB Low-Speed Last Transaction to End of Frame Timing
address_offset : 0x7E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LSEOF LSEOF read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_LSEOF_LSEOFG

USB_LSEOF_LSEOFG : Low-Speed End-of-Frame Gap
bits : 0 - 7 (8 bit)


USB0RXIE

USB Receive Interrupt Enable
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXIE USB0RXIE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXIE_EP1 USB_RXIE_EP2 USB_RXIE_EP3 USB_RXIE_EP4 USB_RXIE_EP5 USB_RXIE_EP6 USB_RXIE_EP7 USB_RXIE_EP8 USB_RXIE_EP9 USB_RXIE_EP10 USB_RXIE_EP11 USB_RXIE_EP12 USB_RXIE_EP13 USB_RXIE_EP14 USB_RXIE_EP15

USB_RXIE_EP1 : RX Endpoint 1 Interrupt Enable
bits : 1 - 2 (2 bit)

USB_RXIE_EP2 : RX Endpoint 2 Interrupt Enable
bits : 2 - 4 (3 bit)

USB_RXIE_EP3 : RX Endpoint 3 Interrupt Enable
bits : 3 - 6 (4 bit)

USB_RXIE_EP4 : RX Endpoint 4 Interrupt Enable
bits : 4 - 8 (5 bit)

USB_RXIE_EP5 : RX Endpoint 5 Interrupt Enable
bits : 5 - 10 (6 bit)

USB_RXIE_EP6 : RX Endpoint 6 Interrupt Enable
bits : 6 - 12 (7 bit)

USB_RXIE_EP7 : RX Endpoint 7 Interrupt Enable
bits : 7 - 14 (8 bit)

USB_RXIE_EP8 : RX Endpoint 8 Interrupt Enable
bits : 8 - 16 (9 bit)

USB_RXIE_EP9 : RX Endpoint 9 Interrupt Enable
bits : 9 - 18 (10 bit)

USB_RXIE_EP10 : RX Endpoint 10 Interrupt Enable
bits : 10 - 20 (11 bit)

USB_RXIE_EP11 : RX Endpoint 11 Interrupt Enable
bits : 11 - 22 (12 bit)

USB_RXIE_EP12 : RX Endpoint 12 Interrupt Enable
bits : 12 - 24 (13 bit)

USB_RXIE_EP13 : RX Endpoint 13 Interrupt Enable
bits : 13 - 26 (14 bit)

USB_RXIE_EP14 : RX Endpoint 14 Interrupt Enable
bits : 14 - 28 (15 bit)

USB_RXIE_EP15 : RX Endpoint 15 Interrupt Enable
bits : 15 - 30 (16 bit)


RXIE

USB Receive Interrupt Enable
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXIE RXIE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_RXIE_EP1 USB_RXIE_EP2 USB_RXIE_EP3 USB_RXIE_EP4 USB_RXIE_EP5 USB_RXIE_EP6 USB_RXIE_EP7 USB_RXIE_EP8 USB_RXIE_EP9 USB_RXIE_EP10 USB_RXIE_EP11 USB_RXIE_EP12 USB_RXIE_EP13 USB_RXIE_EP14 USB_RXIE_EP15

USB_RXIE_EP1 : RX Endpoint 1 Interrupt Enable
bits : 1 - 2 (2 bit)

USB_RXIE_EP2 : RX Endpoint 2 Interrupt Enable
bits : 2 - 4 (3 bit)

USB_RXIE_EP3 : RX Endpoint 3 Interrupt Enable
bits : 3 - 6 (4 bit)

USB_RXIE_EP4 : RX Endpoint 4 Interrupt Enable
bits : 4 - 8 (5 bit)

USB_RXIE_EP5 : RX Endpoint 5 Interrupt Enable
bits : 5 - 10 (6 bit)

USB_RXIE_EP6 : RX Endpoint 6 Interrupt Enable
bits : 6 - 12 (7 bit)

USB_RXIE_EP7 : RX Endpoint 7 Interrupt Enable
bits : 7 - 14 (8 bit)

USB_RXIE_EP8 : RX Endpoint 8 Interrupt Enable
bits : 8 - 16 (9 bit)

USB_RXIE_EP9 : RX Endpoint 9 Interrupt Enable
bits : 9 - 18 (10 bit)

USB_RXIE_EP10 : RX Endpoint 10 Interrupt Enable
bits : 10 - 20 (11 bit)

USB_RXIE_EP11 : RX Endpoint 11 Interrupt Enable
bits : 11 - 22 (12 bit)

USB_RXIE_EP12 : RX Endpoint 12 Interrupt Enable
bits : 12 - 24 (13 bit)

USB_RXIE_EP13 : RX Endpoint 13 Interrupt Enable
bits : 13 - 26 (14 bit)

USB_RXIE_EP14 : RX Endpoint 14 Interrupt Enable
bits : 14 - 28 (15 bit)

USB_RXIE_EP15 : RX Endpoint 15 Interrupt Enable
bits : 15 - 30 (16 bit)


USB0TXFUNCADDR0

USB Transmit Functional Address Endpoint 0
address_offset : 0x80 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR0 USB0TXFUNCADDR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR0_ADDR

USB_TXFUNCADDR0_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR0

USB Transmit Functional Address Endpoint 0
address_offset : 0x80 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR0 TXFUNCADDR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR0_ADDR

USB_TXFUNCADDR0_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR0

USB Transmit Hub Address Endpoint 0
address_offset : 0x82 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR0 USB0TXHUBADDR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR0_ADDR USB_TXHUBADDR0_MULTTRAN

USB_TXHUBADDR0_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR0_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR0

USB Transmit Hub Address Endpoint 0
address_offset : 0x82 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR0 TXHUBADDR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR0_ADDR USB_TXHUBADDR0_MULTTRAN

USB_TXHUBADDR0_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR0_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT0

USB Transmit Hub Port Endpoint 0
address_offset : 0x83 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT0 USB0TXHUBPORT0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT0_PORT

USB_TXHUBPORT0_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT0

USB Transmit Hub Port Endpoint 0
address_offset : 0x83 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT0 TXHUBPORT0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT0_PORT

USB_TXHUBPORT0_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0TXFUNCADDR1

USB Transmit Functional Address Endpoint 1
address_offset : 0x88 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR1 USB0TXFUNCADDR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR1_ADDR

USB_TXFUNCADDR1_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR1

USB Transmit Functional Address Endpoint 1
address_offset : 0x88 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR1 TXFUNCADDR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR1_ADDR

USB_TXFUNCADDR1_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR1

USB Transmit Hub Address Endpoint 1
address_offset : 0x8A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR1 USB0TXHUBADDR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR1_ADDR USB_TXHUBADDR1_MULTTRAN

USB_TXHUBADDR1_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR1_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR1

USB Transmit Hub Address Endpoint 1
address_offset : 0x8A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR1 TXHUBADDR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR1_ADDR USB_TXHUBADDR1_MULTTRAN

USB_TXHUBADDR1_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR1_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT1

USB Transmit Hub Port Endpoint 1
address_offset : 0x8B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT1 USB0TXHUBPORT1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT1_PORT

USB_TXHUBPORT1_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT1

USB Transmit Hub Port Endpoint 1
address_offset : 0x8B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT1 TXHUBPORT1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT1_PORT

USB_TXHUBPORT1_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR1

USB Receive Functional Address Endpoint 1
address_offset : 0x8C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR1 USB0RXFUNCADDR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR1_ADDR

USB_RXFUNCADDR1_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR1

USB Receive Functional Address Endpoint 1
address_offset : 0x8C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR1 RXFUNCADDR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR1_ADDR

USB_RXFUNCADDR1_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR1

USB Receive Hub Address Endpoint 1
address_offset : 0x8E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR1 USB0RXHUBADDR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR1_ADDR USB_RXHUBADDR1_MULTTRAN

USB_RXHUBADDR1_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR1_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR1

USB Receive Hub Address Endpoint 1
address_offset : 0x8E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR1 RXHUBADDR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR1_ADDR USB_RXHUBADDR1_MULTTRAN

USB_RXHUBADDR1_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR1_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT1

USB Receive Hub Port Endpoint 1
address_offset : 0x8F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT1 USB0RXHUBPORT1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT1_PORT

USB_RXHUBPORT1_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT1

USB Receive Hub Port Endpoint 1
address_offset : 0x8F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT1 RXHUBPORT1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT1_PORT

USB_RXHUBPORT1_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0TXFUNCADDR2

USB Transmit Functional Address Endpoint 2
address_offset : 0x90 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR2 USB0TXFUNCADDR2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR2_ADDR

USB_TXFUNCADDR2_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR2

USB Transmit Functional Address Endpoint 2
address_offset : 0x90 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR2 TXFUNCADDR2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR2_ADDR

USB_TXFUNCADDR2_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR2

USB Transmit Hub Address Endpoint 2
address_offset : 0x92 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR2 USB0TXHUBADDR2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR2_ADDR USB_TXHUBADDR2_MULTTRAN

USB_TXHUBADDR2_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR2_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR2

USB Transmit Hub Address Endpoint 2
address_offset : 0x92 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR2 TXHUBADDR2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR2_ADDR USB_TXHUBADDR2_MULTTRAN

USB_TXHUBADDR2_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR2_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT2

USB Transmit Hub Port Endpoint 2
address_offset : 0x93 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT2 USB0TXHUBPORT2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT2_PORT

USB_TXHUBPORT2_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT2

USB Transmit Hub Port Endpoint 2
address_offset : 0x93 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT2 TXHUBPORT2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT2_PORT

USB_TXHUBPORT2_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR2

USB Receive Functional Address Endpoint 2
address_offset : 0x94 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR2 USB0RXFUNCADDR2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR2_ADDR

USB_RXFUNCADDR2_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR2

USB Receive Functional Address Endpoint 2
address_offset : 0x94 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR2 RXFUNCADDR2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR2_ADDR

USB_RXFUNCADDR2_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR2

USB Receive Hub Address Endpoint 2
address_offset : 0x96 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR2 USB0RXHUBADDR2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR2_ADDR USB_RXHUBADDR2_MULTTRAN

USB_RXHUBADDR2_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR2_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR2

USB Receive Hub Address Endpoint 2
address_offset : 0x96 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR2 RXHUBADDR2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR2_ADDR USB_RXHUBADDR2_MULTTRAN

USB_RXHUBADDR2_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR2_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT2

USB Receive Hub Port Endpoint 2
address_offset : 0x97 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT2 USB0RXHUBPORT2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT2_PORT

USB_RXHUBPORT2_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT2

USB Receive Hub Port Endpoint 2
address_offset : 0x97 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT2 RXHUBPORT2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT2_PORT

USB_RXHUBPORT2_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0TXFUNCADDR3

USB Transmit Functional Address Endpoint 3
address_offset : 0x98 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR3 USB0TXFUNCADDR3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR3_ADDR

USB_TXFUNCADDR3_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR3

USB Transmit Functional Address Endpoint 3
address_offset : 0x98 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR3 TXFUNCADDR3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR3_ADDR

USB_TXFUNCADDR3_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR3

USB Transmit Hub Address Endpoint 3
address_offset : 0x9A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR3 USB0TXHUBADDR3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR3_ADDR USB_TXHUBADDR3_MULTTRAN

USB_TXHUBADDR3_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR3_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR3

USB Transmit Hub Address Endpoint 3
address_offset : 0x9A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR3 TXHUBADDR3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR3_ADDR USB_TXHUBADDR3_MULTTRAN

USB_TXHUBADDR3_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR3_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT3

USB Transmit Hub Port Endpoint 3
address_offset : 0x9B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT3 USB0TXHUBPORT3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT3_PORT

USB_TXHUBPORT3_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT3

USB Transmit Hub Port Endpoint 3
address_offset : 0x9B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT3 TXHUBPORT3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT3_PORT

USB_TXHUBPORT3_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR3

USB Receive Functional Address Endpoint 3
address_offset : 0x9C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR3 USB0RXFUNCADDR3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR3_ADDR

USB_RXFUNCADDR3_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR3

USB Receive Functional Address Endpoint 3
address_offset : 0x9C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR3 RXFUNCADDR3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR3_ADDR

USB_RXFUNCADDR3_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR3

USB Receive Hub Address Endpoint 3
address_offset : 0x9E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR3 USB0RXHUBADDR3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR3_ADDR USB_RXHUBADDR3_MULTTRAN

USB_RXHUBADDR3_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR3_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR3

USB Receive Hub Address Endpoint 3
address_offset : 0x9E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR3 RXHUBADDR3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR3_ADDR USB_RXHUBADDR3_MULTTRAN

USB_RXHUBADDR3_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR3_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT3

USB Receive Hub Port Endpoint 3
address_offset : 0x9F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT3 USB0RXHUBPORT3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT3_PORT

USB_RXHUBPORT3_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT3

USB Receive Hub Port Endpoint 3
address_offset : 0x9F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT3 RXHUBPORT3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT3_PORT

USB_RXHUBPORT3_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0IS

USB General Interrupt Status
address_offset : 0xA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0IS USB0IS read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_IS_SUSPEND USB_IS_RESUME USB_IS_BABBLE USB_IS_SOF USB_IS_CONN USB_IS_DISCON USB_IS_SESREQ USB_IS_VBUSERR

USB_IS_SUSPEND : SUSPEND Signaling Detected
bits : 0 - 0 (1 bit)

USB_IS_RESUME : RESUME Signaling Detected
bits : 1 - 2 (2 bit)

USB_IS_BABBLE : Babble Detected
bits : 2 - 4 (3 bit)

USB_IS_SOF : Start of Frame
bits : 3 - 6 (4 bit)

USB_IS_CONN : Session Connect
bits : 4 - 8 (5 bit)

USB_IS_DISCON : Session Disconnect
bits : 5 - 10 (6 bit)

USB_IS_SESREQ : SESSION REQUEST
bits : 6 - 12 (7 bit)

USB_IS_VBUSERR : VBUS Error
bits : 7 - 14 (8 bit)


IS

USB General Interrupt Status
address_offset : 0xA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IS IS read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_IS_SUSPEND USB_IS_RESUME USB_IS_BABBLE USB_IS_RESET USB_IS_SOF USB_IS_CONN USB_IS_DISCON USB_IS_SESREQ USB_IS_VBUSERR

USB_IS_SUSPEND : SUSPEND Signaling Detected
bits : 0 - 0 (1 bit)

USB_IS_RESUME : RESUME Signaling Detected
bits : 1 - 2 (2 bit)

USB_IS_BABBLE : Babble Detected
bits : 2 - 4 (3 bit)

USB_IS_RESET : RESET Signaling Detected
bits : 2 - 4 (3 bit)

USB_IS_SOF : Start of Frame
bits : 3 - 6 (4 bit)

USB_IS_CONN : Session Connect
bits : 4 - 8 (5 bit)

USB_IS_DISCON : Session Disconnect
bits : 5 - 10 (6 bit)

USB_IS_SESREQ : SESSION REQUEST
bits : 6 - 12 (7 bit)

USB_IS_VBUSERR : VBUS Error
bits : 7 - 14 (8 bit)


USB0TXFUNCADDR4

USB Transmit Functional Address Endpoint 4
address_offset : 0xA0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR4 USB0TXFUNCADDR4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR4_ADDR

USB_TXFUNCADDR4_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR4

USB Transmit Functional Address Endpoint 4
address_offset : 0xA0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR4 TXFUNCADDR4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR4_ADDR

USB_TXFUNCADDR4_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR4

USB Transmit Hub Address Endpoint 4
address_offset : 0xA2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR4 USB0TXHUBADDR4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR4_ADDR USB_TXHUBADDR4_MULTTRAN

USB_TXHUBADDR4_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR4_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR4

USB Transmit Hub Address Endpoint 4
address_offset : 0xA2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR4 TXHUBADDR4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR4_ADDR USB_TXHUBADDR4_MULTTRAN

USB_TXHUBADDR4_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR4_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT4

USB Transmit Hub Port Endpoint 4
address_offset : 0xA3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT4 USB0TXHUBPORT4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT4_PORT

USB_TXHUBPORT4_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT4

USB Transmit Hub Port Endpoint 4
address_offset : 0xA3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT4 TXHUBPORT4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT4_PORT

USB_TXHUBPORT4_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR4

USB Receive Functional Address Endpoint 4
address_offset : 0xA4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR4 USB0RXFUNCADDR4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR4_ADDR

USB_RXFUNCADDR4_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR4

USB Receive Functional Address Endpoint 4
address_offset : 0xA4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR4 RXFUNCADDR4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR4_ADDR

USB_RXFUNCADDR4_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR4

USB Receive Hub Address Endpoint 4
address_offset : 0xA6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR4 USB0RXHUBADDR4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR4_ADDR USB_RXHUBADDR4_MULTTRAN

USB_RXHUBADDR4_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR4_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR4

USB Receive Hub Address Endpoint 4
address_offset : 0xA6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR4 RXHUBADDR4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR4_ADDR USB_RXHUBADDR4_MULTTRAN

USB_RXHUBADDR4_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR4_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT4

USB Receive Hub Port Endpoint 4
address_offset : 0xA7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT4 USB0RXHUBPORT4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT4_PORT

USB_RXHUBPORT4_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT4

USB Receive Hub Port Endpoint 4
address_offset : 0xA7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT4 RXHUBPORT4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT4_PORT

USB_RXHUBPORT4_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0TXFUNCADDR5

USB Transmit Functional Address Endpoint 5
address_offset : 0xA8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR5 USB0TXFUNCADDR5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR5_ADDR

USB_TXFUNCADDR5_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR5

USB Transmit Functional Address Endpoint 5
address_offset : 0xA8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR5 TXFUNCADDR5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR5_ADDR

USB_TXFUNCADDR5_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR5

USB Transmit Hub Address Endpoint 5
address_offset : 0xAA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR5 USB0TXHUBADDR5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR5_ADDR USB_TXHUBADDR5_MULTTRAN

USB_TXHUBADDR5_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR5_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR5

USB Transmit Hub Address Endpoint 5
address_offset : 0xAA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR5 TXHUBADDR5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR5_ADDR USB_TXHUBADDR5_MULTTRAN

USB_TXHUBADDR5_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR5_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT5

USB Transmit Hub Port Endpoint 5
address_offset : 0xAB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT5 USB0TXHUBPORT5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT5_PORT

USB_TXHUBPORT5_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT5

USB Transmit Hub Port Endpoint 5
address_offset : 0xAB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT5 TXHUBPORT5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT5_PORT

USB_TXHUBPORT5_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR5

USB Receive Functional Address Endpoint 5
address_offset : 0xAC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR5 USB0RXFUNCADDR5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR5_ADDR

USB_RXFUNCADDR5_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR5

USB Receive Functional Address Endpoint 5
address_offset : 0xAC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR5 RXFUNCADDR5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR5_ADDR

USB_RXFUNCADDR5_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR5

USB Receive Hub Address Endpoint 5
address_offset : 0xAE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR5 USB0RXHUBADDR5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR5_ADDR USB_RXHUBADDR5_MULTTRAN

USB_RXHUBADDR5_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR5_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR5

USB Receive Hub Address Endpoint 5
address_offset : 0xAE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR5 RXHUBADDR5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR5_ADDR USB_RXHUBADDR5_MULTTRAN

USB_RXHUBADDR5_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR5_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT5

USB Receive Hub Port Endpoint 5
address_offset : 0xAF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT5 USB0RXHUBPORT5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT5_PORT

USB_RXHUBPORT5_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT5

USB Receive Hub Port Endpoint 5
address_offset : 0xAF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT5 RXHUBPORT5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT5_PORT

USB_RXHUBPORT5_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0IE

USB Interrupt Enable
address_offset : 0xB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0IE USB0IE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_IE_SUSPND USB_IE_RESUME USB_IE_BABBLE USB_IE_SOF USB_IE_CONN USB_IE_DISCON USB_IE_SESREQ USB_IE_VBUSERR

USB_IE_SUSPND : Enable SUSPEND Interrupt
bits : 0 - 0 (1 bit)

USB_IE_RESUME : Enable RESUME Interrupt
bits : 1 - 2 (2 bit)

USB_IE_BABBLE : Enable Babble Interrupt
bits : 2 - 4 (3 bit)

USB_IE_SOF : Enable Start-of-Frame Interrupt
bits : 3 - 6 (4 bit)

USB_IE_CONN : Enable Connect Interrupt
bits : 4 - 8 (5 bit)

USB_IE_DISCON : Enable Disconnect Interrupt
bits : 5 - 10 (6 bit)

USB_IE_SESREQ : Enable Session Request
bits : 6 - 12 (7 bit)

USB_IE_VBUSERR : Enable VBUS Error Interrupt
bits : 7 - 14 (8 bit)


IE

USB Interrupt Enable
address_offset : 0xB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_IE_SUSPND USB_IE_RESUME USB_IE_BABBLE USB_IE_RESET USB_IE_SOF USB_IE_CONN USB_IE_DISCON USB_IE_SESREQ USB_IE_VBUSERR

USB_IE_SUSPND : Enable SUSPEND Interrupt
bits : 0 - 0 (1 bit)

USB_IE_RESUME : Enable RESUME Interrupt
bits : 1 - 2 (2 bit)

USB_IE_BABBLE : Enable Babble Interrupt
bits : 2 - 4 (3 bit)

USB_IE_RESET : Enable RESET Interrupt
bits : 2 - 4 (3 bit)

USB_IE_SOF : Enable Start-of-Frame Interrupt
bits : 3 - 6 (4 bit)

USB_IE_CONN : Enable Connect Interrupt
bits : 4 - 8 (5 bit)

USB_IE_DISCON : Enable Disconnect Interrupt
bits : 5 - 10 (6 bit)

USB_IE_SESREQ : Enable Session Request
bits : 6 - 12 (7 bit)

USB_IE_VBUSERR : Enable VBUS Error Interrupt
bits : 7 - 14 (8 bit)


USB0TXFUNCADDR6

USB Transmit Functional Address Endpoint 6
address_offset : 0xB0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR6 USB0TXFUNCADDR6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR6_ADDR

USB_TXFUNCADDR6_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR6

USB Transmit Functional Address Endpoint 6
address_offset : 0xB0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR6 TXFUNCADDR6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR6_ADDR

USB_TXFUNCADDR6_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR6

USB Transmit Hub Address Endpoint 6
address_offset : 0xB2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR6 USB0TXHUBADDR6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR6_ADDR USB_TXHUBADDR6_MULTTRAN

USB_TXHUBADDR6_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR6_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR6

USB Transmit Hub Address Endpoint 6
address_offset : 0xB2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR6 TXHUBADDR6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR6_ADDR USB_TXHUBADDR6_MULTTRAN

USB_TXHUBADDR6_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR6_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT6

USB Transmit Hub Port Endpoint 6
address_offset : 0xB3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT6 USB0TXHUBPORT6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT6_PORT

USB_TXHUBPORT6_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT6

USB Transmit Hub Port Endpoint 6
address_offset : 0xB3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT6 TXHUBPORT6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT6_PORT

USB_TXHUBPORT6_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR6

USB Receive Functional Address Endpoint 6
address_offset : 0xB4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR6 USB0RXFUNCADDR6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR6_ADDR

USB_RXFUNCADDR6_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR6

USB Receive Functional Address Endpoint 6
address_offset : 0xB4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR6 RXFUNCADDR6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR6_ADDR

USB_RXFUNCADDR6_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR6

USB Receive Hub Address Endpoint 6
address_offset : 0xB6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR6 USB0RXHUBADDR6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR6_ADDR USB_RXHUBADDR6_MULTTRAN

USB_RXHUBADDR6_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR6_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR6

USB Receive Hub Address Endpoint 6
address_offset : 0xB6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR6 RXHUBADDR6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR6_ADDR USB_RXHUBADDR6_MULTTRAN

USB_RXHUBADDR6_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR6_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT6

USB Receive Hub Port Endpoint 6
address_offset : 0xB7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT6 USB0RXHUBPORT6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT6_PORT

USB_RXHUBPORT6_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT6

USB Receive Hub Port Endpoint 6
address_offset : 0xB7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT6 RXHUBPORT6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT6_PORT

USB_RXHUBPORT6_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0TXFUNCADDR7

USB Transmit Functional Address Endpoint 7
address_offset : 0xB8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR7 USB0TXFUNCADDR7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR7_ADDR

USB_TXFUNCADDR7_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR7

USB Transmit Functional Address Endpoint 7
address_offset : 0xB8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR7 TXFUNCADDR7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR7_ADDR

USB_TXFUNCADDR7_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR7

USB Transmit Hub Address Endpoint 7
address_offset : 0xBA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR7 USB0TXHUBADDR7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR7_ADDR USB_TXHUBADDR7_MULTTRAN

USB_TXHUBADDR7_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR7_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR7

USB Transmit Hub Address Endpoint 7
address_offset : 0xBA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR7 TXHUBADDR7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR7_ADDR USB_TXHUBADDR7_MULTTRAN

USB_TXHUBADDR7_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR7_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT7

USB Transmit Hub Port Endpoint 7
address_offset : 0xBB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT7 USB0TXHUBPORT7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT7_PORT

USB_TXHUBPORT7_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT7

USB Transmit Hub Port Endpoint 7
address_offset : 0xBB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT7 TXHUBPORT7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT7_PORT

USB_TXHUBPORT7_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR7

USB Receive Functional Address Endpoint 7
address_offset : 0xBC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR7 USB0RXFUNCADDR7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR7_ADDR

USB_RXFUNCADDR7_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR7

USB Receive Functional Address Endpoint 7
address_offset : 0xBC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR7 RXFUNCADDR7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR7_ADDR

USB_RXFUNCADDR7_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR7

USB Receive Hub Address Endpoint 7
address_offset : 0xBE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR7 USB0RXHUBADDR7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR7_ADDR USB_RXHUBADDR7_MULTTRAN

USB_RXHUBADDR7_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR7_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR7

USB Receive Hub Address Endpoint 7
address_offset : 0xBE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR7 RXHUBADDR7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR7_ADDR USB_RXHUBADDR7_MULTTRAN

USB_RXHUBADDR7_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR7_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT7

USB Receive Hub Port Endpoint 7
address_offset : 0xBF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT7 USB0RXHUBPORT7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT7_PORT

USB_RXHUBPORT7_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT7

USB Receive Hub Port Endpoint 7
address_offset : 0xBF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT7 RXHUBPORT7 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT7_PORT

USB_RXHUBPORT7_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0FRAME

USB Frame Value
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0FRAME USB0FRAME read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FRAME

USB_FRAME : Frame Number
bits : 0 - 10 (11 bit)


FRAME

USB Frame Value
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRAME FRAME read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 USB_FRAME

USB_FRAME : Frame Number
bits : 0 - 10 (11 bit)


USB0TXFUNCADDR8

USB Transmit Functional Address Endpoint 8
address_offset : 0xC0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR8 USB0TXFUNCADDR8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR8_ADDR

USB_TXFUNCADDR8_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR8

USB Transmit Functional Address Endpoint 8
address_offset : 0xC0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR8 TXFUNCADDR8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR8_ADDR

USB_TXFUNCADDR8_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR8

USB Transmit Hub Address Endpoint 8
address_offset : 0xC2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR8 USB0TXHUBADDR8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR8_ADDR USB_TXHUBADDR8_MULTTRAN

USB_TXHUBADDR8_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR8_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR8

USB Transmit Hub Address Endpoint 8
address_offset : 0xC2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR8 TXHUBADDR8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR8_ADDR USB_TXHUBADDR8_MULTTRAN

USB_TXHUBADDR8_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR8_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT8

USB Transmit Hub Port Endpoint 8
address_offset : 0xC3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT8 USB0TXHUBPORT8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT8_PORT

USB_TXHUBPORT8_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT8

USB Transmit Hub Port Endpoint 8
address_offset : 0xC3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT8 TXHUBPORT8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT8_PORT

USB_TXHUBPORT8_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR8

USB Receive Functional Address Endpoint 8
address_offset : 0xC4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR8 USB0RXFUNCADDR8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR8_ADDR

USB_RXFUNCADDR8_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR8

USB Receive Functional Address Endpoint 8
address_offset : 0xC4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR8 RXFUNCADDR8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR8_ADDR

USB_RXFUNCADDR8_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR8

USB Receive Hub Address Endpoint 8
address_offset : 0xC6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR8 USB0RXHUBADDR8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR8_ADDR USB_RXHUBADDR8_MULTTRAN

USB_RXHUBADDR8_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR8_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR8

USB Receive Hub Address Endpoint 8
address_offset : 0xC6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR8 RXHUBADDR8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR8_ADDR USB_RXHUBADDR8_MULTTRAN

USB_RXHUBADDR8_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR8_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT8

USB Receive Hub Port Endpoint 8
address_offset : 0xC7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT8 USB0RXHUBPORT8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT8_PORT

USB_RXHUBPORT8_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT8

USB Receive Hub Port Endpoint 8
address_offset : 0xC7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT8 RXHUBPORT8 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT8_PORT

USB_RXHUBPORT8_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0TXFUNCADDR9

USB Transmit Functional Address Endpoint 9
address_offset : 0xC8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR9 USB0TXFUNCADDR9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR9_ADDR

USB_TXFUNCADDR9_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR9

USB Transmit Functional Address Endpoint 9
address_offset : 0xC8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR9 TXFUNCADDR9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR9_ADDR

USB_TXFUNCADDR9_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR9

USB Transmit Hub Address Endpoint 9
address_offset : 0xCA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR9 USB0TXHUBADDR9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR9_ADDR USB_TXHUBADDR9_MULTTRAN

USB_TXHUBADDR9_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR9_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR9

USB Transmit Hub Address Endpoint 9
address_offset : 0xCA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR9 TXHUBADDR9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR9_ADDR USB_TXHUBADDR9_MULTTRAN

USB_TXHUBADDR9_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR9_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT9

USB Transmit Hub Port Endpoint 9
address_offset : 0xCB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT9 USB0TXHUBPORT9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT9_PORT

USB_TXHUBPORT9_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT9

USB Transmit Hub Port Endpoint 9
address_offset : 0xCB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT9 TXHUBPORT9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT9_PORT

USB_TXHUBPORT9_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR9

USB Receive Functional Address Endpoint 9
address_offset : 0xCC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR9 USB0RXFUNCADDR9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR9_ADDR

USB_RXFUNCADDR9_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR9

USB Receive Functional Address Endpoint 9
address_offset : 0xCC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR9 RXFUNCADDR9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR9_ADDR

USB_RXFUNCADDR9_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR9

USB Receive Hub Address Endpoint 9
address_offset : 0xCE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR9 USB0RXHUBADDR9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR9_ADDR USB_RXHUBADDR9_MULTTRAN

USB_RXHUBADDR9_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR9_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR9

USB Receive Hub Address Endpoint 9
address_offset : 0xCE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR9 RXHUBADDR9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR9_ADDR USB_RXHUBADDR9_MULTTRAN

USB_RXHUBADDR9_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR9_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT9

USB Receive Hub Port Endpoint 9
address_offset : 0xCF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT9 USB0RXHUBPORT9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT9_PORT

USB_RXHUBPORT9_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT9

USB Receive Hub Port Endpoint 9
address_offset : 0xCF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT9 RXHUBPORT9 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT9_PORT

USB_RXHUBPORT9_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0TXFUNCADDR10

USB Transmit Functional Address Endpoint 10
address_offset : 0xD0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR10 USB0TXFUNCADDR10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR10_ADDR

USB_TXFUNCADDR10_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR10

USB Transmit Functional Address Endpoint 10
address_offset : 0xD0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR10 TXFUNCADDR10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR10_ADDR

USB_TXFUNCADDR10_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR10

USB Transmit Hub Address Endpoint 10
address_offset : 0xD2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR10 USB0TXHUBADDR10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR10_ADDR USB_TXHUBADDR10_MULTTRAN

USB_TXHUBADDR10_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR10_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR10

USB Transmit Hub Address Endpoint 10
address_offset : 0xD2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR10 TXHUBADDR10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR10_ADDR USB_TXHUBADDR10_MULTTRAN

USB_TXHUBADDR10_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR10_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT10

USB Transmit Hub Port Endpoint 10
address_offset : 0xD3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT10 USB0TXHUBPORT10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT10_PORT

USB_TXHUBPORT10_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT10

USB Transmit Hub Port Endpoint 10
address_offset : 0xD3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT10 TXHUBPORT10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT10_PORT

USB_TXHUBPORT10_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR10

USB Receive Functional Address Endpoint 10
address_offset : 0xD4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR10 USB0RXFUNCADDR10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR10_ADDR

USB_RXFUNCADDR10_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR10

USB Receive Functional Address Endpoint 10
address_offset : 0xD4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR10 RXFUNCADDR10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR10_ADDR

USB_RXFUNCADDR10_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR10

USB Receive Hub Address Endpoint 10
address_offset : 0xD6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR10 USB0RXHUBADDR10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR10_ADDR USB_RXHUBADDR10_MULTTRAN

USB_RXHUBADDR10_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR10_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR10

USB Receive Hub Address Endpoint 10
address_offset : 0xD6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR10 RXHUBADDR10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR10_ADDR USB_RXHUBADDR10_MULTTRAN

USB_RXHUBADDR10_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR10_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT10

USB Receive Hub Port Endpoint 10
address_offset : 0xD7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT10 USB0RXHUBPORT10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT10_PORT

USB_RXHUBPORT10_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT10

USB Receive Hub Port Endpoint 10
address_offset : 0xD7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT10 RXHUBPORT10 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT10_PORT

USB_RXHUBPORT10_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0TXFUNCADDR11

USB Transmit Functional Address Endpoint 11
address_offset : 0xD8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR11 USB0TXFUNCADDR11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR11_ADDR

USB_TXFUNCADDR11_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR11

USB Transmit Functional Address Endpoint 11
address_offset : 0xD8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR11 TXFUNCADDR11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR11_ADDR

USB_TXFUNCADDR11_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR11

USB Transmit Hub Address Endpoint 11
address_offset : 0xDA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR11 USB0TXHUBADDR11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR11_ADDR USB_TXHUBADDR11_MULTTRAN

USB_TXHUBADDR11_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR11_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR11

USB Transmit Hub Address Endpoint 11
address_offset : 0xDA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR11 TXHUBADDR11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR11_ADDR USB_TXHUBADDR11_MULTTRAN

USB_TXHUBADDR11_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR11_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT11

USB Transmit Hub Port Endpoint 11
address_offset : 0xDB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT11 USB0TXHUBPORT11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT11_PORT

USB_TXHUBPORT11_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT11

USB Transmit Hub Port Endpoint 11
address_offset : 0xDB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT11 TXHUBPORT11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT11_PORT

USB_TXHUBPORT11_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR11

USB Receive Functional Address Endpoint 11
address_offset : 0xDC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR11 USB0RXFUNCADDR11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR11_ADDR

USB_RXFUNCADDR11_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR11

USB Receive Functional Address Endpoint 11
address_offset : 0xDC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR11 RXFUNCADDR11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR11_ADDR

USB_RXFUNCADDR11_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR11

USB Receive Hub Address Endpoint 11
address_offset : 0xDE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR11 USB0RXHUBADDR11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR11_ADDR USB_RXHUBADDR11_MULTTRAN

USB_RXHUBADDR11_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR11_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR11

USB Receive Hub Address Endpoint 11
address_offset : 0xDE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR11 RXHUBADDR11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR11_ADDR USB_RXHUBADDR11_MULTTRAN

USB_RXHUBADDR11_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR11_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT11

USB Receive Hub Port Endpoint 11
address_offset : 0xDF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT11 USB0RXHUBPORT11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT11_PORT

USB_RXHUBPORT11_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT11

USB Receive Hub Port Endpoint 11
address_offset : 0xDF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT11 RXHUBPORT11 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT11_PORT

USB_RXHUBPORT11_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0EPIDX

USB Endpoint Index
address_offset : 0xE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0EPIDX USB0EPIDX read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_EPIDX_EPIDX

USB_EPIDX_EPIDX : Endpoint Index
bits : 0 - 3 (4 bit)


EPIDX

USB Endpoint Index
address_offset : 0xE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EPIDX EPIDX read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_EPIDX_EPIDX

USB_EPIDX_EPIDX : Endpoint Index
bits : 0 - 3 (4 bit)


USB0TXFUNCADDR12

USB Transmit Functional Address Endpoint 12
address_offset : 0xE0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR12 USB0TXFUNCADDR12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR12_ADDR

USB_TXFUNCADDR12_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR12

USB Transmit Functional Address Endpoint 12
address_offset : 0xE0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR12 TXFUNCADDR12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR12_ADDR

USB_TXFUNCADDR12_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR12

USB Transmit Hub Address Endpoint 12
address_offset : 0xE2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR12 USB0TXHUBADDR12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR12_ADDR USB_TXHUBADDR12_MULTTRAN

USB_TXHUBADDR12_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR12_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR12

USB Transmit Hub Address Endpoint 12
address_offset : 0xE2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR12 TXHUBADDR12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR12_ADDR USB_TXHUBADDR12_MULTTRAN

USB_TXHUBADDR12_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR12_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT12

USB Transmit Hub Port Endpoint 12
address_offset : 0xE3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT12 USB0TXHUBPORT12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT12_PORT

USB_TXHUBPORT12_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT12

USB Transmit Hub Port Endpoint 12
address_offset : 0xE3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT12 TXHUBPORT12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT12_PORT

USB_TXHUBPORT12_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR12

USB Receive Functional Address Endpoint 12
address_offset : 0xE4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR12 USB0RXFUNCADDR12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR12_ADDR

USB_RXFUNCADDR12_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR12

USB Receive Functional Address Endpoint 12
address_offset : 0xE4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR12 RXFUNCADDR12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR12_ADDR

USB_RXFUNCADDR12_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR12

USB Receive Hub Address Endpoint 12
address_offset : 0xE6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR12 USB0RXHUBADDR12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR12_ADDR USB_RXHUBADDR12_MULTTRAN

USB_RXHUBADDR12_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR12_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR12

USB Receive Hub Address Endpoint 12
address_offset : 0xE6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR12 RXHUBADDR12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR12_ADDR USB_RXHUBADDR12_MULTTRAN

USB_RXHUBADDR12_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR12_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT12

USB Receive Hub Port Endpoint 12
address_offset : 0xE7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT12 USB0RXHUBPORT12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT12_PORT

USB_RXHUBPORT12_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT12

USB Receive Hub Port Endpoint 12
address_offset : 0xE7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT12 RXHUBPORT12 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT12_PORT

USB_RXHUBPORT12_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0TXFUNCADDR13

USB Transmit Functional Address Endpoint 13
address_offset : 0xE8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR13 USB0TXFUNCADDR13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR13_ADDR

USB_TXFUNCADDR13_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR13

USB Transmit Functional Address Endpoint 13
address_offset : 0xE8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR13 TXFUNCADDR13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR13_ADDR

USB_TXFUNCADDR13_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR13

USB Transmit Hub Address Endpoint 13
address_offset : 0xEA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR13 USB0TXHUBADDR13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR13_ADDR USB_TXHUBADDR13_MULTTRAN

USB_TXHUBADDR13_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR13_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR13

USB Transmit Hub Address Endpoint 13
address_offset : 0xEA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR13 TXHUBADDR13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR13_ADDR USB_TXHUBADDR13_MULTTRAN

USB_TXHUBADDR13_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR13_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT13

USB Transmit Hub Port Endpoint 13
address_offset : 0xEB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT13 USB0TXHUBPORT13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT13_PORT

USB_TXHUBPORT13_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT13

USB Transmit Hub Port Endpoint 13
address_offset : 0xEB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT13 TXHUBPORT13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT13_PORT

USB_TXHUBPORT13_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR13

USB Receive Functional Address Endpoint 13
address_offset : 0xEC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR13 USB0RXFUNCADDR13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR13_ADDR

USB_RXFUNCADDR13_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR13

USB Receive Functional Address Endpoint 13
address_offset : 0xEC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR13 RXFUNCADDR13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR13_ADDR

USB_RXFUNCADDR13_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR13

USB Receive Hub Address Endpoint 13
address_offset : 0xEE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR13 USB0RXHUBADDR13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR13_ADDR USB_RXHUBADDR13_MULTTRAN

USB_RXHUBADDR13_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR13_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR13

USB Receive Hub Address Endpoint 13
address_offset : 0xEE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR13 RXHUBADDR13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR13_ADDR USB_RXHUBADDR13_MULTTRAN

USB_RXHUBADDR13_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR13_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT13

USB Receive Hub Port Endpoint 13
address_offset : 0xEF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT13 USB0RXHUBPORT13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT13_PORT

USB_RXHUBPORT13_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT13

USB Receive Hub Port Endpoint 13
address_offset : 0xEF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT13 RXHUBPORT13 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT13_PORT

USB_RXHUBPORT13_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0TEST

USB Test Mode
address_offset : 0xF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TEST USB0TEST read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TEST_FORCEFS USB_TEST_FIFOACC USB_TEST_FORCEH

USB_TEST_FORCEFS : Force Full-Speed Mode
bits : 5 - 10 (6 bit)

USB_TEST_FIFOACC : FIFO Access
bits : 6 - 12 (7 bit)

USB_TEST_FORCEH : Force Host Mode
bits : 7 - 14 (8 bit)


TEST

USB Test Mode
address_offset : 0xF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TEST TEST read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TEST_FORCEFS USB_TEST_FIFOACC USB_TEST_FORCEH

USB_TEST_FORCEFS : Force Full-Speed Mode
bits : 5 - 10 (6 bit)

USB_TEST_FIFOACC : FIFO Access
bits : 6 - 12 (7 bit)

USB_TEST_FORCEH : Force Host Mode
bits : 7 - 14 (8 bit)


USB0TXFUNCADDR14

USB Transmit Functional Address Endpoint 14
address_offset : 0xF0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR14 USB0TXFUNCADDR14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR14_ADDR

USB_TXFUNCADDR14_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR14

USB Transmit Functional Address Endpoint 14
address_offset : 0xF0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR14 TXFUNCADDR14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR14_ADDR

USB_TXFUNCADDR14_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR14

USB Transmit Hub Address Endpoint 14
address_offset : 0xF2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR14 USB0TXHUBADDR14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR14_ADDR USB_TXHUBADDR14_MULTTRAN

USB_TXHUBADDR14_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR14_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR14

USB Transmit Hub Address Endpoint 14
address_offset : 0xF2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR14 TXHUBADDR14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR14_ADDR USB_TXHUBADDR14_MULTTRAN

USB_TXHUBADDR14_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR14_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT14

USB Transmit Hub Port Endpoint 14
address_offset : 0xF3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT14 USB0TXHUBPORT14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT14_PORT

USB_TXHUBPORT14_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT14

USB Transmit Hub Port Endpoint 14
address_offset : 0xF3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT14 TXHUBPORT14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT14_PORT

USB_TXHUBPORT14_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR14

USB Receive Functional Address Endpoint 14
address_offset : 0xF4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR14 USB0RXFUNCADDR14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR14_ADDR

USB_RXFUNCADDR14_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR14

USB Receive Functional Address Endpoint 14
address_offset : 0xF4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR14 RXFUNCADDR14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR14_ADDR

USB_RXFUNCADDR14_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR14

USB Receive Hub Address Endpoint 14
address_offset : 0xF6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR14 USB0RXHUBADDR14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR14_ADDR USB_RXHUBADDR14_MULTTRAN

USB_RXHUBADDR14_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR14_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR14

USB Receive Hub Address Endpoint 14
address_offset : 0xF6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR14 RXHUBADDR14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR14_ADDR USB_RXHUBADDR14_MULTTRAN

USB_RXHUBADDR14_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR14_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT14

USB Receive Hub Port Endpoint 14
address_offset : 0xF7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT14 USB0RXHUBPORT14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT14_PORT

USB_RXHUBPORT14_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT14

USB Receive Hub Port Endpoint 14
address_offset : 0xF7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT14 RXHUBPORT14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT14_PORT

USB_RXHUBPORT14_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0TXFUNCADDR15

USB Transmit Functional Address Endpoint 15
address_offset : 0xF8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXFUNCADDR15 USB0TXFUNCADDR15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR15_ADDR

USB_TXFUNCADDR15_ADDR : Device Address
bits : 0 - 6 (7 bit)


TXFUNCADDR15

USB Transmit Functional Address Endpoint 15
address_offset : 0xF8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXFUNCADDR15 TXFUNCADDR15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXFUNCADDR15_ADDR

USB_TXFUNCADDR15_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0TXHUBADDR15

USB Transmit Hub Address Endpoint 15
address_offset : 0xFA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBADDR15 USB0TXHUBADDR15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR15_ADDR USB_TXHUBADDR15_MULTTRAN

USB_TXHUBADDR15_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR15_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


TXHUBADDR15

USB Transmit Hub Address Endpoint 15
address_offset : 0xFA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBADDR15 TXHUBADDR15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBADDR15_ADDR USB_TXHUBADDR15_MULTTRAN

USB_TXHUBADDR15_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_TXHUBADDR15_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0TXHUBPORT15

USB Transmit Hub Port Endpoint 15
address_offset : 0xFB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0TXHUBPORT15 USB0TXHUBPORT15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT15_PORT

USB_TXHUBPORT15_PORT : Hub Port
bits : 0 - 6 (7 bit)


TXHUBPORT15

USB Transmit Hub Port Endpoint 15
address_offset : 0xFB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TXHUBPORT15 TXHUBPORT15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_TXHUBPORT15_PORT

USB_TXHUBPORT15_PORT : Hub Port
bits : 0 - 6 (7 bit)


USB0RXFUNCADDR15

USB Receive Functional Address Endpoint 15
address_offset : 0xFC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXFUNCADDR15 USB0RXFUNCADDR15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR15_ADDR

USB_RXFUNCADDR15_ADDR : Device Address
bits : 0 - 6 (7 bit)


RXFUNCADDR15

USB Receive Functional Address Endpoint 15
address_offset : 0xFC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXFUNCADDR15 RXFUNCADDR15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXFUNCADDR15_ADDR

USB_RXFUNCADDR15_ADDR : Device Address
bits : 0 - 6 (7 bit)


USB0RXHUBADDR15

USB Receive Hub Address Endpoint 15
address_offset : 0xFE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBADDR15 USB0RXHUBADDR15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR15_ADDR USB_RXHUBADDR15_MULTTRAN

USB_RXHUBADDR15_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR15_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


RXHUBADDR15

USB Receive Hub Address Endpoint 15
address_offset : 0xFE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBADDR15 RXHUBADDR15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBADDR15_ADDR USB_RXHUBADDR15_MULTTRAN

USB_RXHUBADDR15_ADDR : Hub Address
bits : 0 - 6 (7 bit)

USB_RXHUBADDR15_MULTTRAN : Multiple Translators
bits : 7 - 14 (8 bit)


USB0RXHUBPORT15

USB Receive Hub Port Endpoint 15
address_offset : 0xFF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USB0RXHUBPORT15 USB0RXHUBPORT15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT15_PORT

USB_RXHUBPORT15_PORT : Hub Port
bits : 0 - 6 (7 bit)


RXHUBPORT15

USB Receive Hub Port Endpoint 15
address_offset : 0xFF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXHUBPORT15 RXHUBPORT15 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 USB_RXHUBPORT15_PORT

USB_RXHUBPORT15_PORT : Hub Port
bits : 0 - 6 (7 bit)



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