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FLASH_CTRL

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x1000 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

FLASH_CTRLFMA

FMA

FLASH_CTRLFCIM

FCIM

FLASH_CTRLUSECRL

USECRL

FLASH_CTRLUSERDBG

USERDBG

FLASH_CTRLUSERREG0

USERREG0

FLASH_CTRLUSERREG1

USERREG1

FLASH_CTRLFMPRE0

FMPRE0

FLASH_CTRLFMPRE1

FMPRE1

FLASH_CTRLFMPRE2

FMPRE2

FLASH_CTRLFMPRE3

FMPRE3

FLASH_CTRLFCMISC

FCMISC

FLASH_CTRLFMPPE0

FMPPE0

FLASH_CTRLFMPPE1

FMPPE1

FLASH_CTRLFMPPE2

FMPPE2

FLASH_CTRLFMPPE3

FMPPE3

FLASH_CTRLFMD

FMD

FLASH_CTRLFMC

FMC

FLASH_CTRLFCRIS

FCRIS


FLASH_CTRLFMA

Flash Memory Address
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMA FLASH_CTRLFMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMA_OFFSET

FLASH_FMA_OFFSET : Address Offset
bits : 0 - 17 (18 bit)


FMA

Flash Memory Address
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMA FMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMA_OFFSET

FLASH_FMA_OFFSET : Address Offset
bits : 0 - 17 (18 bit)


FLASH_CTRLFCIM

Flash Controller Interrupt Mask
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFCIM FLASH_CTRLFCIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FCIM_AMASK FLASH_FCIM_PMASK

FLASH_FCIM_AMASK : Access Interrupt Mask
bits : 0 - 0 (1 bit)

FLASH_FCIM_PMASK : Programming Interrupt Mask
bits : 1 - 2 (2 bit)


FCIM

Flash Controller Interrupt Mask
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCIM FCIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FCIM_AMASK FLASH_FCIM_PMASK

FLASH_FCIM_AMASK : Access Interrupt Mask
bits : 0 - 0 (1 bit)

FLASH_FCIM_PMASK : Programming Interrupt Mask
bits : 1 - 2 (2 bit)


FLASH_CTRLUSECRL

USec Reload
address_offset : 0x1140 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLUSECRL FLASH_CTRLUSECRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USECRL

FLASH_USECRL : Microsecond Reload Value
bits : 0 - 7 (8 bit)


USECRL

USec Reload
address_offset : 0x1140 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USECRL USECRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USECRL

FLASH_USECRL : Microsecond Reload Value
bits : 0 - 7 (8 bit)


FLASH_CTRLUSERDBG

User Debug
address_offset : 0x11D0 Bytes (0x0)
access : read-write
reset_value : 0x0
alternate_register : FLASH_ALT
reset_Mask : 0x0

FLASH_CTRLUSERDBG FLASH_CTRLUSERDBG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERDBG_DBG0 FLASH_USERDBG_DBG1 FLASH_USERDBG_DATA FLASH_USERDBG_NW

FLASH_USERDBG_DBG0 : Debug Control 0
bits : 0 - 0 (1 bit)

FLASH_USERDBG_DBG1 : Debug Control 1
bits : 1 - 2 (2 bit)

FLASH_USERDBG_DATA : User Data
bits : 2 - 32 (31 bit)

FLASH_USERDBG_NW : User Debug Not Written
bits : 31 - 62 (32 bit)


USERDBG

User Debug
address_offset : 0x11D0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USERDBG USERDBG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERDBG_DBG0 FLASH_USERDBG_DBG1 FLASH_USERDBG_DATA FLASH_USERDBG_NW

FLASH_USERDBG_DBG0 : Debug Control 0
bits : 0 - 0 (1 bit)

FLASH_USERDBG_DBG1 : Debug Control 1
bits : 1 - 2 (2 bit)

FLASH_USERDBG_DATA : User Data
bits : 2 - 32 (31 bit)

FLASH_USERDBG_NW : User Debug Not Written
bits : 31 - 62 (32 bit)


FLASH_CTRLUSERREG0

User Register 0
address_offset : 0x11E0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLUSERREG0 FLASH_CTRLUSERREG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERREG0_DATA FLASH_USERREG0_NW

FLASH_USERREG0_DATA : User Data
bits : 0 - 30 (31 bit)

FLASH_USERREG0_NW : Not Written
bits : 31 - 62 (32 bit)


USERREG0

User Register 0
address_offset : 0x11E0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USERREG0 USERREG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERREG0_DATA FLASH_USERREG0_NW

FLASH_USERREG0_DATA : User Data
bits : 0 - 30 (31 bit)

FLASH_USERREG0_NW : Not Written
bits : 31 - 62 (32 bit)


FLASH_CTRLUSERREG1

User Register 1
address_offset : 0x11E4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLUSERREG1 FLASH_CTRLUSERREG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERREG1_DATA FLASH_USERREG1_NW

FLASH_USERREG1_DATA : User Data
bits : 0 - 30 (31 bit)

FLASH_USERREG1_NW : Not Written
bits : 31 - 62 (32 bit)


USERREG1

User Register 1
address_offset : 0x11E4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USERREG1 USERREG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERREG1_DATA FLASH_USERREG1_NW

FLASH_USERREG1_DATA : User Data
bits : 0 - 30 (31 bit)

FLASH_USERREG1_NW : Not Written
bits : 31 - 62 (32 bit)


FLASH_CTRLFMPRE0

Flash Memory Protection Read Enable 0
address_offset : 0x1200 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPRE0 FLASH_CTRLFMPRE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPRE0

Flash Memory Protection Read Enable 0
address_offset : 0x1200 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPRE0 FMPRE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPRE1

Flash Memory Protection Read Enable 1
address_offset : 0x1204 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPRE1 FLASH_CTRLFMPRE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPRE1

Flash Memory Protection Read Enable 1
address_offset : 0x1204 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPRE1 FMPRE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPRE2

Flash Memory Protection Read Enable 2
address_offset : 0x1208 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPRE2 FLASH_CTRLFMPRE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPRE2

Flash Memory Protection Read Enable 2
address_offset : 0x1208 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPRE2 FMPRE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPRE3

Flash Memory Protection Read Enable 3
address_offset : 0x120C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPRE3 FLASH_CTRLFMPRE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPRE3

Flash Memory Protection Read Enable 3
address_offset : 0x120C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPRE3 FMPRE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFCMISC

Flash Controller Masked Interrupt Status and Clear
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFCMISC FLASH_CTRLFCMISC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FCMISC_AMISC FLASH_FCMISC_PMISC

FLASH_FCMISC_AMISC : Access Masked Interrupt Status and Clear
bits : 0 - 0 (1 bit)

FLASH_FCMISC_PMISC : Programming Masked Interrupt Status and Clear
bits : 1 - 2 (2 bit)


FCMISC

Flash Controller Masked Interrupt Status and Clear
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCMISC FCMISC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FCMISC_AMISC FLASH_FCMISC_PMISC

FLASH_FCMISC_AMISC : Access Masked Interrupt Status and Clear
bits : 0 - 0 (1 bit)

FLASH_FCMISC_PMISC : Programming Masked Interrupt Status and Clear
bits : 1 - 2 (2 bit)


FLASH_CTRLFMPPE0

Flash Memory Protection Program Enable 0
address_offset : 0x1400 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPPE0 FLASH_CTRLFMPPE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPPE0

Flash Memory Protection Program Enable 0
address_offset : 0x1400 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPPE0 FMPPE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPPE1

Flash Memory Protection Program Enable 1
address_offset : 0x1404 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPPE1 FLASH_CTRLFMPPE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPPE1

Flash Memory Protection Program Enable 1
address_offset : 0x1404 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPPE1 FMPPE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPPE2

Flash Memory Protection Program Enable 2
address_offset : 0x1408 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPPE2 FLASH_CTRLFMPPE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPPE2

Flash Memory Protection Program Enable 2
address_offset : 0x1408 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPPE2 FMPPE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPPE3

Flash Memory Protection Program Enable 3
address_offset : 0x140C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPPE3 FLASH_CTRLFMPPE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPPE3

Flash Memory Protection Program Enable 3
address_offset : 0x140C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPPE3 FMPPE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMD

Flash Memory Data
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMD FLASH_CTRLFMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMD_DATA

FLASH_FMD_DATA : Data Value
bits : 0 - 31 (32 bit)


FMD

Flash Memory Data
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMD FMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMD_DATA

FLASH_FMD_DATA : Data Value
bits : 0 - 31 (32 bit)


FLASH_CTRLFMC

Flash Memory Control
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMC FLASH_CTRLFMC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMC_WRITE FLASH_FMC_ERASE FLASH_FMC_MERASE FLASH_FMC_COMT FLASH_FMC_WRKEY

FLASH_FMC_WRITE : Write a Word into Flash Memory
bits : 0 - 0 (1 bit)

FLASH_FMC_ERASE : Erase a Page of Flash Memory
bits : 1 - 2 (2 bit)

FLASH_FMC_MERASE : Mass Erase Flash Memory
bits : 2 - 4 (3 bit)

FLASH_FMC_COMT : Commit Register Value
bits : 3 - 6 (4 bit)

FLASH_FMC_WRKEY : FLASH write key
bits : 17 - 48 (32 bit)


FMC

Flash Memory Control
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMC FMC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMC_WRITE FLASH_FMC_ERASE FLASH_FMC_MERASE FLASH_FMC_COMT FLASH_FMC_WRKEY

FLASH_FMC_WRITE : Write a Word into Flash Memory
bits : 0 - 0 (1 bit)

FLASH_FMC_ERASE : Erase a Page of Flash Memory
bits : 1 - 2 (2 bit)

FLASH_FMC_MERASE : Mass Erase Flash Memory
bits : 2 - 4 (3 bit)

FLASH_FMC_COMT : Commit Register Value
bits : 3 - 6 (4 bit)

FLASH_FMC_WRKEY : FLASH write key
bits : 17 - 48 (32 bit)


FLASH_CTRLFCRIS

Flash Controller Raw Interrupt Status
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFCRIS FLASH_CTRLFCRIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FCRIS_ARIS FLASH_FCRIS_PRIS

FLASH_FCRIS_ARIS : Access Raw Interrupt Status
bits : 0 - 0 (1 bit)

FLASH_FCRIS_PRIS : Programming Raw Interrupt Status
bits : 1 - 2 (2 bit)


FCRIS

Flash Controller Raw Interrupt Status
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCRIS FCRIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FCRIS_ARIS FLASH_FCRIS_PRIS

FLASH_FCRIS_ARIS : Access Raw Interrupt Status
bits : 0 - 0 (1 bit)

FLASH_FCRIS_PRIS : Programming Raw Interrupt Status
bits : 1 - 2 (2 bit)



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