\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
QEI Control
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_CTL_ENABLE : Enable QEI
bits : 0 - 0 (1 bit)
QEI_CTL_SWAP : Swap Signals
bits : 1 - 2 (2 bit)
QEI_CTL_SIGMODE : Signal Mode
bits : 2 - 4 (3 bit)
QEI_CTL_CAPMODE : Capture Mode
bits : 3 - 6 (4 bit)
QEI_CTL_RESMODE : Reset Mode
bits : 4 - 8 (5 bit)
QEI_CTL_VELEN : Capture Velocity
bits : 5 - 10 (6 bit)
QEI_CTL_VELDIV : Predivide Velocity
bits : 6 - 14 (9 bit)
Enumeration:
0x0 : QEI_CTL_VELDIV_1
QEI clock /1
0x1 : QEI_CTL_VELDIV_2
QEI clock /2
0x2 : QEI_CTL_VELDIV_4
QEI clock /4
0x3 : QEI_CTL_VELDIV_8
QEI clock /8
0x4 : QEI_CTL_VELDIV_16
QEI clock /16
0x5 : QEI_CTL_VELDIV_32
QEI clock /32
0x6 : QEI_CTL_VELDIV_64
QEI clock /64
0x7 : QEI_CTL_VELDIV_128
QEI clock /128
End of enumeration elements list.
QEI_CTL_INVA : Invert PhA
bits : 9 - 18 (10 bit)
QEI_CTL_INVB : Invert PhB
bits : 10 - 20 (11 bit)
QEI_CTL_INVI : Invert Index Pulse
bits : 11 - 22 (12 bit)
QEI_CTL_STALLEN : Stall QEI
bits : 12 - 24 (13 bit)
QEI_CTL_FILTEN : Enable Input Filter
bits : 13 - 26 (14 bit)
QEI_CTL_FILTCNT : Input Filter Prescale Count
bits : 16 - 35 (20 bit)
QEI Control
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_CTL_ENABLE : Enable QEI
bits : 0 - 0 (1 bit)
QEI_CTL_SWAP : Swap Signals
bits : 1 - 2 (2 bit)
QEI_CTL_SIGMODE : Signal Mode
bits : 2 - 4 (3 bit)
QEI_CTL_CAPMODE : Capture Mode
bits : 3 - 6 (4 bit)
QEI_CTL_RESMODE : Reset Mode
bits : 4 - 8 (5 bit)
QEI_CTL_VELEN : Capture Velocity
bits : 5 - 10 (6 bit)
QEI_CTL_VELDIV : Predivide Velocity
bits : 6 - 14 (9 bit)
Enumeration:
0x0 : QEI_CTL_VELDIV_1
QEI clock /1
0x1 : QEI_CTL_VELDIV_2
QEI clock /2
0x2 : QEI_CTL_VELDIV_4
QEI clock /4
0x3 : QEI_CTL_VELDIV_8
QEI clock /8
0x4 : QEI_CTL_VELDIV_16
QEI clock /16
0x5 : QEI_CTL_VELDIV_32
QEI clock /32
0x6 : QEI_CTL_VELDIV_64
QEI clock /64
0x7 : QEI_CTL_VELDIV_128
QEI clock /128
End of enumeration elements list.
QEI_CTL_INVA : Invert PhA
bits : 9 - 18 (10 bit)
QEI_CTL_INVB : Invert PhB
bits : 10 - 20 (11 bit)
QEI_CTL_INVI : Invert Index Pulse
bits : 11 - 22 (12 bit)
QEI_CTL_STALLEN : Stall QEI
bits : 12 - 24 (13 bit)
QEI_CTL_FILTEN : Enable Input Filter
bits : 13 - 26 (14 bit)
QEI_CTL_FILTCNT : Input Filter Prescale Count
bits : 16 - 35 (20 bit)
QEI Timer Load
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_LOAD : Velocity Timer Load Value
bits : 0 - 31 (32 bit)
QEI Timer Load
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_LOAD : Velocity Timer Load Value
bits : 0 - 31 (32 bit)
QEI Timer
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_TIME : Velocity Timer Current Value
bits : 0 - 31 (32 bit)
QEI Timer
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_TIME : Velocity Timer Current Value
bits : 0 - 31 (32 bit)
QEI Velocity Counter
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_COUNT : Velocity Pulse Count
bits : 0 - 31 (32 bit)
QEI Velocity Counter
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_COUNT : Velocity Pulse Count
bits : 0 - 31 (32 bit)
QEI Velocity
address_offset : 0x1C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_SPEED : Velocity
bits : 0 - 31 (32 bit)
QEI Velocity
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_SPEED : Velocity
bits : 0 - 31 (32 bit)
QEI Interrupt Enable
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_INTEN_INDEX : Index Pulse Detected Interrupt Enable
bits : 0 - 0 (1 bit)
QEI_INTEN_TIMER : Timer Expires Interrupt Enable
bits : 1 - 2 (2 bit)
QEI_INTEN_DIR : Direction Change Interrupt Enable
bits : 2 - 4 (3 bit)
QEI_INTEN_ERROR : Phase Error Interrupt Enable
bits : 3 - 6 (4 bit)
QEI Interrupt Enable
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_INTEN_INDEX : Index Pulse Detected Interrupt Enable
bits : 0 - 0 (1 bit)
QEI_INTEN_TIMER : Timer Expires Interrupt Enable
bits : 1 - 2 (2 bit)
QEI_INTEN_DIR : Direction Change Interrupt Enable
bits : 2 - 4 (3 bit)
QEI_INTEN_ERROR : Phase Error Interrupt Enable
bits : 3 - 6 (4 bit)
QEI Raw Interrupt Status
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_RIS_INDEX : Index Pulse Asserted
bits : 0 - 0 (1 bit)
QEI_RIS_TIMER : Velocity Timer Expired
bits : 1 - 2 (2 bit)
QEI_RIS_DIR : Direction Change Detected
bits : 2 - 4 (3 bit)
QEI_RIS_ERROR : Phase Error Detected
bits : 3 - 6 (4 bit)
QEI Raw Interrupt Status
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_RIS_INDEX : Index Pulse Asserted
bits : 0 - 0 (1 bit)
QEI_RIS_TIMER : Velocity Timer Expired
bits : 1 - 2 (2 bit)
QEI_RIS_DIR : Direction Change Detected
bits : 2 - 4 (3 bit)
QEI_RIS_ERROR : Phase Error Detected
bits : 3 - 6 (4 bit)
QEI Interrupt Status and Clear
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_ISC_INDEX : Index Pulse Interrupt
bits : 0 - 0 (1 bit)
QEI_ISC_TIMER : Velocity Timer Expired Interrupt
bits : 1 - 2 (2 bit)
QEI_ISC_DIR : Direction Change Interrupt
bits : 2 - 4 (3 bit)
QEI_ISC_ERROR : Phase Error Interrupt
bits : 3 - 6 (4 bit)
QEI Interrupt Status and Clear
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_ISC_INDEX : Index Pulse Interrupt
bits : 0 - 0 (1 bit)
QEI_ISC_TIMER : Velocity Timer Expired Interrupt
bits : 1 - 2 (2 bit)
QEI_ISC_DIR : Direction Change Interrupt
bits : 2 - 4 (3 bit)
QEI_ISC_ERROR : Phase Error Interrupt
bits : 3 - 6 (4 bit)
QEI Status
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_STAT_ERROR : Error Detected
bits : 0 - 0 (1 bit)
QEI_STAT_DIRECTION : Direction of Rotation
bits : 1 - 2 (2 bit)
QEI Status
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_STAT_ERROR : Error Detected
bits : 0 - 0 (1 bit)
QEI_STAT_DIRECTION : Direction of Rotation
bits : 1 - 2 (2 bit)
QEI Position
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_POS : Current Position Integrator Value
bits : 0 - 31 (32 bit)
QEI Position
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_POS : Current Position Integrator Value
bits : 0 - 31 (32 bit)
QEI Maximum Position
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_MAXPOS : Maximum Position Integrator Value
bits : 0 - 31 (32 bit)
QEI Maximum Position
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
QEI_MAXPOS : Maximum Position Integrator Value
bits : 0 - 31 (32 bit)
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