\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
Watchdog Load
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_LOAD : Watchdog Load Value
bits : 0 - 31 (32 bit)
Watchdog Load
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_LOAD : Watchdog Load Value
bits : 0 - 31 (32 bit)
Watchdog Raw Interrupt Status
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_RIS_WDTRIS : Watchdog Raw Interrupt Status
bits : 0 - 0 (1 bit)
Watchdog Raw Interrupt Status
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_RIS_WDTRIS : Watchdog Raw Interrupt Status
bits : 0 - 0 (1 bit)
Watchdog Masked Interrupt Status
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_MIS_WDTMIS : Watchdog Masked Interrupt Status
bits : 0 - 0 (1 bit)
Watchdog Masked Interrupt Status
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_MIS_WDTMIS : Watchdog Masked Interrupt Status
bits : 0 - 0 (1 bit)
Watchdog Value
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_VALUE : Watchdog Value
bits : 0 - 31 (32 bit)
Watchdog Value
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_VALUE : Watchdog Value
bits : 0 - 31 (32 bit)
Watchdog Test
address_offset : 0x418 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_TEST_STALL : Watchdog Stall Enable
bits : 8 - 16 (9 bit)
Watchdog Test
address_offset : 0x418 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_TEST_STALL : Watchdog Stall Enable
bits : 8 - 16 (9 bit)
Watchdog Control
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_CTL_INTEN : Watchdog Interrupt Enable
bits : 0 - 0 (1 bit)
WDT_CTL_RESEN : Watchdog Reset Enable
bits : 1 - 2 (2 bit)
WDT_CTL_INTTYPE : Watchdog Interrupt Type
bits : 2 - 4 (3 bit)
WDT_CTL_WRC : Write Complete
bits : 31 - 62 (32 bit)
Watchdog Control
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_CTL_INTEN : Watchdog Interrupt Enable
bits : 0 - 0 (1 bit)
WDT_CTL_RESEN : Watchdog Reset Enable
bits : 1 - 2 (2 bit)
WDT_CTL_INTTYPE : Watchdog Interrupt Type
bits : 2 - 4 (3 bit)
WDT_CTL_WRC : Write Complete
bits : 31 - 62 (32 bit)
Watchdog Interrupt Clear
address_offset : 0xC Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
WDT_ICR : Watchdog Interrupt Clear
bits : 0 - 31 (32 bit)
access : write-only
Watchdog Interrupt Clear
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
WDT_ICR : Watchdog Interrupt Clear
bits : 0 - 31 (32 bit)
access : write-only
Watchdog Lock
address_offset : 0xC00 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_LOCK : Watchdog Lock
bits : 0 - 31 (32 bit)
Enumeration:
0x0 : WDT_LOCK_UNLOCKED
Unlocked
0x1 : WDT_LOCK_LOCKED
Locked
End of enumeration elements list.
Watchdog Lock
address_offset : 0xC00 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDT_LOCK : Watchdog Lock
bits : 0 - 31 (32 bit)
Enumeration:
0x0 : WDT_LOCK_UNLOCKED
Unlocked
0x1 : WDT_LOCK_LOCKED
Locked
End of enumeration elements list.
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