\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
UART Data
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_DR_DATA : Data Transmitted or Received
bits : 0 - 7 (8 bit)
UART_DR_FE : UART Framing Error
bits : 8 - 16 (9 bit)
UART_DR_PE : UART Parity Error
bits : 9 - 18 (10 bit)
UART_DR_BE : UART Break Error
bits : 10 - 20 (11 bit)
UART_DR_OE : UART Overrun Error
bits : 11 - 22 (12 bit)
UART Data
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_DR_DATA : Data Transmitted or Received
bits : 0 - 7 (8 bit)
UART_DR_FE : UART Framing Error
bits : 8 - 16 (9 bit)
UART_DR_PE : UART Parity Error
bits : 9 - 18 (10 bit)
UART_DR_BE : UART Break Error
bits : 10 - 20 (11 bit)
UART_DR_OE : UART Overrun Error
bits : 11 - 22 (12 bit)
UART Flag
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_FR_CTS : Clear To Send
bits : 0 - 0 (1 bit)
UART_FR_DSR : Data Set Ready
bits : 1 - 2 (2 bit)
UART_FR_DCD : Data Carrier Detect
bits : 2 - 4 (3 bit)
UART_FR_BUSY : UART Busy
bits : 3 - 6 (4 bit)
UART_FR_RXFE : UART Receive FIFO Empty
bits : 4 - 8 (5 bit)
UART_FR_TXFF : UART Transmit FIFO Full
bits : 5 - 10 (6 bit)
UART_FR_RXFF : UART Receive FIFO Full
bits : 6 - 12 (7 bit)
UART_FR_TXFE : UART Transmit FIFO Empty
bits : 7 - 14 (8 bit)
UART_FR_RI : Ring Indicator
bits : 8 - 16 (9 bit)
UART Flag
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_FR_CTS : Clear To Send
bits : 0 - 0 (1 bit)
UART_FR_DSR : Data Set Ready
bits : 1 - 2 (2 bit)
UART_FR_DCD : Data Carrier Detect
bits : 2 - 4 (3 bit)
UART_FR_BUSY : UART Busy
bits : 3 - 6 (4 bit)
UART_FR_RXFE : UART Receive FIFO Empty
bits : 4 - 8 (5 bit)
UART_FR_TXFF : UART Transmit FIFO Full
bits : 5 - 10 (6 bit)
UART_FR_RXFF : UART Receive FIFO Full
bits : 6 - 12 (7 bit)
UART_FR_TXFE : UART Transmit FIFO Empty
bits : 7 - 14 (8 bit)
UART_FR_RI : Ring Indicator
bits : 8 - 16 (9 bit)
UART IrDA Low-Power Register
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_ILPR_ILPDVSR : IrDA Low-Power Divisor
bits : 0 - 7 (8 bit)
UART IrDA Low-Power Register
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_ILPR_ILPDVSR : IrDA Low-Power Divisor
bits : 0 - 7 (8 bit)
UART Integer Baud-Rate Divisor
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_IBRD_DIVINT : Integer Baud-Rate Divisor
bits : 0 - 15 (16 bit)
UART Integer Baud-Rate Divisor
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_IBRD_DIVINT : Integer Baud-Rate Divisor
bits : 0 - 15 (16 bit)
UART Fractional Baud-Rate Divisor
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_FBRD_DIVFRAC : Fractional Baud-Rate Divisor
bits : 0 - 5 (6 bit)
UART Fractional Baud-Rate Divisor
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_FBRD_DIVFRAC : Fractional Baud-Rate Divisor
bits : 0 - 5 (6 bit)
UART Line Control
address_offset : 0x2C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_LCRH_BRK : UART Send Break
bits : 0 - 0 (1 bit)
UART_LCRH_PEN : UART Parity Enable
bits : 1 - 2 (2 bit)
UART_LCRH_EPS : UART Even Parity Select
bits : 2 - 4 (3 bit)
UART_LCRH_STP2 : UART Two Stop Bits Select
bits : 3 - 6 (4 bit)
UART_LCRH_FEN : UART Enable FIFOs
bits : 4 - 8 (5 bit)
UART_LCRH_WLEN : UART Word Length
bits : 5 - 11 (7 bit)
Enumeration:
0x0 : UART_LCRH_WLEN_5
5 bits (default)
0x1 : UART_LCRH_WLEN_6
6 bits
0x2 : UART_LCRH_WLEN_7
7 bits
0x3 : UART_LCRH_WLEN_8
8 bits
End of enumeration elements list.
UART_LCRH_SPS : UART Stick Parity Select
bits : 7 - 14 (8 bit)
UART Line Control
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_LCRH_BRK : UART Send Break
bits : 0 - 0 (1 bit)
UART_LCRH_PEN : UART Parity Enable
bits : 1 - 2 (2 bit)
UART_LCRH_EPS : UART Even Parity Select
bits : 2 - 4 (3 bit)
UART_LCRH_STP2 : UART Two Stop Bits Select
bits : 3 - 6 (4 bit)
UART_LCRH_FEN : UART Enable FIFOs
bits : 4 - 8 (5 bit)
UART_LCRH_WLEN : UART Word Length
bits : 5 - 11 (7 bit)
Enumeration:
0x0 : UART_LCRH_WLEN_5
5 bits (default)
0x1 : UART_LCRH_WLEN_6
6 bits
0x2 : UART_LCRH_WLEN_7
7 bits
0x3 : UART_LCRH_WLEN_8
8 bits
End of enumeration elements list.
UART_LCRH_SPS : UART Stick Parity Select
bits : 7 - 14 (8 bit)
UART Control
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_CTL_UARTEN : UART Enable
bits : 0 - 0 (1 bit)
UART_CTL_SIREN : UART SIR Enable
bits : 1 - 2 (2 bit)
UART_CTL_SIRLP : UART SIR Low-Power Mode
bits : 2 - 4 (3 bit)
UART_CTL_SMART : ISO 7816 Smart Card Support
bits : 3 - 6 (4 bit)
UART_CTL_EOT : End of Transmission
bits : 4 - 8 (5 bit)
UART_CTL_HSE : High-Speed Enable
bits : 5 - 10 (6 bit)
UART_CTL_LIN : LIN Mode Enable
bits : 6 - 12 (7 bit)
UART_CTL_LBE : UART Loop Back Enable
bits : 7 - 14 (8 bit)
UART_CTL_TXE : UART Transmit Enable
bits : 8 - 16 (9 bit)
UART_CTL_RXE : UART Receive Enable
bits : 9 - 18 (10 bit)
UART_CTL_DTR : Data Terminal Ready
bits : 10 - 20 (11 bit)
UART_CTL_RTS : Request to Send
bits : 11 - 22 (12 bit)
UART_CTL_RTSEN : Enable Request to Send
bits : 14 - 28 (15 bit)
UART_CTL_CTSEN : Enable Clear To Send
bits : 15 - 30 (16 bit)
UART Control
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_CTL_UARTEN : UART Enable
bits : 0 - 0 (1 bit)
UART_CTL_SIREN : UART SIR Enable
bits : 1 - 2 (2 bit)
UART_CTL_SIRLP : UART SIR Low-Power Mode
bits : 2 - 4 (3 bit)
UART_CTL_SMART : ISO 7816 Smart Card Support
bits : 3 - 6 (4 bit)
UART_CTL_EOT : End of Transmission
bits : 4 - 8 (5 bit)
UART_CTL_HSE : High-Speed Enable
bits : 5 - 10 (6 bit)
UART_CTL_LIN : LIN Mode Enable
bits : 6 - 12 (7 bit)
UART_CTL_LBE : UART Loop Back Enable
bits : 7 - 14 (8 bit)
UART_CTL_TXE : UART Transmit Enable
bits : 8 - 16 (9 bit)
UART_CTL_RXE : UART Receive Enable
bits : 9 - 18 (10 bit)
UART_CTL_DTR : Data Terminal Ready
bits : 10 - 20 (11 bit)
UART_CTL_RTS : Request to Send
bits : 11 - 22 (12 bit)
UART_CTL_RTSEN : Enable Request to Send
bits : 14 - 28 (15 bit)
UART_CTL_CTSEN : Enable Clear To Send
bits : 15 - 30 (16 bit)
UART Interrupt FIFO Level Select
address_offset : 0x34 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_IFLS_TX : UART Transmit Interrupt FIFO Level Select
bits : 0 - 2 (3 bit)
Enumeration:
0x0 : UART_IFLS_TX1_8
TX FIFO <= 1/8 full
0x1 : UART_IFLS_TX2_8
TX FIFO <= 1/4 full
0x2 : UART_IFLS_TX4_8
TX FIFO <= 1/2 full (default)
0x3 : UART_IFLS_TX6_8
TX FIFO <= 3/4 full
0x4 : UART_IFLS_TX7_8
TX FIFO <= 7/8 full
End of enumeration elements list.
UART_IFLS_RX : UART Receive Interrupt FIFO Level Select
bits : 3 - 8 (6 bit)
Enumeration:
0x0 : UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x1 : UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x2 : UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x3 : UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x4 : UART_IFLS_RX7_8
RX FIFO >= 7/8 full
End of enumeration elements list.
UART Interrupt FIFO Level Select
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_IFLS_TX : UART Transmit Interrupt FIFO Level Select
bits : 0 - 2 (3 bit)
Enumeration:
0x0 : UART_IFLS_TX1_8
TX FIFO and lt = 1/8 full
0x1 : UART_IFLS_TX2_8
TX FIFO and lt = 1/4 full
0x2 : UART_IFLS_TX4_8
TX FIFO and lt = 1/2 full (default)
0x3 : UART_IFLS_TX6_8
TX FIFO and lt = 3/4 full
0x4 : UART_IFLS_TX7_8
TX FIFO and lt = 7/8 full
End of enumeration elements list.
UART_IFLS_RX : UART Receive Interrupt FIFO Level Select
bits : 3 - 8 (6 bit)
Enumeration:
0x0 : UART_IFLS_RX1_8
RX FIFO >= 1/8 full
0x1 : UART_IFLS_RX2_8
RX FIFO >= 1/4 full
0x2 : UART_IFLS_RX4_8
RX FIFO >= 1/2 full (default)
0x3 : UART_IFLS_RX6_8
RX FIFO >= 3/4 full
0x4 : UART_IFLS_RX7_8
RX FIFO >= 7/8 full
End of enumeration elements list.
UART Interrupt Mask
address_offset : 0x38 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_IM_RIMIM : UART Ring Indicator Modem Interrupt Mask
bits : 0 - 0 (1 bit)
UART_IM_CTSMIM : UART Clear to Send Modem Interrupt Mask
bits : 1 - 2 (2 bit)
UART_IM_DCDMIM : UART Data Carrier Detect Modem Interrupt Mask
bits : 2 - 4 (3 bit)
UART_IM_DSRMIM : UART Data Set Ready Modem Interrupt Mask
bits : 3 - 6 (4 bit)
UART_IM_RXIM : UART Receive Interrupt Mask
bits : 4 - 8 (5 bit)
UART_IM_TXIM : UART Transmit Interrupt Mask
bits : 5 - 10 (6 bit)
UART_IM_RTIM : UART Receive Time-Out Interrupt Mask
bits : 6 - 12 (7 bit)
UART_IM_FEIM : UART Framing Error Interrupt Mask
bits : 7 - 14 (8 bit)
UART_IM_PEIM : UART Parity Error Interrupt Mask
bits : 8 - 16 (9 bit)
UART_IM_BEIM : UART Break Error Interrupt Mask
bits : 9 - 18 (10 bit)
UART_IM_OEIM : UART Overrun Error Interrupt Mask
bits : 10 - 20 (11 bit)
UART_IM_9BITIM : 9-Bit Mode Interrupt Mask
bits : 12 - 24 (13 bit)
UART_IM_LMSBIM : LIN Mode Sync Break Interrupt Mask
bits : 13 - 26 (14 bit)
UART_IM_LME1IM : LIN Mode Edge 1 Interrupt Mask
bits : 14 - 28 (15 bit)
UART_IM_LME5IM : LIN Mode Edge 5 Interrupt Mask
bits : 15 - 30 (16 bit)
UART Interrupt Mask
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_IM_RIMIM : UART Ring Indicator Modem Interrupt Mask
bits : 0 - 0 (1 bit)
UART_IM_CTSMIM : UART Clear to Send Modem Interrupt Mask
bits : 1 - 2 (2 bit)
UART_IM_DCDMIM : UART Data Carrier Detect Modem Interrupt Mask
bits : 2 - 4 (3 bit)
UART_IM_DSRMIM : UART Data Set Ready Modem Interrupt Mask
bits : 3 - 6 (4 bit)
UART_IM_RXIM : UART Receive Interrupt Mask
bits : 4 - 8 (5 bit)
UART_IM_TXIM : UART Transmit Interrupt Mask
bits : 5 - 10 (6 bit)
UART_IM_RTIM : UART Receive Time-Out Interrupt Mask
bits : 6 - 12 (7 bit)
UART_IM_FEIM : UART Framing Error Interrupt Mask
bits : 7 - 14 (8 bit)
UART_IM_PEIM : UART Parity Error Interrupt Mask
bits : 8 - 16 (9 bit)
UART_IM_BEIM : UART Break Error Interrupt Mask
bits : 9 - 18 (10 bit)
UART_IM_OEIM : UART Overrun Error Interrupt Mask
bits : 10 - 20 (11 bit)
UART_IM_9BITIM : 9-Bit Mode Interrupt Mask
bits : 12 - 24 (13 bit)
UART_IM_LMSBIM : LIN Mode Sync Break Interrupt Mask
bits : 13 - 26 (14 bit)
UART_IM_LME1IM : LIN Mode Edge 1 Interrupt Mask
bits : 14 - 28 (15 bit)
UART_IM_LME5IM : LIN Mode Edge 5 Interrupt Mask
bits : 15 - 30 (16 bit)
UART Raw Interrupt Status
address_offset : 0x3C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_RIS_RIRIS : UART Ring Indicator Modem Raw Interrupt Status
bits : 0 - 0 (1 bit)
UART_RIS_CTSRIS : UART Clear to Send Modem Raw Interrupt Status
bits : 1 - 2 (2 bit)
UART_RIS_DCDRIS : UART Data Carrier Detect Modem Raw Interrupt Status
bits : 2 - 4 (3 bit)
UART_RIS_DSRRIS : UART Data Set Ready Modem Raw Interrupt Status
bits : 3 - 6 (4 bit)
UART_RIS_RXRIS : UART Receive Raw Interrupt Status
bits : 4 - 8 (5 bit)
UART_RIS_TXRIS : UART Transmit Raw Interrupt Status
bits : 5 - 10 (6 bit)
UART_RIS_RTRIS : UART Receive Time-Out Raw Interrupt Status
bits : 6 - 12 (7 bit)
UART_RIS_FERIS : UART Framing Error Raw Interrupt Status
bits : 7 - 14 (8 bit)
UART_RIS_PERIS : UART Parity Error Raw Interrupt Status
bits : 8 - 16 (9 bit)
UART_RIS_BERIS : UART Break Error Raw Interrupt Status
bits : 9 - 18 (10 bit)
UART_RIS_OERIS : UART Overrun Error Raw Interrupt Status
bits : 10 - 20 (11 bit)
UART_RIS_9BITRIS : 9-Bit Mode Raw Interrupt Status
bits : 12 - 24 (13 bit)
UART_RIS_LMSBRIS : LIN Mode Sync Break Raw Interrupt Status
bits : 13 - 26 (14 bit)
UART_RIS_LME1RIS : LIN Mode Edge 1 Raw Interrupt Status
bits : 14 - 28 (15 bit)
UART_RIS_LME5RIS : LIN Mode Edge 5 Raw Interrupt Status
bits : 15 - 30 (16 bit)
UART Raw Interrupt Status
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_RIS_RIRIS : UART Ring Indicator Modem Raw Interrupt Status
bits : 0 - 0 (1 bit)
UART_RIS_CTSRIS : UART Clear to Send Modem Raw Interrupt Status
bits : 1 - 2 (2 bit)
UART_RIS_DCDRIS : UART Data Carrier Detect Modem Raw Interrupt Status
bits : 2 - 4 (3 bit)
UART_RIS_DSRRIS : UART Data Set Ready Modem Raw Interrupt Status
bits : 3 - 6 (4 bit)
UART_RIS_RXRIS : UART Receive Raw Interrupt Status
bits : 4 - 8 (5 bit)
UART_RIS_TXRIS : UART Transmit Raw Interrupt Status
bits : 5 - 10 (6 bit)
UART_RIS_RTRIS : UART Receive Time-Out Raw Interrupt Status
bits : 6 - 12 (7 bit)
UART_RIS_FERIS : UART Framing Error Raw Interrupt Status
bits : 7 - 14 (8 bit)
UART_RIS_PERIS : UART Parity Error Raw Interrupt Status
bits : 8 - 16 (9 bit)
UART_RIS_BERIS : UART Break Error Raw Interrupt Status
bits : 9 - 18 (10 bit)
UART_RIS_OERIS : UART Overrun Error Raw Interrupt Status
bits : 10 - 20 (11 bit)
UART_RIS_9BITRIS : 9-Bit Mode Raw Interrupt Status
bits : 12 - 24 (13 bit)
UART_RIS_LMSBRIS : LIN Mode Sync Break Raw Interrupt Status
bits : 13 - 26 (14 bit)
UART_RIS_LME1RIS : LIN Mode Edge 1 Raw Interrupt Status
bits : 14 - 28 (15 bit)
UART_RIS_LME5RIS : LIN Mode Edge 5 Raw Interrupt Status
bits : 15 - 30 (16 bit)
UART Receive Status/Error Clear
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_RSR_FE : UART Framing Error
bits : 0 - 0 (1 bit)
UART_RSR_PE : UART Parity Error
bits : 1 - 2 (2 bit)
UART_RSR_BE : UART Break Error
bits : 2 - 4 (3 bit)
UART_RSR_OE : UART Overrun Error
bits : 3 - 6 (4 bit)
UART Receive Status/Error Clear
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
alternate_register : UART_ALT
reset_Mask : 0x0
UART_ECR_DATA : Error Clear
bits : 0 - 7 (8 bit)
UART Receive Status/Error Clear
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_RSR_FE : UART Framing Error
bits : 0 - 0 (1 bit)
UART_RSR_PE : UART Parity Error
bits : 1 - 2 (2 bit)
UART_RSR_BE : UART Break Error
bits : 2 - 4 (3 bit)
UART_RSR_OE : UART Overrun Error
bits : 3 - 6 (4 bit)
UART Receive Status/Error Clear
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_ECR_DATA : Error Clear
bits : 0 - 7 (8 bit)
UART Masked Interrupt Status
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_MIS_RIMIS : UART Ring Indicator Modem Masked Interrupt Status
bits : 0 - 0 (1 bit)
UART_MIS_CTSMIS : UART Clear to Send Modem Masked Interrupt Status
bits : 1 - 2 (2 bit)
UART_MIS_DCDMIS : UART Data Carrier Detect Modem Masked Interrupt Status
bits : 2 - 4 (3 bit)
UART_MIS_DSRMIS : UART Data Set Ready Modem Masked Interrupt Status
bits : 3 - 6 (4 bit)
UART_MIS_RXMIS : UART Receive Masked Interrupt Status
bits : 4 - 8 (5 bit)
UART_MIS_TXMIS : UART Transmit Masked Interrupt Status
bits : 5 - 10 (6 bit)
UART_MIS_RTMIS : UART Receive Time-Out Masked Interrupt Status
bits : 6 - 12 (7 bit)
UART_MIS_FEMIS : UART Framing Error Masked Interrupt Status
bits : 7 - 14 (8 bit)
UART_MIS_PEMIS : UART Parity Error Masked Interrupt Status
bits : 8 - 16 (9 bit)
UART_MIS_BEMIS : UART Break Error Masked Interrupt Status
bits : 9 - 18 (10 bit)
UART_MIS_OEMIS : UART Overrun Error Masked Interrupt Status
bits : 10 - 20 (11 bit)
UART_MIS_9BITMIS : 9-Bit Mode Masked Interrupt Status
bits : 12 - 24 (13 bit)
UART_MIS_LMSBMIS : LIN Mode Sync Break Masked Interrupt Status
bits : 13 - 26 (14 bit)
UART_MIS_LME1MIS : LIN Mode Edge 1 Masked Interrupt Status
bits : 14 - 28 (15 bit)
UART_MIS_LME5MIS : LIN Mode Edge 5 Masked Interrupt Status
bits : 15 - 30 (16 bit)
UART Masked Interrupt Status
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_MIS_RIMIS : UART Ring Indicator Modem Masked Interrupt Status
bits : 0 - 0 (1 bit)
UART_MIS_CTSMIS : UART Clear to Send Modem Masked Interrupt Status
bits : 1 - 2 (2 bit)
UART_MIS_DCDMIS : UART Data Carrier Detect Modem Masked Interrupt Status
bits : 2 - 4 (3 bit)
UART_MIS_DSRMIS : UART Data Set Ready Modem Masked Interrupt Status
bits : 3 - 6 (4 bit)
UART_MIS_RXMIS : UART Receive Masked Interrupt Status
bits : 4 - 8 (5 bit)
UART_MIS_TXMIS : UART Transmit Masked Interrupt Status
bits : 5 - 10 (6 bit)
UART_MIS_RTMIS : UART Receive Time-Out Masked Interrupt Status
bits : 6 - 12 (7 bit)
UART_MIS_FEMIS : UART Framing Error Masked Interrupt Status
bits : 7 - 14 (8 bit)
UART_MIS_PEMIS : UART Parity Error Masked Interrupt Status
bits : 8 - 16 (9 bit)
UART_MIS_BEMIS : UART Break Error Masked Interrupt Status
bits : 9 - 18 (10 bit)
UART_MIS_OEMIS : UART Overrun Error Masked Interrupt Status
bits : 10 - 20 (11 bit)
UART_MIS_9BITMIS : 9-Bit Mode Masked Interrupt Status
bits : 12 - 24 (13 bit)
UART_MIS_LMSBMIS : LIN Mode Sync Break Masked Interrupt Status
bits : 13 - 26 (14 bit)
UART_MIS_LME1MIS : LIN Mode Edge 1 Masked Interrupt Status
bits : 14 - 28 (15 bit)
UART_MIS_LME5MIS : LIN Mode Edge 5 Masked Interrupt Status
bits : 15 - 30 (16 bit)
UART Interrupt Clear
address_offset : 0x44 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
UART_ICR_RIMIC : UART Ring Indicator Modem Interrupt Clear
bits : 0 - 0 (1 bit)
access : write-only
UART_ICR_CTSMIC : UART Clear to Send Modem Interrupt Clear
bits : 1 - 2 (2 bit)
access : write-only
UART_ICR_DCDMIC : UART Data Carrier Detect Modem Interrupt Clear
bits : 2 - 4 (3 bit)
access : write-only
UART_ICR_DSRMIC : UART Data Set Ready Modem Interrupt Clear
bits : 3 - 6 (4 bit)
access : write-only
UART_ICR_RXIC : Receive Interrupt Clear
bits : 4 - 8 (5 bit)
access : write-only
UART_ICR_TXIC : Transmit Interrupt Clear
bits : 5 - 10 (6 bit)
access : write-only
UART_ICR_RTIC : Receive Time-Out Interrupt Clear
bits : 6 - 12 (7 bit)
access : write-only
UART_ICR_FEIC : Framing Error Interrupt Clear
bits : 7 - 14 (8 bit)
access : write-only
UART_ICR_PEIC : Parity Error Interrupt Clear
bits : 8 - 16 (9 bit)
access : write-only
UART_ICR_BEIC : Break Error Interrupt Clear
bits : 9 - 18 (10 bit)
access : write-only
UART_ICR_OEIC : Overrun Error Interrupt Clear
bits : 10 - 20 (11 bit)
access : write-only
UART_ICR_9BITIC : 9-Bit Mode Interrupt Clear
bits : 12 - 24 (13 bit)
access : write-only
UART_ICR_LMSBIC : LIN Mode Sync Break Interrupt Clear
bits : 13 - 26 (14 bit)
access : write-only
UART_ICR_LME1IC : LIN Mode Edge 1 Interrupt Clear
bits : 14 - 28 (15 bit)
access : write-only
UART_ICR_LME5IC : LIN Mode Edge 5 Interrupt Clear
bits : 15 - 30 (16 bit)
access : write-only
UART Interrupt Clear
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
UART_ICR_RIMIC : UART Ring Indicator Modem Interrupt Clear
bits : 0 - 0 (1 bit)
access : write-only
UART_ICR_CTSMIC : UART Clear to Send Modem Interrupt Clear
bits : 1 - 2 (2 bit)
access : write-only
UART_ICR_DCDMIC : UART Data Carrier Detect Modem Interrupt Clear
bits : 2 - 4 (3 bit)
access : write-only
UART_ICR_DSRMIC : UART Data Set Ready Modem Interrupt Clear
bits : 3 - 6 (4 bit)
access : write-only
UART_ICR_RXIC : Receive Interrupt Clear
bits : 4 - 8 (5 bit)
access : write-only
UART_ICR_TXIC : Transmit Interrupt Clear
bits : 5 - 10 (6 bit)
access : write-only
UART_ICR_RTIC : Receive Time-Out Interrupt Clear
bits : 6 - 12 (7 bit)
access : write-only
UART_ICR_FEIC : Framing Error Interrupt Clear
bits : 7 - 14 (8 bit)
access : write-only
UART_ICR_PEIC : Parity Error Interrupt Clear
bits : 8 - 16 (9 bit)
access : write-only
UART_ICR_BEIC : Break Error Interrupt Clear
bits : 9 - 18 (10 bit)
access : write-only
UART_ICR_OEIC : Overrun Error Interrupt Clear
bits : 10 - 20 (11 bit)
access : write-only
UART_ICR_9BITIC : 9-Bit Mode Interrupt Clear
bits : 12 - 24 (13 bit)
access : write-only
UART_ICR_LMSBIC : LIN Mode Sync Break Interrupt Clear
bits : 13 - 26 (14 bit)
access : write-only
UART_ICR_LME1IC : LIN Mode Edge 1 Interrupt Clear
bits : 14 - 28 (15 bit)
access : write-only
UART_ICR_LME5IC : LIN Mode Edge 5 Interrupt Clear
bits : 15 - 30 (16 bit)
access : write-only
UART DMA Control
address_offset : 0x48 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_DMACTL_RXDMAE : Receive DMA Enable
bits : 0 - 0 (1 bit)
UART_DMACTL_TXDMAE : Transmit DMA Enable
bits : 1 - 2 (2 bit)
UART_DMACTL_DMAERR : DMA on Error
bits : 2 - 4 (3 bit)
UART DMA Control
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_DMACTL_RXDMAE : Receive DMA Enable
bits : 0 - 0 (1 bit)
UART_DMACTL_TXDMAE : Transmit DMA Enable
bits : 1 - 2 (2 bit)
UART_DMACTL_DMAERR : DMA on Error
bits : 2 - 4 (3 bit)
UART LIN Control
address_offset : 0x90 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_LCTL_MASTER : LIN Master Enable
bits : 0 - 0 (1 bit)
UART_LCTL_BLEN : Sync Break Length
bits : 4 - 9 (6 bit)
Enumeration:
0x0 : UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x1 : UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x2 : UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x3 : UART_LCTL_BLEN_16T
Sync break length is 16T bits
End of enumeration elements list.
UART LIN Control
address_offset : 0x90 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_LCTL_MASTER : LIN Master Enable
bits : 0 - 0 (1 bit)
UART_LCTL_BLEN : Sync Break Length
bits : 4 - 9 (6 bit)
Enumeration:
0x0 : UART_LCTL_BLEN_13T
Sync break length is 13T bits (default)
0x1 : UART_LCTL_BLEN_14T
Sync break length is 14T bits
0x2 : UART_LCTL_BLEN_15T
Sync break length is 15T bits
0x3 : UART_LCTL_BLEN_16T
Sync break length is 16T bits
End of enumeration elements list.
UART LIN Snap Shot
address_offset : 0x94 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_LSS_TSS : Timer Snap Shot
bits : 0 - 15 (16 bit)
UART LIN Snap Shot
address_offset : 0x94 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_LSS_TSS : Timer Snap Shot
bits : 0 - 15 (16 bit)
UART LIN Timer
address_offset : 0x98 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_LTIM_TIMER : Timer Value
bits : 0 - 15 (16 bit)
UART LIN Timer
address_offset : 0x98 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_LTIM_TIMER : Timer Value
bits : 0 - 15 (16 bit)
UART 9-Bit Self Address
address_offset : 0xA4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_9BITADDR_ADDR : Self Address for 9-Bit Mode
bits : 0 - 7 (8 bit)
UART_9BITADDR_9BITEN : Enable 9-Bit Mode
bits : 15 - 30 (16 bit)
UART 9-Bit Self Address
address_offset : 0xA4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_9BITADDR_ADDR : Self Address for 9-Bit Mode
bits : 0 - 7 (8 bit)
UART_9BITADDR_9BITEN : Enable 9-Bit Mode
bits : 15 - 30 (16 bit)
UART 9-Bit Self Address Mask
address_offset : 0xA8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_9BITAMASK_MASK : Self Address Mask for 9-Bit Mode
bits : 0 - 7 (8 bit)
UART_9BITAMASK_RANGE : Self Address Range for 9-Bit Mode
bits : 8 - 23 (16 bit)
UART 9-Bit Self Address Mask
address_offset : 0xA8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_9BITAMASK_MASK : Self Address Mask for 9-Bit Mode
bits : 0 - 7 (8 bit)
UART_9BITAMASK_RANGE : Self Address Range for 9-Bit Mode
bits : 8 - 23 (16 bit)
UART Peripheral Properties
address_offset : 0xFC0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_PP_SC : Smart Card Support
bits : 0 - 0 (1 bit)
UART_PP_NB : 9-Bit Support
bits : 1 - 2 (2 bit)
UART Peripheral Properties
address_offset : 0xFC0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_PP_SC : Smart Card Support
bits : 0 - 0 (1 bit)
UART_PP_NB : 9-Bit Support
bits : 1 - 2 (2 bit)
UART Clock Configuration
address_offset : 0xFC8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_CC_CS : UART Baud Clock Source
bits : 0 - 3 (4 bit)
Enumeration:
0x0 : UART_CC_CS_SYSCLK
The system clock (default)
0x1 : UART_CC_CS_PIOSC
PIOSC
End of enumeration elements list.
UART Clock Configuration
address_offset : 0xFC8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UART_CC_CS : UART Baud Clock Source
bits : 0 - 3 (4 bit)
Enumeration:
0x0 : UART_CC_CS_SYSCLK
The system clock (default)
0x1 : UART_CC_CS_PIOSC
PIOSC
End of enumeration elements list.
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