\n
address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection : not protected
AES Key 2_6
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_6_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 2_6
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_6_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 2_2
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_2_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 2_2
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_2_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 2_3
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_3_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 2_3
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_3_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 2_0
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_0_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 2_0
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_0_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 2_1
address_offset : 0x1C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_1_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 2_1
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_1_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_6
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_6_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_6
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_6_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_7
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_7_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_7
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_7_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_4
address_offset : 0x28 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_4_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_4
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_4_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_5
address_offset : 0x2C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_5_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_5
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_5_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_2
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_2_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_2
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_2_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_3
address_offset : 0x34 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_3_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_3
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_3_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_0
address_offset : 0x38 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_0_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_0
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_0_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_1
address_offset : 0x3C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_1_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 1_1
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY1_1_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 2_7
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_7_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 2_7
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_7_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Initialization Vector Input 0
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IV_IN_0_DATA : Initialization Vector Input
bits : 0 - 31 (32 bit)
AES Initialization Vector Input 0
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IV_IN_0_DATA : Initialization Vector Input
bits : 0 - 31 (32 bit)
AES Initialization Vector Input 1
address_offset : 0x44 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IV_IN_1_DATA : Initialization Vector Input
bits : 0 - 31 (32 bit)
AES Initialization Vector Input 1
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IV_IN_1_DATA : Initialization Vector Input
bits : 0 - 31 (32 bit)
AES Initialization Vector Input 2
address_offset : 0x48 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IV_IN_2_DATA : Initialization Vector Input
bits : 0 - 31 (32 bit)
AES Initialization Vector Input 2
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IV_IN_2_DATA : Initialization Vector Input
bits : 0 - 31 (32 bit)
AES Initialization Vector Input 3
address_offset : 0x4C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IV_IN_3_DATA : Initialization Vector Input
bits : 0 - 31 (32 bit)
AES Initialization Vector Input 3
address_offset : 0x4C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IV_IN_3_DATA : Initialization Vector Input
bits : 0 - 31 (32 bit)
AES Control
address_offset : 0x50 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_CTRL_OUTPUT_READY : Output Ready Status
bits : 0 - 0 (1 bit)
AES_CTRL_INPUT_READY : Input Ready Status
bits : 1 - 2 (2 bit)
AES_CTRL_DIRECTION : Encryption/Decryption Selection
bits : 2 - 4 (3 bit)
AES_CTRL_KEY_SIZE : Key Size
bits : 3 - 7 (5 bit)
Enumeration:
0x1 : AES_CTRL_KEY_SIZE_128
Key is 128 bits
0x2 : AES_CTRL_KEY_SIZE_192
Key is 192 bits
0x3 : AES_CTRL_KEY_SIZE_256
Key is 256 bits
End of enumeration elements list.
AES_CTRL_MODE : ECB/CBC Mode
bits : 5 - 10 (6 bit)
AES_CTRL_CTR : Counter Mode
bits : 6 - 12 (7 bit)
AES_CTRL_CTR_WIDTH : AES-CTR Mode Counter Width
bits : 7 - 15 (9 bit)
Enumeration:
0x0 : AES_CTRL_CTR_WIDTH_32
Counter is 32 bits
0x1 : AES_CTRL_CTR_WIDTH_64
Counter is 64 bits
0x2 : AES_CTRL_CTR_WIDTH_96
Counter is 96 bits
0x3 : AES_CTRL_CTR_WIDTH_128
Counter is 128 bits
End of enumeration elements list.
AES_CTRL_ICM : AES Integer Counter Mode (ICM) Enable
bits : 9 - 18 (10 bit)
AES_CTRL_CFB : Full block AES cipher feedback mode (CFB128) Enable
bits : 10 - 20 (11 bit)
AES_CTRL_XTS : AES-XTS Operation Enabled
bits : 11 - 23 (13 bit)
Enumeration:
0x0 : AES_CTRL_XTS_NOP
No operation
0x1 : AES_CTRL_XTS_TWEAKJL
Previous/intermediate tweak value and j loaded (value is loaded via IV, j is loaded via the AAD length register)
0x2 : AES_CTRL_XTS_K2IJL
Key2, n and j are loaded (n is loaded via IV, j is loaded via the AAD length register)
0x3 : AES_CTRL_XTS_K2ILJ0
Key2 and n are loaded; j=0 (n is loaded via IV)
End of enumeration elements list.
AES_CTRL_F8 : AES f8 Mode Enable
bits : 13 - 26 (14 bit)
AES_CTRL_F9 : AES f9 Mode Enable
bits : 14 - 28 (15 bit)
AES_CTRL_CBCMAC : AES-CBC MAC Enable
bits : 15 - 30 (16 bit)
AES_CTRL_GCM : AES-GCM Mode Enable
bits : 16 - 33 (18 bit)
Enumeration:
0x0 : AES_CTRL_GCM_NOP
No operation
0x1 : AES_CTRL_GCM_HLY0ZERO
GHASH with H loaded and Y0-encrypted forced to zero
0x2 : AES_CTRL_GCM_HLY0CALC
GHASH with H loaded and Y0-encrypted calculated internally
0x3 : AES_CTRL_GCM_HY0CALC
Autonomous GHASH (both H and Y0-encrypted calculated internally)
End of enumeration elements list.
AES_CTRL_CCM : AES-CCM Mode Enable
bits : 18 - 36 (19 bit)
AES_CTRL_CCM_L : L Value
bits : 19 - 40 (22 bit)
Enumeration:
0x1 : AES_CTRL_CCM_L_2
width = 2
0x3 : AES_CTRL_CCM_L_4
width = 4
0x7 : AES_CTRL_CCM_L_8
width = 8
End of enumeration elements list.
AES_CTRL_CCM_M : Counter with CBC-MAC (CCM)
bits : 22 - 46 (25 bit)
AES_CTRL_SAVE_CONTEXT : TAG or Result IV Save
bits : 29 - 58 (30 bit)
AES_CTRL_SVCTXTRDY : AES TAG/IV Block(s) Ready
bits : 30 - 60 (31 bit)
AES_CTRL_CTXTRDY : Context Data Registers Ready
bits : 31 - 62 (32 bit)
AES Control
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_CTRL_OUTPUT_READY : Output Ready Status
bits : 0 - 0 (1 bit)
AES_CTRL_INPUT_READY : Input Ready Status
bits : 1 - 2 (2 bit)
AES_CTRL_DIRECTION : Encryption/Decryption Selection
bits : 2 - 4 (3 bit)
AES_CTRL_KEY_SIZE : Key Size
bits : 3 - 7 (5 bit)
Enumeration:
0x1 : AES_CTRL_KEY_SIZE_128
Key is 128 bits
0x2 : AES_CTRL_KEY_SIZE_192
Key is 192 bits
0x3 : AES_CTRL_KEY_SIZE_256
Key is 256 bits
End of enumeration elements list.
AES_CTRL_MODE : ECB/CBC Mode
bits : 5 - 10 (6 bit)
AES_CTRL_CTR : Counter Mode
bits : 6 - 12 (7 bit)
AES_CTRL_CTR_WIDTH : AES-CTR Mode Counter Width
bits : 7 - 15 (9 bit)
Enumeration:
0x0 : AES_CTRL_CTR_WIDTH_32
Counter is 32 bits
0x1 : AES_CTRL_CTR_WIDTH_64
Counter is 64 bits
0x2 : AES_CTRL_CTR_WIDTH_96
Counter is 96 bits
0x3 : AES_CTRL_CTR_WIDTH_128
Counter is 128 bits
End of enumeration elements list.
AES_CTRL_ICM : AES Integer Counter Mode (ICM) Enable
bits : 9 - 18 (10 bit)
AES_CTRL_CFB : Full block AES cipher feedback mode (CFB128) Enable
bits : 10 - 20 (11 bit)
AES_CTRL_XTS : AES-XTS Operation Enabled
bits : 11 - 23 (13 bit)
Enumeration:
0x0 : AES_CTRL_XTS_NOP
No operation
0x1 : AES_CTRL_XTS_TWEAKJL
Previous/intermediate tweak value and j loaded (value is loaded via IV, j is loaded via the AAD length register)
0x2 : AES_CTRL_XTS_K2IJL
Key2, n and j are loaded (n is loaded via IV, j is loaded via the AAD length register)
0x3 : AES_CTRL_XTS_K2ILJ0
Key2 and n are loaded j=0 (n is loaded via IV)
End of enumeration elements list.
AES_CTRL_F8 : AES f8 Mode Enable
bits : 13 - 26 (14 bit)
AES_CTRL_F9 : AES f9 Mode Enable
bits : 14 - 28 (15 bit)
AES_CTRL_CBCMAC : AES-CBC MAC Enable
bits : 15 - 30 (16 bit)
AES_CTRL_GCM : AES-GCM Mode Enable
bits : 16 - 33 (18 bit)
Enumeration:
0x0 : AES_CTRL_GCM_NOP
No operation
0x1 : AES_CTRL_GCM_HLY0ZERO
GHASH with H loaded and Y0-encrypted forced to zero
0x2 : AES_CTRL_GCM_HLY0CALC
GHASH with H loaded and Y0-encrypted calculated internally
0x3 : AES_CTRL_GCM_HY0CALC
Autonomous GHASH (both H and Y0-encrypted calculated internally)
End of enumeration elements list.
AES_CTRL_CCM : AES-CCM Mode Enable
bits : 18 - 36 (19 bit)
AES_CTRL_CCM_L : L Value
bits : 19 - 40 (22 bit)
Enumeration:
0x1 : AES_CTRL_CCM_L_2
width = 2
0x3 : AES_CTRL_CCM_L_4
width = 4
0x7 : AES_CTRL_CCM_L_8
width = 8
End of enumeration elements list.
AES_CTRL_CCM_M : Counter with CBC-MAC (CCM)
bits : 22 - 46 (25 bit)
AES_CTRL_SAVE_CONTEXT : TAG or Result IV Save
bits : 29 - 58 (30 bit)
AES_CTRL_SVCTXTRDY : AES TAG/IV Block(s) Ready
bits : 30 - 60 (31 bit)
AES_CTRL_CTXTRDY : Context Data Registers Ready
bits : 31 - 62 (32 bit)
AES Crypto Data Length 0
address_offset : 0x54 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_C_LENGTH_0_LENGTH : Data Length
bits : 0 - 31 (32 bit)
AES Crypto Data Length 0
address_offset : 0x54 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_C_LENGTH_0_LENGTH : Data Length
bits : 0 - 31 (32 bit)
AES Crypto Data Length 1
address_offset : 0x58 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_C_LENGTH_1_LENGTH : Data Length
bits : 0 - 31 (32 bit)
AES Crypto Data Length 1
address_offset : 0x58 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_C_LENGTH_1_LENGTH : Data Length
bits : 0 - 31 (32 bit)
AES Authentication Data Length
address_offset : 0x5C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_AUTH_LENGTH_AUTH : Authentication Data Length
bits : 0 - 31 (32 bit)
AES Authentication Data Length
address_offset : 0x5C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_AUTH_LENGTH_AUTH : Authentication Data Length
bits : 0 - 31 (32 bit)
AES Data RW Plaintext/Ciphertext 0
address_offset : 0x60 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_DATA_IN_0_DATA : Secure Data RW Plaintext/Ciphertext
bits : 0 - 31 (32 bit)
AES Data RW Plaintext/Ciphertext 0
address_offset : 0x60 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_DATA_IN_0_DATA : Secure Data RW Plaintext/Ciphertext
bits : 0 - 31 (32 bit)
AES Data RW Plaintext/Ciphertext 1
address_offset : 0x64 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_DATA_IN_1_DATA : Secure Data RW Plaintext/Ciphertext
bits : 0 - 31 (32 bit)
AES Data RW Plaintext/Ciphertext 1
address_offset : 0x64 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_DATA_IN_1_DATA : Secure Data RW Plaintext/Ciphertext
bits : 0 - 31 (32 bit)
AES Data RW Plaintext/Ciphertext 2
address_offset : 0x68 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_DATA_IN_2_DATA : Secure Data RW Plaintext/Ciphertext
bits : 0 - 31 (32 bit)
AES Data RW Plaintext/Ciphertext 2
address_offset : 0x68 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_DATA_IN_2_DATA : Secure Data RW Plaintext/Ciphertext
bits : 0 - 31 (32 bit)
AES Data RW Plaintext/Ciphertext 3
address_offset : 0x6C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_DATA_IN_3_DATA : Secure Data RW Plaintext/Ciphertext
bits : 0 - 31 (32 bit)
AES Data RW Plaintext/Ciphertext 3
address_offset : 0x6C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_DATA_IN_3_DATA : Secure Data RW Plaintext/Ciphertext
bits : 0 - 31 (32 bit)
AES Hash Tag Out 0
address_offset : 0x70 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_TAG_OUT_0_HASH : Hash Result
bits : 0 - 31 (32 bit)
AES Hash Tag Out 0
address_offset : 0x70 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_TAG_OUT_0_HASH : Hash Result
bits : 0 - 31 (32 bit)
AES Hash Tag Out 1
address_offset : 0x74 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_TAG_OUT_1_HASH : Hash Result
bits : 0 - 31 (32 bit)
AES Hash Tag Out 1
address_offset : 0x74 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_TAG_OUT_1_HASH : Hash Result
bits : 0 - 31 (32 bit)
AES Hash Tag Out 2
address_offset : 0x78 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_TAG_OUT_2_HASH : Hash Result
bits : 0 - 31 (32 bit)
AES Hash Tag Out 2
address_offset : 0x78 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_TAG_OUT_2_HASH : Hash Result
bits : 0 - 31 (32 bit)
AES Hash Tag Out 3
address_offset : 0x7C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_TAG_OUT_3_HASH : Hash Result
bits : 0 - 31 (32 bit)
AES Hash Tag Out 3
address_offset : 0x7C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_TAG_OUT_3_HASH : Hash Result
bits : 0 - 31 (32 bit)
AES Key 2_4
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_4_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 2_4
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_4_KEY : Key Data
bits : 0 - 31 (32 bit)
AES IP Revision Identifier
address_offset : 0x80 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_REVISION : Revision number
bits : 0 - 31 (32 bit)
AES IP Revision Identifier
address_offset : 0x80 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_REVISION : Revision number
bits : 0 - 31 (32 bit)
AES System Configuration
address_offset : 0x84 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_SYSCONFIG_SOFTRESET : Soft reset
bits : 1 - 2 (2 bit)
AES_SYSCONFIG_DMA_REQ_DATA_IN_EN : DMA Request Data In Enable
bits : 5 - 10 (6 bit)
AES_SYSCONFIG_DMA_REQ_DATA_OUT_EN : DMA Request Data Out Enable
bits : 6 - 12 (7 bit)
AES_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN : DMA Request Context In Enable
bits : 7 - 14 (8 bit)
AES_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN : DMA Request Context Out Enable
bits : 8 - 16 (9 bit)
AES_SYSCONFIG_MAP_CONTEXT_OUT_ON_DATA_OUT : Map Context Out on Data Out Enable
bits : 9 - 18 (10 bit)
AES_SYSCONFIG_KEYENC : Key Encoding
bits : 11 - 22 (12 bit)
AES_SYSCONFIG_K3 : K3 Select
bits : 12 - 24 (13 bit)
AES System Configuration
address_offset : 0x84 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_SYSCONFIG_SOFTRESET : Soft reset
bits : 1 - 2 (2 bit)
AES_SYSCONFIG_DMA_REQ_DATA_IN_EN : DMA Request Data In Enable
bits : 5 - 10 (6 bit)
AES_SYSCONFIG_DMA_REQ_DATA_OUT_EN : DMA Request Data Out Enable
bits : 6 - 12 (7 bit)
AES_SYSCONFIG_DMA_REQ_CONTEXT_IN_EN : DMA Request Context In Enable
bits : 7 - 14 (8 bit)
AES_SYSCONFIG_DMA_REQ_CONTEXT_OUT_EN : DMA Request Context Out Enable
bits : 8 - 16 (9 bit)
AES_SYSCONFIG_MAP_CONTEXT_OUT_ON_DATA_OUT : Map Context Out on Data Out Enable
bits : 9 - 18 (10 bit)
AES_SYSCONFIG_KEYENC : Key Encoding
bits : 11 - 22 (12 bit)
AES_SYSCONFIG_K3 : K3 Select
bits : 12 - 24 (13 bit)
AES System Status
address_offset : 0x88 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_SYSSTATUS_RESETDONE : Reset Done
bits : 0 - 0 (1 bit)
AES System Status
address_offset : 0x88 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_SYSSTATUS_RESETDONE : Reset Done
bits : 0 - 0 (1 bit)
AES Interrupt Status
address_offset : 0x8C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IRQSTATUS_CONTEXT_IN : Context In Interrupt Status
bits : 0 - 0 (1 bit)
AES_IRQSTATUS_DATA_IN : Data In Interrupt Status
bits : 1 - 2 (2 bit)
AES_IRQSTATUS_DATA_OUT : Data Out Interrupt Status
bits : 2 - 4 (3 bit)
AES_IRQSTATUS_CONTEXT_OUT : Context Output Interrupt Status
bits : 3 - 6 (4 bit)
AES Interrupt Status
address_offset : 0x8C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IRQSTATUS_CONTEXT_IN : Context In Interrupt Status
bits : 0 - 0 (1 bit)
AES_IRQSTATUS_DATA_IN : Data In Interrupt Status
bits : 1 - 2 (2 bit)
AES_IRQSTATUS_DATA_OUT : Data Out Interrupt Status
bits : 2 - 4 (3 bit)
AES_IRQSTATUS_CONTEXT_OUT : Context Output Interrupt Status
bits : 3 - 6 (4 bit)
AES Interrupt Enable
address_offset : 0x90 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IRQENABLE_CONTEXT_IN : Context In Interrupt Enable
bits : 0 - 0 (1 bit)
AES_IRQENABLE_DATA_IN : Data In Interrupt Enable
bits : 1 - 2 (2 bit)
AES_IRQENABLE_DATA_OUT : Data Out Interrupt Enable
bits : 2 - 4 (3 bit)
AES_IRQENABLE_CONTEXT_OUT : Context Out Interrupt Enable
bits : 3 - 6 (4 bit)
AES Interrupt Enable
address_offset : 0x90 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_IRQENABLE_CONTEXT_IN : Context In Interrupt Enable
bits : 0 - 0 (1 bit)
AES_IRQENABLE_DATA_IN : Data In Interrupt Enable
bits : 1 - 2 (2 bit)
AES_IRQENABLE_DATA_OUT : Data Out Interrupt Enable
bits : 2 - 4 (3 bit)
AES_IRQENABLE_CONTEXT_OUT : Context Out Interrupt Enable
bits : 3 - 6 (4 bit)
AES Dirty Bits
address_offset : 0x94 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_DIRTYBITS_S_ACCESS : AES Access Bit
bits : 0 - 0 (1 bit)
AES_DIRTYBITS_S_DIRTY : AES Dirty Bit
bits : 1 - 2 (2 bit)
AES Dirty Bits
address_offset : 0x94 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_DIRTYBITS_S_ACCESS : AES Access Bit
bits : 0 - 0 (1 bit)
AES_DIRTYBITS_S_DIRTY : AES Dirty Bit
bits : 1 - 2 (2 bit)
AES Key 2_5
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_5_KEY : Key Data
bits : 0 - 31 (32 bit)
AES Key 2_5
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
AES_KEY2_5_KEY : Key Data
bits : 0 - 31 (32 bit)
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