\n

FLASH_CTRL

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x1000 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

FLASH_CTRLFMA

FMA

FLASH_CTRLFCIM

FCIM

FLASH_CTRLFWBN

FWBN

FLASH_CTRLRVP

RVP

FLASH_CTRLBOOTCFG

BOOTCFG

FLASH_CTRLUSERREG0

USERREG0

FLASH_CTRLUSERREG1

USERREG1

FLASH_CTRLUSERREG2

USERREG2

FLASH_CTRLUSERREG3

USERREG3

FLASH_CTRLFMPRE0

FMPRE0

FLASH_CTRLFMPRE1

FMPRE1

FLASH_CTRLFMPRE2

FMPRE2

FLASH_CTRLFMPRE3

FMPRE3

FLASH_CTRLFMPRE4

FMPRE4

FLASH_CTRLFMPRE5

FMPRE5

FLASH_CTRLFMPRE6

FMPRE6

FLASH_CTRLFMPRE7

FMPRE7

FLASH_CTRLFCMISC

FCMISC

FLASH_CTRLFMPPE0

FMPPE0

FLASH_CTRLFMPPE1

FMPPE1

FLASH_CTRLFMPPE2

FMPPE2

FLASH_CTRLFMPPE3

FMPPE3

FLASH_CTRLFMPPE4

FMPPE4

FLASH_CTRLFMPPE5

FMPPE5

FLASH_CTRLFMPPE6

FMPPE6

FLASH_CTRLFMPPE7

FMPPE7

FLASH_CTRLFMC2

FMC2

FLASH_CTRLFWBVAL

FWBVAL

FLASH_CTRLFLPEKEY

FLPEKEY

FLASH_CTRLFMD

FMD

FLASH_CTRLFMC

FMC

FLASH_CTRLFCRIS

FCRIS

FLASH_CTRLPP

PP

FLASH_CTRLSSIZE

SSIZE

FLASH_CTRLCONF

CONF

FLASH_CTRLROMSWMAP

ROMSWMAP

FLASH_CTRLDMASZ

DMASZ

FLASH_CTRLDMAST

DMAST


FLASH_CTRLFMA

Flash Memory Address
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMA FLASH_CTRLFMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMA_OFFSET

FLASH_FMA_OFFSET : Address Offset
bits : 0 - 18 (19 bit)


FMA

Flash Memory Address
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMA FMA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMA_OFFSET

FLASH_FMA_OFFSET : Address Offset
bits : 0 - 18 (19 bit)


FLASH_CTRLFCIM

Flash Controller Interrupt Mask
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFCIM FLASH_CTRLFCIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FCIM_AMASK FLASH_FCIM_PMASK FLASH_FCIM_EMASK FLASH_FCIM_VOLTMASK FLASH_FCIM_INVDMASK FLASH_FCIM_ERMASK FLASH_FCIM_PROGMASK

FLASH_FCIM_AMASK : Access Interrupt Mask
bits : 0 - 0 (1 bit)

FLASH_FCIM_PMASK : Programming Interrupt Mask
bits : 1 - 2 (2 bit)

FLASH_FCIM_EMASK : EEPROM Interrupt Mask
bits : 2 - 4 (3 bit)

FLASH_FCIM_VOLTMASK : VOLT Interrupt Mask
bits : 9 - 18 (10 bit)

FLASH_FCIM_INVDMASK : Invalid Data Interrupt Mask
bits : 10 - 20 (11 bit)

FLASH_FCIM_ERMASK : ERVER Interrupt Mask
bits : 11 - 22 (12 bit)

FLASH_FCIM_PROGMASK : PROGVER Interrupt Mask
bits : 13 - 26 (14 bit)


FCIM

Flash Controller Interrupt Mask
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCIM FCIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FCIM_AMASK FLASH_FCIM_PMASK FLASH_FCIM_EMASK FLASH_FCIM_VOLTMASK FLASH_FCIM_INVDMASK FLASH_FCIM_ERMASK FLASH_FCIM_PROGMASK

FLASH_FCIM_AMASK : Access Interrupt Mask
bits : 0 - 0 (1 bit)

FLASH_FCIM_PMASK : Programming Interrupt Mask
bits : 1 - 2 (2 bit)

FLASH_FCIM_EMASK : EEPROM Interrupt Mask
bits : 2 - 4 (3 bit)

FLASH_FCIM_VOLTMASK : VOLT Interrupt Mask
bits : 9 - 18 (10 bit)

FLASH_FCIM_INVDMASK : Invalid Data Interrupt Mask
bits : 10 - 20 (11 bit)

FLASH_FCIM_ERMASK : ERVER Interrupt Mask
bits : 11 - 22 (12 bit)

FLASH_FCIM_PROGMASK : PROGVER Interrupt Mask
bits : 13 - 26 (14 bit)


FLASH_CTRLFWBN

Flash Write Buffer n
address_offset : 0x100 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFWBN FLASH_CTRLFWBN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FWBN_DATA

FLASH_FWBN_DATA : Data
bits : 0 - 31 (32 bit)


FWBN

Flash Write Buffer n
address_offset : 0x100 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FWBN FWBN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FWBN_DATA

FLASH_FWBN_DATA : Data
bits : 0 - 31 (32 bit)


FLASH_CTRLRVP

Reset Vector Pointer
address_offset : 0x10D4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLRVP FLASH_CTRLRVP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_RVP_RV

FLASH_RVP_RV : Reset Vector Pointer Address
bits : 0 - 31 (32 bit)


RVP

Reset Vector Pointer
address_offset : 0x10D4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RVP RVP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_RVP_RV

FLASH_RVP_RV : Reset Vector Pointer Address
bits : 0 - 31 (32 bit)


FLASH_CTRLBOOTCFG

Boot Configuration
address_offset : 0x11D0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLBOOTCFG FLASH_CTRLBOOTCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_BOOTCFG_DBG0 FLASH_BOOTCFG_DBG1 FLASH_BOOTCFG_KEY FLASH_BOOTCFG_EN FLASH_BOOTCFG_POL FLASH_BOOTCFG_PIN FLASH_BOOTCFG_PORT FLASH_BOOTCFG_NW

FLASH_BOOTCFG_DBG0 : Debug Control 0
bits : 0 - 0 (1 bit)

FLASH_BOOTCFG_DBG1 : Debug Control 1
bits : 1 - 2 (2 bit)

FLASH_BOOTCFG_KEY : KEY Select
bits : 4 - 8 (5 bit)

FLASH_BOOTCFG_EN : Boot GPIO Enable
bits : 8 - 16 (9 bit)

FLASH_BOOTCFG_POL : Boot GPIO Polarity
bits : 9 - 18 (10 bit)

FLASH_BOOTCFG_PIN : Boot GPIO Pin
bits : 10 - 22 (13 bit)

Enumeration:

0x0 : FLASH_BOOTCFG_PIN_0

Pin 0

0x1 : FLASH_BOOTCFG_PIN_1

Pin 1

0x2 : FLASH_BOOTCFG_PIN_2

Pin 2

0x3 : FLASH_BOOTCFG_PIN_3

Pin 3

0x4 : FLASH_BOOTCFG_PIN_4

Pin 4

0x5 : FLASH_BOOTCFG_PIN_5

Pin 5

0x6 : FLASH_BOOTCFG_PIN_6

Pin 6

0x7 : FLASH_BOOTCFG_PIN_7

Pin 7

End of enumeration elements list.

FLASH_BOOTCFG_PORT : Boot GPIO Port
bits : 13 - 28 (16 bit)

Enumeration:

0x0 : FLASH_BOOTCFG_PORT_A

Port A

0x1 : FLASH_BOOTCFG_PORT_B

Port B

0x2 : FLASH_BOOTCFG_PORT_C

Port C

0x3 : FLASH_BOOTCFG_PORT_D

Port D

0x4 : FLASH_BOOTCFG_PORT_E

Port E

0x5 : FLASH_BOOTCFG_PORT_F

Port F

0x6 : FLASH_BOOTCFG_PORT_G

Port G

0x7 : FLASH_BOOTCFG_PORT_H

Port H

End of enumeration elements list.

FLASH_BOOTCFG_NW : Not Written
bits : 31 - 62 (32 bit)


BOOTCFG

Boot Configuration
address_offset : 0x11D0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BOOTCFG BOOTCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_BOOTCFG_DBG0 FLASH_BOOTCFG_DBG1 FLASH_BOOTCFG_KEY FLASH_BOOTCFG_EN FLASH_BOOTCFG_POL FLASH_BOOTCFG_PIN FLASH_BOOTCFG_PORT FLASH_BOOTCFG_NW

FLASH_BOOTCFG_DBG0 : Debug Control 0
bits : 0 - 0 (1 bit)

FLASH_BOOTCFG_DBG1 : Debug Control 1
bits : 1 - 2 (2 bit)

FLASH_BOOTCFG_KEY : KEY Select
bits : 4 - 8 (5 bit)

FLASH_BOOTCFG_EN : Boot GPIO Enable
bits : 8 - 16 (9 bit)

FLASH_BOOTCFG_POL : Boot GPIO Polarity
bits : 9 - 18 (10 bit)

FLASH_BOOTCFG_PIN : Boot GPIO Pin
bits : 10 - 22 (13 bit)

Enumeration:

0x0 : FLASH_BOOTCFG_PIN_0

Pin 0

0x1 : FLASH_BOOTCFG_PIN_1

Pin 1

0x2 : FLASH_BOOTCFG_PIN_2

Pin 2

0x3 : FLASH_BOOTCFG_PIN_3

Pin 3

0x4 : FLASH_BOOTCFG_PIN_4

Pin 4

0x5 : FLASH_BOOTCFG_PIN_5

Pin 5

0x6 : FLASH_BOOTCFG_PIN_6

Pin 6

0x7 : FLASH_BOOTCFG_PIN_7

Pin 7

End of enumeration elements list.

FLASH_BOOTCFG_PORT : Boot GPIO Port
bits : 13 - 28 (16 bit)

Enumeration:

0x0 : FLASH_BOOTCFG_PORT_A

Port A

0x1 : FLASH_BOOTCFG_PORT_B

Port B

0x2 : FLASH_BOOTCFG_PORT_C

Port C

0x3 : FLASH_BOOTCFG_PORT_D

Port D

0x4 : FLASH_BOOTCFG_PORT_E

Port E

0x5 : FLASH_BOOTCFG_PORT_F

Port F

0x6 : FLASH_BOOTCFG_PORT_G

Port G

0x7 : FLASH_BOOTCFG_PORT_H

Port H

End of enumeration elements list.

FLASH_BOOTCFG_NW : Not Written
bits : 31 - 62 (32 bit)


FLASH_CTRLUSERREG0

User Register 0
address_offset : 0x11E0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLUSERREG0 FLASH_CTRLUSERREG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERREG0_DATA

FLASH_USERREG0_DATA : User Data
bits : 0 - 31 (32 bit)


USERREG0

User Register 0
address_offset : 0x11E0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USERREG0 USERREG0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERREG0_DATA

FLASH_USERREG0_DATA : User Data
bits : 0 - 31 (32 bit)


FLASH_CTRLUSERREG1

User Register 1
address_offset : 0x11E4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLUSERREG1 FLASH_CTRLUSERREG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERREG1_DATA

FLASH_USERREG1_DATA : User Data
bits : 0 - 31 (32 bit)


USERREG1

User Register 1
address_offset : 0x11E4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USERREG1 USERREG1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERREG1_DATA

FLASH_USERREG1_DATA : User Data
bits : 0 - 31 (32 bit)


FLASH_CTRLUSERREG2

User Register 2
address_offset : 0x11E8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLUSERREG2 FLASH_CTRLUSERREG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERREG2_DATA

FLASH_USERREG2_DATA : User Data
bits : 0 - 31 (32 bit)


USERREG2

User Register 2
address_offset : 0x11E8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USERREG2 USERREG2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERREG2_DATA

FLASH_USERREG2_DATA : User Data
bits : 0 - 31 (32 bit)


FLASH_CTRLUSERREG3

User Register 3
address_offset : 0x11EC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLUSERREG3 FLASH_CTRLUSERREG3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERREG3_DATA

FLASH_USERREG3_DATA : User Data
bits : 0 - 31 (32 bit)


USERREG3

User Register 3
address_offset : 0x11EC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USERREG3 USERREG3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_USERREG3_DATA

FLASH_USERREG3_DATA : User Data
bits : 0 - 31 (32 bit)


FLASH_CTRLFMPRE0

Flash Memory Protection Read Enable 0
address_offset : 0x1200 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPRE0 FLASH_CTRLFMPRE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPRE0

Flash Memory Protection Read Enable 0
address_offset : 0x1200 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPRE0 FMPRE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPRE1

Flash Memory Protection Read Enable 1
address_offset : 0x1204 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPRE1 FLASH_CTRLFMPRE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPRE1

Flash Memory Protection Read Enable 1
address_offset : 0x1204 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPRE1 FMPRE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPRE2

Flash Memory Protection Read Enable 2
address_offset : 0x1208 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPRE2 FLASH_CTRLFMPRE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPRE2

Flash Memory Protection Read Enable 2
address_offset : 0x1208 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPRE2 FMPRE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPRE3

Flash Memory Protection Read Enable 3
address_offset : 0x120C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPRE3 FLASH_CTRLFMPRE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPRE3

Flash Memory Protection Read Enable 3
address_offset : 0x120C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPRE3 FMPRE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPRE4

Flash Memory Protection Read Enable 4
address_offset : 0x1210 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPRE4 FLASH_CTRLFMPRE4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPRE4

Flash Memory Protection Read Enable 4
address_offset : 0x1210 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPRE4 FMPRE4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPRE5

Flash Memory Protection Read Enable 5
address_offset : 0x1214 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPRE5 FLASH_CTRLFMPRE5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPRE5

Flash Memory Protection Read Enable 5
address_offset : 0x1214 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPRE5 FMPRE5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPRE6

Flash Memory Protection Read Enable 6
address_offset : 0x1218 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPRE6 FLASH_CTRLFMPRE6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPRE6

Flash Memory Protection Read Enable 6
address_offset : 0x1218 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPRE6 FMPRE6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPRE7

Flash Memory Protection Read Enable 7
address_offset : 0x121C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPRE7 FLASH_CTRLFMPRE7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPRE7

Flash Memory Protection Read Enable 7
address_offset : 0x121C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPRE7 FMPRE7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFCMISC

Flash Controller Masked Interrupt Status and Clear
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFCMISC FLASH_CTRLFCMISC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FCMISC_AMISC FLASH_FCMISC_PMISC FLASH_FCMISC_EMISC FLASH_FCMISC_VOLTMISC FLASH_FCMISC_INVDMISC FLASH_FCMISC_ERMISC FLASH_FCMISC_PROGMISC

FLASH_FCMISC_AMISC : Access Masked Interrupt Status and Clear
bits : 0 - 0 (1 bit)

FLASH_FCMISC_PMISC : Programming Masked Interrupt Status and Clear
bits : 1 - 2 (2 bit)

FLASH_FCMISC_EMISC : EEPROM Masked Interrupt Status and Clear
bits : 2 - 4 (3 bit)

FLASH_FCMISC_VOLTMISC : VOLT Masked Interrupt Status and Clear
bits : 9 - 18 (10 bit)

FLASH_FCMISC_INVDMISC : Invalid Data Masked Interrupt Status and Clear
bits : 10 - 20 (11 bit)

FLASH_FCMISC_ERMISC : ERVER Masked Interrupt Status and Clear
bits : 11 - 22 (12 bit)

FLASH_FCMISC_PROGMISC : PROGVER Masked Interrupt Status and Clear
bits : 13 - 26 (14 bit)


FCMISC

Flash Controller Masked Interrupt Status and Clear
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCMISC FCMISC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FCMISC_AMISC FLASH_FCMISC_PMISC FLASH_FCMISC_EMISC FLASH_FCMISC_VOLTMISC FLASH_FCMISC_INVDMISC FLASH_FCMISC_ERMISC FLASH_FCMISC_PROGMISC

FLASH_FCMISC_AMISC : Access Masked Interrupt Status and Clear
bits : 0 - 0 (1 bit)

FLASH_FCMISC_PMISC : Programming Masked Interrupt Status and Clear
bits : 1 - 2 (2 bit)

FLASH_FCMISC_EMISC : EEPROM Masked Interrupt Status and Clear
bits : 2 - 4 (3 bit)

FLASH_FCMISC_VOLTMISC : VOLT Masked Interrupt Status and Clear
bits : 9 - 18 (10 bit)

FLASH_FCMISC_INVDMISC : Invalid Data Masked Interrupt Status and Clear
bits : 10 - 20 (11 bit)

FLASH_FCMISC_ERMISC : ERVER Masked Interrupt Status and Clear
bits : 11 - 22 (12 bit)

FLASH_FCMISC_PROGMISC : PROGVER Masked Interrupt Status and Clear
bits : 13 - 26 (14 bit)


FLASH_CTRLFMPPE0

Flash Memory Protection Program Enable 0
address_offset : 0x1400 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPPE0 FLASH_CTRLFMPPE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPPE0

Flash Memory Protection Program Enable 0
address_offset : 0x1400 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPPE0 FMPPE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPPE1

Flash Memory Protection Program Enable 1
address_offset : 0x1404 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPPE1 FLASH_CTRLFMPPE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPPE1

Flash Memory Protection Program Enable 1
address_offset : 0x1404 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPPE1 FMPPE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPPE2

Flash Memory Protection Program Enable 2
address_offset : 0x1408 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPPE2 FLASH_CTRLFMPPE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPPE2

Flash Memory Protection Program Enable 2
address_offset : 0x1408 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPPE2 FMPPE2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPPE3

Flash Memory Protection Program Enable 3
address_offset : 0x140C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPPE3 FLASH_CTRLFMPPE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPPE3

Flash Memory Protection Program Enable 3
address_offset : 0x140C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPPE3 FMPPE3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPPE4

Flash Memory Protection Program Enable 4
address_offset : 0x1410 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPPE4 FLASH_CTRLFMPPE4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPPE4

Flash Memory Protection Program Enable 4
address_offset : 0x1410 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPPE4 FMPPE4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPPE5

Flash Memory Protection Program Enable 5
address_offset : 0x1414 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPPE5 FLASH_CTRLFMPPE5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPPE5

Flash Memory Protection Program Enable 5
address_offset : 0x1414 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPPE5 FMPPE5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPPE6

Flash Memory Protection Program Enable 6
address_offset : 0x1418 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPPE6 FLASH_CTRLFMPPE6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPPE6

Flash Memory Protection Program Enable 6
address_offset : 0x1418 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPPE6 FMPPE6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMPPE7

Flash Memory Protection Program Enable 7
address_offset : 0x141C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMPPE7 FLASH_CTRLFMPPE7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FMPPE7

Flash Memory Protection Program Enable 7
address_offset : 0x141C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMPPE7 FMPPE7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FLASH_CTRLFMC2

Flash Memory Control 2
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMC2 FLASH_CTRLFMC2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMC2_WRBUF

FLASH_FMC2_WRBUF : Buffered Flash Memory Write
bits : 0 - 0 (1 bit)


FMC2

Flash Memory Control 2
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMC2 FMC2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMC2_WRBUF

FLASH_FMC2_WRBUF : Buffered Flash Memory Write
bits : 0 - 0 (1 bit)


FLASH_CTRLFWBVAL

Flash Write Buffer Valid
address_offset : 0x30 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFWBVAL FLASH_CTRLFWBVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FWBVAL_FWB

FLASH_FWBVAL_FWB : Flash Memory Write Buffer
bits : 0 - 31 (32 bit)


FWBVAL

Flash Write Buffer Valid
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FWBVAL FWBVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FWBVAL_FWB

FLASH_FWBVAL_FWB : Flash Memory Write Buffer
bits : 0 - 31 (32 bit)


FLASH_CTRLFLPEKEY

Flash Program/Erase Key
address_offset : 0x3C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFLPEKEY FLASH_CTRLFLPEKEY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FLPEKEY_PEKEY

FLASH_FLPEKEY_PEKEY : Key Value
bits : 0 - 15 (16 bit)


FLPEKEY

Flash Program/Erase Key
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLPEKEY FLPEKEY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FLPEKEY_PEKEY

FLASH_FLPEKEY_PEKEY : Key Value
bits : 0 - 15 (16 bit)


FLASH_CTRLFMD

Flash Memory Data
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMD FLASH_CTRLFMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMD_DATA

FLASH_FMD_DATA : Data Value
bits : 0 - 31 (32 bit)


FMD

Flash Memory Data
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMD FMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMD_DATA

FLASH_FMD_DATA : Data Value
bits : 0 - 31 (32 bit)


FLASH_CTRLFMC

Flash Memory Control
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFMC FLASH_CTRLFMC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMC_WRITE FLASH_FMC_ERASE FLASH_FMC_MERASE FLASH_FMC_COMT FLASH_FMC_WRKEY

FLASH_FMC_WRITE : Write a Word into Flash Memory
bits : 0 - 0 (1 bit)

FLASH_FMC_ERASE : Erase a Page of Flash Memory
bits : 1 - 2 (2 bit)

FLASH_FMC_MERASE : Mass Erase Flash Memory
bits : 2 - 4 (3 bit)

FLASH_FMC_COMT : Commit Register Value
bits : 3 - 6 (4 bit)

FLASH_FMC_WRKEY : FLASH write key
bits : 17 - 48 (32 bit)


FMC

Flash Memory Control
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FMC FMC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FMC_WRITE FLASH_FMC_ERASE FLASH_FMC_MERASE FLASH_FMC_COMT FLASH_FMC_WRKEY

FLASH_FMC_WRITE : Write a Word into Flash Memory
bits : 0 - 0 (1 bit)

FLASH_FMC_ERASE : Erase a Page of Flash Memory
bits : 1 - 2 (2 bit)

FLASH_FMC_MERASE : Mass Erase Flash Memory
bits : 2 - 4 (3 bit)

FLASH_FMC_COMT : Commit Register Value
bits : 3 - 6 (4 bit)

FLASH_FMC_WRKEY : FLASH write key
bits : 17 - 48 (32 bit)


FLASH_CTRLFCRIS

Flash Controller Raw Interrupt Status
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLFCRIS FLASH_CTRLFCRIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FCRIS_ARIS FLASH_FCRIS_PRIS FLASH_FCRIS_ERIS FLASH_FCRIS_VOLTRIS FLASH_FCRIS_INVDRIS FLASH_FCRIS_ERRIS FLASH_FCRIS_PROGRIS

FLASH_FCRIS_ARIS : Access Raw Interrupt Status
bits : 0 - 0 (1 bit)

FLASH_FCRIS_PRIS : Programming Raw Interrupt Status
bits : 1 - 2 (2 bit)

FLASH_FCRIS_ERIS : EEPROM Raw Interrupt Status
bits : 2 - 4 (3 bit)

FLASH_FCRIS_VOLTRIS : Pump Voltage Raw Interrupt Status
bits : 9 - 18 (10 bit)

FLASH_FCRIS_INVDRIS : Invalid Data Raw Interrupt Status
bits : 10 - 20 (11 bit)

FLASH_FCRIS_ERRIS : Erase Verify Error Raw Interrupt Status
bits : 11 - 22 (12 bit)

FLASH_FCRIS_PROGRIS : Program Verify Error Raw Interrupt Status
bits : 13 - 26 (14 bit)


FCRIS

Flash Controller Raw Interrupt Status
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCRIS FCRIS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_FCRIS_ARIS FLASH_FCRIS_PRIS FLASH_FCRIS_ERIS FLASH_FCRIS_VOLTRIS FLASH_FCRIS_INVDRIS FLASH_FCRIS_ERRIS FLASH_FCRIS_PROGRIS

FLASH_FCRIS_ARIS : Access Raw Interrupt Status
bits : 0 - 0 (1 bit)

FLASH_FCRIS_PRIS : Programming Raw Interrupt Status
bits : 1 - 2 (2 bit)

FLASH_FCRIS_ERIS : EEPROM Raw Interrupt Status
bits : 2 - 4 (3 bit)

FLASH_FCRIS_VOLTRIS : Pump Voltage Raw Interrupt Status
bits : 9 - 18 (10 bit)

FLASH_FCRIS_INVDRIS : Invalid Data Raw Interrupt Status
bits : 10 - 20 (11 bit)

FLASH_FCRIS_ERRIS : Erase Verify Error Raw Interrupt Status
bits : 11 - 22 (12 bit)

FLASH_FCRIS_PROGRIS : Program Verify Error Raw Interrupt Status
bits : 13 - 26 (14 bit)


FLASH_CTRLPP

Flash Peripheral Properties
address_offset : 0xFC0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLPP FLASH_CTRLPP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_PP_SIZE FLASH_PP_MAINSS FLASH_PP_EESS FLASH_PP_DFA FLASH_PP_FMM FLASH_PP_PFC

FLASH_PP_SIZE : Flash Size
bits : 0 - 15 (16 bit)

Enumeration:

0xff : FLASH_PP_SIZE_512KB

512 KB of Flash

End of enumeration elements list.

FLASH_PP_MAINSS : Flash Sector Size of the physical bank
bits : 16 - 34 (19 bit)

Enumeration:

0x0 : FLASH_PP_MAINSS_1KB

1 KB

0x1 : FLASH_PP_MAINSS_2KB

2 KB

0x2 : FLASH_PP_MAINSS_4KB

4 KB

0x3 : FLASH_PP_MAINSS_8KB

8 KB

0x4 : FLASH_PP_MAINSS_16KB

16 KB

End of enumeration elements list.

FLASH_PP_EESS : EEPROM Sector Size of the physical bank
bits : 19 - 41 (23 bit)

Enumeration:

0x0 : FLASH_PP_EESS_1KB

1 KB

0x1 : FLASH_PP_EESS_2KB

2 KB

0x2 : FLASH_PP_EESS_4KB

4 KB

0x3 : FLASH_PP_EESS_8KB

8 KB

End of enumeration elements list.

FLASH_PP_DFA : DMA Flash Access
bits : 28 - 56 (29 bit)

FLASH_PP_FMM : Flash Mirror Mode
bits : 29 - 58 (30 bit)

FLASH_PP_PFC : Prefetch Buffer Mode
bits : 30 - 60 (31 bit)


PP

Flash Peripheral Properties
address_offset : 0xFC0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PP PP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_PP_SIZE FLASH_PP_MAINSS FLASH_PP_EESS FLASH_PP_DFA FLASH_PP_FMM FLASH_PP_PFC

FLASH_PP_SIZE : Flash Size
bits : 0 - 15 (16 bit)

Enumeration:

0xff : FLASH_PP_SIZE_512KB

512 KB of Flash

End of enumeration elements list.

FLASH_PP_MAINSS : Flash Sector Size of the physical bank
bits : 16 - 34 (19 bit)

Enumeration:

0x0 : FLASH_PP_MAINSS_1KB

1 KB

0x1 : FLASH_PP_MAINSS_2KB

2 KB

0x2 : FLASH_PP_MAINSS_4KB

4 KB

0x3 : FLASH_PP_MAINSS_8KB

8 KB

0x4 : FLASH_PP_MAINSS_16KB

16 KB

End of enumeration elements list.

FLASH_PP_EESS : EEPROM Sector Size of the physical bank
bits : 19 - 41 (23 bit)

Enumeration:

0x0 : FLASH_PP_EESS_1KB

1 KB

0x1 : FLASH_PP_EESS_2KB

2 KB

0x2 : FLASH_PP_EESS_4KB

4 KB

0x3 : FLASH_PP_EESS_8KB

8 KB

End of enumeration elements list.

FLASH_PP_DFA : DMA Flash Access
bits : 28 - 56 (29 bit)

FLASH_PP_FMM : Flash Mirror Mode
bits : 29 - 58 (30 bit)

FLASH_PP_PFC : Prefetch Buffer Mode
bits : 30 - 60 (31 bit)


FLASH_CTRLSSIZE

SRAM Size
address_offset : 0xFC4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLSSIZE FLASH_CTRLSSIZE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_SSIZE_SIZE

FLASH_SSIZE_SIZE : SRAM Size
bits : 0 - 15 (16 bit)

Enumeration:

0x3ff : FLASH_SSIZE_SIZE_256KB

256 KB of SRAM

End of enumeration elements list.


SSIZE

SRAM Size
address_offset : 0xFC4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SSIZE SSIZE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_SSIZE_SIZE

FLASH_SSIZE_SIZE : SRAM Size
bits : 0 - 15 (16 bit)

Enumeration:

0x3ff : FLASH_SSIZE_SIZE_256KB

256 KB of SRAM

End of enumeration elements list.


FLASH_CTRLCONF

Flash Configuration Register
address_offset : 0xFC8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLCONF FLASH_CTRLCONF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_CONF_FPFOFF FLASH_CONF_FPFON FLASH_CONF_CLRTV FLASH_CONF_SPFE FLASH_CONF_FMME

FLASH_CONF_FPFOFF : Force Prefetch Off
bits : 16 - 32 (17 bit)

FLASH_CONF_FPFON : Force Prefetch On
bits : 17 - 34 (18 bit)

FLASH_CONF_CLRTV : Clear Valid Tags
bits : 20 - 40 (21 bit)

FLASH_CONF_SPFE : Single Prefetch Mode Enable
bits : 29 - 58 (30 bit)

FLASH_CONF_FMME : Flash Mirror Mode Enable
bits : 30 - 60 (31 bit)


CONF

Flash Configuration Register
address_offset : 0xFC8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONF CONF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_CONF_FPFOFF FLASH_CONF_FPFON FLASH_CONF_CLRTV FLASH_CONF_SPFE FLASH_CONF_FMME

FLASH_CONF_FPFOFF : Force Prefetch Off
bits : 16 - 32 (17 bit)

FLASH_CONF_FPFON : Force Prefetch On
bits : 17 - 34 (18 bit)

FLASH_CONF_CLRTV : Clear Valid Tags
bits : 20 - 40 (21 bit)

FLASH_CONF_SPFE : Single Prefetch Mode Enable
bits : 29 - 58 (30 bit)

FLASH_CONF_FMME : Flash Mirror Mode Enable
bits : 30 - 60 (31 bit)


FLASH_CTRLROMSWMAP

ROM Software Map
address_offset : 0xFCC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLROMSWMAP FLASH_CTRLROMSWMAP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_ROMSWMAP_SW0EN FLASH_ROMSWMAP_SW1EN FLASH_ROMSWMAP_SW2EN FLASH_ROMSWMAP_SW3EN FLASH_ROMSWMAP_SW4EN FLASH_ROMSWMAP_SW5EN FLASH_ROMSWMAP_SW6EN FLASH_ROMSWMAP_SW7EN

FLASH_ROMSWMAP_SW0EN : ROM SW Region 0 Availability
bits : 0 - 1 (2 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW0EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW0EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW1EN : ROM SW Region 1 Availability
bits : 2 - 5 (4 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW1EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW1EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW2EN : ROM SW Region 2 Availability
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW2EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW2EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW3EN : ROM SW Region 3 Availability
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW3EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW3EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW4EN : ROM SW Region 4 Availability
bits : 8 - 17 (10 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW4EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW4EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW5EN : ROM SW Region 5 Availability
bits : 10 - 21 (12 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW5EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW5EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW6EN : ROM SW Region 6 Availability
bits : 12 - 25 (14 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW6EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW6EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW7EN : ROM SW Region 7 Availability
bits : 14 - 29 (16 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW7EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW7EN_CORE

Region available to core

End of enumeration elements list.


ROMSWMAP

ROM Software Map
address_offset : 0xFCC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ROMSWMAP ROMSWMAP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_ROMSWMAP_SW0EN FLASH_ROMSWMAP_SW1EN FLASH_ROMSWMAP_SW2EN FLASH_ROMSWMAP_SW3EN FLASH_ROMSWMAP_SW4EN FLASH_ROMSWMAP_SW5EN FLASH_ROMSWMAP_SW6EN FLASH_ROMSWMAP_SW7EN

FLASH_ROMSWMAP_SW0EN : ROM SW Region 0 Availability
bits : 0 - 1 (2 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW0EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW0EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW1EN : ROM SW Region 1 Availability
bits : 2 - 5 (4 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW1EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW1EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW2EN : ROM SW Region 2 Availability
bits : 4 - 9 (6 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW2EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW2EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW3EN : ROM SW Region 3 Availability
bits : 6 - 13 (8 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW3EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW3EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW4EN : ROM SW Region 4 Availability
bits : 8 - 17 (10 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW4EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW4EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW5EN : ROM SW Region 5 Availability
bits : 10 - 21 (12 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW5EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW5EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW6EN : ROM SW Region 6 Availability
bits : 12 - 25 (14 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW6EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW6EN_CORE

Region available to core

End of enumeration elements list.

FLASH_ROMSWMAP_SW7EN : ROM SW Region 7 Availability
bits : 14 - 29 (16 bit)

Enumeration:

0x0 : FLASH_ROMSWMAP_SW7EN_NOTVIS

Software region not available to the core

0x1 : FLASH_ROMSWMAP_SW7EN_CORE

Region available to core

End of enumeration elements list.


FLASH_CTRLDMASZ

Flash DMA Address Size
address_offset : 0xFD0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLDMASZ FLASH_CTRLDMASZ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_DMASZ_SIZE

FLASH_DMASZ_SIZE : uDMA-accessible Memory Size
bits : 0 - 17 (18 bit)


DMASZ

Flash DMA Address Size
address_offset : 0xFD0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DMASZ DMASZ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_DMASZ_SIZE

FLASH_DMASZ_SIZE : uDMA-accessible Memory Size
bits : 0 - 17 (18 bit)


FLASH_CTRLDMAST

Flash DMA Starting Address
address_offset : 0xFD4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLASH_CTRLDMAST FLASH_CTRLDMAST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_DMAST_ADDR

FLASH_DMAST_ADDR : Contains the starting address of the flash region accessible by uDMA if the FLASHPP register DFA bit is set
bits : 11 - 39 (29 bit)


DMAST

Flash DMA Starting Address
address_offset : 0xFD4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DMAST DMAST read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLASH_DMAST_ADDR

FLASH_DMAST_ADDR : Contains the starting address of the flash region accessible by uDMA if the FLASHPP register DFA bit is set
bits : 11 - 39 (29 bit)



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