\n
address_offset : 0x0 Bytes (0x0)
size : 0x28 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x28 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x2C Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x44 Bytes (0x0)
size : 0x98 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0xDC Bytes (0x0)
size : 0x98 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x174 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x178 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x17C Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x19C Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
VE enable_disable
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VEEN : VEEN
bits : 0 - 0 (1 bit)
access : read-write
VEIDLEN : VEIDLEN
bits : 1 - 1 (1 bit)
access : read-write
Schedule repeat count
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VREPB : VREPB
bits : 4 - 7 (4 bit)
access : read-write
q-axis voltage (voltage _V_ _ maximum voltage * 2^31)
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VQ : VQ
bits : 0 - 31 (32 bit)
access : read-write
Integral coefficient for PI control of d-axis
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CIDKI : CIDKI
bits : 0 - 15 (16 bit)
access : read-write
Proportional coefficient for PI control of d-axis
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CIDKP : CIDKP
bits : 0 - 15 (16 bit)
access : read-write
Integral coefficient for PI control of q-axis
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CIQKI : CIQKI
bits : 0 - 15 (16 bit)
access : read-write
Proportional coefficient for PI control of q-axis
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CIQKP : CIQKP
bits : 0 - 15 (16 bit)
access : read-write
Upper 32 bits of integral term (VDI) of d-axis voltage
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VDIH : VDIH
bits : 0 - 31 (32 bit)
access : read-write
Lower 32 bits of integral term (VDI) of d-axis voltage
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VDILH : VDILH
bits : 16 - 31 (16 bit)
access : read-write
Upper 32 bits of integral term (VQI) of q-axis voltage
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VQIH : VQIH
bits : 0 - 31 (32 bit)
access : read-write
Lower 32 bits of integral term (VQI) of q-axis voltage
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VQILH : VQILH
bits : 16 - 31 (16 bit)
access : read-write
Switching speed (for 2-phase modulation and shift PWM)
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FPWMCHG : FPWMCHG
bits : 0 - 15 (16 bit)
access : read-write
PWM period (to be set identically with PMD's PWM period)
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VMDPRD : VMDPRD
bits : 0 - 15 (16 bit)
access : read-write
Minimum pulse width
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MINPLS : MINPLS
bits : 0 - 15 (16 bit)
access : read-write
Synchronizing trigger correction value
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TRGCRC : TRGCRC
bits : 0 - 15 (16 bit)
access : read-write
Cosine value at THETA for output conversion (Q15 data)
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VDCL : VDCL
bits : 0 - 15 (16 bit)
access : read-write
Cosine value at THETA for output conversion (Q15 data)
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COS : COS
bits : 0 - 15 (16 bit)
access : read-write
Sine value at THETA for output conversion (Q15 data)
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SIN : SIN
bits : 0 - 15 (16 bit)
access : read-write
Start trigger mode
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VTRGB : VTRGB
bits : 2 - 3 (2 bit)
access : read-write
Previous cosine value for input processing (Q15 data)
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COSM : COSM
bits : 0 - 15 (16 bit)
access : read-write
Previous sine value for input processing (Q15 data)
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SINM : SINM
bits : 0 - 15 (16 bit)
access : read-write
Sector information (0-11)
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECTOR : SECTOR
bits : 0 - 3 (4 bit)
access : read-write
Previous sector information for input processing (0-11)
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECTORM : SECTORM
bits : 0 - 3 (4 bit)
access : read-write
AD conversion result of a-phase zero-current
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IAO : IAO
bits : 0 - 15 (16 bit)
access : read-write
AD conversion result of b-phase zero-current
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IB0 : IB0
bits : 0 - 15 (16 bit)
access : read-write
AD conversion result of c-phase zero-current
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IC0 : IC0
bits : 0 - 15 (16 bit)
access : read-write
AD conversion result of a-phase current
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IAADC : IAADC
bits : 0 - 15 (16 bit)
access : read-write
AD conversion result of b-phase current
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IBADC : IBADC
bits : 0 - 15 (16 bit)
access : read-write
AD conversion result of c-phase current
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ICADC : ICADC
bits : 0 - 15 (16 bit)
access : read-write
DC supply voltage (voltage _V_ _ maximum voltage * 2^15)
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VDC : VDC
bits : 0 - 15 (16 bit)
access : read-write
d-axis current (current _A_ _ maximum current * 2^31)
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ID : ID
bits : 0 - 31 (32 bit)
access : read-write
q-axis current (current _A_ _ maximum current * 2^31)
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IQ : IQ
bits : 0 - 31 (32 bit)
access : read-write
ADC start wait setting
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TADC : TADC
bits : 0 - 15 (16 bit)
access : read-write
Error interrupt enable_disable
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VERRENB : VERRENB
bits : 1 - 1 (1 bit)
access : read-write
PMD control_ CMPU setting
address_offset : 0x19C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VCMPU : VCMPU
bits : 0 - 15 (16 bit)
access : read-write
PMD control_ CMPV setting
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VCMPV : VCMPV
bits : 0 - 15 (16 bit)
access : read-write
PMD control_ CMPW setting
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VCMPW : VCMPW
bits : 0 - 15 (16 bit)
access : read-write
PMD control_ Output control (MDOUT)
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
U0C : U0C
bits : 0 - 1 (2 bit)
access : read-write
VOC : VOC
bits : 2 - 3 (2 bit)
access : read-write
W0C : W0C
bits : 4 - 5 (2 bit)
access : read-write
UPWM : UPWM
bits : 6 - 6 (1 bit)
access : read-write
VPWM : VPWM
bits : 7 - 7 (1 bit)
access : read-write
WPWM : WPWM
bits : 8 - 8 (1 bit)
access : read-write
PMD control_ TRGCMP0 setting
address_offset : 0x1AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VTRGCMP0 : VTRGCMP0
bits : 0 - 15 (16 bit)
access : read-write
PMD control_ TRGCMP1 setting
address_offset : 0x1B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VTRGCMP1 : VTRGCMP1
bits : 0 - 15 (16 bit)
access : read-write
PMD control_ Trigger selection
address_offset : 0x1B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VTRGSEL : VTRGSEL
bits : 0 - 2 (3 bit)
access : read-write
PMD control_ EMG return (EMGCR_EMGRS_)
address_offset : 0x1B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EMGRS : EMGRS
bits : 0 - 0 (1 bit)
access : read-write
VE forced termination
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
VCENDB : VCENDB
bits : 1 - 1 (1 bit)
access : write-only
Error detection
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
VERRDB : VERRDB
bits : 1 - 1 (1 bit)
access : read-only
Schedule executing flag_executing task
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
VRSCHB : VRSCHB
bits : 5 - 5 (1 bit)
access : read-only
VRTASKB : VRTASKB
bits : 6 - 9 (4 bit)
access : read-only
Temporary register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMPREG0 : TMPREG0
bits : 0 - 31 (32 bit)
access : read-write
Temporary register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMPREG1 : TMPREG1
bits : 0 - 31 (32 bit)
access : read-write
Temporary register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMPREG2 : TMPREG2
bits : 0 - 31 (32 bit)
access : read-write
Temporary register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMPREG3 : TMPREG3
bits : 0 - 31 (32 bit)
access : read-write
Temporary register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMPREG4 : TMPREG4
bits : 0 - 31 (32 bit)
access : read-write
CPU start trigger selection
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
VCPURTB : VCPURTB
bits : 1 - 1 (1 bit)
access : write-only
Temporary register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TMPREG5 : TMPREG5
bits : 0 - 31 (32 bit)
access : read-write
Task selection
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VTASKB : VTASKB
bits : 4 - 7 (4 bit)
access : read-write
Operation schedule selection
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VACTB : VACTB
bits : 4 - 7 (4 bit)
access : read-write
Status flags
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LAVF : LAVF
bits : 0 - 0 (1 bit)
access : read-write
LAVFM : LAVFM
bits : 1 - 1 (1 bit)
access : read-write
LVTF : LVTF
bits : 2 - 2 (1 bit)
access : read-write
PLSLF : PLSLF
bits : 4 - 4 (1 bit)
access : read-write
PLSLFM : PLSLFM
bits : 5 - 5 (1 bit)
access : read-write
Task control mode
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PVIEN : PVIEN
bits : 0 - 0 (1 bit)
access : read-write
ZIEN : ZIEN
bits : 1 - 1 (1 bit)
access : read-write
OCRMD : OCRMD
bits : 2 - 3 (2 bit)
access : read-write
VDCSEL : VDCSEL
bits : 4 - 4 (1 bit)
access : read-write
T4ATANEN : T4ATANEN
bits : 6 - 6 (1 bit)
access : read-write
T7SQRTEN : T7SQRTEN
bits : 7 - 7 (1 bit)
access : read-write
Flow control
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
C2PEN : C2PEN
bits : 0 - 0 (1 bit)
access : read-write
SPWMEN : SPWMEN
bits : 1 - 1 (1 bit)
access : read-write
IDMODE : IDMODE
bits : 2 - 3 (2 bit)
access : read-write
IDPLMD : IDPLMD
bits : 5 - 5 (1 bit)
access : read-write
CRCEN : CRCEN
bits : 8 - 8 (1 bit)
access : read-write
MREGDIS : MREGDIS
bits : 9 - 9 (1 bit)
access : read-write
PIGSEL : PIGSEL
bits : 11 - 11 (1 bit)
access : read-write
PHCVDIS : PHCVDIS
bits : 12 - 12 (1 bit)
access : read-write
SPWMMD : SPWMMD
bits : 14 - 15 (2 bit)
access : read-write
PWM period rate (PWM period _s_* maximum speed * 2^16) setting
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TPWM : TPWM
bits : 0 - 15 (16 bit)
access : read-write
Rotation speed (speed _Hz_ _ maximum speed * 2^15) setting
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OMEGA : OMEGA
bits : 0 - 15 (16 bit)
access : read-write
Motor phase (motor phase _deg_ _ 360 * 2^16) setting
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
THETA : THETA
bits : 0 - 15 (16 bit)
access : read-write
d-axis reference value (current _A_ _ maximum current * 2^15)
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IDREF : IDREF
bits : 0 - 15 (16 bit)
access : read-write
q-axis reference value (current _A_ _ maximum current * 2^15)
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IQREF : IQREF
bits : 0 - 15 (16 bit)
access : read-write
d-axis voltage (voltage _V_ _ maximum voltage * 2^31)
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VD : VD
bits : 0 - 31 (32 bit)
access : read-write
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