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LTT

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x3 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CR0

VALL

VALH


CR0

Long Term Control Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR0 CR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 OSCE TRUN

OSCE : OSCE
bits : 0 - 0 (1 bit)
access : read-write

TRUN : TRUN
bits : 1 - 1 (1 bit)
access : read-write


VALL

Long Term Setting Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VALL VALL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TMRVALL

TMRVALL : TMRVALL
bits : 0 - 7 (8 bit)
access : read-write


VALH

Long Term Setting Register
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VALH VALH read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TMRVALH

TMRVALH : TMRVALH
bits : 0 - 7 (8 bit)
access : read-write



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