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IB

Peripheral Memory Blocks

address_offset : 0x10 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x11 Bytes (0x0)
size : 0x4F byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x60 Bytes (0x0)
size : 0x8E byte (0x0)
mem_usage : registers
protection : not protected

Registers

NIC00

IMC000

IMC001

IMC002

IMC003

IMC004

IMC005

IMC006

IMC007

IMC008

IMC009

IMC010

IMC011

IMC012

IMC013

IMC014

IMC015

IMC016

IMC017

IMC018

IMC019

IMC020

IMC021

IMC022

IMC023

IMC024

IMC025

IMC026

IMC027

IMC028

IMC029

IMC030

IMC031

IMC032

IMC033

IMC034

IMC035

IMC036

IMC037

IMC038

IMC039

IMC040

IMC041

IMC042

IMC043

IMC044

IMC045

IMC046

IMC047

IMC048

IMC049

IMC050

IMC051

IMC052

IMC053

IMC054

IMC055

IMC056

IMC057

IMC058

IMC059

IMC060

IMC061

IMC062

IMC063

IMC064

IMC065

IMC066

IMC067

IMC068

IMC069

IMC070

IMC071

IMC072

IMC073

IMC074

IMC075

IMC076

IMC077

IMC078

IMC079

IMC080

IMC081

IMC082

IMC083

IMC084

IMC085

IMC086

IMC087

IMC088

IMC089

IMC090

IMC091

IMC092

IMC093

IMC094

IMC095

IMC096

IMC097

IMC098

IMC099

IMC100

IMC101

IMC102

IMC103

IMC104

IMC105

IMC106

IMC107

IMC108

IMC109

IMC110

IMC111

IMC112

IMC113

IMC114

IMC115

IMC116

IMC117

IMC118

IMC119

IMC120

IMC121

IMC122

IMC123

IMC124

IMC125

IMC126

IMC127

IMC128

IMC129

IMC130

IMC131

IMC132

IMC133

IMC134

IMC135

IMC136

IMC137

IMC138

IMC139

IMC140

IMC141


NIC00

Non maskable Interrupu Control Register 00
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NIC00 NIC00 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTPFLG INTPCLR

INTPFLG : INTPFLG
bits : 4 - 4 (1 bit)
access : read-write

INTPCLR : INTPCLR
bits : 6 - 6 (1 bit)
access : write-only


IMC000

Interrupu Mode Control Register 000
address_offset : 0x60 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC000 IMC000 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC001

Interrupu Mode Control Register 000
address_offset : 0x61 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC001 IMC001 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC002

Interrupu Mode Control Register 000
address_offset : 0x62 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC002 IMC002 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC003

Interrupu Mode Control Register 000
address_offset : 0x63 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC003 IMC003 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC004

Interrupu Mode Control Register 000
address_offset : 0x64 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC004 IMC004 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC005

Interrupu Mode Control Register 000
address_offset : 0x65 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC005 IMC005 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC006

Interrupu Mode Control Register 000
address_offset : 0x66 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC006 IMC006 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC007

Interrupu Mode Control Register 000
address_offset : 0x67 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC007 IMC007 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC008

Interrupu Mode Control Register 000
address_offset : 0x68 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC008 IMC008 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC009

Interrupu Mode Control Register 000
address_offset : 0x69 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC009 IMC009 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC010

Interrupu Mode Control Register 000
address_offset : 0x6A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC010 IMC010 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC011

Interrupu Mode Control Register 000
address_offset : 0x6B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC011 IMC011 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC012

Interrupu Mode Control Register 000
address_offset : 0x6C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC012 IMC012 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC013

Interrupu Mode Control Register 000
address_offset : 0x6D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC013 IMC013 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC014

Interrupu Mode Control Register 000
address_offset : 0x6E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC014 IMC014 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC015

Interrupu Mode Control Register 000
address_offset : 0x6F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC015 IMC015 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC016

Interrupu Mode Control Register 000
address_offset : 0x70 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC016 IMC016 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC017

Interrupu Mode Control Register 000
address_offset : 0x71 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC017 IMC017 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC018

Interrupu Mode Control Register 000
address_offset : 0x72 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC018 IMC018 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC019

Interrupu Mode Control Register 000
address_offset : 0x73 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC019 IMC019 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC020

Interrupu Mode Control Register 000
address_offset : 0x74 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC020 IMC020 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC021

Interrupu Mode Control Register 000
address_offset : 0x75 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC021 IMC021 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC022

Interrupu Mode Control Register 000
address_offset : 0x76 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC022 IMC022 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC023

Interrupu Mode Control Register 000
address_offset : 0x77 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC023 IMC023 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC024

Interrupu Mode Control Register 000
address_offset : 0x78 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC024 IMC024 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC025

Interrupu Mode Control Register 000
address_offset : 0x79 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC025 IMC025 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC026

Interrupu Mode Control Register 000
address_offset : 0x7A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC026 IMC026 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC027

Interrupu Mode Control Register 000
address_offset : 0x7B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC027 IMC027 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC028

Interrupu Mode Control Register 000
address_offset : 0x7C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC028 IMC028 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC029

Interrupu Mode Control Register 000
address_offset : 0x7D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC029 IMC029 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC030

Interrupu Mode Control Register 000
address_offset : 0x7E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC030 IMC030 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC031

Interrupu Mode Control Register 000
address_offset : 0x7F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC031 IMC031 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC032

Interrupu Mode Control Register 000
address_offset : 0x80 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC032 IMC032 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC033

Interrupu Mode Control Register 000
address_offset : 0x81 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC033 IMC033 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC034

Interrupu Mode Control Register 000
address_offset : 0x82 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC034 IMC034 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC035

Interrupu Mode Control Register 000
address_offset : 0x83 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC035 IMC035 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC036

Interrupu Mode Control Register 000
address_offset : 0x84 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC036 IMC036 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC037

Interrupu Mode Control Register 000
address_offset : 0x85 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC037 IMC037 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC038

Interrupu Mode Control Register 000
address_offset : 0x86 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC038 IMC038 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC039

Interrupu Mode Control Register 000
address_offset : 0x87 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC039 IMC039 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC040

Interrupu Mode Control Register 000
address_offset : 0x88 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC040 IMC040 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC041

Interrupu Mode Control Register 000
address_offset : 0x89 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC041 IMC041 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC042

Interrupu Mode Control Register 000
address_offset : 0x8A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC042 IMC042 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC043

Interrupu Mode Control Register 000
address_offset : 0x8B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC043 IMC043 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC044

Interrupu Mode Control Register 000
address_offset : 0x8C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC044 IMC044 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC045

Interrupu Mode Control Register 000
address_offset : 0x8D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC045 IMC045 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC046

Interrupu Mode Control Register 000
address_offset : 0x8E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC046 IMC046 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC047

Interrupu Mode Control Register 000
address_offset : 0x8F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC047 IMC047 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC048

Interrupu Mode Control Register 000
address_offset : 0x90 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC048 IMC048 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC049

Interrupu Mode Control Register 000
address_offset : 0x91 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC049 IMC049 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC050

Interrupu Mode Control Register 000
address_offset : 0x92 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC050 IMC050 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC051

Interrupu Mode Control Register 000
address_offset : 0x93 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC051 IMC051 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC052

Interrupu Mode Control Register 000
address_offset : 0x94 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC052 IMC052 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC053

Interrupu Mode Control Register 000
address_offset : 0x95 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC053 IMC053 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC054

Interrupu Mode Control Register 000
address_offset : 0x96 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC054 IMC054 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC055

Interrupu Mode Control Register 000
address_offset : 0x97 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC055 IMC055 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC056

Interrupu Mode Control Register 000
address_offset : 0x98 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC056 IMC056 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC057

Interrupu Mode Control Register 000
address_offset : 0x99 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC057 IMC057 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC058

Interrupu Mode Control Register 000
address_offset : 0x9A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC058 IMC058 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC059

Interrupu Mode Control Register 000
address_offset : 0x9B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC059 IMC059 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC060

Interrupu Mode Control Register 000
address_offset : 0x9C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC060 IMC060 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC061

Interrupu Mode Control Register 000
address_offset : 0x9D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC061 IMC061 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC062

Interrupu Mode Control Register 000
address_offset : 0x9E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC062 IMC062 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC063

Interrupu Mode Control Register 000
address_offset : 0x9F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC063 IMC063 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC064

Interrupu Mode Control Register 000
address_offset : 0xA0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC064 IMC064 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC065

Interrupu Mode Control Register 000
address_offset : 0xA1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC065 IMC065 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC066

Interrupu Mode Control Register 000
address_offset : 0xA2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC066 IMC066 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC067

Interrupu Mode Control Register 000
address_offset : 0xA3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC067 IMC067 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC068

Interrupu Mode Control Register 000
address_offset : 0xA4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC068 IMC068 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC069

Interrupu Mode Control Register 000
address_offset : 0xA5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC069 IMC069 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC070

Interrupu Mode Control Register 000
address_offset : 0xA6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC070 IMC070 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC071

Interrupu Mode Control Register 000
address_offset : 0xA7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC071 IMC071 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC072

Interrupu Mode Control Register 000
address_offset : 0xA8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC072 IMC072 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC073

Interrupu Mode Control Register 000
address_offset : 0xA9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC073 IMC073 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC074

Interrupu Mode Control Register 000
address_offset : 0xAA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC074 IMC074 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC075

Interrupu Mode Control Register 000
address_offset : 0xAB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC075 IMC075 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC076

Interrupu Mode Control Register 000
address_offset : 0xAC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC076 IMC076 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC077

Interrupu Mode Control Register 000
address_offset : 0xAD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC077 IMC077 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC078

Interrupu Mode Control Register 000
address_offset : 0xAE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC078 IMC078 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC079

Interrupu Mode Control Register 000
address_offset : 0xAF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC079 IMC079 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC080

Interrupu Mode Control Register 000
address_offset : 0xB0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC080 IMC080 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC081

Interrupu Mode Control Register 000
address_offset : 0xB1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC081 IMC081 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC082

Interrupu Mode Control Register 000
address_offset : 0xB2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC082 IMC082 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC083

Interrupu Mode Control Register 000
address_offset : 0xB3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC083 IMC083 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC084

Interrupu Mode Control Register 000
address_offset : 0xB4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC084 IMC084 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC085

Interrupu Mode Control Register 000
address_offset : 0xB5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC085 IMC085 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC086

Interrupu Mode Control Register 000
address_offset : 0xB6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC086 IMC086 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC087

Interrupu Mode Control Register 000
address_offset : 0xB7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC087 IMC087 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC088

Interrupu Mode Control Register 000
address_offset : 0xB8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC088 IMC088 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC089

Interrupu Mode Control Register 000
address_offset : 0xB9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC089 IMC089 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC090

Interrupu Mode Control Register 000
address_offset : 0xBA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC090 IMC090 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC091

Interrupu Mode Control Register 000
address_offset : 0xBB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC091 IMC091 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC092

Interrupu Mode Control Register 000
address_offset : 0xBC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC092 IMC092 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC093

Interrupu Mode Control Register 000
address_offset : 0xBD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC093 IMC093 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC094

Interrupu Mode Control Register 000
address_offset : 0xBE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC094 IMC094 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC095

Interrupu Mode Control Register 000
address_offset : 0xBF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC095 IMC095 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC096

Interrupu Mode Control Register 000
address_offset : 0xC0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC096 IMC096 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC097

Interrupu Mode Control Register 000
address_offset : 0xC1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC097 IMC097 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC098

Interrupu Mode Control Register 000
address_offset : 0xC2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC098 IMC098 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC099

Interrupu Mode Control Register 000
address_offset : 0xC3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC099 IMC099 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC100

Interrupu Mode Control Register 000
address_offset : 0xC4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC100 IMC100 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC101

Interrupu Mode Control Register 000
address_offset : 0xC5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC101 IMC101 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC102

Interrupu Mode Control Register 000
address_offset : 0xC6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC102 IMC102 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC103

Interrupu Mode Control Register 000
address_offset : 0xC7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC103 IMC103 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC104

Interrupu Mode Control Register 000
address_offset : 0xC8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC104 IMC104 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC105

Interrupu Mode Control Register 000
address_offset : 0xC9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC105 IMC105 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC106

Interrupu Mode Control Register 000
address_offset : 0xCA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC106 IMC106 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC107

Interrupu Mode Control Register 000
address_offset : 0xCB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC107 IMC107 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC108

Interrupu Mode Control Register 000
address_offset : 0xCC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC108 IMC108 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC109

Interrupu Mode Control Register 000
address_offset : 0xCD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC109 IMC109 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC110

Interrupu Mode Control Register 000
address_offset : 0xCE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC110 IMC110 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC111

Interrupu Mode Control Register 000
address_offset : 0xCF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC111 IMC111 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC112

Interrupu Mode Control Register 000
address_offset : 0xD0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC112 IMC112 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC113

Interrupu Mode Control Register 000
address_offset : 0xD1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC113 IMC113 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC114

Interrupu Mode Control Register 000
address_offset : 0xD2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC114 IMC114 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC115

Interrupu Mode Control Register 000
address_offset : 0xD3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC115 IMC115 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC116

Interrupu Mode Control Register 000
address_offset : 0xD4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC116 IMC116 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC117

Interrupu Mode Control Register 000
address_offset : 0xD5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC117 IMC117 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC118

Interrupu Mode Control Register 000
address_offset : 0xD6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC118 IMC118 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC119

Interrupu Mode Control Register 000
address_offset : 0xD7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC119 IMC119 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC120

Interrupu Mode Control Register 000
address_offset : 0xD8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC120 IMC120 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC121

Interrupu Mode Control Register 000
address_offset : 0xD9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC121 IMC121 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC122

Interrupu Mode Control Register 000
address_offset : 0xDA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC122 IMC122 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC123

Interrupu Mode Control Register 000
address_offset : 0xDB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC123 IMC123 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC124

Interrupu Mode Control Register 000
address_offset : 0xDC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC124 IMC124 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC125

Interrupu Mode Control Register 000
address_offset : 0xDD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC125 IMC125 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC126

Interrupu Mode Control Register 000
address_offset : 0xDE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC126 IMC126 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC127

Interrupu Mode Control Register 000
address_offset : 0xDF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC127 IMC127 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC128

Interrupu Mode Control Register 000
address_offset : 0xE0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC128 IMC128 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC129

Interrupu Mode Control Register 000
address_offset : 0xE1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC129 IMC129 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC130

Interrupu Mode Control Register 000
address_offset : 0xE2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC130 IMC130 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC131

Interrupu Mode Control Register 000
address_offset : 0xE3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC131 IMC131 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC132

Interrupu Mode Control Register 000
address_offset : 0xE4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC132 IMC132 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC133

Interrupu Mode Control Register 000
address_offset : 0xE5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC133 IMC133 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC134

Interrupu Mode Control Register 000
address_offset : 0xE6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC134 IMC134 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC135

Interrupu Mode Control Register 000
address_offset : 0xE7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC135 IMC135 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC136

Interrupu Mode Control Register 000
address_offset : 0xE8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC136 IMC136 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC137

Interrupu Mode Control Register 000
address_offset : 0xE9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC137 IMC137 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC138

Interrupu Mode Control Register 000
address_offset : 0xEA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC138 IMC138 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC139

Interrupu Mode Control Register 000
address_offset : 0xEB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC139 IMC139 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC140

Interrupu Mode Control Register 000
address_offset : 0xEC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC140 IMC140 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write


IMC141

Interrupu Mode Control Register 000
address_offset : 0xED Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IMC141 IMC141 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 INTEN

INTEN : INTEN
bits : 0 - 0 (1 bit)
access : read-write



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