\n
address_offset : 0x0 Bytes (0x0)
size : 0x2C byte (0x0)
mem_usage : registers
protection : not protected
TRGSEL Control register 0
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN0 : EN0
bits : 0 - 0 (1 bit)
access : read-write
OUTSEL0 : OUTSEL0
bits : 1 - 1 (1 bit)
access : read-write
UPDN0 : UPDN0
bits : 2 - 2 (1 bit)
access : read-write
INSEL0 : INSEL0
bits : 4 - 6 (3 bit)
access : read-write
EN1 : EN1
bits : 8 - 8 (1 bit)
access : read-write
OUTSEL1 : OUTSEL1
bits : 9 - 9 (1 bit)
access : read-write
UPDN1 : UPDN1
bits : 10 - 10 (1 bit)
access : read-write
INSEL1 : INSEL1
bits : 12 - 14 (3 bit)
access : read-write
EN2 : EN2
bits : 16 - 16 (1 bit)
access : read-write
OUTSEL2 : OUTSEL2
bits : 17 - 17 (1 bit)
access : read-write
UPDN2 : UPDN2
bits : 18 - 18 (1 bit)
access : read-write
INSEL2 : INSEL2
bits : 20 - 22 (3 bit)
access : read-write
EN3 : EN3
bits : 24 - 24 (1 bit)
access : read-write
OUTSEL3 : OUTSEL3
bits : 25 - 25 (1 bit)
access : read-write
UPDN3 : UPDN3
bits : 26 - 26 (1 bit)
access : read-write
INSEL3 : INSEL3
bits : 28 - 30 (3 bit)
access : read-write
TRGSEL Control register 4
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN16 : EN16
bits : 0 - 0 (1 bit)
access : read-write
OUTSEL16 : OUTSEL16
bits : 1 - 1 (1 bit)
access : read-write
UPDN16 : UPDN16
bits : 2 - 2 (1 bit)
access : read-write
INSEL16 : INSEL16
bits : 4 - 6 (3 bit)
access : read-write
EN17 : EN17
bits : 8 - 8 (1 bit)
access : read-write
OUTSEL17 : OUTSEL17
bits : 9 - 9 (1 bit)
access : read-write
UPDN17 : UPDN17
bits : 10 - 10 (1 bit)
access : read-write
INSEL17 : INSEL17
bits : 12 - 14 (3 bit)
access : read-write
EN18 : EN18
bits : 16 - 16 (1 bit)
access : read-write
OUTSEL18 : OUTSEL18
bits : 17 - 17 (1 bit)
access : read-write
UPDN18 : UPDN18
bits : 18 - 18 (1 bit)
access : read-write
INSEL18 : INSEL18
bits : 20 - 22 (3 bit)
access : read-write
EN19 : EN19
bits : 24 - 24 (1 bit)
access : read-write
OUTSEL19 : OUTSEL19
bits : 25 - 25 (1 bit)
access : read-write
UPDN19 : UPDN19
bits : 26 - 26 (1 bit)
access : read-write
INSEL19 : INSEL19
bits : 28 - 30 (3 bit)
access : read-write
TRGSEL Control register 5
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN20 : EN20
bits : 0 - 0 (1 bit)
access : read-write
OUTSEL20 : OUTSEL20
bits : 1 - 1 (1 bit)
access : read-write
UPDN20 : UPDN20
bits : 2 - 2 (1 bit)
access : read-write
INSEL20 : INSEL20
bits : 4 - 6 (3 bit)
access : read-write
EN21 : EN21
bits : 8 - 8 (1 bit)
access : read-write
OUTSEL21 : OUTSEL21
bits : 9 - 9 (1 bit)
access : read-write
UPDN21 : UPDN21
bits : 10 - 10 (1 bit)
access : read-write
INSEL21 : INSEL21
bits : 12 - 14 (3 bit)
access : read-write
EN22 : EN22
bits : 16 - 16 (1 bit)
access : read-write
OUTSEL22 : OUTSEL22
bits : 17 - 17 (1 bit)
access : read-write
UPDN22 : UPDN22
bits : 18 - 18 (1 bit)
access : read-write
INSEL22 : INSEL22
bits : 20 - 22 (3 bit)
access : read-write
EN23 : EN23
bits : 24 - 24 (1 bit)
access : read-write
OUTSEL23 : OUTSEL23
bits : 25 - 25 (1 bit)
access : read-write
UPDN23 : UPDN23
bits : 26 - 26 (1 bit)
access : read-write
INSEL23 : INSEL23
bits : 28 - 30 (3 bit)
access : read-write
TRGSEL Control register 6
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN24 : EN24
bits : 0 - 0 (1 bit)
access : read-write
OUTSEL24 : OUTSEL24
bits : 1 - 1 (1 bit)
access : read-write
UPDN24 : UPDN24
bits : 2 - 2 (1 bit)
access : read-write
INSEL24 : INSEL24
bits : 4 - 6 (3 bit)
access : read-write
EN25 : EN25
bits : 8 - 8 (1 bit)
access : read-write
OUTSEL25 : OUTSEL25
bits : 9 - 9 (1 bit)
access : read-write
UPDN25 : UPDN25
bits : 10 - 10 (1 bit)
access : read-write
INSEL25 : INSEL25
bits : 12 - 14 (3 bit)
access : read-write
EN26 : EN26
bits : 16 - 16 (1 bit)
access : read-write
OUTSEL26 : OUTSEL26
bits : 17 - 17 (1 bit)
access : read-write
UPDN26 : UPDN26
bits : 18 - 18 (1 bit)
access : read-write
INSEL26 : INSEL26
bits : 20 - 22 (3 bit)
access : read-write
EN27 : EN27
bits : 24 - 24 (1 bit)
access : read-write
OUTSEL27 : OUTSEL27
bits : 25 - 25 (1 bit)
access : read-write
UPDN27 : UPDN27
bits : 26 - 26 (1 bit)
access : read-write
INSEL27 : INSEL27
bits : 28 - 30 (3 bit)
access : read-write
TRGSEL Control register 7
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN28 : EN28
bits : 0 - 0 (1 bit)
access : read-write
OUTSEL28 : OUTSEL28
bits : 1 - 1 (1 bit)
access : read-write
UPDN28 : UPDN28
bits : 2 - 2 (1 bit)
access : read-write
INSEL28 : INSEL28
bits : 4 - 6 (3 bit)
access : read-write
EN29 : EN29
bits : 8 - 8 (1 bit)
access : read-write
OUTSEL29 : OUTSEL29
bits : 9 - 9 (1 bit)
access : read-write
UPDN29 : UPDN29
bits : 10 - 10 (1 bit)
access : read-write
INSEL29 : INSEL29
bits : 12 - 14 (3 bit)
access : read-write
EN30 : EN30
bits : 16 - 16 (1 bit)
access : read-write
OUTSEL30 : OUTSEL30
bits : 17 - 17 (1 bit)
access : read-write
UPDN30 : UPDN30
bits : 18 - 18 (1 bit)
access : read-write
INSEL30 : INSEL30
bits : 20 - 22 (3 bit)
access : read-write
EN31 : EN31
bits : 24 - 24 (1 bit)
access : read-write
OUTSEL31 : OUTSEL31
bits : 25 - 25 (1 bit)
access : read-write
UPDN31 : UPDN31
bits : 26 - 26 (1 bit)
access : read-write
INSEL31 : INSEL31
bits : 28 - 30 (3 bit)
access : read-write
TRGSEL Control register 8
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN32 : EN32
bits : 0 - 0 (1 bit)
access : read-write
OUTSEL32 : OUTSEL32
bits : 1 - 1 (1 bit)
access : read-write
UPDN32 : UPDN32
bits : 2 - 2 (1 bit)
access : read-write
INSEL32 : INSEL32
bits : 4 - 6 (3 bit)
access : read-write
EN33 : EN33
bits : 8 - 8 (1 bit)
access : read-write
OUTSEL33 : OUTSEL33
bits : 9 - 9 (1 bit)
access : read-write
UPDN33 : UPDN33
bits : 10 - 10 (1 bit)
access : read-write
INSEL33 : INSEL33
bits : 12 - 14 (3 bit)
access : read-write
EN34 : EN34
bits : 16 - 16 (1 bit)
access : read-write
OUTSEL34 : OUTSEL34
bits : 17 - 17 (1 bit)
access : read-write
UPDN34 : UPDN34
bits : 18 - 18 (1 bit)
access : read-write
INSEL34 : INSEL34
bits : 20 - 22 (3 bit)
access : read-write
EN35 : EN35
bits : 24 - 24 (1 bit)
access : read-write
OUTSEL35 : OUTSEL35
bits : 25 - 25 (1 bit)
access : read-write
UPDN35 : UPDN35
bits : 26 - 26 (1 bit)
access : read-write
INSEL35 : INSEL35
bits : 28 - 30 (3 bit)
access : read-write
TRGSEL Control register 9
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN36 : EN36
bits : 0 - 0 (1 bit)
access : read-write
OUTSEL36 : OUTSEL36
bits : 1 - 1 (1 bit)
access : read-write
UPDN36 : UPDN36
bits : 2 - 2 (1 bit)
access : read-write
INSEL36 : INSEL36
bits : 4 - 6 (3 bit)
access : read-write
EN37 : EN37
bits : 8 - 8 (1 bit)
access : read-write
OUTSEL37 : OUTSEL37
bits : 9 - 9 (1 bit)
access : read-write
UPDN37 : UPDN37
bits : 10 - 10 (1 bit)
access : read-write
INSEL37 : INSEL37
bits : 12 - 14 (3 bit)
access : read-write
EN38 : EN38
bits : 16 - 16 (1 bit)
access : read-write
OUTSEL38 : OUTSEL38
bits : 17 - 17 (1 bit)
access : read-write
UPDN38 : UPDN38
bits : 18 - 18 (1 bit)
access : read-write
INSEL38 : INSEL38
bits : 20 - 22 (3 bit)
access : read-write
EN39 : EN39
bits : 24 - 24 (1 bit)
access : read-write
OUTSEL39 : OUTSEL39
bits : 25 - 25 (1 bit)
access : read-write
UPDN39 : UPDN39
bits : 26 - 26 (1 bit)
access : read-write
INSEL39 : INSEL39
bits : 28 - 30 (3 bit)
access : read-write
TRGSEL Control register 10
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN40 : EN40
bits : 0 - 0 (1 bit)
access : read-write
OUTSEL40 : OUTSEL40
bits : 1 - 1 (1 bit)
access : read-write
UPDN40 : UPDN40
bits : 2 - 2 (1 bit)
access : read-write
INSEL40 : INSEL40
bits : 4 - 6 (3 bit)
access : read-write
TRGSEL Control register 1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN4 : EN4
bits : 0 - 0 (1 bit)
access : read-write
OUTSEL4 : OUTSEL4
bits : 1 - 1 (1 bit)
access : read-write
UPDN4 : UPDN4
bits : 2 - 2 (1 bit)
access : read-write
INSEL4 : INSEL4
bits : 4 - 6 (3 bit)
access : read-write
EN5 : EN5
bits : 8 - 8 (1 bit)
access : read-write
OUTSEL5 : OUTSEL5
bits : 9 - 9 (1 bit)
access : read-write
UPDN5 : UPDN5
bits : 10 - 10 (1 bit)
access : read-write
INSEL5 : INSEL5
bits : 12 - 14 (3 bit)
access : read-write
EN6 : EN6
bits : 16 - 16 (1 bit)
access : read-write
OUTSEL6 : OUTSEL6
bits : 17 - 17 (1 bit)
access : read-write
UPDN6 : UPDN6
bits : 18 - 18 (1 bit)
access : read-write
INSEL6 : INSEL6
bits : 20 - 22 (3 bit)
access : read-write
EN7 : EN7
bits : 24 - 24 (1 bit)
access : read-write
OUTSEL7 : OUTSEL7
bits : 25 - 25 (1 bit)
access : read-write
UPDN7 : UPDN7
bits : 26 - 26 (1 bit)
access : read-write
INSEL7 : INSEL7
bits : 28 - 30 (3 bit)
access : read-write
TSEL Control register 2
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN8 : EN8
bits : 0 - 0 (1 bit)
access : read-write
OUTSEL8 : OUTSEL8
bits : 1 - 1 (1 bit)
access : read-write
UPDN8 : UPDN8
bits : 2 - 2 (1 bit)
access : read-write
INSEL8 : INSEL8
bits : 4 - 6 (3 bit)
access : read-write
EN9 : EN9
bits : 8 - 8 (1 bit)
access : read-write
OUTSEL9 : OUTSEL9
bits : 9 - 9 (1 bit)
access : read-write
UPDN9 : UPDN9
bits : 10 - 10 (1 bit)
access : read-write
INSEL9 : INSEL9
bits : 12 - 14 (3 bit)
access : read-write
EN10 : EN10
bits : 16 - 16 (1 bit)
access : read-write
OUTSEL10 : OUTSEL10
bits : 17 - 17 (1 bit)
access : read-write
UPDN10 : UPDN10
bits : 18 - 18 (1 bit)
access : read-write
INSEL10 : INSEL10
bits : 20 - 22 (3 bit)
access : read-write
EN11 : EN11
bits : 24 - 24 (1 bit)
access : read-write
OUTSEL11 : OUTSEL11
bits : 25 - 25 (1 bit)
access : read-write
UPDN11 : UPDN11
bits : 26 - 26 (1 bit)
access : read-write
INSEL11 : INSEL11
bits : 28 - 30 (3 bit)
access : read-write
TRGSEL Control register 3
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN12 : EN12
bits : 0 - 0 (1 bit)
access : read-write
OUTSEL12 : OUTSEL12
bits : 1 - 1 (1 bit)
access : read-write
UPDN12 : UPDN12
bits : 2 - 2 (1 bit)
access : read-write
INSEL12 : INSEL12
bits : 4 - 6 (3 bit)
access : read-write
EN13 : EN13
bits : 8 - 8 (1 bit)
access : read-write
OUTSEL13 : OUTSEL13
bits : 9 - 9 (1 bit)
access : read-write
UPDN13 : UPDN13
bits : 10 - 10 (1 bit)
access : read-write
INSEL13 : INSEL13
bits : 12 - 14 (3 bit)
access : read-write
EN14 : EN14
bits : 16 - 16 (1 bit)
access : read-write
OUTSEL14 : OUTSEL14
bits : 17 - 17 (1 bit)
access : read-write
UPDN14 : UPDN14
bits : 18 - 18 (1 bit)
access : read-write
INSEL14 : INSEL14
bits : 20 - 22 (3 bit)
access : read-write
EN15 : EN15
bits : 24 - 24 (1 bit)
access : read-write
OUTSEL15 : OUTSEL15
bits : 25 - 25 (1 bit)
access : read-write
UPDN15 : UPDN15
bits : 26 - 26 (1 bit)
access : read-write
INSEL15 : INSEL15
bits : 28 - 30 (3 bit)
access : read-write
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