\n
address_offset : 0x0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x38 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x28 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x34 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x8 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : reserved
protection : not protected
Port K Data Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PK0 : PK0
bits : 0 - 0 (1 bit)
access : read-write
PK1 : PK1
bits : 1 - 1 (1 bit)
access : read-write
PK2 : PK2
bits : 2 - 2 (1 bit)
access : read-write
PK3 : PK3
bits : 3 - 3 (1 bit)
access : read-write
PK4 : PK4
bits : 4 - 4 (1 bit)
access : read-write
Port K Open Drain Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PK0OD : PK0OD
bits : 0 - 0 (1 bit)
access : read-write
PK1OD : PK1OD
bits : 1 - 1 (1 bit)
access : read-write
PK2OD : PK2OD
bits : 2 - 2 (1 bit)
access : read-write
PK3OD : PK3OD
bits : 3 - 3 (1 bit)
access : read-write
PK4OD : PK4OD
bits : 4 - 4 (1 bit)
access : read-write
Port K Pull-up Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PK0UP : PK0UP
bits : 0 - 0 (1 bit)
access : read-write
PK1UP : PK1UP
bits : 1 - 1 (1 bit)
access : read-write
PK2UP : PK2UP
bits : 2 - 2 (1 bit)
access : read-write
PK3UP : PK3UP
bits : 3 - 3 (1 bit)
access : read-write
PK4UP : PK4UP
bits : 4 - 4 (1 bit)
access : read-write
Port K Pull-down Control Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PK0DN : PK0DN
bits : 0 - 0 (1 bit)
access : read-write
PK1DN : PK1DN
bits : 1 - 1 (1 bit)
access : read-write
PK2DN : PK2DN
bits : 2 - 2 (1 bit)
access : read-write
PK3DN : PK3DN
bits : 3 - 3 (1 bit)
access : read-write
PK4DN : PK4DN
bits : 4 - 4 (1 bit)
access : read-write
Port K Input Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PK0IE : PK0IE
bits : 0 - 0 (1 bit)
access : read-write
PK1IE : PK1IE
bits : 1 - 1 (1 bit)
access : read-write
PK2IE : PK2IE
bits : 2 - 2 (1 bit)
access : read-write
PK3IE : PK3IE
bits : 3 - 3 (1 bit)
access : read-write
PK4IE : PK4IE
bits : 4 - 4 (1 bit)
access : read-write
Port K Output Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PK0C : PK0C
bits : 0 - 0 (1 bit)
access : read-write
PK1C : PK1C
bits : 1 - 1 (1 bit)
access : read-write
PK2C : PK2C
bits : 2 - 2 (1 bit)
access : read-write
PK3C : PK3C
bits : 3 - 3 (1 bit)
access : read-write
PK4C : PK4C
bits : 4 - 4 (1 bit)
access : read-write
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.