\n

FC

Peripheral Memory Blocks

address_offset : 0x20 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x30 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x50 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x48 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x68 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x10 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x100 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x1C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x4C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x140 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x158 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x24 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x108 Bytes (0x0)
size : 0x38 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x144 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x38 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x58 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x6C Bytes (0x0)
size : 0x94 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x148 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x154 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected

Registers

SBMR

SR1

SWPSR

SSR

AREASEL

CR

STSCLR

BNKCR

BUFDISCLR

KCR

SR0

PSR0

PSR1

PSR6

PMR0

PMR1

PMR6


SBMR

Flash Security Bit Mask Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SBMR SBMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SMB

SMB : SMB
bits : 0 - 0 (1 bit)
access : read-write


SR1

Flash Status Register 1
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SR1 SR1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WEABORT

WEABORT : WEABORT
bits : 24 - 24 (1 bit)
access : read-only


SWPSR

Flash Memory SWAP Status Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SWPSR SWPSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SWP SIZE

SWP : SWP
bits : 0 - 1 (2 bit)
access : read-only

SIZE : SIZE
bits : 8 - 13 (6 bit)
access : read-only


SSR

Flash Security Status Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SSR SSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SEC

SEC : SEC
bits : 0 - 0 (1 bit)
access : read-only


AREASEL

Flash Area Selection Register
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AREASEL AREASEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AREA0 AREA4 SSF0 SSF4

AREA0 : AREA0
bits : 0 - 2 (3 bit)
access : read-write

AREA4 : AREA4
bits : 16 - 18 (3 bit)
access : read-write

SSF0 : SSF0
bits : 26 - 26 (1 bit)
access : read-only

SSF4 : SSF4
bits : 30 - 30 (1 bit)
access : read-only


CR

Flash Control Register
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WEABORT

WEABORT : WEABORT
bits : 0 - 2 (3 bit)
access : read-write


STSCLR

Flash Status Clear Register
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STSCLR STSCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WEABORT

WEABORT : WEABORT
bits : 0 - 2 (3 bit)
access : read-write


BNKCR

Flash Bank Change Register
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BNKCR BNKCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BANK0

BANK0 : BANK0
bits : 0 - 2 (3 bit)
access : read-write


BUFDISCLR

Flash Buffer Disable and Clear Register
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUFDISCLR BUFDISCLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUFDISCLR

BUFDISCLR : BUFDISCLR
bits : 0 - 2 (3 bit)
access : read-write


KCR

Flash Key Code Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

KCR KCR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 KEYCODE

KEYCODE : KEYCODE
bits : 0 - 31 (32 bit)
access : write-only


SR0

Flash Status Register 0
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SR0 SR0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RDYBSY RDYBSY0 RDYBSY2

RDYBSY : RDYBSY
bits : 0 - 0 (1 bit)
access : read-only

RDYBSY0 : RDYBSY0
bits : 8 - 8 (1 bit)
access : read-only

RDYBSY2 : RDYBSY2
bits : 10 - 10 (1 bit)
access : read-only


PSR0

Flash Protect Status Register 0
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PSR0 PSR0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PG0 PG1 PG2 PG3 PG4 PG5 PG6 PG7

PG0 : PG0
bits : 0 - 0 (1 bit)
access : read-only

PG1 : PG1
bits : 1 - 1 (1 bit)
access : read-only

PG2 : PG2
bits : 2 - 2 (1 bit)
access : read-only

PG3 : PG3
bits : 3 - 3 (1 bit)
access : read-only

PG4 : PG4
bits : 4 - 4 (1 bit)
access : read-only

PG5 : PG5
bits : 5 - 5 (1 bit)
access : read-only

PG6 : PG6
bits : 6 - 6 (1 bit)
access : read-only

PG7 : PG7
bits : 7 - 7 (1 bit)
access : read-only


PSR1

Flash Protect Status Register 1
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PSR1 PSR1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BLK1 BLK2 BLK3 BLK4 BLK5 BLK6 BLK7 BLK8 BLK9 BLK10 BLK11 BLK12 BLK13 BLK14 BLK15

BLK1 : BLK1
bits : 1 - 1 (1 bit)
access : read-only

BLK2 : BLK2
bits : 2 - 2 (1 bit)
access : read-only

BLK3 : BLK3
bits : 3 - 3 (1 bit)
access : read-only

BLK4 : BLK4
bits : 4 - 4 (1 bit)
access : read-only

BLK5 : BLK5
bits : 5 - 5 (1 bit)
access : read-only

BLK6 : BLK6
bits : 6 - 6 (1 bit)
access : read-only

BLK7 : BLK7
bits : 7 - 7 (1 bit)
access : read-only

BLK8 : BLK8
bits : 8 - 8 (1 bit)
access : read-only

BLK9 : BLK9
bits : 9 - 9 (1 bit)
access : read-only

BLK10 : BLK10
bits : 10 - 10 (1 bit)
access : read-only

BLK11 : BLK11
bits : 11 - 11 (1 bit)
access : read-only

BLK12 : BLK12
bits : 12 - 12 (1 bit)
access : read-only

BLK13 : BLK13
bits : 13 - 13 (1 bit)
access : read-only

BLK14 : BLK14
bits : 14 - 14 (1 bit)
access : read-only

BLK15 : BLK15
bits : 15 - 15 (1 bit)
access : read-only


PSR6

Flash Protect Status Register 6
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PSR6 PSR6 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DBLK0 DBLK1 DBLK2 DBLK3 DBLK4 DBLK5 DBLK6 DBLK7

DBLK0 : DBLK0
bits : 0 - 0 (1 bit)
access : read-only

DBLK1 : DBLK1
bits : 1 - 1 (1 bit)
access : read-only

DBLK2 : DBLK2
bits : 2 - 2 (1 bit)
access : read-only

DBLK3 : DBLK3
bits : 3 - 3 (1 bit)
access : read-only

DBLK4 : DBLK4
bits : 4 - 4 (1 bit)
access : read-only

DBLK5 : DBLK5
bits : 5 - 5 (1 bit)
access : read-only

DBLK6 : DBLK6
bits : 6 - 6 (1 bit)
access : read-only

DBLK7 : DBLK7
bits : 7 - 7 (1 bit)
access : read-only


PMR0

Flash Protect Mask Register 0
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMR0 PMR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PM0 PM1 PM2 PM3 PM4 PM5 PM6 PM7

PM0 : PM0
bits : 0 - 0 (1 bit)
access : read-write

PM1 : PM1
bits : 1 - 1 (1 bit)
access : read-write

PM2 : PM2
bits : 2 - 2 (1 bit)
access : read-write

PM3 : PM3
bits : 3 - 3 (1 bit)
access : read-write

PM4 : PM4
bits : 4 - 4 (1 bit)
access : read-write

PM5 : PM5
bits : 5 - 5 (1 bit)
access : read-write

PM6 : PM6
bits : 6 - 6 (1 bit)
access : read-write

PM7 : PM7
bits : 7 - 7 (1 bit)
access : read-write


PMR1

Flash Protect Mask Register 1
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMR1 PMR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MSK1 MSK2 MSK3 MSK4 MSK5 MSK6 MSK7 MSK8 MSK9 MSK10 MSK11 MSK12 MSK13 MSK14 MSK15

MSK1 : MSK1
bits : 1 - 1 (1 bit)
access : read-write

MSK2 : MSK2
bits : 2 - 2 (1 bit)
access : read-write

MSK3 : MSK3
bits : 3 - 3 (1 bit)
access : read-write

MSK4 : MSK4
bits : 4 - 4 (1 bit)
access : read-write

MSK5 : MSK5
bits : 5 - 5 (1 bit)
access : read-write

MSK6 : MSK6
bits : 6 - 6 (1 bit)
access : read-write

MSK7 : MSK7
bits : 7 - 7 (1 bit)
access : read-write

MSK8 : MSK8
bits : 8 - 8 (1 bit)
access : read-write

MSK9 : MSK9
bits : 9 - 9 (1 bit)
access : read-write

MSK10 : MSK10
bits : 10 - 10 (1 bit)
access : read-write

MSK11 : MSK11
bits : 11 - 11 (1 bit)
access : read-write

MSK12 : MSK12
bits : 12 - 12 (1 bit)
access : read-write

MSK13 : MSK13
bits : 13 - 13 (1 bit)
access : read-write

MSK14 : MSK14
bits : 14 - 14 (1 bit)
access : read-write

MSK15 : MSK15
bits : 15 - 15 (1 bit)
access : read-write


PMR6

Flash Protect Mask Register 6
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMR6 PMR6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DMSK0 DMSK1 DMSK2 DMSK3 DMSK4 DMSK5 DMSK6 DMSK7

DMSK0 : DMSK0
bits : 0 - 0 (1 bit)
access : read-write

DMSK1 : DMSK1
bits : 1 - 1 (1 bit)
access : read-write

DMSK2 : DMSK2
bits : 2 - 2 (1 bit)
access : read-write

DMSK3 : DMSK3
bits : 3 - 3 (1 bit)
access : read-write

DMSK4 : DMSK4
bits : 4 - 4 (1 bit)
access : read-write

DMSK5 : DMSK5
bits : 5 - 5 (1 bit)
access : read-write

DMSK6 : DMSK6
bits : 6 - 6 (1 bit)
access : read-write

DMSK7 : DMSK7
bits : 7 - 7 (1 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.