\n
address_offset : 0x0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x38 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x28 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x34 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected
address_offset : 0x8 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : reserved
protection : not protected
Port G Data Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PG0 : PG0
bits : 0 - 0 (1 bit)
access : read-write
PG1 : PG1
bits : 1 - 1 (1 bit)
access : read-write
PG2 : PG2
bits : 2 - 2 (1 bit)
access : read-write
PG3 : PG3
bits : 3 - 3 (1 bit)
access : read-write
Port G Open Drain Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PG0OD : PG0OD
bits : 0 - 0 (1 bit)
access : read-write
PG1OD : PG1OD
bits : 1 - 1 (1 bit)
access : read-write
PG2OD : PG2OD
bits : 2 - 2 (1 bit)
access : read-write
PG3OD : PG3OD
bits : 3 - 3 (1 bit)
access : read-write
Port G Pull-up Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PG0UP : PG0UP
bits : 0 - 0 (1 bit)
access : read-write
PG1UP : PG1UP
bits : 1 - 1 (1 bit)
access : read-write
PG2UP : PG2UP
bits : 2 - 2 (1 bit)
access : read-write
PG3UP : PG3UP
bits : 3 - 3 (1 bit)
access : read-write
Port G Pull-down Control Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PG0DN : PG0DN
bits : 0 - 0 (1 bit)
access : read-write
PG1DN : PG1DN
bits : 1 - 1 (1 bit)
access : read-write
PG2DN : PG2DN
bits : 2 - 2 (1 bit)
access : read-write
PG3DN : PG3DN
bits : 3 - 3 (1 bit)
access : read-write
Port G Input Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PG0IE : PG0IE
bits : 0 - 0 (1 bit)
access : read-write
PG1IE : PG1IE
bits : 1 - 1 (1 bit)
access : read-write
PG2IE : PG2IE
bits : 2 - 2 (1 bit)
access : read-write
PG3IE : PG3IE
bits : 3 - 3 (1 bit)
access : read-write
Port G Output Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PG0C : PG0C
bits : 0 - 0 (1 bit)
access : read-write
PG1C : PG1C
bits : 1 - 1 (1 bit)
access : read-write
PG2C : PG2C
bits : 2 - 2 (1 bit)
access : read-write
PG3C : PG3C
bits : 3 - 3 (1 bit)
access : read-write
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