\n
address_offset : 0x0 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection :
MDIO block control
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MD_RST : TBD
bits : 0 - 0 (1 bit)
access : write-only
MD_PHM : TBD
bits : 1 - 1 (1 bit)
MD_DRV : TBD
bits : 2 - 2 (1 bit)
Enumeration:
0 : MD_DRV_OD
MDIO drive open drain.
1 : MD_DRV_PP
MDIO drive push-pull.
End of enumeration elements list.
MDIO data for transmission
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MD_TXD : TBD
bits : 0 - 15 (16 bit)
MDIO PHYADDR software values and selection and DEVADD
address_offset : 0x14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MD_PHYSW : TBD
bits : 0 - 4 (5 bit)
MD_PHYSEL : TBD
bits : 5 - 9 (5 bit)
MD_DEVADD : TBD
bits : 10 - 14 (5 bit)
MDIO progress signaling through frame
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MD_WRF : TBD
bits : 0 - 0 (1 bit)
access : read-only
MD_ADRF : TBD
bits : 1 - 1 (1 bit)
access : read-only
MD_INCF : TBD
bits : 2 - 2 (1 bit)
access : read-only
MD_RDF : TBD
bits : 3 - 3 (1 bit)
access : read-only
MD_DEVM : TBD
bits : 4 - 4 (1 bit)
access : read-only
MD_DEVN : TBD
bits : 5 - 5 (1 bit)
access : read-only
MD_PHYM : TBD
bits : 6 - 6 (1 bit)
access : read-only
MD_PHYN : TBD
bits : 7 - 7 (1 bit)
access : read-only
MDIO interrupt enables
address_offset : 0x1C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MD_WRFI : TBD
bits : 0 - 0 (1 bit)
MD_ADRI : TBD
bits : 1 - 1 (1 bit)
MD_INCFI : TBD
bits : 2 - 2 (1 bit)
MD_RDFI : TBD
bits : 3 - 3 (1 bit)
MD_DEVMI : TBD
bits : 4 - 4 (1 bit)
MD_DEVNI : TBD
bits : 5 - 5 (1 bit)
MD_PHYMI : TBD
bits : 6 - 6 (1 bit)
MD_PHYNI : TBD
bits : 7 - 7 (1 bit)
MDIO read PHYADDR pins
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MD_PIN : TBD
bits : 0 - 4 (5 bit)
access : read-only
MDIO received frame control information
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MD_OP : TBD
bits : 0 - 1 (2 bit)
Enumeration:
0 : MD_OP_ADF
Address frame.
1 : MD_OP_WRF
Write frame.
2 : MD_OP_INCF
PostReadIncAdd frame.
3 : MD_OP_RDF
Read frame.
End of enumeration elements list.
MD_PHY : TBD
bits : 2 - 6 (5 bit)
MD_DEV : TBD
bits : 7 - 11 (5 bit)
MDIO received data
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MD_RXD : TBD
bits : 0 - 15 (16 bit)
MDIO received address
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MD_ADR : TBD
bits : 0 - 15 (16 bit)
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