\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : AES enable
bits : 0 - 0 (1 bit)
DATATYPE : Data type selection (for data in and data out to/from the cryptographic block)
bits : 1 - 2 (2 bit)
MODE : AES operating mode
bits : 3 - 4 (2 bit)
CHMOD : AES chaining mode
bits : 5 - 6 (2 bit)
CCFC : Computation complete flag clear
bits : 7 - 7 (1 bit)
ERRC : Error clear
bits : 8 - 8 (1 bit)
CCFIE : CCF flag interrupt enable
bits : 9 - 9 (1 bit)
ERRIE : Error interrupt enable
bits : 10 - 10 (1 bit)
DMAINEN : Enable DMA management of data input phase
bits : 11 - 11 (1 bit)
DMAOUTEN : Enable DMA management of data output phase
bits : 12 - 12 (1 bit)
GCMPH : Used only for GCM, GMAC and CMAC algorithms and has no effect when other
bits : 13 - 14 (2 bit)
KEYSIZE : Key size selection
bits : 18 - 18 (1 bit)
key register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEYR0 : Data output register
bits : 0 - 30 (31 bit)
key register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEYR1 : Data output register
bits : 0 - 31 (32 bit)
key register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
KEYR2 : Data output register
bits : 0 - 30 (31 bit)
key register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
KEYR3 : Data output register
bits : 0 - 31 (32 bit)
initialization vector register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IVR0 : initialization vector register
bits : 0 - 31 (32 bit)
initialization vector register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IVR1 : Initialization vector register
bits : 0 - 31 (32 bit)
initialization vector register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IVR2 : Initialization vector register
bits : 0 - 31 (32 bit)
initialization vector register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IVR3 : Initialization vector register
bits : 0 - 31 (32 bit)
key registers
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEYR4 : Data output register
bits : 0 - 31 (32 bit)
key registers
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEYR5 : Data output register
bits : 0 - 31 (32 bit)
key registers
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEYR6 : Data output register
bits : 0 - 31 (32 bit)
key registers
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEYR7 : Data output register
bits : 0 - 31 (32 bit)
status register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CCF : Computation complete flag
bits : 0 - 0 (1 bit)
RDERR : Read error flag
bits : 1 - 1 (1 bit)
WRERR : Write error flag
bits : 2 - 2 (1 bit)
Busy : Busy flag
bits : 3 - 3 (1 bit)
Suspend registers
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUSP0R : AES Suspend
bits : 0 - 31 (32 bit)
Suspend registers
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUSP1R : AES Suspend
bits : 0 - 31 (32 bit)
Suspend registers
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUSP2R : AES Suspend
bits : 0 - 31 (32 bit)
Suspend registers
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUSP3R : IV127
bits : 0 - 31 (32 bit)
Suspend registers
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUSP4R : AES Suspend
bits : 0 - 31 (32 bit)
Suspend registers
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUSP5R : AES Suspend
bits : 0 - 31 (32 bit)
Suspend registers
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUSP6R : AES Suspend
bits : 0 - 31 (32 bit)
Suspend registers
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SUSP7R : AES Suspend
bits : 0 - 31 (32 bit)
data input register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DINR : Data input
bits : 0 - 31 (32 bit)
data output register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DOUTR : Data output
bits : 0 - 31 (32 bit)
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