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RTC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

TR

PRER

WUTR

ALRMAR

ALRMBR

WPR

SSR

SHIFTR

TSTR

TSDR

TSSSR

CALR

DR

TAMPCR

ALRMASSR

ALRMBSSR

OR

BKP0R

BKP1R

BKP2R

BKP3R

BKP4R

BKP5R

BKP6R

BKP7R

BKP8R

BKP9R

BKP10R

BKP11R

CR

BKP12R

BKP13R

BKP14R

BKP15R

BKP16R

BKP17R

BKP18R

BKP19R

BKP20R

BKP21R

BKP22R

BKP23R

BKP24R

BKP25R

BKP26R

BKP27R

ISR

BKP28R

BKP29R

BKP30R

BKP31R


TR

time register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TR TR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SU ST MNU MNT HU HT PM

SU : Second units in BCD format
bits : 0 - 3 (4 bit)

ST : Second tens in BCD format
bits : 4 - 6 (3 bit)

MNU : Minute units in BCD format
bits : 8 - 11 (4 bit)

MNT : Minute tens in BCD format
bits : 12 - 14 (3 bit)

HU : Hour units in BCD format
bits : 16 - 19 (4 bit)

HT : Hour tens in BCD format
bits : 20 - 21 (2 bit)

PM : AM/PM notation
bits : 22 - 22 (1 bit)


PRER

prescaler register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRER PRER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PREDIV_S PREDIV_A

PREDIV_S : Synchronous prescaler factor
bits : 0 - 14 (15 bit)

PREDIV_A : Asynchronous prescaler factor
bits : 16 - 22 (7 bit)


WUTR

wakeup timer register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WUTR WUTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WUT

WUT : Wakeup auto-reload value bits
bits : 0 - 15 (16 bit)


ALRMAR

alarm A register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALRMAR ALRMAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SU ST MSK1 MNU MNT MSK2 HU HT PM MSK3 DU DT WDSEL MSK4

SU : Second units in BCD format
bits : 0 - 3 (4 bit)

ST : Second tens in BCD format
bits : 4 - 6 (3 bit)

MSK1 : Alarm A seconds mask
bits : 7 - 7 (1 bit)

MNU : Minute units in BCD format
bits : 8 - 11 (4 bit)

MNT : Minute tens in BCD format
bits : 12 - 14 (3 bit)

MSK2 : Alarm A minutes mask
bits : 15 - 15 (1 bit)

HU : Hour units in BCD format
bits : 16 - 19 (4 bit)

HT : Hour tens in BCD format
bits : 20 - 21 (2 bit)

PM : AM/PM notation
bits : 22 - 22 (1 bit)

MSK3 : Alarm A hours mask
bits : 23 - 23 (1 bit)

DU : Date units or day in BCD format
bits : 24 - 27 (4 bit)

DT : Date tens in BCD format
bits : 28 - 29 (2 bit)

WDSEL : Week day selection
bits : 30 - 30 (1 bit)

MSK4 : Alarm A date mask
bits : 31 - 31 (1 bit)


ALRMBR

alarm B register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALRMBR ALRMBR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SU ST MSK1 MNU MNT MSK2 HU HT PM MSK3 DU DT WDSEL MSK4

SU : Second units in BCD format
bits : 0 - 3 (4 bit)

ST : Second tens in BCD format
bits : 4 - 6 (3 bit)

MSK1 : Alarm B seconds mask
bits : 7 - 7 (1 bit)

MNU : Minute units in BCD format
bits : 8 - 11 (4 bit)

MNT : Minute tens in BCD format
bits : 12 - 14 (3 bit)

MSK2 : Alarm B minutes mask
bits : 15 - 15 (1 bit)

HU : Hour units in BCD format
bits : 16 - 19 (4 bit)

HT : Hour tens in BCD format
bits : 20 - 21 (2 bit)

PM : AM/PM notation
bits : 22 - 22 (1 bit)

MSK3 : Alarm B hours mask
bits : 23 - 23 (1 bit)

DU : Date units or day in BCD format
bits : 24 - 27 (4 bit)

DT : Date tens in BCD format
bits : 28 - 29 (2 bit)

WDSEL : Week day selection
bits : 30 - 30 (1 bit)

MSK4 : Alarm B date mask
bits : 31 - 31 (1 bit)


WPR

write protection register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

WPR WPR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 KEY

KEY : Write protection key
bits : 0 - 7 (8 bit)


SSR

sub second register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SSR SSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SS

SS : Sub second value
bits : 0 - 15 (16 bit)


SHIFTR

shift control register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

SHIFTR SHIFTR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SUBFS ADD1S

SUBFS : Subtract a fraction of a second
bits : 0 - 14 (15 bit)

ADD1S : Add one second
bits : 31 - 31 (1 bit)


TSTR

time stamp time register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TSTR TSTR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SU ST MNU MNT HU HT PM

SU : Second units in BCD format
bits : 0 - 3 (4 bit)

ST : Second tens in BCD format
bits : 4 - 6 (3 bit)

MNU : Minute units in BCD format
bits : 8 - 11 (4 bit)

MNT : Minute tens in BCD format
bits : 12 - 14 (3 bit)

HU : Hour units in BCD format
bits : 16 - 19 (4 bit)

HT : Hour tens in BCD format
bits : 20 - 21 (2 bit)

PM : AM/PM notation
bits : 22 - 22 (1 bit)


TSDR

time stamp date register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TSDR TSDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DU DT MU MT WDU

DU : Date units in BCD format
bits : 0 - 3 (4 bit)

DT : Date tens in BCD format
bits : 4 - 5 (2 bit)

MU : Month units in BCD format
bits : 8 - 11 (4 bit)

MT : Month tens in BCD format
bits : 12 - 12 (1 bit)

WDU : Week day units
bits : 13 - 15 (3 bit)


TSSSR

timestamp sub second register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TSSSR TSSSR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SS

SS : Sub second value
bits : 0 - 15 (16 bit)


CALR

calibration register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CALR CALR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CALM CALW16 CALW8 CALP

CALM : Calibration minus
bits : 0 - 8 (9 bit)

CALW16 : Use a 16-second calibration cycle period
bits : 13 - 13 (1 bit)

CALW8 : Use an 8-second calibration cycle period
bits : 14 - 14 (1 bit)

CALP : Increase frequency of RTC by 488.5 ppm
bits : 15 - 15 (1 bit)


DR

date register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DR DR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DU DT MU MT WDU YU YT

DU : Date units in BCD format
bits : 0 - 3 (4 bit)

DT : Date tens in BCD format
bits : 4 - 5 (2 bit)

MU : Month units in BCD format
bits : 8 - 11 (4 bit)

MT : Month tens in BCD format
bits : 12 - 12 (1 bit)

WDU : Week day units
bits : 13 - 15 (3 bit)

YU : Year units in BCD format
bits : 16 - 19 (4 bit)

YT : Year tens in BCD format
bits : 20 - 23 (4 bit)


TAMPCR

tamper configuration register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TAMPCR TAMPCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TAMP1E TAMP1TRG TAMPIE TAMP2E TAMP2TRG TAMP3E TAMP3TRG TAMPTS TAMPFREQ TAMPFLT TAMPPRCH TAMPPUDIS TAMP1IE TAMP1NOERASE TAMP1MF TAMP2IE TAMP2NOERASE TAMP2MF TAMP3IE TAMP3NOERASE TAMP3MF

TAMP1E : Tamper 1 detection enable
bits : 0 - 0 (1 bit)

TAMP1TRG : Active level for tamper 1
bits : 1 - 1 (1 bit)

TAMPIE : Tamper interrupt enable
bits : 2 - 2 (1 bit)

TAMP2E : Tamper 2 detection enable
bits : 3 - 3 (1 bit)

TAMP2TRG : Active level for tamper 2
bits : 4 - 4 (1 bit)

TAMP3E : Tamper 3 detection enable
bits : 5 - 5 (1 bit)

TAMP3TRG : Active level for tamper 3
bits : 6 - 6 (1 bit)

TAMPTS : Activate timestamp on tamper detection event
bits : 7 - 7 (1 bit)

TAMPFREQ : Tamper sampling frequency
bits : 8 - 10 (3 bit)

TAMPFLT : Tamper filter count
bits : 11 - 12 (2 bit)

TAMPPRCH : Tamper precharge duration
bits : 13 - 14 (2 bit)

TAMPPUDIS : TAMPER pull-up disable
bits : 15 - 15 (1 bit)

TAMP1IE : Tamper 1 interrupt enable
bits : 16 - 16 (1 bit)

TAMP1NOERASE : Tamper 1 no erase
bits : 17 - 17 (1 bit)

TAMP1MF : Tamper 1 mask flag
bits : 18 - 18 (1 bit)

TAMP2IE : Tamper 2 interrupt enable
bits : 19 - 19 (1 bit)

TAMP2NOERASE : Tamper 2 no erase
bits : 20 - 20 (1 bit)

TAMP2MF : Tamper 2 mask flag
bits : 21 - 21 (1 bit)

TAMP3IE : Tamper 3 interrupt enable
bits : 22 - 22 (1 bit)

TAMP3NOERASE : Tamper 3 no erase
bits : 23 - 23 (1 bit)

TAMP3MF : Tamper 3 mask flag
bits : 24 - 24 (1 bit)


ALRMASSR

alarm A sub second register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALRMASSR ALRMASSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SS MASKSS

SS : Sub seconds value
bits : 0 - 14 (15 bit)

MASKSS : Mask the most-significant bits starting at this bit
bits : 24 - 27 (4 bit)


ALRMBSSR

alarm B sub second register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALRMBSSR ALRMBSSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SS MASKSS

SS : Sub seconds value
bits : 0 - 14 (15 bit)

MASKSS : Mask the most-significant bits starting at this bit
bits : 24 - 27 (4 bit)


OR

option register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OR OR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RTC_ALARM_TYPE RTC_OUT_RMP

RTC_ALARM_TYPE : RTC_ALARM on PC13 output type
bits : 0 - 0 (1 bit)

RTC_OUT_RMP : RTC_OUT remap
bits : 1 - 1 (1 bit)


BKP0R

backup register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP0R BKP0R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP1R

backup register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP1R BKP1R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP2R

backup register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP2R BKP2R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP3R

backup register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP3R BKP3R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP4R

backup register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP4R BKP4R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP5R

backup register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP5R BKP5R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP6R

backup register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP6R BKP6R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP7R

backup register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP7R BKP7R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP8R

backup register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP8R BKP8R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP9R

backup register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP9R BKP9R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP10R

backup register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP10R BKP10R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP11R

backup register
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP11R BKP11R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


CR

control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WCKSEL TSEDGE REFCKON BYPSHAD FMT ALRAE ALRBE WUTE TSE ALRAIE ALRBIE WUTIE TSIE ADD1H SUB1H BKP COSEL POL OSEL COE ITSE

WCKSEL : Wakeup clock selection
bits : 0 - 2 (3 bit)

TSEDGE : Time-stamp event active edge
bits : 3 - 3 (1 bit)

REFCKON : Reference clock detection enable (50 or 60 Hz)
bits : 4 - 4 (1 bit)

BYPSHAD : Bypass the shadow registers
bits : 5 - 5 (1 bit)

FMT : Hour format
bits : 6 - 6 (1 bit)

ALRAE : Alarm A enable
bits : 8 - 8 (1 bit)

ALRBE : Alarm B enable
bits : 9 - 9 (1 bit)

WUTE : Wakeup timer enable
bits : 10 - 10 (1 bit)

TSE : Time stamp enable
bits : 11 - 11 (1 bit)

ALRAIE : Alarm A interrupt enable
bits : 12 - 12 (1 bit)

ALRBIE : Alarm B interrupt enable
bits : 13 - 13 (1 bit)

WUTIE : Wakeup timer interrupt enable
bits : 14 - 14 (1 bit)

TSIE : Time-stamp interrupt enable
bits : 15 - 15 (1 bit)

ADD1H : Add 1 hour (summer time change)
bits : 16 - 16 (1 bit)

SUB1H : Subtract 1 hour (winter time change)
bits : 17 - 17 (1 bit)

BKP : Backup
bits : 18 - 18 (1 bit)

COSEL : Calibration output selection
bits : 19 - 19 (1 bit)

POL : Output polarity
bits : 20 - 20 (1 bit)

OSEL : Output selection
bits : 21 - 22 (2 bit)

COE : Calibration output enable
bits : 23 - 23 (1 bit)

ITSE : timestamp on internal event enable
bits : 24 - 24 (1 bit)


BKP12R

backup register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP12R BKP12R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP13R

backup register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP13R BKP13R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP14R

backup register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP14R BKP14R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP15R

backup register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP15R BKP15R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP16R

backup register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP16R BKP16R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP17R

backup register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP17R BKP17R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP18R

backup register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP18R BKP18R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP19R

backup register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP19R BKP19R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP20R

backup register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP20R BKP20R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP21R

backup register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP21R BKP21R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP22R

backup register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP22R BKP22R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP23R

backup register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP23R BKP23R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP24R

backup register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP24R BKP24R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP25R

backup register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP25R BKP25R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP26R

backup register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP26R BKP26R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP27R

backup register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP27R BKP27R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


ISR

initialization and status register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISR ISR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALRAWF ALRBWF WUTWF SHPF INITS RSF INITF INIT ALRAF ALRBF WUTF TSF TSOVF TAMP1F TAMP2F TAMP3F RECALPF

ALRAWF : Alarm A write flag
bits : 0 - 0 (1 bit)
access : read-only

ALRBWF : Alarm B write flag
bits : 1 - 1 (1 bit)
access : read-only

WUTWF : Wakeup timer write flag
bits : 2 - 2 (1 bit)
access : read-only

SHPF : Shift operation pending
bits : 3 - 3 (1 bit)
access : read-write

INITS : Initialization status flag
bits : 4 - 4 (1 bit)
access : read-only

RSF : Registers synchronization flag
bits : 5 - 5 (1 bit)
access : read-write

INITF : Initialization flag
bits : 6 - 6 (1 bit)
access : read-only

INIT : Initialization mode
bits : 7 - 7 (1 bit)
access : read-write

ALRAF : Alarm A flag
bits : 8 - 8 (1 bit)
access : read-write

ALRBF : Alarm B flag
bits : 9 - 9 (1 bit)
access : read-write

WUTF : Wakeup timer flag
bits : 10 - 10 (1 bit)
access : read-write

TSF : Time-stamp flag
bits : 11 - 11 (1 bit)
access : read-write

TSOVF : Time-stamp overflow flag
bits : 12 - 12 (1 bit)
access : read-write

TAMP1F : Tamper detection flag
bits : 13 - 13 (1 bit)
access : read-write

TAMP2F : RTC_TAMP2 detection flag
bits : 14 - 14 (1 bit)
access : read-write

TAMP3F : RTC_TAMP3 detection flag
bits : 15 - 15 (1 bit)
access : read-write

RECALPF : Recalibration pending Flag
bits : 16 - 16 (1 bit)
access : read-only


BKP28R

backup register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP28R BKP28R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP29R

backup register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP29R BKP29R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP30R

backup register
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP30R BKP30R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)


BKP31R

backup register
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKP31R BKP31R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BKP

BKP : BKP
bits : 0 - 31 (32 bit)



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