\n
address_offset : 0x0 Bytes (0x0)
size : 0xD byte (0x0)
mem_usage : registers
protection :
Floating-point context control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LSPACT : LSPACT
bits : 0 - 0 (1 bit)
USER : USER
bits : 1 - 1 (1 bit)
THREAD : THREAD
bits : 3 - 3 (1 bit)
HFRDY : HFRDY
bits : 4 - 4 (1 bit)
MMRDY : MMRDY
bits : 5 - 5 (1 bit)
BFRDY : BFRDY
bits : 6 - 6 (1 bit)
MONRDY : MONRDY
bits : 8 - 8 (1 bit)
LSPEN : LSPEN
bits : 30 - 30 (1 bit)
ASPEN : ASPEN
bits : 31 - 31 (1 bit)
Floating-point context address register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADDRESS : Location of unpopulated floating-point
bits : 3 - 31 (29 bit)
Floating-point status control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IOC : Invalid operation cumulative exception bit
bits : 0 - 0 (1 bit)
DZC : Division by zero cumulative exception bit.
bits : 1 - 1 (1 bit)
OFC : Overflow cumulative exception bit
bits : 2 - 2 (1 bit)
UFC : Underflow cumulative exception bit
bits : 3 - 3 (1 bit)
IXC : Inexact cumulative exception bit
bits : 4 - 4 (1 bit)
IDC : Input denormal cumulative exception bit.
bits : 7 - 7 (1 bit)
RMode : Rounding Mode control field
bits : 22 - 23 (2 bit)
FZ : Flush-to-zero mode control bit:
bits : 24 - 24 (1 bit)
DN : Default NaN mode control bit
bits : 25 - 25 (1 bit)
AHP : Alternative half-precision control bit
bits : 26 - 26 (1 bit)
V : Overflow condition code flag
bits : 28 - 28 (1 bit)
C : Carry condition code flag
bits : 29 - 29 (1 bit)
Z : Zero condition code flag
bits : 30 - 30 (1 bit)
N : Negative condition code flag
bits : 31 - 31 (1 bit)
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