\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INIT : Initialize message digest calculation
bits : 2 - 2 (1 bit)
access : write-only
DMAE : DMA enable
bits : 3 - 3 (1 bit)
access : read-write
DATATYPE : Data type selection
bits : 4 - 5 (2 bit)
access : read-write
MODE : Mode selection
bits : 6 - 6 (1 bit)
access : read-write
ALGO0 : Algorithm selection
bits : 7 - 7 (1 bit)
access : read-write
NBW : Number of words already pushed
bits : 8 - 11 (4 bit)
access : read-only
DINNE : DIN not empty
bits : 12 - 12 (1 bit)
access : read-only
MDMAT : Multiple DMA Transfers
bits : 13 - 13 (1 bit)
access : read-write
LKEY : Long key selection
bits : 16 - 16 (1 bit)
access : read-write
ALGO1 : ALGO
bits : 18 - 18 (1 bit)
access : read-write
digest registers
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
H1 : H1
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR2 : CSR2
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR3 : CSR3
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR4 : CSR4
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR5 : CSR5
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR6 : CSR6
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR7 : CSR7
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR8 : CSR8
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR9 : CSR9
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR10 : CSR10
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR11 : CSR11
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR12 : CSR12
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR13 : CSR13
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR14 : CSR14
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR15 : CSR15
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR16 : CSR16
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR17 : CSR17
bits : 0 - 31 (32 bit)
digest registers
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
H2 : H2
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR18 : CSR18
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR19 : CSR19
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR20 : CSR20
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR21 : CSR21
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR22 : CSR22
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR23 : CSR23
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR24 : CSR24
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR25 : CSR25
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR26 : CSR26
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR27 : CSR27
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR28 : CSR28
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR29 : CSR29
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR30 : CSR30
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x174 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR31 : CSR31
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR32 : CSR32
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x17C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR33 : CSR33
bits : 0 - 31 (32 bit)
digest registers
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
H3 : H3
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR34 : CSR34
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x184 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR35 : CSR35
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR36 : CSR36
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x18C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR37 : CSR37
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR38 : CSR38
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x194 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR39 : CSR39
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x198 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR40 : CSR40
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x19C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR41 : CSR41
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR42 : CSR42
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR43 : CSR43
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR44 : CSR44
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x1AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR45 : CSR45
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x1B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR46 : CSR46
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x1B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR47 : CSR47
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x1B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR48 : CSR48
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x1BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR49 : CSR49
bits : 0 - 31 (32 bit)
digest registers
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
H4 : H4
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x1C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR50 : CSR50
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x1C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR51 : CSR51
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x1C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR52 : CSR52
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0x1CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR53 : CSR53
bits : 0 - 31 (32 bit)
interrupt enable register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DINIE : Data input interrupt enable
bits : 0 - 0 (1 bit)
DCIE : Digest calculation completion interrupt enable
bits : 1 - 1 (1 bit)
status register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DINIS : Data input interrupt status
bits : 0 - 0 (1 bit)
access : read-write
DCIS : Digest calculation completion interrupt status
bits : 1 - 1 (1 bit)
access : read-write
DMAS : DMA Status
bits : 2 - 2 (1 bit)
access : read-only
BUSY : Busy bit
bits : 3 - 3 (1 bit)
access : read-only
read-only
address_offset : 0x324 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
H5 : H5
bits : 0 - 31 (32 bit)
read-only
address_offset : 0x328 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
H6 : H6
bits : 0 - 31 (32 bit)
read-only
address_offset : 0x32C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
H7 : H7
bits : 0 - 31 (32 bit)
data input register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATAIN : Data input
bits : 0 - 31 (32 bit)
start register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NBLW : Number of valid bits in the last word of the message
bits : 0 - 4 (5 bit)
access : read-write
DCAL : Digest calculation
bits : 8 - 8 (1 bit)
access : write-only
digest registers
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
H0 : H0
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR0 : CSR0
bits : 0 - 31 (32 bit)
context swap registers
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CSR1 : CSR1
bits : 0 - 31 (32 bit)
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