Infineon XMC4100 2024.04.27 SVD file CM4 r2p0 little true true 6 false 8 32 CAN Controller Area Networks CAN 0x0 0x0 0x200 registers n CAN0_0 MultiCAN 76 CAN0_1 MultiCAN 77 CAN0_2 MultiCAN 78 CAN0_3 MultiCAN 79 CAN0_4 MultiCAN 80 CAN0_5 MultiCAN 81 CAN0_6 MultiCAN 82 CAN0_7 MultiCAN 83 CLC CAN Clock Control Register 0x0 32 read-write n 0x0 0x0 DISR Module Disable Request Bit 0 read-write DISS Module Disable Status Bit 1 read-only EDIS Sleep Mode Enable Control 3 read-write SBWE Module Suspend Bit Write Enable for OCDS 4 write-only FDR CAN Fractional Divider Register 0xC 32 read-write n 0x0 0x0 DISCLK Disable Clock 31 read-write DM Divider Mode 14 1 read-write ENHW Enable Hardware Clock Control 30 read-write RESULT Result Value 16 9 read-only SC Suspend Control 12 1 read-write SM Suspend Mode 11 read-write STEP Step Value 0 9 read-write SUSACK Suspend Mode Acknowledge 28 read-only SUSREQ Suspend Mode Request 29 read-only ID Module Identification Register 0x8 32 read-write n 0x0 0x0 MOD_NUMBER Module Number Value 16 15 read-only MOD_REV Module Revision Number 0 7 read-only MOD_TYPE Module Type 8 7 read-only value1 Define the module as a 32-bit module. 0xC0 LIST[0] List Register 0x200 32 read-write n 0x0 0x0 BEGIN List Begin 0 7 read-only EMPTY List Empty Indication 24 read-only value1 At least one message object is allocated to list i. #0 value2 No message object is allocated to the list x. List x is empty. #1 END List End 8 7 read-only SIZE List Size 16 7 read-only LIST[1] List Register 0x304 32 read-write n 0x0 0x0 BEGIN List Begin 0 7 read-only EMPTY List Empty Indication 24 read-only value1 At least one message object is allocated to list i. #0 value2 No message object is allocated to the list x. List x is empty. #1 END List End 8 7 read-only SIZE List Size 16 7 read-only LIST[2] List Register 0x40C 32 read-write n 0x0 0x0 BEGIN List Begin 0 7 read-only EMPTY List Empty Indication 24 read-only value1 At least one message object is allocated to list i. #0 value2 No message object is allocated to the list x. List x is empty. #1 END List End 8 7 read-only SIZE List Size 16 7 read-only LIST[3] List Register 0x518 32 read-write n 0x0 0x0 BEGIN List Begin 0 7 read-only EMPTY List Empty Indication 24 read-only value1 At least one message object is allocated to list i. #0 value2 No message object is allocated to the list x. List x is empty. #1 END List End 8 7 read-only SIZE List Size 16 7 read-only LIST[4] List Register 0x628 32 read-write n 0x0 0x0 BEGIN List Begin 0 7 read-only EMPTY List Empty Indication 24 read-only value1 At least one message object is allocated to list i. #0 value2 No message object is allocated to the list x. List x is empty. #1 END List End 8 7 read-only SIZE List Size 16 7 read-only LIST[5] List Register 0x73C 32 read-write n 0x0 0x0 BEGIN List Begin 0 7 read-only EMPTY List Empty Indication 24 read-only value1 At least one message object is allocated to list i. #0 value2 No message object is allocated to the list x. List x is empty. #1 END List End 8 7 read-only SIZE List Size 16 7 read-only LIST[6] List Register 0x854 32 read-write n 0x0 0x0 BEGIN List Begin 0 7 read-only EMPTY List Empty Indication 24 read-only value1 At least one message object is allocated to list i. #0 value2 No message object is allocated to the list x. List x is empty. #1 END List End 8 7 read-only SIZE List Size 16 7 read-only LIST[7] List Register 0x970 32 read-write n 0x0 0x0 BEGIN List Begin 0 7 read-only EMPTY List Empty Indication 24 read-only value1 At least one message object is allocated to list i. #0 value2 No message object is allocated to the list x. List x is empty. #1 END List End 8 7 read-only SIZE List Size 16 7 read-only MCR Module Control Register 0x1C8 32 read-write n 0x0 0x0 MPSEL Message Pending Selector 12 3 read-write MITR Module Interrupt Trigger Register 0x1CC 32 read-write n 0x0 0x0 IT Interrupt Trigger 0 7 write-only MSID[0] Message Index Register 0x300 32 read-write n 0x0 0x0 INDEX Message Pending Index 0 5 read-only MSID[1] Message Index Register 0x484 32 read-write n 0x0 0x0 INDEX Message Pending Index 0 5 read-only MSID[2] Message Index Register 0x60C 32 read-write n 0x0 0x0 INDEX Message Pending Index 0 5 read-only MSID[3] Message Index Register 0x798 32 read-write n 0x0 0x0 INDEX Message Pending Index 0 5 read-only MSID[4] Message Index Register 0x928 32 read-write n 0x0 0x0 INDEX Message Pending Index 0 5 read-only MSID[5] Message Index Register 0xABC 32 read-write n 0x0 0x0 INDEX Message Pending Index 0 5 read-only MSID[6] Message Index Register 0xC54 32 read-write n 0x0 0x0 INDEX Message Pending Index 0 5 read-only MSID[7] Message Index Register 0xDF0 32 read-write n 0x0 0x0 INDEX Message Pending Index 0 5 read-only MSIMASK Message Index Mask Register 0x1C0 32 read-write n 0x0 0x0 IM Message Index Mask 0 31 read-write MSPND[0] Message Pending Register 0x280 32 read-write n 0x0 0x0 PND Message Pending 0 31 read-write MSPND[1] Message Pending Register 0x3C4 32 read-write n 0x0 0x0 PND Message Pending 0 31 read-write MSPND[2] Message Pending Register 0x50C 32 read-write n 0x0 0x0 PND Message Pending 0 31 read-write MSPND[3] Message Pending Register 0x658 32 read-write n 0x0 0x0 PND Message Pending 0 31 read-write MSPND[4] Message Pending Register 0x7A8 32 read-write n 0x0 0x0 PND Message Pending 0 31 read-write MSPND[5] Message Pending Register 0x8FC 32 read-write n 0x0 0x0 PND Message Pending 0 31 read-write MSPND[6] Message Pending Register 0xA54 32 read-write n 0x0 0x0 PND Message Pending 0 31 read-write MSPND[7] Message Pending Register 0xBB0 32 read-write n 0x0 0x0 PND Message Pending 0 31 read-write PANCTR Panel Control Register 0x1C4 32 read-write n 0x0 0x0 BUSY Panel Busy Flag 8 read-only value1 Panel has finished command and is ready to accept a new command. #0 value2 Panel operation is in progress. #1 PANAR1 Panel Argument 1 16 7 read-write PANAR2 Panel Argument 2 24 7 read-write PANCMD Panel Command 0 7 read-write RBUSY Result Busy Flag 9 read-only value1 No update of PANAR1 and PANAR2 is scheduled by the list controller. #0 value2 A list command is running (BUSY = 1) that will write results to PANAR1 and PANAR2, but the results are not yet available. #1 CAN_MO0 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO1 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO10 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO11 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO12 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO13 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO14 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO15 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO16 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO17 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO18 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO19 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO2 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO20 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO21 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO22 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO23 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO24 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO25 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO26 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO27 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO28 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO29 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO3 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO30 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO31 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO32 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO33 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO34 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO35 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO36 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO37 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO38 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO39 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO4 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO40 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO41 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO42 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO43 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO44 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO45 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO46 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO47 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO48 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO49 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO5 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO50 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO51 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO52 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO53 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO54 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO55 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO56 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO57 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO58 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO59 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO6 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO60 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO61 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO62 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO63 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO7 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO8 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_MO9 Controller Area Networks CAN 0x0 0x0 0x20 registers n MOAMR Message Object Acceptance Mask Register 0xC 32 read-write n 0x0 0x0 AM Acceptance Mask for Message Identifier 0 28 read-write MIDE Acceptance Mask Bit for Message IDE Bit 29 read-write value1 Message object n accepts the reception of both, standard and extended frames. #0 value2 Message object n receives frames only with matching IDE bit. #1 MOAR Message Object Arbitration Register 0x18 32 read-write n 0x0 0x0 ID CAN Identifier of Message Object n 0 28 read-write IDE Identifier Extension Bit of Message Object n 29 read-write value1 Message object n handles standard frames with 11-bit identifier. #0 value2 Message object n handles extended frames with 29-bit identifier. #1 PRI Priority Class 30 1 read-write value1 Applicable only if TTCAN is available. #00 value2 Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list. #01 value3 Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see ). #10 value4 Transmit acceptance filtering is based on the list order (as PRI = 01B). #11 MOCTR Message Object Control Register 0x1C 32 read-write n 0x0 0x0 RESDIR Reset/Set Message Direction 11 write-only RESMSGLST Reset/Set Message Lost 4 write-only RESMSGVAL Reset/Set Message Valid 5 write-only RESNEWDAT Reset/Set New Data 3 write-only RESRTSEL Reset/Set Receive/Transmit Selected 6 write-only RESRXEN Reset/Set Receive Enable 7 write-only RESRXPND Reset/Set Receive Pending 0 write-only RESRXUPD Reset/Set Receive Updating 2 write-only RESTXEN0 Reset/Set Transmit Enable 0 9 write-only RESTXEN1 Reset/Set Transmit Enable 1 10 write-only RESTXPND Reset/Set Transmit Pending 1 write-only RESTXRQ Reset/Set Transmit Request 8 write-only SETDIR Reset/Set Message Direction 27 write-only SETMSGLST Reset/Set Message Lost 20 write-only SETMSGVAL Reset/Set Message Valid 21 write-only SETNEWDAT Reset/Set New Data 19 write-only SETRTSEL Reset/Set Receive/Transmit Selected 22 write-only SETRXEN Reset/Set Receive Enable 23 write-only SETRXPND Reset/Set Receive Pending 16 write-only SETRXUPD Reset/Set Receive Updating 18 write-only SETTXEN0 Reset/Set Transmit Enable 0 25 write-only SETTXEN1 Reset/Set Transmit Enable 1 26 write-only SETTXPND Reset/Set Transmit Pending 17 write-only SETTXRQ Reset/Set Transmit Request 24 write-only MODATAH Message Object Data Register High 0x14 32 read-write n 0x0 0x0 DB4 Data Byte 4 of Message Object n 0 7 read-write DB5 Data Byte 5 of Message Object n 8 7 read-write DB6 Data Byte 6 of Message Object n 16 7 read-write DB7 Data Byte 7 of Message Object n 24 7 read-write MODATAL Message Object Data Register Low 0x10 32 read-write n 0x0 0x0 DB0 Data Byte 0 of Message Object n 0 7 read-write DB1 Data Byte 1 of Message Object n 8 7 read-write DB2 Data Byte 2 of Message Object n 16 7 read-write DB3 Data Byte 3 of Message Object n 24 7 read-write MOFCR Message Object Function Control Register 0x0 32 read-write n 0x0 0x0 DATC Data Copy 11 read-write value1 Data fields are not copied. #0 value2 Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination. #1 DLC Data Length Code 24 3 read-write DLCC Data Length Code Copy 10 read-write value1 Data length code is not copied. #0 value2 Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 FRREN Foreign Remote Request Enable 20 read-write value1 TXRQ of message object n is set on reception of a matching Remote Frame. #0 value2 TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame. #1 GDFS Gateway Data Frame Send 8 read-write value1 TXRQ is unchanged in the destination object. #0 value2 TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object. #1 IDC Identifier Copy 9 read-write value1 The identifier of the gateway source object is not copied. #0 value2 The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object. #1 MMC Message Mode Control 0 3 read-write value1 Standard Message Object #0000 value2 Receive FIFO Base Object #0001 value3 Transmit FIFO Base Object #0010 value4 Transmit FIFO Slave Object #0011 value5 Gateway Source Object #0100 OVIE Overflow Interrupt Enable 18 read-write value1 FIFO full interrupt is disabled. #0 value2 FIFO full interrupt is enabled. #1 RMM Transmit Object Remote Monitoring 21 read-write value1 Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame. #0 value2 Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames. #1 RXIE Receive Interrupt Enable 16 read-write value1 Message receive interrupt is disabled. #0 value2 Message receive interrupt is enabled. #1 SDT Single Data Transfer 22 read-write STT Single Transmit Trial 23 read-write TXIE Transmit Interrupt Enable 17 read-write value1 Message transmit interrupt is disabled. #0 value2 Message transmit interrupt is enabled. #1 MOFGPR Message Object FIFO/Gateway Pointer Register 0x4 32 read-write n 0x0 0x0 BOT Bottom Pointer 0 7 read-write CUR Current Object Pointer 16 7 read-write SEL Object Select Pointer 24 7 read-write TOP Top Pointer 8 7 read-write MOIPR Message Object Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 CFCVAL CAN Frame Counter Value 16 15 read-write MPN Message Pending Number 8 7 read-write RXINP Receive Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TXINP Transmit Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 MOSTAT Message Object Status Register MOCTR 0x1C 32 read-write n 0x0 0x0 DIR Message Direction 11 read-only value1 Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n. #0 value2 Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set. #1 LIST List Allocation 12 3 read-only MSGLST Message Lost 4 read-only value1 No CAN message is lost. #0 value2 A CAN message is lost because NEWDAT has become set again when it has already been set. #1 MSGVAL Message Valid 5 read-only value1 Message object n is not valid. #0 value2 Message object n is valid. #1 NEWDAT New Data 3 read-only value1 No update of the message object n since last flag reset. #0 value2 Message object n has been updated. #1 PNEXT Pointer to Next Message Object 24 7 read-only PPREV Pointer to Previous Message Object 16 7 read-only RTSEL Receive/Transmit Selected 6 read-only value1 Message object n is not selected for receive or transmit operation. #0 value2 Message object n is selected for receive or transmit operation. #1 RXEN Receive Enable 7 read-only value1 Message object n is not enabled for frame reception. #0 value2 Message object n is enabled for frame reception. #1 RXPND Receive Pending 0 read-only value1 No CAN message has been received. #0 value2 A CAN message has been received by the message object n, either directly or via gateway copy action. #1 RXUPD Receive Updating 2 read-only value1 No receive update ongoing. #0 value2 Message identifier, DLC, and data of the message object are currently updated. #1 TXEN0 Transmit Enable 0 9 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXEN1 Transmit Enable 1 10 read-only value1 Message object n is not enabled for frame transmission. #0 value2 Message object n is enabled for frame transmission. #1 TXPND Transmit Pending 1 read-only value1 No CAN message has been transmitted. #0 value2 A CAN message from message object n has been transmitted successfully over the CAN bus. #1 TXRQ Transmit Request 8 read-only value1 No transmission of message object n is requested. #0 value2 Transmission of message object n on the CAN bus is requested. #1 CAN_NODE0 Controller Area Networks CAN 0x0 0x0 0x100 registers n NBTR Node Bit Timing Register 0x10 32 read-write n 0x0 0x0 BRP Baud Rate Prescaler 0 5 read-write DIV8 Divide Prescaler Clock by 8 15 read-write value1 A time quantum lasts (BRP+1) clock cycles. #0 value2 A time quantum lasts 8 (BRP+1) clock cycles. #1 SJW (Re) Synchronization Jump Width 6 1 read-write TSEG1 Time Segment Before Sample Point 8 3 read-write TSEG2 Time Segment After Sample Point 12 2 read-write NCR Node Control Register 0x0 32 read-write n 0x0 0x0 ALIE Alert Interrupt Enable 3 read-write value1 Alert interrupt is disabled. #0 value2 Alert interrupt is enabled. #1 CALM CAN Analyzer Mode 7 read-write CANDIS CAN Disable 4 read-write CCE Configuration Change Enable 6 read-write value1 The Bit Timing Register, the Port Control Register, and the Error Counter Register may only be read. All attempts to modify them are ignored. #0 value2 The Bit Timing Register, the Port Control Register, and the Error Counter Register may be read and written. #1 INIT Node Initialization 0 read-write value1 Resetting bit INIT enables the participation of the node in the CAN traffic. If the CAN node is in the bus-off state, the ongoing bus-off recovery (which does not depend on the INIT bit) is continued. With the end of the bus-off recovery sequence the CAN node is allowed to take part in the CAN traffic. If the CAN node is not in the bus-off state, a sequence of 11 consecutive recessive bits must be detected before the node is allowed to take part in the CAN traffic. #0 value2 Setting this bit terminates the participation of this node in the CAN traffic. Any ongoing frame transfer is cancelled and the transmit line goes recessive. If the CAN node is in the bus-off state, then the running bus-off recovery sequence is continued. If the INIT bit is still set after the successful completion of the bus-off recovery sequence, i.e. after detecting 128 sequences of 11 consecutive recessive bits (11 1), then the CAN node leaves the bus-off state but remains inactive as long as INIT remains set. #1 LECIE LEC Indicated Error Interrupt Enable 2 read-write value1 Last error code interrupt is disabled. #0 value2 Last error code interrupt is enabled. #1 SUSEN Suspend Enable 8 read-write value1 An OCDS suspend trigger is ignored by the CAN node. #0 value2 An OCDS suspend trigger disables the CAN node: As soon as the CAN node becomes bus-idle or bus-off, bit INIT is internally forced to 1 to disable the CAN node. The actual value of bit INIT remains unchanged. #1 TRIE Transfer Interrupt Enable 1 read-write value1 Transfer interrupt is disabled. #0 value2 Transfer interrupt is enabled. #1 NECNT Node Error Counter Register 0x14 32 read-write n 0x0 0x0 EWRNLVL Error Warning Level 16 7 read-write LEINC Last Error Increment 25 read-only value1 The last error led to an error counter increment of 1. #0 value2 The last error led to an error counter increment of 8. #1 LETD Last Error Transfer Direction 24 read-only value1 The last error occurred while the CAN node x was receiver (REC has been incremented). #0 value2 The last error occurred while the CAN node x was transmitter (TEC has been incremented). #1 REC Receive Error Counter 0 7 read-write TEC Transmit Error Counter 8 7 read-write NFCR Node Frame Counter Register 0x18 32 read-write n 0x0 0x0 CFC CAN Frame Counter 0 15 read-write CFCIE CAN Frame Count Interrupt Enable 22 read-write value1 CAN frame counter overflow interrupt is disabled. #0 value2 CAN frame counter overflow interrupt is enabled. #1 CFCOV CAN Frame Counter Overflow Flag 23 read-write value1 No overflow has occurred since last flag reset. #0 value2 An overflow has occurred since last flag reset. #1 CFMOD CAN Frame Counter Mode 19 1 read-write value1 Frame Count Mode: The frame counter is incremented upon the reception and transmission of frames. #00 value2 Time Stamp Mode: The frame counter is used to count bit times. #01 value3 Bit Timing Mode: The frame counter is used for analysis of the bit timing. #10 CFSEL CAN Frame Count Selection 16 2 read-write value1 The frame counter is incremented (internally) at the beginning of a new bit time. The value is sampled during the SOF bit of a new frame. The sampled value is visible in the CFC field. #000 NIPR Node Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 ALINP Alert Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 CFCINP Frame Counter Interrupt Node Pointer 12 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 LECINP Last Error Code Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TRINP Transfer OK Interrupt Node Pointer 8 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 NPCR Node Port Control Register 0xC 32 read-write n 0x0 0x0 LBM Loop-Back Mode 8 read-write value1 Loop-Back Mode is disabled. #0 value2 Loop-Back Mode is enabled. This node is connected to an internal (virtual) loop-back CAN bus. All CAN nodes which are in Loop-Back Mode are connected to this virtual CAN bus so that they can communicate with each other internally. The external transmit line is forced recessive in Loop-Back Mode. #1 RXSEL Receive Select 0 2 read-write NSR Node Status Register 0x4 32 read-write n 0x0 0x0 ALERT Alert Warning 5 read-write BOFF Bus-off Status 7 read-only value1 CAN controller is not in the bus-off state. #0 value2 CAN controller is in the bus-off state. #1 EWRN Error Warning Status 6 read-only value1 No warning limit exceeded. #0 value2 One of the error counters REC or TEC reached the warning limit EWRNLVL. #1 LEC Last Error Code 0 2 read-write LLE List Length Error 8 read-write value1 No List Length Error since last (most recent) flag reset. #0 value2 A List Length Error has been detected during message acceptance filtering. The number of elements in the list that belongs to this CAN node differs from the list SIZE given in the list termination pointer. #1 LOE List Object Error 9 read-write value1 No List Object Error since last (most recent) flag reset. #0 value2 A List Object Error has been detected during message acceptance filtering. A message object with wrong LIST index entry in the Message Object Control Register has been detected. #1 RXOK Message Received Successfully 4 read-write value1 No successful reception since last (most recent) flag reset. #0 value2 A message has been received successfully. #1 SUSACK Suspend Acknowledge 10 read-only value1 The CAN node is not in Suspend Mode or a suspend request is pending, but the CAN node has not yet reached bus-idle or bus-off. #0 value2 The CAN node is in Suspend Mode: The CAN node is inactive (bit NCR.INIT internally forced to 1) due to an OCDS suspend request. #1 TXOK Message Transmitted Successfully 3 read-write value1 No successful transmission since last (most recent) flag reset. #0 value2 A message has been transmitted successfully (error-free and acknowledged by at least another node). #1 CAN_NODE1 Controller Area Networks CAN 0x0 0x0 0x100 registers n NBTR Node Bit Timing Register 0x10 32 read-write n 0x0 0x0 BRP Baud Rate Prescaler 0 5 read-write DIV8 Divide Prescaler Clock by 8 15 read-write value1 A time quantum lasts (BRP+1) clock cycles. #0 value2 A time quantum lasts 8 (BRP+1) clock cycles. #1 SJW (Re) Synchronization Jump Width 6 1 read-write TSEG1 Time Segment Before Sample Point 8 3 read-write TSEG2 Time Segment After Sample Point 12 2 read-write NCR Node Control Register 0x0 32 read-write n 0x0 0x0 ALIE Alert Interrupt Enable 3 read-write value1 Alert interrupt is disabled. #0 value2 Alert interrupt is enabled. #1 CALM CAN Analyzer Mode 7 read-write CANDIS CAN Disable 4 read-write CCE Configuration Change Enable 6 read-write value1 The Bit Timing Register, the Port Control Register, and the Error Counter Register may only be read. All attempts to modify them are ignored. #0 value2 The Bit Timing Register, the Port Control Register, and the Error Counter Register may be read and written. #1 INIT Node Initialization 0 read-write value1 Resetting bit INIT enables the participation of the node in the CAN traffic. If the CAN node is in the bus-off state, the ongoing bus-off recovery (which does not depend on the INIT bit) is continued. With the end of the bus-off recovery sequence the CAN node is allowed to take part in the CAN traffic. If the CAN node is not in the bus-off state, a sequence of 11 consecutive recessive bits must be detected before the node is allowed to take part in the CAN traffic. #0 value2 Setting this bit terminates the participation of this node in the CAN traffic. Any ongoing frame transfer is cancelled and the transmit line goes recessive. If the CAN node is in the bus-off state, then the running bus-off recovery sequence is continued. If the INIT bit is still set after the successful completion of the bus-off recovery sequence, i.e. after detecting 128 sequences of 11 consecutive recessive bits (11 1), then the CAN node leaves the bus-off state but remains inactive as long as INIT remains set. #1 LECIE LEC Indicated Error Interrupt Enable 2 read-write value1 Last error code interrupt is disabled. #0 value2 Last error code interrupt is enabled. #1 SUSEN Suspend Enable 8 read-write value1 An OCDS suspend trigger is ignored by the CAN node. #0 value2 An OCDS suspend trigger disables the CAN node: As soon as the CAN node becomes bus-idle or bus-off, bit INIT is internally forced to 1 to disable the CAN node. The actual value of bit INIT remains unchanged. #1 TRIE Transfer Interrupt Enable 1 read-write value1 Transfer interrupt is disabled. #0 value2 Transfer interrupt is enabled. #1 NECNT Node Error Counter Register 0x14 32 read-write n 0x0 0x0 EWRNLVL Error Warning Level 16 7 read-write LEINC Last Error Increment 25 read-only value1 The last error led to an error counter increment of 1. #0 value2 The last error led to an error counter increment of 8. #1 LETD Last Error Transfer Direction 24 read-only value1 The last error occurred while the CAN node x was receiver (REC has been incremented). #0 value2 The last error occurred while the CAN node x was transmitter (TEC has been incremented). #1 REC Receive Error Counter 0 7 read-write TEC Transmit Error Counter 8 7 read-write NFCR Node Frame Counter Register 0x18 32 read-write n 0x0 0x0 CFC CAN Frame Counter 0 15 read-write CFCIE CAN Frame Count Interrupt Enable 22 read-write value1 CAN frame counter overflow interrupt is disabled. #0 value2 CAN frame counter overflow interrupt is enabled. #1 CFCOV CAN Frame Counter Overflow Flag 23 read-write value1 No overflow has occurred since last flag reset. #0 value2 An overflow has occurred since last flag reset. #1 CFMOD CAN Frame Counter Mode 19 1 read-write value1 Frame Count Mode: The frame counter is incremented upon the reception and transmission of frames. #00 value2 Time Stamp Mode: The frame counter is used to count bit times. #01 value3 Bit Timing Mode: The frame counter is used for analysis of the bit timing. #10 CFSEL CAN Frame Count Selection 16 2 read-write value1 The frame counter is incremented (internally) at the beginning of a new bit time. The value is sampled during the SOF bit of a new frame. The sampled value is visible in the CFC field. #000 NIPR Node Interrupt Pointer Register 0x8 32 read-write n 0x0 0x0 ALINP Alert Interrupt Node Pointer 0 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 CFCINP Frame Counter Interrupt Node Pointer 12 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 LECINP Last Error Code Interrupt Node Pointer 4 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 TRINP Transfer OK Interrupt Node Pointer 8 2 read-write value1 Interrupt output line INT_O0 is selected. #000 value2 Interrupt output line INT_O1 is selected. #001 value3 Interrupt output line INT_O7 is selected. #111 NPCR Node Port Control Register 0xC 32 read-write n 0x0 0x0 LBM Loop-Back Mode 8 read-write value1 Loop-Back Mode is disabled. #0 value2 Loop-Back Mode is enabled. This node is connected to an internal (virtual) loop-back CAN bus. All CAN nodes which are in Loop-Back Mode are connected to this virtual CAN bus so that they can communicate with each other internally. The external transmit line is forced recessive in Loop-Back Mode. #1 RXSEL Receive Select 0 2 read-write NSR Node Status Register 0x4 32 read-write n 0x0 0x0 ALERT Alert Warning 5 read-write BOFF Bus-off Status 7 read-only value1 CAN controller is not in the bus-off state. #0 value2 CAN controller is in the bus-off state. #1 EWRN Error Warning Status 6 read-only value1 No warning limit exceeded. #0 value2 One of the error counters REC or TEC reached the warning limit EWRNLVL. #1 LEC Last Error Code 0 2 read-write LLE List Length Error 8 read-write value1 No List Length Error since last (most recent) flag reset. #0 value2 A List Length Error has been detected during message acceptance filtering. The number of elements in the list that belongs to this CAN node differs from the list SIZE given in the list termination pointer. #1 LOE List Object Error 9 read-write value1 No List Object Error since last (most recent) flag reset. #0 value2 A List Object Error has been detected during message acceptance filtering. A message object with wrong LIST index entry in the Message Object Control Register has been detected. #1 RXOK Message Received Successfully 4 read-write value1 No successful reception since last (most recent) flag reset. #0 value2 A message has been received successfully. #1 SUSACK Suspend Acknowledge 10 read-only value1 The CAN node is not in Suspend Mode or a suspend request is pending, but the CAN node has not yet reached bus-idle or bus-off. #0 value2 The CAN node is in Suspend Mode: The CAN node is inactive (bit NCR.INIT internally forced to 1) due to an OCDS suspend request. #1 TXOK Message Transmitted Successfully 3 read-write value1 No successful transmission since last (most recent) flag reset. #0 value2 A message has been transmitted successfully (error-free and acknowledged by at least another node). #1 CCU40 Capture Compare Unit 4 - Unit 0 CCU4 0x0 0x0 0x100 registers n CCU40_0 Capture Compare Unit 4 (Module 0) 44 CCU40_1 Capture Compare Unit 4 (Module 0) 45 CCU40_2 Capture Compare Unit 4 (Module 0) 46 CCU40_3 Capture Compare Unit 4 (Module 0) 47 ECRD Extended Capture Mode Read 0x50 32 read-write n 0x0 0x0 modifyExternal CAPV Timer Capture Value 0 15 read-only FFL Full Flag 24 read-only value1 No new value was captured into this register #0 value2 A new value has been captured into this register #1 FPCV Prescaler Capture value 16 3 read-only SPTR Slice pointer 20 1 read-only value1 CC40 #00 value2 CC41 #01 value3 CC42 #10 value4 CC43 #11 VPTR Capture register pointer 22 1 read-only value1 Capture register 0 #00 value2 Capture register 1 #01 value3 Capture register 2 #10 value4 Capture register 3 #11 GCSC Global Channel Clear 0x14 32 read-write n 0x0 0x0 S0DSC Slice 0 Dither shadow transfer clear 1 write-only S0PSC Slice 0 Prescaler shadow transfer clear 2 write-only S0SC Slice 0 shadow transfer clear 0 write-only S0STC Slice 0 status bit clear 16 write-only S1DSC Slice 1 Dither shadow transfer clear 5 write-only S1PSC Slice 1 Prescaler shadow transfer clear 6 write-only S1SC Slice 1 shadow transfer clear 4 write-only S1STC Slice 1 status bit clear 17 write-only S2DSC Slice 2 Dither shadow transfer clear 9 write-only S2PSC Slice 2 Prescaler shadow transfer clear 10 write-only S2SC Slice 2 shadow transfer clear 8 write-only S2STC Slice 2 status bit clear 18 write-only S3DSC Slice 3 Dither shadow transfer clear 13 write-only S3PSC Slice 3 Prescaler shadow transfer clear 14 write-only S3SC Slice 3 shadow transfer clear 12 write-only S3STC Slice 3 status bit clear 19 write-only GCSS Global Channel Set 0x10 32 read-write n 0x0 0x0 S0DSE Slice 0 Dither shadow transfer set enable 1 write-only S0PSE Slice 0 Prescaler shadow transfer set enable 2 write-only S0SE Slice 0 shadow transfer set enable 0 write-only S0STS Slice 0 status bit set 16 write-only S1DSE Slice 1 Dither shadow transfer set enable 5 write-only S1PSE Slice 1 Prescaler shadow transfer set enable 6 write-only S1SE Slice 1 shadow transfer set enable 4 write-only S1STS Slice 1 status bit set 17 write-only S2DSE Slice 2 Dither shadow transfer set enable 9 write-only S2PSE Slice 2 Prescaler shadow transfer set enable 10 write-only S2SE Slice 2 shadow transfer set enable 8 write-only S2STS Slice 2 status bit set 18 write-only S3DSE Slice 3 Dither shadow transfer set enable 13 write-only S3PSE Slice 3 Prescaler shadow transfer set enable 14 write-only S3SE Slice 3 shadow transfer set enable 12 write-only S3STS Slice 3 status bit set 19 write-only GCST Global Channel Status 0x18 32 read-write n 0x0 0x0 CC40ST Slice 0 status bit 16 read-only CC41ST Slice 1 status bit 17 read-only CC42ST Slice 2 status bit 18 read-only CC43ST Slice 3 status bit 19 read-only S0DSS Slice 0 Dither shadow transfer status 1 read-only value1 Dither shadow transfer has not been requested #0 value2 Dither shadow transfer has been requested #1 S0PSS Slice 0 Prescaler shadow transfer status 2 read-only value1 Prescaler shadow transfer has not been requested #0 value2 Prescaler shadow transfer has been requested #1 S0SS Slice 0 shadow transfer status 0 read-only value1 Shadow transfer has not been requested #0 value2 Shadow transfer has been requested #1 S1DSS Slice 1 Dither shadow transfer status 5 read-only value1 Dither shadow transfer has not been requested #0 value2 Dither shadow transfer has been requested #1 S1PSS Slice 1 Prescaler shadow transfer status 6 read-only value1 Prescaler shadow transfer has not been requested #0 value2 Prescaler shadow transfer has been requested #1 S1SS Slice 1 shadow transfer status 4 read-only value1 Shadow transfer has not been requested #0 value2 Shadow transfer has been requested #1 S2DSS Slice 2 Dither shadow transfer status 9 read-only value1 Dither shadow transfer has not been requested #0 value2 Dither shadow transfer has been requested #1 S2PSS Slice 2 Prescaler shadow transfer status 10 read-only value1 Prescaler shadow transfer has not been requested #0 value2 Prescaler shadow transfer has been requested #1 S2SS Slice 2 shadow transfer status 8 read-only value1 Shadow transfer has not been requested #0 value2 Shadow transfer has been requested #1 S3DSS Slice 3 Dither shadow transfer status 13 read-only value1 Dither shadow transfer has not been requested #0 value2 Dither shadow transfer has been requested #1 S3PSS Slice 3 Prescaler shadow transfer status 14 read-only value1 Prescaler shadow transfer has not been requested #0 value2 Prescaler shadow transfer has been requested #1 S3SS Slice 3 shadow transfer status 12 read-only value1 Shadow transfer has not been requested #0 value2 Shadow transfer has been requested #1 GCTRL Global Control Register 0x0 32 read-write n 0x0 0x0 MSDE Multi Channel shadow transfer request configuration 14 1 read-write value1 Only the shadow transfer for period and compare values is requested #00 value2 Shadow transfer for the compare, period and prescaler compare values is requested #01 value4 Shadow transfer for the compare, period, prescaler and dither compare values is requested #11 MSE0 Slice 0 Multi Channel shadow transfer enable 10 read-write value1 Shadow transfer can only be requested by SW #0 value2 Shadow transfer can be requested via SW and via the CCU4x.MCSS input. #1 MSE1 Slice 1 Multi Channel shadow transfer enable 11 read-write value1 Shadow transfer can only be requested by SW #0 value2 Shadow transfer can be requested via SW and via the CCU4x.MCSS input. #1 MSE2 Slice 2 Multi Channel shadow transfer enable 12 read-write value1 Shadow transfer can only be requested by SW #0 value2 Shadow transfer can be requested via SW and via the CCU4x.MCSS input. #1 MSE3 Slice 3 Multi Channel shadow transfer enable 13 read-write value1 Shadow transfer can only be requested by SW #0 value2 Shadow transfer can be requested via SW and via the CCU4x.MCSS input. #1 PCIS Prescaler Input Clock Selection 4 1 read-write value1 Module clock #00 value2 CCU4x.ECLKA #01 value3 CCU4x.ECLKB #10 value4 CCU4x.ECLKC #11 PRBC Prescaler Clear Configuration 0 2 read-write value1 SW only #000 value2 GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC40 is cleared. #001 value3 GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC41 is cleared. #010 value4 GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC42 is cleared. #011 value5 GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC43 is cleared. #100 SUSCFG Suspend Mode Configuration 8 1 read-write value1 Suspend request ignored. The module never enters in suspend #00 value2 Stops all the running slices immediately. Safe stop is not applied. #01 value3 Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied. #10 value4 Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied. #11 GIDLC Global Idle Clear 0xC 32 read-write n 0x0 0x0 CS0I CC40 IDLE mode clear 0 write-only CS1I CC41 IDLE mode clear 1 write-only CS2I CC42 IDLE mode clear 2 write-only CS3I CC43 IDLE mode clear 3 write-only SPRB Prescaler Run Bit Set 8 write-only GIDLS Global Idle Set 0x8 32 read-write n 0x0 0x0 CPRB Prescaler Run Bit Clear 8 write-only PSIC Prescaler clear 9 write-only SS0I CC40 IDLE mode set 0 write-only SS1I CC41 IDLE mode set 1 write-only SS2I CC42 IDLE mode set 2 write-only SS3I CC43 IDLE mode set 3 write-only GSTAT Global Status Register 0x4 32 read-write n 0x0 0x0 PRB Prescaler Run Bit 8 read-only value1 Prescaler is stopped #0 value2 Prescaler is running #1 S0I CC40 IDLE status 0 read-only value1 Running #0 value2 Idle #1 S1I CC41 IDLE status 1 read-only value1 Running #0 value2 Idle #1 S2I CC42 IDLE status 2 read-only value1 Running #0 value2 Idle #1 S3I CC43 IDLE status 3 read-only value1 Running #0 value2 Idle #1 MIDR Module Identification 0x80 32 read-write n 0x0 0x0 MODN Module Number 16 15 read-only MODR Module Revision 0 7 read-only MODT Module Type 8 7 read-only CCU40_CC40 Capture Compare Unit 4 - Unit 0 CCU4 0x0 0x0 0x100 registers n C0V Capture Register 0 0x74 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C1V Capture Register 1 0x78 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C2V Capture Register 2 0x7C 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C3V Capture Register 3 0x80 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only CMC Connection Matrix Control 0x4 32 read-write n 0x0 0x0 CAP0S External Capture 0 Functionality Selector 4 1 read-write value1 External Capture 0 Function deactivated #00 value2 External Capture 0 Function triggered by Event 0 #01 value3 External Capture 0 Function triggered by Event 1 #10 value4 External Capture 0 Function triggered by Event 2 #11 CAP1S External Capture 1 Functionality Selector 6 1 read-write value1 External Capture 1 Function deactivated #00 value2 External Capture 1 Function triggered by Event 0 #01 value3 External Capture 1 Function triggered by Event 1 #10 value4 External Capture 1 Function triggered by Event 2 #11 CNTS External Count Selector 14 1 read-write value1 External Count Function deactivated #00 value2 External Count Function triggered by Event 0 #01 value3 External Count Function triggered by Event 1 #10 value4 External Count Function triggered by Event 2 #11 ENDS External Stop Functionality Selector 2 1 read-write value1 External Stop Function deactivated #00 value2 External Stop Function triggered by Event 0 #01 value3 External Stop Function triggered by Event 1 #10 value4 External Stop Function triggered by Event 2 #11 GATES External Gate Functionality Selector 8 1 read-write value1 External Gating Function deactivated #00 value2 External Gating Function triggered by Event 0 #01 value3 External Gating Function triggered by Event 1 #10 value4 External Gating Function triggered by Event 2 #11 LDS External Timer Load Functionality Selector 12 1 read-write MOS External Modulation Functionality Selector 18 1 read-write OFS Override Function Selector 16 read-write value1 Override functionality disabled #0 value2 Status bit trigger override connected to Event 1; Status bit value override connected to Event 2 #1 STRTS External Start Functionality Selector 0 1 read-write value1 External Start Function deactivated #00 value2 External Start Function triggered by Event 0 #01 value3 External Start Function triggered by Event 1 #10 value4 External Start Function triggered by Event 2 #11 TCE Timer Concatenation Enable 20 read-write value1 Timer concatenation is disabled #0 value2 Timer concatenation is enabled #1 TS Trap Function Selector 17 read-write value1 Trap function disabled #0 value2 TRAP function connected to Event 2 #1 UDS External Up/Down Functionality Selector 10 1 read-write value1 External Up/Down Function deactivated #00 value2 External Up/Down Function triggered by Event 0 #01 value3 External Up/Down Function triggered by Event 1 #10 value4 External Up/Down Function triggered by Event 2 #11 CR Timer Compare Value 0x38 32 read-write n 0x0 0x0 CR Compare Register 0 15 read-only CRS Timer Shadow Compare Value 0x3C 32 read-write n 0x0 0x0 CRS Compare Register 0 15 read-write DIT Dither Config 0x1C 32 read-write n 0x0 0x0 DCNT Dither counter actual value 8 3 read-only DCV Dither compare Value 0 3 read-only DITS Dither Shadow Register 0x20 32 read-write n 0x0 0x0 DCVS Dither Shadow Compare Value 0 3 read-write FPC Floating Prescaler Control 0x28 32 read-write n 0x0 0x0 PCMP Floating Prescaler Compare Value 0 3 read-only PVAL Actual Prescaler Value 8 3 read-write FPCS Floating Prescaler Shadow 0x2C 32 read-write n 0x0 0x0 PCMP Floating Prescaler Shadow Compare Value 0 3 read-write INS Input Selector Configuration 0x0 32 read-write n 0x0 0x0 EV0EM Event 0 Edge Selection 16 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV0IS Event 0 signal selection 0 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV0LM Event 0 Level Selection 22 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV1EM Event 1 Edge Selection 18 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV1IS Event 1 signal selection 4 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV1LM Event 1 Level Selection 23 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV2EM Event 2 Edge Selection 20 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV2IS Event 2 signal selection 8 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV2LM Event 2 Level Selection 24 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 LPF0M Event 0 Low Pass Filter Configuration 25 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF1M Event 1 Low Pass Filter Configuration 27 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF2M Event 2 Low Pass Filter Configuration 29 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 INTE Interrupt Enable Control 0xA4 32 read-write n 0x0 0x0 CMDE Compare match while counting down enable 3 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMUE Compare match while counting up enable 2 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 E0AE Event 0 interrupt enable 8 read-write value1 Event 0 detection interrupt is disabled #0 value2 Event 0 detection interrupt is enabled #1 E1AE Event 1 interrupt enable 9 read-write value1 Event 1 detection interrupt is disabled #0 value2 Event 1 detection interrupt is enabled #1 E2AE Event 2 interrupt enable 10 read-write value1 Event 2 detection interrupt is disabled #0 value2 Event 2 detection interrupt is enabled #1 OME One match while counting down enable 1 read-write value1 One Match interrupt is disabled #0 value2 One Match interrupt is enabled #1 PME Period match while counting up enable 0 read-write value1 Period Match interrupt is disabled #0 value2 Period Match interrupt is enabled #1 INTS Interrupt Status 0xA0 32 read-write n 0x0 0x0 CMDS Compare Match while Counting Down 3 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMUS Compare Match while Counting Up 2 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 E0AS Event 0 Detection Status 8 read-only value1 Event 0 not detected #0 value2 Event 0 detected #1 E1AS Event 1 Detection Status 9 read-only value1 Event 1 not detected #0 value2 Event 1 detected #1 E2AS Event 2 Detection Status 10 read-only value1 Event 2 not detected #0 value2 Event 2 detected #1 OMDS One Match while Counting Down 1 read-only value1 One match while counting down not detected #0 value2 One match while counting down detected #1 PMUS Period Match while Counting Up 0 read-only value1 Period match while counting up not detected #0 value2 Period match while counting up detected #1 TRPF Trap Flag Status 11 read-only PR Timer Period Value 0x30 32 read-write n 0x0 0x0 PR Period Register 0 15 read-only PRS Timer Shadow Period Value 0x34 32 read-write n 0x0 0x0 PRS Period Register 0 15 read-write PSC Prescaler Control 0x24 32 read-write n 0x0 0x0 PSIV Prescaler Initial Value 0 3 read-write PSL Passive Level Config 0x18 32 read-write n 0x0 0x0 PSL Output Passive Level 0 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 SRS Service Request Selector 0xA8 32 read-write n 0x0 0x0 CMSR Compare match Service request selector 2 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E0SR Event 0 Service request selector 8 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E1SR Event 1 Service request selector 10 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E2SR Event 2 Service request selector 12 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 POSR Period/One match Service request selector 0 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 SWR Interrupt Status Clear 0xB0 32 read-write n 0x0 0x0 RCMD Compare match while counting down clear 3 write-only RCMU Compare match while counting up clear 2 write-only RE0A Event 0 detection clear 8 write-only RE1A Event 1 detection clear 9 write-only RE2A Event 2 detection clear 10 write-only ROM One match while counting down clear 1 write-only RPM Period match while counting up clear 0 write-only RTRPF Trap Flag status clear 11 write-only SWS Interrupt Status Set 0xAC 32 read-write n 0x0 0x0 SCMD Compare match while counting down set 3 write-only SCMU Compare match while counting up set 2 write-only SE0A Event 0 detection set 8 write-only SE1A Event 1 detection set 9 write-only SE2A Event 2 detection set 10 write-only SOM One match while counting down set 1 write-only SPM Period match while counting up set 0 write-only STRPF Trap Flag status set 11 write-only TC Slice Timer Control 0x14 32 read-write n 0x0 0x0 CAPC Clear on Capture Control 5 1 read-write value1 Timer is never cleared on a capture event #00 value2 Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event) #01 value3 Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event) #10 value4 Timer is always cleared in a capture event. #11 CCS Continuous Capture Enable 12 read-write value1 The capture into a specific capture register is done with the rules linked with the full flags, described at . #0 value2 The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back). #1 CLST Shadow Transfer on Clear 2 read-write CMOD Capture Compare Mode 3 read-only value1 Compare Mode #0 value2 Capture Mode #1 DIM Dither input selector 15 read-write value1 Slice is using its own dither unit #0 value2 Slice is connected to the dither unit of slice 0. #1 DITHE Dither Enable 13 1 read-write value1 Dither is disabled #00 value2 Dither is applied to the Period #01 value3 Dither is applied to the Compare #10 value4 Dither is applied to the Period and Compare #11 ECM Extended Capture Mode 4 read-write value1 Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only. #0 value2 Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared. #1 EMS External Modulation Synchronization 23 read-write value1 External Modulation functionality is not synchronized with the PWM signal #0 value2 External Modulation functionality is synchronized with the PWM signal #1 EMT External Modulation Type 24 read-write value1 External Modulation functionality is clearing the CC4yST bit. #0 value2 External Modulation functionality is gating the outputs. #1 ENDM Extended Stop Function Control 8 1 read-write value1 Clears the timer run bit only (default stop) #00 value2 Clears the timer only (flush) #01 value3 Clears the timer and run bit (flush/stop) #10 FPE Floating Prescaler enable 16 read-write value1 Floating prescaler mode is disabled #0 value2 Floating prescaler mode is enabled #1 MCME Multi Channel Mode Enable 25 read-write value1 Multi Channel Mode is disabled #0 value2 Multi Channel Mode is enabled #1 SCE Equal Capture Event enable 11 read-write value1 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #0 value2 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #1 STRM Extended Start Function Control 10 read-write value1 Sets run bit only (default start) #0 value2 Clears the timer and sets run bit (flush/start) #1 TCM Timer Counting Mode 0 read-write value1 Edge aligned mode #0 value2 Center aligned mode #1 TRAPE TRAP enable 17 read-write value1 TRAP functionality has no effect on the output #0 value2 TRAP functionality affects the output #1 TRPSE TRAP Synchronization Enable 21 read-write value1 Exiting from TRAP state isn't synchronized with the PWM signal #0 value2 Exiting from TRAP state is synchronized with the PWM signal #1 TRPSW TRAP State Clear Control 22 read-write value1 The slice exits the TRAP state automatically when the TRAP condition is not present #0 value2 The TRAP state can only be exited by a SW request. #1 TSSM Timer Single Shot Mode 1 read-write value1 Single shot mode is disabled #0 value2 Single shot mode is enabled #1 TCCLR Slice Timer Clear 0x10 32 read-write n 0x0 0x0 DITC Dither Counter Clear 2 write-only TCC Timer Clear 1 write-only TRBC Timer Run Bit Clear 0 write-only TCSET Slice Timer Run Set 0xC 32 read-write n 0x0 0x0 TRBS Timer Run Bit set 0 write-only TCST Slice Timer Status 0x8 32 read-write n 0x0 0x0 CDIR Timer Counting Direction 1 read-only value1 Timer is counting up #0 value2 Timer is counting down #1 TRB Timer Run Bit 0 read-only value1 Timer is stopped #0 value2 Timer is running #1 TIMER Timer Value 0x70 32 read-write n 0x0 0x0 TVAL Timer Value 0 15 read-write CCU40_CC41 Capture Compare Unit 4 - Unit 0 CCU4 0x0 0x0 0x100 registers n C0V Capture Register 0 0x74 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C1V Capture Register 1 0x78 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C2V Capture Register 2 0x7C 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C3V Capture Register 3 0x80 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only CMC Connection Matrix Control 0x4 32 read-write n 0x0 0x0 CAP0S External Capture 0 Functionality Selector 4 1 read-write value1 External Capture 0 Function deactivated #00 value2 External Capture 0 Function triggered by Event 0 #01 value3 External Capture 0 Function triggered by Event 1 #10 value4 External Capture 0 Function triggered by Event 2 #11 CAP1S External Capture 1 Functionality Selector 6 1 read-write value1 External Capture 1 Function deactivated #00 value2 External Capture 1 Function triggered by Event 0 #01 value3 External Capture 1 Function triggered by Event 1 #10 value4 External Capture 1 Function triggered by Event 2 #11 CNTS External Count Selector 14 1 read-write value1 External Count Function deactivated #00 value2 External Count Function triggered by Event 0 #01 value3 External Count Function triggered by Event 1 #10 value4 External Count Function triggered by Event 2 #11 ENDS External Stop Functionality Selector 2 1 read-write value1 External Stop Function deactivated #00 value2 External Stop Function triggered by Event 0 #01 value3 External Stop Function triggered by Event 1 #10 value4 External Stop Function triggered by Event 2 #11 GATES External Gate Functionality Selector 8 1 read-write value1 External Gating Function deactivated #00 value2 External Gating Function triggered by Event 0 #01 value3 External Gating Function triggered by Event 1 #10 value4 External Gating Function triggered by Event 2 #11 LDS External Timer Load Functionality Selector 12 1 read-write MOS External Modulation Functionality Selector 18 1 read-write OFS Override Function Selector 16 read-write value1 Override functionality disabled #0 value2 Status bit trigger override connected to Event 1; Status bit value override connected to Event 2 #1 STRTS External Start Functionality Selector 0 1 read-write value1 External Start Function deactivated #00 value2 External Start Function triggered by Event 0 #01 value3 External Start Function triggered by Event 1 #10 value4 External Start Function triggered by Event 2 #11 TCE Timer Concatenation Enable 20 read-write value1 Timer concatenation is disabled #0 value2 Timer concatenation is enabled #1 TS Trap Function Selector 17 read-write value1 Trap function disabled #0 value2 TRAP function connected to Event 2 #1 UDS External Up/Down Functionality Selector 10 1 read-write value1 External Up/Down Function deactivated #00 value2 External Up/Down Function triggered by Event 0 #01 value3 External Up/Down Function triggered by Event 1 #10 value4 External Up/Down Function triggered by Event 2 #11 CR Timer Compare Value 0x38 32 read-write n 0x0 0x0 CR Compare Register 0 15 read-only CRS Timer Shadow Compare Value 0x3C 32 read-write n 0x0 0x0 CRS Compare Register 0 15 read-write DIT Dither Config 0x1C 32 read-write n 0x0 0x0 DCNT Dither counter actual value 8 3 read-only DCV Dither compare Value 0 3 read-only DITS Dither Shadow Register 0x20 32 read-write n 0x0 0x0 DCVS Dither Shadow Compare Value 0 3 read-write FPC Floating Prescaler Control 0x28 32 read-write n 0x0 0x0 PCMP Floating Prescaler Compare Value 0 3 read-only PVAL Actual Prescaler Value 8 3 read-write FPCS Floating Prescaler Shadow 0x2C 32 read-write n 0x0 0x0 PCMP Floating Prescaler Shadow Compare Value 0 3 read-write INS Input Selector Configuration 0x0 32 read-write n 0x0 0x0 EV0EM Event 0 Edge Selection 16 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV0IS Event 0 signal selection 0 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV0LM Event 0 Level Selection 22 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV1EM Event 1 Edge Selection 18 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV1IS Event 1 signal selection 4 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV1LM Event 1 Level Selection 23 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV2EM Event 2 Edge Selection 20 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV2IS Event 2 signal selection 8 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV2LM Event 2 Level Selection 24 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 LPF0M Event 0 Low Pass Filter Configuration 25 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF1M Event 1 Low Pass Filter Configuration 27 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF2M Event 2 Low Pass Filter Configuration 29 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 INTE Interrupt Enable Control 0xA4 32 read-write n 0x0 0x0 CMDE Compare match while counting down enable 3 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMUE Compare match while counting up enable 2 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 E0AE Event 0 interrupt enable 8 read-write value1 Event 0 detection interrupt is disabled #0 value2 Event 0 detection interrupt is enabled #1 E1AE Event 1 interrupt enable 9 read-write value1 Event 1 detection interrupt is disabled #0 value2 Event 1 detection interrupt is enabled #1 E2AE Event 2 interrupt enable 10 read-write value1 Event 2 detection interrupt is disabled #0 value2 Event 2 detection interrupt is enabled #1 OME One match while counting down enable 1 read-write value1 One Match interrupt is disabled #0 value2 One Match interrupt is enabled #1 PME Period match while counting up enable 0 read-write value1 Period Match interrupt is disabled #0 value2 Period Match interrupt is enabled #1 INTS Interrupt Status 0xA0 32 read-write n 0x0 0x0 CMDS Compare Match while Counting Down 3 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMUS Compare Match while Counting Up 2 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 E0AS Event 0 Detection Status 8 read-only value1 Event 0 not detected #0 value2 Event 0 detected #1 E1AS Event 1 Detection Status 9 read-only value1 Event 1 not detected #0 value2 Event 1 detected #1 E2AS Event 2 Detection Status 10 read-only value1 Event 2 not detected #0 value2 Event 2 detected #1 OMDS One Match while Counting Down 1 read-only value1 One match while counting down not detected #0 value2 One match while counting down detected #1 PMUS Period Match while Counting Up 0 read-only value1 Period match while counting up not detected #0 value2 Period match while counting up detected #1 TRPF Trap Flag Status 11 read-only PR Timer Period Value 0x30 32 read-write n 0x0 0x0 PR Period Register 0 15 read-only PRS Timer Shadow Period Value 0x34 32 read-write n 0x0 0x0 PRS Period Register 0 15 read-write PSC Prescaler Control 0x24 32 read-write n 0x0 0x0 PSIV Prescaler Initial Value 0 3 read-write PSL Passive Level Config 0x18 32 read-write n 0x0 0x0 PSL Output Passive Level 0 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 SRS Service Request Selector 0xA8 32 read-write n 0x0 0x0 CMSR Compare match Service request selector 2 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E0SR Event 0 Service request selector 8 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E1SR Event 1 Service request selector 10 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E2SR Event 2 Service request selector 12 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 POSR Period/One match Service request selector 0 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 SWR Interrupt Status Clear 0xB0 32 read-write n 0x0 0x0 RCMD Compare match while counting down clear 3 write-only RCMU Compare match while counting up clear 2 write-only RE0A Event 0 detection clear 8 write-only RE1A Event 1 detection clear 9 write-only RE2A Event 2 detection clear 10 write-only ROM One match while counting down clear 1 write-only RPM Period match while counting up clear 0 write-only RTRPF Trap Flag status clear 11 write-only SWS Interrupt Status Set 0xAC 32 read-write n 0x0 0x0 SCMD Compare match while counting down set 3 write-only SCMU Compare match while counting up set 2 write-only SE0A Event 0 detection set 8 write-only SE1A Event 1 detection set 9 write-only SE2A Event 2 detection set 10 write-only SOM One match while counting down set 1 write-only SPM Period match while counting up set 0 write-only STRPF Trap Flag status set 11 write-only TC Slice Timer Control 0x14 32 read-write n 0x0 0x0 CAPC Clear on Capture Control 5 1 read-write value1 Timer is never cleared on a capture event #00 value2 Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event) #01 value3 Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event) #10 value4 Timer is always cleared in a capture event. #11 CCS Continuous Capture Enable 12 read-write value1 The capture into a specific capture register is done with the rules linked with the full flags, described at . #0 value2 The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back). #1 CLST Shadow Transfer on Clear 2 read-write CMOD Capture Compare Mode 3 read-only value1 Compare Mode #0 value2 Capture Mode #1 DIM Dither input selector 15 read-write value1 Slice is using its own dither unit #0 value2 Slice is connected to the dither unit of slice 0. #1 DITHE Dither Enable 13 1 read-write value1 Dither is disabled #00 value2 Dither is applied to the Period #01 value3 Dither is applied to the Compare #10 value4 Dither is applied to the Period and Compare #11 ECM Extended Capture Mode 4 read-write value1 Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only. #0 value2 Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared. #1 EMS External Modulation Synchronization 23 read-write value1 External Modulation functionality is not synchronized with the PWM signal #0 value2 External Modulation functionality is synchronized with the PWM signal #1 EMT External Modulation Type 24 read-write value1 External Modulation functionality is clearing the CC4yST bit. #0 value2 External Modulation functionality is gating the outputs. #1 ENDM Extended Stop Function Control 8 1 read-write value1 Clears the timer run bit only (default stop) #00 value2 Clears the timer only (flush) #01 value3 Clears the timer and run bit (flush/stop) #10 FPE Floating Prescaler enable 16 read-write value1 Floating prescaler mode is disabled #0 value2 Floating prescaler mode is enabled #1 MCME Multi Channel Mode Enable 25 read-write value1 Multi Channel Mode is disabled #0 value2 Multi Channel Mode is enabled #1 SCE Equal Capture Event enable 11 read-write value1 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #0 value2 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #1 STRM Extended Start Function Control 10 read-write value1 Sets run bit only (default start) #0 value2 Clears the timer and sets run bit (flush/start) #1 TCM Timer Counting Mode 0 read-write value1 Edge aligned mode #0 value2 Center aligned mode #1 TRAPE TRAP enable 17 read-write value1 TRAP functionality has no effect on the output #0 value2 TRAP functionality affects the output #1 TRPSE TRAP Synchronization Enable 21 read-write value1 Exiting from TRAP state isn't synchronized with the PWM signal #0 value2 Exiting from TRAP state is synchronized with the PWM signal #1 TRPSW TRAP State Clear Control 22 read-write value1 The slice exits the TRAP state automatically when the TRAP condition is not present #0 value2 The TRAP state can only be exited by a SW request. #1 TSSM Timer Single Shot Mode 1 read-write value1 Single shot mode is disabled #0 value2 Single shot mode is enabled #1 TCCLR Slice Timer Clear 0x10 32 read-write n 0x0 0x0 DITC Dither Counter Clear 2 write-only TCC Timer Clear 1 write-only TRBC Timer Run Bit Clear 0 write-only TCSET Slice Timer Run Set 0xC 32 read-write n 0x0 0x0 TRBS Timer Run Bit set 0 write-only TCST Slice Timer Status 0x8 32 read-write n 0x0 0x0 CDIR Timer Counting Direction 1 read-only value1 Timer is counting up #0 value2 Timer is counting down #1 TRB Timer Run Bit 0 read-only value1 Timer is stopped #0 value2 Timer is running #1 TIMER Timer Value 0x70 32 read-write n 0x0 0x0 TVAL Timer Value 0 15 read-write CCU40_CC42 Capture Compare Unit 4 - Unit 0 CCU4 0x0 0x0 0x100 registers n C0V Capture Register 0 0x74 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C1V Capture Register 1 0x78 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C2V Capture Register 2 0x7C 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C3V Capture Register 3 0x80 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only CMC Connection Matrix Control 0x4 32 read-write n 0x0 0x0 CAP0S External Capture 0 Functionality Selector 4 1 read-write value1 External Capture 0 Function deactivated #00 value2 External Capture 0 Function triggered by Event 0 #01 value3 External Capture 0 Function triggered by Event 1 #10 value4 External Capture 0 Function triggered by Event 2 #11 CAP1S External Capture 1 Functionality Selector 6 1 read-write value1 External Capture 1 Function deactivated #00 value2 External Capture 1 Function triggered by Event 0 #01 value3 External Capture 1 Function triggered by Event 1 #10 value4 External Capture 1 Function triggered by Event 2 #11 CNTS External Count Selector 14 1 read-write value1 External Count Function deactivated #00 value2 External Count Function triggered by Event 0 #01 value3 External Count Function triggered by Event 1 #10 value4 External Count Function triggered by Event 2 #11 ENDS External Stop Functionality Selector 2 1 read-write value1 External Stop Function deactivated #00 value2 External Stop Function triggered by Event 0 #01 value3 External Stop Function triggered by Event 1 #10 value4 External Stop Function triggered by Event 2 #11 GATES External Gate Functionality Selector 8 1 read-write value1 External Gating Function deactivated #00 value2 External Gating Function triggered by Event 0 #01 value3 External Gating Function triggered by Event 1 #10 value4 External Gating Function triggered by Event 2 #11 LDS External Timer Load Functionality Selector 12 1 read-write MOS External Modulation Functionality Selector 18 1 read-write OFS Override Function Selector 16 read-write value1 Override functionality disabled #0 value2 Status bit trigger override connected to Event 1; Status bit value override connected to Event 2 #1 STRTS External Start Functionality Selector 0 1 read-write value1 External Start Function deactivated #00 value2 External Start Function triggered by Event 0 #01 value3 External Start Function triggered by Event 1 #10 value4 External Start Function triggered by Event 2 #11 TCE Timer Concatenation Enable 20 read-write value1 Timer concatenation is disabled #0 value2 Timer concatenation is enabled #1 TS Trap Function Selector 17 read-write value1 Trap function disabled #0 value2 TRAP function connected to Event 2 #1 UDS External Up/Down Functionality Selector 10 1 read-write value1 External Up/Down Function deactivated #00 value2 External Up/Down Function triggered by Event 0 #01 value3 External Up/Down Function triggered by Event 1 #10 value4 External Up/Down Function triggered by Event 2 #11 CR Timer Compare Value 0x38 32 read-write n 0x0 0x0 CR Compare Register 0 15 read-only CRS Timer Shadow Compare Value 0x3C 32 read-write n 0x0 0x0 CRS Compare Register 0 15 read-write DIT Dither Config 0x1C 32 read-write n 0x0 0x0 DCNT Dither counter actual value 8 3 read-only DCV Dither compare Value 0 3 read-only DITS Dither Shadow Register 0x20 32 read-write n 0x0 0x0 DCVS Dither Shadow Compare Value 0 3 read-write FPC Floating Prescaler Control 0x28 32 read-write n 0x0 0x0 PCMP Floating Prescaler Compare Value 0 3 read-only PVAL Actual Prescaler Value 8 3 read-write FPCS Floating Prescaler Shadow 0x2C 32 read-write n 0x0 0x0 PCMP Floating Prescaler Shadow Compare Value 0 3 read-write INS Input Selector Configuration 0x0 32 read-write n 0x0 0x0 EV0EM Event 0 Edge Selection 16 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV0IS Event 0 signal selection 0 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV0LM Event 0 Level Selection 22 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV1EM Event 1 Edge Selection 18 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV1IS Event 1 signal selection 4 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV1LM Event 1 Level Selection 23 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV2EM Event 2 Edge Selection 20 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV2IS Event 2 signal selection 8 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV2LM Event 2 Level Selection 24 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 LPF0M Event 0 Low Pass Filter Configuration 25 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF1M Event 1 Low Pass Filter Configuration 27 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF2M Event 2 Low Pass Filter Configuration 29 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 INTE Interrupt Enable Control 0xA4 32 read-write n 0x0 0x0 CMDE Compare match while counting down enable 3 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMUE Compare match while counting up enable 2 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 E0AE Event 0 interrupt enable 8 read-write value1 Event 0 detection interrupt is disabled #0 value2 Event 0 detection interrupt is enabled #1 E1AE Event 1 interrupt enable 9 read-write value1 Event 1 detection interrupt is disabled #0 value2 Event 1 detection interrupt is enabled #1 E2AE Event 2 interrupt enable 10 read-write value1 Event 2 detection interrupt is disabled #0 value2 Event 2 detection interrupt is enabled #1 OME One match while counting down enable 1 read-write value1 One Match interrupt is disabled #0 value2 One Match interrupt is enabled #1 PME Period match while counting up enable 0 read-write value1 Period Match interrupt is disabled #0 value2 Period Match interrupt is enabled #1 INTS Interrupt Status 0xA0 32 read-write n 0x0 0x0 CMDS Compare Match while Counting Down 3 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMUS Compare Match while Counting Up 2 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 E0AS Event 0 Detection Status 8 read-only value1 Event 0 not detected #0 value2 Event 0 detected #1 E1AS Event 1 Detection Status 9 read-only value1 Event 1 not detected #0 value2 Event 1 detected #1 E2AS Event 2 Detection Status 10 read-only value1 Event 2 not detected #0 value2 Event 2 detected #1 OMDS One Match while Counting Down 1 read-only value1 One match while counting down not detected #0 value2 One match while counting down detected #1 PMUS Period Match while Counting Up 0 read-only value1 Period match while counting up not detected #0 value2 Period match while counting up detected #1 TRPF Trap Flag Status 11 read-only PR Timer Period Value 0x30 32 read-write n 0x0 0x0 PR Period Register 0 15 read-only PRS Timer Shadow Period Value 0x34 32 read-write n 0x0 0x0 PRS Period Register 0 15 read-write PSC Prescaler Control 0x24 32 read-write n 0x0 0x0 PSIV Prescaler Initial Value 0 3 read-write PSL Passive Level Config 0x18 32 read-write n 0x0 0x0 PSL Output Passive Level 0 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 SRS Service Request Selector 0xA8 32 read-write n 0x0 0x0 CMSR Compare match Service request selector 2 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E0SR Event 0 Service request selector 8 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E1SR Event 1 Service request selector 10 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E2SR Event 2 Service request selector 12 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 POSR Period/One match Service request selector 0 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 SWR Interrupt Status Clear 0xB0 32 read-write n 0x0 0x0 RCMD Compare match while counting down clear 3 write-only RCMU Compare match while counting up clear 2 write-only RE0A Event 0 detection clear 8 write-only RE1A Event 1 detection clear 9 write-only RE2A Event 2 detection clear 10 write-only ROM One match while counting down clear 1 write-only RPM Period match while counting up clear 0 write-only RTRPF Trap Flag status clear 11 write-only SWS Interrupt Status Set 0xAC 32 read-write n 0x0 0x0 SCMD Compare match while counting down set 3 write-only SCMU Compare match while counting up set 2 write-only SE0A Event 0 detection set 8 write-only SE1A Event 1 detection set 9 write-only SE2A Event 2 detection set 10 write-only SOM One match while counting down set 1 write-only SPM Period match while counting up set 0 write-only STRPF Trap Flag status set 11 write-only TC Slice Timer Control 0x14 32 read-write n 0x0 0x0 CAPC Clear on Capture Control 5 1 read-write value1 Timer is never cleared on a capture event #00 value2 Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event) #01 value3 Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event) #10 value4 Timer is always cleared in a capture event. #11 CCS Continuous Capture Enable 12 read-write value1 The capture into a specific capture register is done with the rules linked with the full flags, described at . #0 value2 The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back). #1 CLST Shadow Transfer on Clear 2 read-write CMOD Capture Compare Mode 3 read-only value1 Compare Mode #0 value2 Capture Mode #1 DIM Dither input selector 15 read-write value1 Slice is using its own dither unit #0 value2 Slice is connected to the dither unit of slice 0. #1 DITHE Dither Enable 13 1 read-write value1 Dither is disabled #00 value2 Dither is applied to the Period #01 value3 Dither is applied to the Compare #10 value4 Dither is applied to the Period and Compare #11 ECM Extended Capture Mode 4 read-write value1 Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only. #0 value2 Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared. #1 EMS External Modulation Synchronization 23 read-write value1 External Modulation functionality is not synchronized with the PWM signal #0 value2 External Modulation functionality is synchronized with the PWM signal #1 EMT External Modulation Type 24 read-write value1 External Modulation functionality is clearing the CC4yST bit. #0 value2 External Modulation functionality is gating the outputs. #1 ENDM Extended Stop Function Control 8 1 read-write value1 Clears the timer run bit only (default stop) #00 value2 Clears the timer only (flush) #01 value3 Clears the timer and run bit (flush/stop) #10 FPE Floating Prescaler enable 16 read-write value1 Floating prescaler mode is disabled #0 value2 Floating prescaler mode is enabled #1 MCME Multi Channel Mode Enable 25 read-write value1 Multi Channel Mode is disabled #0 value2 Multi Channel Mode is enabled #1 SCE Equal Capture Event enable 11 read-write value1 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #0 value2 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #1 STRM Extended Start Function Control 10 read-write value1 Sets run bit only (default start) #0 value2 Clears the timer and sets run bit (flush/start) #1 TCM Timer Counting Mode 0 read-write value1 Edge aligned mode #0 value2 Center aligned mode #1 TRAPE TRAP enable 17 read-write value1 TRAP functionality has no effect on the output #0 value2 TRAP functionality affects the output #1 TRPSE TRAP Synchronization Enable 21 read-write value1 Exiting from TRAP state isn't synchronized with the PWM signal #0 value2 Exiting from TRAP state is synchronized with the PWM signal #1 TRPSW TRAP State Clear Control 22 read-write value1 The slice exits the TRAP state automatically when the TRAP condition is not present #0 value2 The TRAP state can only be exited by a SW request. #1 TSSM Timer Single Shot Mode 1 read-write value1 Single shot mode is disabled #0 value2 Single shot mode is enabled #1 TCCLR Slice Timer Clear 0x10 32 read-write n 0x0 0x0 DITC Dither Counter Clear 2 write-only TCC Timer Clear 1 write-only TRBC Timer Run Bit Clear 0 write-only TCSET Slice Timer Run Set 0xC 32 read-write n 0x0 0x0 TRBS Timer Run Bit set 0 write-only TCST Slice Timer Status 0x8 32 read-write n 0x0 0x0 CDIR Timer Counting Direction 1 read-only value1 Timer is counting up #0 value2 Timer is counting down #1 TRB Timer Run Bit 0 read-only value1 Timer is stopped #0 value2 Timer is running #1 TIMER Timer Value 0x70 32 read-write n 0x0 0x0 TVAL Timer Value 0 15 read-write CCU40_CC43 Capture Compare Unit 4 - Unit 0 CCU4 0x0 0x0 0x100 registers n C0V Capture Register 0 0x74 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C1V Capture Register 1 0x78 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C2V Capture Register 2 0x7C 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C3V Capture Register 3 0x80 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only CMC Connection Matrix Control 0x4 32 read-write n 0x0 0x0 CAP0S External Capture 0 Functionality Selector 4 1 read-write value1 External Capture 0 Function deactivated #00 value2 External Capture 0 Function triggered by Event 0 #01 value3 External Capture 0 Function triggered by Event 1 #10 value4 External Capture 0 Function triggered by Event 2 #11 CAP1S External Capture 1 Functionality Selector 6 1 read-write value1 External Capture 1 Function deactivated #00 value2 External Capture 1 Function triggered by Event 0 #01 value3 External Capture 1 Function triggered by Event 1 #10 value4 External Capture 1 Function triggered by Event 2 #11 CNTS External Count Selector 14 1 read-write value1 External Count Function deactivated #00 value2 External Count Function triggered by Event 0 #01 value3 External Count Function triggered by Event 1 #10 value4 External Count Function triggered by Event 2 #11 ENDS External Stop Functionality Selector 2 1 read-write value1 External Stop Function deactivated #00 value2 External Stop Function triggered by Event 0 #01 value3 External Stop Function triggered by Event 1 #10 value4 External Stop Function triggered by Event 2 #11 GATES External Gate Functionality Selector 8 1 read-write value1 External Gating Function deactivated #00 value2 External Gating Function triggered by Event 0 #01 value3 External Gating Function triggered by Event 1 #10 value4 External Gating Function triggered by Event 2 #11 LDS External Timer Load Functionality Selector 12 1 read-write MOS External Modulation Functionality Selector 18 1 read-write OFS Override Function Selector 16 read-write value1 Override functionality disabled #0 value2 Status bit trigger override connected to Event 1; Status bit value override connected to Event 2 #1 STRTS External Start Functionality Selector 0 1 read-write value1 External Start Function deactivated #00 value2 External Start Function triggered by Event 0 #01 value3 External Start Function triggered by Event 1 #10 value4 External Start Function triggered by Event 2 #11 TCE Timer Concatenation Enable 20 read-write value1 Timer concatenation is disabled #0 value2 Timer concatenation is enabled #1 TS Trap Function Selector 17 read-write value1 Trap function disabled #0 value2 TRAP function connected to Event 2 #1 UDS External Up/Down Functionality Selector 10 1 read-write value1 External Up/Down Function deactivated #00 value2 External Up/Down Function triggered by Event 0 #01 value3 External Up/Down Function triggered by Event 1 #10 value4 External Up/Down Function triggered by Event 2 #11 CR Timer Compare Value 0x38 32 read-write n 0x0 0x0 CR Compare Register 0 15 read-only CRS Timer Shadow Compare Value 0x3C 32 read-write n 0x0 0x0 CRS Compare Register 0 15 read-write DIT Dither Config 0x1C 32 read-write n 0x0 0x0 DCNT Dither counter actual value 8 3 read-only DCV Dither compare Value 0 3 read-only DITS Dither Shadow Register 0x20 32 read-write n 0x0 0x0 DCVS Dither Shadow Compare Value 0 3 read-write FPC Floating Prescaler Control 0x28 32 read-write n 0x0 0x0 PCMP Floating Prescaler Compare Value 0 3 read-only PVAL Actual Prescaler Value 8 3 read-write FPCS Floating Prescaler Shadow 0x2C 32 read-write n 0x0 0x0 PCMP Floating Prescaler Shadow Compare Value 0 3 read-write INS Input Selector Configuration 0x0 32 read-write n 0x0 0x0 EV0EM Event 0 Edge Selection 16 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV0IS Event 0 signal selection 0 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV0LM Event 0 Level Selection 22 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV1EM Event 1 Edge Selection 18 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV1IS Event 1 signal selection 4 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV1LM Event 1 Level Selection 23 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV2EM Event 2 Edge Selection 20 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV2IS Event 2 signal selection 8 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV2LM Event 2 Level Selection 24 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 LPF0M Event 0 Low Pass Filter Configuration 25 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF1M Event 1 Low Pass Filter Configuration 27 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF2M Event 2 Low Pass Filter Configuration 29 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 INTE Interrupt Enable Control 0xA4 32 read-write n 0x0 0x0 CMDE Compare match while counting down enable 3 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMUE Compare match while counting up enable 2 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 E0AE Event 0 interrupt enable 8 read-write value1 Event 0 detection interrupt is disabled #0 value2 Event 0 detection interrupt is enabled #1 E1AE Event 1 interrupt enable 9 read-write value1 Event 1 detection interrupt is disabled #0 value2 Event 1 detection interrupt is enabled #1 E2AE Event 2 interrupt enable 10 read-write value1 Event 2 detection interrupt is disabled #0 value2 Event 2 detection interrupt is enabled #1 OME One match while counting down enable 1 read-write value1 One Match interrupt is disabled #0 value2 One Match interrupt is enabled #1 PME Period match while counting up enable 0 read-write value1 Period Match interrupt is disabled #0 value2 Period Match interrupt is enabled #1 INTS Interrupt Status 0xA0 32 read-write n 0x0 0x0 CMDS Compare Match while Counting Down 3 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMUS Compare Match while Counting Up 2 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 E0AS Event 0 Detection Status 8 read-only value1 Event 0 not detected #0 value2 Event 0 detected #1 E1AS Event 1 Detection Status 9 read-only value1 Event 1 not detected #0 value2 Event 1 detected #1 E2AS Event 2 Detection Status 10 read-only value1 Event 2 not detected #0 value2 Event 2 detected #1 OMDS One Match while Counting Down 1 read-only value1 One match while counting down not detected #0 value2 One match while counting down detected #1 PMUS Period Match while Counting Up 0 read-only value1 Period match while counting up not detected #0 value2 Period match while counting up detected #1 TRPF Trap Flag Status 11 read-only PR Timer Period Value 0x30 32 read-write n 0x0 0x0 PR Period Register 0 15 read-only PRS Timer Shadow Period Value 0x34 32 read-write n 0x0 0x0 PRS Period Register 0 15 read-write PSC Prescaler Control 0x24 32 read-write n 0x0 0x0 PSIV Prescaler Initial Value 0 3 read-write PSL Passive Level Config 0x18 32 read-write n 0x0 0x0 PSL Output Passive Level 0 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 SRS Service Request Selector 0xA8 32 read-write n 0x0 0x0 CMSR Compare match Service request selector 2 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E0SR Event 0 Service request selector 8 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E1SR Event 1 Service request selector 10 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E2SR Event 2 Service request selector 12 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 POSR Period/One match Service request selector 0 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 SWR Interrupt Status Clear 0xB0 32 read-write n 0x0 0x0 RCMD Compare match while counting down clear 3 write-only RCMU Compare match while counting up clear 2 write-only RE0A Event 0 detection clear 8 write-only RE1A Event 1 detection clear 9 write-only RE2A Event 2 detection clear 10 write-only ROM One match while counting down clear 1 write-only RPM Period match while counting up clear 0 write-only RTRPF Trap Flag status clear 11 write-only SWS Interrupt Status Set 0xAC 32 read-write n 0x0 0x0 SCMD Compare match while counting down set 3 write-only SCMU Compare match while counting up set 2 write-only SE0A Event 0 detection set 8 write-only SE1A Event 1 detection set 9 write-only SE2A Event 2 detection set 10 write-only SOM One match while counting down set 1 write-only SPM Period match while counting up set 0 write-only STRPF Trap Flag status set 11 write-only TC Slice Timer Control 0x14 32 read-write n 0x0 0x0 CAPC Clear on Capture Control 5 1 read-write value1 Timer is never cleared on a capture event #00 value2 Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event) #01 value3 Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event) #10 value4 Timer is always cleared in a capture event. #11 CCS Continuous Capture Enable 12 read-write value1 The capture into a specific capture register is done with the rules linked with the full flags, described at . #0 value2 The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back). #1 CLST Shadow Transfer on Clear 2 read-write CMOD Capture Compare Mode 3 read-only value1 Compare Mode #0 value2 Capture Mode #1 DIM Dither input selector 15 read-write value1 Slice is using its own dither unit #0 value2 Slice is connected to the dither unit of slice 0. #1 DITHE Dither Enable 13 1 read-write value1 Dither is disabled #00 value2 Dither is applied to the Period #01 value3 Dither is applied to the Compare #10 value4 Dither is applied to the Period and Compare #11 ECM Extended Capture Mode 4 read-write value1 Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only. #0 value2 Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared. #1 EMS External Modulation Synchronization 23 read-write value1 External Modulation functionality is not synchronized with the PWM signal #0 value2 External Modulation functionality is synchronized with the PWM signal #1 EMT External Modulation Type 24 read-write value1 External Modulation functionality is clearing the CC4yST bit. #0 value2 External Modulation functionality is gating the outputs. #1 ENDM Extended Stop Function Control 8 1 read-write value1 Clears the timer run bit only (default stop) #00 value2 Clears the timer only (flush) #01 value3 Clears the timer and run bit (flush/stop) #10 FPE Floating Prescaler enable 16 read-write value1 Floating prescaler mode is disabled #0 value2 Floating prescaler mode is enabled #1 MCME Multi Channel Mode Enable 25 read-write value1 Multi Channel Mode is disabled #0 value2 Multi Channel Mode is enabled #1 SCE Equal Capture Event enable 11 read-write value1 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #0 value2 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #1 STRM Extended Start Function Control 10 read-write value1 Sets run bit only (default start) #0 value2 Clears the timer and sets run bit (flush/start) #1 TCM Timer Counting Mode 0 read-write value1 Edge aligned mode #0 value2 Center aligned mode #1 TRAPE TRAP enable 17 read-write value1 TRAP functionality has no effect on the output #0 value2 TRAP functionality affects the output #1 TRPSE TRAP Synchronization Enable 21 read-write value1 Exiting from TRAP state isn't synchronized with the PWM signal #0 value2 Exiting from TRAP state is synchronized with the PWM signal #1 TRPSW TRAP State Clear Control 22 read-write value1 The slice exits the TRAP state automatically when the TRAP condition is not present #0 value2 The TRAP state can only be exited by a SW request. #1 TSSM Timer Single Shot Mode 1 read-write value1 Single shot mode is disabled #0 value2 Single shot mode is enabled #1 TCCLR Slice Timer Clear 0x10 32 read-write n 0x0 0x0 DITC Dither Counter Clear 2 write-only TCC Timer Clear 1 write-only TRBC Timer Run Bit Clear 0 write-only TCSET Slice Timer Run Set 0xC 32 read-write n 0x0 0x0 TRBS Timer Run Bit set 0 write-only TCST Slice Timer Status 0x8 32 read-write n 0x0 0x0 CDIR Timer Counting Direction 1 read-only value1 Timer is counting up #0 value2 Timer is counting down #1 TRB Timer Run Bit 0 read-only value1 Timer is stopped #0 value2 Timer is running #1 TIMER Timer Value 0x70 32 read-write n 0x0 0x0 TVAL Timer Value 0 15 read-write CCU41 Capture Compare Unit 4 - Unit 1 CCU4 0x0 0x0 0x100 registers n CCU41_0 Capture Compare Unit 4 (Module 1) 48 CCU41_1 Capture Compare Unit 4 (Module 1) 49 CCU41_2 Capture Compare Unit 4 (Module 1) 50 CCU41_3 Capture Compare Unit 4 (Module 1) 51 ECRD Extended Capture Mode Read 0x50 32 read-write n 0x0 0x0 modifyExternal CAPV Timer Capture Value 0 15 read-only FFL Full Flag 24 read-only value1 No new value was captured into this register #0 value2 A new value has been captured into this register #1 FPCV Prescaler Capture value 16 3 read-only SPTR Slice pointer 20 1 read-only value1 CC40 #00 value2 CC41 #01 value3 CC42 #10 value4 CC43 #11 VPTR Capture register pointer 22 1 read-only value1 Capture register 0 #00 value2 Capture register 1 #01 value3 Capture register 2 #10 value4 Capture register 3 #11 GCSC Global Channel Clear 0x14 32 read-write n 0x0 0x0 S0DSC Slice 0 Dither shadow transfer clear 1 write-only S0PSC Slice 0 Prescaler shadow transfer clear 2 write-only S0SC Slice 0 shadow transfer clear 0 write-only S0STC Slice 0 status bit clear 16 write-only S1DSC Slice 1 Dither shadow transfer clear 5 write-only S1PSC Slice 1 Prescaler shadow transfer clear 6 write-only S1SC Slice 1 shadow transfer clear 4 write-only S1STC Slice 1 status bit clear 17 write-only S2DSC Slice 2 Dither shadow transfer clear 9 write-only S2PSC Slice 2 Prescaler shadow transfer clear 10 write-only S2SC Slice 2 shadow transfer clear 8 write-only S2STC Slice 2 status bit clear 18 write-only S3DSC Slice 3 Dither shadow transfer clear 13 write-only S3PSC Slice 3 Prescaler shadow transfer clear 14 write-only S3SC Slice 3 shadow transfer clear 12 write-only S3STC Slice 3 status bit clear 19 write-only GCSS Global Channel Set 0x10 32 read-write n 0x0 0x0 S0DSE Slice 0 Dither shadow transfer set enable 1 write-only S0PSE Slice 0 Prescaler shadow transfer set enable 2 write-only S0SE Slice 0 shadow transfer set enable 0 write-only S0STS Slice 0 status bit set 16 write-only S1DSE Slice 1 Dither shadow transfer set enable 5 write-only S1PSE Slice 1 Prescaler shadow transfer set enable 6 write-only S1SE Slice 1 shadow transfer set enable 4 write-only S1STS Slice 1 status bit set 17 write-only S2DSE Slice 2 Dither shadow transfer set enable 9 write-only S2PSE Slice 2 Prescaler shadow transfer set enable 10 write-only S2SE Slice 2 shadow transfer set enable 8 write-only S2STS Slice 2 status bit set 18 write-only S3DSE Slice 3 Dither shadow transfer set enable 13 write-only S3PSE Slice 3 Prescaler shadow transfer set enable 14 write-only S3SE Slice 3 shadow transfer set enable 12 write-only S3STS Slice 3 status bit set 19 write-only GCST Global Channel Status 0x18 32 read-write n 0x0 0x0 CC40ST Slice 0 status bit 16 read-only CC41ST Slice 1 status bit 17 read-only CC42ST Slice 2 status bit 18 read-only CC43ST Slice 3 status bit 19 read-only S0DSS Slice 0 Dither shadow transfer status 1 read-only value1 Dither shadow transfer has not been requested #0 value2 Dither shadow transfer has been requested #1 S0PSS Slice 0 Prescaler shadow transfer status 2 read-only value1 Prescaler shadow transfer has not been requested #0 value2 Prescaler shadow transfer has been requested #1 S0SS Slice 0 shadow transfer status 0 read-only value1 Shadow transfer has not been requested #0 value2 Shadow transfer has been requested #1 S1DSS Slice 1 Dither shadow transfer status 5 read-only value1 Dither shadow transfer has not been requested #0 value2 Dither shadow transfer has been requested #1 S1PSS Slice 1 Prescaler shadow transfer status 6 read-only value1 Prescaler shadow transfer has not been requested #0 value2 Prescaler shadow transfer has been requested #1 S1SS Slice 1 shadow transfer status 4 read-only value1 Shadow transfer has not been requested #0 value2 Shadow transfer has been requested #1 S2DSS Slice 2 Dither shadow transfer status 9 read-only value1 Dither shadow transfer has not been requested #0 value2 Dither shadow transfer has been requested #1 S2PSS Slice 2 Prescaler shadow transfer status 10 read-only value1 Prescaler shadow transfer has not been requested #0 value2 Prescaler shadow transfer has been requested #1 S2SS Slice 2 shadow transfer status 8 read-only value1 Shadow transfer has not been requested #0 value2 Shadow transfer has been requested #1 S3DSS Slice 3 Dither shadow transfer status 13 read-only value1 Dither shadow transfer has not been requested #0 value2 Dither shadow transfer has been requested #1 S3PSS Slice 3 Prescaler shadow transfer status 14 read-only value1 Prescaler shadow transfer has not been requested #0 value2 Prescaler shadow transfer has been requested #1 S3SS Slice 3 shadow transfer status 12 read-only value1 Shadow transfer has not been requested #0 value2 Shadow transfer has been requested #1 GCTRL Global Control Register 0x0 32 read-write n 0x0 0x0 MSDE Multi Channel shadow transfer request configuration 14 1 read-write value1 Only the shadow transfer for period and compare values is requested #00 value2 Shadow transfer for the compare, period and prescaler compare values is requested #01 value4 Shadow transfer for the compare, period, prescaler and dither compare values is requested #11 MSE0 Slice 0 Multi Channel shadow transfer enable 10 read-write value1 Shadow transfer can only be requested by SW #0 value2 Shadow transfer can be requested via SW and via the CCU4x.MCSS input. #1 MSE1 Slice 1 Multi Channel shadow transfer enable 11 read-write value1 Shadow transfer can only be requested by SW #0 value2 Shadow transfer can be requested via SW and via the CCU4x.MCSS input. #1 MSE2 Slice 2 Multi Channel shadow transfer enable 12 read-write value1 Shadow transfer can only be requested by SW #0 value2 Shadow transfer can be requested via SW and via the CCU4x.MCSS input. #1 MSE3 Slice 3 Multi Channel shadow transfer enable 13 read-write value1 Shadow transfer can only be requested by SW #0 value2 Shadow transfer can be requested via SW and via the CCU4x.MCSS input. #1 PCIS Prescaler Input Clock Selection 4 1 read-write value1 Module clock #00 value2 CCU4x.ECLKA #01 value3 CCU4x.ECLKB #10 value4 CCU4x.ECLKC #11 PRBC Prescaler Clear Configuration 0 2 read-write value1 SW only #000 value2 GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC40 is cleared. #001 value3 GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC41 is cleared. #010 value4 GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC42 is cleared. #011 value5 GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC43 is cleared. #100 SUSCFG Suspend Mode Configuration 8 1 read-write value1 Suspend request ignored. The module never enters in suspend #00 value2 Stops all the running slices immediately. Safe stop is not applied. #01 value3 Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied. #10 value4 Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied. #11 GIDLC Global Idle Clear 0xC 32 read-write n 0x0 0x0 CS0I CC40 IDLE mode clear 0 write-only CS1I CC41 IDLE mode clear 1 write-only CS2I CC42 IDLE mode clear 2 write-only CS3I CC43 IDLE mode clear 3 write-only SPRB Prescaler Run Bit Set 8 write-only GIDLS Global Idle Set 0x8 32 read-write n 0x0 0x0 CPRB Prescaler Run Bit Clear 8 write-only PSIC Prescaler clear 9 write-only SS0I CC40 IDLE mode set 0 write-only SS1I CC41 IDLE mode set 1 write-only SS2I CC42 IDLE mode set 2 write-only SS3I CC43 IDLE mode set 3 write-only GSTAT Global Status Register 0x4 32 read-write n 0x0 0x0 PRB Prescaler Run Bit 8 read-only value1 Prescaler is stopped #0 value2 Prescaler is running #1 S0I CC40 IDLE status 0 read-only value1 Running #0 value2 Idle #1 S1I CC41 IDLE status 1 read-only value1 Running #0 value2 Idle #1 S2I CC42 IDLE status 2 read-only value1 Running #0 value2 Idle #1 S3I CC43 IDLE status 3 read-only value1 Running #0 value2 Idle #1 MIDR Module Identification 0x80 32 read-write n 0x0 0x0 MODN Module Number 16 15 read-only MODR Module Revision 0 7 read-only MODT Module Type 8 7 read-only CCU41_CC40 Capture Compare Unit 4 - Unit 1 CCU4 0x0 0x0 0x100 registers n C0V Capture Register 0 0x74 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C1V Capture Register 1 0x78 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C2V Capture Register 2 0x7C 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C3V Capture Register 3 0x80 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only CMC Connection Matrix Control 0x4 32 read-write n 0x0 0x0 CAP0S External Capture 0 Functionality Selector 4 1 read-write value1 External Capture 0 Function deactivated #00 value2 External Capture 0 Function triggered by Event 0 #01 value3 External Capture 0 Function triggered by Event 1 #10 value4 External Capture 0 Function triggered by Event 2 #11 CAP1S External Capture 1 Functionality Selector 6 1 read-write value1 External Capture 1 Function deactivated #00 value2 External Capture 1 Function triggered by Event 0 #01 value3 External Capture 1 Function triggered by Event 1 #10 value4 External Capture 1 Function triggered by Event 2 #11 CNTS External Count Selector 14 1 read-write value1 External Count Function deactivated #00 value2 External Count Function triggered by Event 0 #01 value3 External Count Function triggered by Event 1 #10 value4 External Count Function triggered by Event 2 #11 ENDS External Stop Functionality Selector 2 1 read-write value1 External Stop Function deactivated #00 value2 External Stop Function triggered by Event 0 #01 value3 External Stop Function triggered by Event 1 #10 value4 External Stop Function triggered by Event 2 #11 GATES External Gate Functionality Selector 8 1 read-write value1 External Gating Function deactivated #00 value2 External Gating Function triggered by Event 0 #01 value3 External Gating Function triggered by Event 1 #10 value4 External Gating Function triggered by Event 2 #11 LDS External Timer Load Functionality Selector 12 1 read-write MOS External Modulation Functionality Selector 18 1 read-write OFS Override Function Selector 16 read-write value1 Override functionality disabled #0 value2 Status bit trigger override connected to Event 1; Status bit value override connected to Event 2 #1 STRTS External Start Functionality Selector 0 1 read-write value1 External Start Function deactivated #00 value2 External Start Function triggered by Event 0 #01 value3 External Start Function triggered by Event 1 #10 value4 External Start Function triggered by Event 2 #11 TCE Timer Concatenation Enable 20 read-write value1 Timer concatenation is disabled #0 value2 Timer concatenation is enabled #1 TS Trap Function Selector 17 read-write value1 Trap function disabled #0 value2 TRAP function connected to Event 2 #1 UDS External Up/Down Functionality Selector 10 1 read-write value1 External Up/Down Function deactivated #00 value2 External Up/Down Function triggered by Event 0 #01 value3 External Up/Down Function triggered by Event 1 #10 value4 External Up/Down Function triggered by Event 2 #11 CR Timer Compare Value 0x38 32 read-write n 0x0 0x0 CR Compare Register 0 15 read-only CRS Timer Shadow Compare Value 0x3C 32 read-write n 0x0 0x0 CRS Compare Register 0 15 read-write DIT Dither Config 0x1C 32 read-write n 0x0 0x0 DCNT Dither counter actual value 8 3 read-only DCV Dither compare Value 0 3 read-only DITS Dither Shadow Register 0x20 32 read-write n 0x0 0x0 DCVS Dither Shadow Compare Value 0 3 read-write FPC Floating Prescaler Control 0x28 32 read-write n 0x0 0x0 PCMP Floating Prescaler Compare Value 0 3 read-only PVAL Actual Prescaler Value 8 3 read-write FPCS Floating Prescaler Shadow 0x2C 32 read-write n 0x0 0x0 PCMP Floating Prescaler Shadow Compare Value 0 3 read-write INS Input Selector Configuration 0x0 32 read-write n 0x0 0x0 EV0EM Event 0 Edge Selection 16 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV0IS Event 0 signal selection 0 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV0LM Event 0 Level Selection 22 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV1EM Event 1 Edge Selection 18 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV1IS Event 1 signal selection 4 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV1LM Event 1 Level Selection 23 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV2EM Event 2 Edge Selection 20 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV2IS Event 2 signal selection 8 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV2LM Event 2 Level Selection 24 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 LPF0M Event 0 Low Pass Filter Configuration 25 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF1M Event 1 Low Pass Filter Configuration 27 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF2M Event 2 Low Pass Filter Configuration 29 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 INTE Interrupt Enable Control 0xA4 32 read-write n 0x0 0x0 CMDE Compare match while counting down enable 3 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMUE Compare match while counting up enable 2 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 E0AE Event 0 interrupt enable 8 read-write value1 Event 0 detection interrupt is disabled #0 value2 Event 0 detection interrupt is enabled #1 E1AE Event 1 interrupt enable 9 read-write value1 Event 1 detection interrupt is disabled #0 value2 Event 1 detection interrupt is enabled #1 E2AE Event 2 interrupt enable 10 read-write value1 Event 2 detection interrupt is disabled #0 value2 Event 2 detection interrupt is enabled #1 OME One match while counting down enable 1 read-write value1 One Match interrupt is disabled #0 value2 One Match interrupt is enabled #1 PME Period match while counting up enable 0 read-write value1 Period Match interrupt is disabled #0 value2 Period Match interrupt is enabled #1 INTS Interrupt Status 0xA0 32 read-write n 0x0 0x0 CMDS Compare Match while Counting Down 3 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMUS Compare Match while Counting Up 2 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 E0AS Event 0 Detection Status 8 read-only value1 Event 0 not detected #0 value2 Event 0 detected #1 E1AS Event 1 Detection Status 9 read-only value1 Event 1 not detected #0 value2 Event 1 detected #1 E2AS Event 2 Detection Status 10 read-only value1 Event 2 not detected #0 value2 Event 2 detected #1 OMDS One Match while Counting Down 1 read-only value1 One match while counting down not detected #0 value2 One match while counting down detected #1 PMUS Period Match while Counting Up 0 read-only value1 Period match while counting up not detected #0 value2 Period match while counting up detected #1 TRPF Trap Flag Status 11 read-only PR Timer Period Value 0x30 32 read-write n 0x0 0x0 PR Period Register 0 15 read-only PRS Timer Shadow Period Value 0x34 32 read-write n 0x0 0x0 PRS Period Register 0 15 read-write PSC Prescaler Control 0x24 32 read-write n 0x0 0x0 PSIV Prescaler Initial Value 0 3 read-write PSL Passive Level Config 0x18 32 read-write n 0x0 0x0 PSL Output Passive Level 0 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 SRS Service Request Selector 0xA8 32 read-write n 0x0 0x0 CMSR Compare match Service request selector 2 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E0SR Event 0 Service request selector 8 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E1SR Event 1 Service request selector 10 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E2SR Event 2 Service request selector 12 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 POSR Period/One match Service request selector 0 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 SWR Interrupt Status Clear 0xB0 32 read-write n 0x0 0x0 RCMD Compare match while counting down clear 3 write-only RCMU Compare match while counting up clear 2 write-only RE0A Event 0 detection clear 8 write-only RE1A Event 1 detection clear 9 write-only RE2A Event 2 detection clear 10 write-only ROM One match while counting down clear 1 write-only RPM Period match while counting up clear 0 write-only RTRPF Trap Flag status clear 11 write-only SWS Interrupt Status Set 0xAC 32 read-write n 0x0 0x0 SCMD Compare match while counting down set 3 write-only SCMU Compare match while counting up set 2 write-only SE0A Event 0 detection set 8 write-only SE1A Event 1 detection set 9 write-only SE2A Event 2 detection set 10 write-only SOM One match while counting down set 1 write-only SPM Period match while counting up set 0 write-only STRPF Trap Flag status set 11 write-only TC Slice Timer Control 0x14 32 read-write n 0x0 0x0 CAPC Clear on Capture Control 5 1 read-write value1 Timer is never cleared on a capture event #00 value2 Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event) #01 value3 Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event) #10 value4 Timer is always cleared in a capture event. #11 CCS Continuous Capture Enable 12 read-write value1 The capture into a specific capture register is done with the rules linked with the full flags, described at . #0 value2 The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back). #1 CLST Shadow Transfer on Clear 2 read-write CMOD Capture Compare Mode 3 read-only value1 Compare Mode #0 value2 Capture Mode #1 DIM Dither input selector 15 read-write value1 Slice is using its own dither unit #0 value2 Slice is connected to the dither unit of slice 0. #1 DITHE Dither Enable 13 1 read-write value1 Dither is disabled #00 value2 Dither is applied to the Period #01 value3 Dither is applied to the Compare #10 value4 Dither is applied to the Period and Compare #11 ECM Extended Capture Mode 4 read-write value1 Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only. #0 value2 Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared. #1 EMS External Modulation Synchronization 23 read-write value1 External Modulation functionality is not synchronized with the PWM signal #0 value2 External Modulation functionality is synchronized with the PWM signal #1 EMT External Modulation Type 24 read-write value1 External Modulation functionality is clearing the CC4yST bit. #0 value2 External Modulation functionality is gating the outputs. #1 ENDM Extended Stop Function Control 8 1 read-write value1 Clears the timer run bit only (default stop) #00 value2 Clears the timer only (flush) #01 value3 Clears the timer and run bit (flush/stop) #10 FPE Floating Prescaler enable 16 read-write value1 Floating prescaler mode is disabled #0 value2 Floating prescaler mode is enabled #1 MCME Multi Channel Mode Enable 25 read-write value1 Multi Channel Mode is disabled #0 value2 Multi Channel Mode is enabled #1 SCE Equal Capture Event enable 11 read-write value1 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #0 value2 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #1 STRM Extended Start Function Control 10 read-write value1 Sets run bit only (default start) #0 value2 Clears the timer and sets run bit (flush/start) #1 TCM Timer Counting Mode 0 read-write value1 Edge aligned mode #0 value2 Center aligned mode #1 TRAPE TRAP enable 17 read-write value1 TRAP functionality has no effect on the output #0 value2 TRAP functionality affects the output #1 TRPSE TRAP Synchronization Enable 21 read-write value1 Exiting from TRAP state isn't synchronized with the PWM signal #0 value2 Exiting from TRAP state is synchronized with the PWM signal #1 TRPSW TRAP State Clear Control 22 read-write value1 The slice exits the TRAP state automatically when the TRAP condition is not present #0 value2 The TRAP state can only be exited by a SW request. #1 TSSM Timer Single Shot Mode 1 read-write value1 Single shot mode is disabled #0 value2 Single shot mode is enabled #1 TCCLR Slice Timer Clear 0x10 32 read-write n 0x0 0x0 DITC Dither Counter Clear 2 write-only TCC Timer Clear 1 write-only TRBC Timer Run Bit Clear 0 write-only TCSET Slice Timer Run Set 0xC 32 read-write n 0x0 0x0 TRBS Timer Run Bit set 0 write-only TCST Slice Timer Status 0x8 32 read-write n 0x0 0x0 CDIR Timer Counting Direction 1 read-only value1 Timer is counting up #0 value2 Timer is counting down #1 TRB Timer Run Bit 0 read-only value1 Timer is stopped #0 value2 Timer is running #1 TIMER Timer Value 0x70 32 read-write n 0x0 0x0 TVAL Timer Value 0 15 read-write CCU41_CC41 Capture Compare Unit 4 - Unit 1 CCU4 0x0 0x0 0x100 registers n C0V Capture Register 0 0x74 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C1V Capture Register 1 0x78 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C2V Capture Register 2 0x7C 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C3V Capture Register 3 0x80 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only CMC Connection Matrix Control 0x4 32 read-write n 0x0 0x0 CAP0S External Capture 0 Functionality Selector 4 1 read-write value1 External Capture 0 Function deactivated #00 value2 External Capture 0 Function triggered by Event 0 #01 value3 External Capture 0 Function triggered by Event 1 #10 value4 External Capture 0 Function triggered by Event 2 #11 CAP1S External Capture 1 Functionality Selector 6 1 read-write value1 External Capture 1 Function deactivated #00 value2 External Capture 1 Function triggered by Event 0 #01 value3 External Capture 1 Function triggered by Event 1 #10 value4 External Capture 1 Function triggered by Event 2 #11 CNTS External Count Selector 14 1 read-write value1 External Count Function deactivated #00 value2 External Count Function triggered by Event 0 #01 value3 External Count Function triggered by Event 1 #10 value4 External Count Function triggered by Event 2 #11 ENDS External Stop Functionality Selector 2 1 read-write value1 External Stop Function deactivated #00 value2 External Stop Function triggered by Event 0 #01 value3 External Stop Function triggered by Event 1 #10 value4 External Stop Function triggered by Event 2 #11 GATES External Gate Functionality Selector 8 1 read-write value1 External Gating Function deactivated #00 value2 External Gating Function triggered by Event 0 #01 value3 External Gating Function triggered by Event 1 #10 value4 External Gating Function triggered by Event 2 #11 LDS External Timer Load Functionality Selector 12 1 read-write MOS External Modulation Functionality Selector 18 1 read-write OFS Override Function Selector 16 read-write value1 Override functionality disabled #0 value2 Status bit trigger override connected to Event 1; Status bit value override connected to Event 2 #1 STRTS External Start Functionality Selector 0 1 read-write value1 External Start Function deactivated #00 value2 External Start Function triggered by Event 0 #01 value3 External Start Function triggered by Event 1 #10 value4 External Start Function triggered by Event 2 #11 TCE Timer Concatenation Enable 20 read-write value1 Timer concatenation is disabled #0 value2 Timer concatenation is enabled #1 TS Trap Function Selector 17 read-write value1 Trap function disabled #0 value2 TRAP function connected to Event 2 #1 UDS External Up/Down Functionality Selector 10 1 read-write value1 External Up/Down Function deactivated #00 value2 External Up/Down Function triggered by Event 0 #01 value3 External Up/Down Function triggered by Event 1 #10 value4 External Up/Down Function triggered by Event 2 #11 CR Timer Compare Value 0x38 32 read-write n 0x0 0x0 CR Compare Register 0 15 read-only CRS Timer Shadow Compare Value 0x3C 32 read-write n 0x0 0x0 CRS Compare Register 0 15 read-write DIT Dither Config 0x1C 32 read-write n 0x0 0x0 DCNT Dither counter actual value 8 3 read-only DCV Dither compare Value 0 3 read-only DITS Dither Shadow Register 0x20 32 read-write n 0x0 0x0 DCVS Dither Shadow Compare Value 0 3 read-write FPC Floating Prescaler Control 0x28 32 read-write n 0x0 0x0 PCMP Floating Prescaler Compare Value 0 3 read-only PVAL Actual Prescaler Value 8 3 read-write FPCS Floating Prescaler Shadow 0x2C 32 read-write n 0x0 0x0 PCMP Floating Prescaler Shadow Compare Value 0 3 read-write INS Input Selector Configuration 0x0 32 read-write n 0x0 0x0 EV0EM Event 0 Edge Selection 16 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV0IS Event 0 signal selection 0 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV0LM Event 0 Level Selection 22 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV1EM Event 1 Edge Selection 18 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV1IS Event 1 signal selection 4 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV1LM Event 1 Level Selection 23 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV2EM Event 2 Edge Selection 20 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV2IS Event 2 signal selection 8 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV2LM Event 2 Level Selection 24 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 LPF0M Event 0 Low Pass Filter Configuration 25 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF1M Event 1 Low Pass Filter Configuration 27 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF2M Event 2 Low Pass Filter Configuration 29 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 INTE Interrupt Enable Control 0xA4 32 read-write n 0x0 0x0 CMDE Compare match while counting down enable 3 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMUE Compare match while counting up enable 2 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 E0AE Event 0 interrupt enable 8 read-write value1 Event 0 detection interrupt is disabled #0 value2 Event 0 detection interrupt is enabled #1 E1AE Event 1 interrupt enable 9 read-write value1 Event 1 detection interrupt is disabled #0 value2 Event 1 detection interrupt is enabled #1 E2AE Event 2 interrupt enable 10 read-write value1 Event 2 detection interrupt is disabled #0 value2 Event 2 detection interrupt is enabled #1 OME One match while counting down enable 1 read-write value1 One Match interrupt is disabled #0 value2 One Match interrupt is enabled #1 PME Period match while counting up enable 0 read-write value1 Period Match interrupt is disabled #0 value2 Period Match interrupt is enabled #1 INTS Interrupt Status 0xA0 32 read-write n 0x0 0x0 CMDS Compare Match while Counting Down 3 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMUS Compare Match while Counting Up 2 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 E0AS Event 0 Detection Status 8 read-only value1 Event 0 not detected #0 value2 Event 0 detected #1 E1AS Event 1 Detection Status 9 read-only value1 Event 1 not detected #0 value2 Event 1 detected #1 E2AS Event 2 Detection Status 10 read-only value1 Event 2 not detected #0 value2 Event 2 detected #1 OMDS One Match while Counting Down 1 read-only value1 One match while counting down not detected #0 value2 One match while counting down detected #1 PMUS Period Match while Counting Up 0 read-only value1 Period match while counting up not detected #0 value2 Period match while counting up detected #1 TRPF Trap Flag Status 11 read-only PR Timer Period Value 0x30 32 read-write n 0x0 0x0 PR Period Register 0 15 read-only PRS Timer Shadow Period Value 0x34 32 read-write n 0x0 0x0 PRS Period Register 0 15 read-write PSC Prescaler Control 0x24 32 read-write n 0x0 0x0 PSIV Prescaler Initial Value 0 3 read-write PSL Passive Level Config 0x18 32 read-write n 0x0 0x0 PSL Output Passive Level 0 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 SRS Service Request Selector 0xA8 32 read-write n 0x0 0x0 CMSR Compare match Service request selector 2 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E0SR Event 0 Service request selector 8 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E1SR Event 1 Service request selector 10 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E2SR Event 2 Service request selector 12 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 POSR Period/One match Service request selector 0 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 SWR Interrupt Status Clear 0xB0 32 read-write n 0x0 0x0 RCMD Compare match while counting down clear 3 write-only RCMU Compare match while counting up clear 2 write-only RE0A Event 0 detection clear 8 write-only RE1A Event 1 detection clear 9 write-only RE2A Event 2 detection clear 10 write-only ROM One match while counting down clear 1 write-only RPM Period match while counting up clear 0 write-only RTRPF Trap Flag status clear 11 write-only SWS Interrupt Status Set 0xAC 32 read-write n 0x0 0x0 SCMD Compare match while counting down set 3 write-only SCMU Compare match while counting up set 2 write-only SE0A Event 0 detection set 8 write-only SE1A Event 1 detection set 9 write-only SE2A Event 2 detection set 10 write-only SOM One match while counting down set 1 write-only SPM Period match while counting up set 0 write-only STRPF Trap Flag status set 11 write-only TC Slice Timer Control 0x14 32 read-write n 0x0 0x0 CAPC Clear on Capture Control 5 1 read-write value1 Timer is never cleared on a capture event #00 value2 Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event) #01 value3 Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event) #10 value4 Timer is always cleared in a capture event. #11 CCS Continuous Capture Enable 12 read-write value1 The capture into a specific capture register is done with the rules linked with the full flags, described at . #0 value2 The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back). #1 CLST Shadow Transfer on Clear 2 read-write CMOD Capture Compare Mode 3 read-only value1 Compare Mode #0 value2 Capture Mode #1 DIM Dither input selector 15 read-write value1 Slice is using its own dither unit #0 value2 Slice is connected to the dither unit of slice 0. #1 DITHE Dither Enable 13 1 read-write value1 Dither is disabled #00 value2 Dither is applied to the Period #01 value3 Dither is applied to the Compare #10 value4 Dither is applied to the Period and Compare #11 ECM Extended Capture Mode 4 read-write value1 Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only. #0 value2 Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared. #1 EMS External Modulation Synchronization 23 read-write value1 External Modulation functionality is not synchronized with the PWM signal #0 value2 External Modulation functionality is synchronized with the PWM signal #1 EMT External Modulation Type 24 read-write value1 External Modulation functionality is clearing the CC4yST bit. #0 value2 External Modulation functionality is gating the outputs. #1 ENDM Extended Stop Function Control 8 1 read-write value1 Clears the timer run bit only (default stop) #00 value2 Clears the timer only (flush) #01 value3 Clears the timer and run bit (flush/stop) #10 FPE Floating Prescaler enable 16 read-write value1 Floating prescaler mode is disabled #0 value2 Floating prescaler mode is enabled #1 MCME Multi Channel Mode Enable 25 read-write value1 Multi Channel Mode is disabled #0 value2 Multi Channel Mode is enabled #1 SCE Equal Capture Event enable 11 read-write value1 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #0 value2 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #1 STRM Extended Start Function Control 10 read-write value1 Sets run bit only (default start) #0 value2 Clears the timer and sets run bit (flush/start) #1 TCM Timer Counting Mode 0 read-write value1 Edge aligned mode #0 value2 Center aligned mode #1 TRAPE TRAP enable 17 read-write value1 TRAP functionality has no effect on the output #0 value2 TRAP functionality affects the output #1 TRPSE TRAP Synchronization Enable 21 read-write value1 Exiting from TRAP state isn't synchronized with the PWM signal #0 value2 Exiting from TRAP state is synchronized with the PWM signal #1 TRPSW TRAP State Clear Control 22 read-write value1 The slice exits the TRAP state automatically when the TRAP condition is not present #0 value2 The TRAP state can only be exited by a SW request. #1 TSSM Timer Single Shot Mode 1 read-write value1 Single shot mode is disabled #0 value2 Single shot mode is enabled #1 TCCLR Slice Timer Clear 0x10 32 read-write n 0x0 0x0 DITC Dither Counter Clear 2 write-only TCC Timer Clear 1 write-only TRBC Timer Run Bit Clear 0 write-only TCSET Slice Timer Run Set 0xC 32 read-write n 0x0 0x0 TRBS Timer Run Bit set 0 write-only TCST Slice Timer Status 0x8 32 read-write n 0x0 0x0 CDIR Timer Counting Direction 1 read-only value1 Timer is counting up #0 value2 Timer is counting down #1 TRB Timer Run Bit 0 read-only value1 Timer is stopped #0 value2 Timer is running #1 TIMER Timer Value 0x70 32 read-write n 0x0 0x0 TVAL Timer Value 0 15 read-write CCU41_CC42 Capture Compare Unit 4 - Unit 1 CCU4 0x0 0x0 0x100 registers n C0V Capture Register 0 0x74 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C1V Capture Register 1 0x78 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C2V Capture Register 2 0x7C 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C3V Capture Register 3 0x80 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only CMC Connection Matrix Control 0x4 32 read-write n 0x0 0x0 CAP0S External Capture 0 Functionality Selector 4 1 read-write value1 External Capture 0 Function deactivated #00 value2 External Capture 0 Function triggered by Event 0 #01 value3 External Capture 0 Function triggered by Event 1 #10 value4 External Capture 0 Function triggered by Event 2 #11 CAP1S External Capture 1 Functionality Selector 6 1 read-write value1 External Capture 1 Function deactivated #00 value2 External Capture 1 Function triggered by Event 0 #01 value3 External Capture 1 Function triggered by Event 1 #10 value4 External Capture 1 Function triggered by Event 2 #11 CNTS External Count Selector 14 1 read-write value1 External Count Function deactivated #00 value2 External Count Function triggered by Event 0 #01 value3 External Count Function triggered by Event 1 #10 value4 External Count Function triggered by Event 2 #11 ENDS External Stop Functionality Selector 2 1 read-write value1 External Stop Function deactivated #00 value2 External Stop Function triggered by Event 0 #01 value3 External Stop Function triggered by Event 1 #10 value4 External Stop Function triggered by Event 2 #11 GATES External Gate Functionality Selector 8 1 read-write value1 External Gating Function deactivated #00 value2 External Gating Function triggered by Event 0 #01 value3 External Gating Function triggered by Event 1 #10 value4 External Gating Function triggered by Event 2 #11 LDS External Timer Load Functionality Selector 12 1 read-write MOS External Modulation Functionality Selector 18 1 read-write OFS Override Function Selector 16 read-write value1 Override functionality disabled #0 value2 Status bit trigger override connected to Event 1; Status bit value override connected to Event 2 #1 STRTS External Start Functionality Selector 0 1 read-write value1 External Start Function deactivated #00 value2 External Start Function triggered by Event 0 #01 value3 External Start Function triggered by Event 1 #10 value4 External Start Function triggered by Event 2 #11 TCE Timer Concatenation Enable 20 read-write value1 Timer concatenation is disabled #0 value2 Timer concatenation is enabled #1 TS Trap Function Selector 17 read-write value1 Trap function disabled #0 value2 TRAP function connected to Event 2 #1 UDS External Up/Down Functionality Selector 10 1 read-write value1 External Up/Down Function deactivated #00 value2 External Up/Down Function triggered by Event 0 #01 value3 External Up/Down Function triggered by Event 1 #10 value4 External Up/Down Function triggered by Event 2 #11 CR Timer Compare Value 0x38 32 read-write n 0x0 0x0 CR Compare Register 0 15 read-only CRS Timer Shadow Compare Value 0x3C 32 read-write n 0x0 0x0 CRS Compare Register 0 15 read-write DIT Dither Config 0x1C 32 read-write n 0x0 0x0 DCNT Dither counter actual value 8 3 read-only DCV Dither compare Value 0 3 read-only DITS Dither Shadow Register 0x20 32 read-write n 0x0 0x0 DCVS Dither Shadow Compare Value 0 3 read-write FPC Floating Prescaler Control 0x28 32 read-write n 0x0 0x0 PCMP Floating Prescaler Compare Value 0 3 read-only PVAL Actual Prescaler Value 8 3 read-write FPCS Floating Prescaler Shadow 0x2C 32 read-write n 0x0 0x0 PCMP Floating Prescaler Shadow Compare Value 0 3 read-write INS Input Selector Configuration 0x0 32 read-write n 0x0 0x0 EV0EM Event 0 Edge Selection 16 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV0IS Event 0 signal selection 0 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV0LM Event 0 Level Selection 22 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV1EM Event 1 Edge Selection 18 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV1IS Event 1 signal selection 4 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV1LM Event 1 Level Selection 23 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV2EM Event 2 Edge Selection 20 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV2IS Event 2 signal selection 8 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV2LM Event 2 Level Selection 24 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 LPF0M Event 0 Low Pass Filter Configuration 25 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF1M Event 1 Low Pass Filter Configuration 27 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF2M Event 2 Low Pass Filter Configuration 29 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 INTE Interrupt Enable Control 0xA4 32 read-write n 0x0 0x0 CMDE Compare match while counting down enable 3 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMUE Compare match while counting up enable 2 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 E0AE Event 0 interrupt enable 8 read-write value1 Event 0 detection interrupt is disabled #0 value2 Event 0 detection interrupt is enabled #1 E1AE Event 1 interrupt enable 9 read-write value1 Event 1 detection interrupt is disabled #0 value2 Event 1 detection interrupt is enabled #1 E2AE Event 2 interrupt enable 10 read-write value1 Event 2 detection interrupt is disabled #0 value2 Event 2 detection interrupt is enabled #1 OME One match while counting down enable 1 read-write value1 One Match interrupt is disabled #0 value2 One Match interrupt is enabled #1 PME Period match while counting up enable 0 read-write value1 Period Match interrupt is disabled #0 value2 Period Match interrupt is enabled #1 INTS Interrupt Status 0xA0 32 read-write n 0x0 0x0 CMDS Compare Match while Counting Down 3 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMUS Compare Match while Counting Up 2 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 E0AS Event 0 Detection Status 8 read-only value1 Event 0 not detected #0 value2 Event 0 detected #1 E1AS Event 1 Detection Status 9 read-only value1 Event 1 not detected #0 value2 Event 1 detected #1 E2AS Event 2 Detection Status 10 read-only value1 Event 2 not detected #0 value2 Event 2 detected #1 OMDS One Match while Counting Down 1 read-only value1 One match while counting down not detected #0 value2 One match while counting down detected #1 PMUS Period Match while Counting Up 0 read-only value1 Period match while counting up not detected #0 value2 Period match while counting up detected #1 TRPF Trap Flag Status 11 read-only PR Timer Period Value 0x30 32 read-write n 0x0 0x0 PR Period Register 0 15 read-only PRS Timer Shadow Period Value 0x34 32 read-write n 0x0 0x0 PRS Period Register 0 15 read-write PSC Prescaler Control 0x24 32 read-write n 0x0 0x0 PSIV Prescaler Initial Value 0 3 read-write PSL Passive Level Config 0x18 32 read-write n 0x0 0x0 PSL Output Passive Level 0 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 SRS Service Request Selector 0xA8 32 read-write n 0x0 0x0 CMSR Compare match Service request selector 2 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E0SR Event 0 Service request selector 8 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E1SR Event 1 Service request selector 10 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E2SR Event 2 Service request selector 12 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 POSR Period/One match Service request selector 0 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 SWR Interrupt Status Clear 0xB0 32 read-write n 0x0 0x0 RCMD Compare match while counting down clear 3 write-only RCMU Compare match while counting up clear 2 write-only RE0A Event 0 detection clear 8 write-only RE1A Event 1 detection clear 9 write-only RE2A Event 2 detection clear 10 write-only ROM One match while counting down clear 1 write-only RPM Period match while counting up clear 0 write-only RTRPF Trap Flag status clear 11 write-only SWS Interrupt Status Set 0xAC 32 read-write n 0x0 0x0 SCMD Compare match while counting down set 3 write-only SCMU Compare match while counting up set 2 write-only SE0A Event 0 detection set 8 write-only SE1A Event 1 detection set 9 write-only SE2A Event 2 detection set 10 write-only SOM One match while counting down set 1 write-only SPM Period match while counting up set 0 write-only STRPF Trap Flag status set 11 write-only TC Slice Timer Control 0x14 32 read-write n 0x0 0x0 CAPC Clear on Capture Control 5 1 read-write value1 Timer is never cleared on a capture event #00 value2 Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event) #01 value3 Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event) #10 value4 Timer is always cleared in a capture event. #11 CCS Continuous Capture Enable 12 read-write value1 The capture into a specific capture register is done with the rules linked with the full flags, described at . #0 value2 The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back). #1 CLST Shadow Transfer on Clear 2 read-write CMOD Capture Compare Mode 3 read-only value1 Compare Mode #0 value2 Capture Mode #1 DIM Dither input selector 15 read-write value1 Slice is using its own dither unit #0 value2 Slice is connected to the dither unit of slice 0. #1 DITHE Dither Enable 13 1 read-write value1 Dither is disabled #00 value2 Dither is applied to the Period #01 value3 Dither is applied to the Compare #10 value4 Dither is applied to the Period and Compare #11 ECM Extended Capture Mode 4 read-write value1 Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only. #0 value2 Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared. #1 EMS External Modulation Synchronization 23 read-write value1 External Modulation functionality is not synchronized with the PWM signal #0 value2 External Modulation functionality is synchronized with the PWM signal #1 EMT External Modulation Type 24 read-write value1 External Modulation functionality is clearing the CC4yST bit. #0 value2 External Modulation functionality is gating the outputs. #1 ENDM Extended Stop Function Control 8 1 read-write value1 Clears the timer run bit only (default stop) #00 value2 Clears the timer only (flush) #01 value3 Clears the timer and run bit (flush/stop) #10 FPE Floating Prescaler enable 16 read-write value1 Floating prescaler mode is disabled #0 value2 Floating prescaler mode is enabled #1 MCME Multi Channel Mode Enable 25 read-write value1 Multi Channel Mode is disabled #0 value2 Multi Channel Mode is enabled #1 SCE Equal Capture Event enable 11 read-write value1 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #0 value2 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #1 STRM Extended Start Function Control 10 read-write value1 Sets run bit only (default start) #0 value2 Clears the timer and sets run bit (flush/start) #1 TCM Timer Counting Mode 0 read-write value1 Edge aligned mode #0 value2 Center aligned mode #1 TRAPE TRAP enable 17 read-write value1 TRAP functionality has no effect on the output #0 value2 TRAP functionality affects the output #1 TRPSE TRAP Synchronization Enable 21 read-write value1 Exiting from TRAP state isn't synchronized with the PWM signal #0 value2 Exiting from TRAP state is synchronized with the PWM signal #1 TRPSW TRAP State Clear Control 22 read-write value1 The slice exits the TRAP state automatically when the TRAP condition is not present #0 value2 The TRAP state can only be exited by a SW request. #1 TSSM Timer Single Shot Mode 1 read-write value1 Single shot mode is disabled #0 value2 Single shot mode is enabled #1 TCCLR Slice Timer Clear 0x10 32 read-write n 0x0 0x0 DITC Dither Counter Clear 2 write-only TCC Timer Clear 1 write-only TRBC Timer Run Bit Clear 0 write-only TCSET Slice Timer Run Set 0xC 32 read-write n 0x0 0x0 TRBS Timer Run Bit set 0 write-only TCST Slice Timer Status 0x8 32 read-write n 0x0 0x0 CDIR Timer Counting Direction 1 read-only value1 Timer is counting up #0 value2 Timer is counting down #1 TRB Timer Run Bit 0 read-only value1 Timer is stopped #0 value2 Timer is running #1 TIMER Timer Value 0x70 32 read-write n 0x0 0x0 TVAL Timer Value 0 15 read-write CCU41_CC43 Capture Compare Unit 4 - Unit 1 CCU4 0x0 0x0 0x100 registers n C0V Capture Register 0 0x74 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C1V Capture Register 1 0x78 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C2V Capture Register 2 0x7C 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C3V Capture Register 3 0x80 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only CMC Connection Matrix Control 0x4 32 read-write n 0x0 0x0 CAP0S External Capture 0 Functionality Selector 4 1 read-write value1 External Capture 0 Function deactivated #00 value2 External Capture 0 Function triggered by Event 0 #01 value3 External Capture 0 Function triggered by Event 1 #10 value4 External Capture 0 Function triggered by Event 2 #11 CAP1S External Capture 1 Functionality Selector 6 1 read-write value1 External Capture 1 Function deactivated #00 value2 External Capture 1 Function triggered by Event 0 #01 value3 External Capture 1 Function triggered by Event 1 #10 value4 External Capture 1 Function triggered by Event 2 #11 CNTS External Count Selector 14 1 read-write value1 External Count Function deactivated #00 value2 External Count Function triggered by Event 0 #01 value3 External Count Function triggered by Event 1 #10 value4 External Count Function triggered by Event 2 #11 ENDS External Stop Functionality Selector 2 1 read-write value1 External Stop Function deactivated #00 value2 External Stop Function triggered by Event 0 #01 value3 External Stop Function triggered by Event 1 #10 value4 External Stop Function triggered by Event 2 #11 GATES External Gate Functionality Selector 8 1 read-write value1 External Gating Function deactivated #00 value2 External Gating Function triggered by Event 0 #01 value3 External Gating Function triggered by Event 1 #10 value4 External Gating Function triggered by Event 2 #11 LDS External Timer Load Functionality Selector 12 1 read-write MOS External Modulation Functionality Selector 18 1 read-write OFS Override Function Selector 16 read-write value1 Override functionality disabled #0 value2 Status bit trigger override connected to Event 1; Status bit value override connected to Event 2 #1 STRTS External Start Functionality Selector 0 1 read-write value1 External Start Function deactivated #00 value2 External Start Function triggered by Event 0 #01 value3 External Start Function triggered by Event 1 #10 value4 External Start Function triggered by Event 2 #11 TCE Timer Concatenation Enable 20 read-write value1 Timer concatenation is disabled #0 value2 Timer concatenation is enabled #1 TS Trap Function Selector 17 read-write value1 Trap function disabled #0 value2 TRAP function connected to Event 2 #1 UDS External Up/Down Functionality Selector 10 1 read-write value1 External Up/Down Function deactivated #00 value2 External Up/Down Function triggered by Event 0 #01 value3 External Up/Down Function triggered by Event 1 #10 value4 External Up/Down Function triggered by Event 2 #11 CR Timer Compare Value 0x38 32 read-write n 0x0 0x0 CR Compare Register 0 15 read-only CRS Timer Shadow Compare Value 0x3C 32 read-write n 0x0 0x0 CRS Compare Register 0 15 read-write DIT Dither Config 0x1C 32 read-write n 0x0 0x0 DCNT Dither counter actual value 8 3 read-only DCV Dither compare Value 0 3 read-only DITS Dither Shadow Register 0x20 32 read-write n 0x0 0x0 DCVS Dither Shadow Compare Value 0 3 read-write FPC Floating Prescaler Control 0x28 32 read-write n 0x0 0x0 PCMP Floating Prescaler Compare Value 0 3 read-only PVAL Actual Prescaler Value 8 3 read-write FPCS Floating Prescaler Shadow 0x2C 32 read-write n 0x0 0x0 PCMP Floating Prescaler Shadow Compare Value 0 3 read-write INS Input Selector Configuration 0x0 32 read-write n 0x0 0x0 EV0EM Event 0 Edge Selection 16 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV0IS Event 0 signal selection 0 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV0LM Event 0 Level Selection 22 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV1EM Event 1 Edge Selection 18 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV1IS Event 1 signal selection 4 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV1LM Event 1 Level Selection 23 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV2EM Event 2 Edge Selection 20 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV2IS Event 2 signal selection 8 3 read-write value1 CCU4x.INyA #0000 value2 CCU4x.INyB #0001 value3 CCU4x.INyC #0010 value4 CCU4x.INyD #0011 value5 CCU4x.INyE #0100 value6 CCU4x.INyF #0101 value7 CCU4x.INyG #0110 value8 CCU4x.INyH #0111 value9 CCU4x.INyI #1000 value10 CCU4x.INyJ #1001 value11 CCU4x.INyK #1010 value12 CCU4x.INyL #1011 value13 CCU4x.INyM #1100 value14 CCU4x.INyN #1101 value15 CCU4x.INyO #1110 value16 CCU4x.INyP #1111 EV2LM Event 2 Level Selection 24 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 LPF0M Event 0 Low Pass Filter Configuration 25 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF1M Event 1 Low Pass Filter Configuration 27 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 LPF2M Event 2 Low Pass Filter Configuration 29 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU4 #01 value3 5 clock cycles of fCCU4 #10 value4 7 clock cycles of fCCU4 #11 INTE Interrupt Enable Control 0xA4 32 read-write n 0x0 0x0 CMDE Compare match while counting down enable 3 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMUE Compare match while counting up enable 2 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 E0AE Event 0 interrupt enable 8 read-write value1 Event 0 detection interrupt is disabled #0 value2 Event 0 detection interrupt is enabled #1 E1AE Event 1 interrupt enable 9 read-write value1 Event 1 detection interrupt is disabled #0 value2 Event 1 detection interrupt is enabled #1 E2AE Event 2 interrupt enable 10 read-write value1 Event 2 detection interrupt is disabled #0 value2 Event 2 detection interrupt is enabled #1 OME One match while counting down enable 1 read-write value1 One Match interrupt is disabled #0 value2 One Match interrupt is enabled #1 PME Period match while counting up enable 0 read-write value1 Period Match interrupt is disabled #0 value2 Period Match interrupt is enabled #1 INTS Interrupt Status 0xA0 32 read-write n 0x0 0x0 CMDS Compare Match while Counting Down 3 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMUS Compare Match while Counting Up 2 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 E0AS Event 0 Detection Status 8 read-only value1 Event 0 not detected #0 value2 Event 0 detected #1 E1AS Event 1 Detection Status 9 read-only value1 Event 1 not detected #0 value2 Event 1 detected #1 E2AS Event 2 Detection Status 10 read-only value1 Event 2 not detected #0 value2 Event 2 detected #1 OMDS One Match while Counting Down 1 read-only value1 One match while counting down not detected #0 value2 One match while counting down detected #1 PMUS Period Match while Counting Up 0 read-only value1 Period match while counting up not detected #0 value2 Period match while counting up detected #1 TRPF Trap Flag Status 11 read-only PR Timer Period Value 0x30 32 read-write n 0x0 0x0 PR Period Register 0 15 read-only PRS Timer Shadow Period Value 0x34 32 read-write n 0x0 0x0 PRS Period Register 0 15 read-write PSC Prescaler Control 0x24 32 read-write n 0x0 0x0 PSIV Prescaler Initial Value 0 3 read-write PSL Passive Level Config 0x18 32 read-write n 0x0 0x0 PSL Output Passive Level 0 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 SRS Service Request Selector 0xA8 32 read-write n 0x0 0x0 CMSR Compare match Service request selector 2 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E0SR Event 0 Service request selector 8 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E1SR Event 1 Service request selector 10 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 E2SR Event 2 Service request selector 12 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 POSR Period/One match Service request selector 0 1 read-write value1 Forward to CC4ySR0 #00 value2 Forward to CC4ySR1 #01 value3 Forward to CC4ySR2 #10 value4 Forward to CC4ySR3 #11 SWR Interrupt Status Clear 0xB0 32 read-write n 0x0 0x0 RCMD Compare match while counting down clear 3 write-only RCMU Compare match while counting up clear 2 write-only RE0A Event 0 detection clear 8 write-only RE1A Event 1 detection clear 9 write-only RE2A Event 2 detection clear 10 write-only ROM One match while counting down clear 1 write-only RPM Period match while counting up clear 0 write-only RTRPF Trap Flag status clear 11 write-only SWS Interrupt Status Set 0xAC 32 read-write n 0x0 0x0 SCMD Compare match while counting down set 3 write-only SCMU Compare match while counting up set 2 write-only SE0A Event 0 detection set 8 write-only SE1A Event 1 detection set 9 write-only SE2A Event 2 detection set 10 write-only SOM One match while counting down set 1 write-only SPM Period match while counting up set 0 write-only STRPF Trap Flag status set 11 write-only TC Slice Timer Control 0x14 32 read-write n 0x0 0x0 CAPC Clear on Capture Control 5 1 read-write value1 Timer is never cleared on a capture event #00 value2 Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event) #01 value3 Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event) #10 value4 Timer is always cleared in a capture event. #11 CCS Continuous Capture Enable 12 read-write value1 The capture into a specific capture register is done with the rules linked with the full flags, described at . #0 value2 The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back). #1 CLST Shadow Transfer on Clear 2 read-write CMOD Capture Compare Mode 3 read-only value1 Compare Mode #0 value2 Capture Mode #1 DIM Dither input selector 15 read-write value1 Slice is using its own dither unit #0 value2 Slice is connected to the dither unit of slice 0. #1 DITHE Dither Enable 13 1 read-write value1 Dither is disabled #00 value2 Dither is applied to the Period #01 value3 Dither is applied to the Compare #10 value4 Dither is applied to the Period and Compare #11 ECM Extended Capture Mode 4 read-write value1 Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only. #0 value2 Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared. #1 EMS External Modulation Synchronization 23 read-write value1 External Modulation functionality is not synchronized with the PWM signal #0 value2 External Modulation functionality is synchronized with the PWM signal #1 EMT External Modulation Type 24 read-write value1 External Modulation functionality is clearing the CC4yST bit. #0 value2 External Modulation functionality is gating the outputs. #1 ENDM Extended Stop Function Control 8 1 read-write value1 Clears the timer run bit only (default stop) #00 value2 Clears the timer only (flush) #01 value3 Clears the timer and run bit (flush/stop) #10 FPE Floating Prescaler enable 16 read-write value1 Floating prescaler mode is disabled #0 value2 Floating prescaler mode is enabled #1 MCME Multi Channel Mode Enable 25 read-write value1 Multi Channel Mode is disabled #0 value2 Multi Channel Mode is enabled #1 SCE Equal Capture Event enable 11 read-write value1 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #0 value2 Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #1 STRM Extended Start Function Control 10 read-write value1 Sets run bit only (default start) #0 value2 Clears the timer and sets run bit (flush/start) #1 TCM Timer Counting Mode 0 read-write value1 Edge aligned mode #0 value2 Center aligned mode #1 TRAPE TRAP enable 17 read-write value1 TRAP functionality has no effect on the output #0 value2 TRAP functionality affects the output #1 TRPSE TRAP Synchronization Enable 21 read-write value1 Exiting from TRAP state isn't synchronized with the PWM signal #0 value2 Exiting from TRAP state is synchronized with the PWM signal #1 TRPSW TRAP State Clear Control 22 read-write value1 The slice exits the TRAP state automatically when the TRAP condition is not present #0 value2 The TRAP state can only be exited by a SW request. #1 TSSM Timer Single Shot Mode 1 read-write value1 Single shot mode is disabled #0 value2 Single shot mode is enabled #1 TCCLR Slice Timer Clear 0x10 32 read-write n 0x0 0x0 DITC Dither Counter Clear 2 write-only TCC Timer Clear 1 write-only TRBC Timer Run Bit Clear 0 write-only TCSET Slice Timer Run Set 0xC 32 read-write n 0x0 0x0 TRBS Timer Run Bit set 0 write-only TCST Slice Timer Status 0x8 32 read-write n 0x0 0x0 CDIR Timer Counting Direction 1 read-only value1 Timer is counting up #0 value2 Timer is counting down #1 TRB Timer Run Bit 0 read-only value1 Timer is stopped #0 value2 Timer is running #1 TIMER Timer Value 0x70 32 read-write n 0x0 0x0 TVAL Timer Value 0 15 read-write CCU80 Capture Compare Unit 8 - Unit 0 CCU8 0x0 0x0 0x100 registers n CCU80_0 Capture Compare Unit 8 (Module 0) 60 CCU80_1 Capture Compare Unit 8 (Module 0) 61 CCU80_2 Capture Compare Unit 8 (Module 0) 62 CCU80_3 Capture Compare Unit 8 (Module 0) 63 ECRD Extended Capture Mode Read 0x50 32 read-write n 0x0 0x0 modifyExternal CAPV Timer Capture Value 0 15 read-only FFL Full Flag 24 read-only value1 No new value was captured into this register #0 value2 A new value has been captured into this register #1 FPCV Prescaler Capture value 16 3 read-only SPTR Slice pointer 20 1 read-only value1 CC80 #00 value2 CC81 #01 value3 CC82 #10 value4 CC83 #11 VPTR Capture register pointer 22 1 read-only value1 Capture register 0 #00 value2 Capture register 1 #01 value3 Capture register 2 #10 value4 Capture register 3 #11 GCSC Global Channel Clear 0x14 32 read-write n 0x0 0x0 S0DSC Slice 0 Dither shadow transfer clear 1 write-only S0PSC Slice 0 Prescaler shadow transfer clear 2 write-only S0SC Slice 0 shadow transfer request clear 0 write-only S0ST1C Slice 0 status bit 1 clear 16 write-only S0ST2C Slice 0 status bit 2 clear 20 write-only S1DSC Slice 1 Dither shadow transfer clear 5 write-only S1PSC Slice 1 Prescaler shadow transfer clear 6 write-only S1SC Slice 1 shadow transfer clear 4 write-only S1ST1C Slice 1 status bit 1 clear 17 write-only S1ST2C Slice 1 status bit 2 clear 21 write-only S2DSC Slice 2 Dither shadow transfer clear 9 write-only S2PSC Slice 2 Prescaler shadow transfer clear 10 write-only S2SC Slice 2 shadow transfer clear 8 write-only S2ST1C Slice 2 status bit 1 clear 18 write-only S2ST2C Slice 2 status bit 2 clear 22 write-only S3DSC Slice 3 Dither shadow transfer clear 13 write-only S3PSC Slice 3 Prescaler shadow transfer clear 14 write-only S3SC Slice 3 shadow transfer clear 12 write-only S3ST1C Slice 3 status bit 1 clear 19 write-only S3ST2C Slice 3 status bit 2 clear 23 write-only GCSS Global Channel Set 0x10 32 read-write n 0x0 0x0 S0DSE Slice 0 Dither shadow transfer set enable 1 write-only S0PSE Slice 0 Prescaler shadow transfer set enable 2 write-only S0SE Slice 0 shadow transfer set enable 0 write-only S0ST1S Slice 0 status bit 1 set 16 write-only S0ST2S Slice 0 status bit 2 set 20 write-only S1DSE Slice 1 Dither shadow transfer set enable 5 write-only S1PSE Slice 1 Prescaler shadow transfer set enable 6 write-only S1SE Slice 1 shadow transfer set enable 4 write-only S1ST1S Slice 1 status bit 1 set 17 write-only S1ST2S Slice 1 status bit 2 set 21 write-only S2DSE Slice 2 Dither shadow transfer set enable 9 write-only S2PSE Slice 2 Prescaler shadow transfer set enable 10 write-only S2SE Slice 2 shadow transfer set enable 8 write-only S2ST1S Slice 2 status bit 1 set 18 write-only S2ST2S Slice 2 status bit 2 set 22 write-only S3DSE Slice 3 Dither shadow transfer set enable 13 write-only S3PSE Slice 3 Prescaler shadow transfer set enable 14 write-only S3SE Slice 3 shadow transfer set enable 12 write-only S3ST1S Slice 3 status bit 1 set 19 write-only S3ST2S Slice 3 status bit 2 set 23 write-only GCST Global Channel status 0x18 32 read-write n 0x0 0x0 CC80ST1 Slice 0 compare channel 1 status bit 16 read-only CC80ST2 Slice 0 compare channel 2 status bit 20 read-only CC81ST1 Slice 1 compare channel 1 status bit 17 read-only CC81ST2 Slice 1 compare channel 2 status bit 21 read-only CC82ST1 Slice 2 compare channel 1 status bit 18 read-only CC82ST2 Slice 2 compare channel 2 status bit 22 read-only CC83ST1 Slice 3 compare channel 1 status bit 19 read-only CC83ST2 Slice 3 compare channel 2 status bit 23 read-only S0DSS Slice 0 Dither shadow transfer status 1 read-only value1 Dither shadow transfer has not been requested #0 value2 Dither shadow transfer has been requested #1 S0PSS Slice 0 Prescaler shadow transfer status 2 read-only value1 Prescaler shadow transfer has not been requested #0 value2 Prescaler shadow transfer has been requested #1 S0SS Slice 0 shadow transfer status 0 read-only value1 Shadow transfer has not been requested #0 value2 Shadow transfer has been requested #1 S1DSS Slice 1 Dither shadow transfer status 5 read-only value1 Dither shadow transfer has not been requested #0 value2 Dither shadow transfer has been requested #1 S1PSS Slice 1 Prescaler shadow transfer status 6 read-only value1 Prescaler shadow transfer has not been requested #0 value2 Prescaler shadow transfer has been requested #1 S1SS Slice 1 shadow transfer status 4 read-only value1 Shadow transfer has not been requested #0 value2 Shadow transfer has been requested #1 S2DSS Slice 2 Dither shadow transfer status 9 read-only value1 Dither shadow transfer has not been requested #0 value2 Dither shadow transfer has been requested #1 S2PSS Slice 2 Prescaler shadow transfer status 10 read-only value1 Prescaler shadow transfer has not been requested #0 value2 Prescaler shadow transfer has been requested #1 S2SS Slice 2 shadow transfer status 8 read-only value1 Shadow transfer has not been requested #0 value2 Shadow transfer has been requested #1 S3DSS Slice 3 Dither shadow transfer status 13 read-only value1 Dither shadow transfer has not been requested #0 value2 Dither shadow transfer has been requested #1 S3PSS Slice 3 Prescaler shadow transfer status 14 read-only value1 Prescaler shadow transfer has not been requested #0 value2 Prescaler shadow transfer has been requested #1 S3SS Slice 3 shadow transfer status 12 read-only value1 Shadow transfer has not been requested #0 value2 Shadow transfer has been requested #1 GCTRL Global Control Register 0x0 32 read-write n 0x0 0x0 MSDE Multi Channel shadow transfer request configuration 14 1 read-write value1 Only the shadow transfer for period and compare values is requested #00 value2 Shadow transfer for the compare, period and prescaler compare values is requested #01 value4 Shadow transfer for the compare, period, prescaler and dither compare values is requested #11 MSE0 Slice 0 Multi Channel shadow transfer enable 10 read-write value1 Shadow transfer can only be requested by SW #0 value2 Shadow transfer can be requested via SW and via the CCU8x.MCSS input. #1 MSE1 Slice 1 Multi Channel shadow transfer enable 11 read-write value1 Shadow transfer can only be requested by SW #0 value2 Shadow transfer can be requested via SW and via the CCU8x.MCSS input. #1 MSE2 Slice 2 Multi Channel shadow transfer enable 12 read-write value1 Shadow transfer can only be requested by SW #0 value2 Shadow transfer can be requested via SW and via the CCU8xMCSS input. #1 MSE3 Slice 3 Multi Channel shadow transfer enable 13 read-write value1 Shadow transfer can only be requested by SW #0 value2 Shadow transfer can be requested via SW and via the CCU8x.MCSS input. #1 PCIS Prescaler Input Clock Selection 4 1 read-write value1 Module clock #00 value2 CCU8x.ECLKA #01 value3 CCU8x.ECLKB #10 value4 CCU8x.ECLKC #11 PRBC Prescaler Clear Configuration 0 2 read-write value1 SW only #000 value2 GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC80 is cleared. #001 value3 GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC81 is cleared. #010 value4 GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC82 is cleared. #011 value5 GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC83 is cleared. #100 SUSCFG Suspend Mode Configuration 8 1 read-write value1 Suspend request ignored. The module never enters in suspend #00 value2 Stops all the running slices immediately. Safe stop is not applied. #01 value3 Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied. #10 value4 Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied. #11 GIDLC Global Idle Clear 0xC 32 read-write n 0x0 0x0 CS0I CC80 IDLE mode clear 0 write-only CS1I CC81 IDLE mode clear 1 write-only CS2I CC82 IDLE mode clear 2 write-only CS3I CC83 IDLE mode clear 3 write-only SPCH Parity Checker run bit set 10 write-only SPRB Prescaler Run Bit Set 8 write-only GIDLS Global Idle Set 0x8 32 read-write n 0x0 0x0 CPCH Parity Checker Run bit clear 10 write-only CPRB Prescaler# Run Bit Clear 8 write-only PSIC Prescaler clear 9 write-only SS0I CC80 IDLE mode set 0 write-only SS1I CC81 IDLE mode set 1 write-only SS2I CC82 IDLE mode set 2 write-only SS3I CC83 IDLE mode set 3 write-only GPCHK Parity Checker Configuration 0x1C 32 read-write n 0x0 0x0 PACS Parity Checker Automatic start/stop selector 1 1 read-write value1 CC80 #00 value2 CC81 #01 value3 CC82 #10 value4 CC83 #11 PASE Parity Checker Automatic start/stop 0 read-write PCDS Parity Checker Delay Input Selector 5 1 read-write value1 CCU8x.IGBTA #00 value2 CCU8x.IGBTB #01 value3 CCU8x.IGBTC #10 value4 CCU8x.IGBTD #11 PCSEL0 Parity Checker Slice 0 output selection 16 3 read-write PCSEL1 Parity Checker Slice 1 output selection 20 3 read-write PCSEL2 Parity Checker Slice 2 output selection 24 3 read-write PCSEL3 Parity Checker Slice 3 output selection 28 3 read-write PCST Parity Checker XOR status 15 read-only PCTS Parity Checker type selector 7 read-write value1 Even parity enabled #0 value2 Odd parity enabled #1 PISEL Driver Input signal selector 3 1 read-write value1 CC8x.GP01 - driver output is connected to event 1 of slice 0 #00 value2 CC8x.GP11 - drive output is connected to event 1 of slice 1 #01 value3 CC8x.GP21 - driver output is connected to event 1 of slice 2 #10 value4 CC8x.GP31 - driver output is connected to event 1 of slice 3 #11 GSTAT Global Status Register 0x4 32 read-write n 0x0 0x0 PCRB Parity Checker Run Bit 10 read-only value1 Parity Checker is stopped #0 value2 Parity Checker is running #1 PRB Prescaler Run Bit 8 read-only value1 Prescaler is stopped #0 value2 Prescaler is running #1 S0I CC80 IDLE status 0 read-only value1 Running #0 value2 Idle #1 S1I CC81 IDLE status 1 read-only value1 Running #0 value2 Idle #1 S2I CC82 IDLE status 2 read-only value1 Running #0 value2 Idle #1 S3I CC83 IDLE status 3 read-only value1 Running #0 value2 Idle #1 MIDR Module Identification 0x80 32 read-write n 0x0 0x0 MODN Module Number 16 15 read-only MODR Module Revision 0 7 read-only MODT Module Type 8 7 read-only CCU80_CC80 Capture Compare Unit 8 - Unit 0 CCU8 0x0 0x0 0x100 registers n C0V Capture Register 0 0x74 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C1V Capture Register 1 0x78 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C2V Capture Register 2 0x7C 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C3V Capture Register 3 0x80 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only CHC Channel Control 0x48 32 read-write n 0x0 0x0 ASE Asymmetric PWM mode Enable 0 read-write value1 Asymmetric PWM is disabled #0 value2 Asymmetric PWM is enabled #1 OCS1 Output selector for CCU8x.OUTy0 1 read-write value1 CC8yST1 signal path is connected to the CCU8x.OUTy0 #0 value2 Inverted CC8yST1 signal path is connected to the CCU8x.OUTy0 #1 OCS2 Output selector for CCU8x.OUTy1 2 read-write value1 Inverted CC8yST1 signal path is connected to the CCU8x.OUTy1 #0 value2 CC8yST1 signal path is connected to the CCU8x.OUTy1 #1 OCS3 Output selector for CCU8x.OUTy2 3 read-write value1 CC8yST2 signal path is connected to the CCU8x.OUTy2 #0 value2 Inverted CCST2 signal path is connected to the CCU8x.OUTy2 #1 OCS4 Output selector for CCU8x.OUTy3 4 read-write value1 Inverted CC8yST2 signal path is connected to the CCU8x.OUTy3 #0 value2 CC8yST2 signal path is connected to the CCU8x.OUTy3 #1 CMC Connection Matrix Control 0x4 32 read-write n 0x0 0x0 CAP0S External Capture 0 Functionality Selector 4 1 read-write value1 External Capture 0 Function deactivated #00 value2 External Capture 0 Function triggered by Event 0 #01 value3 External Capture 0 Function triggered by Event 1 #10 value4 External Capture 0 Function triggered by Event 2 #11 CAP1S External Capture 1 Functionality Selector 6 1 read-write value1 External Capture 1 Function deactivated #00 value2 External Capture 1 Function triggered by Event 0 #01 value3 External Capture 1 Function triggered by Event 1 #10 value4 External Capture 1 Function triggered by Event 2 #11 CNTS External Count Selector 14 1 read-write value1 External Count Function deactivated #00 value2 External Count Function triggered by Event 0 #01 value3 External Count Function triggered by Event 1 #10 value4 External Count Function triggered by Event 2 #11 ENDS External Stop Functionality Selector 2 1 read-write value1 External Stop Function deactivated #00 value2 External Stop Function triggered by Event 0 #01 value3 External Stop Function triggered by Event 1 #10 value4 External Stop Function triggered by Event 2 #11 GATES External Gate Functionality Selector 8 1 read-write value1 External Gating Function deactivated #00 value2 External Gating Function triggered by Event 0 #01 value3 External Gating Function triggered by Event 1 #10 value4 External Gating Function triggered by Event 2 #11 LDS External Timer Load Functionality Selector 12 1 read-write MOS External Modulation Functionality Selector 18 1 read-write OFS Override Function Selector 16 read-write value1 Override functionality disabled #0 value2 Status bit trigger override connected to Event 1; Status bit value override connected to Event 2 #1 STRTS External Start Functionality Selector 0 1 read-write value1 External Start Function deactivated #00 value2 External Start Function triggered by Event 0 #01 value3 External Start Function triggered by Event 1 #10 value4 External Start Function triggered by Event 2 #11 TCE Timer Concatenation Enable 20 read-write value1 Timer concatenation is disabled #0 value2 Timer concatenation is enabled #1 TS Trap Function Selector 17 read-write value1 Trap function disabled #0 value2 TRAP function connected to Event 2 #1 UDS External Up/Down Functionality Selector 10 1 read-write value1 External Up/Down Function deactivated #00 value2 External Up/Down Function triggered by Event 0 #01 value3 External Up/Down Function triggered by Event 1 #10 value4 External Up/Down Function triggered by Event 2 #11 CR1 Channel 1 Compare Value 0x38 32 read-write n 0x0 0x0 CR1 Compare Register for Channel 1 0 15 read-only CR1S Channel 1 Compare Shadow Value 0x3C 32 read-write n 0x0 0x0 CR1S Shadow Compare Register for Channel 1 0 15 read-write CR2 Channel 2 Compare Value 0x40 32 read-write n 0x0 0x0 CR2 Compare Register for Channel 2 0 15 read-only CR2S Channel 2 Compare Shadow Value 0x44 32 read-write n 0x0 0x0 CR2S Shadow Compare Register for Channel 2 0 15 read-write DC1R Channel 1 Dead Time Values 0x50 32 read-write n 0x0 0x0 DT1F Fall Value for Dead Time of Channel 1 8 7 read-write DT1R Rise Value for Dead Time of Channel 1 0 7 read-write DC2R Channel 2 Dead Time Values 0x54 32 read-write n 0x0 0x0 DT2F Fall Value for Dead Time of Channel 2 8 7 read-write DT2R Rise Value for Dead Time of Channel 2 0 7 read-write DIT Dither Config 0x1C 32 read-write n 0x0 0x0 DCNT Dither counter actual value 8 3 read-only DCV Dither compare Value 0 3 read-only DITS Dither Shadow Register 0x20 32 read-write n 0x0 0x0 DCVS Dither Shadow Compare Value 0 3 read-write DTC Dead Time Control 0x4C 32 read-write n 0x0 0x0 DCEN1 Dead Time Enable for CC8yST1 2 read-write value1 Dead Time for CC8yST1 path is disabled #0 value2 Dead Time for CC8yST1 path is enabled #1 DCEN2 Dead Time Enable for inverted CC8yST1 3 read-write value1 Dead Time for inverted CC8yST1 path is disabled #0 value2 Dead Time for inverted CC8yST1 path is enabled #1 DCEN3 Dead Time Enable for CC8yST2 4 read-write value1 Dead Time for CC8yST2 path is disabled #0 value2 Dead Time for CC8yST2 path is enabled #1 DCEN4 Dead Time Enable for inverted CC8yST2 5 read-write value1 Dead Time for inverted CC8yST2 path is disabled #0 value2 Dead Time for inverted CC8yST2 path is enabled #1 DTCC Dead Time clock control 6 1 read-write value1 ftclk #00 value2 ftclk/2 #01 value3 ftclk/4 #10 value4 ftclk/8 #11 DTE1 Dead Time Enable for Channel 1 0 read-write value1 Dead Time for channel 1 is disabled #0 value2 Dead Time for channel 1 is enabled #1 DTE2 Dead Time Enable for Channel 2 1 read-write value1 Dead Time for channel 2 is disabled #0 value2 Dead Time for channel 2 is enabled #1 FPC Floating Prescaler Control 0x28 32 read-write n 0x0 0x0 PCMP Floating Prescaler Compare Value 0 3 read-only PVAL Actual Prescaler Value 8 3 read-write FPCS Floating Prescaler Shadow 0x2C 32 read-write n 0x0 0x0 PCMP Floating Prescaler Shadow Compare Value 0 3 read-write INS Input Selector Configuration 0x0 32 read-write n 0x0 0x0 EV0EM Event 0 Edge Selection 16 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV0IS Event 0 signal selection 0 3 read-write value1 CCU8x.INyA #0000 value2 CCU8x.INyB #0001 value3 CCU8x.INyC #0010 value4 CCU8x.INyD #0011 value5 CCU8x.INyE #0100 value6 CCU8x.INyF #0101 value7 CCU8x.INyG #0110 value8 CCU8x.INyH #0111 value9 CCU8x.INyI #1000 value10 CCU8x.INyJ #1001 value11 CCU8x.INyK #1010 value12 CCU8x.INyL #1011 value13 CCU8x.INyM #1100 value14 CCU8x.INyN #1101 value15 CCU8x.INyO #1110 value16 CCU8x.INyP #1111 EV0LM Event 0 Level Selection 22 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV1EM Event 1 Edge Selection 18 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV1IS Event 1 signal selection 4 3 read-write value1 CCU8x.INyA #0000 value2 CCU8x.INyB #0001 value3 CCU8x.INyC #0010 value4 CCU8x.INyD #0011 value5 CCU8x.INyE #0100 value6 CCU8x.INyF #0101 value7 CCU8x.INyG #0110 value8 CCU8x.INyH #0111 value9 CCU8x.INyI #1000 value10 CCU8x.INyJ #1001 value11 CCU8x.INyK #1010 value12 CCU8x.INyL #1011 value13 CCU8x.INyM #1100 value14 CCU8x.INyN #1101 value15 CCU8x.INyO #1110 value16 CCU8x.INyP #1111 EV1LM Event 1 Level Selection 23 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV2EM Event 2 Edge Selection 20 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV2IS Event 2 signal selection 8 3 read-write value1 CCU8x.INyA #0000 value2 CCU8x.INyB #0001 value3 CCU8x.INyC #0010 value4 CCU8x.INyD #0011 value5 CCU8x.INyE #0100 value6 CCU8x.INyF #0101 value7 CCU8x.INyG #0110 value8 CCU8x.INyH #0111 value9 CCU8x.INyI #1000 value10 CCU8x.INyJ #1001 value11 CCU8x.INyK #1010 value12 CCU8x.INyL #1011 value13 CCU8x.INyM #1100 value14 CCU8x.INyN #1101 value15 CCU8x.INyO #1110 value16 CCU8x.INyP #1111 EV2LM Event 2 Level Selection 24 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 LPF0M Event 0 Low Pass Filter Configuration 25 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU8 #01 value3 5 clock cycles of fCCU8 #10 value4 7 clock cycles of fCCU8 #11 LPF1M Event 1 Low Pass Filter Configuration 27 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU8 #01 value3 5 clock cycles of fCCU8 #10 value4 7 clock cycles of fCCU8 #11 LPF2M Event 2 Low Pass Filter Configuration 29 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU8 #01 value3 5 clock cycles of fCCU8 #10 value4 7 clock cycles of fCCU8 #11 INTE Interrupt Enable Control 0xA4 32 read-write n 0x0 0x0 CMD1E Channel 1 Compare match while counting down enable 3 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMD2E Channel 2 Compare match while counting down enable 5 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMU1E Channel 1 Compare match while counting up enable 2 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 CMU2E Channel 2 Compare match while counting up enable 4 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 E0AE Event 0 interrupt enable 8 read-write value1 Event 0 detection interrupt is disabled #0 value2 Event 0 detection interrupt is enabled #1 E1AE Event 1 interrupt enable 9 read-write value1 Event 1 detection interrupt is disabled #0 value2 Event 1 detection interrupt is enabled #1 E2AE Event 2 interrupt enable 10 read-write value1 Event 2 detection interrupt is disabled #0 value2 Event 2 detection interrupt is enabled #1 OME One match while counting down enable 1 read-write value1 One Match interrupt is disabled #0 value2 One Match interrupt is enabled #1 PME Period match while counting up enable 0 read-write value1 Period Match interrupt is disabled #0 value2 Period Match interrupt is enabled #1 INTS Interrupt Status 0xA0 32 read-write n 0x0 0x0 CMD1S Channel 1 Compare Match while Counting Down 3 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMD2S Channel 2 Compare Match while Counting Down 5 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMU1S Channel 1 Compare Match while Counting Up 2 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 CMU2S Channel 2 Compare Match while Counting Up 4 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 E0AS Event 0 Detection Status 8 read-only value1 Event 0 not detected #0 value2 Event 0 detected #1 E1AS Event 1 Detection Status 9 read-only value1 Event 1 not detected #0 value2 Event 1 detected #1 E2AS Event 2 Detection Status 10 read-only value1 Event 2 not detected #0 value2 Event 2 detected #1 OMDS One Match while Counting Down 1 read-only value1 One match while counting down not detected #0 value2 One match while counting down detected #1 PMUS Period Match while Counting Up 0 read-only value1 Period match while counting up not detected #0 value2 Period match while counting up detected #1 TRPF Trap Flag Status 11 read-only PR Timer Period Value 0x30 32 read-write n 0x0 0x0 PR Period Register 0 15 read-only PRS Timer Shadow Period Value 0x34 32 read-write n 0x0 0x0 PRS Period Register 0 15 read-write PSC Prescaler Control 0x24 32 read-write n 0x0 0x0 PSIV Prescaler Initial Value 0 3 read-write PSL Passive Level Config 0x18 32 read-write n 0x0 0x0 PSL11 Output Passive Level for CCU8x.OUTy0 0 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 PSL12 Output Passive Level for CCU8x.OUTy1 1 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 PSL21 Output Passive Level for CCU8x.OUTy2 2 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 PSL22 Output Passive Level for CCU8x.OUTy3 3 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 SRS Service Request Selector 0xA8 32 read-write n 0x0 0x0 CM1SR Channel 1 Compare match Service request selector 2 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 CM2SR Channel 2 Compare match Service request selector 4 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 E0SR Event 0 Service request selector 8 1 read-write value1 Forward to CCvySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 E1SR Event 1 Service request selector 10 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 E2SR Event 2 Service request selector 12 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CCvySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 POSR Period/One match Service request selector 0 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 STC Shadow transfer control 0xB4 32 read-write n 0x0 0x0 CSE Cascaded shadow transfer enable 0 read-write value1 Cascaded shadow transfer disabled #0 value2 Cascaded shadow transfer enabled #1 STM Shadow transfer mode 1 1 read-write value1 Shadow transfer is done in Period Match and One match. #00 value2 Shadow transfer is done only in Period Match. #01 value3 Shadow transfer is done only in One Match. #10 SWR Interrupt Status Clear 0xB0 32 read-write n 0x0 0x0 RCM1D Channel 1 Compare match while counting down clear 3 write-only RCM1U Channel 1 Compare match while counting up clear 2 write-only RCM2D Channel 2 Compare match while counting down clear 5 write-only RCM2U Channel 2 Compare match while counting up clear 4 write-only RE0A Event 0 detection clear 8 write-only RE1A Event 1 detection clear 9 write-only RE2A Event 2 detection clear 10 write-only ROM One match while counting down clear 1 write-only RPM Period match while counting up clear 0 write-only RTRPF Trap Flag status clear 11 write-only SWS Interrupt Status Set 0xAC 32 read-write n 0x0 0x0 SCM1D Channel 1 Compare match while counting down set 3 write-only SCM1U Channel 1 Compare match while counting up set 2 write-only SCM2D Compare match while counting down set 5 write-only SCM2U Compare match while counting up set 4 write-only SE0A Event 0 detection set 8 write-only SE1A Event 1 detection set 9 write-only SE2A Event 2 detection set 10 write-only SOM One match while counting down set 1 write-only SPM Period match while counting up set 0 write-only STRPF Trap Flag status set 11 write-only TC Slice Timer Control 0x14 32 read-write n 0x0 0x0 CAPC Clear on Capture Control 5 1 read-write value1 Timer is never cleared on a capture event #00 value2 Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event) #01 value3 Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event) #10 value4 Timer is always cleared in a capture event. #11 CCS Continuous Capture Enable 12 read-write value1 The capture into a specific capture register is done with the rules linked with the full flags, described at . #0 value2 The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back). #1 CLST Shadow Transfer on Clear 2 read-write CMOD Capture Compare Mode 3 read-only value1 Compare Mode #0 value2 Capture Mode #1 DIM Dither input selector 15 read-write value1 Slice is using it own dither unit #0 value2 Slice is connected to the dither unit of slice 0. #1 DITHE Dither Enable 13 1 read-write value1 Dither is disabled #00 value2 Dither is applied to the Period #01 value3 Dither is applied to the Compare #10 value4 Dither is applied to the Period and Compare #11 ECM Extended Capture Mode 4 read-write value1 Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only. #0 value2 Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRDThis register holds the information related to the extended capture mode. register. When reading the ECRDThis register holds the information related to the extended capture mode. register, only the capture register register full flag pointed by the ECRDThis register holds the information related to the extended capture mode..VPTR is cleared #1 EME External Modulation Channel enable 27 1 read-write value1 External Modulation functionality doesn't affect any channel #00 value2 External Modulation only applied on channel 1 #01 value3 External Modulation only applied on channel 2 #10 value4 External Modulation applied on both channels #11 EMS External Modulation Synchronization 23 read-write value1 External Modulation functionality is not synchronized with the PWM signal #0 value2 External Modulation functionality is synchronized with the PWM signal #1 EMT External Modulation Type 24 read-write value1 External Modulation functionality is clearing the CC8ySTx bits. #0 value2 External Modulation functionality is gating the outputs. #1 ENDM Extended Stop Function Control 8 1 read-write value1 Clears the timer run bit only (default stop) #00 value2 Clears the timer only (flush) #01 value3 Clears the timer and run bit (flush/stop) #10 FPE Floating Prescaler enable 16 read-write value1 Floating prescaler mode is disabled #0 value2 Floating prescaler mode is enabled #1 MCME1 Multi Channel Mode Enable for Channel 1 25 read-write value1 Multi Channel Mode in Channel 1 is disabled #0 value2 Multi Channel Mode in Channel 1 is enabled #1 MCME2 Multi Channel Mode Enable for Channel 2 26 read-write value1 Multi Channel Mode in Channel 2 is disabled #0 value2 Multi Channel Mode in Channel 2 is enabled #1 SCE Equal Capture Event enable 11 read-write value1 Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #0 value2 Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. and CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #1 STOS Status bit output selector 29 1 read-write value1 CC8yST1 forward to CCU8x.STy #00 value2 CC8yST2 forward to CCU8x.STy #01 value3 CC8yST1 AND CC8yST2 forward to CCU8x.STy #10 STRM Extended Start Function Control 10 read-write value1 Sets run bit only (default start) #0 value2 Clears the timer and sets run bit, if not set (flush/start) #1 TCM Timer Counting Mode 0 read-write value1 Edge aligned mode #0 value2 Center aligned mode #1 TLS Timer Load selector 7 read-write value1 Timer is loaded with the value of CR1 #0 value2 Timer is loaded with the value of CR2 #1 TRAPE0 TRAP enable for CCU8x.OUTy0 17 read-write value1 TRAP functionality has no effect on the CCU8x.OUTy0 output #0 value2 TRAP functionality affects the CCU8x.OUTy0 output #1 TRAPE1 TRAP enable for CCU8x.OUTy1 18 read-write TRAPE2 TRAP enable for CCU8x.OUTy2 19 read-write TRAPE3 TRAP enable for CCU8x.OUTy3 20 read-write TRPSE TRAP Synchronization Enable 21 read-write value1 Exiting from TRAP state isn't synchronized with the PWM signal #0 value2 Exiting from TRAP state is synchronized with the PWM signal #1 TRPSW TRAP State Clear Control 22 read-write value1 The slice exits the TRAP state automatically when the TRAP condition is not present (Trap state cleared by HW and SW) #0 value2 The TRAP state can only be exited by a SW request. #1 TSSM Timer Single Shot Mode 1 read-write value1 Single shot mode is disabled #0 value2 Single shot mode is enabled #1 TCCLR Slice Timer Clear 0x10 32 read-write n 0x0 0x0 DITC Dither Counter Clear 2 write-only DTC1C Dead Time Counter 1 Clear 3 write-only DTC2C Dead Time Counter 2 Clear 4 write-only TCC Timer Clear 1 write-only TRBC Timer Run Bit Clear 0 write-only TCSET Slice Timer Run Set 0xC 32 read-write n 0x0 0x0 TRBS Timer Run Bit set 0 write-only TCST Slice Timer Status 0x8 32 read-write n 0x0 0x0 CDIR Timer Counting Direction 1 read-only value1 Timer is counting up #0 value2 Timer is counting down #1 DTR1 Dead Time Counter 1 Run bit 3 read-only value1 Dead Time counter is idle #0 value2 Dead Time counter is running #1 DTR2 Dead Time Counter 2 Run bit 4 read-only value1 Dead Time counter is idle #0 value2 Dead Time counter is running #1 TRB Timer Run Bit 0 read-only value1 Timer is stopped #0 value2 Timer is running #1 TIMER Timer Value 0x70 32 read-write n 0x0 0x0 TVAL Timer Value 0 15 read-write CCU80_CC81 Capture Compare Unit 8 - Unit 0 CCU8 0x0 0x0 0x100 registers n C0V Capture Register 0 0x74 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C1V Capture Register 1 0x78 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C2V Capture Register 2 0x7C 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C3V Capture Register 3 0x80 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only CHC Channel Control 0x48 32 read-write n 0x0 0x0 ASE Asymmetric PWM mode Enable 0 read-write value1 Asymmetric PWM is disabled #0 value2 Asymmetric PWM is enabled #1 OCS1 Output selector for CCU8x.OUTy0 1 read-write value1 CC8yST1 signal path is connected to the CCU8x.OUTy0 #0 value2 Inverted CC8yST1 signal path is connected to the CCU8x.OUTy0 #1 OCS2 Output selector for CCU8x.OUTy1 2 read-write value1 Inverted CC8yST1 signal path is connected to the CCU8x.OUTy1 #0 value2 CC8yST1 signal path is connected to the CCU8x.OUTy1 #1 OCS3 Output selector for CCU8x.OUTy2 3 read-write value1 CC8yST2 signal path is connected to the CCU8x.OUTy2 #0 value2 Inverted CCST2 signal path is connected to the CCU8x.OUTy2 #1 OCS4 Output selector for CCU8x.OUTy3 4 read-write value1 Inverted CC8yST2 signal path is connected to the CCU8x.OUTy3 #0 value2 CC8yST2 signal path is connected to the CCU8x.OUTy3 #1 CMC Connection Matrix Control 0x4 32 read-write n 0x0 0x0 CAP0S External Capture 0 Functionality Selector 4 1 read-write value1 External Capture 0 Function deactivated #00 value2 External Capture 0 Function triggered by Event 0 #01 value3 External Capture 0 Function triggered by Event 1 #10 value4 External Capture 0 Function triggered by Event 2 #11 CAP1S External Capture 1 Functionality Selector 6 1 read-write value1 External Capture 1 Function deactivated #00 value2 External Capture 1 Function triggered by Event 0 #01 value3 External Capture 1 Function triggered by Event 1 #10 value4 External Capture 1 Function triggered by Event 2 #11 CNTS External Count Selector 14 1 read-write value1 External Count Function deactivated #00 value2 External Count Function triggered by Event 0 #01 value3 External Count Function triggered by Event 1 #10 value4 External Count Function triggered by Event 2 #11 ENDS External Stop Functionality Selector 2 1 read-write value1 External Stop Function deactivated #00 value2 External Stop Function triggered by Event 0 #01 value3 External Stop Function triggered by Event 1 #10 value4 External Stop Function triggered by Event 2 #11 GATES External Gate Functionality Selector 8 1 read-write value1 External Gating Function deactivated #00 value2 External Gating Function triggered by Event 0 #01 value3 External Gating Function triggered by Event 1 #10 value4 External Gating Function triggered by Event 2 #11 LDS External Timer Load Functionality Selector 12 1 read-write MOS External Modulation Functionality Selector 18 1 read-write OFS Override Function Selector 16 read-write value1 Override functionality disabled #0 value2 Status bit trigger override connected to Event 1; Status bit value override connected to Event 2 #1 STRTS External Start Functionality Selector 0 1 read-write value1 External Start Function deactivated #00 value2 External Start Function triggered by Event 0 #01 value3 External Start Function triggered by Event 1 #10 value4 External Start Function triggered by Event 2 #11 TCE Timer Concatenation Enable 20 read-write value1 Timer concatenation is disabled #0 value2 Timer concatenation is enabled #1 TS Trap Function Selector 17 read-write value1 Trap function disabled #0 value2 TRAP function connected to Event 2 #1 UDS External Up/Down Functionality Selector 10 1 read-write value1 External Up/Down Function deactivated #00 value2 External Up/Down Function triggered by Event 0 #01 value3 External Up/Down Function triggered by Event 1 #10 value4 External Up/Down Function triggered by Event 2 #11 CR1 Channel 1 Compare Value 0x38 32 read-write n 0x0 0x0 CR1 Compare Register for Channel 1 0 15 read-only CR1S Channel 1 Compare Shadow Value 0x3C 32 read-write n 0x0 0x0 CR1S Shadow Compare Register for Channel 1 0 15 read-write CR2 Channel 2 Compare Value 0x40 32 read-write n 0x0 0x0 CR2 Compare Register for Channel 2 0 15 read-only CR2S Channel 2 Compare Shadow Value 0x44 32 read-write n 0x0 0x0 CR2S Shadow Compare Register for Channel 2 0 15 read-write DC1R Channel 1 Dead Time Values 0x50 32 read-write n 0x0 0x0 DT1F Fall Value for Dead Time of Channel 1 8 7 read-write DT1R Rise Value for Dead Time of Channel 1 0 7 read-write DC2R Channel 2 Dead Time Values 0x54 32 read-write n 0x0 0x0 DT2F Fall Value for Dead Time of Channel 2 8 7 read-write DT2R Rise Value for Dead Time of Channel 2 0 7 read-write DIT Dither Config 0x1C 32 read-write n 0x0 0x0 DCNT Dither counter actual value 8 3 read-only DCV Dither compare Value 0 3 read-only DITS Dither Shadow Register 0x20 32 read-write n 0x0 0x0 DCVS Dither Shadow Compare Value 0 3 read-write DTC Dead Time Control 0x4C 32 read-write n 0x0 0x0 DCEN1 Dead Time Enable for CC8yST1 2 read-write value1 Dead Time for CC8yST1 path is disabled #0 value2 Dead Time for CC8yST1 path is enabled #1 DCEN2 Dead Time Enable for inverted CC8yST1 3 read-write value1 Dead Time for inverted CC8yST1 path is disabled #0 value2 Dead Time for inverted CC8yST1 path is enabled #1 DCEN3 Dead Time Enable for CC8yST2 4 read-write value1 Dead Time for CC8yST2 path is disabled #0 value2 Dead Time for CC8yST2 path is enabled #1 DCEN4 Dead Time Enable for inverted CC8yST2 5 read-write value1 Dead Time for inverted CC8yST2 path is disabled #0 value2 Dead Time for inverted CC8yST2 path is enabled #1 DTCC Dead Time clock control 6 1 read-write value1 ftclk #00 value2 ftclk/2 #01 value3 ftclk/4 #10 value4 ftclk/8 #11 DTE1 Dead Time Enable for Channel 1 0 read-write value1 Dead Time for channel 1 is disabled #0 value2 Dead Time for channel 1 is enabled #1 DTE2 Dead Time Enable for Channel 2 1 read-write value1 Dead Time for channel 2 is disabled #0 value2 Dead Time for channel 2 is enabled #1 FPC Floating Prescaler Control 0x28 32 read-write n 0x0 0x0 PCMP Floating Prescaler Compare Value 0 3 read-only PVAL Actual Prescaler Value 8 3 read-write FPCS Floating Prescaler Shadow 0x2C 32 read-write n 0x0 0x0 PCMP Floating Prescaler Shadow Compare Value 0 3 read-write INS Input Selector Configuration 0x0 32 read-write n 0x0 0x0 EV0EM Event 0 Edge Selection 16 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV0IS Event 0 signal selection 0 3 read-write value1 CCU8x.INyA #0000 value2 CCU8x.INyB #0001 value3 CCU8x.INyC #0010 value4 CCU8x.INyD #0011 value5 CCU8x.INyE #0100 value6 CCU8x.INyF #0101 value7 CCU8x.INyG #0110 value8 CCU8x.INyH #0111 value9 CCU8x.INyI #1000 value10 CCU8x.INyJ #1001 value11 CCU8x.INyK #1010 value12 CCU8x.INyL #1011 value13 CCU8x.INyM #1100 value14 CCU8x.INyN #1101 value15 CCU8x.INyO #1110 value16 CCU8x.INyP #1111 EV0LM Event 0 Level Selection 22 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV1EM Event 1 Edge Selection 18 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV1IS Event 1 signal selection 4 3 read-write value1 CCU8x.INyA #0000 value2 CCU8x.INyB #0001 value3 CCU8x.INyC #0010 value4 CCU8x.INyD #0011 value5 CCU8x.INyE #0100 value6 CCU8x.INyF #0101 value7 CCU8x.INyG #0110 value8 CCU8x.INyH #0111 value9 CCU8x.INyI #1000 value10 CCU8x.INyJ #1001 value11 CCU8x.INyK #1010 value12 CCU8x.INyL #1011 value13 CCU8x.INyM #1100 value14 CCU8x.INyN #1101 value15 CCU8x.INyO #1110 value16 CCU8x.INyP #1111 EV1LM Event 1 Level Selection 23 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV2EM Event 2 Edge Selection 20 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV2IS Event 2 signal selection 8 3 read-write value1 CCU8x.INyA #0000 value2 CCU8x.INyB #0001 value3 CCU8x.INyC #0010 value4 CCU8x.INyD #0011 value5 CCU8x.INyE #0100 value6 CCU8x.INyF #0101 value7 CCU8x.INyG #0110 value8 CCU8x.INyH #0111 value9 CCU8x.INyI #1000 value10 CCU8x.INyJ #1001 value11 CCU8x.INyK #1010 value12 CCU8x.INyL #1011 value13 CCU8x.INyM #1100 value14 CCU8x.INyN #1101 value15 CCU8x.INyO #1110 value16 CCU8x.INyP #1111 EV2LM Event 2 Level Selection 24 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 LPF0M Event 0 Low Pass Filter Configuration 25 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU8 #01 value3 5 clock cycles of fCCU8 #10 value4 7 clock cycles of fCCU8 #11 LPF1M Event 1 Low Pass Filter Configuration 27 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU8 #01 value3 5 clock cycles of fCCU8 #10 value4 7 clock cycles of fCCU8 #11 LPF2M Event 2 Low Pass Filter Configuration 29 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU8 #01 value3 5 clock cycles of fCCU8 #10 value4 7 clock cycles of fCCU8 #11 INTE Interrupt Enable Control 0xA4 32 read-write n 0x0 0x0 CMD1E Channel 1 Compare match while counting down enable 3 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMD2E Channel 2 Compare match while counting down enable 5 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMU1E Channel 1 Compare match while counting up enable 2 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 CMU2E Channel 2 Compare match while counting up enable 4 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 E0AE Event 0 interrupt enable 8 read-write value1 Event 0 detection interrupt is disabled #0 value2 Event 0 detection interrupt is enabled #1 E1AE Event 1 interrupt enable 9 read-write value1 Event 1 detection interrupt is disabled #0 value2 Event 1 detection interrupt is enabled #1 E2AE Event 2 interrupt enable 10 read-write value1 Event 2 detection interrupt is disabled #0 value2 Event 2 detection interrupt is enabled #1 OME One match while counting down enable 1 read-write value1 One Match interrupt is disabled #0 value2 One Match interrupt is enabled #1 PME Period match while counting up enable 0 read-write value1 Period Match interrupt is disabled #0 value2 Period Match interrupt is enabled #1 INTS Interrupt Status 0xA0 32 read-write n 0x0 0x0 CMD1S Channel 1 Compare Match while Counting Down 3 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMD2S Channel 2 Compare Match while Counting Down 5 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMU1S Channel 1 Compare Match while Counting Up 2 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 CMU2S Channel 2 Compare Match while Counting Up 4 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 E0AS Event 0 Detection Status 8 read-only value1 Event 0 not detected #0 value2 Event 0 detected #1 E1AS Event 1 Detection Status 9 read-only value1 Event 1 not detected #0 value2 Event 1 detected #1 E2AS Event 2 Detection Status 10 read-only value1 Event 2 not detected #0 value2 Event 2 detected #1 OMDS One Match while Counting Down 1 read-only value1 One match while counting down not detected #0 value2 One match while counting down detected #1 PMUS Period Match while Counting Up 0 read-only value1 Period match while counting up not detected #0 value2 Period match while counting up detected #1 TRPF Trap Flag Status 11 read-only PR Timer Period Value 0x30 32 read-write n 0x0 0x0 PR Period Register 0 15 read-only PRS Timer Shadow Period Value 0x34 32 read-write n 0x0 0x0 PRS Period Register 0 15 read-write PSC Prescaler Control 0x24 32 read-write n 0x0 0x0 PSIV Prescaler Initial Value 0 3 read-write PSL Passive Level Config 0x18 32 read-write n 0x0 0x0 PSL11 Output Passive Level for CCU8x.OUTy0 0 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 PSL12 Output Passive Level for CCU8x.OUTy1 1 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 PSL21 Output Passive Level for CCU8x.OUTy2 2 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 PSL22 Output Passive Level for CCU8x.OUTy3 3 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 SRS Service Request Selector 0xA8 32 read-write n 0x0 0x0 CM1SR Channel 1 Compare match Service request selector 2 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 CM2SR Channel 2 Compare match Service request selector 4 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 E0SR Event 0 Service request selector 8 1 read-write value1 Forward to CCvySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 E1SR Event 1 Service request selector 10 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 E2SR Event 2 Service request selector 12 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CCvySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 POSR Period/One match Service request selector 0 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 STC Shadow transfer control 0xB4 32 read-write n 0x0 0x0 CSE Cascaded shadow transfer enable 0 read-write value1 Cascaded shadow transfer disabled #0 value2 Cascaded shadow transfer enabled #1 STM Shadow transfer mode 1 1 read-write value1 Shadow transfer is done in Period Match and One match. #00 value2 Shadow transfer is done only in Period Match. #01 value3 Shadow transfer is done only in One Match. #10 SWR Interrupt Status Clear 0xB0 32 read-write n 0x0 0x0 RCM1D Channel 1 Compare match while counting down clear 3 write-only RCM1U Channel 1 Compare match while counting up clear 2 write-only RCM2D Channel 2 Compare match while counting down clear 5 write-only RCM2U Channel 2 Compare match while counting up clear 4 write-only RE0A Event 0 detection clear 8 write-only RE1A Event 1 detection clear 9 write-only RE2A Event 2 detection clear 10 write-only ROM One match while counting down clear 1 write-only RPM Period match while counting up clear 0 write-only RTRPF Trap Flag status clear 11 write-only SWS Interrupt Status Set 0xAC 32 read-write n 0x0 0x0 SCM1D Channel 1 Compare match while counting down set 3 write-only SCM1U Channel 1 Compare match while counting up set 2 write-only SCM2D Compare match while counting down set 5 write-only SCM2U Compare match while counting up set 4 write-only SE0A Event 0 detection set 8 write-only SE1A Event 1 detection set 9 write-only SE2A Event 2 detection set 10 write-only SOM One match while counting down set 1 write-only SPM Period match while counting up set 0 write-only STRPF Trap Flag status set 11 write-only TC Slice Timer Control 0x14 32 read-write n 0x0 0x0 CAPC Clear on Capture Control 5 1 read-write value1 Timer is never cleared on a capture event #00 value2 Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event) #01 value3 Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event) #10 value4 Timer is always cleared in a capture event. #11 CCS Continuous Capture Enable 12 read-write value1 The capture into a specific capture register is done with the rules linked with the full flags, described at . #0 value2 The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back). #1 CLST Shadow Transfer on Clear 2 read-write CMOD Capture Compare Mode 3 read-only value1 Compare Mode #0 value2 Capture Mode #1 DIM Dither input selector 15 read-write value1 Slice is using it own dither unit #0 value2 Slice is connected to the dither unit of slice 0. #1 DITHE Dither Enable 13 1 read-write value1 Dither is disabled #00 value2 Dither is applied to the Period #01 value3 Dither is applied to the Compare #10 value4 Dither is applied to the Period and Compare #11 ECM Extended Capture Mode 4 read-write value1 Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only. #0 value2 Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRDThis register holds the information related to the extended capture mode. register. When reading the ECRDThis register holds the information related to the extended capture mode. register, only the capture register register full flag pointed by the ECRDThis register holds the information related to the extended capture mode..VPTR is cleared #1 EME External Modulation Channel enable 27 1 read-write value1 External Modulation functionality doesn't affect any channel #00 value2 External Modulation only applied on channel 1 #01 value3 External Modulation only applied on channel 2 #10 value4 External Modulation applied on both channels #11 EMS External Modulation Synchronization 23 read-write value1 External Modulation functionality is not synchronized with the PWM signal #0 value2 External Modulation functionality is synchronized with the PWM signal #1 EMT External Modulation Type 24 read-write value1 External Modulation functionality is clearing the CC8ySTx bits. #0 value2 External Modulation functionality is gating the outputs. #1 ENDM Extended Stop Function Control 8 1 read-write value1 Clears the timer run bit only (default stop) #00 value2 Clears the timer only (flush) #01 value3 Clears the timer and run bit (flush/stop) #10 FPE Floating Prescaler enable 16 read-write value1 Floating prescaler mode is disabled #0 value2 Floating prescaler mode is enabled #1 MCME1 Multi Channel Mode Enable for Channel 1 25 read-write value1 Multi Channel Mode in Channel 1 is disabled #0 value2 Multi Channel Mode in Channel 1 is enabled #1 MCME2 Multi Channel Mode Enable for Channel 2 26 read-write value1 Multi Channel Mode in Channel 2 is disabled #0 value2 Multi Channel Mode in Channel 2 is enabled #1 SCE Equal Capture Event enable 11 read-write value1 Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #0 value2 Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. and CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #1 STOS Status bit output selector 29 1 read-write value1 CC8yST1 forward to CCU8x.STy #00 value2 CC8yST2 forward to CCU8x.STy #01 value3 CC8yST1 AND CC8yST2 forward to CCU8x.STy #10 STRM Extended Start Function Control 10 read-write value1 Sets run bit only (default start) #0 value2 Clears the timer and sets run bit, if not set (flush/start) #1 TCM Timer Counting Mode 0 read-write value1 Edge aligned mode #0 value2 Center aligned mode #1 TLS Timer Load selector 7 read-write value1 Timer is loaded with the value of CR1 #0 value2 Timer is loaded with the value of CR2 #1 TRAPE0 TRAP enable for CCU8x.OUTy0 17 read-write value1 TRAP functionality has no effect on the CCU8x.OUTy0 output #0 value2 TRAP functionality affects the CCU8x.OUTy0 output #1 TRAPE1 TRAP enable for CCU8x.OUTy1 18 read-write TRAPE2 TRAP enable for CCU8x.OUTy2 19 read-write TRAPE3 TRAP enable for CCU8x.OUTy3 20 read-write TRPSE TRAP Synchronization Enable 21 read-write value1 Exiting from TRAP state isn't synchronized with the PWM signal #0 value2 Exiting from TRAP state is synchronized with the PWM signal #1 TRPSW TRAP State Clear Control 22 read-write value1 The slice exits the TRAP state automatically when the TRAP condition is not present (Trap state cleared by HW and SW) #0 value2 The TRAP state can only be exited by a SW request. #1 TSSM Timer Single Shot Mode 1 read-write value1 Single shot mode is disabled #0 value2 Single shot mode is enabled #1 TCCLR Slice Timer Clear 0x10 32 read-write n 0x0 0x0 DITC Dither Counter Clear 2 write-only DTC1C Dead Time Counter 1 Clear 3 write-only DTC2C Dead Time Counter 2 Clear 4 write-only TCC Timer Clear 1 write-only TRBC Timer Run Bit Clear 0 write-only TCSET Slice Timer Run Set 0xC 32 read-write n 0x0 0x0 TRBS Timer Run Bit set 0 write-only TCST Slice Timer Status 0x8 32 read-write n 0x0 0x0 CDIR Timer Counting Direction 1 read-only value1 Timer is counting up #0 value2 Timer is counting down #1 DTR1 Dead Time Counter 1 Run bit 3 read-only value1 Dead Time counter is idle #0 value2 Dead Time counter is running #1 DTR2 Dead Time Counter 2 Run bit 4 read-only value1 Dead Time counter is idle #0 value2 Dead Time counter is running #1 TRB Timer Run Bit 0 read-only value1 Timer is stopped #0 value2 Timer is running #1 TIMER Timer Value 0x70 32 read-write n 0x0 0x0 TVAL Timer Value 0 15 read-write CCU80_CC82 Capture Compare Unit 8 - Unit 0 CCU8 0x0 0x0 0x100 registers n C0V Capture Register 0 0x74 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C1V Capture Register 1 0x78 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C2V Capture Register 2 0x7C 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C3V Capture Register 3 0x80 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only CHC Channel Control 0x48 32 read-write n 0x0 0x0 ASE Asymmetric PWM mode Enable 0 read-write value1 Asymmetric PWM is disabled #0 value2 Asymmetric PWM is enabled #1 OCS1 Output selector for CCU8x.OUTy0 1 read-write value1 CC8yST1 signal path is connected to the CCU8x.OUTy0 #0 value2 Inverted CC8yST1 signal path is connected to the CCU8x.OUTy0 #1 OCS2 Output selector for CCU8x.OUTy1 2 read-write value1 Inverted CC8yST1 signal path is connected to the CCU8x.OUTy1 #0 value2 CC8yST1 signal path is connected to the CCU8x.OUTy1 #1 OCS3 Output selector for CCU8x.OUTy2 3 read-write value1 CC8yST2 signal path is connected to the CCU8x.OUTy2 #0 value2 Inverted CCST2 signal path is connected to the CCU8x.OUTy2 #1 OCS4 Output selector for CCU8x.OUTy3 4 read-write value1 Inverted CC8yST2 signal path is connected to the CCU8x.OUTy3 #0 value2 CC8yST2 signal path is connected to the CCU8x.OUTy3 #1 CMC Connection Matrix Control 0x4 32 read-write n 0x0 0x0 CAP0S External Capture 0 Functionality Selector 4 1 read-write value1 External Capture 0 Function deactivated #00 value2 External Capture 0 Function triggered by Event 0 #01 value3 External Capture 0 Function triggered by Event 1 #10 value4 External Capture 0 Function triggered by Event 2 #11 CAP1S External Capture 1 Functionality Selector 6 1 read-write value1 External Capture 1 Function deactivated #00 value2 External Capture 1 Function triggered by Event 0 #01 value3 External Capture 1 Function triggered by Event 1 #10 value4 External Capture 1 Function triggered by Event 2 #11 CNTS External Count Selector 14 1 read-write value1 External Count Function deactivated #00 value2 External Count Function triggered by Event 0 #01 value3 External Count Function triggered by Event 1 #10 value4 External Count Function triggered by Event 2 #11 ENDS External Stop Functionality Selector 2 1 read-write value1 External Stop Function deactivated #00 value2 External Stop Function triggered by Event 0 #01 value3 External Stop Function triggered by Event 1 #10 value4 External Stop Function triggered by Event 2 #11 GATES External Gate Functionality Selector 8 1 read-write value1 External Gating Function deactivated #00 value2 External Gating Function triggered by Event 0 #01 value3 External Gating Function triggered by Event 1 #10 value4 External Gating Function triggered by Event 2 #11 LDS External Timer Load Functionality Selector 12 1 read-write MOS External Modulation Functionality Selector 18 1 read-write OFS Override Function Selector 16 read-write value1 Override functionality disabled #0 value2 Status bit trigger override connected to Event 1; Status bit value override connected to Event 2 #1 STRTS External Start Functionality Selector 0 1 read-write value1 External Start Function deactivated #00 value2 External Start Function triggered by Event 0 #01 value3 External Start Function triggered by Event 1 #10 value4 External Start Function triggered by Event 2 #11 TCE Timer Concatenation Enable 20 read-write value1 Timer concatenation is disabled #0 value2 Timer concatenation is enabled #1 TS Trap Function Selector 17 read-write value1 Trap function disabled #0 value2 TRAP function connected to Event 2 #1 UDS External Up/Down Functionality Selector 10 1 read-write value1 External Up/Down Function deactivated #00 value2 External Up/Down Function triggered by Event 0 #01 value3 External Up/Down Function triggered by Event 1 #10 value4 External Up/Down Function triggered by Event 2 #11 CR1 Channel 1 Compare Value 0x38 32 read-write n 0x0 0x0 CR1 Compare Register for Channel 1 0 15 read-only CR1S Channel 1 Compare Shadow Value 0x3C 32 read-write n 0x0 0x0 CR1S Shadow Compare Register for Channel 1 0 15 read-write CR2 Channel 2 Compare Value 0x40 32 read-write n 0x0 0x0 CR2 Compare Register for Channel 2 0 15 read-only CR2S Channel 2 Compare Shadow Value 0x44 32 read-write n 0x0 0x0 CR2S Shadow Compare Register for Channel 2 0 15 read-write DC1R Channel 1 Dead Time Values 0x50 32 read-write n 0x0 0x0 DT1F Fall Value for Dead Time of Channel 1 8 7 read-write DT1R Rise Value for Dead Time of Channel 1 0 7 read-write DC2R Channel 2 Dead Time Values 0x54 32 read-write n 0x0 0x0 DT2F Fall Value for Dead Time of Channel 2 8 7 read-write DT2R Rise Value for Dead Time of Channel 2 0 7 read-write DIT Dither Config 0x1C 32 read-write n 0x0 0x0 DCNT Dither counter actual value 8 3 read-only DCV Dither compare Value 0 3 read-only DITS Dither Shadow Register 0x20 32 read-write n 0x0 0x0 DCVS Dither Shadow Compare Value 0 3 read-write DTC Dead Time Control 0x4C 32 read-write n 0x0 0x0 DCEN1 Dead Time Enable for CC8yST1 2 read-write value1 Dead Time for CC8yST1 path is disabled #0 value2 Dead Time for CC8yST1 path is enabled #1 DCEN2 Dead Time Enable for inverted CC8yST1 3 read-write value1 Dead Time for inverted CC8yST1 path is disabled #0 value2 Dead Time for inverted CC8yST1 path is enabled #1 DCEN3 Dead Time Enable for CC8yST2 4 read-write value1 Dead Time for CC8yST2 path is disabled #0 value2 Dead Time for CC8yST2 path is enabled #1 DCEN4 Dead Time Enable for inverted CC8yST2 5 read-write value1 Dead Time for inverted CC8yST2 path is disabled #0 value2 Dead Time for inverted CC8yST2 path is enabled #1 DTCC Dead Time clock control 6 1 read-write value1 ftclk #00 value2 ftclk/2 #01 value3 ftclk/4 #10 value4 ftclk/8 #11 DTE1 Dead Time Enable for Channel 1 0 read-write value1 Dead Time for channel 1 is disabled #0 value2 Dead Time for channel 1 is enabled #1 DTE2 Dead Time Enable for Channel 2 1 read-write value1 Dead Time for channel 2 is disabled #0 value2 Dead Time for channel 2 is enabled #1 FPC Floating Prescaler Control 0x28 32 read-write n 0x0 0x0 PCMP Floating Prescaler Compare Value 0 3 read-only PVAL Actual Prescaler Value 8 3 read-write FPCS Floating Prescaler Shadow 0x2C 32 read-write n 0x0 0x0 PCMP Floating Prescaler Shadow Compare Value 0 3 read-write INS Input Selector Configuration 0x0 32 read-write n 0x0 0x0 EV0EM Event 0 Edge Selection 16 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV0IS Event 0 signal selection 0 3 read-write value1 CCU8x.INyA #0000 value2 CCU8x.INyB #0001 value3 CCU8x.INyC #0010 value4 CCU8x.INyD #0011 value5 CCU8x.INyE #0100 value6 CCU8x.INyF #0101 value7 CCU8x.INyG #0110 value8 CCU8x.INyH #0111 value9 CCU8x.INyI #1000 value10 CCU8x.INyJ #1001 value11 CCU8x.INyK #1010 value12 CCU8x.INyL #1011 value13 CCU8x.INyM #1100 value14 CCU8x.INyN #1101 value15 CCU8x.INyO #1110 value16 CCU8x.INyP #1111 EV0LM Event 0 Level Selection 22 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV1EM Event 1 Edge Selection 18 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV1IS Event 1 signal selection 4 3 read-write value1 CCU8x.INyA #0000 value2 CCU8x.INyB #0001 value3 CCU8x.INyC #0010 value4 CCU8x.INyD #0011 value5 CCU8x.INyE #0100 value6 CCU8x.INyF #0101 value7 CCU8x.INyG #0110 value8 CCU8x.INyH #0111 value9 CCU8x.INyI #1000 value10 CCU8x.INyJ #1001 value11 CCU8x.INyK #1010 value12 CCU8x.INyL #1011 value13 CCU8x.INyM #1100 value14 CCU8x.INyN #1101 value15 CCU8x.INyO #1110 value16 CCU8x.INyP #1111 EV1LM Event 1 Level Selection 23 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV2EM Event 2 Edge Selection 20 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV2IS Event 2 signal selection 8 3 read-write value1 CCU8x.INyA #0000 value2 CCU8x.INyB #0001 value3 CCU8x.INyC #0010 value4 CCU8x.INyD #0011 value5 CCU8x.INyE #0100 value6 CCU8x.INyF #0101 value7 CCU8x.INyG #0110 value8 CCU8x.INyH #0111 value9 CCU8x.INyI #1000 value10 CCU8x.INyJ #1001 value11 CCU8x.INyK #1010 value12 CCU8x.INyL #1011 value13 CCU8x.INyM #1100 value14 CCU8x.INyN #1101 value15 CCU8x.INyO #1110 value16 CCU8x.INyP #1111 EV2LM Event 2 Level Selection 24 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 LPF0M Event 0 Low Pass Filter Configuration 25 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU8 #01 value3 5 clock cycles of fCCU8 #10 value4 7 clock cycles of fCCU8 #11 LPF1M Event 1 Low Pass Filter Configuration 27 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU8 #01 value3 5 clock cycles of fCCU8 #10 value4 7 clock cycles of fCCU8 #11 LPF2M Event 2 Low Pass Filter Configuration 29 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU8 #01 value3 5 clock cycles of fCCU8 #10 value4 7 clock cycles of fCCU8 #11 INTE Interrupt Enable Control 0xA4 32 read-write n 0x0 0x0 CMD1E Channel 1 Compare match while counting down enable 3 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMD2E Channel 2 Compare match while counting down enable 5 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMU1E Channel 1 Compare match while counting up enable 2 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 CMU2E Channel 2 Compare match while counting up enable 4 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 E0AE Event 0 interrupt enable 8 read-write value1 Event 0 detection interrupt is disabled #0 value2 Event 0 detection interrupt is enabled #1 E1AE Event 1 interrupt enable 9 read-write value1 Event 1 detection interrupt is disabled #0 value2 Event 1 detection interrupt is enabled #1 E2AE Event 2 interrupt enable 10 read-write value1 Event 2 detection interrupt is disabled #0 value2 Event 2 detection interrupt is enabled #1 OME One match while counting down enable 1 read-write value1 One Match interrupt is disabled #0 value2 One Match interrupt is enabled #1 PME Period match while counting up enable 0 read-write value1 Period Match interrupt is disabled #0 value2 Period Match interrupt is enabled #1 INTS Interrupt Status 0xA0 32 read-write n 0x0 0x0 CMD1S Channel 1 Compare Match while Counting Down 3 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMD2S Channel 2 Compare Match while Counting Down 5 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMU1S Channel 1 Compare Match while Counting Up 2 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 CMU2S Channel 2 Compare Match while Counting Up 4 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 E0AS Event 0 Detection Status 8 read-only value1 Event 0 not detected #0 value2 Event 0 detected #1 E1AS Event 1 Detection Status 9 read-only value1 Event 1 not detected #0 value2 Event 1 detected #1 E2AS Event 2 Detection Status 10 read-only value1 Event 2 not detected #0 value2 Event 2 detected #1 OMDS One Match while Counting Down 1 read-only value1 One match while counting down not detected #0 value2 One match while counting down detected #1 PMUS Period Match while Counting Up 0 read-only value1 Period match while counting up not detected #0 value2 Period match while counting up detected #1 TRPF Trap Flag Status 11 read-only PR Timer Period Value 0x30 32 read-write n 0x0 0x0 PR Period Register 0 15 read-only PRS Timer Shadow Period Value 0x34 32 read-write n 0x0 0x0 PRS Period Register 0 15 read-write PSC Prescaler Control 0x24 32 read-write n 0x0 0x0 PSIV Prescaler Initial Value 0 3 read-write PSL Passive Level Config 0x18 32 read-write n 0x0 0x0 PSL11 Output Passive Level for CCU8x.OUTy0 0 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 PSL12 Output Passive Level for CCU8x.OUTy1 1 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 PSL21 Output Passive Level for CCU8x.OUTy2 2 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 PSL22 Output Passive Level for CCU8x.OUTy3 3 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 SRS Service Request Selector 0xA8 32 read-write n 0x0 0x0 CM1SR Channel 1 Compare match Service request selector 2 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 CM2SR Channel 2 Compare match Service request selector 4 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 E0SR Event 0 Service request selector 8 1 read-write value1 Forward to CCvySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 E1SR Event 1 Service request selector 10 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 E2SR Event 2 Service request selector 12 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CCvySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 POSR Period/One match Service request selector 0 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 STC Shadow transfer control 0xB4 32 read-write n 0x0 0x0 CSE Cascaded shadow transfer enable 0 read-write value1 Cascaded shadow transfer disabled #0 value2 Cascaded shadow transfer enabled #1 STM Shadow transfer mode 1 1 read-write value1 Shadow transfer is done in Period Match and One match. #00 value2 Shadow transfer is done only in Period Match. #01 value3 Shadow transfer is done only in One Match. #10 SWR Interrupt Status Clear 0xB0 32 read-write n 0x0 0x0 RCM1D Channel 1 Compare match while counting down clear 3 write-only RCM1U Channel 1 Compare match while counting up clear 2 write-only RCM2D Channel 2 Compare match while counting down clear 5 write-only RCM2U Channel 2 Compare match while counting up clear 4 write-only RE0A Event 0 detection clear 8 write-only RE1A Event 1 detection clear 9 write-only RE2A Event 2 detection clear 10 write-only ROM One match while counting down clear 1 write-only RPM Period match while counting up clear 0 write-only RTRPF Trap Flag status clear 11 write-only SWS Interrupt Status Set 0xAC 32 read-write n 0x0 0x0 SCM1D Channel 1 Compare match while counting down set 3 write-only SCM1U Channel 1 Compare match while counting up set 2 write-only SCM2D Compare match while counting down set 5 write-only SCM2U Compare match while counting up set 4 write-only SE0A Event 0 detection set 8 write-only SE1A Event 1 detection set 9 write-only SE2A Event 2 detection set 10 write-only SOM One match while counting down set 1 write-only SPM Period match while counting up set 0 write-only STRPF Trap Flag status set 11 write-only TC Slice Timer Control 0x14 32 read-write n 0x0 0x0 CAPC Clear on Capture Control 5 1 read-write value1 Timer is never cleared on a capture event #00 value2 Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event) #01 value3 Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event) #10 value4 Timer is always cleared in a capture event. #11 CCS Continuous Capture Enable 12 read-write value1 The capture into a specific capture register is done with the rules linked with the full flags, described at . #0 value2 The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back). #1 CLST Shadow Transfer on Clear 2 read-write CMOD Capture Compare Mode 3 read-only value1 Compare Mode #0 value2 Capture Mode #1 DIM Dither input selector 15 read-write value1 Slice is using it own dither unit #0 value2 Slice is connected to the dither unit of slice 0. #1 DITHE Dither Enable 13 1 read-write value1 Dither is disabled #00 value2 Dither is applied to the Period #01 value3 Dither is applied to the Compare #10 value4 Dither is applied to the Period and Compare #11 ECM Extended Capture Mode 4 read-write value1 Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only. #0 value2 Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRDThis register holds the information related to the extended capture mode. register. When reading the ECRDThis register holds the information related to the extended capture mode. register, only the capture register register full flag pointed by the ECRDThis register holds the information related to the extended capture mode..VPTR is cleared #1 EME External Modulation Channel enable 27 1 read-write value1 External Modulation functionality doesn't affect any channel #00 value2 External Modulation only applied on channel 1 #01 value3 External Modulation only applied on channel 2 #10 value4 External Modulation applied on both channels #11 EMS External Modulation Synchronization 23 read-write value1 External Modulation functionality is not synchronized with the PWM signal #0 value2 External Modulation functionality is synchronized with the PWM signal #1 EMT External Modulation Type 24 read-write value1 External Modulation functionality is clearing the CC8ySTx bits. #0 value2 External Modulation functionality is gating the outputs. #1 ENDM Extended Stop Function Control 8 1 read-write value1 Clears the timer run bit only (default stop) #00 value2 Clears the timer only (flush) #01 value3 Clears the timer and run bit (flush/stop) #10 FPE Floating Prescaler enable 16 read-write value1 Floating prescaler mode is disabled #0 value2 Floating prescaler mode is enabled #1 MCME1 Multi Channel Mode Enable for Channel 1 25 read-write value1 Multi Channel Mode in Channel 1 is disabled #0 value2 Multi Channel Mode in Channel 1 is enabled #1 MCME2 Multi Channel Mode Enable for Channel 2 26 read-write value1 Multi Channel Mode in Channel 2 is disabled #0 value2 Multi Channel Mode in Channel 2 is enabled #1 SCE Equal Capture Event enable 11 read-write value1 Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #0 value2 Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. and CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #1 STOS Status bit output selector 29 1 read-write value1 CC8yST1 forward to CCU8x.STy #00 value2 CC8yST2 forward to CCU8x.STy #01 value3 CC8yST1 AND CC8yST2 forward to CCU8x.STy #10 STRM Extended Start Function Control 10 read-write value1 Sets run bit only (default start) #0 value2 Clears the timer and sets run bit, if not set (flush/start) #1 TCM Timer Counting Mode 0 read-write value1 Edge aligned mode #0 value2 Center aligned mode #1 TLS Timer Load selector 7 read-write value1 Timer is loaded with the value of CR1 #0 value2 Timer is loaded with the value of CR2 #1 TRAPE0 TRAP enable for CCU8x.OUTy0 17 read-write value1 TRAP functionality has no effect on the CCU8x.OUTy0 output #0 value2 TRAP functionality affects the CCU8x.OUTy0 output #1 TRAPE1 TRAP enable for CCU8x.OUTy1 18 read-write TRAPE2 TRAP enable for CCU8x.OUTy2 19 read-write TRAPE3 TRAP enable for CCU8x.OUTy3 20 read-write TRPSE TRAP Synchronization Enable 21 read-write value1 Exiting from TRAP state isn't synchronized with the PWM signal #0 value2 Exiting from TRAP state is synchronized with the PWM signal #1 TRPSW TRAP State Clear Control 22 read-write value1 The slice exits the TRAP state automatically when the TRAP condition is not present (Trap state cleared by HW and SW) #0 value2 The TRAP state can only be exited by a SW request. #1 TSSM Timer Single Shot Mode 1 read-write value1 Single shot mode is disabled #0 value2 Single shot mode is enabled #1 TCCLR Slice Timer Clear 0x10 32 read-write n 0x0 0x0 DITC Dither Counter Clear 2 write-only DTC1C Dead Time Counter 1 Clear 3 write-only DTC2C Dead Time Counter 2 Clear 4 write-only TCC Timer Clear 1 write-only TRBC Timer Run Bit Clear 0 write-only TCSET Slice Timer Run Set 0xC 32 read-write n 0x0 0x0 TRBS Timer Run Bit set 0 write-only TCST Slice Timer Status 0x8 32 read-write n 0x0 0x0 CDIR Timer Counting Direction 1 read-only value1 Timer is counting up #0 value2 Timer is counting down #1 DTR1 Dead Time Counter 1 Run bit 3 read-only value1 Dead Time counter is idle #0 value2 Dead Time counter is running #1 DTR2 Dead Time Counter 2 Run bit 4 read-only value1 Dead Time counter is idle #0 value2 Dead Time counter is running #1 TRB Timer Run Bit 0 read-only value1 Timer is stopped #0 value2 Timer is running #1 TIMER Timer Value 0x70 32 read-write n 0x0 0x0 TVAL Timer Value 0 15 read-write CCU80_CC83 Capture Compare Unit 8 - Unit 0 CCU8 0x0 0x0 0x100 registers n C0V Capture Register 0 0x74 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C1V Capture Register 1 0x78 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C2V Capture Register 2 0x7C 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only C3V Capture Register 3 0x80 32 read-write n 0x0 0x0 modifyExternal CAPTV Capture Value 0 15 read-only FFL Full Flag 20 read-only value1 No new value was captured into the specific capture register #0 value2 A new value was captured into the specific register #1 FPCV Prescaler Value 16 3 read-only CHC Channel Control 0x48 32 read-write n 0x0 0x0 ASE Asymmetric PWM mode Enable 0 read-write value1 Asymmetric PWM is disabled #0 value2 Asymmetric PWM is enabled #1 OCS1 Output selector for CCU8x.OUTy0 1 read-write value1 CC8yST1 signal path is connected to the CCU8x.OUTy0 #0 value2 Inverted CC8yST1 signal path is connected to the CCU8x.OUTy0 #1 OCS2 Output selector for CCU8x.OUTy1 2 read-write value1 Inverted CC8yST1 signal path is connected to the CCU8x.OUTy1 #0 value2 CC8yST1 signal path is connected to the CCU8x.OUTy1 #1 OCS3 Output selector for CCU8x.OUTy2 3 read-write value1 CC8yST2 signal path is connected to the CCU8x.OUTy2 #0 value2 Inverted CCST2 signal path is connected to the CCU8x.OUTy2 #1 OCS4 Output selector for CCU8x.OUTy3 4 read-write value1 Inverted CC8yST2 signal path is connected to the CCU8x.OUTy3 #0 value2 CC8yST2 signal path is connected to the CCU8x.OUTy3 #1 CMC Connection Matrix Control 0x4 32 read-write n 0x0 0x0 CAP0S External Capture 0 Functionality Selector 4 1 read-write value1 External Capture 0 Function deactivated #00 value2 External Capture 0 Function triggered by Event 0 #01 value3 External Capture 0 Function triggered by Event 1 #10 value4 External Capture 0 Function triggered by Event 2 #11 CAP1S External Capture 1 Functionality Selector 6 1 read-write value1 External Capture 1 Function deactivated #00 value2 External Capture 1 Function triggered by Event 0 #01 value3 External Capture 1 Function triggered by Event 1 #10 value4 External Capture 1 Function triggered by Event 2 #11 CNTS External Count Selector 14 1 read-write value1 External Count Function deactivated #00 value2 External Count Function triggered by Event 0 #01 value3 External Count Function triggered by Event 1 #10 value4 External Count Function triggered by Event 2 #11 ENDS External Stop Functionality Selector 2 1 read-write value1 External Stop Function deactivated #00 value2 External Stop Function triggered by Event 0 #01 value3 External Stop Function triggered by Event 1 #10 value4 External Stop Function triggered by Event 2 #11 GATES External Gate Functionality Selector 8 1 read-write value1 External Gating Function deactivated #00 value2 External Gating Function triggered by Event 0 #01 value3 External Gating Function triggered by Event 1 #10 value4 External Gating Function triggered by Event 2 #11 LDS External Timer Load Functionality Selector 12 1 read-write MOS External Modulation Functionality Selector 18 1 read-write OFS Override Function Selector 16 read-write value1 Override functionality disabled #0 value2 Status bit trigger override connected to Event 1; Status bit value override connected to Event 2 #1 STRTS External Start Functionality Selector 0 1 read-write value1 External Start Function deactivated #00 value2 External Start Function triggered by Event 0 #01 value3 External Start Function triggered by Event 1 #10 value4 External Start Function triggered by Event 2 #11 TCE Timer Concatenation Enable 20 read-write value1 Timer concatenation is disabled #0 value2 Timer concatenation is enabled #1 TS Trap Function Selector 17 read-write value1 Trap function disabled #0 value2 TRAP function connected to Event 2 #1 UDS External Up/Down Functionality Selector 10 1 read-write value1 External Up/Down Function deactivated #00 value2 External Up/Down Function triggered by Event 0 #01 value3 External Up/Down Function triggered by Event 1 #10 value4 External Up/Down Function triggered by Event 2 #11 CR1 Channel 1 Compare Value 0x38 32 read-write n 0x0 0x0 CR1 Compare Register for Channel 1 0 15 read-only CR1S Channel 1 Compare Shadow Value 0x3C 32 read-write n 0x0 0x0 CR1S Shadow Compare Register for Channel 1 0 15 read-write CR2 Channel 2 Compare Value 0x40 32 read-write n 0x0 0x0 CR2 Compare Register for Channel 2 0 15 read-only CR2S Channel 2 Compare Shadow Value 0x44 32 read-write n 0x0 0x0 CR2S Shadow Compare Register for Channel 2 0 15 read-write DC1R Channel 1 Dead Time Values 0x50 32 read-write n 0x0 0x0 DT1F Fall Value for Dead Time of Channel 1 8 7 read-write DT1R Rise Value for Dead Time of Channel 1 0 7 read-write DC2R Channel 2 Dead Time Values 0x54 32 read-write n 0x0 0x0 DT2F Fall Value for Dead Time of Channel 2 8 7 read-write DT2R Rise Value for Dead Time of Channel 2 0 7 read-write DIT Dither Config 0x1C 32 read-write n 0x0 0x0 DCNT Dither counter actual value 8 3 read-only DCV Dither compare Value 0 3 read-only DITS Dither Shadow Register 0x20 32 read-write n 0x0 0x0 DCVS Dither Shadow Compare Value 0 3 read-write DTC Dead Time Control 0x4C 32 read-write n 0x0 0x0 DCEN1 Dead Time Enable for CC8yST1 2 read-write value1 Dead Time for CC8yST1 path is disabled #0 value2 Dead Time for CC8yST1 path is enabled #1 DCEN2 Dead Time Enable for inverted CC8yST1 3 read-write value1 Dead Time for inverted CC8yST1 path is disabled #0 value2 Dead Time for inverted CC8yST1 path is enabled #1 DCEN3 Dead Time Enable for CC8yST2 4 read-write value1 Dead Time for CC8yST2 path is disabled #0 value2 Dead Time for CC8yST2 path is enabled #1 DCEN4 Dead Time Enable for inverted CC8yST2 5 read-write value1 Dead Time for inverted CC8yST2 path is disabled #0 value2 Dead Time for inverted CC8yST2 path is enabled #1 DTCC Dead Time clock control 6 1 read-write value1 ftclk #00 value2 ftclk/2 #01 value3 ftclk/4 #10 value4 ftclk/8 #11 DTE1 Dead Time Enable for Channel 1 0 read-write value1 Dead Time for channel 1 is disabled #0 value2 Dead Time for channel 1 is enabled #1 DTE2 Dead Time Enable for Channel 2 1 read-write value1 Dead Time for channel 2 is disabled #0 value2 Dead Time for channel 2 is enabled #1 FPC Floating Prescaler Control 0x28 32 read-write n 0x0 0x0 PCMP Floating Prescaler Compare Value 0 3 read-only PVAL Actual Prescaler Value 8 3 read-write FPCS Floating Prescaler Shadow 0x2C 32 read-write n 0x0 0x0 PCMP Floating Prescaler Shadow Compare Value 0 3 read-write INS Input Selector Configuration 0x0 32 read-write n 0x0 0x0 EV0EM Event 0 Edge Selection 16 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV0IS Event 0 signal selection 0 3 read-write value1 CCU8x.INyA #0000 value2 CCU8x.INyB #0001 value3 CCU8x.INyC #0010 value4 CCU8x.INyD #0011 value5 CCU8x.INyE #0100 value6 CCU8x.INyF #0101 value7 CCU8x.INyG #0110 value8 CCU8x.INyH #0111 value9 CCU8x.INyI #1000 value10 CCU8x.INyJ #1001 value11 CCU8x.INyK #1010 value12 CCU8x.INyL #1011 value13 CCU8x.INyM #1100 value14 CCU8x.INyN #1101 value15 CCU8x.INyO #1110 value16 CCU8x.INyP #1111 EV0LM Event 0 Level Selection 22 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV1EM Event 1 Edge Selection 18 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV1IS Event 1 signal selection 4 3 read-write value1 CCU8x.INyA #0000 value2 CCU8x.INyB #0001 value3 CCU8x.INyC #0010 value4 CCU8x.INyD #0011 value5 CCU8x.INyE #0100 value6 CCU8x.INyF #0101 value7 CCU8x.INyG #0110 value8 CCU8x.INyH #0111 value9 CCU8x.INyI #1000 value10 CCU8x.INyJ #1001 value11 CCU8x.INyK #1010 value12 CCU8x.INyL #1011 value13 CCU8x.INyM #1100 value14 CCU8x.INyN #1101 value15 CCU8x.INyO #1110 value16 CCU8x.INyP #1111 EV1LM Event 1 Level Selection 23 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 EV2EM Event 2 Edge Selection 20 1 read-write value1 No action #00 value2 Signal active on rising edge #01 value3 Signal active on falling edge #10 value4 Signal active on both edges #11 EV2IS Event 2 signal selection 8 3 read-write value1 CCU8x.INyA #0000 value2 CCU8x.INyB #0001 value3 CCU8x.INyC #0010 value4 CCU8x.INyD #0011 value5 CCU8x.INyE #0100 value6 CCU8x.INyF #0101 value7 CCU8x.INyG #0110 value8 CCU8x.INyH #0111 value9 CCU8x.INyI #1000 value10 CCU8x.INyJ #1001 value11 CCU8x.INyK #1010 value12 CCU8x.INyL #1011 value13 CCU8x.INyM #1100 value14 CCU8x.INyN #1101 value15 CCU8x.INyO #1110 value16 CCU8x.INyP #1111 EV2LM Event 2 Level Selection 24 read-write value1 Active on HIGH level #0 value2 Active on LOW level #1 LPF0M Event 0 Low Pass Filter Configuration 25 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU8 #01 value3 5 clock cycles of fCCU8 #10 value4 7 clock cycles of fCCU8 #11 LPF1M Event 1 Low Pass Filter Configuration 27 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU8 #01 value3 5 clock cycles of fCCU8 #10 value4 7 clock cycles of fCCU8 #11 LPF2M Event 2 Low Pass Filter Configuration 29 1 read-write value1 LPF is disabled #00 value2 3 clock cycles of fCCU8 #01 value3 5 clock cycles of fCCU8 #10 value4 7 clock cycles of fCCU8 #11 INTE Interrupt Enable Control 0xA4 32 read-write n 0x0 0x0 CMD1E Channel 1 Compare match while counting down enable 3 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMD2E Channel 2 Compare match while counting down enable 5 read-write value1 Compare Match while counting down interrupt is disabled #0 value2 Compare Match while counting down interrupt is enabled #1 CMU1E Channel 1 Compare match while counting up enable 2 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 CMU2E Channel 2 Compare match while counting up enable 4 read-write value1 Compare Match while counting up interrupt is disabled #0 value2 Compare Match while counting up interrupt is enabled #1 E0AE Event 0 interrupt enable 8 read-write value1 Event 0 detection interrupt is disabled #0 value2 Event 0 detection interrupt is enabled #1 E1AE Event 1 interrupt enable 9 read-write value1 Event 1 detection interrupt is disabled #0 value2 Event 1 detection interrupt is enabled #1 E2AE Event 2 interrupt enable 10 read-write value1 Event 2 detection interrupt is disabled #0 value2 Event 2 detection interrupt is enabled #1 OME One match while counting down enable 1 read-write value1 One Match interrupt is disabled #0 value2 One Match interrupt is enabled #1 PME Period match while counting up enable 0 read-write value1 Period Match interrupt is disabled #0 value2 Period Match interrupt is enabled #1 INTS Interrupt Status 0xA0 32 read-write n 0x0 0x0 CMD1S Channel 1 Compare Match while Counting Down 3 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMD2S Channel 2 Compare Match while Counting Down 5 read-only value1 Compare match while counting down not detected #0 value2 Compare match while counting down detected #1 CMU1S Channel 1 Compare Match while Counting Up 2 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 CMU2S Channel 2 Compare Match while Counting Up 4 read-only value1 Compare match while counting up not detected #0 value2 Compare match while counting up detected #1 E0AS Event 0 Detection Status 8 read-only value1 Event 0 not detected #0 value2 Event 0 detected #1 E1AS Event 1 Detection Status 9 read-only value1 Event 1 not detected #0 value2 Event 1 detected #1 E2AS Event 2 Detection Status 10 read-only value1 Event 2 not detected #0 value2 Event 2 detected #1 OMDS One Match while Counting Down 1 read-only value1 One match while counting down not detected #0 value2 One match while counting down detected #1 PMUS Period Match while Counting Up 0 read-only value1 Period match while counting up not detected #0 value2 Period match while counting up detected #1 TRPF Trap Flag Status 11 read-only PR Timer Period Value 0x30 32 read-write n 0x0 0x0 PR Period Register 0 15 read-only PRS Timer Shadow Period Value 0x34 32 read-write n 0x0 0x0 PRS Period Register 0 15 read-write PSC Prescaler Control 0x24 32 read-write n 0x0 0x0 PSIV Prescaler Initial Value 0 3 read-write PSL Passive Level Config 0x18 32 read-write n 0x0 0x0 PSL11 Output Passive Level for CCU8x.OUTy0 0 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 PSL12 Output Passive Level for CCU8x.OUTy1 1 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 PSL21 Output Passive Level for CCU8x.OUTy2 2 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 PSL22 Output Passive Level for CCU8x.OUTy3 3 read-write value1 Passive Level is LOW #0 value2 Passive Level is HIGH #1 SRS Service Request Selector 0xA8 32 read-write n 0x0 0x0 CM1SR Channel 1 Compare match Service request selector 2 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 CM2SR Channel 2 Compare match Service request selector 4 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 E0SR Event 0 Service request selector 8 1 read-write value1 Forward to CCvySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 E1SR Event 1 Service request selector 10 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 E2SR Event 2 Service request selector 12 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CCvySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 POSR Period/One match Service request selector 0 1 read-write value1 Forward to CC8ySR0 #00 value2 Forward to CC8ySR1 #01 value3 Forward to CC8ySR2 #10 value4 Forward to CC8ySR3 #11 STC Shadow transfer control 0xB4 32 read-write n 0x0 0x0 CSE Cascaded shadow transfer enable 0 read-write value1 Cascaded shadow transfer disabled #0 value2 Cascaded shadow transfer enabled #1 STM Shadow transfer mode 1 1 read-write value1 Shadow transfer is done in Period Match and One match. #00 value2 Shadow transfer is done only in Period Match. #01 value3 Shadow transfer is done only in One Match. #10 SWR Interrupt Status Clear 0xB0 32 read-write n 0x0 0x0 RCM1D Channel 1 Compare match while counting down clear 3 write-only RCM1U Channel 1 Compare match while counting up clear 2 write-only RCM2D Channel 2 Compare match while counting down clear 5 write-only RCM2U Channel 2 Compare match while counting up clear 4 write-only RE0A Event 0 detection clear 8 write-only RE1A Event 1 detection clear 9 write-only RE2A Event 2 detection clear 10 write-only ROM One match while counting down clear 1 write-only RPM Period match while counting up clear 0 write-only RTRPF Trap Flag status clear 11 write-only SWS Interrupt Status Set 0xAC 32 read-write n 0x0 0x0 SCM1D Channel 1 Compare match while counting down set 3 write-only SCM1U Channel 1 Compare match while counting up set 2 write-only SCM2D Compare match while counting down set 5 write-only SCM2U Compare match while counting up set 4 write-only SE0A Event 0 detection set 8 write-only SE1A Event 1 detection set 9 write-only SE2A Event 2 detection set 10 write-only SOM One match while counting down set 1 write-only SPM Period match while counting up set 0 write-only STRPF Trap Flag status set 11 write-only TC Slice Timer Control 0x14 32 read-write n 0x0 0x0 CAPC Clear on Capture Control 5 1 read-write value1 Timer is never cleared on a capture event #00 value2 Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event) #01 value3 Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event) #10 value4 Timer is always cleared in a capture event. #11 CCS Continuous Capture Enable 12 read-write value1 The capture into a specific capture register is done with the rules linked with the full flags, described at . #0 value2 The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back). #1 CLST Shadow Transfer on Clear 2 read-write CMOD Capture Compare Mode 3 read-only value1 Compare Mode #0 value2 Capture Mode #1 DIM Dither input selector 15 read-write value1 Slice is using it own dither unit #0 value2 Slice is connected to the dither unit of slice 0. #1 DITHE Dither Enable 13 1 read-write value1 Dither is disabled #00 value2 Dither is applied to the Period #01 value3 Dither is applied to the Compare #10 value4 Dither is applied to the Period and Compare #11 ECM Extended Capture Mode 4 read-write value1 Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only. #0 value2 Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRDThis register holds the information related to the extended capture mode. register. When reading the ECRDThis register holds the information related to the extended capture mode. register, only the capture register register full flag pointed by the ECRDThis register holds the information related to the extended capture mode..VPTR is cleared #1 EME External Modulation Channel enable 27 1 read-write value1 External Modulation functionality doesn't affect any channel #00 value2 External Modulation only applied on channel 1 #01 value3 External Modulation only applied on channel 2 #10 value4 External Modulation applied on both channels #11 EMS External Modulation Synchronization 23 read-write value1 External Modulation functionality is not synchronized with the PWM signal #0 value2 External Modulation functionality is synchronized with the PWM signal #1 EMT External Modulation Type 24 read-write value1 External Modulation functionality is clearing the CC8ySTx bits. #0 value2 External Modulation functionality is gating the outputs. #1 ENDM Extended Stop Function Control 8 1 read-write value1 Clears the timer run bit only (default stop) #00 value2 Clears the timer only (flush) #01 value3 Clears the timer and run bit (flush/stop) #10 FPE Floating Prescaler enable 16 read-write value1 Floating prescaler mode is disabled #0 value2 Floating prescaler mode is enabled #1 MCME1 Multi Channel Mode Enable for Channel 1 25 read-write value1 Multi Channel Mode in Channel 1 is disabled #0 value2 Multi Channel Mode in Channel 1 is enabled #1 MCME2 Multi Channel Mode Enable for Channel 2 26 read-write value1 Multi Channel Mode in Channel 2 is disabled #0 value2 Multi Channel Mode in Channel 2 is enabled #1 SCE Equal Capture Event enable 11 read-write value1 Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #0 value2 Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. and CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1 #1 STOS Status bit output selector 29 1 read-write value1 CC8yST1 forward to CCU8x.STy #00 value2 CC8yST2 forward to CCU8x.STy #01 value3 CC8yST1 AND CC8yST2 forward to CCU8x.STy #10 STRM Extended Start Function Control 10 read-write value1 Sets run bit only (default start) #0 value2 Clears the timer and sets run bit, if not set (flush/start) #1 TCM Timer Counting Mode 0 read-write value1 Edge aligned mode #0 value2 Center aligned mode #1 TLS Timer Load selector 7 read-write value1 Timer is loaded with the value of CR1 #0 value2 Timer is loaded with the value of CR2 #1 TRAPE0 TRAP enable for CCU8x.OUTy0 17 read-write value1 TRAP functionality has no effect on the CCU8x.OUTy0 output #0 value2 TRAP functionality affects the CCU8x.OUTy0 output #1 TRAPE1 TRAP enable for CCU8x.OUTy1 18 read-write TRAPE2 TRAP enable for CCU8x.OUTy2 19 read-write TRAPE3 TRAP enable for CCU8x.OUTy3 20 read-write TRPSE TRAP Synchronization Enable 21 read-write value1 Exiting from TRAP state isn't synchronized with the PWM signal #0 value2 Exiting from TRAP state is synchronized with the PWM signal #1 TRPSW TRAP State Clear Control 22 read-write value1 The slice exits the TRAP state automatically when the TRAP condition is not present (Trap state cleared by HW and SW) #0 value2 The TRAP state can only be exited by a SW request. #1 TSSM Timer Single Shot Mode 1 read-write value1 Single shot mode is disabled #0 value2 Single shot mode is enabled #1 TCCLR Slice Timer Clear 0x10 32 read-write n 0x0 0x0 DITC Dither Counter Clear 2 write-only DTC1C Dead Time Counter 1 Clear 3 write-only DTC2C Dead Time Counter 2 Clear 4 write-only TCC Timer Clear 1 write-only TRBC Timer Run Bit Clear 0 write-only TCSET Slice Timer Run Set 0xC 32 read-write n 0x0 0x0 TRBS Timer Run Bit set 0 write-only TCST Slice Timer Status 0x8 32 read-write n 0x0 0x0 CDIR Timer Counting Direction 1 read-only value1 Timer is counting up #0 value2 Timer is counting down #1 DTR1 Dead Time Counter 1 Run bit 3 read-only value1 Dead Time counter is idle #0 value2 Dead Time counter is running #1 DTR2 Dead Time Counter 2 Run bit 4 read-only value1 Dead Time counter is idle #0 value2 Dead Time counter is running #1 TRB Timer Run Bit 0 read-only value1 Timer is stopped #0 value2 Timer is running #1 TIMER Timer Value 0x70 32 read-write n 0x0 0x0 TVAL Timer Value 0 15 read-write DAC Digital to Analog Converter DAC 0x0 0x0 0x50 registers n DAC0_0 Digital to Analog Converter 42 DAC0_1 Digital to Analog Converter 43 DAC01DATA DAC01 Data Register 0x1C 32 read-write n 0x0 0x0 DATA0 DAC0 Data Bits 0 11 read-write DATA1 DAC1 Data Bits 16 11 read-write DAC0CFG0 DAC0 Configuration Register 0 0x4 32 read-write n 0x0 0x0 FIFOEMP Indicate if the FIFO is empty 26 read-only value1 FIFO not empty #0 value2 FIFO empty #1 FIFOFUL Indicate if the FIFO is full 27 read-only value1 FIFO not full #0 value2 FIFO full #1 FIFOIND Current write position inside the data FIFO 24 1 read-only FREQ Integer Frequency Divider Value 0 19 read-write MODE Enables and Sets the Mode for DAC0 20 2 read-write value1 disable/switch-off DAC #000 value2 Single Value Mode #001 value3 Data Mode #010 value4 Patgen Mode #011 value5 Noise Mode #100 value6 Ramp Mode #101 value7 na #110 value8 na #111 NEGATE Negates the DAC0 output 28 read-write value1 DAC output not negated #0 value2 DAC output negated #1 RUN RUN indicates the current DAC0 operation status 31 read-only value1 DAC0 channel disabled #0 value2 DAC0 channel in operation #1 SIGN Selects Between Signed and Unsigned DAC0 Mode 23 read-write value1 DAC expects unsigned input data #0 value2 DAC expects signed input data #1 SIGNEN Enable Sign Output of DAC0 Pattern Generator 29 read-write value1 Disable #0 value2 Enable #1 SREN Enable DAC0 service request interrupt generation 30 read-write value1 disable #0 value2 enable #1 DAC0CFG1 DAC0 Configuration Register 1 0x8 32 read-write n 0x0 0x0 ANACFG DAC0 analog configuration/calibration parameters 19 4 read-write ANAEN Enable analog DAC for channel 0 24 read-write value1 DAC0 is set to standby (analog output only) #0 value2 enable DAC0 (analog output only) #1 DATMOD Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1 15 read-write value1 independent data handling - process data from DATA0 register (bits 11:0) to DAC0 and data from DATA1 register (bits 11:0) to DAC1 #0 value2 simultaneous data handling - process data from DAC01 register to both DACs (bits 11:0 to DAC0 and bits 23:12 to DAC1). #1 MULDIV Switch between up- and downscale of the DAC0 input data values 3 read-write value1 downscale = division (shift SCALE positions to the right) #0 value2 upscale = multiplication (shift SCALE positions to the left) #1 OFFS 8-bit offset value addition 4 7 read-write REFCFGL Lower 4 band-gap configuration/calibration parameters 28 3 read-write SCALE Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation) 0 2 read-write value1 no shift = multiplication/division by 1 #000 value2 shift by 1 = multiplication/division by 2 #001 value3 shift by 2 = multiplication/division by 4 #010 value4 shift left by 3 = multiplication/division by 8 #011 value5 shift left by 4 = multiplication/division by 16 #100 value6 shift left by 5 = multiplication/division by 32 #101 value7 shift left by 6 = multiplication/division by 64 #110 value8 shift left by 7 = multiplication/division by 128 #111 SWTRIG Software Trigger 16 read-write TRIGMOD Select the trigger source for channel 0 17 1 read-write value1 internal Trigger (integer divided clock - see FREQ parameter) #00 value2 external Trigger (preselected trigger by TRIGSEL parameter) #01 value3 software Trigger (see SWTRIG parameter) #10 TRIGSEL Selects one of the eight external trigger sources for DAC0 12 2 read-write DAC0DATA DAC0 Data Register 0x14 32 read-write n 0x0 0x0 DATA0 DAC0 Data Bits 0 11 read-write DAC0PATH DAC0 Higher Pattern Register 0x24 32 read-write n 0x0 0x0 PAT6 Pattern Number 6 for PATGEN of DAC0 0 4 read-write PAT7 Pattern Number 7 for PATGEN of DAC0 5 4 read-write PAT8 Pattern Number 8 for PATGEN of DAC0 10 4 read-write DAC0PATL DAC0 Lower Pattern Register 0x20 32 read-write n 0x0 0x0 PAT0 Pattern Number 0 for PATGEN of DAC0 0 4 read-write PAT1 Pattern Number 1 for PATGEN of DAC0 5 4 read-write PAT2 Pattern Number 2 for PATGEN of DAC0 10 4 read-write PAT3 Pattern Number 3 for PATGEN of DAC0 15 4 read-write PAT4 Pattern Number 4 for PATGEN of DAC0 20 4 read-write PAT5 Pattern Number 5 for PATGEN of DAC0 25 4 read-write DAC1CFG0 DAC1 Configuration Register 0 0xC 32 read-write n 0x0 0x0 FIFOEMP Indicate if the FIFO is empty 26 read-only value1 FIFO not empty #0 value2 FIFO empty #1 FIFOFUL Indicate if the FIFO is full 27 read-only value1 FIFO not full #0 value2 FIFO full #1 FIFOIND Current write position inside the data FIFO 24 1 read-only FREQ Integer Frequency Divider Value 0 19 read-write MODE Enables and sets the Mode for DAC1 20 2 read-write value1 disable/switch-off DAC #000 value2 Single Value Mode #001 value3 Data Mode #010 value4 Patgen Mode #011 value5 Noise Mode #100 value6 Ramp Mode #101 value7 na #110 value8 na #111 NEGATE Negates the DAC1 output 28 read-write value1 DAC output not negated #0 value2 DAC output negated #1 RUN RUN indicates the current DAC1 operation status 31 read-only value1 DAC1 channel disabled #0 value2 DAC1 channel in operation #1 SIGN Selects between signed and unsigned DAC1 mode 23 read-write value1 DAC expects unsigned input data #0 value2 DAC expects signed input data #1 SIGNEN Enable sign output of DAC1 pattern generator 29 read-write value1 disable #0 value2 enable #1 SREN Enable DAC1 service request interrupt generation 30 read-write value1 disable #0 value2 enable #1 DAC1CFG1 DAC1 Configuration Register 1 0x10 32 read-write n 0x0 0x0 ANACFG DAC1 analog configuration/calibration parameters 19 4 read-write ANAEN Enable analog DAC for channel 1 24 read-write value1 DAC1 is set to standby (analog output only) #0 value2 enable DAC1 (analog output only) #1 MULDIV Switch between up- and downscale of the DAC1 input data values 3 read-write value1 downscale = division (shift SCALE positions to the right) #0 value2 upscale = multiplication (shift SCALE positions to the left) #1 OFFS 8-bit offset value addition 4 7 read-write REFCFGH Higher 4 band-gap configuration/calibration parameters 28 3 read-write SCALE Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation) 0 2 read-write value1 no shift = multiplication/division by 1 #000 value2 shift by 1 = multiplication/division by 2 #001 value3 shift by 2 = multiplication/division by 4 #010 value4 shift left by 3 = multiplication/division by 8 #011 value5 shift left by 4 = multiplication/division by 16 #100 value6 shift left by 5 = multiplication/division by 32 #101 value7 shift left by 6 = multiplication/division by 64 #110 value8 shift left by 7 = multiplication/division by 128 #111 SWTRIG Software Trigger 16 read-write TRIGMOD Select the trigger source for channel 1 17 1 read-write value1 internal Trigger (integer divided clock - see FREQ parameter) #00 value2 external Trigger (preselected trigger by TRIGSEL parameter) #01 value3 software Trigger (see SWTRIG parameter) #10 TRIGSEL Selects one of the eight external trigger sources for DAC1 12 2 read-write DAC1DATA DAC1 Data Register 0x18 32 read-write n 0x0 0x0 DATA1 DAC1 Data Bits 0 11 read-write DAC1PATH DAC1 Higher Pattern Register 0x2C 32 read-write n 0x0 0x0 PAT6 Pattern Number 6 for PATGEN of DAC1 0 4 read-write PAT7 Pattern Number 7 for PATGEN of DAC1 5 4 read-write PAT8 Pattern Number 8 for PATGEN of DAC1 10 4 read-write DAC1PATL DAC1 Lower Pattern Register 0x28 32 read-write n 0x0 0x0 PAT0 Pattern Number 0 for PATGEN of DAC1 0 4 read-write PAT1 Pattern Number 1 for PATGEN of DAC1 5 4 read-write PAT2 Pattern Number 2 for PATGEN of DAC1 10 4 read-write PAT3 Pattern Number 3 for PATGEN of DAC1 15 4 read-write PAT4 Pattern Number 4 for PATGEN of DAC1 20 4 read-write PAT5 Pattern Number 5 for PATGEN of DAC1 25 4 read-write ID Module Identification Register 0x0 32 read-write n 0x0 0x0 MODN Module Number 16 15 read-only MODR Module Revision 0 7 read-only MODT Module Type 8 7 read-only DLR DMA Line Router DLR 0x0 0x0 0x100 registers n LNEN Line Enable 0x10 32 read-write n 0x0 0x0 LN0 Line 0 Enable 0 read-write value1 Disables the line #0 value2 Enables the line and resets a pending request #1 LN1 Line 1 Enable 1 read-write value1 Disables the line #0 value2 Enables the line and resets a pending request #1 LN2 Line 2 Enable 2 read-write value1 Disables the line #0 value2 Enables the line and resets a pending request #1 LN3 Line 3 Enable 3 read-write value1 Disables the line #0 value2 Enables the line and resets a pending request #1 LN4 Line 4 Enable 4 read-write value1 Disables the line #0 value2 Enables the line and resets a pending request #1 LN5 Line 5 Enable 5 read-write value1 Disables the line #0 value2 Enables the line and resets a pending request #1 LN6 Line 6 Enable 6 read-write value1 Disables the line #0 value2 Enables the line and resets a pending request #1 LN7 Line 7 Enable 7 read-write value1 Disables the line #0 value2 Enables the line and resets a pending request #1 OVRCLR Overrun Clear 0x4 32 read-write n 0x0 0x0 LN0 Line 0 Overrun Status Clear 0 write-only LN1 Line 1 Overrun Status Clear 1 write-only LN2 Line 2 Overrun Status Clear 2 write-only LN3 Line 3 Overrun Status Clear 3 write-only LN4 Line 4 Overrun Status Clear 4 write-only LN5 Line 5 Overrun Status Clear 5 write-only LN6 Line 6 Overrun Status Clear 6 write-only LN7 Line 7 Overrun Status Clear 7 write-only OVRSTAT Overrun Status 0x0 32 read-write n 0x0 0x0 LN0 Line 0 Overrun Status 0 read-only LN1 Line 1 Overrun Status 1 read-only LN2 Line 2 Overrun Status 2 read-only LN3 Line 3 Overrun Status 3 read-only LN4 Line 4 Overrun Status 4 read-only LN5 Line 5 Overrun Status 5 read-only LN6 Line 6 Overrun Status 6 read-only LN7 Line 7 Overrun Status 7 read-only SRSEL0 Service Request Selection 0 0x8 32 read-write n 0x0 0x0 RS0 Request Source for Line 0 0 3 read-write RS1 Request Source for Line 1 4 3 read-write RS2 Request Source for Line 2 8 3 read-write RS3 Request Source for Line 3 12 3 read-write RS4 Request Source for Line 4 16 3 read-write RS5 Request Source for Line 5 20 3 read-write RS6 Request Source for Line 6 24 3 read-write RS7 Request Source for Line 7 28 3 read-write ERU0 Event Request Unit 0 ERU 0x0 0x0 0x100 registers n ERU0_0 External Request Unit 0 1 ERU0_1 External Request Unit 0 2 ERU0_2 External Request Unit 0 3 ERU0_3 External Request Unit 0 4 EXICON[0] Event Input Control 0x20 32 read-write n 0x0 0x0 FE Falling Edge Detection Enable ETLx 3 read-write value1 A falling edge is not considered as edge event #0 value2 A falling edge is considered as edge event #1 FL Status Flag for ETLx 7 read-write value1 The enabled edge event has not been detected #0 value2 The enabled edge event has been detected #1 LD Rebuild Level Detection for Status Flag for ETLx 1 read-write value1 The status flag FL is not cleared by hardware and is used as "sticky" bit. Once set, it is not influenced by any edge until it becomes cleared by software. #0 value2 The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0. #1 NA Input A Negation Select for ERSx 10 read-write value1 Input A is used directly #0 value2 Input A is inverted #1 NB Input B Negation Select for ERSx 11 read-write value1 Input B is used directly #0 value2 Input B is inverted #1 OCS Output Channel Select for ETLx Output Trigger Pulse 4 2 read-write value1 Trigger pulses are sent to OGU0 #000 value2 Trigger pulses are sent to OGU1 #001 value3 Trigger pulses are sent to OGU2 #010 value4 Trigger pulses are sent to OGU3 #011 PE Output Trigger Pulse Enable for ETLx 0 read-write value1 The trigger pulse generation is disabled #0 value2 The trigger pulse generation is enabled #1 RE Rising Edge Detection Enable ETLx 2 read-write value1 A rising edge is not considered as edge event #0 value2 A rising edge is considered as edge event #1 SS Input Source Select for ERSx 8 1 read-write value1 Input A without additional combination #00 value2 Input B without additional combination #01 value3 Input A OR input B #10 value4 Input A AND input B #11 EXICON[1] Event Input Control 0x34 32 read-write n 0x0 0x0 FE Falling Edge Detection Enable ETLx 3 read-write value1 A falling edge is not considered as edge event #0 value2 A falling edge is considered as edge event #1 FL Status Flag for ETLx 7 read-write value1 The enabled edge event has not been detected #0 value2 The enabled edge event has been detected #1 LD Rebuild Level Detection for Status Flag for ETLx 1 read-write value1 The status flag FL is not cleared by hardware and is used as "sticky" bit. Once set, it is not influenced by any edge until it becomes cleared by software. #0 value2 The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0. #1 NA Input A Negation Select for ERSx 10 read-write value1 Input A is used directly #0 value2 Input A is inverted #1 NB Input B Negation Select for ERSx 11 read-write value1 Input B is used directly #0 value2 Input B is inverted #1 OCS Output Channel Select for ETLx Output Trigger Pulse 4 2 read-write value1 Trigger pulses are sent to OGU0 #000 value2 Trigger pulses are sent to OGU1 #001 value3 Trigger pulses are sent to OGU2 #010 value4 Trigger pulses are sent to OGU3 #011 PE Output Trigger Pulse Enable for ETLx 0 read-write value1 The trigger pulse generation is disabled #0 value2 The trigger pulse generation is enabled #1 RE Rising Edge Detection Enable ETLx 2 read-write value1 A rising edge is not considered as edge event #0 value2 A rising edge is considered as edge event #1 SS Input Source Select for ERSx 8 1 read-write value1 Input A without additional combination #00 value2 Input B without additional combination #01 value3 Input A OR input B #10 value4 Input A AND input B #11 EXICON[2] Event Input Control 0x4C 32 read-write n 0x0 0x0 FE Falling Edge Detection Enable ETLx 3 read-write value1 A falling edge is not considered as edge event #0 value2 A falling edge is considered as edge event #1 FL Status Flag for ETLx 7 read-write value1 The enabled edge event has not been detected #0 value2 The enabled edge event has been detected #1 LD Rebuild Level Detection for Status Flag for ETLx 1 read-write value1 The status flag FL is not cleared by hardware and is used as "sticky" bit. Once set, it is not influenced by any edge until it becomes cleared by software. #0 value2 The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0. #1 NA Input A Negation Select for ERSx 10 read-write value1 Input A is used directly #0 value2 Input A is inverted #1 NB Input B Negation Select for ERSx 11 read-write value1 Input B is used directly #0 value2 Input B is inverted #1 OCS Output Channel Select for ETLx Output Trigger Pulse 4 2 read-write value1 Trigger pulses are sent to OGU0 #000 value2 Trigger pulses are sent to OGU1 #001 value3 Trigger pulses are sent to OGU2 #010 value4 Trigger pulses are sent to OGU3 #011 PE Output Trigger Pulse Enable for ETLx 0 read-write value1 The trigger pulse generation is disabled #0 value2 The trigger pulse generation is enabled #1 RE Rising Edge Detection Enable ETLx 2 read-write value1 A rising edge is not considered as edge event #0 value2 A rising edge is considered as edge event #1 SS Input Source Select for ERSx 8 1 read-write value1 Input A without additional combination #00 value2 Input B without additional combination #01 value3 Input A OR input B #10 value4 Input A AND input B #11 EXICON[3] Event Input Control 0x68 32 read-write n 0x0 0x0 FE Falling Edge Detection Enable ETLx 3 read-write value1 A falling edge is not considered as edge event #0 value2 A falling edge is considered as edge event #1 FL Status Flag for ETLx 7 read-write value1 The enabled edge event has not been detected #0 value2 The enabled edge event has been detected #1 LD Rebuild Level Detection for Status Flag for ETLx 1 read-write value1 The status flag FL is not cleared by hardware and is used as "sticky" bit. Once set, it is not influenced by any edge until it becomes cleared by software. #0 value2 The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0. #1 NA Input A Negation Select for ERSx 10 read-write value1 Input A is used directly #0 value2 Input A is inverted #1 NB Input B Negation Select for ERSx 11 read-write value1 Input B is used directly #0 value2 Input B is inverted #1 OCS Output Channel Select for ETLx Output Trigger Pulse 4 2 read-write value1 Trigger pulses are sent to OGU0 #000 value2 Trigger pulses are sent to OGU1 #001 value3 Trigger pulses are sent to OGU2 #010 value4 Trigger pulses are sent to OGU3 #011 PE Output Trigger Pulse Enable for ETLx 0 read-write value1 The trigger pulse generation is disabled #0 value2 The trigger pulse generation is enabled #1 RE Rising Edge Detection Enable ETLx 2 read-write value1 A rising edge is not considered as edge event #0 value2 A rising edge is considered as edge event #1 SS Input Source Select for ERSx 8 1 read-write value1 Input A without additional combination #00 value2 Input B without additional combination #01 value3 Input A OR input B #10 value4 Input A AND input B #11 EXISEL Event Input Select 0x0 32 read-write n 0x0 0x0 EXS0A Event Source Select for A0 (ERS0) 0 1 read-write value1 Input ERU_0A0 is selected #00 value2 Input ERU_0A1 is selected #01 value3 Input ERU_0A2 is selected #10 value4 Input ERU_0A3 is selected #11 EXS0B Event Source Select for B0 (ERS0) 2 1 read-write value1 Input ERU_0B0 is selected #00 value2 Input ERU_0B1 is selected #01 value3 Input ERU_0B2 is selected #10 value4 Input ERU_0B3 is selected #11 EXS1A Event Source Select for A1 (ERS1) 4 1 read-write value1 Input ERU_1A0 is selected #00 value2 Input ERU_1A1 is selected #01 value3 Input ERU_1A2 is selected #10 value4 Input ERU_1A3 is selected #11 EXS1B Event Source Select for B1 (ERS1) 6 1 read-write value1 Input ERU_1B0 is selected #00 value2 Input ERU_1B1 is selected #01 value3 Input ERU_1B2 is selected #10 value4 Input ERU_1B3 is selected #11 EXS2A Event Source Select for A2 (ERS2) 8 1 read-write value1 Input ERU_2A0 is selected #00 value2 Input ERU_2A1 is selected #01 value3 Input ERU_2A2 is selected #10 value4 Input ERU_2A3 is selected #11 EXS2B Event Source Select for B2 (ERS2) 10 1 read-write value1 Input ERU_2B0 is selected #00 value2 Input ERU_2B1 is selected #01 value3 Input ERU_2B2 is selected #10 value4 Input ERU_2B3 is selected #11 EXS3A Event Source Select for A3 (ERS3) 12 1 read-write value1 Input ERU_3A0 is selected #00 value2 Input ERU_3A1 is selected #01 value3 Input ERU_3A2 is selected #10 value4 Input ERU_3A3 is selected #11 EXS3B Event Source Select for B3 (ERS3) 14 1 read-write value1 Input ERU_3B0 is selected #00 value2 Input ERU_3B1 is selected #01 value3 Input ERU_3B2 is selected #10 value4 Input ERU_3B3 is selected #11 EXOCON[0] Event Output Trigger Control 0x40 32 read-write n 0x0 0x0 GEEN Gating Event Enable 2 read-write value1 The event detection is disabled #0 value2 The event detection is enabled #1 GP Gating Selection for Pattern Detection Result 4 1 read-write value1 ERU_GOUTy is always disabled and ERU_IOUTy can not be activated #00 value2 ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy #01 value3 ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1) #10 value4 ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0) #11 IPEN0 Pattern Detection Enable for ETL0 12 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN1 Pattern Detection Enable for ETL1 13 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN2 Pattern Detection Enable for ETL2 14 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN3 Pattern Detection Enable for ETL3 15 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 ISS Internal Trigger Source Selection 0 1 read-write value1 The peripheral trigger function is disabled #00 value2 Input ERU_OGUy1 is selected #01 value3 Input ERU_OGUy2 is selected #10 value4 Input ERU_OGUy3 is selected #11 PDR Pattern Detection Result Flag 3 read-only value1 A pattern miss is detected #0 value2 A pattern match is detected #1 EXOCON[1] Event Output Trigger Control 0x64 32 read-write n 0x0 0x0 GEEN Gating Event Enable 2 read-write value1 The event detection is disabled #0 value2 The event detection is enabled #1 GP Gating Selection for Pattern Detection Result 4 1 read-write value1 ERU_GOUTy is always disabled and ERU_IOUTy can not be activated #00 value2 ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy #01 value3 ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1) #10 value4 ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0) #11 IPEN0 Pattern Detection Enable for ETL0 12 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN1 Pattern Detection Enable for ETL1 13 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN2 Pattern Detection Enable for ETL2 14 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN3 Pattern Detection Enable for ETL3 15 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 ISS Internal Trigger Source Selection 0 1 read-write value1 The peripheral trigger function is disabled #00 value2 Input ERU_OGUy1 is selected #01 value3 Input ERU_OGUy2 is selected #10 value4 Input ERU_OGUy3 is selected #11 PDR Pattern Detection Result Flag 3 read-only value1 A pattern miss is detected #0 value2 A pattern match is detected #1 EXOCON[2] Event Output Trigger Control 0x8C 32 read-write n 0x0 0x0 GEEN Gating Event Enable 2 read-write value1 The event detection is disabled #0 value2 The event detection is enabled #1 GP Gating Selection for Pattern Detection Result 4 1 read-write value1 ERU_GOUTy is always disabled and ERU_IOUTy can not be activated #00 value2 ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy #01 value3 ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1) #10 value4 ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0) #11 IPEN0 Pattern Detection Enable for ETL0 12 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN1 Pattern Detection Enable for ETL1 13 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN2 Pattern Detection Enable for ETL2 14 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN3 Pattern Detection Enable for ETL3 15 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 ISS Internal Trigger Source Selection 0 1 read-write value1 The peripheral trigger function is disabled #00 value2 Input ERU_OGUy1 is selected #01 value3 Input ERU_OGUy2 is selected #10 value4 Input ERU_OGUy3 is selected #11 PDR Pattern Detection Result Flag 3 read-only value1 A pattern miss is detected #0 value2 A pattern match is detected #1 EXOCON[3] Event Output Trigger Control 0xB8 32 read-write n 0x0 0x0 GEEN Gating Event Enable 2 read-write value1 The event detection is disabled #0 value2 The event detection is enabled #1 GP Gating Selection for Pattern Detection Result 4 1 read-write value1 ERU_GOUTy is always disabled and ERU_IOUTy can not be activated #00 value2 ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy #01 value3 ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1) #10 value4 ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0) #11 IPEN0 Pattern Detection Enable for ETL0 12 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN1 Pattern Detection Enable for ETL1 13 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN2 Pattern Detection Enable for ETL2 14 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN3 Pattern Detection Enable for ETL3 15 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 ISS Internal Trigger Source Selection 0 1 read-write value1 The peripheral trigger function is disabled #00 value2 Input ERU_OGUy1 is selected #01 value3 Input ERU_OGUy2 is selected #10 value4 Input ERU_OGUy3 is selected #11 PDR Pattern Detection Result Flag 3 read-only value1 A pattern miss is detected #0 value2 A pattern match is detected #1 ERU1 Event Request Unit 1 ERU 0x0 0x0 0x100 registers n ERU1_0 External Request Unit 1 5 ERU1_1 External Request Unit 1 6 ERU1_2 External Request Unit 1 7 ERU1_3 External Request Unit 1 8 EXICON[0] Event Input Control 0x20 32 read-write n 0x0 0x0 FE Falling Edge Detection Enable ETLx 3 read-write value1 A falling edge is not considered as edge event #0 value2 A falling edge is considered as edge event #1 FL Status Flag for ETLx 7 read-write value1 The enabled edge event has not been detected #0 value2 The enabled edge event has been detected #1 LD Rebuild Level Detection for Status Flag for ETLx 1 read-write value1 The status flag FL is not cleared by hardware and is used as "sticky" bit. Once set, it is not influenced by any edge until it becomes cleared by software. #0 value2 The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0. #1 NA Input A Negation Select for ERSx 10 read-write value1 Input A is used directly #0 value2 Input A is inverted #1 NB Input B Negation Select for ERSx 11 read-write value1 Input B is used directly #0 value2 Input B is inverted #1 OCS Output Channel Select for ETLx Output Trigger Pulse 4 2 read-write value1 Trigger pulses are sent to OGU0 #000 value2 Trigger pulses are sent to OGU1 #001 value3 Trigger pulses are sent to OGU2 #010 value4 Trigger pulses are sent to OGU3 #011 PE Output Trigger Pulse Enable for ETLx 0 read-write value1 The trigger pulse generation is disabled #0 value2 The trigger pulse generation is enabled #1 RE Rising Edge Detection Enable ETLx 2 read-write value1 A rising edge is not considered as edge event #0 value2 A rising edge is considered as edge event #1 SS Input Source Select for ERSx 8 1 read-write value1 Input A without additional combination #00 value2 Input B without additional combination #01 value3 Input A OR input B #10 value4 Input A AND input B #11 EXICON[1] Event Input Control 0x34 32 read-write n 0x0 0x0 FE Falling Edge Detection Enable ETLx 3 read-write value1 A falling edge is not considered as edge event #0 value2 A falling edge is considered as edge event #1 FL Status Flag for ETLx 7 read-write value1 The enabled edge event has not been detected #0 value2 The enabled edge event has been detected #1 LD Rebuild Level Detection for Status Flag for ETLx 1 read-write value1 The status flag FL is not cleared by hardware and is used as "sticky" bit. Once set, it is not influenced by any edge until it becomes cleared by software. #0 value2 The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0. #1 NA Input A Negation Select for ERSx 10 read-write value1 Input A is used directly #0 value2 Input A is inverted #1 NB Input B Negation Select for ERSx 11 read-write value1 Input B is used directly #0 value2 Input B is inverted #1 OCS Output Channel Select for ETLx Output Trigger Pulse 4 2 read-write value1 Trigger pulses are sent to OGU0 #000 value2 Trigger pulses are sent to OGU1 #001 value3 Trigger pulses are sent to OGU2 #010 value4 Trigger pulses are sent to OGU3 #011 PE Output Trigger Pulse Enable for ETLx 0 read-write value1 The trigger pulse generation is disabled #0 value2 The trigger pulse generation is enabled #1 RE Rising Edge Detection Enable ETLx 2 read-write value1 A rising edge is not considered as edge event #0 value2 A rising edge is considered as edge event #1 SS Input Source Select for ERSx 8 1 read-write value1 Input A without additional combination #00 value2 Input B without additional combination #01 value3 Input A OR input B #10 value4 Input A AND input B #11 EXICON[2] Event Input Control 0x4C 32 read-write n 0x0 0x0 FE Falling Edge Detection Enable ETLx 3 read-write value1 A falling edge is not considered as edge event #0 value2 A falling edge is considered as edge event #1 FL Status Flag for ETLx 7 read-write value1 The enabled edge event has not been detected #0 value2 The enabled edge event has been detected #1 LD Rebuild Level Detection for Status Flag for ETLx 1 read-write value1 The status flag FL is not cleared by hardware and is used as "sticky" bit. Once set, it is not influenced by any edge until it becomes cleared by software. #0 value2 The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0. #1 NA Input A Negation Select for ERSx 10 read-write value1 Input A is used directly #0 value2 Input A is inverted #1 NB Input B Negation Select for ERSx 11 read-write value1 Input B is used directly #0 value2 Input B is inverted #1 OCS Output Channel Select for ETLx Output Trigger Pulse 4 2 read-write value1 Trigger pulses are sent to OGU0 #000 value2 Trigger pulses are sent to OGU1 #001 value3 Trigger pulses are sent to OGU2 #010 value4 Trigger pulses are sent to OGU3 #011 PE Output Trigger Pulse Enable for ETLx 0 read-write value1 The trigger pulse generation is disabled #0 value2 The trigger pulse generation is enabled #1 RE Rising Edge Detection Enable ETLx 2 read-write value1 A rising edge is not considered as edge event #0 value2 A rising edge is considered as edge event #1 SS Input Source Select for ERSx 8 1 read-write value1 Input A without additional combination #00 value2 Input B without additional combination #01 value3 Input A OR input B #10 value4 Input A AND input B #11 EXICON[3] Event Input Control 0x68 32 read-write n 0x0 0x0 FE Falling Edge Detection Enable ETLx 3 read-write value1 A falling edge is not considered as edge event #0 value2 A falling edge is considered as edge event #1 FL Status Flag for ETLx 7 read-write value1 The enabled edge event has not been detected #0 value2 The enabled edge event has been detected #1 LD Rebuild Level Detection for Status Flag for ETLx 1 read-write value1 The status flag FL is not cleared by hardware and is used as "sticky" bit. Once set, it is not influenced by any edge until it becomes cleared by software. #0 value2 The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0. #1 NA Input A Negation Select for ERSx 10 read-write value1 Input A is used directly #0 value2 Input A is inverted #1 NB Input B Negation Select for ERSx 11 read-write value1 Input B is used directly #0 value2 Input B is inverted #1 OCS Output Channel Select for ETLx Output Trigger Pulse 4 2 read-write value1 Trigger pulses are sent to OGU0 #000 value2 Trigger pulses are sent to OGU1 #001 value3 Trigger pulses are sent to OGU2 #010 value4 Trigger pulses are sent to OGU3 #011 PE Output Trigger Pulse Enable for ETLx 0 read-write value1 The trigger pulse generation is disabled #0 value2 The trigger pulse generation is enabled #1 RE Rising Edge Detection Enable ETLx 2 read-write value1 A rising edge is not considered as edge event #0 value2 A rising edge is considered as edge event #1 SS Input Source Select for ERSx 8 1 read-write value1 Input A without additional combination #00 value2 Input B without additional combination #01 value3 Input A OR input B #10 value4 Input A AND input B #11 EXISEL Event Input Select 0x0 32 read-write n 0x0 0x0 EXS0A Event Source Select for A0 (ERS0) 0 1 read-write value1 Input ERU_0A0 is selected #00 value2 Input ERU_0A1 is selected #01 value3 Input ERU_0A2 is selected #10 value4 Input ERU_0A3 is selected #11 EXS0B Event Source Select for B0 (ERS0) 2 1 read-write value1 Input ERU_0B0 is selected #00 value2 Input ERU_0B1 is selected #01 value3 Input ERU_0B2 is selected #10 value4 Input ERU_0B3 is selected #11 EXS1A Event Source Select for A1 (ERS1) 4 1 read-write value1 Input ERU_1A0 is selected #00 value2 Input ERU_1A1 is selected #01 value3 Input ERU_1A2 is selected #10 value4 Input ERU_1A3 is selected #11 EXS1B Event Source Select for B1 (ERS1) 6 1 read-write value1 Input ERU_1B0 is selected #00 value2 Input ERU_1B1 is selected #01 value3 Input ERU_1B2 is selected #10 value4 Input ERU_1B3 is selected #11 EXS2A Event Source Select for A2 (ERS2) 8 1 read-write value1 Input ERU_2A0 is selected #00 value2 Input ERU_2A1 is selected #01 value3 Input ERU_2A2 is selected #10 value4 Input ERU_2A3 is selected #11 EXS2B Event Source Select for B2 (ERS2) 10 1 read-write value1 Input ERU_2B0 is selected #00 value2 Input ERU_2B1 is selected #01 value3 Input ERU_2B2 is selected #10 value4 Input ERU_2B3 is selected #11 EXS3A Event Source Select for A3 (ERS3) 12 1 read-write value1 Input ERU_3A0 is selected #00 value2 Input ERU_3A1 is selected #01 value3 Input ERU_3A2 is selected #10 value4 Input ERU_3A3 is selected #11 EXS3B Event Source Select for B3 (ERS3) 14 1 read-write value1 Input ERU_3B0 is selected #00 value2 Input ERU_3B1 is selected #01 value3 Input ERU_3B2 is selected #10 value4 Input ERU_3B3 is selected #11 EXOCON[0] Event Output Trigger Control 0x40 32 read-write n 0x0 0x0 GEEN Gating Event Enable 2 read-write value1 The event detection is disabled #0 value2 The event detection is enabled #1 GP Gating Selection for Pattern Detection Result 4 1 read-write value1 ERU_GOUTy is always disabled and ERU_IOUTy can not be activated #00 value2 ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy #01 value3 ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1) #10 value4 ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0) #11 IPEN0 Pattern Detection Enable for ETL0 12 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN1 Pattern Detection Enable for ETL1 13 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN2 Pattern Detection Enable for ETL2 14 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN3 Pattern Detection Enable for ETL3 15 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 ISS Internal Trigger Source Selection 0 1 read-write value1 The peripheral trigger function is disabled #00 value2 Input ERU_OGUy1 is selected #01 value3 Input ERU_OGUy2 is selected #10 value4 Input ERU_OGUy3 is selected #11 PDR Pattern Detection Result Flag 3 read-only value1 A pattern miss is detected #0 value2 A pattern match is detected #1 EXOCON[1] Event Output Trigger Control 0x64 32 read-write n 0x0 0x0 GEEN Gating Event Enable 2 read-write value1 The event detection is disabled #0 value2 The event detection is enabled #1 GP Gating Selection for Pattern Detection Result 4 1 read-write value1 ERU_GOUTy is always disabled and ERU_IOUTy can not be activated #00 value2 ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy #01 value3 ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1) #10 value4 ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0) #11 IPEN0 Pattern Detection Enable for ETL0 12 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN1 Pattern Detection Enable for ETL1 13 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN2 Pattern Detection Enable for ETL2 14 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN3 Pattern Detection Enable for ETL3 15 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 ISS Internal Trigger Source Selection 0 1 read-write value1 The peripheral trigger function is disabled #00 value2 Input ERU_OGUy1 is selected #01 value3 Input ERU_OGUy2 is selected #10 value4 Input ERU_OGUy3 is selected #11 PDR Pattern Detection Result Flag 3 read-only value1 A pattern miss is detected #0 value2 A pattern match is detected #1 EXOCON[2] Event Output Trigger Control 0x8C 32 read-write n 0x0 0x0 GEEN Gating Event Enable 2 read-write value1 The event detection is disabled #0 value2 The event detection is enabled #1 GP Gating Selection for Pattern Detection Result 4 1 read-write value1 ERU_GOUTy is always disabled and ERU_IOUTy can not be activated #00 value2 ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy #01 value3 ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1) #10 value4 ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0) #11 IPEN0 Pattern Detection Enable for ETL0 12 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN1 Pattern Detection Enable for ETL1 13 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN2 Pattern Detection Enable for ETL2 14 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN3 Pattern Detection Enable for ETL3 15 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 ISS Internal Trigger Source Selection 0 1 read-write value1 The peripheral trigger function is disabled #00 value2 Input ERU_OGUy1 is selected #01 value3 Input ERU_OGUy2 is selected #10 value4 Input ERU_OGUy3 is selected #11 PDR Pattern Detection Result Flag 3 read-only value1 A pattern miss is detected #0 value2 A pattern match is detected #1 EXOCON[3] Event Output Trigger Control 0xB8 32 read-write n 0x0 0x0 GEEN Gating Event Enable 2 read-write value1 The event detection is disabled #0 value2 The event detection is enabled #1 GP Gating Selection for Pattern Detection Result 4 1 read-write value1 ERU_GOUTy is always disabled and ERU_IOUTy can not be activated #00 value2 ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy #01 value3 ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1) #10 value4 ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0) #11 IPEN0 Pattern Detection Enable for ETL0 12 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN1 Pattern Detection Enable for ETL1 13 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN2 Pattern Detection Enable for ETL2 14 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 IPEN3 Pattern Detection Enable for ETL3 15 read-write value1 Flag EXICONx.FL is excluded from the pattern detection #0 value2 Flag EXICONx.FL is included in the pattern detection #1 ISS Internal Trigger Source Selection 0 1 read-write value1 The peripheral trigger function is disabled #00 value2 Input ERU_OGUy1 is selected #01 value3 Input ERU_OGUy2 is selected #10 value4 Input ERU_OGUy3 is selected #11 PDR Pattern Detection Result Flag 3 read-only value1 A pattern miss is detected #0 value2 A pattern match is detected #1 FCE Flexible CRC Engine FCE 0x0 0x0 0x20 registers n FCE0_0 Flexible CRC Engine 104 CLC Clock Control Register 0x0 32 read-write n 0x0 0x0 DISR Module Disable Request Bit 0 read-write DISS Module Disable Status Bit 1 read-only ID Module Identification Register 0x8 32 read-write n 0x0 0x0 MOD_NUMBER Module Number Value 16 15 read-only MOD_REV Module Revision Number 0 7 read-only MOD_TYPE Module Type 8 7 read-only FCE_KE0 Flexible CRC Engine FCE 0x0 0x0 0x20 registers n CFG CRC Configuration Register 0x8 32 read-write n 0x0 0x0 ALR Automatic Length Reload 5 read-write value1 Disables automatic reload of the LENGTH field. #0 value2 Enables automatic reload of the LENGTH field at the end of a message. #1 BEI Bus Error Interrupt 3 read-write value1 Bus Error Interrupt is disabled #0 value2 Bus Error Interrupt is enabled #1 CCE CRC Check Comparison 4 read-write value1 CRC check comparison at the end of a message is disabled #0 value2 CRC check comparison at the end of a message is enabled #1 CEI Configuration Error Interrupt 1 read-write value1 Configuration Error Interrupt is disabled #0 value2 Configuration Error Interrupt is enabled #1 CMI CRC Mismatch Interrupt 0 read-write value1 CRC Mismatch Interrupt is disabled #0 value2 CRC Mismatch Interrupt is enabled #1 LEI Length Error Interrupt 2 read-write value1 Length Error Interrupt is disabled #0 value2 Length Error Interrupt is enabled #1 REFIN IR Byte Wise Reflection 8 read-write value1 IR Byte Wise Reflection is disabled #0 value2 IR Byte Wise Reflection is enabled #1 REFOUT CRC 32-Bit Wise Reflection 9 read-write value1 CRC 32-bit wise is disabled #0 value2 CRC 32-bit wise is enabled #1 XSEL Selects the value to be xored with the final CRC 10 read-write value1 0x00000000 #0 value2 0xFFFFFFFF #1 CHECK CRC Check Register 0x14 32 read-write n 0x0 0x0 CHECK CHECK Register 0 31 read-write CRC CRC Register 0x18 32 read-write n 0x0 0x0 CRC CRC Register 0 31 read-write CTR CRC Test Register 0x1C 32 read-write n 0x0 0x0 FCM Force CRC Mismatch 0 read-write FRM_CFG Force CFG Register Mismatch 1 read-write FRM_CHECK Force Check Register Mismatch 2 read-write IR Input Register 0x0 32 read-write n 0x0 0x0 IR Input Register 0 31 read-write LENGTH CRC Length Register 0x10 32 read-write n 0x0 0x0 LENGTH Message Length Register 0 15 read-write RES CRC Result Register 0x4 32 read-write n 0x0 0x0 RES Result Register 0 31 read-only STS CRC Status Register 0xC 32 read-write n 0x0 0x0 BEF Bus Error Flag 3 read-write CEF Configuration Error Flag 1 read-write CMF CRC Mismatch Flag 0 read-write LEF Length Error Flag 2 read-write FCE_KE1 Flexible CRC Engine FCE 0x0 0x0 0x20 registers n CFG CRC Configuration Register 0x8 32 read-write n 0x0 0x0 ALR Automatic Length Reload 5 read-write value1 Disables automatic reload of the LENGTH field. #0 value2 Enables automatic reload of the LENGTH field at the end of a message. #1 BEI Bus Error Interrupt 3 read-write value1 Bus Error Interrupt is disabled #0 value2 Bus Error Interrupt is enabled #1 CCE CRC Check Comparison 4 read-write value1 CRC check comparison at the end of a message is disabled #0 value2 CRC check comparison at the end of a message is enabled #1 CEI Configuration Error Interrupt 1 read-write value1 Configuration Error Interrupt is disabled #0 value2 Configuration Error Interrupt is enabled #1 CMI CRC Mismatch Interrupt 0 read-write value1 CRC Mismatch Interrupt is disabled #0 value2 CRC Mismatch Interrupt is enabled #1 LEI Length Error Interrupt 2 read-write value1 Length Error Interrupt is disabled #0 value2 Length Error Interrupt is enabled #1 REFIN IR Byte Wise Reflection 8 read-write value1 IR Byte Wise Reflection is disabled #0 value2 IR Byte Wise Reflection is enabled #1 REFOUT CRC 32-Bit Wise Reflection 9 read-write value1 CRC 32-bit wise is disabled #0 value2 CRC 32-bit wise is enabled #1 XSEL Selects the value to be xored with the final CRC 10 read-write value1 0x00000000 #0 value2 0xFFFFFFFF #1 CHECK CRC Check Register 0x14 32 read-write n 0x0 0x0 CHECK CHECK Register 0 31 read-write CRC CRC Register 0x18 32 read-write n 0x0 0x0 CRC CRC Register 0 31 read-write CTR CRC Test Register 0x1C 32 read-write n 0x0 0x0 FCM Force CRC Mismatch 0 read-write FRM_CFG Force CFG Register Mismatch 1 read-write FRM_CHECK Force Check Register Mismatch 2 read-write IR Input Register 0x0 32 read-write n 0x0 0x0 IR Input Register 0 31 read-write LENGTH CRC Length Register 0x10 32 read-write n 0x0 0x0 LENGTH Message Length Register 0 15 read-write RES CRC Result Register 0x4 32 read-write n 0x0 0x0 RES Result Register 0 31 read-only STS CRC Status Register 0xC 32 read-write n 0x0 0x0 BEF Bus Error Flag 3 read-write CEF Configuration Error Flag 1 read-write CMF CRC Mismatch Flag 0 read-write LEF Length Error Flag 2 read-write FCE_KE2 Flexible CRC Engine FCE 0x0 0x0 0x20 registers n CFG CRC Configuration Register 0x8 32 read-write n 0x0 0x0 ALR Automatic Length Reload 5 read-write value1 Disables automatic reload of the LENGTH field. #0 value2 Enables automatic reload of the LENGTH field at the end of a message. #1 BEI Bus Error Interrupt 3 read-write value1 Bus Error Interrupt is disabled #0 value2 Bus Error Interrupt is enabled #1 CCE CRC Check Comparison 4 read-write value1 CRC check comparison at the end of a message is disabled #0 value2 CRC check comparison at the end of a message is enabled #1 CEI Configuration Error Interrupt 1 read-write value1 Configuration Error Interrupt is disabled #0 value2 Configuration Error Interrupt is enabled #1 CMI CRC Mismatch Interrupt 0 read-write value1 CRC Mismatch Interrupt is disabled #0 value2 CRC Mismatch Interrupt is enabled #1 LEI Length Error Interrupt 2 read-write value1 Length Error Interrupt is disabled #0 value2 Length Error Interrupt is enabled #1 REFIN IR Byte Wise Reflection 8 read-write value1 IR Byte Wise Reflection is disabled #0 value2 IR Byte Wise Reflection is enabled #1 REFOUT CRC 32-Bit Wise Reflection 9 read-write value1 CRC 32-bit wise is disabled #0 value2 CRC 32-bit wise is enabled #1 XSEL Selects the value to be xored with the final CRC 10 read-write value1 0x00000000 #0 value2 0xFFFFFFFF #1 CHECK CRC Check Register 0x14 32 read-write n 0x0 0x0 CHECK CHECK Register 0 31 read-write CRC CRC Register 0x18 32 read-write n 0x0 0x0 CRC CRC Register 0 31 read-write CTR CRC Test Register 0x1C 32 read-write n 0x0 0x0 FCM Force CRC Mismatch 0 read-write FRM_CFG Force CFG Register Mismatch 1 read-write FRM_CHECK Force Check Register Mismatch 2 read-write IR Input Register 0x0 32 read-write n 0x0 0x0 IR Input Register 0 31 read-write LENGTH CRC Length Register 0x10 32 read-write n 0x0 0x0 LENGTH Message Length Register 0 15 read-write RES CRC Result Register 0x4 32 read-write n 0x0 0x0 RES Result Register 0 31 read-only STS CRC Status Register 0xC 32 read-write n 0x0 0x0 BEF Bus Error Flag 3 read-write CEF Configuration Error Flag 1 read-write CMF CRC Mismatch Flag 0 read-write LEF Length Error Flag 2 read-write FCE_KE3 Flexible CRC Engine FCE 0x0 0x0 0x20 registers n CFG CRC Configuration Register 0x8 32 read-write n 0x0 0x0 ALR Automatic Length Reload 5 read-write value1 Disables automatic reload of the LENGTH field. #0 value2 Enables automatic reload of the LENGTH field at the end of a message. #1 BEI Bus Error Interrupt 3 read-write value1 Bus Error Interrupt is disabled #0 value2 Bus Error Interrupt is enabled #1 CCE CRC Check Comparison 4 read-write value1 CRC check comparison at the end of a message is disabled #0 value2 CRC check comparison at the end of a message is enabled #1 CEI Configuration Error Interrupt 1 read-write value1 Configuration Error Interrupt is disabled #0 value2 Configuration Error Interrupt is enabled #1 CMI CRC Mismatch Interrupt 0 read-write value1 CRC Mismatch Interrupt is disabled #0 value2 CRC Mismatch Interrupt is enabled #1 LEI Length Error Interrupt 2 read-write value1 Length Error Interrupt is disabled #0 value2 Length Error Interrupt is enabled #1 REFIN IR Byte Wise Reflection 8 read-write value1 IR Byte Wise Reflection is disabled #0 value2 IR Byte Wise Reflection is enabled #1 REFOUT CRC 32-Bit Wise Reflection 9 read-write value1 CRC 32-bit wise is disabled #0 value2 CRC 32-bit wise is enabled #1 XSEL Selects the value to be xored with the final CRC 10 read-write value1 0x00000000 #0 value2 0xFFFFFFFF #1 CHECK CRC Check Register 0x14 32 read-write n 0x0 0x0 CHECK CHECK Register 0 31 read-write CRC CRC Register 0x18 32 read-write n 0x0 0x0 CRC CRC Register 0 31 read-write CTR CRC Test Register 0x1C 32 read-write n 0x0 0x0 FCM Force CRC Mismatch 0 read-write FRM_CFG Force CFG Register Mismatch 1 read-write FRM_CHECK Force Check Register Mismatch 2 read-write IR Input Register 0x0 32 read-write n 0x0 0x0 IR Input Register 0 31 read-write LENGTH CRC Length Register 0x10 32 read-write n 0x0 0x0 LENGTH Message Length Register 0 15 read-write RES CRC Result Register 0x4 32 read-write n 0x0 0x0 RES Result Register 0 31 read-only STS CRC Status Register 0xC 32 read-write n 0x0 0x0 BEF Bus Error Flag 3 read-write CEF Configuration Error Flag 1 read-write CMF CRC Mismatch Flag 0 read-write LEF Length Error Flag 2 read-write FLASH0 Flash Memory Controller FLASH0 0x0 0x0 0x1400 registers n FCON Flash Configuration Register 0x1014 32 read-write n 0x0 0x0 DCF Disable Code Fetch from Flash Memory 17 read-write value1 Code fetching from the Flash memory area is allowed. #0 value2 Code fetching from the Flash memory area is not allowed. This bit is not taken into account while RPA='0'. #1 DDF Disable Any Data Fetch from Flash 18 read-write value1 Data read access to the Flash memory area is allowed. #0 value2 Data read access to the Flash memory area is not allowed. This bit is not taken into account while RPA='0'. #1 EOBM End of Busy Interrupt Mask 31 read-write value1 Interrupt not enabled #0 value2 EOB interrupt is enabled #1 ESLDIS External Sleep Request Disable 14 read-write value1 External sleep request signal input is enabled #0 value2 Externally requested Flash sleep is disabled #1 IDLE Dynamic Flash Idle 13 read-write value1 Normal/standard Flash read operation #0 value2 Dynamic idle of Program Flash enabled for power saving; static prefetching disabled #1 PFDBERM PFLASH Double-Bit Error Interrupt Mask 29 read-write value1 Double-Bit Error interrupt for PFLASH not enabled #0 value2 Double-Bit Error interrupt for PFLASH enabled. Especially intended for margin check #1 PFSBERM PFLASH Single-Bit Error Interrupt Mask 27 read-write value1 No Single-Bit Error interrupt enabled #0 value2 Single-Bit Error interrupt enabled for PFLASH #1 PROERM Protection Error Interrupt Mask 26 read-write value1 Interrupt not enabled #0 value2 Flash interrupt because of Protection Error is enabled #1 RPA Read Protection Activated 16 read-only value1 The Flash-internal read protection is not activated. Bits DCF, DDF are not taken into account. Bits DCF, DDFx can be cleared #0 value2 The Flash-internal read protection is activated. Bits DCF, DDF are enabled and evaluated. #1 SLEEP Flash SLEEP 15 read-write value1 Normal state or wake-up #0 value2 Flash sleep mode is requested #1 SQERM Command Sequence Error Interrupt Mask 25 read-write value1 Interrupt not enabled #0 value2 Flash interrupt because of Sequence Error is enabled #1 VOPERM Verify and Operation Error Interrupt Mask 24 read-write value1 Interrupt not enabled #0 value2 Flash interrupt because of Verify Error or Operation Error in Flash array (FSI) is enabled #1 WSECPF Wait State for Error Correction of PFLASH 4 read-write value1 No additional wait state for error correction #0 value2 One additional wait state for error correction during read access to Program Flash. If enabled, this wait state is only used for the first transfer of a burst transfer. #1 WSPFLASH Wait States for read access to PFLASH 0 3 read-write value1 PFLASH access in one clock cycle #0000 value2 PFLASH access in one clock cycle #0001 value3 PFLASH access in two clock cycles #0010 value4 PFLASH access in three clock cycles #0011 value5 PFLASH access in fifteen clock cycles. #1111 FSR Flash Status Register 0x1010 32 read-write n 0x0 0x0 ERASE Erase State 5 read-only value1 There is no erase operation requested or in progress or just finished #0 value2 Erase operation requested (from FIM) or in action or finished. #1 FABUSY Flash Array Busy 1 read-only PBUSY Program Flash Busy 0 read-only value1 PFLASH ready, not busy; PFLASH in read mode. #0 value2 PFLASH busy; PFLASH not in read mode. #1 PFDBER PFLASH Double-Bit Error 14 read-only value1 No Double-Bit Error detected during read access to PFLASH #0 value2 Double-Bit Error detected in PFLASH #1 PFOPER Program Flash Operation Error 8 read-only value1 No operation error reported by Program Flash #0 value2 Flash array operation aborted, because of a Flash array failure, e.g. an ECC error in microcode. #1 PFPAGE Program Flash in Page Mode 6 read-only value1 Program Flash not in page mode #0 value2 Program Flash in page mode; assembly buffer of PFLASH (256 byte) is in use (being filled up) #1 PFSBER PFLASH Single-Bit Error and Correction 12 read-only value1 No Single-Bit Error detected during read access to PFLASH #0 value2 Single-Bit Error detected and corrected #1 PROER Protection Error 11 read-only value1 No protection error #0 value2 Protection error. #1 PROG Programming State 4 read-only value1 There is no program operation requested or in progress or just finished. #0 value2 Programming operation (write page) requested (from FIM) or in action or finished. #1 PROIN Protection Installed 16 read-only value1 No protection is installed #0 value2 Read or/and write protection for one or more users is configured and correctly confirmed in the User Configuration Block(s). #1 RPRODIS Read Protection Disable State 19 read-only value1 Read protection (if installed) is not disabled #0 value2 Read and global write protection is temporarily disabled. #1 RPROIN Read Protection Installed 18 read-only value1 No read protection installed #0 value2 Read protection and global write protection is configured and correctly confirmed in the User Configuration Block 0. #1 SLM Flash Sleep Mode 28 read-only value1 Flash not in sleep mode #0 value2 Flash is in sleep or shut down mode #1 SQER Command Sequence Error 10 read-only value1 No sequence error #0 value2 Command state machine operation unsuccessful because of improper address or command sequence. #1 VER Verify Error 31 read-only value1 The page is correctly programmed or the sector correctly erased. All programmed or erased bits have full expected quality. #0 value2 A program verify error or an erase verify error has been detected. Full quality (retention time) of all programmed ("1") or erased ("0") bits cannot be guaranteed. #1 WPRODIS0 Sector Write Protection Disabled for User 0 25 read-only value1 All protected sectors of user 0 are locked if write protection is installed #0 value2 All write-protected sectors of user 0 are temporarily unlocked, if not coincidently locked by user 2 or via read protection. #1 WPRODIS1 Sector Write Protection Disabled for User 1 26 read-only value1 All protected sectors of user 1 are locked if write protection is installed #0 value2 All write-protected sectors of user 1 are temporarily unlocked, if not coincidently locked by user 0 or user 2 or via read protection. #1 WPROIN0 Sector Write Protection Installed for User 0 21 read-only value1 No write protection installed for user 0 #0 value2 Sector write protection for user 0 is configured and correctly confirmed in the User Configuration Block 0. #1 WPROIN1 Sector Write Protection Installed for User 1 22 read-only value1 No write protection installed for user 1 #0 value2 Sector write protection for user 1 is configured and correctly confirmed in the User Configuration Block 1. #1 WPROIN2 Sector OTP Protection Installed for User 2 23 read-only value1 No OTP write protection installed for user 2 #0 value2 Sector OTP write protection with ROM functionality is configured and correctly confirmed in the UCB2. The protection is locked for ever. #1 ID Flash Module Identification Register 0x1008 32 read-write n 0x0 0x0 MOD_NUMBER Module Number Value 16 15 read-only MOD_REV Module Revision Number 0 7 read-only MOD_TYPE Module Type 8 7 read-only MARP Margin Control Register PFLASH 0x1018 32 read-write n 0x0 0x0 MARGIN PFLASH Margin Selection 0 3 read-write value1 Standard (default) margin. #0000 value2 Tight margin for 0 (low) level. Suboptimal 0-bits are read as 1s. #0001 value3 Tight margin for 1 (high) level. Suboptimal 1-bits are read as 0s. #0100 TRAPDIS PFLASH Double-Bit Error Trap Disable 15 read-write value1 If a double-bit error occurs in PFLASH, a bus error trap is generated. #0 value2 The double-bit error trap is disabled. Shall be used only during margin check #1 PROCON0 Flash Protection Configuration Register User 0 0x1020 32 read-write n 0x0 0x0 RPRO Read Protection Configuration 15 read-only value1 No read protection configured #0 value2 Read protection and global write protection is configured by user 0 (master user) #1 S0L Sector 0 Locked for Write Protection by User 0 0 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S1L Sector 1 Locked for Write Protection by User 0 1 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S2L Sector 2 Locked for Write Protection by User 0 2 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S3L Sector 3 Locked for Write Protection by User 0 3 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S4L Sector 4 Locked for Write Protection by User 0 4 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S5L Sector 5 Locked for Write Protection by User 0 5 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S6L Sector 6 Locked for Write Protection by User 0 6 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S7L Sector 7 Locked for Write Protection by User 0 7 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S8L Sector 8 Locked for Write Protection by User 0 8 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 PROCON1 Flash Protection Configuration Register User 1 0x1024 32 read-write n 0x0 0x0 S0L Sector 0 Locked for Write Protection by User 1 0 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S1L Sector 1 Locked for Write Protection by User 1 1 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S2L Sector 2 Locked for Write Protection by User 1 2 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S3L Sector 3 Locked for Write Protection by User 1 3 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S4L Sector 4 Locked for Write Protection by User 1 4 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S5L Sector 5 Locked for Write Protection by User 1 5 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S6L Sector 6 Locked for Write Protection by User 1 6 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S7L Sector 7 Locked for Write Protection by User 1 7 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 S8L Sector 8 Locked for Write Protection by User 1 8 read-only value1 No write protection is configured for sector n. #0 value2 Write protection is configured for sector n. #1 PROCON2 Flash Protection Configuration Register User 2 0x1028 32 read-write n 0x0 0x0 S0ROM Sector 0 Locked Forever by User 2 0 read-only value1 No ROM functionality configured for sector n. #0 value2 ROM functionality is configured for sector n. Re-programming of this sector is no longer possible. #1 S1ROM Sector 1 Locked Forever by User 2 1 read-only value1 No ROM functionality configured for sector n. #0 value2 ROM functionality is configured for sector n. Re-programming of this sector is no longer possible. #1 S2ROM Sector 2 Locked Forever by User 2 2 read-only value1 No ROM functionality configured for sector n. #0 value2 ROM functionality is configured for sector n. Re-programming of this sector is no longer possible. #1 S3ROM Sector 3 Locked Forever by User 2 3 read-only value1 No ROM functionality configured for sector n. #0 value2 ROM functionality is configured for sector n. Re-programming of this sector is no longer possible. #1 S4ROM Sector 4 Locked Forever by User 2 4 read-only value1 No ROM functionality configured for sector n. #0 value2 ROM functionality is configured for sector n. Re-programming of this sector is no longer possible. #1 S5ROM Sector 5 Locked Forever by User 2 5 read-only value1 No ROM functionality configured for sector n. #0 value2 ROM functionality is configured for sector n. Re-programming of this sector is no longer possible. #1 S6ROM Sector 6 Locked Forever by User 2 6 read-only value1 No ROM functionality configured for sector n. #0 value2 ROM functionality is configured for sector n. Re-programming of this sector is no longer possible. #1 S7ROM Sector 7 Locked Forever by User 2 7 read-only value1 No ROM functionality configured for sector n. #0 value2 ROM functionality is configured for sector n. Re-programming of this sector is no longer possible. #1 S8ROM Sector 8 Locked Forever by User 2 8 read-only value1 No ROM functionality configured for sector n. #0 value2 ROM functionality is configured for sector n. Re-programming of this sector is no longer possible. #1 GPDMA0 General Purpose DMA Unit 0 GPDMA 0x0 0x0 0x3D40 registers n GPDMA0_0 General Purpose DMA Unit 0 105 CHENREG GPDMA Channel Enable Register 0xE0 32 read-write n 0x0 0x0 CH Enables/Disables the channel 0 7 read-write value1 Disable the Channel #0 value2 Enable the Channel #1 WE_CH Channel enable write enable 8 7 write-only CLEARBLOCK IntBlock Status 0x80 32 read-write n 0x0 0x0 CH0 Clear Interrupt Status and Raw Status for channel 0 0 write-only value1 no effect #0 value2 clear status #1 CH1 Clear Interrupt Status and Raw Status for channel 1 1 write-only value1 no effect #0 value2 clear status #1 CH2 Clear Interrupt Status and Raw Status for channel 2 2 write-only value1 no effect #0 value2 clear status #1 CH3 Clear Interrupt Status and Raw Status for channel 3 3 write-only value1 no effect #0 value2 clear status #1 CH4 Clear Interrupt Status and Raw Status for channel 4 4 write-only value1 no effect #0 value2 clear status #1 CH5 Clear Interrupt Status and Raw Status for channel 5 5 write-only value1 no effect #0 value2 clear status #1 CH6 Clear Interrupt Status and Raw Status for channel 6 6 write-only value1 no effect #0 value2 clear status #1 CH7 Clear Interrupt Status and Raw Status for channel 7 7 write-only value1 no effect #0 value2 clear status #1 CLEARDSTTRAN IntBlock Status 0x90 32 read-write n 0x0 0x0 CH0 Clear Interrupt Status and Raw Status for channel 0 0 write-only value1 no effect #0 value2 clear status #1 CH1 Clear Interrupt Status and Raw Status for channel 1 1 write-only value1 no effect #0 value2 clear status #1 CH2 Clear Interrupt Status and Raw Status for channel 2 2 write-only value1 no effect #0 value2 clear status #1 CH3 Clear Interrupt Status and Raw Status for channel 3 3 write-only value1 no effect #0 value2 clear status #1 CH4 Clear Interrupt Status and Raw Status for channel 4 4 write-only value1 no effect #0 value2 clear status #1 CH5 Clear Interrupt Status and Raw Status for channel 5 5 write-only value1 no effect #0 value2 clear status #1 CH6 Clear Interrupt Status and Raw Status for channel 6 6 write-only value1 no effect #0 value2 clear status #1 CH7 Clear Interrupt Status and Raw Status for channel 7 7 write-only value1 no effect #0 value2 clear status #1 CLEARERR IntErr Status 0x98 32 read-write n 0x0 0x0 CH0 Clear Interrupt Status and Raw Status for channel 0 0 write-only value1 no effect #0 value2 clear status #1 CH1 Clear Interrupt Status and Raw Status for channel 1 1 write-only value1 no effect #0 value2 clear status #1 CH2 Clear Interrupt Status and Raw Status for channel 2 2 write-only value1 no effect #0 value2 clear status #1 CH3 Clear Interrupt Status and Raw Status for channel 3 3 write-only value1 no effect #0 value2 clear status #1 CH4 Clear Interrupt Status and Raw Status for channel 4 4 write-only value1 no effect #0 value2 clear status #1 CH5 Clear Interrupt Status and Raw Status for channel 5 5 write-only value1 no effect #0 value2 clear status #1 CH6 Clear Interrupt Status and Raw Status for channel 6 6 write-only value1 no effect #0 value2 clear status #1 CH7 Clear Interrupt Status and Raw Status for channel 7 7 write-only value1 no effect #0 value2 clear status #1 CLEARSRCTRAN IntSrcTran Status 0x88 32 read-write n 0x0 0x0 CH0 Clear Interrupt Status and Raw Status for channel 0 0 write-only value1 no effect #0 value2 clear status #1 CH1 Clear Interrupt Status and Raw Status for channel 1 1 write-only value1 no effect #0 value2 clear status #1 CH2 Clear Interrupt Status and Raw Status for channel 2 2 write-only value1 no effect #0 value2 clear status #1 CH3 Clear Interrupt Status and Raw Status for channel 3 3 write-only value1 no effect #0 value2 clear status #1 CH4 Clear Interrupt Status and Raw Status for channel 4 4 write-only value1 no effect #0 value2 clear status #1 CH5 Clear Interrupt Status and Raw Status for channel 5 5 write-only value1 no effect #0 value2 clear status #1 CH6 Clear Interrupt Status and Raw Status for channel 6 6 write-only value1 no effect #0 value2 clear status #1 CH7 Clear Interrupt Status and Raw Status for channel 7 7 write-only value1 no effect #0 value2 clear status #1 CLEARTFR IntTfr Status 0x78 32 read-write n 0x0 0x0 CH0 Clear Interrupt Status and Raw Status for channel 0 0 write-only value1 no effect #0 value2 clear status #1 CH1 Clear Interrupt Status and Raw Status for channel 1 1 write-only value1 no effect #0 value2 clear status #1 CH2 Clear Interrupt Status and Raw Status for channel 2 2 write-only value1 no effect #0 value2 clear status #1 CH3 Clear Interrupt Status and Raw Status for channel 3 3 write-only value1 no effect #0 value2 clear status #1 CH4 Clear Interrupt Status and Raw Status for channel 4 4 write-only value1 no effect #0 value2 clear status #1 CH5 Clear Interrupt Status and Raw Status for channel 5 5 write-only value1 no effect #0 value2 clear status #1 CH6 Clear Interrupt Status and Raw Status for channel 6 6 write-only value1 no effect #0 value2 clear status #1 CH7 Clear Interrupt Status and Raw Status for channel 7 7 write-only value1 no effect #0 value2 clear status #1 DMACFGREG GPDMA Configuration Register 0xD8 32 read-write n 0x0 0x0 DMA_EN GPDMA Enable bit. 0 read-write value1 GPDMA Disabled #0 value2 GPDMA Enabled. #1 ID GPDMA0 ID Register 0xE8 32 read-write n 0x0 0x0 VALUE Hardcoded GPDMA Peripheral ID 0 31 read-only LSTDSTREG Last Destination Transaction Request Register 0xD0 32 read-write n 0x0 0x0 CH0 Destination last request for channel 0 0 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH1 Destination last request for channel 1 1 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH2 Destination last request for channel 2 2 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH3 Destination last request for channel 3 3 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH4 Destination last request for channel 4 4 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH5 Destination last request for channel 5 5 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH6 Destination last request for channel 6 6 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH7 Destination last request for channel 7 7 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 WE_CH0 Destination last transaction request write enable for channel 0 8 write-only value1 write disabled #0 value2 write enabled #1 WE_CH1 Destination last transaction request write enable for channel 1 9 write-only value1 write disabled #0 value2 write enabled #1 WE_CH2 Destination last transaction request write enable for channel 2 10 write-only value1 write disabled #0 value2 write enabled #1 WE_CH3 Destination last transaction request write enable for channel 3 11 write-only value1 write disabled #0 value2 write enabled #1 WE_CH4 Destination last transaction request write enable for channel 4 12 write-only value1 write disabled #0 value2 write enabled #1 WE_CH5 Destination last transaction request write enable for channel 5 13 write-only value1 write disabled #0 value2 write enabled #1 WE_CH6 Destination last transaction request write enable for channel 6 14 write-only value1 write disabled #0 value2 write enabled #1 WE_CH7 Destination last transaction request write enable for channel 7 15 write-only value1 write disabled #0 value2 write enabled #1 LSTSRCREG Last Source Transaction Request Register 0xC8 32 read-write n 0x0 0x0 CH0 Source last request for channel 0 0 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH1 Source last request for channel 1 1 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH2 Source last request for channel 2 2 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH3 Source last request for channel 3 3 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH4 Source last request for channel 4 4 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH5 Source last request for channel 5 5 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH6 Source last request for channel 6 6 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 CH7 Source last request for channel 7 7 read-write value1 Not last transaction in current block #0 value2 Last transaction in current block #1 WE_CH0 Source last transaction request write enable for channel 0 8 write-only value1 write disabled #0 value2 write enabled #1 WE_CH1 Source last transaction request write enable for channel 1 9 write-only value1 write disabled #0 value2 write enabled #1 WE_CH2 Source last transaction request write enable for channel 2 10 write-only value1 write disabled #0 value2 write enabled #1 WE_CH3 Source last transaction request write enable for channel 3 11 write-only value1 write disabled #0 value2 write enabled #1 WE_CH4 Source last transaction request write enable for channel 4 12 write-only value1 write disabled #0 value2 write enabled #1 WE_CH5 Source last transaction request write enable for channel 5 13 write-only value1 write disabled #0 value2 write enabled #1 WE_CH6 Source last transaction request write enable for channel 6 14 write-only value1 write disabled #0 value2 write enabled #1 WE_CH7 Source last transaction request write enable for channel 7 15 write-only value1 write disabled #0 value2 write enabled #1 MASKBLOCK Mask for Raw IntBlock Status 0x58 32 read-write n 0x0 0x0 CH0 Mask bit for channel 0 0 read-write value1 masked #0 value2 unmasked #1 CH1 Mask bit for channel 1 1 read-write value1 masked #0 value2 unmasked #1 CH2 Mask bit for channel 2 2 read-write value1 masked #0 value2 unmasked #1 CH3 Mask bit for channel 3 3 read-write value1 masked #0 value2 unmasked #1 CH4 Mask bit for channel 4 4 read-write value1 masked #0 value2 unmasked #1 CH5 Mask bit for channel 5 5 read-write value1 masked #0 value2 unmasked #1 CH6 Mask bit for channel 6 6 read-write value1 masked #0 value2 unmasked #1 CH7 Mask bit for channel 7 7 read-write value1 masked #0 value2 unmasked #1 WE_CH0 Write enable for mask bit of channel 0 8 write-only value1 write disabled #0 value2 write enabled #1 WE_CH1 Write enable for mask bit of channel 1 9 write-only value1 write disabled #0 value2 write enabled #1 WE_CH2 Write enable for mask bit of channel 2 10 write-only value1 write disabled #0 value2 write enabled #1 WE_CH3 Write enable for mask bit of channel 3 11 write-only value1 write disabled #0 value2 write enabled #1 WE_CH4 Write enable for mask bit of channel 4 12 write-only value1 write disabled #0 value2 write enabled #1 WE_CH5 Write enable for mask bit of channel 5 13 write-only value1 write disabled #0 value2 write enabled #1 WE_CH6 Write enable for mask bit of channel 6 14 write-only value1 write disabled #0 value2 write enabled #1 WE_CH7 Write enable for mask bit of channel 7 15 write-only value1 write disabled #0 value2 write enabled #1 MASKDSTTRAN Mask for Raw IntBlock Status 0x68 32 read-write n 0x0 0x0 CH0 Mask bit for channel 0 0 read-write value1 masked #0 value2 unmasked #1 CH1 Mask bit for channel 1 1 read-write value1 masked #0 value2 unmasked #1 CH2 Mask bit for channel 2 2 read-write value1 masked #0 value2 unmasked #1 CH3 Mask bit for channel 3 3 read-write value1 masked #0 value2 unmasked #1 CH4 Mask bit for channel 4 4 read-write value1 masked #0 value2 unmasked #1 CH5 Mask bit for channel 5 5 read-write value1 masked #0 value2 unmasked #1 CH6 Mask bit for channel 6 6 read-write value1 masked #0 value2 unmasked #1 CH7 Mask bit for channel 7 7 read-write value1 masked #0 value2 unmasked #1 WE_CH0 Write enable for mask bit of channel 0 8 write-only value1 write disabled #0 value2 write enabled #1 WE_CH1 Write enable for mask bit of channel 1 9 write-only value1 write disabled #0 value2 write enabled #1 WE_CH2 Write enable for mask bit of channel 2 10 write-only value1 write disabled #0 value2 write enabled #1 WE_CH3 Write enable for mask bit of channel 3 11 write-only value1 write disabled #0 value2 write enabled #1 WE_CH4 Write enable for mask bit of channel 4 12 write-only value1 write disabled #0 value2 write enabled #1 WE_CH5 Write enable for mask bit of channel 5 13 write-only value1 write disabled #0 value2 write enabled #1 WE_CH6 Write enable for mask bit of channel 6 14 write-only value1 write disabled #0 value2 write enabled #1 WE_CH7 Write enable for mask bit of channel 7 15 write-only value1 write disabled #0 value2 write enabled #1 MASKERR Mask for Raw IntErr Status 0x70 32 read-write n 0x0 0x0 CH0 Mask bit for channel 0 0 read-write value1 masked #0 value2 unmasked #1 CH1 Mask bit for channel 1 1 read-write value1 masked #0 value2 unmasked #1 CH2 Mask bit for channel 2 2 read-write value1 masked #0 value2 unmasked #1 CH3 Mask bit for channel 3 3 read-write value1 masked #0 value2 unmasked #1 CH4 Mask bit for channel 4 4 read-write value1 masked #0 value2 unmasked #1 CH5 Mask bit for channel 5 5 read-write value1 masked #0 value2 unmasked #1 CH6 Mask bit for channel 6 6 read-write value1 masked #0 value2 unmasked #1 CH7 Mask bit for channel 7 7 read-write value1 masked #0 value2 unmasked #1 WE_CH0 Write enable for mask bit of channel 0 8 write-only value1 write disabled #0 value2 write enabled #1 WE_CH1 Write enable for mask bit of channel 1 9 write-only value1 write disabled #0 value2 write enabled #1 WE_CH2 Write enable for mask bit of channel 2 10 write-only value1 write disabled #0 value2 write enabled #1 WE_CH3 Write enable for mask bit of channel 3 11 write-only value1 write disabled #0 value2 write enabled #1 WE_CH4 Write enable for mask bit of channel 4 12 write-only value1 write disabled #0 value2 write enabled #1 WE_CH5 Write enable for mask bit of channel 5 13 write-only value1 write disabled #0 value2 write enabled #1 WE_CH6 Write enable for mask bit of channel 6 14 write-only value1 write disabled #0 value2 write enabled #1 WE_CH7 Write enable for mask bit of channel 7 15 write-only value1 write disabled #0 value2 write enabled #1 MASKSRCTRAN Mask for Raw IntSrcTran Status 0x60 32 read-write n 0x0 0x0 CH0 Mask bit for channel 0 0 read-write value1 masked #0 value2 unmasked #1 CH1 Mask bit for channel 1 1 read-write value1 masked #0 value2 unmasked #1 CH2 Mask bit for channel 2 2 read-write value1 masked #0 value2 unmasked #1 CH3 Mask bit for channel 3 3 read-write value1 masked #0 value2 unmasked #1 CH4 Mask bit for channel 4 4 read-write value1 masked #0 value2 unmasked #1 CH5 Mask bit for channel 5 5 read-write value1 masked #0 value2 unmasked #1 CH6 Mask bit for channel 6 6 read-write value1 masked #0 value2 unmasked #1 CH7 Mask bit for channel 7 7 read-write value1 masked #0 value2 unmasked #1 WE_CH0 Write enable for mask bit of channel 0 8 write-only value1 write disabled #0 value2 write enabled #1 WE_CH1 Write enable for mask bit of channel 1 9 write-only value1 write disabled #0 value2 write enabled #1 WE_CH2 Write enable for mask bit of channel 2 10 write-only value1 write disabled #0 value2 write enabled #1 WE_CH3 Write enable for mask bit of channel 3 11 write-only value1 write disabled #0 value2 write enabled #1 WE_CH4 Write enable for mask bit of channel 4 12 write-only value1 write disabled #0 value2 write enabled #1 WE_CH5 Write enable for mask bit of channel 5 13 write-only value1 write disabled #0 value2 write enabled #1 WE_CH6 Write enable for mask bit of channel 6 14 write-only value1 write disabled #0 value2 write enabled #1 WE_CH7 Write enable for mask bit of channel 7 15 write-only value1 write disabled #0 value2 write enabled #1 MASKTFR Mask for Raw IntTfr Status 0x50 32 read-write n 0x0 0x0 CH0 Mask bit for channel 0 0 read-write value1 masked #0 value2 unmasked #1 CH1 Mask bit for channel 1 1 read-write value1 masked #0 value2 unmasked #1 CH2 Mask bit for channel 2 2 read-write value1 masked #0 value2 unmasked #1 CH3 Mask bit for channel 3 3 read-write value1 masked #0 value2 unmasked #1 CH4 Mask bit for channel 4 4 read-write value1 masked #0 value2 unmasked #1 CH5 Mask bit for channel 5 5 read-write value1 masked #0 value2 unmasked #1 CH6 Mask bit for channel 6 6 read-write value1 masked #0 value2 unmasked #1 CH7 Mask bit for channel 7 7 read-write value1 masked #0 value2 unmasked #1 WE_CH0 Write enable for mask bit of channel 0 8 write-only value1 write disabled #0 value2 write enabled #1 WE_CH1 Write enable for mask bit of channel 1 9 write-only value1 write disabled #0 value2 write enabled #1 WE_CH2 Write enable for mask bit of channel 2 10 write-only value1 write disabled #0 value2 write enabled #1 WE_CH3 Write enable for mask bit of channel 3 11 write-only value1 write disabled #0 value2 write enabled #1 WE_CH4 Write enable for mask bit of channel 4 12 write-only value1 write disabled #0 value2 write enabled #1 WE_CH5 Write enable for mask bit of channel 5 13 write-only value1 write disabled #0 value2 write enabled #1 WE_CH6 Write enable for mask bit of channel 6 14 write-only value1 write disabled #0 value2 write enabled #1 WE_CH7 Write enable for mask bit of channel 7 15 write-only value1 write disabled #0 value2 write enabled #1 RAWBLOCK Raw IntBlock Status 0x8 32 read-write n 0x0 0x0 CH0 Raw Interrupt Status for channel 0 0 read-write CH1 Raw Interrupt Status for channel 1 1 read-write CH2 Raw Interrupt Status for channel 2 2 read-write CH3 Raw Interrupt Status for channel 3 3 read-write CH4 Raw Interrupt Status for channel 4 4 read-write CH5 Raw Interrupt Status for channel 5 5 read-write CH6 Raw Interrupt Status for channel 6 6 read-write CH7 Raw Interrupt Status for channel 7 7 read-write RAWDSTTRAN Raw IntBlock Status 0x18 32 read-write n 0x0 0x0 CH0 Raw Interrupt Status for channel 0 0 read-write CH1 Raw Interrupt Status for channel 1 1 read-write CH2 Raw Interrupt Status for channel 2 2 read-write CH3 Raw Interrupt Status for channel 3 3 read-write CH4 Raw Interrupt Status for channel 4 4 read-write CH5 Raw Interrupt Status for channel 5 5 read-write CH6 Raw Interrupt Status for channel 6 6 read-write CH7 Raw Interrupt Status for channel 7 7 read-write RAWERR Raw IntErr Status 0x20 32 read-write n 0x0 0x0 CH0 Raw Interrupt Status for channel 0 0 read-write CH1 Raw Interrupt Status for channel 1 1 read-write CH2 Raw Interrupt Status for channel 2 2 read-write CH3 Raw Interrupt Status for channel 3 3 read-write CH4 Raw Interrupt Status for channel 4 4 read-write CH5 Raw Interrupt Status for channel 5 5 read-write CH6 Raw Interrupt Status for channel 6 6 read-write CH7 Raw Interrupt Status for channel 7 7 read-write RAWSRCTRAN Raw IntSrcTran Status 0x10 32 read-write n 0x0 0x0 CH0 Raw Interrupt Status for channel 0 0 read-write CH1 Raw Interrupt Status for channel 1 1 read-write CH2 Raw Interrupt Status for channel 2 2 read-write CH3 Raw Interrupt Status for channel 3 3 read-write CH4 Raw Interrupt Status for channel 4 4 read-write CH5 Raw Interrupt Status for channel 5 5 read-write CH6 Raw Interrupt Status for channel 6 6 read-write CH7 Raw Interrupt Status for channel 7 7 read-write RAWTFR Raw IntTfr Status 0x0 32 read-write n 0x0 0x0 CH0 Raw Interrupt Status for channel 0 0 read-write CH1 Raw Interrupt Status for channel 1 1 read-write CH2 Raw Interrupt Status for channel 2 2 read-write CH3 Raw Interrupt Status for channel 3 3 read-write CH4 Raw Interrupt Status for channel 4 4 read-write CH5 Raw Interrupt Status for channel 5 5 read-write CH6 Raw Interrupt Status for channel 6 6 read-write CH7 Raw Interrupt Status for channel 7 7 read-write REQDSTREG Destination Software Transaction Request Register 0xB0 32 read-write n 0x0 0x0 CH0 Source request for channel 0 0 read-write CH1 Source request for channel 1 1 read-write CH2 Source request for channel 2 2 read-write CH3 Source request for channel 3 3 read-write CH4 Source request for channel 4 4 read-write CH5 Source request for channel 5 5 read-write CH6 Source request for channel 6 6 read-write CH7 Source request for channel 7 7 read-write WE_CH0 Source request write enable for channel 0 8 write-only value1 write disabled #0 value2 write enabled #1 WE_CH1 Source request write enable for channel 1 9 write-only value1 write disabled #0 value2 write enabled #1 WE_CH2 Source request write enable for channel 2 10 write-only value1 write disabled #0 value2 write enabled #1 WE_CH3 Source request write enable for channel 3 11 write-only value1 write disabled #0 value2 write enabled #1 WE_CH4 Source request write enable for channel 4 12 write-only value1 write disabled #0 value2 write enabled #1 WE_CH5 Source request write enable for channel 5 13 write-only value1 write disabled #0 value2 write enabled #1 WE_CH6 Source request write enable for channel 6 14 write-only value1 write disabled #0 value2 write enabled #1 WE_CH7 Source request write enable for channel 7 15 write-only value1 write disabled #0 value2 write enabled #1 REQSRCREG Source Software Transaction Request Register 0xA8 32 read-write n 0x0 0x0 CH0 Source request for channel 0 0 read-write CH1 Source request for channel 1 1 read-write CH2 Source request for channel 2 2 read-write CH3 Source request for channel 3 3 read-write CH4 Source request for channel 4 4 read-write CH5 Source request for channel 5 5 read-write CH6 Source request for channel 6 6 read-write CH7 Source request for channel 7 7 read-write WE_CH0 Source request write enable for channel 0 8 write-only value1 write disabled #0 value2 write enabled #1 WE_CH1 Source request write enable for channel 1 9 write-only value1 write disabled #0 value2 write enabled #1 WE_CH2 Source request write enable for channel 2 10 write-only value1 write disabled #0 value2 write enabled #1 WE_CH3 Source request write enable for channel 3 11 write-only value1 write disabled #0 value2 write enabled #1 WE_CH4 Source request write enable for channel 4 12 write-only value1 write disabled #0 value2 write enabled #1 WE_CH5 Source request write enable for channel 5 13 write-only value1 write disabled #0 value2 write enabled #1 WE_CH6 Source request write enable for channel 6 14 write-only value1 write disabled #0 value2 write enabled #1 WE_CH7 Source request write enable for channel 7 15 write-only value1 write disabled #0 value2 write enabled #1 SGLREQDSTREG Single Destination Transaction Request Register 0xC0 32 read-write n 0x0 0x0 CH0 Source request for channel 0 0 read-write CH1 Source request for channel 1 1 read-write CH2 Source request for channel 2 2 read-write CH3 Source request for channel 3 3 read-write CH4 Source request for channel 4 4 read-write CH5 Source request for channel 5 5 read-write CH6 Source request for channel 6 6 read-write CH7 Source request for channel 7 7 read-write WE_CH0 Source request write enable for channel 0 8 write-only value1 write disabled #0 value2 write enabled #1 WE_CH1 Source request write enable for channel 1 9 write-only value1 write disabled #0 value2 write enabled #1 WE_CH2 Source request write enable for channel 2 10 write-only value1 write disabled #0 value2 write enabled #1 WE_CH3 Source request write enable for channel 3 11 write-only value1 write disabled #0 value2 write enabled #1 WE_CH4 Source request write enable for channel 4 12 write-only value1 write disabled #0 value2 write enabled #1 WE_CH5 Source request write enable for channel 5 13 write-only value1 write disabled #0 value2 write enabled #1 WE_CH6 Source request write enable for channel 6 14 write-only value1 write disabled #0 value2 write enabled #1 WE_CH7 Source request write enable for channel 7 15 write-only value1 write disabled #0 value2 write enabled #1 SGLREQSRCREG Single Source Transaction Request Register 0xB8 32 read-write n 0x0 0x0 CH0 Source request for channel 0 0 read-write CH1 Source request for channel 1 1 read-write CH2 Source request for channel 2 2 read-write CH3 Source request for channel 3 3 read-write CH4 Source request for channel 4 4 read-write CH5 Source request for channel 5 5 read-write CH6 Source request for channel 6 6 read-write CH7 Source request for channel 7 7 read-write WE_CH0 Source request write enable for channel 0 8 write-only value1 write disabled #0 value2 write enabled #1 WE_CH1 Source request write enable for channel 1 9 write-only value1 write disabled #0 value2 write enabled #1 WE_CH2 Source request write enable for channel 2 10 write-only value1 write disabled #0 value2 write enabled #1 WE_CH3 Source request write enable for channel 3 11 write-only value1 write disabled #0 value2 write enabled #1 WE_CH4 Source request write enable for channel 4 12 write-only value1 write disabled #0 value2 write enabled #1 WE_CH5 Source request write enable for channel 5 13 write-only value1 write disabled #0 value2 write enabled #1 WE_CH6 Source request write enable for channel 6 14 write-only value1 write disabled #0 value2 write enabled #1 WE_CH7 Source request write enable for channel 7 15 write-only value1 write disabled #0 value2 write enabled #1 STATUSBLOCK IntBlock Status 0x30 32 read-write n 0x0 0x0 CH0 Interrupt Status for channel 0 0 read-only CH1 Interrupt Status for channel 1 1 read-only CH2 Interrupt Status for channel 2 2 read-only CH3 Interrupt Status for channel 3 3 read-only CH4 Interrupt Status for channel 4 4 read-only CH5 Interrupt Status for channel 5 5 read-only CH6 Interrupt Status for channel 6 6 read-only CH7 Interrupt Status for channel 7 7 read-only STATUSDSTTRAN IntBlock Status 0x40 32 read-write n 0x0 0x0 CH0 Interrupt Status for channel 0 0 read-only CH1 Interrupt Status for channel 1 1 read-only CH2 Interrupt Status for channel 2 2 read-only CH3 Interrupt Status for channel 3 3 read-only CH4 Interrupt Status for channel 4 4 read-only CH5 Interrupt Status for channel 5 5 read-only CH6 Interrupt Status for channel 6 6 read-only CH7 Interrupt Status for channel 7 7 read-only STATUSERR IntErr Status 0x48 32 read-write n 0x0 0x0 CH0 Interrupt Status for channel 0 0 read-only CH1 Interrupt Status for channel 1 1 read-only CH2 Interrupt Status for channel 2 2 read-only CH3 Interrupt Status for channel 3 3 read-only CH4 Interrupt Status for channel 4 4 read-only CH5 Interrupt Status for channel 5 5 read-only CH6 Interrupt Status for channel 6 6 read-only CH7 Interrupt Status for channel 7 7 read-only STATUSINT Combined Interrupt Status Register 0xA0 32 read-write n 0x0 0x0 BLOCK OR of the contents of STATUSBLOCK register 1 read-only DSTT OR of the contents of STATUSDSTTRAN register 3 read-only ERR OR of the contents of STATUSERR register 4 read-only SRCT OR of the contents of STATUSSRCTRAN register 2 read-only TFR OR of the contents of STATUSTFR register 0 read-only STATUSSRCTRAN IntSrcTran Status 0x38 32 read-write n 0x0 0x0 CH0 Interrupt Status for channel 0 0 read-only CH1 Interrupt Status for channel 1 1 read-only CH2 Interrupt Status for channel 2 2 read-only CH3 Interrupt Status for channel 3 3 read-only CH4 Interrupt Status for channel 4 4 read-only CH5 Interrupt Status for channel 5 5 read-only CH6 Interrupt Status for channel 6 6 read-only CH7 Interrupt Status for channel 7 7 read-only STATUSTFR IntTfr Status 0x28 32 read-write n 0x0 0x0 CH0 Interrupt Status for channel 0 0 read-only CH1 Interrupt Status for channel 1 1 read-only CH2 Interrupt Status for channel 2 2 read-only CH3 Interrupt Status for channel 3 3 read-only CH4 Interrupt Status for channel 4 4 read-only CH5 Interrupt Status for channel 5 5 read-only CH6 Interrupt Status for channel 6 6 read-only CH7 Interrupt Status for channel 7 7 read-only TYPE GPDMA Component Type 0x138 32 read-write n 0x0 0x0 VALUE Component Type 0 31 read-only VERSION DMA Component Version 0x13C 32 read-write n 0x0 0x0 VALUE Version number of the component 0 31 read-only GPDMA0_CH0 General Purpose DMA Unit 0 GPDMA 0x0 0x0 0x55 registers n CFGH Configuration Register High 0x44 32 read-write n 0x0 0x0 DEST_PER Destination Peripheral 11 3 read-write DS_UPD_EN Destination Status Update Enable 5 read-write FCMODE Flow Control Mode 0 read-write value1 Source transaction requests are serviced when they occur. Data pre-fetching is enabled. #0 value2 Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled. #1 FIFO_MODE FIFO Mode Select 1 read-write value1 Space/data available for single AHB transfer of the specified transfer width. #0 value2 Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer. #1 PROTCTL Protection Control 2 2 read-write SRC_PER Source Peripheral 7 3 read-write SS_UPD_EN Source Status Update Enable 6 read-write CFGL Configuration Register Low 0x40 32 read-write n 0x0 0x0 CH_PRIOR Channel priority 5 2 read-write CH_SUSP Channel Suspend 8 read-write value1 Not suspended. #0 value2 Suspend DMA transfer from the source. #1 DST_HS_POL Destination Handshaking Interface Polarity 18 read-write value1 Active high #0 value2 Active low #1 FIFO_EMPTY Indicates if there is data left in the channel FIFO 9 read-only value2 Channel FIFO not empty #0 value1 Channel FIFO empty #1 HS_SEL_DST Destination Software or Hardware Handshaking Select 10 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware- initiated transaction requests are ignored. #1 HS_SEL_SRC Source Software or Hardware Handshaking Select 11 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware-initiated transaction requests are ignored. #1 LOCK_B Bus Lock Bit 17 read-write LOCK_B_L Bus Lock Level 14 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 LOCK_CH Channel Lock Bit 16 read-write LOCK_CH_L Channel Lock Level 12 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 MAX_ABRST Maximum AMBA Burst Length 20 9 read-write RELOAD_DST Automatic Destination Reload 31 read-write RELOAD_SRC Automatic Source Reload 30 read-write SRC_HS_POL Source Handshaking Interface Polarity 19 read-write value1 Active high #0 value2 Active low #1 CTLH Control Register High 0x1C 32 read-write n 0x0 0x0 BLOCK_TS Block Transfer Size 0 11 read-write DONE Done bit 12 read-write CTLL Control Register Low 0x18 32 read-write n 0x0 0x0 DEST_MSIZE Destination Burst Transaction Length 11 2 read-write DINC Destination Address Increment 7 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 DST_SCATTER_EN Destination scatter enable 18 read-write value1 Scatter disabled #0 value2 Scatter enabled #1 DST_TR_WIDTH Destination Transfer Width 1 2 read-write INT_EN Interrupt Enable Bit 0 read-write LLP_DST_EN Linked List Pointer for Destination Enable 27 read-write LLP_SRC_EN Linked List Pointer for Source Enable 28 read-write SINC Source Address Increment 9 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 SRC_GATHER_EN Source gather enable 17 read-write value1 Gather disabled #0 value2 Gather enabled #1 SRC_MSIZE Source Burst Transaction Length 14 2 read-write SRC_TR_WIDTH Source Transfer Width 4 2 read-write TT_FC Transfer Type and Flow Control 20 2 read-write DAR Destination Address Register 0x8 32 read-write n 0x0 0x0 DAR Current Destination address of DMA transfer 0 31 read-write DSR Destination Scatter Register 0x50 32 read-write n 0x0 0x0 DSC Destination scatter count 20 11 read-write DSI Destination scatter interval 0 19 read-write DSTAT Destination Status Register 0x28 32 read-write n 0x0 0x0 DSTAT Destination Status 0 31 read-write DSTATAR Destination Status Address Register 0x38 32 read-write n 0x0 0x0 DSTATAR Destination Status Address 0 31 read-write LLP Linked List Pointer Register 0x10 32 read-write n 0x0 0x0 LOC Starting Address In Memory 2 29 read-write SAR Source Address Register 0x0 32 read-write n 0x0 0x0 SAR Current Source Address of DMA transfer 0 31 read-write SGR Source Gather Register 0x48 32 read-write n 0x0 0x0 SGC Source gather count 20 11 read-write SGI Source gather interval 0 19 read-write SSTAT Source Status Register 0x20 32 read-write n 0x0 0x0 SSTAT Source Status 0 31 read-write SSTATAR Source Status Address Register 0x30 32 read-write n 0x0 0x0 SSTATAR Source Status Address 0 31 read-write GPDMA0_CH1 General Purpose DMA Unit 0 GPDMA 0x0 0x0 0x55 registers n CFGH Configuration Register High 0x44 32 read-write n 0x0 0x0 DEST_PER Destination Peripheral 11 3 read-write DS_UPD_EN Destination Status Update Enable 5 read-write FCMODE Flow Control Mode 0 read-write value1 Source transaction requests are serviced when they occur. Data pre-fetching is enabled. #0 value2 Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled. #1 FIFO_MODE FIFO Mode Select 1 read-write value1 Space/data available for single AHB transfer of the specified transfer width. #0 value2 Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer. #1 PROTCTL Protection Control 2 2 read-write SRC_PER Source Peripheral 7 3 read-write SS_UPD_EN Source Status Update Enable 6 read-write CFGL Configuration Register Low 0x40 32 read-write n 0x0 0x0 CH_PRIOR Channel priority 5 2 read-write CH_SUSP Channel Suspend 8 read-write value1 Not suspended. #0 value2 Suspend DMA transfer from the source. #1 DST_HS_POL Destination Handshaking Interface Polarity 18 read-write value1 Active high #0 value2 Active low #1 FIFO_EMPTY Indicates if there is data left in the channel FIFO 9 read-only value2 Channel FIFO not empty #0 value1 Channel FIFO empty #1 HS_SEL_DST Destination Software or Hardware Handshaking Select 10 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware- initiated transaction requests are ignored. #1 HS_SEL_SRC Source Software or Hardware Handshaking Select 11 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware-initiated transaction requests are ignored. #1 LOCK_B Bus Lock Bit 17 read-write LOCK_B_L Bus Lock Level 14 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 LOCK_CH Channel Lock Bit 16 read-write LOCK_CH_L Channel Lock Level 12 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 MAX_ABRST Maximum AMBA Burst Length 20 9 read-write RELOAD_DST Automatic Destination Reload 31 read-write RELOAD_SRC Automatic Source Reload 30 read-write SRC_HS_POL Source Handshaking Interface Polarity 19 read-write value1 Active high #0 value2 Active low #1 CTLH Control Register High 0x1C 32 read-write n 0x0 0x0 BLOCK_TS Block Transfer Size 0 11 read-write DONE Done bit 12 read-write CTLL Control Register Low 0x18 32 read-write n 0x0 0x0 DEST_MSIZE Destination Burst Transaction Length 11 2 read-write DINC Destination Address Increment 7 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 DST_SCATTER_EN Destination scatter enable 18 read-write value1 Scatter disabled #0 value2 Scatter enabled #1 DST_TR_WIDTH Destination Transfer Width 1 2 read-write INT_EN Interrupt Enable Bit 0 read-write LLP_DST_EN Linked List Pointer for Destination Enable 27 read-write LLP_SRC_EN Linked List Pointer for Source Enable 28 read-write SINC Source Address Increment 9 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 SRC_GATHER_EN Source gather enable 17 read-write value1 Gather disabled #0 value2 Gather enabled #1 SRC_MSIZE Source Burst Transaction Length 14 2 read-write SRC_TR_WIDTH Source Transfer Width 4 2 read-write TT_FC Transfer Type and Flow Control 20 2 read-write DAR Destination Address Register 0x8 32 read-write n 0x0 0x0 DAR Current Destination address of DMA transfer 0 31 read-write DSR Destination Scatter Register 0x50 32 read-write n 0x0 0x0 DSC Destination scatter count 20 11 read-write DSI Destination scatter interval 0 19 read-write DSTAT Destination Status Register 0x28 32 read-write n 0x0 0x0 DSTAT Destination Status 0 31 read-write DSTATAR Destination Status Address Register 0x38 32 read-write n 0x0 0x0 DSTATAR Destination Status Address 0 31 read-write LLP Linked List Pointer Register 0x10 32 read-write n 0x0 0x0 LOC Starting Address In Memory 2 29 read-write SAR Source Address Register 0x0 32 read-write n 0x0 0x0 SAR Current Source Address of DMA transfer 0 31 read-write SGR Source Gather Register 0x48 32 read-write n 0x0 0x0 SGC Source gather count 20 11 read-write SGI Source gather interval 0 19 read-write SSTAT Source Status Register 0x20 32 read-write n 0x0 0x0 SSTAT Source Status 0 31 read-write SSTATAR Source Status Address Register 0x30 32 read-write n 0x0 0x0 SSTATAR Source Status Address 0 31 read-write GPDMA0_CH2 General Purpose DMA Unit 0 GPDMA 0x0 0x0 0x55 registers n CFGH Configuration Register High 0x44 32 read-write n 0x0 0x0 DEST_PER Destination Peripheral 11 3 read-write FCMODE Flow Control Mode 0 read-write value1 Source transaction requests are serviced when they occur. Data pre-fetching is enabled. #0 value2 Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled. #1 FIFO_MODE FIFO Mode Select 1 read-write value1 Space/data available for single AHB transfer of the specified transfer width. #0 value2 Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer. #1 PROTCTL Protection Control 2 2 read-write SRC_PER Source Peripheral 7 3 read-write CFGL Configuration Register Low 0x40 32 read-write n 0x0 0x0 CH_PRIOR Channel priority 5 2 read-write CH_SUSP Channel Suspend 8 read-write value1 Not suspended. #0 value2 Suspend DMA transfer from the source. #1 DST_HS_POL Destination Handshaking Interface Polarity 18 read-write value1 Active high #0 value2 Active low #1 FIFO_EMPTY Indicates if there is data left in the channel FIFO 9 read-only value2 Channel FIFO not empty #0 value1 Channel FIFO empty #1 HS_SEL_DST Destination Software or Hardware Handshaking Select 10 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware- initiated transaction requests are ignored. #1 HS_SEL_SRC Source Software or Hardware Handshaking Select 11 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware-initiated transaction requests are ignored. #1 LOCK_B Bus Lock Bit 17 read-write LOCK_B_L Bus Lock Level 14 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 LOCK_CH Channel Lock Bit 16 read-write LOCK_CH_L Channel Lock Level 12 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 MAX_ABRST Maximum AMBA Burst Length 20 9 read-write SRC_HS_POL Source Handshaking Interface Polarity 19 read-write value1 Active high #0 value2 Active low #1 CTLH Control Register High 0x1C 32 read-write n 0x0 0x0 BLOCK_TS Block Transfer Size 0 11 read-write DONE Done bit 12 read-write CTLL Control Register Low 0x18 32 read-write n 0x0 0x0 DEST_MSIZE Destination Burst Transaction Length 11 2 read-write DINC Destination Address Increment 7 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 DST_TR_WIDTH Destination Transfer Width 1 2 read-write INT_EN Interrupt Enable Bit 0 read-write SINC Source Address Increment 9 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 SRC_MSIZE Source Burst Transaction Length 14 2 read-write SRC_TR_WIDTH Source Transfer Width 4 2 read-write TT_FC Transfer Type and Flow Control 20 2 read-write DAR Destination Address Register 0x8 32 read-write n 0x0 0x0 DAR Current Destination address of DMA transfer 0 31 read-write SAR Source Address Register 0x0 32 read-write n 0x0 0x0 SAR Current Source Address of DMA transfer 0 31 read-write GPDMA0_CH3 General Purpose DMA Unit 0 GPDMA 0x0 0x0 0x55 registers n CFGH Configuration Register High 0x44 32 read-write n 0x0 0x0 DEST_PER Destination Peripheral 11 3 read-write FCMODE Flow Control Mode 0 read-write value1 Source transaction requests are serviced when they occur. Data pre-fetching is enabled. #0 value2 Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled. #1 FIFO_MODE FIFO Mode Select 1 read-write value1 Space/data available for single AHB transfer of the specified transfer width. #0 value2 Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer. #1 PROTCTL Protection Control 2 2 read-write SRC_PER Source Peripheral 7 3 read-write CFGL Configuration Register Low 0x40 32 read-write n 0x0 0x0 CH_PRIOR Channel priority 5 2 read-write CH_SUSP Channel Suspend 8 read-write value1 Not suspended. #0 value2 Suspend DMA transfer from the source. #1 DST_HS_POL Destination Handshaking Interface Polarity 18 read-write value1 Active high #0 value2 Active low #1 FIFO_EMPTY Indicates if there is data left in the channel FIFO 9 read-only value2 Channel FIFO not empty #0 value1 Channel FIFO empty #1 HS_SEL_DST Destination Software or Hardware Handshaking Select 10 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware- initiated transaction requests are ignored. #1 HS_SEL_SRC Source Software or Hardware Handshaking Select 11 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware-initiated transaction requests are ignored. #1 LOCK_B Bus Lock Bit 17 read-write LOCK_B_L Bus Lock Level 14 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 LOCK_CH Channel Lock Bit 16 read-write LOCK_CH_L Channel Lock Level 12 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 MAX_ABRST Maximum AMBA Burst Length 20 9 read-write SRC_HS_POL Source Handshaking Interface Polarity 19 read-write value1 Active high #0 value2 Active low #1 CTLH Control Register High 0x1C 32 read-write n 0x0 0x0 BLOCK_TS Block Transfer Size 0 11 read-write DONE Done bit 12 read-write CTLL Control Register Low 0x18 32 read-write n 0x0 0x0 DEST_MSIZE Destination Burst Transaction Length 11 2 read-write DINC Destination Address Increment 7 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 DST_TR_WIDTH Destination Transfer Width 1 2 read-write INT_EN Interrupt Enable Bit 0 read-write SINC Source Address Increment 9 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 SRC_MSIZE Source Burst Transaction Length 14 2 read-write SRC_TR_WIDTH Source Transfer Width 4 2 read-write TT_FC Transfer Type and Flow Control 20 2 read-write DAR Destination Address Register 0x8 32 read-write n 0x0 0x0 DAR Current Destination address of DMA transfer 0 31 read-write SAR Source Address Register 0x0 32 read-write n 0x0 0x0 SAR Current Source Address of DMA transfer 0 31 read-write GPDMA0_CH4 General Purpose DMA Unit 0 GPDMA 0x0 0x0 0x55 registers n CFGH Configuration Register High 0x44 32 read-write n 0x0 0x0 DEST_PER Destination Peripheral 11 3 read-write FCMODE Flow Control Mode 0 read-write value1 Source transaction requests are serviced when they occur. Data pre-fetching is enabled. #0 value2 Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled. #1 FIFO_MODE FIFO Mode Select 1 read-write value1 Space/data available for single AHB transfer of the specified transfer width. #0 value2 Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer. #1 PROTCTL Protection Control 2 2 read-write SRC_PER Source Peripheral 7 3 read-write CFGL Configuration Register Low 0x40 32 read-write n 0x0 0x0 CH_PRIOR Channel priority 5 2 read-write CH_SUSP Channel Suspend 8 read-write value1 Not suspended. #0 value2 Suspend DMA transfer from the source. #1 DST_HS_POL Destination Handshaking Interface Polarity 18 read-write value1 Active high #0 value2 Active low #1 FIFO_EMPTY Indicates if there is data left in the channel FIFO 9 read-only value2 Channel FIFO not empty #0 value1 Channel FIFO empty #1 HS_SEL_DST Destination Software or Hardware Handshaking Select 10 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware- initiated transaction requests are ignored. #1 HS_SEL_SRC Source Software or Hardware Handshaking Select 11 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware-initiated transaction requests are ignored. #1 LOCK_B Bus Lock Bit 17 read-write LOCK_B_L Bus Lock Level 14 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 LOCK_CH Channel Lock Bit 16 read-write LOCK_CH_L Channel Lock Level 12 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 MAX_ABRST Maximum AMBA Burst Length 20 9 read-write SRC_HS_POL Source Handshaking Interface Polarity 19 read-write value1 Active high #0 value2 Active low #1 CTLH Control Register High 0x1C 32 read-write n 0x0 0x0 BLOCK_TS Block Transfer Size 0 11 read-write DONE Done bit 12 read-write CTLL Control Register Low 0x18 32 read-write n 0x0 0x0 DEST_MSIZE Destination Burst Transaction Length 11 2 read-write DINC Destination Address Increment 7 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 DST_TR_WIDTH Destination Transfer Width 1 2 read-write INT_EN Interrupt Enable Bit 0 read-write SINC Source Address Increment 9 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 SRC_MSIZE Source Burst Transaction Length 14 2 read-write SRC_TR_WIDTH Source Transfer Width 4 2 read-write TT_FC Transfer Type and Flow Control 20 2 read-write DAR Destination Address Register 0x8 32 read-write n 0x0 0x0 DAR Current Destination address of DMA transfer 0 31 read-write SAR Source Address Register 0x0 32 read-write n 0x0 0x0 SAR Current Source Address of DMA transfer 0 31 read-write GPDMA0_CH5 General Purpose DMA Unit 0 GPDMA 0x0 0x0 0x55 registers n CFGH Configuration Register High 0x44 32 read-write n 0x0 0x0 DEST_PER Destination Peripheral 11 3 read-write FCMODE Flow Control Mode 0 read-write value1 Source transaction requests are serviced when they occur. Data pre-fetching is enabled. #0 value2 Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled. #1 FIFO_MODE FIFO Mode Select 1 read-write value1 Space/data available for single AHB transfer of the specified transfer width. #0 value2 Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer. #1 PROTCTL Protection Control 2 2 read-write SRC_PER Source Peripheral 7 3 read-write CFGL Configuration Register Low 0x40 32 read-write n 0x0 0x0 CH_PRIOR Channel priority 5 2 read-write CH_SUSP Channel Suspend 8 read-write value1 Not suspended. #0 value2 Suspend DMA transfer from the source. #1 DST_HS_POL Destination Handshaking Interface Polarity 18 read-write value1 Active high #0 value2 Active low #1 FIFO_EMPTY Indicates if there is data left in the channel FIFO 9 read-only value2 Channel FIFO not empty #0 value1 Channel FIFO empty #1 HS_SEL_DST Destination Software or Hardware Handshaking Select 10 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware- initiated transaction requests are ignored. #1 HS_SEL_SRC Source Software or Hardware Handshaking Select 11 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware-initiated transaction requests are ignored. #1 LOCK_B Bus Lock Bit 17 read-write LOCK_B_L Bus Lock Level 14 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 LOCK_CH Channel Lock Bit 16 read-write LOCK_CH_L Channel Lock Level 12 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 MAX_ABRST Maximum AMBA Burst Length 20 9 read-write SRC_HS_POL Source Handshaking Interface Polarity 19 read-write value1 Active high #0 value2 Active low #1 CTLH Control Register High 0x1C 32 read-write n 0x0 0x0 BLOCK_TS Block Transfer Size 0 11 read-write DONE Done bit 12 read-write CTLL Control Register Low 0x18 32 read-write n 0x0 0x0 DEST_MSIZE Destination Burst Transaction Length 11 2 read-write DINC Destination Address Increment 7 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 DST_TR_WIDTH Destination Transfer Width 1 2 read-write INT_EN Interrupt Enable Bit 0 read-write SINC Source Address Increment 9 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 SRC_MSIZE Source Burst Transaction Length 14 2 read-write SRC_TR_WIDTH Source Transfer Width 4 2 read-write TT_FC Transfer Type and Flow Control 20 2 read-write DAR Destination Address Register 0x8 32 read-write n 0x0 0x0 DAR Current Destination address of DMA transfer 0 31 read-write SAR Source Address Register 0x0 32 read-write n 0x0 0x0 SAR Current Source Address of DMA transfer 0 31 read-write GPDMA0_CH6 General Purpose DMA Unit 0 GPDMA 0x0 0x0 0x55 registers n CFGH Configuration Register High 0x44 32 read-write n 0x0 0x0 DEST_PER Destination Peripheral 11 3 read-write FCMODE Flow Control Mode 0 read-write value1 Source transaction requests are serviced when they occur. Data pre-fetching is enabled. #0 value2 Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled. #1 FIFO_MODE FIFO Mode Select 1 read-write value1 Space/data available for single AHB transfer of the specified transfer width. #0 value2 Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer. #1 PROTCTL Protection Control 2 2 read-write SRC_PER Source Peripheral 7 3 read-write CFGL Configuration Register Low 0x40 32 read-write n 0x0 0x0 CH_PRIOR Channel priority 5 2 read-write CH_SUSP Channel Suspend 8 read-write value1 Not suspended. #0 value2 Suspend DMA transfer from the source. #1 DST_HS_POL Destination Handshaking Interface Polarity 18 read-write value1 Active high #0 value2 Active low #1 FIFO_EMPTY Indicates if there is data left in the channel FIFO 9 read-only value2 Channel FIFO not empty #0 value1 Channel FIFO empty #1 HS_SEL_DST Destination Software or Hardware Handshaking Select 10 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware- initiated transaction requests are ignored. #1 HS_SEL_SRC Source Software or Hardware Handshaking Select 11 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware-initiated transaction requests are ignored. #1 LOCK_B Bus Lock Bit 17 read-write LOCK_B_L Bus Lock Level 14 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 LOCK_CH Channel Lock Bit 16 read-write LOCK_CH_L Channel Lock Level 12 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 MAX_ABRST Maximum AMBA Burst Length 20 9 read-write SRC_HS_POL Source Handshaking Interface Polarity 19 read-write value1 Active high #0 value2 Active low #1 CTLH Control Register High 0x1C 32 read-write n 0x0 0x0 BLOCK_TS Block Transfer Size 0 11 read-write DONE Done bit 12 read-write CTLL Control Register Low 0x18 32 read-write n 0x0 0x0 DEST_MSIZE Destination Burst Transaction Length 11 2 read-write DINC Destination Address Increment 7 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 DST_TR_WIDTH Destination Transfer Width 1 2 read-write INT_EN Interrupt Enable Bit 0 read-write SINC Source Address Increment 9 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 SRC_MSIZE Source Burst Transaction Length 14 2 read-write SRC_TR_WIDTH Source Transfer Width 4 2 read-write TT_FC Transfer Type and Flow Control 20 2 read-write DAR Destination Address Register 0x8 32 read-write n 0x0 0x0 DAR Current Destination address of DMA transfer 0 31 read-write SAR Source Address Register 0x0 32 read-write n 0x0 0x0 SAR Current Source Address of DMA transfer 0 31 read-write GPDMA0_CH7 General Purpose DMA Unit 0 GPDMA 0x0 0x0 0x55 registers n CFGH Configuration Register High 0x44 32 read-write n 0x0 0x0 DEST_PER Destination Peripheral 11 3 read-write FCMODE Flow Control Mode 0 read-write value1 Source transaction requests are serviced when they occur. Data pre-fetching is enabled. #0 value2 Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled. #1 FIFO_MODE FIFO Mode Select 1 read-write value1 Space/data available for single AHB transfer of the specified transfer width. #0 value2 Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer. #1 PROTCTL Protection Control 2 2 read-write SRC_PER Source Peripheral 7 3 read-write CFGL Configuration Register Low 0x40 32 read-write n 0x0 0x0 CH_PRIOR Channel priority 5 2 read-write CH_SUSP Channel Suspend 8 read-write value1 Not suspended. #0 value2 Suspend DMA transfer from the source. #1 DST_HS_POL Destination Handshaking Interface Polarity 18 read-write value1 Active high #0 value2 Active low #1 FIFO_EMPTY Indicates if there is data left in the channel FIFO 9 read-only value2 Channel FIFO not empty #0 value1 Channel FIFO empty #1 HS_SEL_DST Destination Software or Hardware Handshaking Select 10 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware- initiated transaction requests are ignored. #1 HS_SEL_SRC Source Software or Hardware Handshaking Select 11 read-write value1 Hardware handshaking interface. Software-initiated transaction requests are ignored. #0 value2 Software handshaking interface. Hardware-initiated transaction requests are ignored. #1 LOCK_B Bus Lock Bit 17 read-write LOCK_B_L Bus Lock Level 14 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 LOCK_CH Channel Lock Bit 16 read-write LOCK_CH_L Channel Lock Level 12 1 read-write value1 Over complete DMA transfer #00 value2 Over complete DMA block transfer #01 value3 Over complete DMA transaction #10 MAX_ABRST Maximum AMBA Burst Length 20 9 read-write SRC_HS_POL Source Handshaking Interface Polarity 19 read-write value1 Active high #0 value2 Active low #1 CTLH Control Register High 0x1C 32 read-write n 0x0 0x0 BLOCK_TS Block Transfer Size 0 11 read-write DONE Done bit 12 read-write CTLL Control Register Low 0x18 32 read-write n 0x0 0x0 DEST_MSIZE Destination Burst Transaction Length 11 2 read-write DINC Destination Address Increment 7 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 DST_TR_WIDTH Destination Transfer Width 1 2 read-write INT_EN Interrupt Enable Bit 0 read-write SINC Source Address Increment 9 1 read-write value1 Increment #00 value2 Decrement #01 value3 No change #10 SRC_MSIZE Source Burst Transaction Length 14 2 read-write SRC_TR_WIDTH Source Transfer Width 4 2 read-write TT_FC Transfer Type and Flow Control 20 2 read-write DAR Destination Address Register 0x8 32 read-write n 0x0 0x0 DAR Current Destination address of DMA transfer 0 31 read-write SAR Source Address Register 0x0 32 read-write n 0x0 0x0 SAR Current Source Address of DMA transfer 0 31 read-write HRPWM0 High Resolution PWM Unit HRPWM 0x0 0x0 0x100 registers n HRPWM_0 High Resolution Pulse Width Modulation (Module 0) 72 HRPWM_1 High Resolution Pulse Width Modulation (Module 0) 73 HRPWM_2 High Resolution Pulse Width Modulation (Module 0) 74 HRPWM_3 High Resolution Pulse Width Modulation (Module 0) 75 CSGCFG Global CSG configuration 0x20 32 read-write n 0x0 0x0 C0CD CSG0 Clock disable 16 read-write C0PM CSG0 Power Mode 0 1 read-write value1 CSG0 unit is powered OFF #00 value2 CSG0 unit is set in Low Speed Mode #01 value4 CSG0 unit is set in High Speed Mode #11 C1CD CSG1 Clock disable 17 read-write C1PM CSG1 Power Mode 2 1 read-write value1 CSG1 unit is powered OFF #00 value2 CSG1 unit is set in Low Speed Mode #01 value4 CSG1 unit is set in High Speed Mode #11 C2CD CSG2 Clock disable 18 read-write C2PM CSG2 Power Mode 4 1 read-write value1 CSG2 unit is powered OFF #00 value2 CSG2 unit is set in Low Speed Mode #01 value4 CSG2 unit is set in High Speed Mode #11 CSGCLRG Global CSG run bit clear 0x28 32 read-write n 0x0 0x0 CC0P CMP0 passive level clear 2 write-only CC0R CMP0 run bit clear 1 write-only CC1P CMP1 passive level clear 6 write-only CC1R CMP1 run bit clear 5 write-only CC2P CMP2 passive level clear 10 write-only CC2R CMP2 run bit clear 9 write-only CD0R DAC0 run bit clear 0 write-only CD1R DAC1 run bit clear 4 write-only CD2R DAC2 run bit clear 8 write-only CSGFCG Global CSG slope/prescaler control 0x30 32 read-write n 0x0 0x0 PS0CLR Prescaler 0 clear 4 write-only PS0STP Prescaler 0 stop 3 write-only PS0STR Prescaler 0 start 2 write-only PS1CLR Prescaler 1 clear 12 write-only PS1STP Prescaler 1 stop 11 write-only PS1STR Prescaler 1 start 10 write-only PS2CLR Prescaler 2 clear 20 write-only PS2STP Prescaler 2 stop 19 write-only PS2STR Prescaler 2 start 18 write-only S0STP Slope 0 stop 1 write-only S0STR Slope 0 start 0 write-only S1STP Slope 1 stop 9 write-only S1STR Slope 1 start 8 write-only S2STP Slope 2 stop 17 write-only S2STR Slope 2 start 16 write-only CSGFSG Global CSG slope/prescaler status 0x34 32 read-write n 0x0 0x0 P0RB CSG0 prescaler status 1 read-only value1 Prescaler is stopped. The clock used for the slope generation is halted and therefore the slope is frozen. #0 value2 Prescaler is running. #1 P1RB CSG1 prescaler status 9 read-only value1 Prescaler is stopped. The clock used for the slope generation is halted and therefore the slope is frozen. #0 value2 Prescaler is running. #1 P2RB CSG2 prescaler status 17 read-only value1 Prescaler is stopped. The clock used for the slope generation is halted and therefore the slope is frozen. #0 value2 Prescaler is running. #1 S0RB DAC0 slope generation status 0 read-only value1 Slope generation is stopped. #0 value2 Slope generation is running. #1 S1RB DAC1 slope generation status 8 read-only value1 Slope generation is stopped. #0 value2 Slope generation is running. #1 S2RB DAC2 slope generation status 16 read-only value1 Slope generation is stopped. #0 value2 Slope generation is running. #1 CSGSETG Global CSG run bit set 0x24 32 read-write n 0x0 0x0 SC0P CMP0 passive level set 2 write-only SC0R CMP0 run bit set 1 write-only SC1P CMP1 passive level set 6 write-only SC1R CMP1 run bit set 5 write-only SC2P CMP2 passive level set 10 write-only SC2R CMP2 run bit set 9 write-only SD0R DAC0 run bit set 0 write-only SD1R DAC1 run bit set 4 write-only SD2R DAC2 run bit set 8 write-only CSGSTATG Global CSG run bit status 0x2C 32 read-write n 0x0 0x0 C0RB CMP0 run bit status 1 read-only value1 CMP0 functionality is disabled #0 value2 CMP0 functionality is enabled #1 C1RB CMP1 run bit status 5 read-only value1 CMP1 functionality is disabled #0 value2 CMP1 functionality is enabled #1 C2RB CMP2 run bit status 9 read-only value1 CMP2 functionality is disabled #0 value2 CMP2 functionality is enabled #1 D0RB DAC0 run bit status 0 read-only value1 DAC0 is not running (control logic is disabled) #0 value2 DAC0 is running #1 D1RB DAC1 run bit status 4 read-only value1 DAC1 is not running (control logic is disabled) #0 value2 DAC1 is running #1 D2RB DAC2 run bit status 8 read-only value1 DAC2 is not running (control logic is disabled) #0 value2 DAC1 is running #1 PSLS0 CMP0 output passive status 2 read-only value1 CMP0 output is not clamped #0 value2 CMP0 output is clamped #1 PSLS1 CMP1 output passive status 6 read-only value1 CMP1 output is not clamped #0 value2 CMP1 output is clamped #1 PSLS2 CMP2 output passive status 10 read-only value1 CMP2 output is not clamped #0 value2 CMP2 output is clamped #1 CSGTRC Global CSG shadow trigger clear 0x3C 32 read-write n 0x0 0x0 D0SEC DAC0 shadow transfer enable clear 0 write-only D1SEC DAC1 shadow transfer enable clear 4 write-only D2SEC DAC2 shadow transfer enable clear 8 write-only CSGTRG Global CSG shadow/switch trigger 0x38 32 read-write n 0x0 0x0 D0SES DAC0 shadow transfer enable set 0 write-only D0SVS CMP0 inverting input switch request 1 write-only D1SES DAC1 shadow transfer enable set 4 write-only D1SVS CMP1 inverting input switch request 5 write-only D2SES DAC2 shadow transfer enable set 8 write-only D2SVS CMP2 inverting input switch request 9 write-only CSGTRSG Global CSG shadow/switch status 0x40 32 read-write n 0x0 0x0 D0STE DAC0 shadow transfer enable 0 read-only value1 Shadow transfer has been performed. #0 value2 Shadow transfer has been requested but is still pending completion. #1 D1STE DAC1 shadow transfer enable 4 read-only value1 Shadow transfer has been performed. #0 value2 Shadow transfer has been requested but is still pending completion. #1 D2STE DAC2 shadow transfer enable 8 read-only value1 Shadow transfer has been performed. #0 value2 Shadow transfer has been requested but is still pending completion. #1 SW0ST CMP0 inverting input connection status 1 read-only value1 Inverting input connected to HRPWMx.C0I[A] #0 value2 Inverting input connected to HRPWMx.C0I[B] #1 SW1ST CMP1 inverting input connection status 5 read-only value1 Inverting input connected to HRPWMx.C1I[A] #0 value2 Inverting input connected to HRPWMx.C1I[B] #1 SW2ST CMP2 inverting input connection status 9 read-only value1 Inverting input connected to HRPWMx.C2I[A] #0 value2 Inverting input connected to HRPWMx.C2I[B] #1 GLBANA Global Analog Configuration 0x14 32 read-write n 0x0 0x0 FDN Force chargepump down 3 read-write FUP Force chargepump up 2 read-write GHREN Force chargepump down 18 read-write value1 Global high resolution generation is enabled #0 value2 Global high resolution generation is disabled #1 SLCP HRCs chargepump current selection 6 2 read-write SLDLY Delay of lock detection 0 1 read-write SLIBLDO HRCs LDO bias current 9 1 read-write SLIBLF HRCs loop filter bias current 11 1 read-write SLVREF Reference voltage for chargepump and loop filter 13 2 read-write TRIBIAS Bias trimming 16 1 read-write HRBSC Bias and suspend configuration 0x0 32 read-write n 0x0 0x0 HRBE HRPWM bias enable 8 read-write SUSCFG Suspend configuration 0 2 read-write value1 Suspend is ignored. #000 value2 CSGy and HRCy units are halted. #001 value3 Comparator outputs, HRPWMx.CyO are clamped to passive level and the CSGy units are halted. High resolution channel outputs, HRPWMx.HROUTy0 and HRPWMx.HROUTy1, are clamped to passive state and the HRCy units are halted. #010 value4 CSGy units are halted. High resolution channel outputs, HRPWMx.HROUTy0 and HRPWMx.HROUTy1, are clamped to passive state and the HRCy units are halted. #011 HRCCFG Global HRC configuration 0x60 32 read-write n 0x0 0x0 CLKC Clock information control 16 2 read-write value1 No clock frequency is selected #000 value2 Module clock frequency is 180 MHz #001 value3 Module clock frequency is 120 MHz #010 value4 Module clock frequency is 80 MHz #011 HRC0E HRC0 high resolution enable 4 read-write value1 HRC0 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC0 to generate an output PWM signal. #0 value2 HRC0 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#. #1 HRC1E HRC1 high resolution channel enable 5 read-write value1 HRC1 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC1 to generate an output PWM signal. #0 value2 HRC1 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#. #1 HRC2E HRC2 high resolution channel enable 6 read-write value1 HRC2 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC2 to generate an output PWM signal. #0 value2 HRC2 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#. #1 HRC3E HRC3 high resolution channel enable 7 read-write value1 HRC3 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC3 to generate an output PWM signal. #0 value2 HRC3 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#. #1 HRCPM High resolution channels power mode 0 read-write value1 High resolution generation logic is OFF. It is not possible to generate high resolution signals throughout any of the high resolution channels, HRCy. #0 value2 High resolution generation logic is ON. In this mode it is possible to generate a high resolution signal placement with the HRCy subunits. #1 LRC0E HRC0 low resolution channel enable 20 read-write value1 HRC0 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC0 to generate an output PWM signal. #0 value2 HRC0 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path. #1 LRC1E HRC1 low resolution channel enable 21 read-write value1 HRC1 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC1 to generate an output PWM signal. #0 value2 HRC1 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path. #1 LRC2E HRC2 low resolution channel enable 22 read-write value1 HRC2 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC2 to generate an output PWM signal. #0 value2 HRC2 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path. #1 LRC3E HRC3 low resolution channel enable 23 read-write value1 HRC3 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC3 to generate an output PWM signal. #0 value2 HRC3 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path. #1 HRCCTRG Global HRC shadow trigger clear 0x68 32 read-write n 0x0 0x0 H0DEC HRC0 dead time value shadow transfer Enable Clear 1 write-only H0EC HRC0 high resolution values shadow transfer Enable Clear 0 write-only H1DEC HRC1 dead time value shadow transfer Enable Clear 5 write-only H1EC HRC1 high resolution values shadow transfer Enable Clear 4 write-only H2CEC HRC2 high resolution values shadow transfer Enable Clear 8 write-only H2DEC HRC2 dead time value shadow transfer Enable Clear 9 write-only H3DEC HRC3 dead time value shadow transfer Enable Clear 13 write-only H3EC HRC3 high resolution values shadow transfer Enable Clear 12 write-only HRCSTRG Global HRC shadow trigger set 0x64 32 read-write n 0x0 0x0 H0DES HRC0 dead time value shadow transfer enable set 1 write-only H0ES HRC0 high resolution values shadow transfer Enable Set 0 write-only H1DES HRC0 dead time value shadow transfer enable set 5 write-only H1ES HRC1 high resolution values shadow transfer Enable Set 4 write-only H2DES HRC0 dead time value shadow transfer enable set 9 write-only H2ES HRC2 high resolution values shadow transfer Enable Set 8 write-only H3DES HRC0 dead time value shadow transfer enable set 13 write-only H3ES HRC3 high resolution values shadow transfer Enable Set 12 write-only HRCSTSG Global HRC shadow transfer status 0x6C 32 read-write n 0x0 0x0 H0DSTE HRC0 dead time value shadow transfer status 1 read-only value1 No shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values #0 value2 Shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values #1 H0STE HRC0 high resolution values shadow transfer status 0 read-only value1 No shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values #0 value2 Shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values #1 H1DSTE HRC1 dead time value shadow transfer status 5 read-only value1 No shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values #0 value2 Shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values #1 H1STE HRC1 high resolution values shadow transfer status 4 read-only value1 No shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values #0 value2 Shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values #1 H2DSTE HRC2 dead time value shadow transfer status 9 read-only value1 No shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values #0 value2 Shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values #1 H2STE HRC2 high resolution values shadow transfer status 8 read-only value1 No shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values #0 value2 Shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values #1 H3DSTE HRC3 dead time value shadow transfer status 13 read-only value1 No shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values #0 value2 Shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values #1 H3STE HRC3 high resolution values shadow transfer status 12 read-only value1 No shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values #0 value2 Shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values #1 HRGHRS High Resolution Generation Status 0x70 32 read-write n 0x0 0x0 HRGR High Resolution Generation Ready 0 read-only value1 High resolution logic is not working #0 value2 High resolution logic is working #1 MIDR Module identification register 0x8 32 read-write n 0x0 0x0 MODN Module Number 16 15 read-only MODR Module Revision 0 7 read-only MODT Module Type 8 7 read-only HRPWM0_CSG0 High Resolution PWM Unit HRPWM 0x0 0x0 0x100 registers n BLV Comparator blanking value 0x28 32 read-write n 0x0 0x0 BLV Blanking value 0 7 read-write CC Comparator configuration 0x20 32 read-write n 0x0 0x0 BLMC Blanking mode 14 1 read-write value1 Blanking disabled #00 value2 Blanking on a LOW to HIGH transition #01 value3 Blanking on a HIGH to LOW transition #10 value4 Blanking on both transitions #11 COFC Comparator output filter control 24 1 read-write value1 Filtering is always done if enabled #00 value2 Filtering is only done when CSGyDSV1 value is currently fed to the DAC #01 value3 Filtering is only done when the CSGyDSV2 value is currently fed to the DAC #10 COFE Comparator output filter enable 17 read-write value1 Filtering stage disabled #0 value2 Filtering stage enabled #1 COFM Comparator output filter window 18 3 read-write value1 Comparator Output needs to be stable for 2 clock cycles #0000 value2 Comparator Output needs to be stable for 3 clock cycles #0001 value3 Comparator Output needs to be stable for 4 clock cycles #0010 value4 Comparator Output needs to be stable for 5 clock cycles #0011 value5 Comparator Output needs to be stable for 14 clock cycles #1100 value6 Comparator Output needs to be stable for 15 clock cycles #1101 value7 Comparator Output needs to be stable for 16 clock cycles #1110 value8 Comparator Output needs to be stable for 32 clock cycles #1111 EBE External blanking trigger enabled 16 read-write ESE External triggered switch enable 11 read-write IBS External blanking trigger selector 0 3 read-write value1 HRPWMx.BLyA #0000 value2 HRPWMx.BLyB #0001 value3 HRPWMx.BLyC #0010 value4 HRPWMx.BLyD #0011 value5 HRPWMx.BLyE #0100 value6 HRPWMx.BLyF #0101 value7 HRPWMx.BLyG #0110 value8 HRPWMx.BLyH #0111 value9 HRPWMx.BLyI #1000 value10 HRPWMx.BLyJ #1001 value11 HRPWMx.BLyK #1010 value12 HRPWMx.BLyL #1011 value13 HRPWMx.BLyM #1100 value14 HRPWMx.BLyN #1101 value15 HRPWMx.BLyO #1110 value16 HRPWMx.BLyP #1111 IMCC Comparator input switching configuration 9 1 read-write value1 Dynamic switch disabled #00 value2 Comparator input is connected to HRPWMx.CyINB when the control signal is HIGH #01 value3 Comparator input is connected to HRPWMx.CyINA when the control signal is HIGH #10 IMCS Inverting comparator input selector 8 read-write value1 HRPWMx.CyINA #0 value2 HRPWMx.CyINB #1 OIE Comparator output inversion enable 12 read-write OSE Comparator output synchronization enable 13 read-write DCI External input selection 0x0 32 read-write n 0x0 0x0 SCS Slope generation clock selection 20 1 read-write value1 HRPWMx.MCLK (Module clock is used) #00 value2 HRPWMx.ECLKA (External clock is used) #01 value3 HRPWMx.ECLKB (External clock is used) #10 value4 HRPWMx.ECLKC (External clock is used) #11 STIS External shadow request enable input selection 16 3 read-write STPIS Slope generation stop control input selection 8 3 read-write STRIS Slope generation start control input selection 4 3 read-write SVIS Value Selector input selection 0 3 read-write value1 HRPWMx.SyIA #0000 value2 HRPWMx.SyIB #0001 value3 HRPWMx.SyIC #0010 value4 HRPWMx.SyID #0011 value5 HRPWMx.SyIE #0100 value6 HRPWMx.SyIF #0101 value7 HRPWMx.SyIG #0110 value8 HRPWMx.SyIH #0111 value9 HRPWMx.SyII #1000 value10 HRPWMx.SyIJ #1001 value11 HRPWMx.SyIK #1010 value12 HRPWMx.SyIL #1011 value13 HRPWMx.SyIM #1100 value14 HRPWMx.SyIN #1101 value15 HRPWMx.SyIO #1110 value16 HRPWMx.SyIP #1111 TRGIS External conversion trigger input selection 12 3 read-write DSV1 DAC reference value 1 0x10 32 read-write n 0x0 0x0 DSV1 DAC reference value 1 0 9 read-only DSV2 DAC reference value 1 0x14 32 read-write n 0x0 0x0 DSV2 DAC reference value 2 0 9 read-write IES External input selection 0x4 32 read-write n 0x0 0x0 STES External shadow transfer enable edge selection 8 1 read-write value1 Function disabled #00 value2 Active on rising edge #01 value3 Active on falling edge #10 value4 Active on both edges #11 STPES External stop function edge selection 4 1 read-write value1 Function disabled #00 value2 Active on rising edge #01 value3 Active on falling edge #10 value4 Active on both edges #11 STRES External start function edge selection 2 1 read-write value1 Function disabled #00 value2 Active on rising edge #01 value3 Active on falling edge #10 value4 Active on both edges #11 SVLS External value switch function level selection 0 1 read-write value1 Function disabled #00 value2 Active when input is HIGH #01 value3 Active when input is LOW #10 TRGES External trigger function edge selection 6 1 read-write value1 Function disabled #00 value2 Active on rising edge #01 value3 Active on falling edge #10 value4 Active on both edges #11 ISTAT Service request status 0x3C 32 read-write n 0x0 0x0 CFSS Comparator fall interrupt status 7 read-only value1 Comparator output HIGH to LOW transition not detected #0 value2 Comparator output HIGH to LOW transition detected #1 CRSS Comparator rise interrupt status 6 read-only value1 Comparator output LOW to HIGH transition not detected #0 value2 Comparator output LOW to HIGH transition detected #1 CSES Comparator clamped interrupt status 8 read-only value1 Comparator output has been set to the clamped state #0 value2 Comparator output has not been set to the clamped state #1 STDS Shadow transfer interrupt status 5 read-only value1 Shadow transfer was not performed #0 value2 Shadow transfer was performed #1 STPSS Stop trigger interrupt status 4 read-only value1 Stop trigger not detected #0 value2 Stop trigger detected #1 STRSS Start trigger interrupt status 3 read-only value1 Start trigger not detected #0 value2 Start trigger detected #1 TRGSS Conversion trigger status 2 read-only value1 Conversion trigger was not generated #0 value2 Conversion trigger was generated #1 VLS1S Value switch from CSGyDSV1 to CSGyDSV2 interrupt status 0 read-only value1 Value switch not detected #0 value2 Value switch detected #1 VLS2S Value switch from CSGyDSV2 to CSGyDSV1 interrupt status 1 read-only value1 Value switch not detected #0 value2 Value switch detected #1 PC Pulse swallow configuration 0xC 32 read-write n 0x0 0x0 PSWV Pulse swallow configuration 0 5 read-only PLC Passive level configuration 0x24 32 read-write n 0x0 0x0 IPLS Clamping control signal selector 0 3 read-write value1 HRPWMx.BLyA #0000 value2 HRPWMx.BLyB #0001 value3 HRPWMx.BLyC #0010 value4 HRPWMx.BLyD #0011 value5 HRPWMx.BLyE #0100 value6 HRPWMx.BLyF #0101 value7 HRPWMx.BLyG #0110 value8 HRPWMx.BLyH #0111 value9 HRPWMx.BLyI #1000 value10 HRPWMx.BLyJ #1001 value11 HRPWMx.BLyK #1010 value12 HRPWMx.BLyL #1011 value13 HRPWMx.BLyM #1100 value14 HRPWMx.BLyN #1101 value15 HRPWMx.BLyO #1110 value16 HRPWMx.BLyP #1111 PLCL Clamping control signal level selection 8 1 read-write value1 Clamping control disabled #00 value2 Output is set to clamped level when the control signal is HIGH #01 value3 Output is set to clamped level when the control signal is LOW #10 PLEC Passive level enter configuration 12 1 read-write value1 Passive level is entered immediately #00 value2 Passive level is entered only after the comparator output passes to LOW (output from the blanking stage) #01 value3 Passive level is entered only after the comparator output passes to HIGH (output from the blanking stage) #10 PLSW Clamped state exit SW configuration 11 read-write value1 External signal and SW can remove the output from the clamped state #0 value2 Only SW can remove the output from the clamped state #1 PLXC Passive level exit configuration 14 1 read-write value1 Passive level is exit immediately #00 value2 Passive level is exit only after the comparator output passes to LOW (output from the blanking stage) #01 value3 Passive level is exit only after the comparator output passes to HIGH (output from the blanking stage) #10 PSL Output passive level value 10 read-write value1 Output clamped level is LOW #0 value2 Output clamped level is HIGH #1 SC Slope generation control 0x8 32 read-write n 0x0 0x0 FPD Fixed division disable 4 read-write value1 Division by 4 enabled #0 value2 Division by 4 disabled #1 GCFG Slope step gain configuration 18 1 read-write value1 Each slope step has an increment/decrement of 1 #00 value2 Each slope step has an increment/decrement of 2 #01 value3 Each slope step has an increment/decrement of 4 #10 value4 Each slope step has an increment/decrement of 8 #11 IST Immediate shadow transfer 20 read-write PSE Pulse swallow enable 21 read-write value1 Pulse swallow disabled #0 value2 Pulse swallow enabled #1 PSRM Prescaler external start configuration 0 1 read-write value1 External start trigger is ignored #00 value2 Start prescaler #01 value3 Clear prescaler #10 value4 Clear & Start prescaler #11 PSTM Prescaler external stop configuration 2 1 read-write value1 External stop trigger is ignored #00 value2 Stop prescaler #01 value3 Clear prescaler #10 value4 Clear & Stop prescaler #11 PSV Prescaler division factor 5 1 read-write value1 division by 1 #00 value2 division by 2 #01 value3 division by 4 #10 value4 division by 8 #11 PSWM Pulse swallow window mode 24 1 read-write value1 16 clock cycle window #00 value2 32 clock cycle window #01 value3 64 clock cycle window #10 SCM Slope control mode 8 1 read-write value1 Slope generation disabled. Used when the switch between the two reference values, CSGyDSV1This register contains the actual value used for the DSV1 reference. and CSGyDSV2This register contains the actual value used for the DSV2 reference. is done via external signal. #00 value2 Decrementing slope generation. #01 value3 Incrementing slope generation. #10 value4 Triangular slope generation. #11 SSRM Slope external start configuration 10 1 read-write value1 External start trigger is ignored #00 value2 Start/restart slope generation #01 value3 Resumes slope #10 SSTM Slope external stop configuration 12 1 read-write value1 External stop trigger is ignored #00 value2 Stops/Halts the slope generation #01 value3 Used in hybrid mode. It freezes the slope generation and feeds constantly the value programmed in CSGyDSV2This register contains the actual value used for the DSV2 reference. to the DAC. #10 SVSC Slope reference value mode 14 1 read-write value1 Only CSGyDSV1This register contains the actual value used for the DSV1 reference. value is used for the slope generation: if slope is incrementing, CSGyDSV1This register contains the actual value used for the DSV1 reference. is the bottom reference value from where the ramp starts; if decrementing, then CSGyDSV1This register contains the actual value used for the DSV1 reference. is the upper reference value from where the ramp starts. #00 value2 The two reference values are being used: CSGyDSV1This register contains the actual value used for the DSV1 reference. is the low or high reference value from where the ramp starts (incrementing or decrementing respectively); CSGyDSV2This register contains the actual value used for the DSV2 reference. is used as a static value (this value is constantly fed to the DAC after a stop trigger as been detected). #01 value3 The two reference values are used: CSGyDSV1This register contains the actual value used for the DSV1 reference. is the low or high reference value from where the slope starts (incrementing or decrementing respectively); CSGyDSV2This register contains the actual value used for the DSV2 reference. is used as an internal re start condition for the slope. #10 SWSM Initial DAC start mode 16 1 read-write value1 CSGyDSV2This register contains the actual value used for the DSV2 reference. is fed to the DAC and initial conversion trigger is generated. #00 value2 CSGyDSV1This register contains the actual value used for the DSV1 reference. is fed to the DAC and initial conversion trigger is generated. #01 value3 CSGyDSV2This register contains the actual value used for the DSV2 reference. is fed to the DAC but initial conversion trigger is not generated. #10 value4 CSGyDSV1This register contains the actual value used for the DSV1 reference. is fed to the DAC but initial conversion trigger is not generated. #11 SDSV1 Shadow reference value 1 0x18 32 read-write n 0x0 0x0 SDSV1 Shadow DAC reference value 1 0 9 read-write SPC Shadow Pulse swallow value 0x1C 32 read-write n 0x0 0x0 SPSWV Shadow pulse swallow value 0 5 read-write SRE Service request enable 0x2C 32 read-write n 0x0 0x0 CFSE Comparator fall interrupt enable 7 read-write CRSE Comparator rise interrupt enable 6 read-write CSEE Clamped state interrupt enable 8 read-write STDE Shadow transfer done interrupt enable 5 read-write STPSE Stop trigger interrupt enable 4 read-write STRSE Start trigger interrupt enable 3 read-write TRGSE Conversion trigger interrupt enable 2 read-write VLS1E Value switch from CSGyDSV1 to CSGyDSV2 interrupt enable 0 read-write VLS2E Value switch from CSGyDSV2 to CSGyDSV1 interrupt enable 1 read-write SRS Service request line selector 0x30 32 read-write n 0x0 0x0 CRFLS Comparator rise/fall interrupt line selection 10 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 CSLS Comparator clamped state interrupt line selection 12 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 SSLS Start/Stop trigger interrupt line selection 6 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 STLS Shadow transfer done interrupt line selection 8 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 TRLS Conversion trigger interrupt line selection 4 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 VLS1S Value switch from CSGyDSV1 to CSGyDSV2 interrupt line selection 0 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 VLS2S Value switch from CSGyDSV2 to CSGyDSV1 interrupt line selection 2 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 SWC Service request SW clear 0x38 32 read-write n 0x0 0x0 CCFS Comparator fall status clear 7 write-only CCRS Comparator rise status clear 6 write-only CCSS Comparator clamped status clear 8 write-only CSTD Shadow transfer status clear 5 write-only CSTPS Stop trigger status clear 4 write-only CSTRS Start trigger status clear 3 write-only CTRGS Conversion trigger status clear 2 write-only CVLS1 Value switch from CSGyDSV1 to CSGyDSV2 status clear 0 write-only CVLS2 Value switch from CSGyDSV2 to CSGyDSV1 status clear 1 write-only SWS Service request SW set 0x34 32 read-write n 0x0 0x0 SCFS Comparator fall status set 7 write-only SCRS Comparator rise status set 6 write-only SCSS Comparator clamped state status set 8 write-only SSTD Shadow transfer status set 5 write-only SSTPS Stop trigger status set 4 write-only SSTRS Start trigger status set 3 write-only STRGS Conversion trigger status set 2 write-only SVLS1 Value switch from CSGyDSV1 to CSGyDSV2 status set 0 write-only SVLS2 Value switch from CSGyDSV2 to CSGyDSV1 status set 1 write-only HRPWM0_CSG1 High Resolution PWM Unit HRPWM 0x0 0x0 0x100 registers n BLV Comparator blanking value 0x28 32 read-write n 0x0 0x0 BLV Blanking value 0 7 read-write CC Comparator configuration 0x20 32 read-write n 0x0 0x0 BLMC Blanking mode 14 1 read-write value1 Blanking disabled #00 value2 Blanking on a LOW to HIGH transition #01 value3 Blanking on a HIGH to LOW transition #10 value4 Blanking on both transitions #11 COFC Comparator output filter control 24 1 read-write value1 Filtering is always done if enabled #00 value2 Filtering is only done when CSGyDSV1 value is currently fed to the DAC #01 value3 Filtering is only done when the CSGyDSV2 value is currently fed to the DAC #10 COFE Comparator output filter enable 17 read-write value1 Filtering stage disabled #0 value2 Filtering stage enabled #1 COFM Comparator output filter window 18 3 read-write value1 Comparator Output needs to be stable for 2 clock cycles #0000 value2 Comparator Output needs to be stable for 3 clock cycles #0001 value3 Comparator Output needs to be stable for 4 clock cycles #0010 value4 Comparator Output needs to be stable for 5 clock cycles #0011 value5 Comparator Output needs to be stable for 14 clock cycles #1100 value6 Comparator Output needs to be stable for 15 clock cycles #1101 value7 Comparator Output needs to be stable for 16 clock cycles #1110 value8 Comparator Output needs to be stable for 32 clock cycles #1111 EBE External blanking trigger enabled 16 read-write ESE External triggered switch enable 11 read-write IBS External blanking trigger selector 0 3 read-write value1 HRPWMx.BLyA #0000 value2 HRPWMx.BLyB #0001 value3 HRPWMx.BLyC #0010 value4 HRPWMx.BLyD #0011 value5 HRPWMx.BLyE #0100 value6 HRPWMx.BLyF #0101 value7 HRPWMx.BLyG #0110 value8 HRPWMx.BLyH #0111 value9 HRPWMx.BLyI #1000 value10 HRPWMx.BLyJ #1001 value11 HRPWMx.BLyK #1010 value12 HRPWMx.BLyL #1011 value13 HRPWMx.BLyM #1100 value14 HRPWMx.BLyN #1101 value15 HRPWMx.BLyO #1110 value16 HRPWMx.BLyP #1111 IMCC Comparator input switching configuration 9 1 read-write value1 Dynamic switch disabled #00 value2 Comparator input is connected to HRPWMx.CyINB when the control signal is HIGH #01 value3 Comparator input is connected to HRPWMx.CyINA when the control signal is HIGH #10 IMCS Inverting comparator input selector 8 read-write value1 HRPWMx.CyINA #0 value2 HRPWMx.CyINB #1 OIE Comparator output inversion enable 12 read-write OSE Comparator output synchronization enable 13 read-write DCI External input selection 0x0 32 read-write n 0x0 0x0 SCS Slope generation clock selection 20 1 read-write value1 HRPWMx.MCLK (Module clock is used) #00 value2 HRPWMx.ECLKA (External clock is used) #01 value3 HRPWMx.ECLKB (External clock is used) #10 value4 HRPWMx.ECLKC (External clock is used) #11 STIS External shadow request enable input selection 16 3 read-write STPIS Slope generation stop control input selection 8 3 read-write STRIS Slope generation start control input selection 4 3 read-write SVIS Value Selector input selection 0 3 read-write value1 HRPWMx.SyIA #0000 value2 HRPWMx.SyIB #0001 value3 HRPWMx.SyIC #0010 value4 HRPWMx.SyID #0011 value5 HRPWMx.SyIE #0100 value6 HRPWMx.SyIF #0101 value7 HRPWMx.SyIG #0110 value8 HRPWMx.SyIH #0111 value9 HRPWMx.SyII #1000 value10 HRPWMx.SyIJ #1001 value11 HRPWMx.SyIK #1010 value12 HRPWMx.SyIL #1011 value13 HRPWMx.SyIM #1100 value14 HRPWMx.SyIN #1101 value15 HRPWMx.SyIO #1110 value16 HRPWMx.SyIP #1111 TRGIS External conversion trigger input selection 12 3 read-write DSV1 DAC reference value 1 0x10 32 read-write n 0x0 0x0 DSV1 DAC reference value 1 0 9 read-only DSV2 DAC reference value 1 0x14 32 read-write n 0x0 0x0 DSV2 DAC reference value 2 0 9 read-write IES External input selection 0x4 32 read-write n 0x0 0x0 STES External shadow transfer enable edge selection 8 1 read-write value1 Function disabled #00 value2 Active on rising edge #01 value3 Active on falling edge #10 value4 Active on both edges #11 STPES External stop function edge selection 4 1 read-write value1 Function disabled #00 value2 Active on rising edge #01 value3 Active on falling edge #10 value4 Active on both edges #11 STRES External start function edge selection 2 1 read-write value1 Function disabled #00 value2 Active on rising edge #01 value3 Active on falling edge #10 value4 Active on both edges #11 SVLS External value switch function level selection 0 1 read-write value1 Function disabled #00 value2 Active when input is HIGH #01 value3 Active when input is LOW #10 TRGES External trigger function edge selection 6 1 read-write value1 Function disabled #00 value2 Active on rising edge #01 value3 Active on falling edge #10 value4 Active on both edges #11 ISTAT Service request status 0x3C 32 read-write n 0x0 0x0 CFSS Comparator fall interrupt status 7 read-only value1 Comparator output HIGH to LOW transition not detected #0 value2 Comparator output HIGH to LOW transition detected #1 CRSS Comparator rise interrupt status 6 read-only value1 Comparator output LOW to HIGH transition not detected #0 value2 Comparator output LOW to HIGH transition detected #1 CSES Comparator clamped interrupt status 8 read-only value1 Comparator output has been set to the clamped state #0 value2 Comparator output has not been set to the clamped state #1 STDS Shadow transfer interrupt status 5 read-only value1 Shadow transfer was not performed #0 value2 Shadow transfer was performed #1 STPSS Stop trigger interrupt status 4 read-only value1 Stop trigger not detected #0 value2 Stop trigger detected #1 STRSS Start trigger interrupt status 3 read-only value1 Start trigger not detected #0 value2 Start trigger detected #1 TRGSS Conversion trigger status 2 read-only value1 Conversion trigger was not generated #0 value2 Conversion trigger was generated #1 VLS1S Value switch from CSGyDSV1 to CSGyDSV2 interrupt status 0 read-only value1 Value switch not detected #0 value2 Value switch detected #1 VLS2S Value switch from CSGyDSV2 to CSGyDSV1 interrupt status 1 read-only value1 Value switch not detected #0 value2 Value switch detected #1 PC Pulse swallow configuration 0xC 32 read-write n 0x0 0x0 PSWV Pulse swallow configuration 0 5 read-only PLC Passive level configuration 0x24 32 read-write n 0x0 0x0 IPLS Clamping control signal selector 0 3 read-write value1 HRPWMx.BLyA #0000 value2 HRPWMx.BLyB #0001 value3 HRPWMx.BLyC #0010 value4 HRPWMx.BLyD #0011 value5 HRPWMx.BLyE #0100 value6 HRPWMx.BLyF #0101 value7 HRPWMx.BLyG #0110 value8 HRPWMx.BLyH #0111 value9 HRPWMx.BLyI #1000 value10 HRPWMx.BLyJ #1001 value11 HRPWMx.BLyK #1010 value12 HRPWMx.BLyL #1011 value13 HRPWMx.BLyM #1100 value14 HRPWMx.BLyN #1101 value15 HRPWMx.BLyO #1110 value16 HRPWMx.BLyP #1111 PLCL Clamping control signal level selection 8 1 read-write value1 Clamping control disabled #00 value2 Output is set to clamped level when the control signal is HIGH #01 value3 Output is set to clamped level when the control signal is LOW #10 PLEC Passive level enter configuration 12 1 read-write value1 Passive level is entered immediately #00 value2 Passive level is entered only after the comparator output passes to LOW (output from the blanking stage) #01 value3 Passive level is entered only after the comparator output passes to HIGH (output from the blanking stage) #10 PLSW Clamped state exit SW configuration 11 read-write value1 External signal and SW can remove the output from the clamped state #0 value2 Only SW can remove the output from the clamped state #1 PLXC Passive level exit configuration 14 1 read-write value1 Passive level is exit immediately #00 value2 Passive level is exit only after the comparator output passes to LOW (output from the blanking stage) #01 value3 Passive level is exit only after the comparator output passes to HIGH (output from the blanking stage) #10 PSL Output passive level value 10 read-write value1 Output clamped level is LOW #0 value2 Output clamped level is HIGH #1 SC Slope generation control 0x8 32 read-write n 0x0 0x0 FPD Fixed division disable 4 read-write value1 Division by 4 enabled #0 value2 Division by 4 disabled #1 GCFG Slope step gain configuration 18 1 read-write value1 Each slope step has an increment/decrement of 1 #00 value2 Each slope step has an increment/decrement of 2 #01 value3 Each slope step has an increment/decrement of 4 #10 value4 Each slope step has an increment/decrement of 8 #11 IST Immediate shadow transfer 20 read-write PSE Pulse swallow enable 21 read-write value1 Pulse swallow disabled #0 value2 Pulse swallow enabled #1 PSRM Prescaler external start configuration 0 1 read-write value1 External start trigger is ignored #00 value2 Start prescaler #01 value3 Clear prescaler #10 value4 Clear & Start prescaler #11 PSTM Prescaler external stop configuration 2 1 read-write value1 External stop trigger is ignored #00 value2 Stop prescaler #01 value3 Clear prescaler #10 value4 Clear & Stop prescaler #11 PSV Prescaler division factor 5 1 read-write value1 division by 1 #00 value2 division by 2 #01 value3 division by 4 #10 value4 division by 8 #11 PSWM Pulse swallow window mode 24 1 read-write value1 16 clock cycle window #00 value2 32 clock cycle window #01 value3 64 clock cycle window #10 SCM Slope control mode 8 1 read-write value1 Slope generation disabled. Used when the switch between the two reference values, CSGyDSV1This register contains the actual value used for the DSV1 reference. and CSGyDSV2This register contains the actual value used for the DSV2 reference. is done via external signal. #00 value2 Decrementing slope generation. #01 value3 Incrementing slope generation. #10 value4 Triangular slope generation. #11 SSRM Slope external start configuration 10 1 read-write value1 External start trigger is ignored #00 value2 Start/restart slope generation #01 value3 Resumes slope #10 SSTM Slope external stop configuration 12 1 read-write value1 External stop trigger is ignored #00 value2 Stops/Halts the slope generation #01 value3 Used in hybrid mode. It freezes the slope generation and feeds constantly the value programmed in CSGyDSV2This register contains the actual value used for the DSV2 reference. to the DAC. #10 SVSC Slope reference value mode 14 1 read-write value1 Only CSGyDSV1This register contains the actual value used for the DSV1 reference. value is used for the slope generation: if slope is incrementing, CSGyDSV1This register contains the actual value used for the DSV1 reference. is the bottom reference value from where the ramp starts; if decrementing, then CSGyDSV1This register contains the actual value used for the DSV1 reference. is the upper reference value from where the ramp starts. #00 value2 The two reference values are being used: CSGyDSV1This register contains the actual value used for the DSV1 reference. is the low or high reference value from where the ramp starts (incrementing or decrementing respectively); CSGyDSV2This register contains the actual value used for the DSV2 reference. is used as a static value (this value is constantly fed to the DAC after a stop trigger as been detected). #01 value3 The two reference values are used: CSGyDSV1This register contains the actual value used for the DSV1 reference. is the low or high reference value from where the slope starts (incrementing or decrementing respectively); CSGyDSV2This register contains the actual value used for the DSV2 reference. is used as an internal re start condition for the slope. #10 SWSM Initial DAC start mode 16 1 read-write value1 CSGyDSV2This register contains the actual value used for the DSV2 reference. is fed to the DAC and initial conversion trigger is generated. #00 value2 CSGyDSV1This register contains the actual value used for the DSV1 reference. is fed to the DAC and initial conversion trigger is generated. #01 value3 CSGyDSV2This register contains the actual value used for the DSV2 reference. is fed to the DAC but initial conversion trigger is not generated. #10 value4 CSGyDSV1This register contains the actual value used for the DSV1 reference. is fed to the DAC but initial conversion trigger is not generated. #11 SDSV1 Shadow reference value 1 0x18 32 read-write n 0x0 0x0 SDSV1 Shadow DAC reference value 1 0 9 read-write SPC Shadow Pulse swallow value 0x1C 32 read-write n 0x0 0x0 SPSWV Shadow pulse swallow value 0 5 read-write SRE Service request enable 0x2C 32 read-write n 0x0 0x0 CFSE Comparator fall interrupt enable 7 read-write CRSE Comparator rise interrupt enable 6 read-write CSEE Clamped state interrupt enable 8 read-write STDE Shadow transfer done interrupt enable 5 read-write STPSE Stop trigger interrupt enable 4 read-write STRSE Start trigger interrupt enable 3 read-write TRGSE Conversion trigger interrupt enable 2 read-write VLS1E Value switch from CSGyDSV1 to CSGyDSV2 interrupt enable 0 read-write VLS2E Value switch from CSGyDSV2 to CSGyDSV1 interrupt enable 1 read-write SRS Service request line selector 0x30 32 read-write n 0x0 0x0 CRFLS Comparator rise/fall interrupt line selection 10 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 CSLS Comparator clamped state interrupt line selection 12 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 SSLS Start/Stop trigger interrupt line selection 6 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 STLS Shadow transfer done interrupt line selection 8 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 TRLS Conversion trigger interrupt line selection 4 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 VLS1S Value switch from CSGyDSV1 to CSGyDSV2 interrupt line selection 0 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 VLS2S Value switch from CSGyDSV2 to CSGyDSV1 interrupt line selection 2 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 SWC Service request SW clear 0x38 32 read-write n 0x0 0x0 CCFS Comparator fall status clear 7 write-only CCRS Comparator rise status clear 6 write-only CCSS Comparator clamped status clear 8 write-only CSTD Shadow transfer status clear 5 write-only CSTPS Stop trigger status clear 4 write-only CSTRS Start trigger status clear 3 write-only CTRGS Conversion trigger status clear 2 write-only CVLS1 Value switch from CSGyDSV1 to CSGyDSV2 status clear 0 write-only CVLS2 Value switch from CSGyDSV2 to CSGyDSV1 status clear 1 write-only SWS Service request SW set 0x34 32 read-write n 0x0 0x0 SCFS Comparator fall status set 7 write-only SCRS Comparator rise status set 6 write-only SCSS Comparator clamped state status set 8 write-only SSTD Shadow transfer status set 5 write-only SSTPS Stop trigger status set 4 write-only SSTRS Start trigger status set 3 write-only STRGS Conversion trigger status set 2 write-only SVLS1 Value switch from CSGyDSV1 to CSGyDSV2 status set 0 write-only SVLS2 Value switch from CSGyDSV2 to CSGyDSV1 status set 1 write-only HRPWM0_CSG2 High Resolution PWM Unit HRPWM 0x0 0x0 0x100 registers n BLV Comparator blanking value 0x28 32 read-write n 0x0 0x0 BLV Blanking value 0 7 read-write CC Comparator configuration 0x20 32 read-write n 0x0 0x0 BLMC Blanking mode 14 1 read-write value1 Blanking disabled #00 value2 Blanking on a LOW to HIGH transition #01 value3 Blanking on a HIGH to LOW transition #10 value4 Blanking on both transitions #11 COFC Comparator output filter control 24 1 read-write value1 Filtering is always done if enabled #00 value2 Filtering is only done when CSGyDSV1 value is currently fed to the DAC #01 value3 Filtering is only done when the CSGyDSV2 value is currently fed to the DAC #10 COFE Comparator output filter enable 17 read-write value1 Filtering stage disabled #0 value2 Filtering stage enabled #1 COFM Comparator output filter window 18 3 read-write value1 Comparator Output needs to be stable for 2 clock cycles #0000 value2 Comparator Output needs to be stable for 3 clock cycles #0001 value3 Comparator Output needs to be stable for 4 clock cycles #0010 value4 Comparator Output needs to be stable for 5 clock cycles #0011 value5 Comparator Output needs to be stable for 14 clock cycles #1100 value6 Comparator Output needs to be stable for 15 clock cycles #1101 value7 Comparator Output needs to be stable for 16 clock cycles #1110 value8 Comparator Output needs to be stable for 32 clock cycles #1111 EBE External blanking trigger enabled 16 read-write ESE External triggered switch enable 11 read-write IBS External blanking trigger selector 0 3 read-write value1 HRPWMx.BLyA #0000 value2 HRPWMx.BLyB #0001 value3 HRPWMx.BLyC #0010 value4 HRPWMx.BLyD #0011 value5 HRPWMx.BLyE #0100 value6 HRPWMx.BLyF #0101 value7 HRPWMx.BLyG #0110 value8 HRPWMx.BLyH #0111 value9 HRPWMx.BLyI #1000 value10 HRPWMx.BLyJ #1001 value11 HRPWMx.BLyK #1010 value12 HRPWMx.BLyL #1011 value13 HRPWMx.BLyM #1100 value14 HRPWMx.BLyN #1101 value15 HRPWMx.BLyO #1110 value16 HRPWMx.BLyP #1111 IMCC Comparator input switching configuration 9 1 read-write value1 Dynamic switch disabled #00 value2 Comparator input is connected to HRPWMx.CyINB when the control signal is HIGH #01 value3 Comparator input is connected to HRPWMx.CyINA when the control signal is HIGH #10 IMCS Inverting comparator input selector 8 read-write value1 HRPWMx.CyINA #0 value2 HRPWMx.CyINB #1 OIE Comparator output inversion enable 12 read-write OSE Comparator output synchronization enable 13 read-write DCI External input selection 0x0 32 read-write n 0x0 0x0 SCS Slope generation clock selection 20 1 read-write value1 HRPWMx.MCLK (Module clock is used) #00 value2 HRPWMx.ECLKA (External clock is used) #01 value3 HRPWMx.ECLKB (External clock is used) #10 value4 HRPWMx.ECLKC (External clock is used) #11 STIS External shadow request enable input selection 16 3 read-write STPIS Slope generation stop control input selection 8 3 read-write STRIS Slope generation start control input selection 4 3 read-write SVIS Value Selector input selection 0 3 read-write value1 HRPWMx.SyIA #0000 value2 HRPWMx.SyIB #0001 value3 HRPWMx.SyIC #0010 value4 HRPWMx.SyID #0011 value5 HRPWMx.SyIE #0100 value6 HRPWMx.SyIF #0101 value7 HRPWMx.SyIG #0110 value8 HRPWMx.SyIH #0111 value9 HRPWMx.SyII #1000 value10 HRPWMx.SyIJ #1001 value11 HRPWMx.SyIK #1010 value12 HRPWMx.SyIL #1011 value13 HRPWMx.SyIM #1100 value14 HRPWMx.SyIN #1101 value15 HRPWMx.SyIO #1110 value16 HRPWMx.SyIP #1111 TRGIS External conversion trigger input selection 12 3 read-write DSV1 DAC reference value 1 0x10 32 read-write n 0x0 0x0 DSV1 DAC reference value 1 0 9 read-only DSV2 DAC reference value 1 0x14 32 read-write n 0x0 0x0 DSV2 DAC reference value 2 0 9 read-write IES External input selection 0x4 32 read-write n 0x0 0x0 STES External shadow transfer enable edge selection 8 1 read-write value1 Function disabled #00 value2 Active on rising edge #01 value3 Active on falling edge #10 value4 Active on both edges #11 STPES External stop function edge selection 4 1 read-write value1 Function disabled #00 value2 Active on rising edge #01 value3 Active on falling edge #10 value4 Active on both edges #11 STRES External start function edge selection 2 1 read-write value1 Function disabled #00 value2 Active on rising edge #01 value3 Active on falling edge #10 value4 Active on both edges #11 SVLS External value switch function level selection 0 1 read-write value1 Function disabled #00 value2 Active when input is HIGH #01 value3 Active when input is LOW #10 TRGES External trigger function edge selection 6 1 read-write value1 Function disabled #00 value2 Active on rising edge #01 value3 Active on falling edge #10 value4 Active on both edges #11 ISTAT Service request status 0x3C 32 read-write n 0x0 0x0 CFSS Comparator fall interrupt status 7 read-only value1 Comparator output HIGH to LOW transition not detected #0 value2 Comparator output HIGH to LOW transition detected #1 CRSS Comparator rise interrupt status 6 read-only value1 Comparator output LOW to HIGH transition not detected #0 value2 Comparator output LOW to HIGH transition detected #1 CSES Comparator clamped interrupt status 8 read-only value1 Comparator output has been set to the clamped state #0 value2 Comparator output has not been set to the clamped state #1 STDS Shadow transfer interrupt status 5 read-only value1 Shadow transfer was not performed #0 value2 Shadow transfer was performed #1 STPSS Stop trigger interrupt status 4 read-only value1 Stop trigger not detected #0 value2 Stop trigger detected #1 STRSS Start trigger interrupt status 3 read-only value1 Start trigger not detected #0 value2 Start trigger detected #1 TRGSS Conversion trigger status 2 read-only value1 Conversion trigger was not generated #0 value2 Conversion trigger was generated #1 VLS1S Value switch from CSGyDSV1 to CSGyDSV2 interrupt status 0 read-only value1 Value switch not detected #0 value2 Value switch detected #1 VLS2S Value switch from CSGyDSV2 to CSGyDSV1 interrupt status 1 read-only value1 Value switch not detected #0 value2 Value switch detected #1 PC Pulse swallow configuration 0xC 32 read-write n 0x0 0x0 PSWV Pulse swallow configuration 0 5 read-only PLC Passive level configuration 0x24 32 read-write n 0x0 0x0 IPLS Clamping control signal selector 0 3 read-write value1 HRPWMx.BLyA #0000 value2 HRPWMx.BLyB #0001 value3 HRPWMx.BLyC #0010 value4 HRPWMx.BLyD #0011 value5 HRPWMx.BLyE #0100 value6 HRPWMx.BLyF #0101 value7 HRPWMx.BLyG #0110 value8 HRPWMx.BLyH #0111 value9 HRPWMx.BLyI #1000 value10 HRPWMx.BLyJ #1001 value11 HRPWMx.BLyK #1010 value12 HRPWMx.BLyL #1011 value13 HRPWMx.BLyM #1100 value14 HRPWMx.BLyN #1101 value15 HRPWMx.BLyO #1110 value16 HRPWMx.BLyP #1111 PLCL Clamping control signal level selection 8 1 read-write value1 Clamping control disabled #00 value2 Output is set to clamped level when the control signal is HIGH #01 value3 Output is set to clamped level when the control signal is LOW #10 PLEC Passive level enter configuration 12 1 read-write value1 Passive level is entered immediately #00 value2 Passive level is entered only after the comparator output passes to LOW (output from the blanking stage) #01 value3 Passive level is entered only after the comparator output passes to HIGH (output from the blanking stage) #10 PLSW Clamped state exit SW configuration 11 read-write value1 External signal and SW can remove the output from the clamped state #0 value2 Only SW can remove the output from the clamped state #1 PLXC Passive level exit configuration 14 1 read-write value1 Passive level is exit immediately #00 value2 Passive level is exit only after the comparator output passes to LOW (output from the blanking stage) #01 value3 Passive level is exit only after the comparator output passes to HIGH (output from the blanking stage) #10 PSL Output passive level value 10 read-write value1 Output clamped level is LOW #0 value2 Output clamped level is HIGH #1 SC Slope generation control 0x8 32 read-write n 0x0 0x0 FPD Fixed division disable 4 read-write value1 Division by 4 enabled #0 value2 Division by 4 disabled #1 GCFG Slope step gain configuration 18 1 read-write value1 Each slope step has an increment/decrement of 1 #00 value2 Each slope step has an increment/decrement of 2 #01 value3 Each slope step has an increment/decrement of 4 #10 value4 Each slope step has an increment/decrement of 8 #11 IST Immediate shadow transfer 20 read-write PSE Pulse swallow enable 21 read-write value1 Pulse swallow disabled #0 value2 Pulse swallow enabled #1 PSRM Prescaler external start configuration 0 1 read-write value1 External start trigger is ignored #00 value2 Start prescaler #01 value3 Clear prescaler #10 value4 Clear & Start prescaler #11 PSTM Prescaler external stop configuration 2 1 read-write value1 External stop trigger is ignored #00 value2 Stop prescaler #01 value3 Clear prescaler #10 value4 Clear & Stop prescaler #11 PSV Prescaler division factor 5 1 read-write value1 division by 1 #00 value2 division by 2 #01 value3 division by 4 #10 value4 division by 8 #11 PSWM Pulse swallow window mode 24 1 read-write value1 16 clock cycle window #00 value2 32 clock cycle window #01 value3 64 clock cycle window #10 SCM Slope control mode 8 1 read-write value1 Slope generation disabled. Used when the switch between the two reference values, CSGyDSV1This register contains the actual value used for the DSV1 reference. and CSGyDSV2This register contains the actual value used for the DSV2 reference. is done via external signal. #00 value2 Decrementing slope generation. #01 value3 Incrementing slope generation. #10 value4 Triangular slope generation. #11 SSRM Slope external start configuration 10 1 read-write value1 External start trigger is ignored #00 value2 Start/restart slope generation #01 value3 Resumes slope #10 SSTM Slope external stop configuration 12 1 read-write value1 External stop trigger is ignored #00 value2 Stops/Halts the slope generation #01 value3 Used in hybrid mode. It freezes the slope generation and feeds constantly the value programmed in CSGyDSV2This register contains the actual value used for the DSV2 reference. to the DAC. #10 SVSC Slope reference value mode 14 1 read-write value1 Only CSGyDSV1This register contains the actual value used for the DSV1 reference. value is used for the slope generation: if slope is incrementing, CSGyDSV1This register contains the actual value used for the DSV1 reference. is the bottom reference value from where the ramp starts; if decrementing, then CSGyDSV1This register contains the actual value used for the DSV1 reference. is the upper reference value from where the ramp starts. #00 value2 The two reference values are being used: CSGyDSV1This register contains the actual value used for the DSV1 reference. is the low or high reference value from where the ramp starts (incrementing or decrementing respectively); CSGyDSV2This register contains the actual value used for the DSV2 reference. is used as a static value (this value is constantly fed to the DAC after a stop trigger as been detected). #01 value3 The two reference values are used: CSGyDSV1This register contains the actual value used for the DSV1 reference. is the low or high reference value from where the slope starts (incrementing or decrementing respectively); CSGyDSV2This register contains the actual value used for the DSV2 reference. is used as an internal re start condition for the slope. #10 SWSM Initial DAC start mode 16 1 read-write value1 CSGyDSV2This register contains the actual value used for the DSV2 reference. is fed to the DAC and initial conversion trigger is generated. #00 value2 CSGyDSV1This register contains the actual value used for the DSV1 reference. is fed to the DAC and initial conversion trigger is generated. #01 value3 CSGyDSV2This register contains the actual value used for the DSV2 reference. is fed to the DAC but initial conversion trigger is not generated. #10 value4 CSGyDSV1This register contains the actual value used for the DSV1 reference. is fed to the DAC but initial conversion trigger is not generated. #11 SDSV1 Shadow reference value 1 0x18 32 read-write n 0x0 0x0 SDSV1 Shadow DAC reference value 1 0 9 read-write SPC Shadow Pulse swallow value 0x1C 32 read-write n 0x0 0x0 SPSWV Shadow pulse swallow value 0 5 read-write SRE Service request enable 0x2C 32 read-write n 0x0 0x0 CFSE Comparator fall interrupt enable 7 read-write CRSE Comparator rise interrupt enable 6 read-write CSEE Clamped state interrupt enable 8 read-write STDE Shadow transfer done interrupt enable 5 read-write STPSE Stop trigger interrupt enable 4 read-write STRSE Start trigger interrupt enable 3 read-write TRGSE Conversion trigger interrupt enable 2 read-write VLS1E Value switch from CSGyDSV1 to CSGyDSV2 interrupt enable 0 read-write VLS2E Value switch from CSGyDSV2 to CSGyDSV1 interrupt enable 1 read-write SRS Service request line selector 0x30 32 read-write n 0x0 0x0 CRFLS Comparator rise/fall interrupt line selection 10 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 CSLS Comparator clamped state interrupt line selection 12 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 SSLS Start/Stop trigger interrupt line selection 6 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 STLS Shadow transfer done interrupt line selection 8 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 TRLS Conversion trigger interrupt line selection 4 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 VLS1S Value switch from CSGyDSV1 to CSGyDSV2 interrupt line selection 0 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 VLS2S Value switch from CSGyDSV2 to CSGyDSV1 interrupt line selection 2 1 read-write value1 CSGySR0 #00 value2 CSGySR1 #01 value3 CSGySR2 #10 value4 CSGySR3 #11 SWC Service request SW clear 0x38 32 read-write n 0x0 0x0 CCFS Comparator fall status clear 7 write-only CCRS Comparator rise status clear 6 write-only CCSS Comparator clamped status clear 8 write-only CSTD Shadow transfer status clear 5 write-only CSTPS Stop trigger status clear 4 write-only CSTRS Start trigger status clear 3 write-only CTRGS Conversion trigger status clear 2 write-only CVLS1 Value switch from CSGyDSV1 to CSGyDSV2 status clear 0 write-only CVLS2 Value switch from CSGyDSV2 to CSGyDSV1 status clear 1 write-only SWS Service request SW set 0x34 32 read-write n 0x0 0x0 SCFS Comparator fall status set 7 write-only SCRS Comparator rise status set 6 write-only SCSS Comparator clamped state status set 8 write-only SSTD Shadow transfer status set 5 write-only SSTPS Stop trigger status set 4 write-only SSTRS Start trigger status set 3 write-only STRGS Conversion trigger status set 2 write-only SVLS1 Value switch from CSGyDSV1 to CSGyDSV2 status set 0 write-only SVLS2 Value switch from CSGyDSV2 to CSGyDSV1 status set 1 write-only HRPWM0_HRC0 High Resolution PWM Unit HRPWM 0x0 0x0 0x100 registers n CR1 HRC rising edge value 0x1C 32 read-write n 0x0 0x0 CR1 High resolution rising edge value 0 7 read-only CR2 HRC falling edge value 0x20 32 read-write n 0x0 0x0 CR2 High resolution falling edge value 0 7 read-only DCF HRC dead time falling value 0x18 32 read-write n 0x0 0x0 DTFV Dead time falling value 0 15 read-only DCR HRC dead time rising value 0x14 32 read-write n 0x0 0x0 DTRV Dead time rising value 0 15 read-only GC HRC mode configuration 0x0 32 read-write n 0x0 0x0 DSTC HRCy dead time shadow transfer configuration 12 read-write value1 HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is not linked with the specific Capture/Compare Unit timer. #0 value2 HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is linked with the specific Capture/Compare Unit timer. #1 DTE HRCy dead time enable 8 read-write value1 Dead time insertion is disabled #0 value2 Dead time insertion is enabled #1 DTUS Dead Time update trigger selector 16 read-write value1 The update of the values is done with the trigger generated by the timers. This is the same trigger that is used to update the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, .. #0 value2 The update of the dead time values is done when the dead time counter is not running, independently of the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . registers. #1 HRM0 HRCy high resolution mode configuration for source selector 0 0 1 read-write value1 Rising edge high resolution signal positioning enabled #00 value2 Falling edge high resolution signal positioning enabled #01 value3 Both edges high resolution signal positioning is enabled #10 value4 No high resolution positioning #11 HRM1 HRCy high resolution mode configuration for source selector 1 2 1 read-write value1 Rising edge high resolution signal positioning enabled #00 value2 Falling edge high resolution signal positioning enabled #01 value3 Both edges high resolution signal positioning is enabled #10 value4 No high resolution positioning #11 OCS0 HRPWMx.OUTy0 channel selector 13 read-write value1 HRPWMx.OUTy0 is connected to the latch Q channel #0 value2 HRPWMx.OUTy0 is connected to the latch Qn channel #1 OCS1 HRPWMx.OUTy1 channel selector 14 read-write value1 HRPWMx.OUTy1 is connected to the latch Qn channel #0 value2 HRPWMx.OUTy1 is connected to the latch Q channel #1 STC HRCy shadow transfer configuration 11 read-write value1 HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is not linked with the specific Capture/Compare Unit timer. #0 value2 HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is linked with the specific Capture/Compare Unit timer. #1 TR0E HRCy trap enable 9 read-write value1 Trap function for HRPWMx.HROUTy0 is disabled #0 value2 Trap function for HRPWMx.HROUTy0 is enabled #1 TR1E HRCy complementary trap enable 10 read-write value1 Trap function for HRPWMx.HROUTy1 is disabled #0 value2 Trap function for HRPWMx.HROUTy1 is enabled #1 GSEL HRC global control selection 0x8 32 read-write n 0x0 0x0 C0CS Source selector 0 comparator clear configuration 3 2 read-write value1 CMP output of CSG0 unit can be used as clear source for the output latch #000 value2 CMP output of CSG1 unit can be used as clear source for the output latch #001 value3 CMP output of CSG2 unit can be used as clear source for the output latch #010 C0ES Source selector 0 clear edge configuration 12 1 read-write value1 Generation of the clear signal is disabled #00 value2 Clear signal is generated on a LOW to HIGH transition of the selected input #01 value3 Clear signal is generated on a HIGH to LOW transition of the selected input #10 value4 Clear signal is generated on both transitions of the selected input #11 C0M Source selector 0 clear configuration 8 1 read-write value1 Clear from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Clear from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0CS field. #01 C0SS Source selector 0 comparator set configuration 0 2 read-write value1 CMP output of CSG0 unit can be used as set source for the output latch #000 value2 CMP output of CSG1 unit can be used as set source for the output latch #001 value3 CMP output of CSG2 unit can be used as set source for the output latch #010 C1CS Source selector 1 comparator clear configuration 19 2 read-write value1 CMP output of CSG0 unit can be used as clear source for the output latch #000 value2 CMP output of CSG2 unit can be used as clear source for the output latch #001 value3 CMP output of CSG2 unit can be used as clear source for the output latch #010 C1ES Source selector 1 clear edge configuration 28 1 read-write value1 Generation of the clear signal is disabled #00 value2 Clear signal is generated on a LOW to HIGH transition of the selected input #01 value3 Clear signal is generated on a HIGH to LOW transition of the selected input #10 value4 Clear signal is generated on both transitions of the selected input #11 C1M Source selector 1 clear configuration 24 1 read-write value1 Clear from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Clear from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1CS field. #01 C1SS Source selector 1 comparator set configuration 16 2 read-write value1 CMP output of CSG0 unit can be used as set source for the output latch #000 value2 CMP output of CSG2 unit can be used as set source for the output latch #001 value3 CMP output of CSG2 unit can be used as set source for the output latch #010 S0ES Source selector 0 set edge configuration 10 1 read-write value1 Generation of the set signal is disabled #00 value2 Set signal is generated on a LOW to HIGH transition of the selected input #01 value3 Set signal is generated on a HIGH to LOW transition of the selected input #10 value4 Set signal is generated on both transitions of the selected input #11 S0M Source selector 0 set configuration 6 1 read-write value1 Set from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Set from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0SS field. #01 S1ES Source selector 1 set edge configuration 26 1 read-write value1 Generation of the set signal is disabled #00 value2 Set signal is generated on a LOW to HIGH transition of the selected input #01 value3 Set signal is generated on a HIGH to LOW transition of the selected input #10 value4 Set signal is generated on both transitions of the selected input #11 S1M Source selector 1 set configuration 22 1 read-write value1 Set from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Set from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1SS field. #01 PL HRC output passive level 0x4 32 read-write n 0x0 0x0 PSL0 HRPWMx.OUTy0 passive level 0 read-write value1 HRPWMx.OUTy0 output passive level is set to LOW #0 value2 HRPWMx.OUTy0 output passive level is set to HIGH #1 PSL1 HRPWMx.OUTy1 passive level 1 read-write value1 HRPWMx.OUTy1 output passive level is set to LOW #0 value2 HRPWMx.OUTy1 output passive level is set to HIGH #1 SC HRC current source for shadow 0x10 32 read-write n 0x0 0x0 ST Source selector for the shadow transfer 0 read-only value1 Shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 0. #0 value2 Shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 1. #1 SCR1 HRC shadow rising edge value 0x30 32 read-write n 0x0 0x0 SCR1 High resolution falling edge value 0 7 read-write SCR2 HRC shadow falling edge value 0x34 32 read-write n 0x0 0x0 SCR2 High resolution rising edge value 0 7 read-write SDCF HRC shadow dead time falling 0x2C 32 read-write n 0x0 0x0 SDTFV Shadow dead time falling value 0 15 read-write SDCR HRC shadow dead time rising 0x28 32 read-write n 0x0 0x0 SDTRV Shadow dead time rising value 0 15 read-write SSC HRC next source for shadow 0x24 32 read-write n 0x0 0x0 SST Source selector for the shadow transfer 0 read-write value1 Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 0. #0 value2 Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 1. #1 TSEL HRC timer selection 0xC 32 read-write n 0x0 0x0 TS0E Source selector 0 TRAP enable 16 read-write value1 TRAP signal generated from the Timer connected to Source Selector 0 is disabled. #0 value2 TRAP signal generated from the Timer connected to Source Selector 0 is enabled. #1 TS1E Source selector 1 TRAP enable 17 read-write value1 TRAP signal generated from the Timer connected to Source Selector 1 is disabled. #0 value2 TRAP signal generated from the Timer connected to Source Selector 1 is enabled. #1 TSEL0 Source Selector 0 Timer connection 0 2 read-write value1 Source Selector 0 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used) #000 value2 Source Selector 0 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used) #001 value3 Source Selector 0 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used) #010 value4 Source Selector 0 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used) #011 TSEL1 Source Selector 1 Timer connection 3 2 read-write value1 Source Selector 1 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used) #000 value2 Source Selector 1 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used) #001 value3 Source Selector 1 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used) #010 value4 Source Selector 1 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used) #011 HRPWM0_HRC1 High Resolution PWM Unit HRPWM 0x0 0x0 0x100 registers n CR1 HRC rising edge value 0x1C 32 read-write n 0x0 0x0 CR1 High resolution rising edge value 0 7 read-only CR2 HRC falling edge value 0x20 32 read-write n 0x0 0x0 CR2 High resolution falling edge value 0 7 read-only DCF HRC dead time falling value 0x18 32 read-write n 0x0 0x0 DTFV Dead time falling value 0 15 read-only DCR HRC dead time rising value 0x14 32 read-write n 0x0 0x0 DTRV Dead time rising value 0 15 read-only GC HRC mode configuration 0x0 32 read-write n 0x0 0x0 DSTC HRCy dead time shadow transfer configuration 12 read-write value1 HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is not linked with the specific Capture/Compare Unit timer. #0 value2 HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is linked with the specific Capture/Compare Unit timer. #1 DTE HRCy dead time enable 8 read-write value1 Dead time insertion is disabled #0 value2 Dead time insertion is enabled #1 DTUS Dead Time update trigger selector 16 read-write value1 The update of the values is done with the trigger generated by the timers. This is the same trigger that is used to update the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, .. #0 value2 The update of the dead time values is done when the dead time counter is not running, independently of the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . registers. #1 HRM0 HRCy high resolution mode configuration for source selector 0 0 1 read-write value1 Rising edge high resolution signal positioning enabled #00 value2 Falling edge high resolution signal positioning enabled #01 value3 Both edges high resolution signal positioning is enabled #10 value4 No high resolution positioning #11 HRM1 HRCy high resolution mode configuration for source selector 1 2 1 read-write value1 Rising edge high resolution signal positioning enabled #00 value2 Falling edge high resolution signal positioning enabled #01 value3 Both edges high resolution signal positioning is enabled #10 value4 No high resolution positioning #11 OCS0 HRPWMx.OUTy0 channel selector 13 read-write value1 HRPWMx.OUTy0 is connected to the latch Q channel #0 value2 HRPWMx.OUTy0 is connected to the latch Qn channel #1 OCS1 HRPWMx.OUTy1 channel selector 14 read-write value1 HRPWMx.OUTy1 is connected to the latch Qn channel #0 value2 HRPWMx.OUTy1 is connected to the latch Q channel #1 STC HRCy shadow transfer configuration 11 read-write value1 HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is not linked with the specific Capture/Compare Unit timer. #0 value2 HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is linked with the specific Capture/Compare Unit timer. #1 TR0E HRCy trap enable 9 read-write value1 Trap function for HRPWMx.HROUTy0 is disabled #0 value2 Trap function for HRPWMx.HROUTy0 is enabled #1 TR1E HRCy complementary trap enable 10 read-write value1 Trap function for HRPWMx.HROUTy1 is disabled #0 value2 Trap function for HRPWMx.HROUTy1 is enabled #1 GSEL HRC global control selection 0x8 32 read-write n 0x0 0x0 C0CS Source selector 0 comparator clear configuration 3 2 read-write value1 CMP output of CSG0 unit can be used as clear source for the output latch #000 value2 CMP output of CSG1 unit can be used as clear source for the output latch #001 value3 CMP output of CSG2 unit can be used as clear source for the output latch #010 C0ES Source selector 0 clear edge configuration 12 1 read-write value1 Generation of the clear signal is disabled #00 value2 Clear signal is generated on a LOW to HIGH transition of the selected input #01 value3 Clear signal is generated on a HIGH to LOW transition of the selected input #10 value4 Clear signal is generated on both transitions of the selected input #11 C0M Source selector 0 clear configuration 8 1 read-write value1 Clear from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Clear from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0CS field. #01 C0SS Source selector 0 comparator set configuration 0 2 read-write value1 CMP output of CSG0 unit can be used as set source for the output latch #000 value2 CMP output of CSG1 unit can be used as set source for the output latch #001 value3 CMP output of CSG2 unit can be used as set source for the output latch #010 C1CS Source selector 1 comparator clear configuration 19 2 read-write value1 CMP output of CSG0 unit can be used as clear source for the output latch #000 value2 CMP output of CSG2 unit can be used as clear source for the output latch #001 value3 CMP output of CSG2 unit can be used as clear source for the output latch #010 C1ES Source selector 1 clear edge configuration 28 1 read-write value1 Generation of the clear signal is disabled #00 value2 Clear signal is generated on a LOW to HIGH transition of the selected input #01 value3 Clear signal is generated on a HIGH to LOW transition of the selected input #10 value4 Clear signal is generated on both transitions of the selected input #11 C1M Source selector 1 clear configuration 24 1 read-write value1 Clear from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Clear from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1CS field. #01 C1SS Source selector 1 comparator set configuration 16 2 read-write value1 CMP output of CSG0 unit can be used as set source for the output latch #000 value2 CMP output of CSG2 unit can be used as set source for the output latch #001 value3 CMP output of CSG2 unit can be used as set source for the output latch #010 S0ES Source selector 0 set edge configuration 10 1 read-write value1 Generation of the set signal is disabled #00 value2 Set signal is generated on a LOW to HIGH transition of the selected input #01 value3 Set signal is generated on a HIGH to LOW transition of the selected input #10 value4 Set signal is generated on both transitions of the selected input #11 S0M Source selector 0 set configuration 6 1 read-write value1 Set from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Set from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0SS field. #01 S1ES Source selector 1 set edge configuration 26 1 read-write value1 Generation of the set signal is disabled #00 value2 Set signal is generated on a LOW to HIGH transition of the selected input #01 value3 Set signal is generated on a HIGH to LOW transition of the selected input #10 value4 Set signal is generated on both transitions of the selected input #11 S1M Source selector 1 set configuration 22 1 read-write value1 Set from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Set from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1SS field. #01 PL HRC output passive level 0x4 32 read-write n 0x0 0x0 PSL0 HRPWMx.OUTy0 passive level 0 read-write value1 HRPWMx.OUTy0 output passive level is set to LOW #0 value2 HRPWMx.OUTy0 output passive level is set to HIGH #1 PSL1 HRPWMx.OUTy1 passive level 1 read-write value1 HRPWMx.OUTy1 output passive level is set to LOW #0 value2 HRPWMx.OUTy1 output passive level is set to HIGH #1 SC HRC current source for shadow 0x10 32 read-write n 0x0 0x0 ST Source selector for the shadow transfer 0 read-only value1 Shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 0. #0 value2 Shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 1. #1 SCR1 HRC shadow rising edge value 0x30 32 read-write n 0x0 0x0 SCR1 High resolution falling edge value 0 7 read-write SCR2 HRC shadow falling edge value 0x34 32 read-write n 0x0 0x0 SCR2 High resolution rising edge value 0 7 read-write SDCF HRC shadow dead time falling 0x2C 32 read-write n 0x0 0x0 SDTFV Shadow dead time falling value 0 15 read-write SDCR HRC shadow dead time rising 0x28 32 read-write n 0x0 0x0 SDTRV Shadow dead time rising value 0 15 read-write SSC HRC next source for shadow 0x24 32 read-write n 0x0 0x0 SST Source selector for the shadow transfer 0 read-write value1 Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 0. #0 value2 Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 1. #1 TSEL HRC timer selection 0xC 32 read-write n 0x0 0x0 TS0E Source selector 0 TRAP enable 16 read-write value1 TRAP signal generated from the Timer connected to Source Selector 0 is disabled. #0 value2 TRAP signal generated from the Timer connected to Source Selector 0 is enabled. #1 TS1E Source selector 1 TRAP enable 17 read-write value1 TRAP signal generated from the Timer connected to Source Selector 1 is disabled. #0 value2 TRAP signal generated from the Timer connected to Source Selector 1 is enabled. #1 TSEL0 Source Selector 0 Timer connection 0 2 read-write value1 Source Selector 0 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used) #000 value2 Source Selector 0 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used) #001 value3 Source Selector 0 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used) #010 value4 Source Selector 0 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used) #011 TSEL1 Source Selector 1 Timer connection 3 2 read-write value1 Source Selector 1 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used) #000 value2 Source Selector 1 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used) #001 value3 Source Selector 1 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used) #010 value4 Source Selector 1 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used) #011 HRPWM0_HRC2 High Resolution PWM Unit HRPWM 0x0 0x0 0x100 registers n CR1 HRC rising edge value 0x1C 32 read-write n 0x0 0x0 CR1 High resolution rising edge value 0 7 read-only CR2 HRC falling edge value 0x20 32 read-write n 0x0 0x0 CR2 High resolution falling edge value 0 7 read-only DCF HRC dead time falling value 0x18 32 read-write n 0x0 0x0 DTFV Dead time falling value 0 15 read-only DCR HRC dead time rising value 0x14 32 read-write n 0x0 0x0 DTRV Dead time rising value 0 15 read-only GC HRC mode configuration 0x0 32 read-write n 0x0 0x0 DSTC HRCy dead time shadow transfer configuration 12 read-write value1 HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is not linked with the specific Capture/Compare Unit timer. #0 value2 HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is linked with the specific Capture/Compare Unit timer. #1 DTE HRCy dead time enable 8 read-write value1 Dead time insertion is disabled #0 value2 Dead time insertion is enabled #1 DTUS Dead Time update trigger selector 16 read-write value1 The update of the values is done with the trigger generated by the timers. This is the same trigger that is used to update the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, .. #0 value2 The update of the dead time values is done when the dead time counter is not running, independently of the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . registers. #1 HRM0 HRCy high resolution mode configuration for source selector 0 0 1 read-write value1 Rising edge high resolution signal positioning enabled #00 value2 Falling edge high resolution signal positioning enabled #01 value3 Both edges high resolution signal positioning is enabled #10 value4 No high resolution positioning #11 HRM1 HRCy high resolution mode configuration for source selector 1 2 1 read-write value1 Rising edge high resolution signal positioning enabled #00 value2 Falling edge high resolution signal positioning enabled #01 value3 Both edges high resolution signal positioning is enabled #10 value4 No high resolution positioning #11 OCS0 HRPWMx.OUTy0 channel selector 13 read-write value1 HRPWMx.OUTy0 is connected to the latch Q channel #0 value2 HRPWMx.OUTy0 is connected to the latch Qn channel #1 OCS1 HRPWMx.OUTy1 channel selector 14 read-write value1 HRPWMx.OUTy1 is connected to the latch Qn channel #0 value2 HRPWMx.OUTy1 is connected to the latch Q channel #1 STC HRCy shadow transfer configuration 11 read-write value1 HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is not linked with the specific Capture/Compare Unit timer. #0 value2 HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is linked with the specific Capture/Compare Unit timer. #1 TR0E HRCy trap enable 9 read-write value1 Trap function for HRPWMx.HROUTy0 is disabled #0 value2 Trap function for HRPWMx.HROUTy0 is enabled #1 TR1E HRCy complementary trap enable 10 read-write value1 Trap function for HRPWMx.HROUTy1 is disabled #0 value2 Trap function for HRPWMx.HROUTy1 is enabled #1 GSEL HRC global control selection 0x8 32 read-write n 0x0 0x0 C0CS Source selector 0 comparator clear configuration 3 2 read-write value1 CMP output of CSG0 unit can be used as clear source for the output latch #000 value2 CMP output of CSG1 unit can be used as clear source for the output latch #001 value3 CMP output of CSG2 unit can be used as clear source for the output latch #010 C0ES Source selector 0 clear edge configuration 12 1 read-write value1 Generation of the clear signal is disabled #00 value2 Clear signal is generated on a LOW to HIGH transition of the selected input #01 value3 Clear signal is generated on a HIGH to LOW transition of the selected input #10 value4 Clear signal is generated on both transitions of the selected input #11 C0M Source selector 0 clear configuration 8 1 read-write value1 Clear from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Clear from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0CS field. #01 C0SS Source selector 0 comparator set configuration 0 2 read-write value1 CMP output of CSG0 unit can be used as set source for the output latch #000 value2 CMP output of CSG1 unit can be used as set source for the output latch #001 value3 CMP output of CSG2 unit can be used as set source for the output latch #010 C1CS Source selector 1 comparator clear configuration 19 2 read-write value1 CMP output of CSG0 unit can be used as clear source for the output latch #000 value2 CMP output of CSG2 unit can be used as clear source for the output latch #001 value3 CMP output of CSG2 unit can be used as clear source for the output latch #010 C1ES Source selector 1 clear edge configuration 28 1 read-write value1 Generation of the clear signal is disabled #00 value2 Clear signal is generated on a LOW to HIGH transition of the selected input #01 value3 Clear signal is generated on a HIGH to LOW transition of the selected input #10 value4 Clear signal is generated on both transitions of the selected input #11 C1M Source selector 1 clear configuration 24 1 read-write value1 Clear from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Clear from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1CS field. #01 C1SS Source selector 1 comparator set configuration 16 2 read-write value1 CMP output of CSG0 unit can be used as set source for the output latch #000 value2 CMP output of CSG2 unit can be used as set source for the output latch #001 value3 CMP output of CSG2 unit can be used as set source for the output latch #010 S0ES Source selector 0 set edge configuration 10 1 read-write value1 Generation of the set signal is disabled #00 value2 Set signal is generated on a LOW to HIGH transition of the selected input #01 value3 Set signal is generated on a HIGH to LOW transition of the selected input #10 value4 Set signal is generated on both transitions of the selected input #11 S0M Source selector 0 set configuration 6 1 read-write value1 Set from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Set from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0SS field. #01 S1ES Source selector 1 set edge configuration 26 1 read-write value1 Generation of the set signal is disabled #00 value2 Set signal is generated on a LOW to HIGH transition of the selected input #01 value3 Set signal is generated on a HIGH to LOW transition of the selected input #10 value4 Set signal is generated on both transitions of the selected input #11 S1M Source selector 1 set configuration 22 1 read-write value1 Set from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Set from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1SS field. #01 PL HRC output passive level 0x4 32 read-write n 0x0 0x0 PSL0 HRPWMx.OUTy0 passive level 0 read-write value1 HRPWMx.OUTy0 output passive level is set to LOW #0 value2 HRPWMx.OUTy0 output passive level is set to HIGH #1 PSL1 HRPWMx.OUTy1 passive level 1 read-write value1 HRPWMx.OUTy1 output passive level is set to LOW #0 value2 HRPWMx.OUTy1 output passive level is set to HIGH #1 SC HRC current source for shadow 0x10 32 read-write n 0x0 0x0 ST Source selector for the shadow transfer 0 read-only value1 Shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 0. #0 value2 Shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 1. #1 SCR1 HRC shadow rising edge value 0x30 32 read-write n 0x0 0x0 SCR1 High resolution falling edge value 0 7 read-write SCR2 HRC shadow falling edge value 0x34 32 read-write n 0x0 0x0 SCR2 High resolution rising edge value 0 7 read-write SDCF HRC shadow dead time falling 0x2C 32 read-write n 0x0 0x0 SDTFV Shadow dead time falling value 0 15 read-write SDCR HRC shadow dead time rising 0x28 32 read-write n 0x0 0x0 SDTRV Shadow dead time rising value 0 15 read-write SSC HRC next source for shadow 0x24 32 read-write n 0x0 0x0 SST Source selector for the shadow transfer 0 read-write value1 Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 0. #0 value2 Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 1. #1 TSEL HRC timer selection 0xC 32 read-write n 0x0 0x0 TS0E Source selector 0 TRAP enable 16 read-write value1 TRAP signal generated from the Timer connected to Source Selector 0 is disabled. #0 value2 TRAP signal generated from the Timer connected to Source Selector 0 is enabled. #1 TS1E Source selector 1 TRAP enable 17 read-write value1 TRAP signal generated from the Timer connected to Source Selector 1 is disabled. #0 value2 TRAP signal generated from the Timer connected to Source Selector 1 is enabled. #1 TSEL0 Source Selector 0 Timer connection 0 2 read-write value1 Source Selector 0 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used) #000 value2 Source Selector 0 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used) #001 value3 Source Selector 0 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used) #010 value4 Source Selector 0 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used) #011 TSEL1 Source Selector 1 Timer connection 3 2 read-write value1 Source Selector 1 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used) #000 value2 Source Selector 1 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used) #001 value3 Source Selector 1 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used) #010 value4 Source Selector 1 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used) #011 HRPWM0_HRC3 High Resolution PWM Unit HRPWM 0x0 0x0 0x100 registers n CR1 HRC rising edge value 0x1C 32 read-write n 0x0 0x0 CR1 High resolution rising edge value 0 7 read-only CR2 HRC falling edge value 0x20 32 read-write n 0x0 0x0 CR2 High resolution falling edge value 0 7 read-only DCF HRC dead time falling value 0x18 32 read-write n 0x0 0x0 DTFV Dead time falling value 0 15 read-only DCR HRC dead time rising value 0x14 32 read-write n 0x0 0x0 DTRV Dead time rising value 0 15 read-only GC HRC mode configuration 0x0 32 read-write n 0x0 0x0 DSTC HRCy dead time shadow transfer configuration 12 read-write value1 HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is not linked with the specific Capture/Compare Unit timer. #0 value2 HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is linked with the specific Capture/Compare Unit timer. #1 DTE HRCy dead time enable 8 read-write value1 Dead time insertion is disabled #0 value2 Dead time insertion is enabled #1 DTUS Dead Time update trigger selector 16 read-write value1 The update of the values is done with the trigger generated by the timers. This is the same trigger that is used to update the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, .. #0 value2 The update of the dead time values is done when the dead time counter is not running, independently of the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . registers. #1 HRM0 HRCy high resolution mode configuration for source selector 0 0 1 read-write value1 Rising edge high resolution signal positioning enabled #00 value2 Falling edge high resolution signal positioning enabled #01 value3 Both edges high resolution signal positioning is enabled #10 value4 No high resolution positioning #11 HRM1 HRCy high resolution mode configuration for source selector 1 2 1 read-write value1 Rising edge high resolution signal positioning enabled #00 value2 Falling edge high resolution signal positioning enabled #01 value3 Both edges high resolution signal positioning is enabled #10 value4 No high resolution positioning #11 OCS0 HRPWMx.OUTy0 channel selector 13 read-write value1 HRPWMx.OUTy0 is connected to the latch Q channel #0 value2 HRPWMx.OUTy0 is connected to the latch Qn channel #1 OCS1 HRPWMx.OUTy1 channel selector 14 read-write value1 HRPWMx.OUTy1 is connected to the latch Qn channel #0 value2 HRPWMx.OUTy1 is connected to the latch Q channel #1 STC HRCy shadow transfer configuration 11 read-write value1 HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is not linked with the specific Capture/Compare Unit timer. #0 value2 HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is linked with the specific Capture/Compare Unit timer. #1 TR0E HRCy trap enable 9 read-write value1 Trap function for HRPWMx.HROUTy0 is disabled #0 value2 Trap function for HRPWMx.HROUTy0 is enabled #1 TR1E HRCy complementary trap enable 10 read-write value1 Trap function for HRPWMx.HROUTy1 is disabled #0 value2 Trap function for HRPWMx.HROUTy1 is enabled #1 GSEL HRC global control selection 0x8 32 read-write n 0x0 0x0 C0CS Source selector 0 comparator clear configuration 3 2 read-write value1 CMP output of CSG0 unit can be used as clear source for the output latch #000 value2 CMP output of CSG1 unit can be used as clear source for the output latch #001 value3 CMP output of CSG2 unit can be used as clear source for the output latch #010 C0ES Source selector 0 clear edge configuration 12 1 read-write value1 Generation of the clear signal is disabled #00 value2 Clear signal is generated on a LOW to HIGH transition of the selected input #01 value3 Clear signal is generated on a HIGH to LOW transition of the selected input #10 value4 Clear signal is generated on both transitions of the selected input #11 C0M Source selector 0 clear configuration 8 1 read-write value1 Clear from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Clear from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0CS field. #01 C0SS Source selector 0 comparator set configuration 0 2 read-write value1 CMP output of CSG0 unit can be used as set source for the output latch #000 value2 CMP output of CSG1 unit can be used as set source for the output latch #001 value3 CMP output of CSG2 unit can be used as set source for the output latch #010 C1CS Source selector 1 comparator clear configuration 19 2 read-write value1 CMP output of CSG0 unit can be used as clear source for the output latch #000 value2 CMP output of CSG2 unit can be used as clear source for the output latch #001 value3 CMP output of CSG2 unit can be used as clear source for the output latch #010 C1ES Source selector 1 clear edge configuration 28 1 read-write value1 Generation of the clear signal is disabled #00 value2 Clear signal is generated on a LOW to HIGH transition of the selected input #01 value3 Clear signal is generated on a HIGH to LOW transition of the selected input #10 value4 Clear signal is generated on both transitions of the selected input #11 C1M Source selector 1 clear configuration 24 1 read-write value1 Clear from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Clear from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1CS field. #01 C1SS Source selector 1 comparator set configuration 16 2 read-write value1 CMP output of CSG0 unit can be used as set source for the output latch #000 value2 CMP output of CSG2 unit can be used as set source for the output latch #001 value3 CMP output of CSG2 unit can be used as set source for the output latch #010 S0ES Source selector 0 set edge configuration 10 1 read-write value1 Generation of the set signal is disabled #00 value2 Set signal is generated on a LOW to HIGH transition of the selected input #01 value3 Set signal is generated on a HIGH to LOW transition of the selected input #10 value4 Set signal is generated on both transitions of the selected input #11 S0M Source selector 0 set configuration 6 1 read-write value1 Set from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Set from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0SS field. #01 S1ES Source selector 1 set edge configuration 26 1 read-write value1 Generation of the set signal is disabled #00 value2 Set signal is generated on a LOW to HIGH transition of the selected input #01 value3 Set signal is generated on a HIGH to LOW transition of the selected input #10 value4 Set signal is generated on both transitions of the selected input #11 S1M Source selector 1 set configuration 22 1 read-write value1 Set from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal #00 value2 Set from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1SS field. #01 PL HRC output passive level 0x4 32 read-write n 0x0 0x0 PSL0 HRPWMx.OUTy0 passive level 0 read-write value1 HRPWMx.OUTy0 output passive level is set to LOW #0 value2 HRPWMx.OUTy0 output passive level is set to HIGH #1 PSL1 HRPWMx.OUTy1 passive level 1 read-write value1 HRPWMx.OUTy1 output passive level is set to LOW #0 value2 HRPWMx.OUTy1 output passive level is set to HIGH #1 SC HRC current source for shadow 0x10 32 read-write n 0x0 0x0 ST Source selector for the shadow transfer 0 read-only value1 Shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 0. #0 value2 Shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 1. #1 SCR1 HRC shadow rising edge value 0x30 32 read-write n 0x0 0x0 SCR1 High resolution falling edge value 0 7 read-write SCR2 HRC shadow falling edge value 0x34 32 read-write n 0x0 0x0 SCR2 High resolution rising edge value 0 7 read-write SDCF HRC shadow dead time falling 0x2C 32 read-write n 0x0 0x0 SDTFV Shadow dead time falling value 0 15 read-write SDCR HRC shadow dead time rising 0x28 32 read-write n 0x0 0x0 SDTRV Shadow dead time rising value 0 15 read-write SSC HRC next source for shadow 0x24 32 read-write n 0x0 0x0 SST Source selector for the shadow transfer 0 read-write value1 Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 0. #0 value2 Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 1. #1 TSEL HRC timer selection 0xC 32 read-write n 0x0 0x0 TS0E Source selector 0 TRAP enable 16 read-write value1 TRAP signal generated from the Timer connected to Source Selector 0 is disabled. #0 value2 TRAP signal generated from the Timer connected to Source Selector 0 is enabled. #1 TS1E Source selector 1 TRAP enable 17 read-write value1 TRAP signal generated from the Timer connected to Source Selector 1 is disabled. #0 value2 TRAP signal generated from the Timer connected to Source Selector 1 is enabled. #1 TSEL0 Source Selector 0 Timer connection 0 2 read-write value1 Source Selector 0 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used) #000 value2 Source Selector 0 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used) #001 value3 Source Selector 0 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used) #010 value4 Source Selector 0 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used) #011 TSEL1 Source Selector 1 Timer connection 3 2 read-write value1 Source Selector 1 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used) #000 value2 Source Selector 1 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used) #001 value3 Source Selector 1 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used) #010 value4 Source Selector 1 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used) #011 LEDTS0 LED and Touch Sense Unit 0 LEDTS0 0x0 0x0 0x100 registers n LEDTS0_0 LED and Touch Sense Control Unit (Module 0) 102 EVFR Event Flag Register 0xC 32 read-write n 0x0 0x0 CTFF Clear (Extended) Time Frame Interrupt Flag 17 write-only value1 No action. #0 value2 Bit TFF is cleared. #1 CTPF Clear Autoscan Time Period Interrupt Flag 18 write-only value1 No action. #0 value2 Bit TPF is cleared. #1 CTSF Clear Time Slice Interrupt Flag 16 write-only value1 No action. #0 value2 Bit TSF is cleared. #1 TFF (Extended) Time Frame Interrupt Flag 1 read-only TPF Autoscan Time Period Interrupt Flag 2 read-only TSCTROVF TS-Counter Overflow Indication 3 read-only value1 No overflow has occurred. #0 value2 The TS-counter has overflowed at least once. #1 TSF Time Slice Interrupt Flag 0 read-only FNCTL Function Control Register 0x8 32 read-write n 0x0 0x0 ACCCNT Accumulate Count on Touch-Sense Input 16 3 read-write value1 1 time 0 value2 2 times 1 value3 16 times 15 COLLEV Active Level of LED Column 28 read-write value1 Active low #0 value2 Active high #1 EPULL Enable External Pull-up Configuration on Pin COLA 4 read-write value1 HW over-rule to enable internal pull-up is active on TSIN[x] for set duration in touch-sense time slice. With this setting, it is not specified to assign the COLA to any pin. #0 value2 Enable external pull-up: Output 1 on pin COLA for whole duration of touch-sense time slice. #1 FNCOL Previous Active Function/LED Column Status 5 2 read-only NR_LEDCOL Number of LED Columns 29 2 read-write value1 1 LED column #000 value2 2 LED columns #001 value3 3 LED columns #010 value4 4 LED columns #011 value5 5 LED columns #100 value6 6 LED columns #101 value7 7 LED columns #110 value8 8 LED columns (max. LED columns = 7 if bit TS_EN = 1) #111 NR_TSIN Number of Touch-Sense Input 25 2 read-write value1 1 0 value2 8 7 PADT Touch-Sense TSIN Pad Turn 0 2 read-write value1 TSIN0 0 value2 TSIN7 7 PADTSW Software Control for Touch-Sense Pad Turn 3 read-write value1 The hardware automatically enables the touch-sense inputs in sequence round-robin, starting from TSIN0. #0 value2 Disable hardware control for software control only. The touch-sense input is configured in bit PADT. #1 TSCCMP Common Compare Enable for Touch-Sense 20 read-write value1 Disable common compare for touch-sense #0 value2 Enable common compare for touch-sense #1 TSCTRR TS-Counter Auto Reset 23 read-write value1 Disable TS-counter automatic reset #0 value2 Enable TS-counter automatic reset to 00H on the first pad turn of a new TSIN[x]. Triggered on compare match in time slice. #1 TSCTRSAT Saturation of TS-Counter 24 read-write value1 Disable #0 value2 Enable. TS-counter stops counting in the touch-sense time slice(s) of the same (extended) frame when it reaches FFH. Counter starts to count again on the first pad turn of a new TSIN[x], triggered on compare match. #1 TSOEXT Extension for Touch-Sense Output for Pin-Low-Level 21 1 read-write value1 Extend by 1 ledts_clk #00 value2 Extend by 4 ledts_clk #01 value3 Extend by 8 ledts_clk #10 value4 Extend by 16 ledts_clk #11 GLOBCTL Global Control Register 0x4 32 read-write n 0x0 0x0 CLK_PS LEDTS-Counter Clock Pre-Scale Factor 16 15 read-write CMTR Clock Master Disable 2 read-write value1 Kernel generates its own clock for LEDTS-counter based on SFR setting #0 value2 LEDTS-counter takes its clock from another master kernel #1 ENSYNC Enable Autoscan Time Period Synchronization 3 read-write value1 No synchronization #0 value2 Synchronization enabled on Kernel0 autoscan time period #1 FENVAL Enable (Extended) Time Frame Validation 12 read-write value1 Disable #0 value2 Enable #1 ITF_EN Enable (Extended) Time Frame Interrupt 14 read-write value1 Disable #0 value2 Enable #1 ITP_EN Enable Autoscan Time Period Interrupt 15 read-write value1 Disable #0 value2 Enable (valid only for case of hardware-enabled pad turn control) #1 ITS_EN Enable Time Slice Interrupt 13 read-write value1 Disable #0 value2 Enable #1 LD_EN LED Function Enable 1 read-write MASKVAL Mask Number of LSB Bits for Event Validation 9 2 read-write value1 Mask LSB bit 0 value2 Mask 2 LSB bits 1 value3 Mask 8 LSB bits 7 SUSCFG Suspend Request Configuration 8 read-write value1 Ignore suspend request #0 value2 Enable suspend according to request #1 TS_EN Touch-Sense Function Enable 0 read-write ID Module Identification Register 0x0 32 read-write n 0x0 0x0 MOD_NUMBER Module Number Value 16 15 read-only MOD_REV Module Revision Number 0 7 read-only MOD_TYPE Module Type 8 7 read-only LDCMP0 LED Compare Register 0 0x1C 32 read-write n 0x0 0x0 CMP_LD0 Compare Value for LED COL[x] 0 7 read-write CMP_LD1 Compare Value for LED COL[x] 8 7 read-write CMP_LD2 Compare Value for LED COL[x] 16 7 read-write CMP_LD3 Compare Value for LED COL[x] 24 7 read-write LDCMP1 LED Compare Register 1 0x20 32 read-write n 0x0 0x0 CMP_LD4 Compare Value for LED COL[x] 0 7 read-write CMP_LD5 Compare Value for LED COL[x] 8 7 read-write CMP_LD6 Compare Value for LED COL[x] 16 7 read-write CMP_LDA_TSCOM Compare Value for LED COLA / Common Compare Value for Touch-sense Pad Turns 24 7 read-write LINE0 Line Pattern Register 0 0x14 32 read-write n 0x0 0x0 LINE_0 Output on LINE[x] 0 7 read-write LINE_1 Output on LINE[x] 8 7 read-write LINE_2 Output on LINE[x] 16 7 read-write LINE_3 Output on LINE[x] 24 7 read-write LINE1 Line Pattern Register 1 0x18 32 read-write n 0x0 0x0 LINE_4 Output on LINE[x] 0 7 read-write LINE_5 Output on LINE[x] 8 7 read-write LINE_6 Output on LINE[x] 16 7 read-write LINE_A Output on LINE[x] 24 7 read-write TSCMP0 Touch-sense Compare Register 0 0x24 32 read-write n 0x0 0x0 CMP_TS0 Compare Value for Touch-Sense TSIN[x] 0 7 read-write CMP_TS1 Compare Value for Touch-Sense TSIN[x] 8 7 read-write CMP_TS2 Compare Value for Touch-Sense TSIN[x] 16 7 read-write CMP_TS3 Compare Value for Touch-Sense TSIN[x] 24 7 read-write TSCMP1 Touch-sense Compare Register 1 0x28 32 read-write n 0x0 0x0 CMP_TS4 Compare Value for Touch-Sense TSIN[x] 0 7 read-write CMP_TS5 Compare Value for Touch-Sense TSIN[x] 8 7 read-write CMP_TS6 Compare Value for Touch-Sense TSIN[x] 16 7 read-write CMP_TS7 Compare Value for Touch-Sense TSIN[x] 24 7 read-write TSVAL Touch-sense TS-Counter Value 0x10 32 read-write n 0x0 0x0 TSCTRVAL TS-Counter Value 16 15 read-write TSCTRVALR Shadow TS-Counter (Read) 0 15 read-only PBA0 Peripheral Bridge AHB 0 PBA 0x0 0x0 0x50 registers n STS Peripheral Bridge Status Register 0x0 32 read-write n 0x0 0x0 WERR Bufferable Write Access Error 0 read-write value1 no write error occurred. #0 value2 write error occurred, interrupt request is pending. #1 WADDR PBA Write Error Address Register 0x4 32 read-write n 0x0 0x0 WADDR Write Error Address 0 31 read-only PBA1 Peripheral Bridge AHB 1 PBA 0x0 0x0 0x50 registers n STS Peripheral Bridge Status Register 0x0 32 read-write n 0x0 0x0 WERR Bufferable Write Access Error 0 read-write value1 no write error occurred. #0 value2 write error occurred, interrupt request is pending. #1 WADDR PBA Write Error Address Register 0x4 32 read-write n 0x0 0x0 WADDR Write Error Address 0 31 read-only PMU0 Program Management Unit PMU0 0x0 0x0 0x4 registers n PMU0_0 Program Management Unit 12 ID PMU0 Identification Register 0x0 32 read-write n 0x0 0x0 MOD_NUMBER Module Number Value 16 15 read-only MOD_REV Module Revision Number 0 7 read-only MOD_TYPE Module Type 8 7 read-only PORT0 Port 0 PORTS 0x0 0x0 0x100 registers n HWSEL Port 0 Pin Hardware Select Register 0x74 32 read-write n 0x0 0x0 HW0 Port n Pin Hardware Select Bit 0 0 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW1 Port n Pin Hardware Select Bit 1 2 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW10 Port n Pin Hardware Select Bit 10 20 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW11 Port n Pin Hardware Select Bit 11 22 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW12 Port n Pin Hardware Select Bit 12 24 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW13 Port n Pin Hardware Select Bit 13 26 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW14 Port n Pin Hardware Select Bit 14 28 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW15 Port n Pin Hardware Select Bit 15 30 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW2 Port n Pin Hardware Select Bit 2 4 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW3 Port n Pin Hardware Select Bit 3 6 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW4 Port n Pin Hardware Select Bit 4 8 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW5 Port n Pin Hardware Select Bit 5 10 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW6 Port n Pin Hardware Select Bit 6 12 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW7 Port n Pin Hardware Select Bit 7 14 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW8 Port n Pin Hardware Select Bit 8 16 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW9 Port n Pin Hardware Select Bit 9 18 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 IN Port 0 Input Register 0x24 32 read-write n 0x0 0x0 P0 Port n Input Bit 0 0 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P1 Port n Input Bit 1 1 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P10 Port n Input Bit 10 10 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P11 Port n Input Bit 11 11 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P12 Port n Input Bit 12 12 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P13 Port n Input Bit 13 13 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P14 Port n Input Bit 14 14 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P15 Port n Input Bit 15 15 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P2 Port n Input Bit 2 2 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P3 Port n Input Bit 3 3 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P4 Port n Input Bit 4 4 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P5 Port n Input Bit 5 5 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P6 Port n Input Bit 6 6 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P7 Port n Input Bit 7 7 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P8 Port n Input Bit 8 8 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P9 Port n Input Bit 9 9 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 IOCR0 Port 0 Input/Output Control Register 0 0x10 32 read-write n 0x0 0x0 PC0 Port Control for Port n Pin 0 to 3 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC1 Port Control for Port n Pin 0 to 3 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC2 Port Control for Port n Pin 0 to 3 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC3 Port Control for Port n Pin 0 to 3 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 IOCR4 Port 0 Input/Output Control Register 4 0x14 32 read-write n 0x0 0x0 PC4 Port Control for Port n Pin 4 to 7 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC5 Port Control for Port n Pin 4 to 7 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC6 Port Control for Port n Pin 4 to 7 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC7 Port Control for Port n Pin 4 to 7 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 IOCR8 Port 0 Input/Output Control Register 8 0x18 32 read-write n 0x0 0x0 PC10 Port Control for Port n Pin 8 to 11 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC11 Port Control for Port n Pin 8 to 11 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC8 Port Control for Port n Pin 8 to 11 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC9 Port Control for Port n Pin 8 to 11 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 OMR Port 0 Output Modification Register 0x4 32 read-write n 0x0 0x0 PR0 Port n Reset Bit 0 16 write-only PR1 Port n Reset Bit 1 17 write-only PR10 Port n Reset Bit 10 26 write-only PR11 Port n Reset Bit 11 27 write-only PR12 Port n Reset Bit 12 28 write-only PR13 Port n Reset Bit 13 29 write-only PR14 Port n Reset Bit 14 30 write-only PR15 Port n Reset Bit 15 31 write-only PR2 Port n Reset Bit 2 18 write-only PR3 Port n Reset Bit 3 19 write-only PR4 Port n Reset Bit 4 20 write-only PR5 Port n Reset Bit 5 21 write-only PR6 Port n Reset Bit 6 22 write-only PR7 Port n Reset Bit 7 23 write-only PR8 Port n Reset Bit 8 24 write-only PR9 Port n Reset Bit 9 25 write-only PS0 Port n Set Bit 0 0 write-only PS1 Port n Set Bit 1 1 write-only PS10 Port n Set Bit 10 10 write-only PS11 Port n Set Bit 11 11 write-only PS12 Port n Set Bit 12 12 write-only PS13 Port n Set Bit 13 13 write-only PS14 Port n Set Bit 14 14 write-only PS15 Port n Set Bit 15 15 write-only PS2 Port n Set Bit 2 2 write-only PS3 Port n Set Bit 3 3 write-only PS4 Port n Set Bit 4 4 write-only PS5 Port n Set Bit 5 5 write-only PS6 Port n Set Bit 6 6 write-only PS7 Port n Set Bit 7 7 write-only PS8 Port n Set Bit 8 8 write-only PS9 Port n Set Bit 9 9 write-only OUT Port 0 Output Register 0x0 32 read-write n 0x0 0x0 P0 Port n Output Bit 0 0 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P1 Port n Output Bit 1 1 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P10 Port n Output Bit 10 10 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P11 Port n Output Bit 11 11 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P12 Port n Output Bit 12 12 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P13 Port n Output Bit 13 13 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P14 Port n Output Bit 14 14 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P15 Port n Output Bit 15 15 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P2 Port n Output Bit 2 2 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P3 Port n Output Bit 3 3 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P4 Port n Output Bit 4 4 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P5 Port n Output Bit 5 5 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P6 Port n Output Bit 6 6 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P7 Port n Output Bit 7 7 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P8 Port n Output Bit 8 8 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P9 Port n Output Bit 9 9 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 PDISC Port 0 Pin Function Decision Control Register 0x60 32 read-write n 0x0 0x0 PDIS0 Pad Disable for Port n Pin 0 0 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS1 Pad Disable for Port n Pin 1 1 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS10 Pad Disable for Port n Pin 10 10 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS11 Pad Disable for Port n Pin 11 11 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS12 Pad Disable for Port n Pin 12 12 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS13 Pad Disable for Port n Pin 13 13 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS14 Pad Disable for Port n Pin 14 14 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS15 Pad Disable for Port n Pin 15 15 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS2 Pad Disable for Port n Pin 2 2 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS3 Pad Disable for Port n Pin 3 3 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS4 Pad Disable for Port n Pin 4 4 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS5 Pad Disable for Port n Pin 5 5 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS6 Pad Disable for Port n Pin 6 6 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS7 Pad Disable for Port n Pin 7 7 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS8 Pad Disable for Port n Pin 8 8 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS9 Pad Disable for Port n Pin 9 9 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDR0 Port 0 Pad Driver Mode 0 Register 0x40 32 read-write n 0x0 0x0 PD0 Pad Driver Mode for Pn.0 0 2 read-write PD1 Pad Driver Mode for Pn.1 4 2 read-write PD2 Pad Driver Mode for Pn.2 8 2 read-write PD3 Pad Driver Mode for Pn.3 12 2 read-write PD4 Pad Driver Mode for Pn.4 16 2 read-write PD5 Pad Driver Mode for Pn.5 20 2 read-write PD6 Pad Driver Mode for Pn.6 24 2 read-write PD7 Pad Driver Mode for Pn.7 28 2 read-write PDR1 Port 0 Pad Driver Mode 1 Register 0x44 32 read-write n 0x0 0x0 PD10 Pad Driver Mode for Pn.10 8 2 read-write PD11 Pad Driver Mode for Pn.11 12 2 read-write PD12 Pad Driver Mode for Pn.12 16 2 read-write PD13 Pad Driver Mode for Pn.13 20 2 read-write PD14 Pad Driver Mode for Pn.14 24 2 read-write PD15 Pad Driver Mode for Pn.15 28 2 read-write PD8 Pad Driver Mode for Pn.8 0 2 read-write PD9 Pad Driver Mode for Pn.9 4 2 read-write PPS Port 0 Pin Power Save Register 0x70 32 read-write n 0x0 0x0 PPS0 Port n Pin Power Save Bit 0 0 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS1 Port n Pin Power Save Bit 1 1 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS10 Port n Pin Power Save Bit 10 10 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS11 Port n Pin Power Save Bit 11 11 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS12 Port n Pin Power Save Bit 12 12 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS13 Port n Pin Power Save Bit 13 13 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS14 Port n Pin Power Save Bit 14 14 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS15 Port n Pin Power Save Bit 15 15 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS2 Port n Pin Power Save Bit 2 2 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS3 Port n Pin Power Save Bit 3 3 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS4 Port n Pin Power Save Bit 4 4 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS5 Port n Pin Power Save Bit 5 5 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS6 Port n Pin Power Save Bit 6 6 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS7 Port n Pin Power Save Bit 7 7 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS8 Port n Pin Power Save Bit 8 8 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS9 Port n Pin Power Save Bit 9 9 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PORT1 Port 1 PORTS 0x0 0x0 0x100 registers n HWSEL Port 1 Pin Hardware Select Register 0x74 32 read-write n 0x0 0x0 HW0 Port n Pin Hardware Select Bit 0 0 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW1 Port n Pin Hardware Select Bit 1 2 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW10 Port n Pin Hardware Select Bit 10 20 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW11 Port n Pin Hardware Select Bit 11 22 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW12 Port n Pin Hardware Select Bit 12 24 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW13 Port n Pin Hardware Select Bit 13 26 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW14 Port n Pin Hardware Select Bit 14 28 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW15 Port n Pin Hardware Select Bit 15 30 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW2 Port n Pin Hardware Select Bit 2 4 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW3 Port n Pin Hardware Select Bit 3 6 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW4 Port n Pin Hardware Select Bit 4 8 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW5 Port n Pin Hardware Select Bit 5 10 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW6 Port n Pin Hardware Select Bit 6 12 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW7 Port n Pin Hardware Select Bit 7 14 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW8 Port n Pin Hardware Select Bit 8 16 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW9 Port n Pin Hardware Select Bit 9 18 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 IN Port 1 Input Register 0x24 32 read-write n 0x0 0x0 P0 Port n Input Bit 0 0 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P1 Port n Input Bit 1 1 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P10 Port n Input Bit 10 10 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P11 Port n Input Bit 11 11 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P12 Port n Input Bit 12 12 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P13 Port n Input Bit 13 13 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P14 Port n Input Bit 14 14 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P15 Port n Input Bit 15 15 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P2 Port n Input Bit 2 2 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P3 Port n Input Bit 3 3 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P4 Port n Input Bit 4 4 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P5 Port n Input Bit 5 5 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P6 Port n Input Bit 6 6 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P7 Port n Input Bit 7 7 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P8 Port n Input Bit 8 8 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P9 Port n Input Bit 9 9 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 IOCR0 Port 1 Input/Output Control Register 0 0x10 32 read-write n 0x0 0x0 PC0 Port Control for Port n Pin 0 to 3 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC1 Port Control for Port n Pin 0 to 3 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC2 Port Control for Port n Pin 0 to 3 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC3 Port Control for Port n Pin 0 to 3 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 IOCR12 Port 1 Input/Output Control Register 12 0x1C 32 read-write n 0x0 0x0 PC12 Port Control for Port n Pin 12 to 15 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC13 Port Control for Port n Pin 12 to 15 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC14 Port Control for Port n Pin 12 to 15 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC15 Port Control for Port n Pin 12 to 15 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 IOCR4 Port 1 Input/Output Control Register 4 0x14 32 read-write n 0x0 0x0 PC4 Port Control for Port n Pin 4 to 7 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC5 Port Control for Port n Pin 4 to 7 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC6 Port Control for Port n Pin 4 to 7 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC7 Port Control for Port n Pin 4 to 7 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 IOCR8 Port 1 Input/Output Control Register 8 0x18 32 read-write n 0x0 0x0 PC10 Port Control for Port n Pin 8 to 11 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC11 Port Control for Port n Pin 8 to 11 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC8 Port Control for Port n Pin 8 to 11 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC9 Port Control for Port n Pin 8 to 11 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 OMR Port 1 Output Modification Register 0x4 32 read-write n 0x0 0x0 PR0 Port n Reset Bit 0 16 write-only PR1 Port n Reset Bit 1 17 write-only PR10 Port n Reset Bit 10 26 write-only PR11 Port n Reset Bit 11 27 write-only PR12 Port n Reset Bit 12 28 write-only PR13 Port n Reset Bit 13 29 write-only PR14 Port n Reset Bit 14 30 write-only PR15 Port n Reset Bit 15 31 write-only PR2 Port n Reset Bit 2 18 write-only PR3 Port n Reset Bit 3 19 write-only PR4 Port n Reset Bit 4 20 write-only PR5 Port n Reset Bit 5 21 write-only PR6 Port n Reset Bit 6 22 write-only PR7 Port n Reset Bit 7 23 write-only PR8 Port n Reset Bit 8 24 write-only PR9 Port n Reset Bit 9 25 write-only PS0 Port n Set Bit 0 0 write-only PS1 Port n Set Bit 1 1 write-only PS10 Port n Set Bit 10 10 write-only PS11 Port n Set Bit 11 11 write-only PS12 Port n Set Bit 12 12 write-only PS13 Port n Set Bit 13 13 write-only PS14 Port n Set Bit 14 14 write-only PS15 Port n Set Bit 15 15 write-only PS2 Port n Set Bit 2 2 write-only PS3 Port n Set Bit 3 3 write-only PS4 Port n Set Bit 4 4 write-only PS5 Port n Set Bit 5 5 write-only PS6 Port n Set Bit 6 6 write-only PS7 Port n Set Bit 7 7 write-only PS8 Port n Set Bit 8 8 write-only PS9 Port n Set Bit 9 9 write-only OUT Port 1 Output Register 0x0 32 read-write n 0x0 0x0 P0 Port n Output Bit 0 0 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P1 Port n Output Bit 1 1 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P10 Port n Output Bit 10 10 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P11 Port n Output Bit 11 11 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P12 Port n Output Bit 12 12 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P13 Port n Output Bit 13 13 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P14 Port n Output Bit 14 14 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P15 Port n Output Bit 15 15 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P2 Port n Output Bit 2 2 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P3 Port n Output Bit 3 3 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P4 Port n Output Bit 4 4 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P5 Port n Output Bit 5 5 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P6 Port n Output Bit 6 6 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P7 Port n Output Bit 7 7 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P8 Port n Output Bit 8 8 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P9 Port n Output Bit 9 9 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 PDISC Port 1 Pin Function Decision Control Register 0x60 32 read-write n 0x0 0x0 PDIS0 Pad Disable for Port n Pin 0 0 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS1 Pad Disable for Port n Pin 1 1 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS10 Pad Disable for Port n Pin 10 10 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS11 Pad Disable for Port n Pin 11 11 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS12 Pad Disable for Port n Pin 12 12 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS13 Pad Disable for Port n Pin 13 13 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS14 Pad Disable for Port n Pin 14 14 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS15 Pad Disable for Port n Pin 15 15 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS2 Pad Disable for Port n Pin 2 2 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS3 Pad Disable for Port n Pin 3 3 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS4 Pad Disable for Port n Pin 4 4 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS5 Pad Disable for Port n Pin 5 5 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS6 Pad Disable for Port n Pin 6 6 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS7 Pad Disable for Port n Pin 7 7 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS8 Pad Disable for Port n Pin 8 8 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS9 Pad Disable for Port n Pin 9 9 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDR0 Port 1 Pad Driver Mode 0 Register 0x40 32 read-write n 0x0 0x0 PD0 Pad Driver Mode for Pn.0 0 2 read-write PD1 Pad Driver Mode for Pn.1 4 2 read-write PD2 Pad Driver Mode for Pn.2 8 2 read-write PD3 Pad Driver Mode for Pn.3 12 2 read-write PD4 Pad Driver Mode for Pn.4 16 2 read-write PD5 Pad Driver Mode for Pn.5 20 2 read-write PD6 Pad Driver Mode for Pn.6 24 2 read-write PD7 Pad Driver Mode for Pn.7 28 2 read-write PDR1 Port 1 Pad Driver Mode 1 Register 0x44 32 read-write n 0x0 0x0 PD10 Pad Driver Mode for Pn.10 8 2 read-write PD11 Pad Driver Mode for Pn.11 12 2 read-write PD12 Pad Driver Mode for Pn.12 16 2 read-write PD13 Pad Driver Mode for Pn.13 20 2 read-write PD14 Pad Driver Mode for Pn.14 24 2 read-write PD15 Pad Driver Mode for Pn.15 28 2 read-write PD8 Pad Driver Mode for Pn.8 0 2 read-write PD9 Pad Driver Mode for Pn.9 4 2 read-write PPS Port 1 Pin Power Save Register 0x70 32 read-write n 0x0 0x0 PPS0 Port n Pin Power Save Bit 0 0 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS1 Port n Pin Power Save Bit 1 1 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS10 Port n Pin Power Save Bit 10 10 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS11 Port n Pin Power Save Bit 11 11 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS12 Port n Pin Power Save Bit 12 12 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS13 Port n Pin Power Save Bit 13 13 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS14 Port n Pin Power Save Bit 14 14 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS15 Port n Pin Power Save Bit 15 15 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS2 Port n Pin Power Save Bit 2 2 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS3 Port n Pin Power Save Bit 3 3 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS4 Port n Pin Power Save Bit 4 4 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS5 Port n Pin Power Save Bit 5 5 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS6 Port n Pin Power Save Bit 6 6 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS7 Port n Pin Power Save Bit 7 7 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS8 Port n Pin Power Save Bit 8 8 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS9 Port n Pin Power Save Bit 9 9 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PORT14 Port 14 PORTS 0x0 0x0 0x100 registers n HWSEL Port 14 Pin Hardware Select Register 0x74 32 read-write n 0x0 0x0 HW0 Port n Pin Hardware Select Bit 0 0 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW1 Port n Pin Hardware Select Bit 1 2 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW10 Port n Pin Hardware Select Bit 10 20 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW11 Port n Pin Hardware Select Bit 11 22 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW12 Port n Pin Hardware Select Bit 12 24 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW13 Port n Pin Hardware Select Bit 13 26 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW14 Port n Pin Hardware Select Bit 14 28 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW15 Port n Pin Hardware Select Bit 15 30 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW2 Port n Pin Hardware Select Bit 2 4 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW3 Port n Pin Hardware Select Bit 3 6 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW4 Port n Pin Hardware Select Bit 4 8 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW5 Port n Pin Hardware Select Bit 5 10 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW6 Port n Pin Hardware Select Bit 6 12 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW7 Port n Pin Hardware Select Bit 7 14 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW8 Port n Pin Hardware Select Bit 8 16 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW9 Port n Pin Hardware Select Bit 9 18 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 IN Port 14 Input Register 0x24 32 read-write n 0x0 0x0 P0 Port n Input Bit 0 0 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P1 Port n Input Bit 1 1 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P10 Port n Input Bit 10 10 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P11 Port n Input Bit 11 11 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P12 Port n Input Bit 12 12 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P13 Port n Input Bit 13 13 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P14 Port n Input Bit 14 14 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P15 Port n Input Bit 15 15 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P2 Port n Input Bit 2 2 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P3 Port n Input Bit 3 3 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P4 Port n Input Bit 4 4 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P5 Port n Input Bit 5 5 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P6 Port n Input Bit 6 6 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P7 Port n Input Bit 7 7 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P8 Port n Input Bit 8 8 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P9 Port n Input Bit 9 9 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 IOCR0 Port 14 Input/Output Control Register 0 0x10 32 read-write n 0x0 0x0 PC0 Port Control for Port n Pin 0 to 3 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC1 Port Control for Port n Pin 0 to 3 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC2 Port Control for Port n Pin 0 to 3 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC3 Port Control for Port n Pin 0 to 3 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 IOCR12 Port 14 Input/Output Control Register 12 0x1C 32 read-write n 0x0 0x0 PC12 Port Control for Port n Pin 12 to 15 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC13 Port Control for Port n Pin 12 to 15 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC14 Port Control for Port n Pin 12 to 15 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC15 Port Control for Port n Pin 12 to 15 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 IOCR4 Port 14 Input/Output Control Register 4 0x14 32 read-write n 0x0 0x0 PC4 Port Control for Port n Pin 4 to 7 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC5 Port Control for Port n Pin 4 to 7 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC6 Port Control for Port n Pin 4 to 7 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC7 Port Control for Port n Pin 4 to 7 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 IOCR8 Port 14 Input/Output Control Register 8 0x18 32 read-write n 0x0 0x0 PC10 Port Control for Port n Pin 8 to 11 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC11 Port Control for Port n Pin 8 to 11 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC8 Port Control for Port n Pin 8 to 11 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC9 Port Control for Port n Pin 8 to 11 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 OMR Port 14 Output Modification Register 0x4 32 read-write n 0x0 0x0 PR0 Port n Reset Bit 0 16 write-only PR1 Port n Reset Bit 1 17 write-only PR10 Port n Reset Bit 10 26 write-only PR11 Port n Reset Bit 11 27 write-only PR12 Port n Reset Bit 12 28 write-only PR13 Port n Reset Bit 13 29 write-only PR14 Port n Reset Bit 14 30 write-only PR15 Port n Reset Bit 15 31 write-only PR2 Port n Reset Bit 2 18 write-only PR3 Port n Reset Bit 3 19 write-only PR4 Port n Reset Bit 4 20 write-only PR5 Port n Reset Bit 5 21 write-only PR6 Port n Reset Bit 6 22 write-only PR7 Port n Reset Bit 7 23 write-only PR8 Port n Reset Bit 8 24 write-only PR9 Port n Reset Bit 9 25 write-only PS0 Port n Set Bit 0 0 write-only PS1 Port n Set Bit 1 1 write-only PS10 Port n Set Bit 10 10 write-only PS11 Port n Set Bit 11 11 write-only PS12 Port n Set Bit 12 12 write-only PS13 Port n Set Bit 13 13 write-only PS14 Port n Set Bit 14 14 write-only PS15 Port n Set Bit 15 15 write-only PS2 Port n Set Bit 2 2 write-only PS3 Port n Set Bit 3 3 write-only PS4 Port n Set Bit 4 4 write-only PS5 Port n Set Bit 5 5 write-only PS6 Port n Set Bit 6 6 write-only PS7 Port n Set Bit 7 7 write-only PS8 Port n Set Bit 8 8 write-only PS9 Port n Set Bit 9 9 write-only OUT Port 14 Output Register 0x0 32 read-write n 0x0 0x0 P0 Port n Output Bit 0 0 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P1 Port n Output Bit 1 1 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P10 Port n Output Bit 10 10 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P11 Port n Output Bit 11 11 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P12 Port n Output Bit 12 12 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P13 Port n Output Bit 13 13 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P14 Port n Output Bit 14 14 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P15 Port n Output Bit 15 15 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P2 Port n Output Bit 2 2 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P3 Port n Output Bit 3 3 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P4 Port n Output Bit 4 4 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P5 Port n Output Bit 5 5 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P6 Port n Output Bit 6 6 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P7 Port n Output Bit 7 7 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P8 Port n Output Bit 8 8 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P9 Port n Output Bit 9 9 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 PDISC Port 14 Pin Function Decision Control Register 0x60 32 read-write n 0x0 0x0 PDIS0 Pad Disable for Port n Pin 0 0 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS1 Pad Disable for Port n Pin 1 1 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS10 Pad Disable for Port n Pin 10 10 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS11 Pad Disable for Port n Pin 11 11 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS12 Pad Disable for Port n Pin 12 12 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS13 Pad Disable for Port n Pin 13 13 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS14 Pad Disable for Port n Pin 14 14 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS15 Pad Disable for Port n Pin 15 15 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS2 Pad Disable for Port n Pin 2 2 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS3 Pad Disable for Port n Pin 3 3 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS4 Pad Disable for Port n Pin 4 4 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS5 Pad Disable for Port n Pin 5 5 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS6 Pad Disable for Port n Pin 6 6 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS7 Pad Disable for Port n Pin 7 7 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS8 Pad Disable for Port n Pin 8 8 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PDIS9 Pad Disable for Port n Pin 9 9 read-write value1 Digital Pad input is enabled. Analog and digital input path active. #0 value2 Digital Pad input is disabled. Analog input path active. (default) #1 PPS Port 14 Pin Power Save Register 0x70 32 read-write n 0x0 0x0 PPS0 Port n Pin Power Save Bit 0 0 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS1 Port n Pin Power Save Bit 1 1 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS10 Port n Pin Power Save Bit 10 10 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS11 Port n Pin Power Save Bit 11 11 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS12 Port n Pin Power Save Bit 12 12 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS13 Port n Pin Power Save Bit 13 13 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS14 Port n Pin Power Save Bit 14 14 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS15 Port n Pin Power Save Bit 15 15 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS2 Port n Pin Power Save Bit 2 2 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS3 Port n Pin Power Save Bit 3 3 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS4 Port n Pin Power Save Bit 4 4 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS5 Port n Pin Power Save Bit 5 5 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS6 Port n Pin Power Save Bit 6 6 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS7 Port n Pin Power Save Bit 7 7 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS8 Port n Pin Power Save Bit 8 8 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS9 Port n Pin Power Save Bit 9 9 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PORT2 Port 2 PORTS 0x0 0x0 0x100 registers n HWSEL Port 2 Pin Hardware Select Register 0x74 32 read-write n 0x0 0x0 HW0 Port n Pin Hardware Select Bit 0 0 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW1 Port n Pin Hardware Select Bit 1 2 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW10 Port n Pin Hardware Select Bit 10 20 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW11 Port n Pin Hardware Select Bit 11 22 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW12 Port n Pin Hardware Select Bit 12 24 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW13 Port n Pin Hardware Select Bit 13 26 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW14 Port n Pin Hardware Select Bit 14 28 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW15 Port n Pin Hardware Select Bit 15 30 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW2 Port n Pin Hardware Select Bit 2 4 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW3 Port n Pin Hardware Select Bit 3 6 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW4 Port n Pin Hardware Select Bit 4 8 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW5 Port n Pin Hardware Select Bit 5 10 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW6 Port n Pin Hardware Select Bit 6 12 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW7 Port n Pin Hardware Select Bit 7 14 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW8 Port n Pin Hardware Select Bit 8 16 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW9 Port n Pin Hardware Select Bit 9 18 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 IN Port 2 Input Register 0x24 32 read-write n 0x0 0x0 P0 Port n Input Bit 0 0 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P1 Port n Input Bit 1 1 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P10 Port n Input Bit 10 10 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P11 Port n Input Bit 11 11 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P12 Port n Input Bit 12 12 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P13 Port n Input Bit 13 13 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P14 Port n Input Bit 14 14 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P15 Port n Input Bit 15 15 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P2 Port n Input Bit 2 2 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P3 Port n Input Bit 3 3 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P4 Port n Input Bit 4 4 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P5 Port n Input Bit 5 5 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P6 Port n Input Bit 6 6 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P7 Port n Input Bit 7 7 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P8 Port n Input Bit 8 8 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P9 Port n Input Bit 9 9 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 IOCR0 Port 2 Input/Output Control Register 0 0x10 32 read-write n 0x0 0x0 PC0 Port Control for Port n Pin 0 to 3 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC1 Port Control for Port n Pin 0 to 3 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC2 Port Control for Port n Pin 0 to 3 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC3 Port Control for Port n Pin 0 to 3 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 IOCR12 Port 2 Input/Output Control Register 12 0x1C 32 read-write n 0x0 0x0 PC12 Port Control for Port n Pin 12 to 15 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC13 Port Control for Port n Pin 12 to 15 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC14 Port Control for Port n Pin 12 to 15 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC15 Port Control for Port n Pin 12 to 15 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 IOCR4 Port 2 Input/Output Control Register 4 0x14 32 read-write n 0x0 0x0 PC4 Port Control for Port n Pin 4 to 7 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC5 Port Control for Port n Pin 4 to 7 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC6 Port Control for Port n Pin 4 to 7 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC7 Port Control for Port n Pin 4 to 7 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 IOCR8 Port 2 Input/Output Control Register 8 0x18 32 read-write n 0x0 0x0 PC10 Port Control for Port n Pin 8 to 11 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC11 Port Control for Port n Pin 8 to 11 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC8 Port Control for Port n Pin 8 to 11 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC9 Port Control for Port n Pin 8 to 11 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 OMR Port 2 Output Modification Register 0x4 32 read-write n 0x0 0x0 PR0 Port n Reset Bit 0 16 write-only PR1 Port n Reset Bit 1 17 write-only PR10 Port n Reset Bit 10 26 write-only PR11 Port n Reset Bit 11 27 write-only PR12 Port n Reset Bit 12 28 write-only PR13 Port n Reset Bit 13 29 write-only PR14 Port n Reset Bit 14 30 write-only PR15 Port n Reset Bit 15 31 write-only PR2 Port n Reset Bit 2 18 write-only PR3 Port n Reset Bit 3 19 write-only PR4 Port n Reset Bit 4 20 write-only PR5 Port n Reset Bit 5 21 write-only PR6 Port n Reset Bit 6 22 write-only PR7 Port n Reset Bit 7 23 write-only PR8 Port n Reset Bit 8 24 write-only PR9 Port n Reset Bit 9 25 write-only PS0 Port n Set Bit 0 0 write-only PS1 Port n Set Bit 1 1 write-only PS10 Port n Set Bit 10 10 write-only PS11 Port n Set Bit 11 11 write-only PS12 Port n Set Bit 12 12 write-only PS13 Port n Set Bit 13 13 write-only PS14 Port n Set Bit 14 14 write-only PS15 Port n Set Bit 15 15 write-only PS2 Port n Set Bit 2 2 write-only PS3 Port n Set Bit 3 3 write-only PS4 Port n Set Bit 4 4 write-only PS5 Port n Set Bit 5 5 write-only PS6 Port n Set Bit 6 6 write-only PS7 Port n Set Bit 7 7 write-only PS8 Port n Set Bit 8 8 write-only PS9 Port n Set Bit 9 9 write-only OUT Port 2 Output Register 0x0 32 read-write n 0x0 0x0 P0 Port n Output Bit 0 0 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P1 Port n Output Bit 1 1 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P10 Port n Output Bit 10 10 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P11 Port n Output Bit 11 11 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P12 Port n Output Bit 12 12 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P13 Port n Output Bit 13 13 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P14 Port n Output Bit 14 14 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P15 Port n Output Bit 15 15 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P2 Port n Output Bit 2 2 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P3 Port n Output Bit 3 3 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P4 Port n Output Bit 4 4 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P5 Port n Output Bit 5 5 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P6 Port n Output Bit 6 6 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P7 Port n Output Bit 7 7 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P8 Port n Output Bit 8 8 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P9 Port n Output Bit 9 9 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 PDISC Port 2 Pin Function Decision Control Register 0x60 32 read-write n 0x0 0x0 PDIS0 Pad Disable for Port n Pin 0 0 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS1 Pad Disable for Port n Pin 1 1 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS10 Pad Disable for Port n Pin 10 10 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS11 Pad Disable for Port n Pin 11 11 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS12 Pad Disable for Port n Pin 12 12 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS13 Pad Disable for Port n Pin 13 13 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS14 Pad Disable for Port n Pin 14 14 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS15 Pad Disable for Port n Pin 15 15 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS2 Pad Disable for Port n Pin 2 2 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS3 Pad Disable for Port n Pin 3 3 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS4 Pad Disable for Port n Pin 4 4 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS5 Pad Disable for Port n Pin 5 5 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS6 Pad Disable for Port n Pin 6 6 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS7 Pad Disable for Port n Pin 7 7 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS8 Pad Disable for Port n Pin 8 8 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS9 Pad Disable for Port n Pin 9 9 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDR0 Port 2 Pad Driver Mode 0 Register 0x40 32 read-write n 0x0 0x0 PD0 Pad Driver Mode for Pn.0 0 2 read-write PD1 Pad Driver Mode for Pn.1 4 2 read-write PD2 Pad Driver Mode for Pn.2 8 2 read-write PD3 Pad Driver Mode for Pn.3 12 2 read-write PD4 Pad Driver Mode for Pn.4 16 2 read-write PD5 Pad Driver Mode for Pn.5 20 2 read-write PD6 Pad Driver Mode for Pn.6 24 2 read-write PD7 Pad Driver Mode for Pn.7 28 2 read-write PDR1 Port 2 Pad Driver Mode 1 Register 0x44 32 read-write n 0x0 0x0 PD10 Pad Driver Mode for Pn.10 8 2 read-write PD11 Pad Driver Mode for Pn.11 12 2 read-write PD12 Pad Driver Mode for Pn.12 16 2 read-write PD13 Pad Driver Mode for Pn.13 20 2 read-write PD14 Pad Driver Mode for Pn.14 24 2 read-write PD15 Pad Driver Mode for Pn.15 28 2 read-write PD8 Pad Driver Mode for Pn.8 0 2 read-write PD9 Pad Driver Mode for Pn.9 4 2 read-write PPS Port 2 Pin Power Save Register 0x70 32 read-write n 0x0 0x0 PPS0 Port n Pin Power Save Bit 0 0 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS1 Port n Pin Power Save Bit 1 1 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS10 Port n Pin Power Save Bit 10 10 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS11 Port n Pin Power Save Bit 11 11 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS12 Port n Pin Power Save Bit 12 12 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS13 Port n Pin Power Save Bit 13 13 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS14 Port n Pin Power Save Bit 14 14 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS15 Port n Pin Power Save Bit 15 15 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS2 Port n Pin Power Save Bit 2 2 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS3 Port n Pin Power Save Bit 3 3 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS4 Port n Pin Power Save Bit 4 4 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS5 Port n Pin Power Save Bit 5 5 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS6 Port n Pin Power Save Bit 6 6 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS7 Port n Pin Power Save Bit 7 7 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS8 Port n Pin Power Save Bit 8 8 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS9 Port n Pin Power Save Bit 9 9 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PORT3 Port 3 PORTS 0x0 0x0 0x100 registers n HWSEL Port 3 Pin Hardware Select Register 0x74 32 read-write n 0x0 0x0 HW0 Port n Pin Hardware Select Bit 0 0 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW1 Port n Pin Hardware Select Bit 1 2 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW10 Port n Pin Hardware Select Bit 10 20 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW11 Port n Pin Hardware Select Bit 11 22 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW12 Port n Pin Hardware Select Bit 12 24 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW13 Port n Pin Hardware Select Bit 13 26 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW14 Port n Pin Hardware Select Bit 14 28 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW15 Port n Pin Hardware Select Bit 15 30 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW2 Port n Pin Hardware Select Bit 2 4 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW3 Port n Pin Hardware Select Bit 3 6 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW4 Port n Pin Hardware Select Bit 4 8 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW5 Port n Pin Hardware Select Bit 5 10 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW6 Port n Pin Hardware Select Bit 6 12 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW7 Port n Pin Hardware Select Bit 7 14 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW8 Port n Pin Hardware Select Bit 8 16 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 HW9 Port n Pin Hardware Select Bit 9 18 1 read-write value1 Software control only. #00 value2 HW0 control path can override the software configuration. #01 value3 HW1 control path can override the software configuration. #10 IN Port 3 Input Register 0x24 32 read-write n 0x0 0x0 P0 Port n Input Bit 0 0 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P1 Port n Input Bit 1 1 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P10 Port n Input Bit 10 10 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P11 Port n Input Bit 11 11 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P12 Port n Input Bit 12 12 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P13 Port n Input Bit 13 13 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P14 Port n Input Bit 14 14 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P15 Port n Input Bit 15 15 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P2 Port n Input Bit 2 2 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P3 Port n Input Bit 3 3 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P4 Port n Input Bit 4 4 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P5 Port n Input Bit 5 5 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P6 Port n Input Bit 6 6 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P7 Port n Input Bit 7 7 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P8 Port n Input Bit 8 8 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 P9 Port n Input Bit 9 9 read-only value1 The input level of Pn.x is 0. #0 value2 The input level of Pn.x is 1. #1 IOCR0 Port 3 Input/Output Control Register 0 0x10 32 read-write n 0x0 0x0 PC0 Port Control for Port n Pin 0 to 3 3 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC1 Port Control for Port n Pin 0 to 3 11 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC2 Port Control for Port n Pin 0 to 3 19 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 PC3 Port Control for Port n Pin 0 to 3 27 4 read-write value1 Input - No internal pull device active #00000 value2 Input - Internal pull-down device active #00001 value3 Input - Internal pull-up device active #00010 value4 Input - No internal pull device, Pn_OUTx = input value #00011 value5 Input inverted - No internal pull device active #00100 value6 Input inverted - Internal pull-down device active #00101 value7 Input inverted - Internal pull-up device active #00110 value8 Input inverted - No internal pull device, Pn_OUTx = input value #00111 value9 Output Push-Pull - General-purpose output #10000 value10 Output Push-Pull - Alternate output function 1 #10001 value11 Output Push-Pull - Alternate output function 2 #10010 value12 Output Push-Pull - Alternate output function 3 #10011 value13 Output Push-Pull - Alternate output function 4 #10100 value14 Output Open Drain - General-purpose output #11000 value15 Output Open Drain - Alternate output function 1 #11001 value16 Output Open Drain - Alternate output function 2 #11010 value17 Output Open Drain - Alternate output function 3 #11011 value18 Output Open Drain - Alternate output function 4 #11100 OMR Port 3 Output Modification Register 0x4 32 read-write n 0x0 0x0 PR0 Port n Reset Bit 0 16 write-only PR1 Port n Reset Bit 1 17 write-only PR10 Port n Reset Bit 10 26 write-only PR11 Port n Reset Bit 11 27 write-only PR12 Port n Reset Bit 12 28 write-only PR13 Port n Reset Bit 13 29 write-only PR14 Port n Reset Bit 14 30 write-only PR15 Port n Reset Bit 15 31 write-only PR2 Port n Reset Bit 2 18 write-only PR3 Port n Reset Bit 3 19 write-only PR4 Port n Reset Bit 4 20 write-only PR5 Port n Reset Bit 5 21 write-only PR6 Port n Reset Bit 6 22 write-only PR7 Port n Reset Bit 7 23 write-only PR8 Port n Reset Bit 8 24 write-only PR9 Port n Reset Bit 9 25 write-only PS0 Port n Set Bit 0 0 write-only PS1 Port n Set Bit 1 1 write-only PS10 Port n Set Bit 10 10 write-only PS11 Port n Set Bit 11 11 write-only PS12 Port n Set Bit 12 12 write-only PS13 Port n Set Bit 13 13 write-only PS14 Port n Set Bit 14 14 write-only PS15 Port n Set Bit 15 15 write-only PS2 Port n Set Bit 2 2 write-only PS3 Port n Set Bit 3 3 write-only PS4 Port n Set Bit 4 4 write-only PS5 Port n Set Bit 5 5 write-only PS6 Port n Set Bit 6 6 write-only PS7 Port n Set Bit 7 7 write-only PS8 Port n Set Bit 8 8 write-only PS9 Port n Set Bit 9 9 write-only OUT Port 3 Output Register 0x0 32 read-write n 0x0 0x0 P0 Port n Output Bit 0 0 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P1 Port n Output Bit 1 1 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P10 Port n Output Bit 10 10 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P11 Port n Output Bit 11 11 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P12 Port n Output Bit 12 12 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P13 Port n Output Bit 13 13 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P14 Port n Output Bit 14 14 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P15 Port n Output Bit 15 15 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P2 Port n Output Bit 2 2 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P3 Port n Output Bit 3 3 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P4 Port n Output Bit 4 4 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P5 Port n Output Bit 5 5 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P6 Port n Output Bit 6 6 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P7 Port n Output Bit 7 7 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P8 Port n Output Bit 8 8 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 P9 Port n Output Bit 9 9 read-write value1 The output level of Pn.x is 0. #0 value2 The output level of Pn.x is 1. #1 PDISC Port 3 Pin Function Decision Control Register 0x60 32 read-write n 0x0 0x0 PDIS0 Pad Disable for Port n Pin 0 0 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS1 Pad Disable for Port n Pin 1 1 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS10 Pad Disable for Port n Pin 10 10 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS11 Pad Disable for Port n Pin 11 11 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS12 Pad Disable for Port n Pin 12 12 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS13 Pad Disable for Port n Pin 13 13 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS14 Pad Disable for Port n Pin 14 14 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS15 Pad Disable for Port n Pin 15 15 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS2 Pad Disable for Port n Pin 2 2 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS3 Pad Disable for Port n Pin 3 3 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS4 Pad Disable for Port n Pin 4 4 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS5 Pad Disable for Port n Pin 5 5 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS6 Pad Disable for Port n Pin 6 6 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS7 Pad Disable for Port n Pin 7 7 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS8 Pad Disable for Port n Pin 8 8 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDIS9 Pad Disable for Port n Pin 9 9 read-only value1 Pad Pn.x is enabled. #0 value2 Pad Pn.x is disabled. #1 PDR0 Port 3 Pad Driver Mode 0 Register 0x40 32 read-write n 0x0 0x0 PD0 Pad Driver Mode for Pn.0 0 2 read-write PD1 Pad Driver Mode for Pn.1 4 2 read-write PD2 Pad Driver Mode for Pn.2 8 2 read-write PD3 Pad Driver Mode for Pn.3 12 2 read-write PD4 Pad Driver Mode for Pn.4 16 2 read-write PD5 Pad Driver Mode for Pn.5 20 2 read-write PD6 Pad Driver Mode for Pn.6 24 2 read-write PD7 Pad Driver Mode for Pn.7 28 2 read-write PPS Port 3 Pin Power Save Register 0x70 32 read-write n 0x0 0x0 PPS0 Port n Pin Power Save Bit 0 0 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS1 Port n Pin Power Save Bit 1 1 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS10 Port n Pin Power Save Bit 10 10 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS11 Port n Pin Power Save Bit 11 11 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS12 Port n Pin Power Save Bit 12 12 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS13 Port n Pin Power Save Bit 13 13 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS14 Port n Pin Power Save Bit 14 14 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS15 Port n Pin Power Save Bit 15 15 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS2 Port n Pin Power Save Bit 2 2 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS3 Port n Pin Power Save Bit 3 3 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS4 Port n Pin Power Save Bit 4 4 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS5 Port n Pin Power Save Bit 5 5 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS6 Port n Pin Power Save Bit 6 6 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS7 Port n Pin Power Save Bit 7 7 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS8 Port n Pin Power Save Bit 8 8 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 PPS9 Port n Pin Power Save Bit 9 9 read-write value1 Pin Power Save of Pn.x is disabled. #0 value2 Pin Power Save of Pn.x is enabled. #1 POSIF0 Position Interface 0 POSIF 0x0 0x0 0x50 registers n POSIF0_0 Position Interface (Module 0) 68 POSIF0_1 Position Interface (Module 0) 69 HALP Hall Sensor Patterns 0x30 32 read-write n 0x0 0x0 HCP Hall Current Pattern 0 2 read-only HEP Hall Expected Pattern 3 2 read-only HALPS Hall Sensor Shadow Patterns 0x34 32 read-write n 0x0 0x0 HCPS Shadow Hall Current Pattern 0 2 read-write HEPS Shadow Hall expected Pattern 3 2 read-write MCM Multi-Channel Pattern 0x40 32 read-write n 0x0 0x0 MCMP Multi-Channel Pattern 0 15 read-only MCMC Multi-Channel Pattern Control clear 0x4C 32 read-write n 0x0 0x0 MNPC Multi-Channel Pattern Update Enable Clear 0 write-only MPC Multi-Channel Pattern clear 1 write-only MCMF Multi-Channel Pattern Control flag 0x50 32 read-write n 0x0 0x0 MSS Multi-Channel Pattern update status 0 read-only value1 Update of the Multi-Channel pattern is set #0 value2 Update of the Multi-Channel pattern is not set #1 MCMS Multi-Channel Pattern Control set 0x48 32 read-write n 0x0 0x0 MNPS Multi-Channel Pattern Update Enable Set 0 write-only STHR Hall Pattern Shadow Transfer Request 1 write-only STMR Multi-Channel Shadow Transfer Request 2 write-only MCSM Multi-Channel Shadow Pattern 0x44 32 read-write n 0x0 0x0 MCMPS Shadow Multi-Channel Pattern 0 15 read-write MIDR Module Identification register 0x20 32 read-write n 0x0 0x0 MODN Module Number 16 15 read-only MODR Module Revision 0 7 read-only MODT Module Type 8 7 read-only PCONF Service Request Processing configuration 0x0 32 read-write n 0x0 0x0 DSEL Delay Pin selector 16 read-write value1 POSIFx.HSDA #0 value2 POSIFx.HSDB #1 EWIE External Wrong Hall Event enable 26 read-write value1 External wrong hall event emulation signal, POSIFx.EWHE[D...A], is disabled #0 value2 External wrong hall event emulation signal, POSIFx.EWHE[D...A], is enabled. #1 EWIL External Wrong Hall Event active level 27 read-write value1 POSIFx.EWHE[D...A] signal is active HIGH #0 value2 POSIFx.EWHE[D...A] signal is active LOW #1 EWIS Wrong Hall Event selection 24 1 read-write value1 POSIFx.EWHEA #00 value2 POSIFx.EWHEB #01 value3 POSIFx.EWHEC #10 value4 POSIFx.EWHED #11 FSEL Function Selector 0 1 read-write value1 Hall Sensor Mode enabled #00 value2 Quadrature Decoder Mode enabled #01 value3 stand-alone Multi-Channel Mode enabled #10 value4 Quadrature Decoder and stand-alone Multi-Channel Mode enabled #11 HIDG Idle generation enable 4 read-write INSEL0 PhaseA/Hal input 1 selector 8 1 read-write value1 POSIFx.IN0A #00 value2 POSIFx.IN0B #01 value3 POSIFx.IN0C #10 value4 POSIFx.IN0D #11 INSEL1 PhaseB/Hall input 2 selector 10 1 read-write value1 POSIFx.IN1A #00 value2 POSIFx.IN1B #01 value3 POSIFx.IN1C #10 value4 POSIFx.IN1D #11 INSEL2 Index/Hall input 3 selector 12 1 read-write value1 POSIFx.IN2A #00 value2 POSIFx.IN2B #01 value3 POSIFx.IN2C #10 value4 POSIFx.IN2D #11 LPC Low Pass Filters Configuration 28 2 read-write value1 Low pass filter disabled #000 value2 Low pass of 1 clock cycle #001 value3 Low pass of 2 clock cycles #010 value4 Low pass of 4 clock cycles #011 value5 Low pass of 8 clock cycles #100 value6 Low pass of 16 clock cycles #101 value7 Low pass of 32 clock cycles #110 value8 Low pass of 64 clock cycles #111 MCUE Multi-Channel Pattern SW update enable 5 read-write value1 Multi-Channel pattern update is controlled via HW #0 value2 Multi-Channel pattern update is controlled via SW #1 MSES Multi-Channel pattern update trigger edge 21 read-write value1 The signal used to enable a pattern update is active on the rising edge #0 value2 The signal used to enable a pattern update is active on the falling edge #1 MSETS Pattern update signal select 18 2 read-write value1 POSIFx.MSETA #000 value2 POSIFx.MSETB #001 value3 POSIFx.MSETC #010 value4 POSIFx.MSETD #011 value5 POSIFx.MSETE #100 value6 POSIFx.MSETF #101 value7 POSIFx.MSETG #110 value8 POSIFx.MSETH #111 MSYNS PWM synchronization signal selector 22 1 read-write value1 POSIFx.MSYNCA #00 value2 POSIFx.MSYNCB #01 value3 POSIFx.MSYNCC #10 value4 POSIFx.MSYNCD #11 QDCM Position Decoder Mode selection 2 read-write value1 Position encoder is in Quadrature Mode #0 value2 Position encoder is in Direction Count Mode. #1 SPES Edge selector for the sampling trigger 17 read-write value1 Rising edge #0 value2 Falling edge #1 PDBG POSIF Debug register 0x100 32 read-write n 0x0 0x0 HSP Hall Current Sampled Pattern 5 2 read-only IVAL Current Index Value 4 read-only LPP0 Actual count of the Low Pass Filter for POSI0 8 5 read-only LPP1 Actual count of the Low Pass Filter for POSI1 16 5 read-only LPP2 Actual count of the Low Pass Filter for POSI2 22 5 read-only QCSV Quadrature Decoder Current state 0 1 read-only QPSV Quadrature Decoder Previous state 2 1 read-only PFLG Service Request Processing Interrupt Flags 0x70 32 read-write n 0x0 0x0 CHES Correct Hall Event Status 0 read-only value1 Correct Hall Event not detected #0 value2 Correct Hall Event detected #1 CNTS Quadrature CLK Status 10 read-only value1 Quadrature clock not generated #0 value2 Quadrature clock generated #1 DIRS Quadrature Direction Change 11 read-only value1 Change on direction not detected #0 value2 Change on direction detected #1 ERRS Quadrature Phase Error Status 9 read-only value1 Phase Error event not detected #0 value2 Phase Error event detected #1 HIES Hall Inputs Update Status 2 read-only value1 Transition on the Hall Inputs not detected #0 value2 Transition on the Hall Inputs detected #1 INDXS Quadrature Index Status 8 read-only value1 Index event not detected #0 value2 Index event detected #1 MSTS Multi-Channel pattern shadow transfer status 4 read-only value1 Shadow transfer not done #0 value2 Shadow transfer done #1 PCLKS Quadrature Period Clk Status 12 read-only value1 Period clock not generated #0 value2 Period clock generated #1 WHES Wrong Hall Event Status 1 read-only value1 Wrong Hall Event not detected #0 value2 Wrong Hall Event detected #1 PFLGE Service Request Processing Interrupt Enable 0x74 32 read-write n 0x0 0x0 CHESEL Correct Hall Event Service Request Selector 16 read-write value1 Correct Hall Event interrupt forward to POSIFx.SR0 #0 value2 Correct Hall Event interrupt forward to POSIFx.SR1 #1 CNTSEL Quadrature Clock Event Service Request Selector 26 read-write value1 Quadrature Clock Event interrupt forward to POSIFx.SR0 #0 value2 Quadrature Clock Event interrupt forward to POSIFx.SR1 #1 DIRSEL Quadrature Direction Update Event Service Request Selector 27 read-write value1 Quadrature Direction Update Event interrupt forward to POSIFx.SR0 #0 value2 Quadrature Direction Update Event interrupt forward to POSIFx.SR1 #1 ECHE Correct Hall Event Enable 0 read-write value1 Correct Hall Event interrupt disabled #0 value2 Correct Hall Event interrupt enabled #1 ECNT Quadrature CLK interrupt Enable 10 read-write value1 Quadrature CLK event interrupt disabled #0 value2 Quadrature CLK event interrupt enabled #1 EDIR Quadrature direction change interrupt Enable 11 read-write value1 Direction change event interrupt disabled #0 value2 Direction change event interrupt enabled #1 EERR Quadrature Phase Error Enable 9 read-write value1 Phase error event interrupt disabled #0 value2 Phase error event interrupt enabled #1 EHIE Hall Input Update Enable 2 read-write value1 Update of the Hall Inputs interrupt is disabled #0 value2 Update of the Hall Inputs interrupt is enabled #1 EINDX Quadrature Index Event Enable 8 read-write value1 Index event interrupt disabled #0 value2 Index event interrupt enabled #1 EMST Multi-Channel pattern shadow transfer enable 4 read-write value1 Shadow transfer event interrupt disabled #0 value2 Shadow transfer event interrupt enabled #1 EPCLK Quadrature Period CLK interrupt Enable 12 read-write value1 Quadrature Period CLK event interrupt disabled #0 value2 Quadrature Period CLK event interrupt enabled #1 ERRSEL Quadrature Phase Error Event Service Request Selector 25 read-write value1 Quadrature Phase error Event interrupt forward to POSIFx.SR0 #0 value2 Quadrature Phase error Event interrupt forward to POSIFx.SR1 #1 EWHE Wrong Hall Event Enable 1 read-write value1 Wrong Hall Event interrupt disabled #0 value2 Wrong Hall Event interrupt enabled #1 HIESEL Hall Inputs Update Event Service Request Selector 18 read-write value1 Hall Inputs Update Event interrupt forward to POSIFx.SR0 #0 value2 Hall Inputs Update Event interrupt forward to POSIFx.SR1 #1 INDSEL Quadrature Index Event Service Request Selector 24 read-write value1 Quadrature Index Event interrupt forward to POSIFx.SR0 #0 value2 Quadrature Index Event interrupt forward to POSIFx.SR1 #1 MSTSEL Multi-Channel pattern Update Event Service Request Selector 20 read-write value1 Multi-Channel pattern Update Event interrupt forward to POSIFx.SR0 #0 value2 Multi-Channel pattern Update Event interrupt forward to POSIFx.SR1 #1 PCLSEL Quadrature Period clock Event Service Request Selector 28 read-write value1 Quadrature Period clock Event interrupt forward to POSIFx.SR0 #0 value2 Quadrature Period clock Event interrupt forward to POSIFx.SR1 #1 WHESEL Wrong Hall Event Service Request Selector 17 read-write value1 Wrong Hall Event interrupt forward to POSIFx.SR0 #0 value2 Wrong Hall Event interrupt forward to POSIFx.SR1 #1 PRUN Service Request Processing Run Bit Status 0x10 32 read-write n 0x0 0x0 RB Run Bit 0 read-only value1 IDLE #0 value2 Running #1 PRUNC Service Request Processing Run Bit Clear 0xC 32 read-write n 0x0 0x0 CRB Clear Run bit 0 write-only CSM Clear Current internal status 1 write-only PRUNS Service Request Processing Run Bit Set 0x8 32 read-write n 0x0 0x0 SRB Set Run bit 0 write-only PSUS Service Request Processing Suspend Config 0x4 32 read-write n 0x0 0x0 MSUS Multi-Channel Mode Suspend Config 2 1 read-write value1 Suspend request ignored #00 value2 Stop immediately. Multi-Channel pattern is not set to the reset value. #01 value3 Stop immediately. Multi-Channel pattern is set to the reset value. #10 value4 Suspend with the synchronization of the PWM signal. Multi-Channel pattern is set to the reset value at the same time of the synchronization. #11 QSUS Quadrature Mode Suspend Config 0 1 read-write value1 Suspend request ignored #00 value2 Stop immediately #01 value3 Suspend in the next index occurrence #10 value4 Suspend in the next phase (PhaseA or PhaseB) occurrence #11 QDC Quadrature Decoder Control 0x60 32 read-write n 0x0 0x0 DVAL Current rotation direction 8 read-only value1 Counterclockwise rotation #0 value2 Clockwise rotation #1 ICM Index Marker generations control 4 1 read-write value1 No index marker generation on POSIFx.OUT3 #00 value2 Only first index occurrence generated on POSIFx.OUT3 #01 value3 All index occurrences generated on POSIFx.OUT3 #10 PALS Phase A Level selector 0 read-write value1 Phase A is active HIGH #0 value2 Phase A is active LOW #1 PBLS Phase B Level selector 1 read-write value1 Phase B is active HIGH #0 value2 Phase B is active LOW #1 PHS Phase signals swap 2 read-write value1 Phase A is the leading signal for clockwise rotation #0 value2 Phase B is the leading signal for clockwise rotation #1 RPFLG Service Request Processing Interrupt Clear 0x7C 32 read-write n 0x0 0x0 RCHE Correct Hall Event flag clear 0 write-only RCNT Quadrature CLK flag clear 10 write-only RDIR Quadrature Direction flag clear 11 write-only RERR Quadrature Phase Error flag clear 9 write-only RHIE Hall Inputs Update Event flag clear 2 write-only RINDX Quadrature Index flag clear 8 write-only RMST Multi-Channel Pattern shadow transfer flag clear 4 write-only RPCLK Quadrature period clock flag clear 12 write-only RWHE Wrong Hall Event flag clear 1 write-only SPFLG Service Request Processing Interrupt Set 0x78 32 read-write n 0x0 0x0 SCHE Correct Hall Event flag set 0 write-only SCNT Quadrature CLK flag set 10 write-only SDIR Quadrature Direction flag set 11 write-only SERR Quadrature Phase Error flag set 9 write-only SHIE Hall Inputs Update Event flag set 2 write-only SINDX Quadrature Index flag set 8 write-only SMST Multi-Channel Pattern shadow transfer flag set 4 write-only SPCLK Quadrature period clock flag set 12 write-only SWHE Wrong Hall Event flag set 1 write-only PPB Cortex-M4 Private Peripheral Block PPB 0x0 0x0 0x1000 registers n ACTLR Auxiliary Control Register 0x8 32 read-write n 0x0 0x0 DISDEFWBUF Disable write buffer 1 read-write DISFOLD Disable IT folding 2 read-write DISFPCA Disable FPCA update 8 read-write DISMCYCINT Disable load/store multiple 0 read-write DISOOFP Disable out of order FP execution 9 read-write AFSR Auxiliary Fault Status Register 0xD3C 32 read-write n 0x0 0x0 VALUE Reserved 0 31 read-write AIRCR Application Interrupt and Reset Control Register 0xD0C 32 read-write n 0x0 0x0 ENDIANNESS Data endianness bit 15 read-only value1 Little-endian #0 value2 Big-endian. #1 PRIGROUP Interrupt priority grouping field 8 2 read-write SYSRESETREQ System reset request 2 write-only value1 no system reset request #0 value2 asserts a signal to the outer system that requests a reset. #1 VECTCLRACTIVE Reserved for Debug use. 1 write-only VECTKEY Register key 16 15 read-write VECTRESET Reserved for Debug use. 0 write-only BFAR BusFault Address Register 0xD38 32 read-write n 0x0 0x0 ADDRESS Address causing the fault 0 31 read-write CCR Configuration and Control Register 0xD14 32 read-write n 0x0 0x0 BFHFNMIGN Bus Fault Hard Fault and NMI Ignore 8 read-write value1 data bus faults caused by load and store instructions cause a lock-up #0 value2 handlers running at priority -1 and -2 ignore data bus faults caused by load and store instructions. #1 DIV_0_TRP Divide by Zero Trap Enable 4 read-write value1 do not trap divide by 0 #0 value2 trap divide by 0. #1 NONBASETHRDENA Non Base Thread Mode Enable 0 read-write value1 processor can enter Thread mode only when no exception is active. #0 value2 processor can enter Thread mode from any level under the control of an EXC_RETURN value, see Exception returnException return occurs when the processor is in Handler mode and executes one of the following instructions to load the EXC_RETURN value into the PC:an LDM or POP instruction that loads the PCan LDR instruction with PC as the destinationa BX instruction using any register.EXC_RETURN is the value loaded into the LR on exception entry. The exception mechanism relies on this value to detect when the processor has completed an exception handler. The lowest five bits of this value provide information on the return stack and processor mode. shows the EXC_RETURN values with a description of the exception return behavior. All EXC_RETURN values have bits[31:5] set to one. When this value is loaded into the PC it indicates to the processor that the exception is complete, and the processor initiates the appropriate exception return sequence.Exception return behaviorEXC_RETURN[31:0]Description 0xFFFFFFF1 Return to Handler mode, exception return uses non-floating-point state from the MSP and execution uses MSP after return. 0xFFFFFFF9 Return to Thread mode, exception return uses non-floating-point state from MSP and execution uses MSP after return. 0xFFFFFFFD Return to Thread mode, exception return uses non-floating-point state from the PSP and execution uses PSP after return. 0xFFFFFFE1 Return to Handler mode, exception return uses floating-point-state from MSP and execution uses MSP after return. 0xFFFFFFE9 Return to Thread mode, exception return uses floating-point state from MSP and execution uses MSP after return. 0xFFFFFFED Return to Thread mode, exception return uses floating-point state from PSP and execution uses PSP after return. . #1 STKALIGN Stack Alignment 9 read-write value1 4-byte aligned #0 value2 8-byte aligned. #1 UNALIGN_TRP Unaligned Access Trap Enable 3 read-write value1 do not trap unaligned halfword and word accesses #0 value2 trap unaligned halfword and word accesses. #1 USERSETMPEND User Set Pending Enable 1 read-write value1 disable #0 value2 enable #1 CFSR Configurable Fault Status Register 0xD28 32 read-write n 0x0 0x0 BFARVALID BusFault Address Register (BFAR) valid flag 15 read-write value1 value in BFAR is not a valid fault address #0 value2 BFAR holds a valid fault address. #1 DACCVIOL Data access violation flag 1 read-write value1 no data access violation fault #0 value2 the processor attempted a load or store at a location that does not permit the operation. #1 DIVBYZERO Divide by zero UsageFault 25 read-write value1 no divide by zero fault, or divide by zero trapping not enabled #0 value2 the processor has executed an SDIV or UDIV instruction with a divisor of 0 #1 IACCVIOL Instruction access violation flag 0 read-write value1 no instruction access violation fault #0 value2 the processor attempted an instruction fetch from a location that does not permit execution. #1 IBUSERR Instruction bus error 8 read-write value1 no instruction bus error #0 value2 instruction bus error. #1 IMPRECISERR Imprecise data bus error 10 read-write value1 no imprecise data bus error #0 value2 a data bus error has occurred, but the return address in the stack frame is not related to the instruction that caused the error. #1 INVPC Invalid PC load UsageFault 18 read-write value1 no invalid PC load UsageFault #0 value2 the processor has attempted an illegal load of EXC_RETURN to the PC, as a result of an invalid context, or an invalid EXC_RETURN value. #1 INVSTATE Invalid state UsageFault 17 read-write value1 no invalid state UsageFault #0 value2 the processor has attempted to execute an instruction that makes illegal use of the EPSR. #1 LSPERR BusFault during floating point lazy state preservation 13 read-write value1 No bus fault occurred during floating-point lazy state preservation. #0 value2 A bus fault occurred during floating-point lazy state preservation #1 MLSPERR MemManage fault during floating point lazy state preservation 5 read-write value1 No MemManage fault occurred during floating-point lazy state preservation #0 value2 A MemManage fault occurred during floating-point lazy state preservation #1 MMARVALID MemManage Fault Address Register (MMFAR) valid flag 7 read-write value1 value in MMAR is not a valid fault address #0 value2 MMAR holds a valid fault address. #1 MSTKERR MemManage fault on stacking for exception entry 4 read-write value1 no stacking fault #0 value2 stacking for an exception entry has caused one or more access violations. #1 MUNSTKERR MemManage fault on unstacking for a return from exception 3 read-write value1 no unstacking fault #0 value2 unstack for an exception return has caused one or more access violations. #1 NOCP No coprocessor UsageFault 19 read-write value1 no UsageFault caused by attempting to access a coprocessor #0 value2 the processor has attempted to access a coprocessor. #1 PRECISERR Precise data bus error 9 read-write value1 no precise data bus error #0 value2 a data bus error has occurred, and the PC value stacked for the exception return points to the instruction that caused the fault. #1 STKERR BusFault on stacking for exception entry 12 read-write value1 no stacking fault #0 value2 stacking for an exception entry has caused one or more BusFaults. #1 UNALIGNED Unaligned access UsageFault 24 read-write value1 no unaligned access fault, or unaligned access trapping not enabled #0 value2 the processor has made an unaligned memory access. #1 UNDEFINSTR Undefined instruction UsageFault 16 read-write value1 no undefined instruction UsageFault #0 value2 the processor has attempted to execute an undefined instruction. #1 UNSTKERR BusFault on unstacking for a return from exception 11 read-write value1 no unstacking fault #0 value2 stacking for an exception entry has caused one or more BusFaults. #1 CPACR Coprocessor Access Control Register 0xD88 32 read-write n 0x0 0x0 CP10 Access privileges for coprocessor 10 20 1 read-write value1 Access denied. Any attempted access generates a NOCP UsageFault. #00 value2 Privileged access only. An unprivileged access generates a NOCP fault. #01 value4 Full access. #11 CP11 Access privileges for coprocessor 11 22 1 read-write value1 Access denied. Any attempted access generates a NOCP UsageFault. #00 value2 Privileged access only. An unprivileged access generates a NOCP fault. #01 value4 Full access. #11 CPUID CPUID Base Register 0xD00 32 read-write n 0x0 0x0 Constant Reads as 0xF 16 3 read-only Implementer Implementer code 24 7 read-only value1 ARM 0x41 PartNo Part number of the processor 4 11 read-only value1 Cortex-M4 0xC24 Revision Revision number 0 3 read-only value1 Patch 1 0x1 Variant Variant number 20 3 read-only value1 Revision 0 0x0 FPCAR Floating-point Context Address Register 0xF38 32 read-write n 0x0 0x0 ADDRESS Address 3 28 read-write FPCCR Floating-point Context Control Register 0xF34 32 read-write n 0x0 0x0 ASPEN Automatic State Preservation 31 read-write value1 Disable CONTROL setting on execution of a floating-point instruction. #0 value2 Enable CONTROL setting on execution of a floating-point instruction. #1 BFRDY BusFault Ready 6 read-write value1 BusFault is disabled or priority did not permit setting the BusFault handler to the pending state when the floating-point stack frame was allocated. #0 value2 BusFault is enabled and priority permitted setting the BusFault handler to the pending state when the floating-point stack frame was allocated. #1 HFRDY HardFault Ready 4 read-write value1 Priority did not permit setting the HardFault handler to the pending state when the floating-point stack frame was allocated. #0 value2 Priority permitted setting the HardFault handler to the pending state when the floating-point stack frame was allocated. #1 LSPACT Lazy State Preservation Active 0 read-write value1 Lazy state preservation is not active. #0 value2 Lazy state preservation is active. floating-point stack frame has been allocated but saving state to it has been deferred. #1 LSPEN Lazy State Preservation Enabled 30 read-write value1 Disable automatic lazy state preservation for floating-point context. #0 value2 Enable automatic lazy state preservation for floating-point context. #1 MMRDY MemManage Ready 5 read-write value1 MemManage is disabled or priority did not permit setting the MemManage handler to the pending state when the floating-point stack frame was allocated. #0 value2 MemManage is enabled and priority permitted setting the MemManage handler to the pending state when the floating-point stack frame was allocated. #1 MONRDY Monitor Ready 8 read-write value1 Debug Monitor is disabled or priority did not permit setting MON_PEND when the floating-point stack frame was allocated. #0 value2 Debug Monitor is enabled and priority permits setting MON_PEND when the floating-point stack frame was allocated. #1 THREAD Thread Mode allocated Stack Frame 3 read-write value1 Mode was not Thread Mode when the floating-point stack frame was allocated. #0 value2 Mode was Thread Mode when the floating-point stack frame was allocated. #1 USER User allocated Stack Frame 1 read-write value1 Privilege level was not user when the floating-point stack frame was allocated. #0 value2 Privilege level was user when the floating-point stack frame was allocated. #1 FPDSCR Floating-point Default Status Control Register 0xF3C 32 read-write n 0x0 0x0 AHP Default value for FPSCR.AHP 26 read-write DN Default value for FPSCR.DN 25 read-write FZ Default value for FPSCR.FZ 24 read-write RMode Default value for FPSCR.RMode 22 1 read-write HFSR HardFault Status Register 0xD2C 32 read-write n 0x0 0x0 DEBUGEVT Reserved for Debug use 31 read-write FORCED Forced HardFault 30 read-write value1 no forced HardFault #0 value2 forced HardFault. #1 VECTTBL BusFault on vector table read 1 read-write value1 no BusFault on vector table read #0 value2 BusFault on vector table read #1 ICSR Interrupt Control and State Register 0xD04 32 read-write n 0x0 0x0 ISRPENDING Interrupt pending flag 22 read-only value1 interrupt not pending #0 value2 interrupt pending. #1 NMIPENDSET NMI set-pending bit: 0b0=no effect, 0b1=changes NMI exception state to pending., 0b0=NMI exception is not pending, 0b1=NMI exception is pending., 31 read-write PENDSTCLR SysTick exception clear-pending bit 25 write-only value1 no effect #0 value2 removes the pending state from the SysTick exception. #1 PENDSTSET SysTick exception set-pending bit 26 read-write value1 no effect #0 value2 changes SysTick exception state to pending. #1 PENDSVCLR PendSV clear-pending bit 27 write-only value1 no effect #0 value2 removes the pending state from the PendSV exception. #1 PENDSVSET PendSV set-pending bit: 0b0=no effect, 0b1=changes PendSV exception state to pending., 0b0=PendSV exception is not pending, 0b1=PendSV exception is pending., 28 read-write RETTOBASE Return to Base 11 read-only value1 there are preempted active exceptions to execute #0 value2 there are no active exceptions, or the currently-executing exception is the only active exception. #1 VECTACTIVE Active exception number 0 8 read-only value1 Thread mode 0x00 VECTPENDING Vector Pending 12 5 read-only value1 no pending exceptions 0x0 MMFAR MemManage Fault Address Register 0xD34 32 read-write n 0x0 0x0 ADDRESS Address causing the fault 0 31 read-write MPU_CTRL MPU Control Register 0xD94 32 read-write n 0x0 0x0 ENABLE Enable MPU 0 read-write value1 MPU disabled #0 value2 MPU enabled. #1 HFNMIENA Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers 1 read-write value1 MPU is disabled during hard fault, NMI, and FAULTMASK handlers, regardless of the value of the ENABLE bit #0 value2 the MPU is enabled during hard fault, NMI, and FAULTMASK handlers. #1 PRIVDEFENA Enables privileged software access to the default memory map 2 read-write value1 If the MPU is enabled, disables use of the default memory map. Any memory access to a location not covered by any enabled region causes a fault. #0 value2 If the MPU is enabled, enables use of the default memory map as a background region for privileged software accesses. #1 MPU_RASR MPU Region Attribute and Size Register 0xDA0 32 read-write n 0x0 0x0 AP Access permission field 24 2 read-write B Memory access attribute 16 read-write C Memory access attribute 17 read-write ENABLE Region enable bit. 0 read-write S Shareable bit 18 read-write SIZE MPU protection region size 1 4 read-write SRD Subregion disable bits 8 7 read-write value1 corresponding sub-region is enabled #0 value2 corresponding sub-region is disabled #1 TEX Memory access attribute 19 2 read-write XN Instruction access disable bit 28 read-write value1 instruction fetches enabled #0 value2 instruction fetches disabled. #1 MPU_RASR_A1 MPU Region Attribute and Size Register A1 0xDA8 32 read-write n 0x0 0x0 AP Access permission field 24 2 read-write B Memory access attribute 16 read-write C Memory access attribute 17 read-write ENABLE Region enable bit. 0 read-write S Shareable bit 18 read-write SIZE MPU protection region size 1 4 read-write SRD Subregion disable bits 8 7 read-write value1 corresponding sub-region is enabled #0 value2 corresponding sub-region is disabled #1 TEX Memory access attribute 19 2 read-write XN Instruction access disable bit 28 read-write value1 instruction fetches enabled #0 value2 instruction fetches disabled. #1 MPU_RASR_A2 MPU Region Attribute and Size Register A2 0xDB0 32 read-write n 0x0 0x0 AP Access permission field 24 2 read-write B Memory access attribute 16 read-write C Memory access attribute 17 read-write ENABLE Region enable bit. 0 read-write S Shareable bit 18 read-write SIZE MPU protection region size 1 4 read-write SRD Subregion disable bits 8 7 read-write value1 corresponding sub-region is enabled #0 value2 corresponding sub-region is disabled #1 TEX Memory access attribute 19 2 read-write XN Instruction access disable bit 28 read-write value1 instruction fetches enabled #0 value2 instruction fetches disabled. #1 MPU_RASR_A3 MPU Region Attribute and Size Register A3 0xDB8 32 read-write n 0x0 0x0 AP Access permission field 24 2 read-write B Memory access attribute 16 read-write C Memory access attribute 17 read-write ENABLE Region enable bit. 0 read-write S Shareable bit 18 read-write SIZE MPU protection region size 1 4 read-write SRD Subregion disable bits 8 7 read-write value1 corresponding sub-region is enabled #0 value2 corresponding sub-region is disabled #1 TEX Memory access attribute 19 2 read-write XN Instruction access disable bit 28 read-write value1 instruction fetches enabled #0 value2 instruction fetches disabled. #1 MPU_RBAR MPU Region Base Address Register 0xD9C 32 read-write n 0x0 0x0 ADDR Region base address field 9 22 read-write REGION MPU region field 0 3 read-write VALID MPU Region Number valid bit 4 read-write value1 MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field #0 value2 the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field. #1 MPU_RBAR_A1 MPU Region Base Address Register A1 0xDA4 32 read-write n 0x0 0x0 ADDR Region base address field 9 22 read-write REGION MPU region field 0 3 read-write VALID MPU Region Number valid bit 4 read-write value1 MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field #0 value2 the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field. #1 MPU_RBAR_A2 MPU Region Base Address Register A2 0xDAC 32 read-write n 0x0 0x0 ADDR Region base address field 9 22 read-write REGION MPU region field 0 3 read-write VALID MPU Region Number valid bit 4 read-write value1 MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field #0 value2 the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field. #1 MPU_RBAR_A3 MPU Region Base Address Register A3 0xDB4 32 read-write n 0x0 0x0 ADDR Region base address field 9 22 read-write REGION MPU region field 0 3 read-write VALID MPU Region Number valid bit 4 read-write value1 MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field #0 value2 the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field. #1 MPU_RNR MPU Region Number Register 0xD98 32 read-write n 0x0 0x0 REGION Region 0 7 read-write MPU_TYPE MPU Type Register 0xD90 32 read-write n 0x0 0x0 DREGION Number of supported MPU data regions 8 7 read-only IREGION Number of supported MPU instruction regions 16 7 read-only SEPARATE Support for unified or separate instruction and date memory maps 0 read-only NVIC_IABR0 Interrupt Active Bit Register 0 0x300 32 read-write n 0x0 0x0 ACTIVE Interrupt active flags: 0 31 read-write value1 interrupt not active #0 value2 interrupt active #1 NVIC_IABR1 Interrupt Active Bit Register 1 0x304 32 read-write n 0x0 0x0 ACTIVE Interrupt active flags: 0 31 read-write value1 interrupt not active #0 value2 interrupt active #1 NVIC_IABR2 Interrupt Active Bit Register 2 0x308 32 read-write n 0x0 0x0 ACTIVE Interrupt active flags: 0 31 read-write value1 interrupt not active #0 value2 interrupt active #1 NVIC_IABR3 Interrupt Active Bit Register 3 0x30C 32 read-write n 0x0 0x0 ACTIVE Interrupt active flags: 0 31 read-write value1 interrupt not active #0 value2 interrupt active #1 NVIC_ICER0 Interrupt Clear-enable Register 0 0x180 32 read-write n 0x0 0x0 CLRENA Interrupt clear-enable bits. 0 31 read-write value3 interrupt disabled #0 value4 interrupt enabled. #1 NVIC_ICER1 Interrupt Clear-enable Register 1 0x184 32 read-write n 0x0 0x0 CLRENA Interrupt clear-enable bits. 0 31 read-write value3 interrupt disabled #0 value4 interrupt enabled. #1 NVIC_ICER2 Interrupt Clear-enable Register 2 0x188 32 read-write n 0x0 0x0 CLRENA Interrupt clear-enable bits. 0 31 read-write value3 interrupt disabled #0 value4 interrupt enabled. #1 NVIC_ICER3 Interrupt Clear-enable Register 3 0x18C 32 read-write n 0x0 0x0 CLRENA Interrupt clear-enable bits. 0 31 read-write value3 interrupt disabled #0 value4 interrupt enabled. #1 NVIC_ICPR0 Interrupt Clear-pending Register 0 0x280 32 read-write n 0x0 0x0 CLRPEND Interrupt set-pending bits. 0 31 read-write value3 interrupt is not pending #0 value4 interrupt is pending. #1 NVIC_ICPR1 Interrupt Clear-pending Register 1 0x284 32 read-write n 0x0 0x0 CLRPEND Interrupt set-pending bits. 0 31 read-write value3 interrupt is not pending #0 value4 interrupt is pending. #1 NVIC_ICPR2 Interrupt Clear-pending Register 2 0x288 32 read-write n 0x0 0x0 CLRPEND Interrupt set-pending bits. 0 31 read-write value3 interrupt is not pending #0 value4 interrupt is pending. #1 NVIC_ICPR3 Interrupt Clear-pending Register 3 0x28C 32 read-write n 0x0 0x0 CLRPEND Interrupt set-pending bits. 0 31 read-write value3 interrupt is not pending #0 value4 interrupt is pending. #1 NVIC_IPR0 Interrupt Priority Register 0 0x400 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR1 Interrupt Priority Register 1 0x404 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR10 Interrupt Priority Register 10 0x428 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR11 Interrupt Priority Register 11 0x42C 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR12 Interrupt Priority Register 12 0x430 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR13 Interrupt Priority Register 13 0x434 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR14 Interrupt Priority Register 14 0x438 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR15 Interrupt Priority Register 15 0x43C 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR16 Interrupt Priority Register 16 0x440 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR17 Interrupt Priority Register 17 0x444 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR18 Interrupt Priority Register 18 0x448 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR19 Interrupt Priority Register 19 0x44C 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR2 Interrupt Priority Register 2 0x408 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR20 Interrupt Priority Register 20 0x450 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR21 Interrupt Priority Register 21 0x454 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR22 Interrupt Priority Register 22 0x458 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR23 Interrupt Priority Register 23 0x45C 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR24 Interrupt Priority Register 24 0x460 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR25 Interrupt Priority Register 25 0x464 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR26 Interrupt Priority Register 26 0x468 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR27 Interrupt Priority Register 27 0x46C 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR3 Interrupt Priority Register 3 0x40C 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR4 Interrupt Priority Register 4 0x410 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR5 Interrupt Priority Register 5 0x414 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR6 Interrupt Priority Register 6 0x418 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR7 Interrupt Priority Register 7 0x41C 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR8 Interrupt Priority Register 8 0x420 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_IPR9 Interrupt Priority Register 9 0x424 32 read-write n 0x0 0x0 PRI_0 Priority value 0 0 7 read-write PRI_1 Priority value 1 8 7 read-write PRI_2 Priority value 2 16 7 read-write PRI_3 Priority value 3 24 7 read-write NVIC_ISER0 Interrupt Set-enable Register 0 0x100 32 read-write n 0x0 0x0 SETENA Interrupt set-enable bits 0 31 read-write value3 interrupt disabled #0 value4 interrupt enabled. #1 NVIC_ISER1 Interrupt Set-enable Register 1 0x104 32 read-write n 0x0 0x0 SETENA Interrupt set-enable bits 0 31 read-write value3 interrupt disabled #0 value4 interrupt enabled. #1 NVIC_ISER2 Interrupt Set-enable Register 2 0x108 32 read-write n 0x0 0x0 SETENA Interrupt set-enable bits 0 31 read-write value3 interrupt disabled #0 value4 interrupt enabled. #1 NVIC_ISER3 Interrupt Set-enable Register 3 0x10C 32 read-write n 0x0 0x0 SETENA Interrupt set-enable bits 0 31 read-write value3 interrupt disabled #0 value4 interrupt enabled. #1 NVIC_ISPR0 Interrupt Set-pending Register 0 0x200 32 read-write n 0x0 0x0 SETPEND Interrupt set-pending bits. 0 31 read-write value3 interrupt is not pending #0 value4 interrupt is pending. #1 NVIC_ISPR1 Interrupt Set-pending Register 1 0x204 32 read-write n 0x0 0x0 SETPEND Interrupt set-pending bits. 0 31 read-write value3 interrupt is not pending #0 value4 interrupt is pending. #1 NVIC_ISPR2 Interrupt Set-pending Register 2 0x208 32 read-write n 0x0 0x0 SETPEND Interrupt set-pending bits. 0 31 read-write value3 interrupt is not pending #0 value4 interrupt is pending. #1 NVIC_ISPR3 Interrupt Set-pending Register 3 0x20C 32 read-write n 0x0 0x0 SETPEND Interrupt set-pending bits. 0 31 read-write value3 interrupt is not pending #0 value4 interrupt is pending. #1 SCR System Control Register 0xD10 32 read-write n 0x0 0x0 SEVONPEND Send Event on Pending bit: 4 read-write value1 only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded #0 value2 enabled events and all interrupts, including disabled interrupts, can wakeup the processor. #1 SLEEPDEEP Sleep or Deep Sleep 2 read-write value1 sleep #0 value2 deep sleep #1 SLEEPONEXIT Sleep on Exit 1 read-write value1 do not sleep when returning to Thread mode. #0 value2 enter sleep, or deep sleep, on return from an ISR. #1 SHCSR System Handler Control and State Register 0xD24 32 read-write n 0x0 0x0 BUSFAULTACT BusFault exception active bit 1 read-write BUSFAULTENA BusFault enable bit 17 read-write BUSFAULTPENDED BusFault exception pending bit 14 read-write MEMFAULTACT MemManage exception active bit 0 read-write MEMFAULTENA MemManage enable bit 16 read-write MEMFAULTPENDED MemManage exception pending bit 13 read-write MONITORACT Debug monitor active bit 8 read-write PENDSVACT PendSV exception active bit 10 read-write SVCALLACT SVCall active bit 7 read-write SVCALLPENDED SVCall pending bit 15 read-write SYSTICKACT SysTick exception active bit 11 read-write USGFAULTACT UsageFault exception active bit 3 read-write USGFAULTENA UsageFault enable bit 18 read-write USGFAULTPENDED UsageFault exception pending bit 12 read-write SHPR1 System Handler Priority Register 1 0xD18 32 read-write n 0x0 0x0 PRI_4 Priority of system handler 4, MemManage 0 7 read-write PRI_5 Priority of system handler 5, BusFault 8 7 read-write PRI_6 Priority of system handler 6, UsageFault 16 7 read-write SHPR2 System Handler Priority Register 2 0xD1C 32 read-write n 0x0 0x0 PRI_11 Priority of system handler 11, SVCall 24 7 read-write SHPR3 System Handler Priority Register 3 0xD20 32 read-write n 0x0 0x0 PRI_14 Priority of system handler 14 16 7 read-write PRI_15 Priority of system handler 15 24 7 read-write STIR Software Trigger Interrupt Register 0xF00 32 read-write n 0x0 0x0 INTID Interrupt ID of the interrupt to trigger 0 8 write-only SYST_CALIB SysTick Calibration Value Register r 0x1C 32 read-write n 0x0 0x0 NOREF No Reference Clock 31 read-write value1 reference clock provided #0 value2 no reference clock provided. #1 SKEW Ten Milliseconds Skewed 30 read-write value1 TENMS value is exact #0 value2 TENMS value is inexact, or not given. #1 TENMS Ten Milliseconds Reload Value 0 23 read-write SYST_CSR SysTick Control and Status Register 0x10 32 read-write n 0x0 0x0 CLKSOURCE Indicates the clock source: 2 read-write value1 external clock #0 value2 processor clock. #1 COUNTFLAG Counter Flag 16 read-write ENABLE Enable 0 read-write value1 counter disabled #0 value2 counter enabled. #1 TICKINT Tick Interrupt Enable 1 read-write value1 counting down to zero does not assert the SysTick exception request #0 value2 counting down to zero to asserts the SysTick exception request. #1 SYST_CVR SysTick Current Value Register 0x18 32 read-write n 0x0 0x0 CURRENT Current Value 0 23 read-write SYST_RVR SysTick Reload Value Register 0x14 32 read-write n 0x0 0x0 RELOAD Reload Value 0 23 read-write VTOR Vector Table Offset Register 0xD08 32 read-write n 0x0 0x0 TBLOFF Vector table base offset field 10 21 read-write PREF Prefetch Unit PREF 0x0 0x0 0x4 registers n PCON Prefetch Configuration Register 0x0 32 read-write n 0x0 0x0 DBYP Data Buffer Bypass 4 read-write value1 Prefetch Data buffer not bypassed. #0 value2 Prefetch Data buffer bypassed. #1 IBYP Instruction Prefetch Buffer Bypass 0 read-write value1 Instruction prefetch buffer not bypassed. #0 value2 Instruction prefetch buffer bypassed. #1 IINV Instruction Prefetch Buffer Invalidate 1 write-only value1 No effect. #0 value2 Initiate invalidation of entire instruction cache. #1 RTC Real Time Clock RTC 0x0 0x0 0x200 registers n ATIM0 RTC Alarm Time Register 0 0x18 32 read-write n 0x0 0x0 ADA Alarm Days Compare Value 24 4 read-write AHO Alarm Hours Compare Value 16 4 read-write AMI Alarm Minutes Compare Value 8 5 read-write ASE Alarm Seconds Compare Value 0 5 read-write ATIM1 RTC Alarm Time Register 1 0x1C 32 read-write n 0x0 0x0 AMO Alarm Month Compare Value 8 3 read-write AYE Alarm Year Compare Value 16 15 read-write CLRSR RTC Clear Service Request Register 0x14 32 read-write n 0x0 0x0 RAI Alarm Interrupt Clear 8 write-only RPDA Periodic Days Interrupt Clear 3 write-only RPHO Periodic Hours Interrupt Clear 2 write-only RPMI Periodic Minutes Interrupt Clear 1 write-only RPMO Periodic Months Interrupt Clear 5 write-only RPSE Periodic Seconds Interrupt Clear 0 write-only RPYE Periodic Years Interrupt Clear 6 write-only CTR RTC Control Register 0x4 32 read-write n 0x0 0x0 DIV RTC Clock Divider Value 16 15 read-write EDAC Enable Days Comparison for Hibernation Wake-up 11 read-write EHOC Enable Hours Comparison for Hibernation Wake-up 10 read-write EMIC Enable Minutes Comparison for Hibernation Wake-up 9 read-write EMOC Enable Months Comparison for Hibernation Wake-up 13 read-write ENB RTC Module Enable 0 read-write ESEC Enable Seconds Comparison for Hibernation Wake-up 8 read-write EYEC Enable Years Comparison for Hibernation Wake-up 14 read-write TAE Timer Alarm Enable for Hibernation Wake-up 2 read-write ID RTC ID Register 0x0 32 read-write n 0x0 0x0 MOD_NUMBER Module Number 16 15 read-only MOD_REV Module Revision 0 7 read-only MOD_TYPE Module Type 8 7 read-only MSKSR RTC Service Request Mask Register 0x10 32 read-write n 0x0 0x0 MAI Alarm Interrupt Mask 8 read-write MPDA Periodic Days Interrupt Mask 3 read-write MPHO Periodic Hours Interrupt Mask 2 read-write MPMI Periodic Minutes Interrupt Mask 1 read-write MPMO Periodic Months Interrupt Mask 5 read-write MPSE Periodic Seconds Interrupt Mask 0 read-write MPYE Periodic Years Interrupt Mask 6 read-write RAWSTAT RTC Raw Service Request Register 0x8 32 read-write n 0x0 0x0 RAI Raw Alarm Service Request 8 read-only RPDA Raw Periodic Days Service Request 3 read-only RPHO Raw Periodic Hours Service Request 2 read-only RPMI Raw Periodic Minutes Service Request 1 read-only RPMO Raw Periodic Months Service Request 5 read-only RPSE Raw Periodic Seconds Service Request 0 read-only RPYE Raw Periodic Years Service Request 6 read-only STSSR RTC Service Request Status Register 0xC 32 read-write n 0x0 0x0 SAI Alarm Service Request Status after Masking 8 read-only SPDA Periodic Days Service Request Status after Masking 3 read-only SPHO Periodic Hours Service Request Status after Masking 2 read-only SPMI Periodic Minutes Service Request Status after Masking 1 read-only SPMO Periodic Months Service Request Status after Masking 5 read-only SPSE Periodic Seconds Service Request Status after Masking 0 read-only SPYE Periodic Years Service Request Status after Masking 6 read-only TIM0 RTC Time Register 0 0x20 32 read-write n 0x0 0x0 DA Days Time Value 24 4 read-write HO Hours Time Value 16 4 read-write MI Minutes Time Value 8 5 read-write SE Seconds Time Value 0 5 read-write TIM1 RTC Time Register 1 0x24 32 read-write n 0x0 0x0 DAWE Days of Week Time Value 0 2 read-write MO Month Time Value 8 3 read-write YE Year Time Value 16 15 read-write SCU_CLK System Control Unit SCU 0x0 0x0 0x100 registers n CCUCLKCR CCU Clock Control Register 0x20 32 read-write n 0x0 0x0 CCUDIV CCU Clock Divider Enable 0 read-write value1 fCCU = fSYS #0 value2 fCCU = fSYS / 2 #1 CGATCLR0 Peripheral 0 Clock Gating Clear 0x48 32 read-write n 0x0 0x0 CCU40 CCU40 Gating Clear 2 write-only value1 No effect #0 value2 Disable gating #1 CCU41 CCU41 Gating Clear 3 write-only value1 No effect #0 value2 Disable gating #1 CCU80 CCU80 Gating Clear 7 write-only value1 No effect #0 value2 Disable gating #1 ERU1 ERU1 Gating Clear 16 write-only value1 No effect #0 value2 Disable gating #1 HRPWM0 HRPWM0 Gating Clear 23 write-only value1 No effect #0 value2 Disable gating #1 POSIF0 POSIF0 Gating Clear 9 write-only value1 No effect #0 value2 Disable gating #1 USIC0 USIC0 Gating Clear 11 write-only value1 No effect #0 value2 Disable gating #1 VADC VADC Gating Clear 0 write-only value1 No effect #0 value2 Disable gating #1 CGATCLR1 Peripheral 1 Clock Gating Clear 0x54 32 read-write n 0x0 0x0 DAC DAC Gating Clear 5 write-only value1 No effect #0 value2 Disable gating #1 LEDTSCU0 LEDTS Gating Clear 3 write-only value1 No effect #0 value2 Disable gating #1 MCAN0 MultiCAN Gating Clear 4 write-only value1 No effect #0 value2 Disable gating #1 PPORTS PORTS Gating Clear 9 write-only value1 No effect #0 value2 Disable gating #1 USIC1 USIC1 Gating Clear 7 write-only value1 No effect #0 value2 Disable gating #1 CGATCLR2 Peripheral 2 Clock Gating Clear 0x60 32 read-write n 0x0 0x0 DMA0 DMA0 Gating Clear 4 write-only value1 No effect #0 value2 Disable gating #1 FCE FCE Gating Clear 6 write-only value1 No effect #0 value2 Disable gating #1 USB USB Gating Clear 7 write-only value1 No effect #0 value2 Disable gating #1 WDT WDT Gating Clear 1 write-only value1 No effect #0 value2 Disable gating #1 CGATSET0 Peripheral 0 Clock Gating Set 0x44 32 read-write n 0x0 0x0 CCU40 CCU40 Gating Set 2 write-only value1 No effect #0 value2 Enable gating #1 CCU41 CCU41 Gating Set 3 write-only value1 No effect #0 value2 Enable gating #1 CCU80 CCU80 Gating Set 7 write-only value1 No effect #0 value2 Enable gating #1 ERU1 ERU1 Gating Set 16 write-only value1 No effect #0 value2 Enable gating #1 HRPWM0 HRPWM0 Gating Set 23 write-only value1 No effect #0 value2 Enable gating #1 POSIF0 POSIF0 Gating Set 9 write-only value1 No effect #0 value2 Enable gating #1 USIC0 USIC0 Gating Set 11 write-only value1 No effect #0 value2 Enable gating #1 VADC VADC Gating Set 0 write-only value1 No effect #0 value2 Enable gating #1 CGATSET1 Peripheral 1 Clock Gating Set 0x50 32 read-write n 0x0 0x0 DAC DAC Gating Set 5 write-only value1 No effect #0 value2 Enable gating #1 LEDTSCU0 LEDTS Gating Set 3 write-only value1 No effect #0 value2 Enable gating #1 MCAN0 MultiCAN Gating Set 4 write-only value1 No effect #0 value2 Enable gating #1 PPORTS PORTS Gating Set 9 write-only value1 No effect #0 value2 Enable gating #1 USIC1 USIC1 Gating Set 7 write-only value1 No effect #0 value2 Enable gating #1 CGATSET2 Peripheral 2 Clock Gating Set 0x5C 32 read-write n 0x0 0x0 DMA0 DMA0 Gating Set 4 write-only value1 No effect #0 value2 Enable gating #1 FCE FCE Gating Set 6 write-only value1 No effect #0 value2 Enable gating #1 USB USB Gating Set 7 write-only value1 No effect #0 value2 Enable gating #1 WDT WDT Gating Set 1 write-only value1 No effect #0 value2 Enable gating #1 CGATSTAT0 Peripheral 0 Clock Gating Status 0x40 32 read-write n 0x0 0x0 CCU40 CCU40 Gating Status 2 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 CCU41 CCU41 Gating Status 3 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 CCU80 CCU80 Gating Status 7 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 ERU1 ERU1 Gating Status 16 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 HRPWM0 HRPWM0 Gating Status 23 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 POSIF0 POSIF0 Gating Status 9 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 USIC0 USIC0 Gating Status 11 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 VADC VADC Gating Status 0 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 CGATSTAT1 Peripheral 1 Clock Gating Status 0x4C 32 read-write n 0x0 0x0 DAC DAC Gating Status 5 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 LEDTSCU0 LEDTS Gating Status 3 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 MCAN0 MultiCAN Gating Status 4 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 PPORTS PORTS Gating Status 9 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 USIC1 USIC1 Gating Status 7 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 CGATSTAT2 Peripheral 2 Clock Gating Status 0x58 32 read-write n 0x0 0x0 DMA0 DMA0 Gating Status 4 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 FCE FCE Gating Status 6 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 USB USB Gating Status 7 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 WDT WDT Gating Status 1 read-only value1 Gating de-asserted #0 value2 Gating asserted #1 CLKCLR CLK Clear Register 0x8 32 read-write n 0x0 0x0 CCUCDI CCU Clock Disable 4 write-only value1 No effect #0 value2 Disable clock #1 USBCDI USB Clock Disable 0 write-only value1 No effect #0 value2 Disable clock #1 WDTCDI WDT Clock Disable 5 write-only value1 No effect #0 value2 Disable clock #1 CLKSET CLK Set Register 0x4 32 read-write n 0x0 0x0 CCUCEN CCU Clock Enable 4 write-only value1 No effect #0 value2 Enable #1 USBCEN USB Clock Enable 0 write-only value1 No effect #0 value2 Enable #1 WDTCEN WDT Clock Enable 5 write-only value1 No effect #0 value2 Enable #1 CLKSTAT Clock Status Register 0x0 32 read-write n 0x0 0x0 CCUCST CCU Clock Status 4 read-only value1 Clock disabled #0 value2 Clock enabled #1 USBCST USB Clock Status 0 read-only value1 Clock disabled #0 value2 Clock enabled #1 WDTCST WDT Clock Status 5 read-only value1 Clock disabled #0 value2 Clock enabled #1 CPUCLKCR CPU Clock Control Register 0x10 32 read-write n 0x0 0x0 CPUDIV CPU Clock Divider Enable 0 read-write value1 fCPU = fSYS #0 value2 fCPU = fSYS / 2 #1 DSLEEPCR Deep Sleep Control Register 0x34 32 read-write n 0x0 0x0 CCUCR CCU Clock Control 20 read-write value1 Disable #0 value2 Enable #1 FPDN Flash Power Down 11 read-write value2 No effect #0 value1 Flash power down module #1 PLLPDN PLL Power Down 12 read-write value2 No effect #0 value1 Switch off main PLL #1 SYSSEL System Clock Selection Value 0 read-write value1 fOFI clock #0 value2 fPLL clock #1 USBCR USB Clock Control 16 read-write value1 Disable #0 value2 Enable #1 VCOPDN VCO Power Down 13 read-write value2 No effect #0 value1 Switch off VCO of main PLL #1 WDTCR WDT Clock Control 21 read-write value1 Disable #0 value2 Enable #1 EXTCLKCR External Clock Control 0x28 32 read-write n 0x0 0x0 ECKDIV External Clock Divider Value 16 8 read-write ECKSEL External Clock Selection Value 0 2 read-write value1 fSYS clock #000 value3 fUSB clock #010 value4 fPLL clock divided according to ECKDIV bit field configuration #011 value5 fSTDBY clock #100 MLINKCLKCR Multi-Link Clock Control 0x2C 32 read-write n 0x0 0x0 CCUDIV CCU Clock Divider Enable 14 read-write value1 fCCU = fSYS #0 value2 fCCU = fSYS / 2 #1 CPUDIV CPU Clock Divider Enable 10 read-write value1 fCPU = fSYS #0 value2 fCPU = fSYS / 2 #1 PBDIV PB Clock Divider Enable 12 read-write value1 fPERIPH = fCPU #0 value2 fPERIPH = fCPU / 2 #1 SYSDIV System Clock Division Value 0 7 read-write SYSSEL System Clock Selection Value 8 read-write value1 fOFI clock #0 value2 fPLL clock #1 WDTDIV WDT Clock Divider Value 16 7 read-write WDTSEL WDT Clock Selection Value 24 1 read-write value1 fOFI clock #00 value2 fSTDBY clock #01 value3 fPLL clock #10 PBCLKCR Peripheral Bus Clock Control Register 0x14 32 read-write n 0x0 0x0 PBDIV PB Clock Divider Enable 0 read-write value1 fPERIPH = fCPU #0 value2 fPERIPH = fCPU / 2 #1 SLEEPCR Sleep Control Register 0x30 32 read-write n 0x0 0x0 CCUCR CCU Clock Control 20 read-write value1 Disable #0 value2 Enable #1 SYSSEL System Clock Selection Value 0 read-write value1 fOFI clock #0 value2 fPLL clock #1 USBCR USB Clock Control 16 read-write value1 Disable #0 value2 Enable #1 WDTCR WDT Clock Control 21 read-write value1 Disable #0 value2 Enable #1 SYSCLKCR System Clock Control Register 0xC 32 read-write n 0x0 0x0 SYSDIV System Clock Division Value 0 7 read-write SYSSEL System Clock Selection Value 16 read-write value1 fOFI clock #0 value2 fPLL clock #1 USBCLKCR USB Clock Control Register 0x18 32 read-write n 0x0 0x0 USBDIV USB Clock Divider Value 0 2 read-write USBSEL USB Clock Selection Value 16 read-write value1 USB PLL Clock #0 value2 PLL Clock #1 WDTCLKCR WDT Clock Control Register 0x24 32 read-write n 0x0 0x0 WDTDIV WDT Clock Divider Value 0 7 read-write WDTSEL WDT Clock Selection Value 16 1 read-write value1 fOFI clock #00 value2 fSTDBY clock #01 value3 fPLL clock #10 SCU_GENERAL System Control Unit SCU 0x0 0x0 0x100 registers n CCUCON CCU Control Register 0x4C 32 read-write n 0x0 0x0 GSC40 Global Start Control CCU40 0 read-write value1 Disable #0 value2 Enable #1 GSC41 Global Start Control CCU41 1 read-write value1 Disable #0 value2 Enable #1 GSC80 Global Start Control CCU80 8 read-write value1 Disable #0 value2 Enable #1 GSHR0 Global Start Control HRPWM0 24 read-write value1 Disable #0 value2 Enable #1 DTEMPALARM Die Temperature Sensor Alarm Register 0xAC 32 read-write n 0x0 0x0 OVERFL Upper Limit Overflow 16 read-only value1 No temperature overflow was detected #0 value2 A temperature overflow was detected #1 UNDERFL Lower Limit Underflow 0 read-only value1 No temperature underflow was detected #0 value2 A temperature underflow was detected #1 DTEMPLIM Die Temperature Sensor Limit Register 0xA8 32 read-write n 0x0 0x0 LOWER Lower Limit 0 9 read-write UPPER Upper Limit 16 9 read-write DTSCON Die Temperature Sensor Control Register 0x8C 32 read-write n 0x0 0x0 BGTRIM Bandgap Trim Calibration Value 20 3 read-write GAIN Gain Calibration Value 11 5 read-write OFFSET Offset Calibration Value 4 6 read-write PWD Sensor Power Down 0 read-write value1 The DTS is powered #0 value2 The DTS is not powered #1 REFTRIM Reference Trim Calibration Value 17 2 read-write START Sensor Measurement Start 1 write-only value1 No DTS measurement is started #0 value2 A DTS measurement is started #1 DTSSTAT Die Temperature Sensor Status Register 0x90 32 read-write n 0x0 0x0 BUSY Sensor Busy Status 15 read-only value1 not busy #0 value2 busy #1 RDY Sensor Ready Status 14 read-only value1 The DTS is not ready #0 value2 The DTS is ready #1 RESULT Result of the DTS Measurement 0 9 read-only G0ORCEN Out of Range Comparator Enable Register 0 0xA0 32 read-write n 0x0 0x0 ENORC6 Enable Out of Range Comparator, Channel 6 6 read-write value1 Disabled #0 value2 Enabled #1 ENORC7 Enable Out of Range Comparator, Channel 7 7 read-write value1 Disabled #0 value2 Enabled #1 G1ORCEN Out of Range Comparator Enable Register 1 0xA4 32 read-write n 0x0 0x0 ENORC6 Enable Out of Range Comparator, Channel 6 6 read-write value1 Disabled #0 value2 Enabled #1 ENORC7 Enable Out of Range Comparator, Channel 7 7 read-write value1 Disabled #0 value2 Enabled #1 GPR0 General Purpose Register 0 0x2C 32 read-write n 0x0 0x0 DAT User Data 0 31 read-write GPR1 General Purpose Register 1 0x30 32 read-write n 0x0 0x0 DAT User Data 0 31 read-write ID SCU Module ID Register 0x0 32 read-write n 0x0 0x0 MOD_NUMBER Module Number 16 15 read-only MOD_REV Module Revision 0 7 read-only MOD_TYPE Module Type 8 7 read-only IDCHIP Chip ID Register 0x4 32 read-write n 0x0 0x0 IDCHIP Chip ID 0 31 read-only IDMANUF Manufactory ID Register 0x8 32 read-write n 0x0 0x0 DEPT Department Identification Number 0 4 read-only MANUF Manufacturer Identification Number 5 10 read-only MIRRALLREQ Mirror All Request 0xD4 32 read-write n 0x0 0x0 REQ Mirror All Execution Request 0 write-only value1 No action #0 value2 Start mirror update #1 MIRRALLSTAT Mirror All Status 0xD0 32 read-write n 0x0 0x0 BUSY Mirror All Execution Status 0 read-only value1 No update is pening #0 value2 Update is pending #1 MIRRSTS Mirror Write Status Register 0xC4 32 read-write n 0x0 0x0 HDCLR HDCLR Mirror Register Write Status 1 read-only value1 Ready #0 value2 Busy #1 HDCR HDCR Mirror Register Write Status 3 read-only value1 Ready #0 value2 Busy #1 HDSET HDSET Mirror Register Write Status 2 read-only value1 Ready #0 value2 Busy #1 HINTCLR HINTCLR Mirror Register Write Status 23 read-only value1 Ready #0 value2 Busy #1 HINTSET HINTSET Mirror Register Write Status 24 read-only value1 Ready #0 value2 Busy #1 LPACCLR LPACCLR Mirror Register Write Status 20 read-only value1 Ready #0 value2 Busy #1 LPACCONF LPACCONF Mirror Register Write Interrupt Set 16 read-only value1 Ready #0 value2 Busy #1 LPACSET LPACSET Mirror Register Write Status 21 read-only value1 Ready #0 value2 Busy #1 LPACTH0 LPACTH0 Mirror Register Write Interrupt Set 17 read-only value1 Ready #0 value2 Busy #1 LPACTH1 LPACTH1 Mirror Register Write Interrupt Set 18 read-only value1 Ready #0 value2 Busy #1 OSCSICTRL OSCSICTRL Mirror Register Write Status 5 read-only value1 Ready #0 value2 Busy #1 OSCULCTRL OSCULCTRL Mirror Register Write Status 7 read-only value1 Ready #0 value2 Busy #1 RMX Retention Memory Access Register Update Status 13 read-only value1 Ready #0 value2 Busy #1 RTC_ATIM0 RTC ATIM0 Mirror Register Write Status 9 read-only value1 Ready #0 value2 Busy #1 RTC_ATIM1 RTC ATIM1 Mirror Register Write Status 10 read-only value1 Ready #0 value2 Busy #1 RTC_CLRSR RTC CLRSR Mirror Register Write Status 15 read-only value1 Ready #0 value2 Busy #1 RTC_CTR RTC CTR Mirror Register Write Status 8 read-only value1 Ready #0 value2 Busy #1 RTC_MSKSR RTC MSKSSR Mirror Register Write Status 14 read-only value1 Ready #0 value2 Busy #1 RTC_TIM0 RTC TIM0 Mirror Register Write Status 11 read-only value1 Ready #0 value2 Busy #1 RTC_TIM1 RTC TIM1 Mirror Register Write Status 12 read-only value1 Ready #0 value2 Busy #1 RMACR Retention Memory Access Control Register 0xC8 32 read-write n 0x0 0x0 ADDR Hibernate Retention Memory Register Address Select 16 3 read-write RDWR Hibernate Retention Memory Register Update Control 0 read-write value1 transfer data from Retention Memory in Hibernate domain to RMDATA register #0 value2 transfer data from RMDATA into Retention Memory in Hibernate domain #1 RMDATA Retention Memory Access Data Register 0xCC 32 read-write n 0x0 0x0 DATA Hibernate Retention Memory Data 0 31 read-write STCON Startup Configuration Register 0x10 32 read-write n 0x0 0x0 HWCON HW Configuration 0 1 read-only value1 Normal mode, JTAG #00 value2 ASC BSL enabled #01 value3 BMI customized boot enabled #10 value4 CAN BSL enabled #11 SWCON SW Configuration 8 3 read-write value1 Normal mode, boot from Boot ROM #0000 value2 ASC BSL enabled #0001 value3 BMI customized boot enabled #0010 value4 CAN BSL enabled #0011 value5 Boot from Code SRAM #0100 value6 Boot from alternate Flash Address 0 #1000 value7 Boot from alternate Flash Address 1 #1100 value8 Enable fallback Alternate Boot Mode (ABM) #1110 SCU_HIBERNATE System Control Unit SCU 0x0 0x0 0x100 registers n HDCLR Hibernate Domain Status Clear Register 0x4 32 read-write n 0x0 0x0 AHIBIO0NEV Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing Clear 11 write-only value1 No effect #0 value2 Clear wake-up event #1 AHIBIO0PEV Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing Clear 10 write-only value1 No effect #0 value2 Clear wake-up event #1 ENEV Wake-up Pin Event Negative Edge Clear 1 write-only value1 No effect #0 value2 Clear wake-up event #1 EPEV Wake-up Pin Event Positive Edge Clear 0 write-only value1 No effect #0 value2 Clear wake-up event #1 RTCEV RTC Event Clear 2 write-only value1 No effect #0 value2 Clear wake-up event #1 ULPWDG ULP WDG Alarm Clear 3 write-only value1 No effect #0 value2 Clear watchdog alarm #1 VBATNEV Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing Clear 9 write-only value1 No effect #0 value2 Clear wake-up event #1 VBATPEV Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing Clear 8 write-only value1 No effect #0 value2 Clear wake-up event #1 HDCR Hibernate Domain Control Register 0xC 32 read-write n 0x0 0x0 ADIG0SEL Select Analog Channel 0 or Digital Output Path 14 read-write value1 Digital input #0 value2 Analog comparator result for HIB_IO_0 #1 AHIBIO0HI Wake-Up on Analog HIB_IO_0 Rising Above Threshold Enable 27 read-write value1 Wake-up event disabled #0 value2 Wake-up event enabled #1 AHIBIO0LO Wake-Up on Analog HIB_IO_0 Falling Below Threshold Enable 26 read-write value1 Wake-up event disabled #0 value2 Wake-up event enabled #1 GPI0SEL General Purpose Input 0 Selection 10 read-write value2 HIB_IO_0 pin selected #1 HIB Hibernate Request Value Set 4 read-write value1 External hibernate request inactive #0 value2 External hibernate request active #1 HIBIO0POL HIBIO0 Polarity Set 12 read-write value1 Direct value #0 value2 Inverted value #1 HIBIO0SEL HIB_IO_0 Pin I/O Control (default HIBOUT) 16 3 read-write value1 Direct input, No input pull device connected #0000 value2 Direct input, Input pull-down device connected #0001 value3 Direct input, Input pull-up device connected #0010 value4 Push-pull HIB Control output #1000 value5 Push-pull WDT service output #1001 value6 Push-pull GPIO output #1010 value7 Open-drain HIB Control output #1100 value8 Open-drain WDT service output #1101 value9 Open-drain GPIO output #1110 value10 Analog input #1111 RCS fRTC Clock Selection 6 read-write value1 fOSI selected #0 value2 fULP selected #1 RTCE Wake-up on RTC Event Enable 2 read-write value1 Wake-up event disabled #0 value2 Wake-up event enabled #1 STDBYSEL fSTDBY Clock Selection 7 read-write value1 fOSI selected #0 value2 fULP selected #1 ULPWDGEN ULP WDG Alarm Enable 3 read-write value1 Wake-up event disabled #0 value2 Wake-up event enabled #1 VBATHI Wake-Up on VBAT Rising Above Threshold Enable 25 read-write value1 Wake-up event disabled #0 value2 Wake-up event enabled #1 VBATLO Wake-Up on VBAT Falling Below Threshold Enable 24 read-write value1 Wake-up event disabled #0 value2 Wake-up event enabled #1 WKPEN Wake-up on Pin Event Negative Edge Enable 1 read-write value1 Wake-up event disabled #0 value2 Wake-up event enabled #1 WKPEP Wake-Up on Pin Event Positive Edge Enable 0 read-write value1 Wake-up event disabled #0 value2 Wake-up event enabled #1 WKUPSEL Wake-Up from Hibernate Trigger Input Selection 8 read-write value1 HIB_IO_1 pin selected #0 value2 HIB_IO_0 pin selected #1 XTALGPI1SEL Multiplex Control for RTC_XTAL_1 Select as GPI Input 5 read-write value1 RTC_XTAL_1 input selected #0 value2 Analog comparator output for HIB_IO_1 or pre-selected digital IO input #1 HDSET Hibernate Domain Status Set Register 0x8 32 read-write n 0x0 0x0 AHIBIO0NEV Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing Set 11 write-only value1 No effect #0 value2 Set wake-up event #1 AHIBIO0PEV Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing Set 10 write-only value1 No effect #0 value2 Set wake-up event #1 ENEV Wake-up Pin Event Negative Edge Set 1 write-only value1 No effect #0 value2 Set wake-up event #1 EPEV Wake-up Pin Event Positive Edge Set 0 write-only value1 No effect #0 value2 Set wake-up event #1 RTCEV RTC Event Set 2 write-only value1 No effect #0 value2 Set wake-up event #1 ULPWDG ULP WDG Alarm Set 3 write-only value1 No effect #0 value2 Set watchdog alarm #1 VBATNEV Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing Set 9 write-only value1 No effect #0 value2 Set wake-up event #1 VBATPEV Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing Set 8 write-only value1 No effect #0 value2 Set wake-up event #1 HDSTAT Hibernate Domain Status Register 0x0 32 read-write n 0x0 0x0 AHIBIO0NEV Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing 11 read-only value1 Wake-up on falling below threshold event inactive #0 value2 Wake-up on falling below threshold event active #1 AHIBIO0PEV Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing 10 read-only value1 Wake-up on rising above threshold event inactive #0 value2 Wake-up on rising above threshold event active #1 ENEV Wake-up Pin Event Negative Edge 1 read-only value1 Wake-up on negative edge pin event inactive #0 value2 Wake-up on negative edge pin event active #1 EPEV Wake-up Pin Event Positive Edge 0 read-only value1 Wake-up on positive edge pin event inactive #0 value2 Wake-up on positive edge pin event active #1 HIBNOUT Hibernate Control Status 4 read-only value1 Hibernate not driven active to pads #0 value2 Hibernate driven active to pads #1 RTCEV RTC Event 2 read-only value1 Wake-up on RTC event inactive #0 value2 Wake-up on RTC event active #1 ULPWDG ULP WDG Alarm Status 3 read-only value1 Watchdog alarm did not occur #0 value2 Watchdog alarm occurred #1 VBATNEV Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing 9 read-only value1 Wake-up on falling below threshold event inactive #0 value2 Wake-up on falling below threshold event active #1 VBATPEV Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing 8 read-only value1 Wake-up on rising above threshold event inactive #0 value2 Wake-up on rising above threshold event active #1 HINTCLR Hibernate Internal Control Clear Register 0x3C 32 read-write n 0x0 0x0 FLASHOFF VDDP Supply Switch of Flash Clear 2 write-only value1 No effect #0 value2 Switch on VDDP supply of Flash #1 FLASHPD Flash Power Down Clear 3 write-only value1 No effect #0 value2 Flash power down mode leave request #1 HIBNINT Internally Controlled Hibernate Sequence Request Clear 0 write-only value1 No effect #0 value2 Hibernate bit clear #1 POFFD PORST Pull-up OFF Direct Control Clear 4 write-only value1 No effect #0 value2 Pull-up on #1 POFFH PORST Pull-up OFF in Hibernate Mode Clear 20 write-only value1 No effect #0 value2 Pull-up on #1 PPODEL Delay on PORTS Pull-up Switching OFF on Hibernate Request Clear 16 1 write-only HINTSET Hibernate Internal Control Set Register 0x40 32 read-write n 0x0 0x0 FLASHOFF VDDP Supply Switch of Flash Set 2 write-only value1 No effect #0 value2 Switch off VDDP supply of Flash #1 FLASHPD Flash Power Down Set 3 write-only value1 No effect #0 value2 Flash power down mode request set #1 HIBNINT Internally Controlled Hibernate Sequence Request Set 0 write-only value1 No effect #0 value2 Hardware controlled hibernate sequence request active #1 POFFD PORST Pull-up OFF Direct Control Set 4 write-only value1 No effect #0 value2 Pull-up off #1 POFFH PORST Pull-up OFF in Hibernate Mode Set 20 write-only value1 No effect #0 value2 Pull-up off #1 PPODEL Delay on PORTS Pull-up Switching OFF on Hibernate Request Set 16 1 write-only VCOREOFF VDDC Generation off on EVR Set 1 write-only value1 No effect #0 value2 VDDC off to EVR set #1 HINTST Hibernate Internal Control State Register 0x38 32 read-write n 0x0 0x0 FLASHOFF VDDP Supply Switch of Flash State 2 read-only value1 VDDP supply of Flash switched on #0 value2 VDDP supply of Flash switched off #1 FLASHPD Flash Power Down State 3 read-only value1 Normal mode #0 value2 Power down mode effectively entered #1 HIBNINT Internally Controlled Hibernate Sequence Request State 0 read-only value1 Hibernate not entered #0 value2 Hibernate entered #1 POFFD PORST Pull-up OFF Direct Control State 4 read-only value1 Pull-up on #0 value2 Pull-up off #1 POFFH PORST Pull-up OFF in Hibernate Mode State 20 read-only value1 Pull-up on #0 value2 Pull-up off #1 PPODEL Delay on PORTS Pull-up Switching OFF on Hibernate Request 16 1 read-only LPACCLR LPAC Control Clear Register 0x30 32 read-write n 0x0 0x0 AHIBIO0SCMP Trigger HIB_IO_0 Input Single Compare Operation Clear 1 write-only value1 No effect #0 value2 Clear the sticky bit #1 AHIBIO0VAL HIB_IO_0 Input Compare Initial Value Clear 17 write-only value1 No effect #0 value2 Below programmed threshold #1 VBATSCMP Trigger VBAT Single Compare Operation Clear 0 write-only value1 No effect #0 value2 Clear the sticky bit #1 VBATVAL VBAT Compare Operation Initial Value Clear 16 write-only value1 No effect #0 value2 Below programmed threshold #1 LPACCONF Analog Wake-up Configuration Register 0x20 32 read-write n 0x0 0x0 CMPEN Compare Enable for Input Selection 0 2 read-write value1 Comparator permanently in power down #000 value2 Comparator activated for VBAT input #001 value3 Comparator activated for HIB_IO_0 input #010 value4 Comparator activated for HIB_IO_1 input #100 CONVDEL Conversion Delay 12 read-write INTERVCNT Sub-second Interval Counter 16 11 read-write SETTLECNT LPAC Settle Time Counter 28 3 read-write TRIGSEL Analog Compare Trigger Select 4 2 read-write value1 Sub-second interval counter #000 value2 RTC alarm event #001 value3 RTC periodic event #010 value4 On digital WKUP input positive edge event #011 value5 On digital WKUP input negative edge event #101 value6 Continuous measurement #110 value7 Single-shot on software request #111 LPACSET LPAC Control Set Register 0x34 32 read-write n 0x0 0x0 AHIBIO0SCMP Trigger HIB_IO_0 Input Single Compare Operation Set 1 write-only value1 No effect #0 value2 Start compare operation #1 AHIBIO0VAL HIB_IO_0 Input Compare Initial Value Set 17 write-only value1 No effect #0 value2 Above programmed threshold #1 VBATSCMP Trigger VBAT Single Compare Operation Set 0 write-only value1 No effect #0 value2 Start compare operation #1 VBATVAL VBAT Compare Operation Initial Value Set 16 write-only value1 No effect #0 value2 Above programmed threshold #1 LPACST Hibernate Analog Control State Register 0x2C 32 read-write n 0x0 0x0 AHIBIO0SCMP Trigger HIB_IO_0 Input Single Compare Operation Status 1 read-only value1 Ready to start new compare operation #0 value2 Compare operation completed #1 AHIBIO0VAL HIB_IO_0 Input Compare Operation Result 17 read-only value1 Below programmed threshold #0 value2 Above programmed threshold #1 VBATSCMP Trigger VBAT Single Compare Operation Status 0 read-only value1 Ready to start new compare operation #0 value2 Compare operation completed #1 VBATVAL VBAT Compare Operation Result 16 read-only value1 Below programmed threshold #0 value2 Above programmed threshold #1 LPACTH0 LPAC Threshold Register 0 0x24 32 read-write n 0x0 0x0 VBATHI VBAT Upper Threshold Value 8 5 read-write VBATLO VBAT Lower Threshold Value 0 5 read-write LPACTH1 LPAC Threshold Register 1 0x28 32 read-write n 0x0 0x0 AHIBIO0HI Analog HIB_IO_0 Upper Threshold Value 8 5 read-write AHIBIO0LO Analog HIB_IO_0 Lower Threshold Value 0 5 read-write OSCSICTRL fOSI Control Register 0x14 32 read-write n 0x0 0x0 PWD Turn OFF the fOSI Clock Source 0 read-write value1 Enabled #0 value2 Disabled #1 OSCULCTRL OSC_ULP Control Register 0x1C 32 read-write n 0x0 0x0 MODE Oscillator Mode 4 1 read-write value1 Oscillator is enabled, in operation #00 value2 Oscillator is enabled, in bypass mode #01 value3 Oscillator in power down #10 value4 Oscillator in power down, can be used as GPI #11 X1DEN XTAL1 Data General Purpose Input Enable 0 read-write value1 Data input inactivated, power down #0 value2 Data input active #1 OSCULSTAT OSC_ULP Status Register 0x18 32 read-write n 0x0 0x0 X1D XTAL1 Data Value 0 read-only SCU_INTERRUPT System Control Unit SCU 0x0 0x0 0x18 registers n SCU_0 System Control 0 NMIREQEN SCU Service Request Mask 0x14 32 read-write n 0x0 0x0 AI Promote RTC Alarm Interrupt Request to NMI Request 2 read-write value1 Disabled #0 value2 Enabled #1 ERU00 Promote Channel 0 Interrupt of ERU0 Request to NMI Request 16 read-write value1 Disabled #0 value2 Enabled #1 ERU01 Promote Channel 1 Interrupt of ERU0 Request to NMI Request 17 read-write value1 Disabled #0 value2 Enabled #1 ERU02 Promote Channel 2 Interrupt of ERU0 Request to NMI Request 18 read-write value1 Disabled #0 value2 Enabled #1 ERU03 Promote Channel 3 Interrupt of ERU0 Request to NMI Request 19 read-write value1 Disabled #0 value2 Enabled #1 PI Promote RTC Periodic Interrupt request to NMI Request 1 read-write value1 Disabled #0 value2 Enabled #1 PRWARN Promote Pre-Warning Interrupt Request to NMI Request 0 read-write value1 Disabled #0 value2 Enabled #1 SRCLR SCU Service Request Clear 0xC 32 read-write n 0x0 0x0 AI RTC Alarm Interrupt Clear 2 write-only value1 No effect #0 value2 Clear the status bit #1 DLROVR DLR Request Overrun Interrupt clear 3 write-only value1 No effect #0 value2 Clear the status bit #1 HDCLR HDCLR Mirror Register Update Clear 17 write-only value1 No effect #0 value2 Clear the status bit #1 HDCR HDCR Mirror Register Update Clear 19 write-only value1 No effect #0 value2 Clear the status bit #1 HDSET HDSET Mirror Register Update Clear 18 write-only value1 No effect #0 value2 Clear the status bit #1 HINTCLR HINTCLR Mirror Register Update Interrupt Clear 13 write-only value1 No effect #0 value2 Clear the status bit #1 HINTSET HINTSET Mirror Register Update Interrupt Clear 14 write-only value1 No effect #0 value2 Clear the status bit #1 HINTST HINTST Mirror Register Update Interrupt Clear 12 write-only value1 No effect #0 value2 Clear the status bit #1 LPACCLR LPACCLR Mirror Register Update Interrupt Clear 10 write-only value1 No effect #0 value2 Clear the status bit #1 LPACCR LPACLR Mirror Register Update Interrupt Clear 6 write-only value1 No effect #0 value2 Clear the status bit #1 LPACSET LPACSET Mirror Register Update Interrupt Clear 11 write-only value1 No effect #0 value2 Clear the status bit #1 LPACST LPACST Mirror Register Update Interrupt Clear 9 write-only value1 No effect #0 value2 Clear the status bit #1 LPACTH0 LPACTH0 Mirror Register Update Interrupt Clear 7 write-only value1 No effect #0 value2 Clear the status bit #1 LPACTH1 LPACTH1 Mirror Register Update Interrupt Clear 8 write-only value1 No effect #0 value2 Clear the status bit #1 OSCSICTRL OSCSICTRL Mirror Register Update Clear 21 write-only value1 No effect #0 value2 Clear the status bit #1 OSCULCTRL OSCULCTRL Mirror Register Update Clear 23 write-only value1 No effect #0 value2 Clear the status bit #1 PI RTC Periodic Interrupt Clear 1 write-only value1 No effect #0 value2 Clear the status bit #1 PRWARN WDT pre-warning Interrupt Clear 0 write-only value1 No effect #0 value2 Clear the status bit #1 RMX Retention Memory Mirror Register Update Clear 29 write-only value1 No effect #0 value2 Clear the status bit #1 RTC_ATIM0 RTC ATIM0 Mirror Register Update Clear 25 write-only value1 No effect #0 value2 Clear the status bit #1 RTC_ATIM1 RTC ATIM1 Mirror Register Update Clear 26 write-only value1 No effect #0 value2 Clear the status bit #1 RTC_CTR RTC CTR Mirror Register Update Clear 24 write-only value1 No effect #0 value2 Clear the status bit #1 RTC_TIM0 RTC TIM0 Mirror Register Update Clear 27 write-only value1 No effect #0 value2 Clear the status bit #1 RTC_TIM1 RTC TIM1 Mirror Register Update Clear 28 write-only value1 No effect #0 value2 Clear the status bit #1 SRMSK SCU Service Request Mask 0x8 32 read-write n 0x0 0x0 AI RTC Alarm Interrupt Mask 2 read-write value1 Disabled #0 value2 Enabled #1 DLROVR DLR Request Overrun Interrupt Mask 3 read-write value1 Disabled #0 value2 Enabled #1 HDCLR HDCLR Mirror Register Update Mask 17 read-write value1 Disabled #0 value2 Enabled #1 HDCR HDCR Mirror Register Update Mask 19 read-write value1 Disabled #0 value2 Enabled #1 HDSET HDSET Mirror Register Update Mask 18 read-write value1 Disabled #0 value2 Enabled #1 HINTCLR HINTCLR Mirror Register Update Interrupt Mask 13 read-write value1 Disabled #0 value2 Enabled #1 HINTSET HINTSET Mirror Register Update Interrupt Mask 14 read-write value1 Disabled #0 value2 Enabled #1 HINTST HINTST Mirror Register Update Interrupt Mask 12 read-write value1 Disabled #0 value2 Enabled #1 LPACCLR LPACCLR Mirror Register Update Interrupt Mask 10 read-write value1 Disabled #0 value2 Enabled #1 LPACCR LPACLR Mirror Register Update Interrupt Mask 6 read-write value1 Disabled #0 value2 Enabled #1 LPACSET LPACSET Mirror Register Update Interrupt Mask 11 read-write value1 Disabled #0 value2 Enabled #1 LPACST LPACST Mirror Register Update Interrupt Mask 9 read-write value1 Disabled #0 value2 Enabled #1 LPACTH0 LPACTH0 Mirror Register Update Interrupt Mask 7 read-write value1 Disabled #0 value2 Enabled #1 LPACTH1 LPACTH1 Mirror Register Update Interrupt Mask 8 read-write value1 Disabled #0 value2 Enabled #1 OSCSICTRL OSCSICTRL Mirror Register Update Mask 21 read-write value1 Disabled #0 value2 Enabled #1 OSCULCTRL OSCULCTRL Mirror Register Update Mask 23 read-write value1 Disabled #0 value2 Enabled #1 PI RTC Periodic Interrupt Mask 1 read-write value1 Disabled #0 value2 Enabled #1 PRWARN WDT pre-warning Interrupt Mask 0 read-write value1 Disabled #0 value2 Enabled #1 RMX Retention Memory Mirror Register Update Mask 29 read-write value1 Disabled #0 value2 Enabled #1 RTC_ATIM0 RTC ATIM0 Mirror Register Update Mask 25 read-write value1 Disabled #0 value2 Enabled #1 RTC_ATIM1 RTC ATIM1 Mirror Register Update Mask 26 read-write value1 Disabled #0 value2 Enabled #1 RTC_CTR RTC CTR Mirror Register Update Mask 24 read-write value1 Disabled #0 value2 Enabled #1 RTC_TIM0 RTC TIM0 Mirror Register Update Mask 27 read-write value1 Disabled #0 value2 Enabled #1 RTC_TIM1 RTC TIM1 Mirror Register Update Mask 28 read-write value1 Disabled #0 value2 Enabled #1 SRRAW SCU Raw Service Request Status 0x4 32 read-write n 0x0 0x0 AI RTC Raw Alarm Interrupt Status Before Masking 2 read-only DLROVR DLR Request Overrun Interrupt Status Before Masking 3 read-only HDCLR HDCLR Mirror Register Update Status Before Masking 17 read-only value1 Not updated #0 value2 Update completed #1 HDCR HDCR Mirror Register Update Status Before Masking 19 read-only value1 Not updated #0 value2 Update completed #1 HDSET HDSET Mirror Register Update Status Before Masking 18 read-only value1 Not updated #0 value2 Update completed #1 HINTCLR HINTCLR Mirror Register Update Status Before Masking 13 read-only value1 Not updated #0 value2 Update completed #1 HINTSET HINTSET Mirror Register Update Status Before Masking 14 read-only value1 Not updated #0 value2 Update completed #1 HINTST HINTST Mirror Register Update Status Before Masking 12 read-only value1 Not updated #0 value2 Update completed #1 LPACCLR LPACCLR Mirror Register Update Status Before Masking 10 read-only value1 Not updated #0 value2 Update completed #1 LPACCR LPACLR Mirror Register Update Status Before Masking 6 read-only value1 Not updated #0 value2 Update completed #1 LPACSET LPACSET Mirror Register Update Status Before Masking 11 read-only value1 Not updated #0 value2 Update completed #1 LPACST LPACST Mirror Register Update Status Before Masking 9 read-only value1 Not updated #0 value2 Update completed #1 LPACTH0 LPACTH0 Mirror Register Update Status Before Masking 7 read-only value1 Not updated #0 value2 Update completed #1 LPACTH1 LPACTH1 Mirror Register Update Status Before Masking 8 read-only value1 Not updated #0 value2 Update completed #1 OSCSICTRL OSCSICTRL Mirror Register Update Status Before Masking 21 read-only value1 Not updated #0 value2 Update completed #1 OSCULCTRL OSCULCTRL Mirror Register Update Status Before Masking 23 read-only value1 Not updated #0 value2 Update completed #1 PI RTC Raw Periodic Interrupt Status Before Masking 1 read-only PRWARN WDT pre-warning Interrupt Status Before Masking 0 read-only value1 Inactive #0 value2 Active #1 RMX Retention Memory Mirror Register Update Status Before Masking 29 read-only value1 Not updated #0 value2 Update completed #1 RTC_ATIM0 RTC ATIM0 Mirror Register Update Status Before Masking 25 read-only value1 Not updated #0 value2 Update completed #1 RTC_ATIM1 RTC ATIM1 Mirror Register Update Status Before Masking 26 read-only value1 Not updated #0 value2 Update completed #1 RTC_CTR RTC CTR Mirror Register Update Status Before Masking 24 read-only value1 Not updated #0 value2 Update completed #1 RTC_TIM0 RTC TIM0 Mirror Register Update Before Masking Status 27 read-only value1 Not updated #0 value2 Update completed #1 RTC_TIM1 RTC TIM1 Mirror Register Update Status Before Masking 28 read-only value1 Not updated #0 value2 Update completed #1 SRSET SCU Service Request Set 0x10 32 read-write n 0x0 0x0 AI RTC Alarm Interrupt Set 2 write-only value1 No effect #0 value2 set the status bit #1 DLROVR DLR Request Overrun Interrupt Set 3 write-only value1 No effect #0 value2 set the status bit #1 HDCR HDCR Mirror Register Update Set 19 write-only value1 No effect #0 value2 set the status bit #1 HDCRCLR HDCRCLR Mirror Register Update Set 17 write-only value1 No effect #0 value2 set the status bit #1 HDCRSET HDCRSET Mirror Register Update Set 18 write-only value1 No effect #0 value2 set the status bit #1 HINTCLR HINTCLR Mirror Register Update Interrupt Set 13 write-only value1 No effect #0 value2 set the status bit #1 HINTSET HINTSET Mirror Register Update Interrupt Set 14 write-only value1 No effect #0 value2 set the status bit #1 HINTST HINTST Mirror Register Update Interrupt Set 12 write-only value1 No effect #0 value2 set the status bit #1 LPACCLR LPACCLR Mirror Register Update Interrupt Set 10 write-only value1 No effect #0 value2 set the status bit #1 LPACCR LPACLR Mirror Register Update Interrupt Set 6 write-only value1 No effect #0 value2 set the status bit #1 LPACSET LPACSET Mirror Register Update Interrupt Set 11 write-only value1 No effect #0 value2 set the status bit #1 LPACST LPACST Mirror Register Update Interrupt Set 9 write-only value1 No effect #0 value2 set the status bit #1 LPACTH0 LPACTH0 Mirror Register Update Interrupt Set 7 write-only value1 No effect #0 value2 set the status bit #1 LPACTH1 LPACTH1 Mirror Register Update Interrupt Set 8 write-only value1 No effect #0 value2 set the status bit #1 OSCSICTRL OSCSICTRL Mirror Register Update Set 21 write-only value1 No effect #0 value2 set the status bit #1 OSCULCTRL OSCULCTRL Mirror Register Update Set 23 write-only value1 No effect #0 value2 set the status bit #1 PI RTC Periodic Interrupt Set 1 write-only value1 No effect #0 value2 set the status bit #1 PRWARN WDT pre-warning Interrupt Set 0 write-only value1 No effect #0 value2 set the status bit #1 RMX Retention Memory Mirror Register Update Set 29 write-only value1 No effect #0 value2 set the status bit #1 RTC_ATIM0 RTC ATIM0 Mirror Register Update Set 25 write-only value1 No effect #0 value2 set the status bit #1 RTC_ATIM1 RTC ATIM1 Mirror Register Update Set 26 write-only value1 No effect #0 value2 set the status bit #1 RTC_CTR RTC CTR Mirror Register Update Set 24 write-only value1 No effect #0 value2 set the status bit #1 RTC_TIM0 RTC TIM0 Mirror Register Update Set 27 write-only value1 No effect #0 value2 set the status bit #1 RTC_TIM1 RTC TIM1 Mirror Register Update Set 28 write-only value1 No effect #0 value2 set the status bit #1 SRSTAT SCU Service Request Status 0x0 32 read-write n 0x0 0x0 AI Alarm Interrupt Status 2 read-only DLROVR DLR Request Overrun Interrupt Status 3 read-only HDCLR HDCLR Mirror Register Update Status 17 read-only value1 Not updated #0 value2 Update completed #1 HDCR HDCR Mirror Register Update Status 19 read-only value1 Not updated #0 value2 Update completed #1 HDSET HDSET Mirror Register Update Status 18 read-only value1 Not updated #0 value2 Update completed #1 HINTCLR HINTCLR Mirror Register Update Status 13 read-only value1 Not updated #0 value2 Update completed #1 HINTSET HINTSET Mirror Register Update Status 14 read-only value1 Not updated #0 value2 Update completed #1 HINTST HINTST Mirror Register Update Status 12 read-only value1 Not updated #0 value2 Update completed #1 LPACCLR LPACCLR Mirror Register Update Status 10 read-only value1 Not updated #0 value2 Update completed #1 LPACCR LPACLR Mirror Register Update Status 6 read-only value1 Not updated #0 value2 Update completed #1 LPACSET LPACSET Mirror Register Update Status 11 read-only value1 Not updated #0 value2 Update completed #1 LPACST LPACST Mirror Register Update Status 9 read-only value1 Not updated #0 value2 Update completed #1 LPACTH0 LPACTH0 Mirror Register Update Status 7 read-only value1 Not updated #0 value2 Update completed #1 LPACTH1 LPACTH1 Mirror Register Update Status 8 read-only value1 Not updated #0 value2 Update completed #1 OSCSICTRL OSCSICTRL Mirror Register Update Status 21 read-only value1 Not updated #0 value2 Update completed #1 OSCULCTRL OSCULCTRL Mirror Register Update Status 23 read-only value1 Not updated #0 value2 Update completed #1 PI RTC Periodic Interrupt Status 1 read-only PRWARN WDT pre-warning Interrupt Status 0 read-only value1 Inactive #0 value2 Active #1 RMX Retention Memory Mirror Register Update Status 29 read-only value1 Not updated #0 value2 Update completed #1 RTC_ATIM0 RTC ATIM0 Mirror Register Update Status 25 read-only value1 Not updated #0 value2 Update completed #1 RTC_ATIM1 RTC ATIM1 Mirror Register Update Status 26 read-only value1 Not updated #0 value2 Update completed #1 RTC_CTR RTC CTR Mirror Register Update Status 24 read-only value1 Not updated #0 value2 Update completed #1 RTC_TIM0 RTC TIM0 Mirror Register Update Status 27 read-only value1 Not updated #0 value2 Update completed #1 RTC_TIM1 RTC TIM1 Mirror Register Update Status 28 read-only value1 Not updated #0 value2 Update completed #1 SCU_OSC System Control Unit SCU 0x0 0x0 0x10 registers n CLKCALCONST Clock Calibration Constant Register 0xC 32 read-write n 0x0 0x0 CALIBCONST Clock Calibration Constant Value 0 3 read-write OSCHPCTRL OSC_HP Control Register 0x4 32 read-write n 0x0 0x0 MODE Oscillator Mode 4 1 read-write value1 External Crystal Mode and External Input Clock Mode. The oscillator Power-Saving Mode is not entered. #00 value2 OSC is disabled. The oscillator Power-Saving Mode is not entered. #01 value3 External Input Clock Mode and the oscillator Power-Saving Mode is entered #10 value4 OSC is disabled. The oscillator Power-Saving Mode is entered. #11 OSCVAL OSC Frequency Value 16 3 read-write SHBY Shaper Bypass 1 read-write value1 The shaper is not bypassed #0 value2 The shaper is bypassed #1 X1DEN XTAL1 Data Enable 0 read-write value1 Bit X1D is not updated #0 value2 Bit X1D can be updated #1 OSCHPSTAT OSC_HP Status Register 0x0 32 read-write n 0x0 0x0 X1D XTAL1 Data Value 0 read-only SCU_PARITY System Control Unit SCU 0x0 0x0 0x20 registers n MCHKCON Memory Checking Control Register 0x4 32 read-write n 0x0 0x0 MCANDRA Select Memory Check for MultiCAN 12 read-write value1 Not selected #0 value2 Selected #1 PPRFDRA Select Memory Check for PMU 13 read-write value1 Not selected #0 value2 Selected #1 SELDS1 Select Memory Check for DSRAM1 1 read-write value1 Not selected #0 value2 Selected #1 SELPS Select Memory Check for PSRAM 0 read-write value1 Not selected #0 value2 Selected #1 SELUSB Select Memory Check for USB SRAM 16 read-write value1 Not selected #0 value2 Selected #1 USIC0DRA Select Memory Check for USIC0 8 read-write value1 Not selected #0 value2 Selected #1 USIC1DRA Select Memory Check for USIC1 9 read-write value1 Not selected #0 value2 Selected #1 PEEN Parity Error Enable Register 0x0 32 read-write n 0x0 0x0 PEENDS1 Parity Error Enable for DSRAM1 1 read-write value1 Disabled #0 value2 Enabled #1 PEENMC Parity Error Enable for MultiCAN Memory 12 read-write value1 Disabled #0 value2 Enabled #1 PEENPPRF Parity Error Enable for PMU Prefetch Memory 13 read-write value1 Disabled #0 value2 Enabled #1 PEENPS Parity Error Enable for PSRAM 0 read-write value1 Disabled #0 value2 Enabled #1 PEENU0 Parity Error Enable for USIC0 Memory 8 read-write value1 Disabled #0 value2 Enabled #1 PEENU1 Parity Error Enable for USIC1 Memory 9 read-write value1 Disabled #0 value2 Enabled #1 PEENUSB Parity Error Enable for USB Memory 16 read-write value1 Disabled #0 value2 Enabled #1 PEFLAG Parity Error Flag Register 0x14 32 read-write n 0x0 0x0 PEFDS1 Parity Error Flag for DSRAM1 1 read-write value1 No parity error detected #0 value2 Parity error detected #1 PEFMC Parity Error Flag for MultiCAN Memory 12 read-write value1 No parity error detected #0 value2 Parity error detected #1 PEFPPRF Parity Error Flag for PMU Prefetch Memory 13 read-write value1 No parity error detected #0 value2 Parity error detected #1 PEFPS Parity Error Flag for PSRAM 0 read-write value1 No parity error detected #0 value2 Parity error detected #1 PEFU0 Parity Error Flag for USIC0 Memory 8 read-write value1 No parity error detected #0 value2 Parity error detected #1 PEFU1 Parity Error Flag for USIC1 Memory 9 read-write value1 No parity error detected #0 value2 Parity error detected #1 PEUSB Parity Error Flag for USB Memory 16 read-write value1 No parity error detected #0 value2 Parity error detected #1 PERSTEN Parity Error Reset Enable Register 0xC 32 read-write n 0x0 0x0 RSEN System Reset Enable upon Parity Error Trap 0 read-write value1 Reset request disabled #0 value2 Reset request enabled #1 PETE Parity Error Trap Enable Register 0x8 32 read-write n 0x0 0x0 PETEDS1 Parity Error Trap Enable for DSRAM1 1 read-write value1 Disabled #0 value2 Enabled #1 PETEMC Parity Error Trap Enable for MultiCAN Memory 12 read-write value1 Disabled #0 value2 Enabled #1 PETEPPRF Parity Error Trap Enable for PMU Prefetch Memory 13 read-write value1 Disabled #0 value2 Enabled #1 PETEPS Parity Error Trap Enable for PSRAM 0 read-write value1 Disabled #0 value2 Enabled #1 PETEU0 Parity Error Trap Enable for USIC0 Memory 8 read-write value1 Disabled #0 value2 Enabled #1 PETEU1 Parity Error Trap Enable for USIC1 Memory 9 read-write value1 Disabled #0 value2 Enabled #1 PETEUSB Parity Error Trap Enable for USB Memory 16 read-write value1 Disabled #0 value2 Enabled #1 PMTPR Parity Memory Test Pattern Register 0x18 32 read-write n 0x0 0x0 PRD Parity Read Values for Memory Test 8 7 read-only PWR Parity Write Values for Memory Test 0 7 read-write PMTSR Parity Memory Test Select Register 0x1C 32 read-write n 0x0 0x0 MTEMC Test Enable Control for MultiCAN Memory 12 read-write value1 Standard operation #0 value2 Parity bits under test #1 MTENDS1 Test Enable Control for DSRAM1 1 read-write value1 Standard operation #0 value2 Parity bits under test #1 MTENPS Test Enable Control for PSRAM 0 read-write value1 Standard operation #0 value2 Parity bits under test #1 MTEPPRF Test Enable Control for PMU Prefetch Memory 13 read-write value1 Standard operation #0 value2 Parity bits under test #1 MTEU0 Test Enable Control for USIC0 Memory 8 read-write value1 Standard operation #0 value2 Parity bits under test #1 MTEU1 Test Enable Control for USIC1 Memory 9 read-write value1 Standard operation #0 value2 Parity bits under test #1 MTUSB Test Enable Control for USB Memory 16 read-write value1 Standard operation #0 value2 Parity bits under test #1 SCU_PLL System Control Unit SCU 0x0 0x0 0x2C registers n CLKMXSTAT Clock Multiplexing Status Register 0x28 32 read-write n 0x0 0x0 SYSCLKMUX Status of System clock multiplexing upon source switching 0 1 read-only value1 fOFI clock active #01 value2 fPLL clock active #10 PLLCON0 PLL Configuration 0 Register 0x4 32 read-write n 0x0 0x0 AOTREN Automatic Oscillator Calibration Enable 19 read-write value1 Disable #0 value2 Enable #1 FINDIS Disconnect Oscillator from VCO 4 read-write value1 connect oscillator to the VCO part #0 value2 disconnect oscillator from the VCO part. #1 FOTR Factory Oscillator Calibration 20 read-write value1 No effect #0 value2 Force fixed-value trimming #1 OSCDISCDIS Oscillator Disconnect Disable 6 read-write value1 In case of a PLL loss-of-lock bit FINDIS is set #0 value2 In case of a PLL loss-of-lock bit FINDIS is cleared #1 OSCRES Oscillator Watchdog Reset 17 read-write value1 The Oscillator Watchdog of the PLL is not cleared and remains active #0 value2 The Oscillator Watchdog of the PLL is cleared and restarted #1 PLLPWD PLL Power Saving Mode 16 read-write value1 Normal behavior #0 value2 The complete PLL block is put into a Power Saving Mode and can no longer be used. Only the Bypass Mode is active if previously selected. #1 RESLD Restart VCO Lock Detection 18 write-only VCOBYP VCO Bypass 0 read-write value1 Normal operation, VCO is not bypassed #0 value2 Prescaler Mode, VCO is bypassed #1 VCOPWD VCO Power Saving Mode 1 read-write value1 Normal behavior #0 value2 The VCO is put into a Power Saving Mode and can no longer be used. Only the Bypass and Prescaler Mode are active if previously selected. #1 VCOTR VCO Trim Control 2 read-write value1 VCO bandwidth is operation in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz. #0 value2 VCO bandwidth is operation in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz. #1 PLLCON1 PLL Configuration 1 Register 0x8 32 read-write n 0x0 0x0 K1DIV K1-Divider Value 0 6 read-write K2DIV K2-Divider Value 16 6 read-write NDIV N-Divider Value 8 6 read-write PDIV P-Divider Value 24 3 read-write PLLCON2 PLL Configuration 2 Register 0xC 32 read-write n 0x0 0x0 K1INSEL K1-Divider Input Selection 8 read-write value1 PLL external oscillator selected #0 value2 Backup clock fofi selected #1 PINSEL P-Divider Input Selection 0 read-write value1 PLL external oscillator selected #0 value2 Backup clock fofi selected #1 PLLSTAT PLL Status Register 0x0 32 read-write n 0x0 0x0 BY Bypass Mode Status 6 read-only value1 Bypass Mode is not entered #0 value2 Bypass Mode is entered. Input fOSC is selected as output fPLL. #1 K1RDY K1 Divider Ready Status 4 read-only value1 K1-Divider does not operate with the new value #0 value2 K1-Divider operate with the new value #1 K2RDY K2 Divider Ready Status 5 read-only value1 K2-Divider does not operate with the new value #0 value2 K2-Divider operate with the new value #1 PLLHV Oscillator for PLL Valid High Status Bit 8 read-only value1 The OSC frequency is not usable. Frequency fOSC is too high. #0 value2 The OSC frequency is usable #1 PLLLV Oscillator for PLL Valid Low Status Bit 7 read-only value1 The OSC frequency is not usable. Frequency fREF is too low. #0 value2 The OSC frequency is usable #1 PLLSP Oscillator for PLL Valid Spike Status Bit 9 read-only value1 The OSC frequency is not usable. Spikes are detected that disturb a locked operation #0 value2 The OSC frequency is usable #1 PWDSTAT PLL Power-saving Mode Status 1 read-only value1 PLL Power-saving Mode was not entered #0 value2 PLL Power-saving Mode was entered #1 VCOBYST VCO Bypass Status 0 read-only value1 Free-running / Normal Mode is entered #0 value2 Prescaler Mode is entered #1 VCOLOCK PLL LOCK Status 2 read-only value1 PLL not locked #0 value2 PLL locked #1 USBPLLCON USB PLL Configuration Register 0x14 32 read-write n 0x0 0x0 FINDIS Disconnect Oscillator from VCO 4 read-write value1 Connect oscillator to the VCO part #0 value2 Disconnect oscillator from the VCO part. #1 NDIV N-Divider Value 8 6 read-write OSCDISCDIS Oscillator Disconnect Disable 6 read-write value1 In case of a PLL loss-of-lock bit FINDIS is set #0 value2 In case of a PLL loss-of-lock bit FINDIS is cleared #1 PDIV P-Divider Value 24 3 read-write PLLPWD PLL Power Saving Mode 16 read-write value1 Normal behavior #0 value2 The complete PLL block is put into a Power Saving Mode. Only the Bypass Mode is active if previously selected. #1 RESLD Restart VCO Lock Detection 18 write-only VCOBYP VCO Bypass 0 read-write value1 Normal operation, VCO is not bypassed #0 value2 Prescaler Mode, VCO is bypassed #1 VCOPWD VCO Power Saving Mode 1 read-write value1 Normal behavior #0 value2 The VCO is put into a Power Saving Mode #1 VCOTR VCO Trim Control 2 read-write value1 VCO bandwidth is operating in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz. #0 value2 VCO bandwidth is operating in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz. #1 USBPLLSTAT USB PLL Status Register 0x10 32 read-write n 0x0 0x0 BY Bypass Mode Status 6 read-only value1 Bypass Mode is not entered #0 value2 Bypass Mode is entered. Input fOSC is selected as output fPLL. #1 PWDSTAT PLL Power-saving Mode Status 1 read-only value1 PLL Power-saving Mode was not entered #0 value2 PLL Power-saving Mode was entered #1 VCOBYST VCO Bypass Status 0 read-only value1 Normal Mode is entered #0 value2 Prescaler Mode is entered #1 VCOLOCK PLL VCO Lock Status 2 read-only value1 The frequency difference of fREF and fDIV is greater than allowed. The VCO part of the PLL can not lock on a target frequency. #0 value2 The frequency difference of fREF and fDIV is small enough to enable a stable VCO operation #1 VCOLOCKED PLL LOCK Status 7 read-only value1 PLL not locked #0 value2 PLL locked #1 SCU_POWER System Control Unit SCU 0x0 0x0 0x100 registers n EVRSTAT EVR Status Register 0x10 32 read-write n 0x0 0x0 OV13 Regulator Overvoltage for 1.3 V 1 read-only value1 No overvoltage condition #0 value2 Regulator is in overvoltage #1 EVRVADCSTAT EVR VADC Status Register 0x14 32 read-write n 0x0 0x0 VADC13V VADC 1.3 V Conversion Result 0 7 read-only VADC33V VADC 3.3 V Conversion Result 8 7 read-only PWRCLR PCU Clear Control Register 0x8 32 read-write n 0x0 0x0 HIB Clear Disable Hibernate Domain 0 write-only value1 No effect #0 value2 Disable Hibernate domain #1 USBPHYPDQ Clear USB PHY Transceiver Disable 16 write-only value1 No effect #0 value2 Power-down #1 USBPUWQ Clear USB Weak Pull-Up at PADN Enable 18 write-only value1 No effect #0 value2 Pull-up active #1 PWRMON Power Monitor Control 0x2C 32 read-write n 0x0 0x0 ENB Enable 16 read-write INTV Interval 8 7 read-write THRS Threshold 0 7 read-write PWRSET PCU Set Control Register 0x4 32 read-write n 0x0 0x0 HIB Set Hibernate Domain Enable 0 write-only value1 No effect #0 value2 Enable Hibernate domain #1 USBPHYPDQ Set USB PHY Transceiver Disable 16 write-only value1 No effect #0 value2 Active #1 USBPUWQ Set USB Weak Pull-Up at PADN Enable 18 write-only value1 No effect #0 value2 Pull-up not active #1 PWRSTAT PCU Status Register 0x0 32 read-write n 0x0 0x0 HIBEN Hibernate Domain Enable Status 0 read-only value1 Inactive #0 value2 Active #1 USBPHYPDQ USB PHY Transceiver State 16 read-only value1 Power-down #0 value2 Active #1 USBPUWQ USB Weak Pull-Up at PADN State 18 read-only value1 Pull-up active #0 value2 Pull-up not active #1 SCU_RESET System Control Unit SCU 0x0 0x0 0x100 registers n PRCLR0 RCU Peripheral 0 Reset Clear 0x14 32 read-write n 0x0 0x0 CCU40RS CCU40 Reset Clear 2 write-only value1 No effect #0 value2 De-assert reset #1 CCU41RS CCU41 Reset Clear 3 write-only value1 No effect #0 value2 De-assert reset #1 CCU80RS CCU80 Reset Clear 7 write-only value1 No effect #0 value2 De-assert reset #1 ERU1RS ERU1 Reset Clear 16 write-only value1 No effect #0 value2 De-assert reset #1 HRPWM0RS HRPWM0 Reset Clear 23 write-only value1 No effect #0 value2 De-assert reset #1 POSIF0RS POSIF0 Reset Clear 9 write-only value1 No effect #0 value2 De-assert reset #1 USIC0RS USIC0 Reset Clear 11 write-only value1 No effect #0 value2 De-assert reset #1 VADCRS VADC Reset Clear 0 write-only value1 No effect #0 value2 De-assert reset #1 PRCLR1 RCU Peripheral 1 Reset Clear 0x20 32 read-write n 0x0 0x0 DACRS DAC Reset Clear 5 write-only value1 No effect #0 value2 De-assert reset #1 LEDTSCU0RS LEDTS Reset Clear 3 write-only value1 No effect #0 value2 De-assert reset #1 MCAN0RS MultiCAN Reset Clear 4 write-only value1 No effect #0 value2 De-assert reset #1 PPORTSRS PORTS Reset Clear 9 write-only value1 No effect #0 value2 De-assert reset #1 USIC1RS USIC1 Reset Clear 7 write-only value1 No effect #0 value2 De-assert reset #1 PRCLR2 RCU Peripheral 2 Reset Clear 0x2C 32 read-write n 0x0 0x0 DMA0RS DMA0 Reset Clear 4 write-only value1 No effect #0 value2 De-assert reset #1 FCERS FCE Reset Clear 6 write-only value1 No effect #0 value2 De-assert reset #1 USBRS USB Reset Clear 7 write-only value1 No effect #0 value2 De-assert reset #1 WDTRS WDT Reset Clear 1 write-only value1 No effect #0 value2 De-assert reset #1 PRSET0 RCU Peripheral 0 Reset Set 0x10 32 read-write n 0x0 0x0 CCU40RS CCU40 Reset Assert 2 write-only value1 No effect #0 value2 Assert reset #1 CCU41RS CCU41 Reset Assert 3 write-only value1 No effect #0 value2 Assert reset #1 CCU80RS CCU80 Reset Assert 7 write-only value1 No effect #0 value2 Assert reset #1 ERU1RS ERU1 Reset Assert 16 write-only value1 No effect #0 value2 Assert reset #1 HRPWM0RS HRPWM0 Reset Assert 23 write-only value1 No effect #0 value2 Assert reset #1 POSIF0RS POSIF0 Reset Assert 9 write-only value1 No effect #0 value2 Assert reset #1 USIC0RS USIC0 Reset Assert 11 write-only value1 No effect #0 value2 Assert reset #1 VADCRS VADC Reset Assert 0 write-only value1 No effect #0 value2 Assert reset #1 PRSET1 RCU Peripheral 1 Reset Set 0x1C 32 read-write n 0x0 0x0 DACRS DAC Reset Assert 5 write-only value1 No effect #0 value2 Assert reset #1 LEDTSCU0RS LEDTS Reset Assert 3 write-only value1 No effect #0 value2 Assert reset #1 MCAN0RS MultiCAN Reset Assert 4 write-only value1 No effect #0 value2 Assert reset #1 PPORTSRS PORTS Reset Assert 9 write-only value1 No effect #0 value2 Assert reset #1 USIC1RS USIC1 Reset Assert 7 write-only value1 No effect #0 value2 Assert reset #1 PRSET2 RCU Peripheral 2 Reset Set 0x28 32 read-write n 0x0 0x0 DMA0RS DMA0 Reset Assert 4 write-only value1 No effect #0 value2 Assert reset #1 FCERS FCE Reset Assert 6 write-only value1 No effect #0 value2 Assert reset #1 USBRS USB Reset Assert 7 write-only value1 No effect #0 value2 Assert reset #1 WDTRS WDT Reset Assert 1 write-only value1 No effect #0 value2 Assert reset #1 PRSTAT0 RCU Peripheral 0 Reset Status 0xC 32 read-write n 0x0 0x0 CCU40RS CCU40 Reset Status 2 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 CCU41RS CCU41 Reset Status 3 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 CCU80RS CCU80 Reset Status 7 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 ERU1RS ERU1 Reset Status 16 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 HRPWM0RS HRPWM0 Reset Status 23 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 POSIF0RS POSIF0 Reset Status 9 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 USIC0RS USIC0 Reset Status 11 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 VADCRS VADC Reset Status 0 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 PRSTAT1 RCU Peripheral 1 Reset Status 0x18 32 read-write n 0x0 0x0 DACRS DAC Reset Status 5 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 LEDTSCU0RS LEDTS Reset Status 3 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 MCAN0RS MultiCAN Reset Status 4 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 PPORTSRS PORTS Reset Status 9 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 USIC1RS USIC1 Reset Status 7 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 PRSTAT2 RCU Peripheral 2 Reset Status 0x24 32 read-write n 0x0 0x0 DMA0RS DMA0 Reset Status 4 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 FCERS FCE Reset Status 6 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 USBRS USB Reset Status 7 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 WDTRS WDT Reset Status 1 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 RSTCLR RCU Reset Clear Register 0x8 32 read-write n 0x0 0x0 HIBRS Clear Hibernate Reset 9 write-only value1 No effect #0 value2 De-assert reset #1 HIBWK Clear Hibernate Wake-up Reset Status 8 write-only value1 No effect #0 value2 De-assert reset status bit #1 LCKEN Enable Lockup Reset 10 write-only value1 No effect #0 value2 Disable reset when Lockup gets asserted #1 RSCLR Clear Reset Status 0 write-only value1 No effect #0 value2 Clears field RSTSTAT.RSTSTAT #1 RSTSET RCU Reset Set Register 0x4 32 read-write n 0x0 0x0 HIBRS Set Hibernate Reset 9 write-only value1 No effect #0 value2 Assert reset #1 HIBWK Set Hibernate Wake-up Reset Status 8 write-only value1 No effect #0 value2 Assert reset status bit #1 LCKEN Enable Lockup Reset 10 write-only value1 No effect #0 value2 Enable reset when Lockup gets asserted #1 RSTSTAT RCU Reset Status 0x0 32 read-write n 0x0 0x0 HIBRS Hibernate Reset Status 9 read-only value1 Reset de-asserted #0 value2 Reset asserted #1 HIBWK Hibernate Wake-up Status 8 read-only value1 No Wake-up #0 value2 Wake-up event #1 LCKEN Enable Lockup Status 10 read-only value1 Reset by Lockup disabled #0 value2 Reset by Lockup enabled #1 RSTSTAT Reset Status Information 0 7 read-only value1 PORST reset #00000001 value2 SWD reset #00000010 value3 PV reset #00000100 value4 CPU system reset #00001000 value5 CPU lockup reset #00010000 value6 WDT reset #00100000 value8 Parity Error reset #10000000 SCU_TRAP System Control Unit SCU 0x0 0x0 0x14 registers n TRAPCLR Trap Clear Register 0xC 32 read-write n 0x0 0x0 BRWNT Brown Out Trap Clear 5 write-only value1 No effect #0 value2 Clear trap request #1 BWERR0T Peripheral Bridge 0 Trap Clear 7 write-only value1 No effect #0 value2 Clear trap request #1 BWERR1T Peripheral Bridge 1 Trap Clear 8 write-only value1 No effect #0 value2 Clear trap request #1 PET Parity Error Trap Clear 4 write-only value1 No effect #0 value2 Clear trap request #1 SOSCWDGT System OSC WDT Trap Clear 0 write-only value1 No effect #0 value2 Clear trap request #1 SVCOLCKT System VCO Lock Trap Clear 2 write-only value1 No effect #0 value2 Clear trap request #1 TEMPHIT Die Temperature Too High Trap Clear 12 write-only value1 No effect #0 value2 Clear trap request #1 TEMPLOT Die Temperature Too Low Trap Clear 13 write-only value1 No effect #0 value2 Clear trap request #1 ULPWDGT OSC_ULP WDG Trap Clear 6 write-only value1 No effect #0 value2 Clear trap request #1 UVCOLCKT USB VCO Lock Trap Clear 3 write-only value1 No effect #0 value2 Clear trap request #1 TRAPDIS Trap Disable Register 0x8 32 read-write n 0x0 0x0 BRWNT Brown Out Trap Disable 5 read-write value1 Trap request enabled #0 value2 Trap request disabled #1 BWERR0T Peripheral Bridge 0 Trap Disable 7 read-write value1 Trap request enabled #0 value2 Trap request disabled #1 BWERR1T Peripheral Bridge 1 Trap Disable 8 read-write value1 Trap request enabled #0 value2 Trap request disabled #1 PET Parity Error Trap Disable 4 read-write value1 Trap request enabled #0 value2 Trap request disabled #1 SOSCWDGT System OSC WDT Trap Disable 0 read-write value1 Trap request enabled #0 value2 Trap request disabled #1 SVCOLCKT System VCO Lock Trap Disable 2 read-write value1 Trap request enabled #0 value2 Trap request disabled #1 TEMPHIT Die Temperature Too High Trap Disable 12 read-write value1 Trap request enabled #0 value2 Trap request disabled #1 TEMPLOT Die Temperature Too Low Trap Disable 13 read-write value1 Trap request enabled #0 value2 Trap request disabled #1 ULPWDGT Wake-up Trap Disable 6 read-write value1 Trap request enabled #0 value2 Trap request disabled #1 UVCOLCKT USB VCO Lock Trap Disable 3 read-write value1 Trap request enabled #0 value2 Trap request disabled #1 TRAPRAW Trap Raw Status Register 0x4 32 read-write n 0x0 0x0 BRWNT Brown Out Trap Raw Status 5 read-only value1 No pending trap request #0 value2 Pending trap request #1 BWERR0T Peripheral Bridge 0 Trap Raw Status 7 read-only value1 No pending trap request #0 value2 Pending trap request #1 BWERR1T Peripheral Bridge 1 Trap Raw Status 8 read-only value1 No pending trap request #0 value2 Pending trap request #1 PET Parity Error Trap Raw Status 4 read-only value1 No pending trap request #0 value2 Pending trap request #1 SOSCWDGT System OSC WDT Trap Raw Status 0 read-only value1 No pending trap request #0 value2 Pending trap request #1 SVCOLCKT System VCO Lock Trap Raw Status 2 read-only value1 No pending trap request #0 value2 Pending trap request #1 TEMPHIT Die Temperature Too High Trap Raw Status 12 read-only value1 No pending trap request #0 value2 Pending trap request #1 TEMPLOT Die Temperature Too Low Trap Raw Status 13 read-only value1 No pending trap request #0 value2 Pending trap request #1 ULPWDGT OSC_ULP WDG Trap RAW Status 6 read-only value1 No pending trap request #0 value2 Pending trap request #1 UVCOLCKT USB VCO Lock Trap Raw Status 3 read-only value1 No pending trap request #0 value2 Pending trap request #1 TRAPSET Trap Set Register 0x10 32 read-write n 0x0 0x0 BRWNT Brown Out Trap Set 5 write-only value1 No effect #0 value2 Set trap request #1 BWERR0T Peripheral Bridge 0 Trap Set 7 write-only value1 No effect #0 value2 Set trap request #1 BWERR1T Peripheral Bridge 1 Trap Set 8 write-only value1 No effect #0 value2 Set trap request #1 PET Parity Error Trap Set 4 write-only value1 No effect #0 value2 Set trap request #1 SOSCWDGT System OSC WDT Trap Set 0 write-only value1 No effect #0 value2 Set trap request #1 SVCOLCKT System VCO Lock Trap Set 2 write-only value1 No effect #0 value2 Set trap request #1 TEMPHIT Die Temperature Too High Trap Set 12 write-only value1 No effect #0 value2 Set trap request #1 TEMPLOT Die Temperature Too Low Trap Set 13 write-only value1 No effect #0 value2 Set trap request #1 ULPWDT OSC_ULP WDG Trap Set 6 write-only value1 No effect #0 value2 Set trap request #1 UVCOLCKT USB VCO Lock Trap Set 3 write-only value1 No effect #0 value2 Set trap request #1 TRAPSTAT Trap Status Register 0x0 32 read-write n 0x0 0x0 BRWNT Brown Out Trap Status 5 read-only value1 No pending trap request #0 value2 Pending trap request #1 BWERR0T Peripheral Bridge 0 Trap Status 7 read-only value1 No pending trap request #0 value2 Pending trap request #1 BWERR1T Peripheral Bridge 1 Trap Status 8 read-only value1 No pending trap request #0 value2 Pending trap request #1 PET Parity Error Trap Status 4 read-only value1 No pending trap request #0 value2 Pending trap request #1 SOSCWDGT System OSC WDT Trap Status 0 read-only value1 No pending trap request #0 value2 Pending trap request #1 SVCOLCKT System VCO Lock Trap Status 2 read-only value1 No pending trap request #0 value2 Pending trap request #1 TEMPHIT Die Temperature Too High Trap Status 12 read-only value1 No pending trap request #0 value2 Pending trap request #1 TEMPLOT Die Temperature Too Low Trap Status 13 read-only value1 No pending trap request #0 value2 Pending trap request #1 ULPWDGT OSC_ULP WDG Trap Status 6 read-only value1 No pending trap request #0 value2 Pending trap request #1 UVCOLCKT USB VCO Lock Trap Status 3 read-only value1 No pending trap request #0 value2 Pending trap request #1 USB0 Universal Serial Bus USB 0x0 0x0 0x40000 registers n USB0_0 Universal Serial Bus (Module 0) 107 DAINT Device All Endpoints Interrupt Register 0x818 32 read-write n 0x0 0x0 InEpInt IN Endpoint Interrupt Bits 0 15 read-only OutEPInt OUT Endpoint Interrupt Bits 16 15 read-only DAINTMSK Device All Endpoints Interrupt Mask Register 0x81C 32 read-write n 0x0 0x0 InEpMsk IN EP Interrupt Mask Bits 0 15 read-write OutEpMsk OUT EP Interrupt Mask Bits 16 15 read-write DCFG Device Configuration Register 0x800 32 read-write n 0x0 0x0 DescDMA Enable Scatter/Gather DMA in Device mode. 23 read-write DevAddr Device Address 4 6 read-write DevSpd Device Speed 0 1 read-write value4 Full speed (USB 1.1 transceiver clock is 48 MHz) #11 NZStsOUTHShk Non-Zero-Length Status OUT Handshake 2 read-write value2 Send the received OUT packet to the application (zero-length or nonzero-length) and send a handshake based on the NAK and STALL bits for the endpoint in the Device Endpoint Control register. #0 value1 Send a STALL handshake on a nonzero-length status OUT transaction and do not send the received OUT packet to the application. #1 PerFrInt Periodic Frame Interval 11 1 read-write value1 80% of the frame interval #00 value2 85% #01 value3 90% #10 value4 95% #11 PerSchIntvl Periodic Scheduling Interval 24 1 read-write value1 25% of frame. #00 value2 50% of frame. #01 value3 75% of frame. #10 DCTL Device Control Register 0x804 32 read-write n 0x0 0x0 CGNPInNak Clear Global Non-periodic IN NAK 8 write-only CGOUTNak Clear Global OUT NAK 10 write-only EnContOnBNA Enable continue on BNA 17 read-write value1 After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the DOEPDMA descriptor. #0 value2 After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the descriptor that received the BNA interrupt. #1 GMC Global Multi Count 13 1 read-write value1 Invalid. #00 value2 1 packet. #01 value3 2 packets. #10 value4 3 packets. #11 GNPINNakSts Global Non-periodic IN NAK Status 2 read-only value1 A handshake is sent out based on the data availability in the transmit FIFO. #0 value2 A NAK handshake is sent out on all non-periodic IN endpoints, irrespective of the data availability in the transmit FIFO. #1 GOUTNakSts Global OUT NAK Status 3 read-only value1 A handshake is sent based on the FIFO Status and the NAK and STALL bit settings. #0 value2 No data is written to the RxFIFO, irrespective of space availability. Sends a NAK handshake on all packets, except on SETUP transactions. All isochronous OUT packets are dropped. #1 IgnrFrmNum Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA 15 read-write value1 Scatter/Gather enabled: The core transmits the packets only in the frame number in which they are intended to be transmitted. Scatter/Gather disabled: Periodic transfer interrupt feature is disabled; the application must program transfers for periodic endpoints every frame #0 value2 Scatter/Gather enabled: The core ignores the frame number, sending packets immediately as the packets are ready. Scatter/Gather disabled: Periodic transfer interrupt feature is enabled; the application can program transfers for multiple frames for periodic endpoints. #1 NakOnBble Set NAK automatically on babble 16 read-write RmtWkUpSig Remote Wakeup Signaling 0 read-write SftDiscon Soft Disconnect 1 read-write value1 Normal operation. When this bit is cleared after a soft disconnect, the core drives a device connect event to the USB host. When the device is reconnected, the USB host restarts device enumeration. #0 value2 The core drives a device disconnect event to the USB host. #1 SGNPInNak Set Global Non-periodic IN NAK 7 write-only SGOUTNak Set Global OUT NAK 9 write-only DIEPEMPMSK Device IN Endpoint FIFO Empty Interrupt Mask Register 0x834 32 read-write n 0x0 0x0 InEpTxfEmpMsk IN EP Tx FIFO Empty Interrupt Mask Bits 0 15 read-write DIEPMSK Device IN Endpoint Common Interrupt Mask Register 0x810 32 read-write n 0x0 0x0 AHBErrMsk AHB Error Mask 2 read-write BNAInIntrMsk BNA Interrupt Mask 9 read-write EPDisbldMsk Endpoint Disabled Interrupt Mask 1 read-write INEPNakEffMsk IN Endpoint NAK Effective Mask 6 read-write INTknTXFEmpMsk IN Token Received When TxFIFO Empty Mask 4 read-write NAKMsk NAK interrupt Mask 13 read-write TimeOUTMsk Timeout Condition Mask 3 read-write TxfifoUndrnMsk Fifo Underrun Mask 8 read-write XferComplMsk Transfer Completed Interrupt Mask 0 read-write DIEPTXF1 Device IN Endpoint 1 Transmit FIFO Size Register 0x104 32 read-write n 0x0 0x0 INEPnTxFDep IN Endpoint TxFIFO Depth 16 15 read-write INEPnTxFStAddr IN Endpoint FIFOn Transmit RAM Start Address 0 15 read-write DIEPTXF2 Device IN Endpoint 2 Transmit FIFO Size Register 0x108 32 read-write n 0x0 0x0 INEPnTxFDep IN Endpoint TxFIFO Depth 16 15 read-write INEPnTxFStAddr IN Endpoint FIFOn Transmit RAM Start Address 0 15 read-write DIEPTXF3 Device IN Endpoint 3 Transmit FIFO Size Register 0x10C 32 read-write n 0x0 0x0 INEPnTxFDep IN Endpoint TxFIFO Depth 16 15 read-write INEPnTxFStAddr IN Endpoint FIFOn Transmit RAM Start Address 0 15 read-write DIEPTXF4 Device IN Endpoint 4 Transmit FIFO Size Register 0x110 32 read-write n 0x0 0x0 INEPnTxFDep IN Endpoint TxFIFO Depth 16 15 read-write INEPnTxFStAddr IN Endpoint FIFOn Transmit RAM Start Address 0 15 read-write DIEPTXF5 Device IN Endpoint 5 Transmit FIFO Size Register 0x114 32 read-write n 0x0 0x0 INEPnTxFDep IN Endpoint TxFIFO Depth 16 15 read-write INEPnTxFStAddr IN Endpoint FIFOn Transmit RAM Start Address 0 15 read-write DIEPTXF6 Device IN Endpoint 6 Transmit FIFO Size Register 0x118 32 read-write n 0x0 0x0 INEPnTxFDep IN Endpoint TxFIFO Depth 16 15 read-write INEPnTxFStAddr IN Endpoint FIFOn Transmit RAM Start Address 0 15 read-write DOEPMSK Device OUT Endpoint Common Interrupt Mask Register 0x814 32 read-write n 0x0 0x0 AHBErrMsk AHB Error 2 read-write Back2BackSETup Back-to-Back SETUP Packets Received Mask 6 read-write BbleErrMsk Babble Interrupt Mask 12 read-write BnaOutIntrMsk BNA interrupt Mask 9 read-write EPDisbldMsk Endpoint Disabled Interrupt Mask 1 read-write NAKMsk NAK Interrupt Mask 13 read-write NYETMsk NYET Interrupt Mask 14 read-write OutPktErrMsk OUT Packet Error Mask 8 read-write OUTTknEPdisMsk OUT Token Received when Endpoint Disabled Mask 4 read-write SetUPMsk SETUP Phase Done Mask 3 read-write XferComplMsk Transfer Completed Interrupt Mask 0 read-write DSTS Device Status Register 0x808 32 read-write n 0x0 0x0 EnumSpd Enumerated Speed 1 1 read-only value4 Full speed (PHY clock is running at 48 MHz) #11 ErrticErr Erratic Error 3 read-only SOFFN Frame Number of the Received SOF 8 13 read-only SuspSts Suspend Status 0 read-only DVBUSDIS Device VBUS Discharge Time Register 0x828 32 read-write n 0x0 0x0 DVBUSDis Device Vbus Discharge Time 0 15 read-write DVBUSPULSE Device VBUS Pulsing Time Register 0x82C 32 read-write n 0x0 0x0 DVBUSPulse Device Vbus Pulsing Time 0 11 read-write GAHBCFG AHB Configuration Register 0x8 32 read-write n 0x0 0x0 AHBSingle AHB Single Support 23 read-write value1 The remaining data in a transfer is sent using INCR burst size. This is the default mode. #0 value2 The remaining data in a transfer is sent using single burst size. #1 DMAEn DMA Enable 5 read-write value1 Core operates in Slave mode #0 value2 Core operates in a DMA mode #1 GlblIntrMsk Global Interrupt Mask 0 read-write value1 Mask the interrupt assertion to the application. #0 value2 Unmask the interrupt assertion to the application. #1 HBstLen Burst Length/Type 1 3 read-write value1 Single #0000 value2 INCR #0001 value3 INCR4 #0011 value4 INCR8 #0101 value5 INCR16 #0111 NPTxFEmpLvl Non-Periodic TxFIFO Empty Level 7 read-write value1 DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is half empty #0 value2 DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is completely empty #1 GDFIFOCFG Global DFIFO Software Config Register 0x5C 32 read-write n 0x0 0x0 EPInfoBaseAddr EPInfoBaseAddr 16 15 read-write GDFIFOCfg GDFIFOCfg 0 15 read-write GINTMSK Interrupt Mask Register 0x18 32 read-write n 0x0 0x0 EnumDoneMsk Enumeration Done Mask 13 read-write EOPFMsk End of Periodic Frame Interrupt Mask 15 read-write ErlySuspMsk Early Suspend Mask 10 read-write GINNakEffMsk Global Non-periodic IN NAK Effective Mask 6 read-write GOUTNakEffMsk Global OUT NAK Effective Mask 7 read-write IEPIntMsk IN Endpoints Interrupt Mask 18 read-write incompISOINMsk Incomplete Isochronous IN Transfer Mask 20 read-write incomplSOOUTMsk Incomplete Isochronous OUT Transfer Mask 21 read-write ISOOutDropMsk Isochronous OUT Packet Dropped Interrupt Mask 14 read-write OEPIntMsk OUT Endpoints Interrupt Mask 19 read-write RxFLvlMsk Receive FIFO Non-Empty Mask 4 read-write SofMsk Start of Frame Mask 3 read-write USBRstMsk USB Reset Mask 12 read-write USBSuspMsk USB Suspend Mask 11 read-write WkUpIntMsk Resume/Remote Wakeup Detected Interrupt Mask 31 read-write GINTSTS Interrupt Register 0x14 32 read-write n 0x0 0x0 CurMod Current Mode of Operation 0 read-only value1 Device mode #0 EnumDone Enumeration Done 13 read-write EOPF End of Periodic Frame Interrupt 15 read-write ErlySusp Early Suspend 10 read-write GINNakEff Global IN Non-Periodic NAK Effective 6 read-only GOUTNakEff Global OUT NAK Effective 7 read-only IEPInt IN Endpoints Interrupt 18 read-only incompISOIN Incomplete Isochronous IN Transfer 20 read-write incomplSOOUT Incomplete Isochronous OUT Transfer 21 read-write ISOOutDrop Isochronous OUT Packet Dropped Interrupt 14 read-write OEPInt OUT Endpoints Interrupt 19 read-only RxFLvl RxFIFO Non-Empty 4 read-only Sof Start of Frame 3 read-write USBRst USB Reset 12 read-write USBSusp USB Suspend 11 read-write WkUpInt Resume/Remote Wakeup Detected Interrupt 31 read-write GNPTXFSIZ Non-Periodic Transmit FIFO Size Register 0x28 32 read-write n 0x0 0x0 INEPTxF0Dep IN Endpoint TxFIFO 0 Depth 16 15 read-write INEPTxF0StAddr IN Endpoint FIFO0 Transmit RAM Start Address 0 15 read-write GRSTCTL Reset Register 0x10 32 read-write n 0x0 0x0 AHBIdle AHB Master Idle 31 read-only CSftRst Core Soft Reset 0 read-write DMAReq DMA Request Signal 30 read-only RxFFlsh RxFIFO Flush 4 read-write TxFFlsh TxFIFO Flush 5 read-write TxFNum TxFIFO Number 6 4 read-write value1 Tx FIFO 0 flush in device mode 0x00 value2 Tx FIFO 1 flush in device mode 0x01 value3 Tx FIFO 2 flush in device mode 0x02 value4 Tx FIFO 15 flush in device mode 0x0F value5 Flush all the transmit FIFOs in device or host mode. 0x10 GRXFSIZ Receive FIFO Size Register 0x24 32 read-write n 0x0 0x0 RxFDep RxFIFO Depth 0 15 read-write GRXSTSP Receive Status Read and Pop Register 0x20 32 read-write n 0x0 0x0 modifyExternal BCnt Byte Count 4 10 read-only DPID Data PID 15 1 read-only value1 DATA0 #00 value3 DATA2 #01 value2 DATA1 #10 value4 MDATA #11 EPNum Endpoint Number 0 3 read-only FN Frame Number 21 3 read-only PktSts Packet Status 17 3 read-only value1 Global OUT NAK (triggers an interrupt) #0001 value2 OUT data packet received #0010 value3 OUT transfer completed (triggers an interrupt) #0011 value4 SETUP transaction completed (triggers an interrupt) #0100 value5 SETUP data packet received #0110 GRXSTSR Receive Status Debug Read Register 0x1C 32 read-write n 0x0 0x0 BCnt Byte Count 4 10 read-only DPID Data PID 15 1 read-only value1 DATA0 #00 value3 DATA2 #01 value2 DATA1 #10 value4 MDATA #11 EPNum Endpoint Number 0 3 read-only FN Frame Number 21 3 read-only PktSts Packet Status 17 3 read-only value1 Global OUT NAK (triggers an interrupt) #0001 value2 OUT data packet received #0010 value3 OUT transfer completed (triggers an interrupt) #0011 value4 SETUP transaction completed (triggers an interrupt) #0100 value5 SETUP data packet received #0110 GUID USB Module Identification Register 0x3C 32 read-write n 0x0 0x0 MOD_NUMBER Module Number 16 15 read-write MOD_REV Module Revision 0 7 read-write MOD_TYPE Module Type 8 7 read-write GUSBCFG USB Configuration Register 0xC 32 read-write n 0x0 0x0 CTP Corrupt Tx packet 31 read-write ForceDevMode Force Device Mode 30 read-write value1 Normal Mode #0 value2 Force Device Mode #1 PHYSel USB 1.1 Full-Speed Serial Transceiver Select 6 read-only value2 USB 1.1 full-speed serial transceiver #1 TOutCal FS Timeout Calibration 0 2 read-write TxEndDelay Tx End Delay 28 read-write value1 Normal mode #0 value2 Introduce Tx end delay timers #1 USBTrdTim USB Turnaround Time 10 3 read-write PCGCCTL Power and Clock Gating Control Register 0xE00 32 read-write n 0x0 0x0 GateHclk Gate Hclk 1 read-write StopPclk Stop Pclk 0 read-write USB0_EP0 Universal Serial Bus USB 0x0 0x0 0x400 registers n DIEPCTL0 Device Control IN Endpoint Control Register 0x0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-only MPS Maximum Packet Size 0 1 read-write value1 64 bytes #00 value2 32 bytes #01 value3 16 bytes #10 value4 8 bytes #11 NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SNAK Set NAK 27 write-only Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-only DIEPDMA0 Device Endpoint DMA Address Register 0x14 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DIEPDMAB0 Device Endpoint DMA Buffer Address Register 0x1C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DIEPINT0 Device Endpoint Interrupt Register 0x8 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write INEPNakEff IN Endpoint NAK Effective 6 read-write INTknTXFEmp IN Token Received When TxFIFO is Empty 4 read-write TimeOUT Timeout Condition 3 read-write TxFEmp Transmit FIFO Empty 7 read-only XferCompl Transfer Completed Interrupt 0 read-write DIEPTSIZ0 Device IN Endpoint Transfer Size Register 0x10 32 read-write n 0x0 0x0 PktCnt Packet Count 19 1 read-write XferSize Transfer Size 0 6 read-write DOEPCTL0 Device Control OUT Endpoint Control Register 0x200 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EPDis Endpoint Disable 30 read-only EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-only MPS Maximum Packet Size 0 1 read-only value1 64 bytes #00 value2 32 bytes #01 value3 16 bytes #10 value4 8 bytes #11 NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write USBActEP USB Active Endpoint 15 read-only DOEPDMA0 Device Endpoint DMA Address Register 0x214 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DOEPDMAB0 Device Endpoint DMA Buffer Address Register 0x21C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DOEPINT0 Device Endpoint Interrupt Register 0x208 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write Back2BackSETup Back-to-Back SETUP Packets Received 6 read-write BbleErrIntrpt BbleErr (Babble Error) interrupt 12 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write NAKIntrpt NAK interrupt 13 read-write NYETIntrpt NYET interrupt 14 read-write OUTTknEPdis OUT Token Received When Endpoint Disabled 4 read-write PktDrpSts Packet Dropped Status 11 read-write SetUp SETUP Phase Done 3 read-write StsPhseRcvd Status Phase Received For Control Write 5 read-write XferCompl Transfer Completed Interrupt 0 read-write DOEPTSIZ0 Device OUT Endpoint Transfer Size Register 0x210 32 read-write n 0x0 0x0 PktCnt Packet Count 19 1 read-write SUPCnt SETUP Packet Count 29 1 read-write value1 1 packet #01 value2 2 packets #10 value3 3 packets #11 XferSize Transfer Size 0 6 read-write DTXFSTS0 Device IN Endpoint Transmit FIFO Status Register 0x18 32 read-write n 0x0 0x0 INEPTxFSpcAvail IN Endpoint TxFIFO Space Avail 0 15 read-only value1 Endpoint TxFIFO is full 0x0 value2 1 word available 0x1 value3 2 words available 0x2 USB0_EP1 Universal Serial Bus USB 0x0 0x0 0x400 registers n DIEPCTL_INTBULK Device Endpoint Control Register [INTBULK] DIEPCTL_ISOCONT 0x0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only DPID Endpoint Data PID 16 read-only value1 DATA0 #0 value2 DATA1 #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetD0PID Set DATA0 PID 28 write-only SetD1PID 29 Set DATA1 PID 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DIEPCTL_ISOCONT Device Endpoint Control Register [ISOCONT] 0x0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EO_FrNum Even/Odd Frame 16 read-only value1 Even frame #0 value2 Odd rame #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetEvenFr In non-Scatter/Gather DMA mode: Set Even frame 28 write-only SetOddFr Set Odd frame 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DIEPDMA Device Endpoint DMA Address Register 0x14 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DIEPDMAB Device Endpoint DMA Buffer Address Register 0x1C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DIEPINT Device Endpoint Interrupt Register 0x8 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write INEPNakEff IN Endpoint NAK Effective 6 read-write INTknTXFEmp IN Token Received When TxFIFO is Empty 4 read-write TimeOUT Timeout Condition 3 read-write TxFEmp Transmit FIFO Empty 7 read-only XferCompl Transfer Completed Interrupt 0 read-write DIEPTSIZ Device Endpoint Transfer Size Register 0x10 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write XferSize Transfer Size 0 18 read-write DOEPCTL_INTBULK Device Endpoint Control Register [INTBULK] DOEPCTL_ISOCONT 0x200 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only DPID Endpoint Data PID 16 read-only value1 DATA0 #0 value2 DATA1 #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetD0PID Set DATA0 PID 28 write-only SetD1PID 29 Set DATA1 PID 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DOEPCTL_ISOCONT Device Endpoint Control Register [ISOCONT] 0x200 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EO_FrNum Even/Odd Frame 16 read-only value1 Even frame #0 value2 Odd rame #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetEvenFr In non-Scatter/Gather DMA mode: Set Even frame 28 write-only SetOddFr Set Odd frame 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DOEPDMA Device Endpoint DMA Address Register 0x214 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DOEPDMAB Device Endpoint DMA Buffer Address Register 0x21C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DOEPINT Device Endpoint Interrupt Register 0x208 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write Back2BackSETup Back-to-Back SETUP Packets Received 6 read-write BbleErrIntrpt BbleErr (Babble Error) interrupt 12 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write NAKIntrpt NAK interrupt 13 read-write NYETIntrpt NYET interrupt 14 read-write OUTTknEPdis OUT Token Received When Endpoint Disabled 4 read-write PktDrpSts Packet Dropped Status 11 read-write SetUp SETUP Phase Done 3 read-write StsPhseRcvd Status Phase Received For Control Write 5 read-write XferCompl Transfer Completed Interrupt 0 read-write DOEPTSIZ_CONTROL Device Endpoint Transfer Size Register [CONT] DOEPTSIZ_ISO 0x210 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write SUPCnt SETUP Packet Count 29 1 read-write value1 1 packet #01 value2 2 packets #10 value3 3 packets #11 XferSize Transfer Size 0 18 read-write DOEPTSIZ_ISO Device Endpoint Transfer Size Register [ISO] 0x210 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write RxDPID Received Data PID 29 1 read-only value1 DATA0 #00 value2 DATA2 #01 value3 DATA1 #10 value4 MDATA #11 XferSize Transfer Size 0 18 read-write DTXFSTS Device IN Endpoint Transmit FIFO Status Register 0x18 32 read-write n 0x0 0x0 INEPTxFSpcAvail IN Endpoint TxFIFO Space Avail 0 15 read-only value1 Endpoint TxFIFO is full 0x0 value2 1 word available 0x1 value3 2 words available 0x2 USB0_EP2 Universal Serial Bus USB 0x0 0x0 0x400 registers n DIEPCTL_INTBULK Device Endpoint Control Register [INTBULK] DIEPCTL_ISOCONT 0x0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only DPID Endpoint Data PID 16 read-only value1 DATA0 #0 value2 DATA1 #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetD0PID Set DATA0 PID 28 write-only SetD1PID 29 Set DATA1 PID 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DIEPCTL_ISOCONT Device Endpoint Control Register [ISOCONT] 0x0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EO_FrNum Even/Odd Frame 16 read-only value1 Even frame #0 value2 Odd rame #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetEvenFr In non-Scatter/Gather DMA mode: Set Even frame 28 write-only SetOddFr Set Odd frame 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DIEPDMA Device Endpoint DMA Address Register 0x14 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DIEPDMAB Device Endpoint DMA Buffer Address Register 0x1C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DIEPINT Device Endpoint Interrupt Register 0x8 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write INEPNakEff IN Endpoint NAK Effective 6 read-write INTknTXFEmp IN Token Received When TxFIFO is Empty 4 read-write TimeOUT Timeout Condition 3 read-write TxFEmp Transmit FIFO Empty 7 read-only XferCompl Transfer Completed Interrupt 0 read-write DIEPTSIZ Device Endpoint Transfer Size Register 0x10 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write XferSize Transfer Size 0 18 read-write DOEPCTL_INTBULK Device Endpoint Control Register [INTBULK] DOEPCTL_ISOCONT 0x200 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only DPID Endpoint Data PID 16 read-only value1 DATA0 #0 value2 DATA1 #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetD0PID Set DATA0 PID 28 write-only SetD1PID 29 Set DATA1 PID 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DOEPCTL_ISOCONT Device Endpoint Control Register [ISOCONT] 0x200 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EO_FrNum Even/Odd Frame 16 read-only value1 Even frame #0 value2 Odd rame #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetEvenFr In non-Scatter/Gather DMA mode: Set Even frame 28 write-only SetOddFr Set Odd frame 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DOEPDMA Device Endpoint DMA Address Register 0x214 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DOEPDMAB Device Endpoint DMA Buffer Address Register 0x21C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DOEPINT Device Endpoint Interrupt Register 0x208 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write Back2BackSETup Back-to-Back SETUP Packets Received 6 read-write BbleErrIntrpt BbleErr (Babble Error) interrupt 12 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write NAKIntrpt NAK interrupt 13 read-write NYETIntrpt NYET interrupt 14 read-write OUTTknEPdis OUT Token Received When Endpoint Disabled 4 read-write PktDrpSts Packet Dropped Status 11 read-write SetUp SETUP Phase Done 3 read-write StsPhseRcvd Status Phase Received For Control Write 5 read-write XferCompl Transfer Completed Interrupt 0 read-write DOEPTSIZ_CONTROL Device Endpoint Transfer Size Register [CONT] DOEPTSIZ_ISO 0x210 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write SUPCnt SETUP Packet Count 29 1 read-write value1 1 packet #01 value2 2 packets #10 value3 3 packets #11 XferSize Transfer Size 0 18 read-write DOEPTSIZ_ISO Device Endpoint Transfer Size Register [ISO] 0x210 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write RxDPID Received Data PID 29 1 read-only value1 DATA0 #00 value2 DATA2 #01 value3 DATA1 #10 value4 MDATA #11 XferSize Transfer Size 0 18 read-write DTXFSTS Device IN Endpoint Transmit FIFO Status Register 0x18 32 read-write n 0x0 0x0 INEPTxFSpcAvail IN Endpoint TxFIFO Space Avail 0 15 read-only value1 Endpoint TxFIFO is full 0x0 value2 1 word available 0x1 value3 2 words available 0x2 USB0_EP3 Universal Serial Bus USB 0x0 0x0 0x400 registers n DIEPCTL_INTBULK Device Endpoint Control Register [INTBULK] DIEPCTL_ISOCONT 0x0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only DPID Endpoint Data PID 16 read-only value1 DATA0 #0 value2 DATA1 #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetD0PID Set DATA0 PID 28 write-only SetD1PID 29 Set DATA1 PID 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DIEPCTL_ISOCONT Device Endpoint Control Register [ISOCONT] 0x0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EO_FrNum Even/Odd Frame 16 read-only value1 Even frame #0 value2 Odd rame #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetEvenFr In non-Scatter/Gather DMA mode: Set Even frame 28 write-only SetOddFr Set Odd frame 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DIEPDMA Device Endpoint DMA Address Register 0x14 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DIEPDMAB Device Endpoint DMA Buffer Address Register 0x1C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DIEPINT Device Endpoint Interrupt Register 0x8 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write INEPNakEff IN Endpoint NAK Effective 6 read-write INTknTXFEmp IN Token Received When TxFIFO is Empty 4 read-write TimeOUT Timeout Condition 3 read-write TxFEmp Transmit FIFO Empty 7 read-only XferCompl Transfer Completed Interrupt 0 read-write DIEPTSIZ Device Endpoint Transfer Size Register 0x10 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write XferSize Transfer Size 0 18 read-write DOEPCTL_INTBULK Device Endpoint Control Register [INTBULK] DOEPCTL_ISOCONT 0x200 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only DPID Endpoint Data PID 16 read-only value1 DATA0 #0 value2 DATA1 #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetD0PID Set DATA0 PID 28 write-only SetD1PID 29 Set DATA1 PID 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DOEPCTL_ISOCONT Device Endpoint Control Register [ISOCONT] 0x200 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EO_FrNum Even/Odd Frame 16 read-only value1 Even frame #0 value2 Odd rame #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetEvenFr In non-Scatter/Gather DMA mode: Set Even frame 28 write-only SetOddFr Set Odd frame 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DOEPDMA Device Endpoint DMA Address Register 0x214 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DOEPDMAB Device Endpoint DMA Buffer Address Register 0x21C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DOEPINT Device Endpoint Interrupt Register 0x208 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write Back2BackSETup Back-to-Back SETUP Packets Received 6 read-write BbleErrIntrpt BbleErr (Babble Error) interrupt 12 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write NAKIntrpt NAK interrupt 13 read-write NYETIntrpt NYET interrupt 14 read-write OUTTknEPdis OUT Token Received When Endpoint Disabled 4 read-write PktDrpSts Packet Dropped Status 11 read-write SetUp SETUP Phase Done 3 read-write StsPhseRcvd Status Phase Received For Control Write 5 read-write XferCompl Transfer Completed Interrupt 0 read-write DOEPTSIZ_CONTROL Device Endpoint Transfer Size Register [CONT] DOEPTSIZ_ISO 0x210 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write SUPCnt SETUP Packet Count 29 1 read-write value1 1 packet #01 value2 2 packets #10 value3 3 packets #11 XferSize Transfer Size 0 18 read-write DOEPTSIZ_ISO Device Endpoint Transfer Size Register [ISO] 0x210 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write RxDPID Received Data PID 29 1 read-only value1 DATA0 #00 value2 DATA2 #01 value3 DATA1 #10 value4 MDATA #11 XferSize Transfer Size 0 18 read-write DTXFSTS Device IN Endpoint Transmit FIFO Status Register 0x18 32 read-write n 0x0 0x0 INEPTxFSpcAvail IN Endpoint TxFIFO Space Avail 0 15 read-only value1 Endpoint TxFIFO is full 0x0 value2 1 word available 0x1 value3 2 words available 0x2 USB0_EP4 Universal Serial Bus USB 0x0 0x0 0x400 registers n DIEPCTL_INTBULK Device Endpoint Control Register [INTBULK] DIEPCTL_ISOCONT 0x0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only DPID Endpoint Data PID 16 read-only value1 DATA0 #0 value2 DATA1 #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetD0PID Set DATA0 PID 28 write-only SetD1PID 29 Set DATA1 PID 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DIEPCTL_ISOCONT Device Endpoint Control Register [ISOCONT] 0x0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EO_FrNum Even/Odd Frame 16 read-only value1 Even frame #0 value2 Odd rame #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetEvenFr In non-Scatter/Gather DMA mode: Set Even frame 28 write-only SetOddFr Set Odd frame 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DIEPDMA Device Endpoint DMA Address Register 0x14 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DIEPDMAB Device Endpoint DMA Buffer Address Register 0x1C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DIEPINT Device Endpoint Interrupt Register 0x8 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write INEPNakEff IN Endpoint NAK Effective 6 read-write INTknTXFEmp IN Token Received When TxFIFO is Empty 4 read-write TimeOUT Timeout Condition 3 read-write TxFEmp Transmit FIFO Empty 7 read-only XferCompl Transfer Completed Interrupt 0 read-write DIEPTSIZ Device Endpoint Transfer Size Register 0x10 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write XferSize Transfer Size 0 18 read-write DOEPCTL_INTBULK Device Endpoint Control Register [INTBULK] DOEPCTL_ISOCONT 0x200 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only DPID Endpoint Data PID 16 read-only value1 DATA0 #0 value2 DATA1 #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetD0PID Set DATA0 PID 28 write-only SetD1PID 29 Set DATA1 PID 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DOEPCTL_ISOCONT Device Endpoint Control Register [ISOCONT] 0x200 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EO_FrNum Even/Odd Frame 16 read-only value1 Even frame #0 value2 Odd rame #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetEvenFr In non-Scatter/Gather DMA mode: Set Even frame 28 write-only SetOddFr Set Odd frame 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DOEPDMA Device Endpoint DMA Address Register 0x214 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DOEPDMAB Device Endpoint DMA Buffer Address Register 0x21C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DOEPINT Device Endpoint Interrupt Register 0x208 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write Back2BackSETup Back-to-Back SETUP Packets Received 6 read-write BbleErrIntrpt BbleErr (Babble Error) interrupt 12 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write NAKIntrpt NAK interrupt 13 read-write NYETIntrpt NYET interrupt 14 read-write OUTTknEPdis OUT Token Received When Endpoint Disabled 4 read-write PktDrpSts Packet Dropped Status 11 read-write SetUp SETUP Phase Done 3 read-write StsPhseRcvd Status Phase Received For Control Write 5 read-write XferCompl Transfer Completed Interrupt 0 read-write DOEPTSIZ_CONTROL Device Endpoint Transfer Size Register [CONT] DOEPTSIZ_ISO 0x210 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write SUPCnt SETUP Packet Count 29 1 read-write value1 1 packet #01 value2 2 packets #10 value3 3 packets #11 XferSize Transfer Size 0 18 read-write DOEPTSIZ_ISO Device Endpoint Transfer Size Register [ISO] 0x210 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write RxDPID Received Data PID 29 1 read-only value1 DATA0 #00 value2 DATA2 #01 value3 DATA1 #10 value4 MDATA #11 XferSize Transfer Size 0 18 read-write DTXFSTS Device IN Endpoint Transmit FIFO Status Register 0x18 32 read-write n 0x0 0x0 INEPTxFSpcAvail IN Endpoint TxFIFO Space Avail 0 15 read-only value1 Endpoint TxFIFO is full 0x0 value2 1 word available 0x1 value3 2 words available 0x2 USB0_EP5 Universal Serial Bus USB 0x0 0x0 0x400 registers n DIEPCTL_INTBULK Device Endpoint Control Register [INTBULK] DIEPCTL_ISOCONT 0x0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only DPID Endpoint Data PID 16 read-only value1 DATA0 #0 value2 DATA1 #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetD0PID Set DATA0 PID 28 write-only SetD1PID 29 Set DATA1 PID 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DIEPCTL_ISOCONT Device Endpoint Control Register [ISOCONT] 0x0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EO_FrNum Even/Odd Frame 16 read-only value1 Even frame #0 value2 Odd rame #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetEvenFr In non-Scatter/Gather DMA mode: Set Even frame 28 write-only SetOddFr Set Odd frame 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DIEPDMA Device Endpoint DMA Address Register 0x14 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DIEPDMAB Device Endpoint DMA Buffer Address Register 0x1C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DIEPINT Device Endpoint Interrupt Register 0x8 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write INEPNakEff IN Endpoint NAK Effective 6 read-write INTknTXFEmp IN Token Received When TxFIFO is Empty 4 read-write TimeOUT Timeout Condition 3 read-write TxFEmp Transmit FIFO Empty 7 read-only XferCompl Transfer Completed Interrupt 0 read-write DIEPTSIZ Device Endpoint Transfer Size Register 0x10 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write XferSize Transfer Size 0 18 read-write DOEPCTL_INTBULK Device Endpoint Control Register [INTBULK] DOEPCTL_ISOCONT 0x200 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only DPID Endpoint Data PID 16 read-only value1 DATA0 #0 value2 DATA1 #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetD0PID Set DATA0 PID 28 write-only SetD1PID 29 Set DATA1 PID 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DOEPCTL_ISOCONT Device Endpoint Control Register [ISOCONT] 0x200 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EO_FrNum Even/Odd Frame 16 read-only value1 Even frame #0 value2 Odd rame #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetEvenFr In non-Scatter/Gather DMA mode: Set Even frame 28 write-only SetOddFr Set Odd frame 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DOEPDMA Device Endpoint DMA Address Register 0x214 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DOEPDMAB Device Endpoint DMA Buffer Address Register 0x21C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DOEPINT Device Endpoint Interrupt Register 0x208 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write Back2BackSETup Back-to-Back SETUP Packets Received 6 read-write BbleErrIntrpt BbleErr (Babble Error) interrupt 12 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write NAKIntrpt NAK interrupt 13 read-write NYETIntrpt NYET interrupt 14 read-write OUTTknEPdis OUT Token Received When Endpoint Disabled 4 read-write PktDrpSts Packet Dropped Status 11 read-write SetUp SETUP Phase Done 3 read-write StsPhseRcvd Status Phase Received For Control Write 5 read-write XferCompl Transfer Completed Interrupt 0 read-write DOEPTSIZ_CONTROL Device Endpoint Transfer Size Register [CONT] DOEPTSIZ_ISO 0x210 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write SUPCnt SETUP Packet Count 29 1 read-write value1 1 packet #01 value2 2 packets #10 value3 3 packets #11 XferSize Transfer Size 0 18 read-write DOEPTSIZ_ISO Device Endpoint Transfer Size Register [ISO] 0x210 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write RxDPID Received Data PID 29 1 read-only value1 DATA0 #00 value2 DATA2 #01 value3 DATA1 #10 value4 MDATA #11 XferSize Transfer Size 0 18 read-write DTXFSTS Device IN Endpoint Transmit FIFO Status Register 0x18 32 read-write n 0x0 0x0 INEPTxFSpcAvail IN Endpoint TxFIFO Space Avail 0 15 read-only value1 Endpoint TxFIFO is full 0x0 value2 1 word available 0x1 value3 2 words available 0x2 USB0_EP6 Universal Serial Bus USB 0x0 0x0 0x400 registers n DIEPCTL_INTBULK Device Endpoint Control Register [INTBULK] DIEPCTL_ISOCONT 0x0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only DPID Endpoint Data PID 16 read-only value1 DATA0 #0 value2 DATA1 #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetD0PID Set DATA0 PID 28 write-only SetD1PID 29 Set DATA1 PID 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DIEPCTL_ISOCONT Device Endpoint Control Register [ISOCONT] 0x0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EO_FrNum Even/Odd Frame 16 read-only value1 Even frame #0 value2 Odd rame #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetEvenFr In non-Scatter/Gather DMA mode: Set Even frame 28 write-only SetOddFr Set Odd frame 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DIEPDMA Device Endpoint DMA Address Register 0x14 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DIEPDMAB Device Endpoint DMA Buffer Address Register 0x1C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DIEPINT Device Endpoint Interrupt Register 0x8 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write INEPNakEff IN Endpoint NAK Effective 6 read-write INTknTXFEmp IN Token Received When TxFIFO is Empty 4 read-write TimeOUT Timeout Condition 3 read-write TxFEmp Transmit FIFO Empty 7 read-only XferCompl Transfer Completed Interrupt 0 read-write DIEPTSIZ Device Endpoint Transfer Size Register 0x10 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write XferSize Transfer Size 0 18 read-write DOEPCTL_INTBULK Device Endpoint Control Register [INTBULK] DOEPCTL_ISOCONT 0x200 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only DPID Endpoint Data PID 16 read-only value1 DATA0 #0 value2 DATA1 #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetD0PID Set DATA0 PID 28 write-only SetD1PID 29 Set DATA1 PID 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DOEPCTL_ISOCONT Device Endpoint Control Register [ISOCONT] 0x200 32 read-write n 0x0 0x0 CNAK Clear NAK 26 write-only EO_FrNum Even/Odd Frame 16 read-only value1 Even frame #0 value2 Odd rame #1 EPDis Endpoint Disable 30 read-write EPEna Endpoint Enable 31 read-write EPType Endpoint Type 18 1 read-write value1 Control #00 value2 Isochronous #01 value3 Bulk #10 value4 Interrupt #11 MPS Maximum Packet Size 0 10 read-write NAKSts NAK Status 17 read-only value1 The core is transmitting non-NAK handshakes based on the FIFO status. #0 value2 The core is transmitting NAK handshakes on this endpoint. #1 SetEvenFr In non-Scatter/Gather DMA mode: Set Even frame 28 write-only SetOddFr Set Odd frame 29 write-only SNAK Set NAK 27 write-only Snp Snoop Mode 20 read-write Stall STALL Handshake 21 read-write TxFNum TxFIFO Number 22 3 read-write USBActEP USB Active Endpoint 15 read-write DOEPDMA Device Endpoint DMA Address Register 0x214 32 read-write n 0x0 0x0 modifyExternal DMAAddr DMA Address 0 31 read-write DOEPDMAB Device Endpoint DMA Buffer Address Register 0x21C 32 read-write n 0x0 0x0 DMABufferAddr DMA Buffer Address 0 31 read-only DOEPINT Device Endpoint Interrupt Register 0x208 32 read-write n 0x0 0x0 AHBErr AHB Error 2 read-write Back2BackSETup Back-to-Back SETUP Packets Received 6 read-write BbleErrIntrpt BbleErr (Babble Error) interrupt 12 read-write BNAIntr BNA (Buffer Not Available) Interrupt 9 read-write EPDisbld Endpoint Disabled Interrupt 1 read-write NAKIntrpt NAK interrupt 13 read-write NYETIntrpt NYET interrupt 14 read-write OUTTknEPdis OUT Token Received When Endpoint Disabled 4 read-write PktDrpSts Packet Dropped Status 11 read-write SetUp SETUP Phase Done 3 read-write StsPhseRcvd Status Phase Received For Control Write 5 read-write XferCompl Transfer Completed Interrupt 0 read-write DOEPTSIZ_CONTROL Device Endpoint Transfer Size Register [CONT] DOEPTSIZ_ISO 0x210 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write SUPCnt SETUP Packet Count 29 1 read-write value1 1 packet #01 value2 2 packets #10 value3 3 packets #11 XferSize Transfer Size 0 18 read-write DOEPTSIZ_ISO Device Endpoint Transfer Size Register [ISO] 0x210 32 read-write n 0x0 0x0 PktCnt Packet Count 19 9 read-write RxDPID Received Data PID 29 1 read-only value1 DATA0 #00 value2 DATA2 #01 value3 DATA1 #10 value4 MDATA #11 XferSize Transfer Size 0 18 read-write DTXFSTS Device IN Endpoint Transmit FIFO Status Register 0x18 32 read-write n 0x0 0x0 INEPTxFSpcAvail IN Endpoint TxFIFO Space Avail 0 15 read-only value1 Endpoint TxFIFO is full 0x0 value2 1 word available 0x1 value3 2 words available 0x2 USIC0 Universal Serial Interface Controller 0 USIC 0x0 0x0 0x4 registers n USIC0_0 Universal Serial Interface Channel (Module 0) 84 USIC0_1 Universal Serial Interface Channel (Module 0) 85 USIC0_2 Universal Serial Interface Channel (Module 0) 86 USIC0_3 Universal Serial Interface Channel (Module 0) 87 USIC0_4 Universal Serial Interface Channel (Module 0) 88 USIC0_5 Universal Serial Interface Channel (Module 0) 89 ID Module Identification Register 0x0 32 read-write n 0x0 0x0 MOD_NUMBER Module Number Value 16 15 read-only MOD_REV Module Revision Number 0 7 read-only MOD_TYPE Module Type 8 7 read-only USIC0_CH0 Universal Serial Interface Controller 0 USIC 0x0 0x0 0x200 registers n BRG Baud Rate Generator Register 0x14 32 read-write n 0x0 0x0 CLKSEL Clock Selection 0 1 read-write value1 The fractional divider frequency fFD is selected. #00 value3 The trigger signal DX1T defines fPIN. Signal MCLK toggles with fPIN. #10 value4 Signal MCLK corresponds to the DX1S signal and the frequency fPIN is derived from the rising edges of DX1S. #11 CTQSEL Input Selection for CTQ 6 1 read-write value1 fCTQIN = fPDIV #00 value2 fCTQIN = fPPP #01 value3 fCTQIN = fSCLK #10 value4 fCTQIN = fMCLK #11 DCTQ Denominator for Time Quanta Counter 10 4 read-write MCLKCFG Master Clock Configuration 29 read-write value1 The passive level is 0. #0 value2 The passive level is 1. #1 PCTQ Pre-Divider for Time Quanta Counter 8 1 read-write PDIV Divider Mode: Divider Factor to Generate fPDIV 16 9 read-write PPPEN Enable 2:1 Divider for fPPP 4 read-write value1 The 2:1 divider for fPPP is disabled. fPPP = fPIN #0 value2 The 2:1 divider for fPPP is enabled. fPPP = fMCLK = fPIN / 2. #1 SCLKCFG Shift Clock Output Configuration 30 1 read-write value1 The passive level is 0 and the delay is disabled. #00 value2 The passive level is 1 and the delay is disabled. #01 value3 The passive level is 0 and the delay is enabled. #10 value4 The passive level is 1 and the delay is enabled. #11 SCLKOSEL Shift Clock Output Select 28 read-write value1 SCLK from the baud rate generator is selected as the SCLKOUT input source. #0 value2 The transmit shift clock from DX1 input stage is selected as the SCLKOUT input source. #1 TMEN Timing Measurement Enable 3 read-write value1 Timing measurement is disabled: The trigger signals DX0T and DX1T are ignored. #0 value2 Timing measurement is enabled: The 10-bit counter is incremented by 1 with fPPP and stops counting when reaching its maximum value. If one of the trigger signals DX0T or DX1T become active, the counter value is captured into bit field CTV, the counter is cleared and a transmit shift event is generated. #1 BYP Bypass Data Register 0x100 32 read-write n 0x0 0x0 BDATA Bypass Data 0 15 read-write BYPCR Bypass Control Register 0x104 32 read-write n 0x0 0x0 BDEN Bypass Data Enable 10 1 read-write value1 The transfer of bypass data is disabled. #00 value2 The transfer of bypass data to TBUF is possible. Bypass data will be transferred to TBUF according to its priority if BDV = 1. #01 value3 Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 0. #10 value4 Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 1. #11 BDSSM Bypass Data Single Shot Mode 8 read-write value1 The bypass data is still considered as valid after it has been loaded into TBUF. The loading of the data into TBUF does not clear BDV. #0 value2 The bypass data is considered as invalid after it has been loaded into TBUF. The loading of the data into TBUF clears BDV. #1 BDV Bypass Data Valid 15 read-only value1 The bypass data is not valid. #0 value2 The bypass data is valid. #1 BDVTR Bypass Data Valid Trigger 12 read-write value1 Bit BDV is not influenced by DX2T. #0 value2 Bit BDV is set if DX2T is active. #1 BHPC Bypass Hardware Port Control 21 2 read-write BPRIO Bypass Priority 13 read-write value1 The transmit FIFO data has a higher priority than the bypass data. #0 value2 The bypass data has a higher priority than the transmit FIFO data. #1 BSELO Bypass Select Outputs 16 4 read-write BWLE Bypass Word Length 0 3 read-write CCFG Channel Configuration Register 0x4 32 read-write n 0x0 0x0 ASC ASC Protocol Available 1 read-only value1 The ASC protocol is not available. #0 value2 The ASC protocol is available. #1 IIC IIC Protocol Available 2 read-only value1 The IIC protocol is not available. #0 value2 The IIC protocol is available. #1 IIS IIS Protocol Available 3 read-only value1 The IIS protocol is not available. #0 value2 The IIS protocol is available. #1 RB Receive FIFO Buffer Available 6 read-only value1 A receive FIFO buffer is not available. #0 value2 A receive FIFO buffer is available. #1 SSC SSC Protocol Available 0 read-only value1 The SSC protocol is not available. #0 value2 The SSC protocol is available. #1 TB Transmit FIFO Buffer Available 7 read-only value1 A transmit FIFO buffer is not available. #0 value2 A transmit FIFO buffer is available. #1 CCR Channel Control Register 0x40 32 read-write n 0x0 0x0 AIEN Alternative Receive Interrupt Enable 15 read-write value1 The alternative receive interrupt is disabled. #0 value2 The alternative receive interrupt is enabled. In case of an alternative receive event, the service request output SRx indicated by INPR.AINP is activated. #1 BRGIEN Baud Rate Generator Interrupt Enable 16 read-write value1 The baud rate generator interrupt is disabled. #0 value2 The baud rate generator interrupt is enabled. In case of a baud rate generator event, the service request output SRx indicated by INPR.PINP is activated. #1 DLIEN Data Lost Interrupt Enable 11 read-write value1 The data lost interrupt is disabled. #0 value2 The data lost interrupt is enabled. In case of a data lost event, the service request output SRx indicated by INPR.PINP is activated. #1 HPCEN Hardware Port Control Enable 6 1 read-write value1 The hardware port control is disabled. #00 value2 The hardware port control is enabled for DX0 and DOUT0. #01 value3 The hardware port control is enabled for DX3, DX0 and DOUT[1:0]. #10 value4 The hardware port control is enabled for DX0, DX[5:3] and DOUT[3:0]. #11 MODE Operating Mode 0 3 read-write value1 The USIC channel is disabled. All protocol-related state machines are set to an idle state. 0x0 value2 The SSC (SPI) protocol is selected. 0x1 value3 The ASC (SCI, UART) protocol is selected. 0x2 value4 The IIS protocol is selected. 0x3 value5 The IIC protocol is selected. 0x4 PM Parity Mode 8 1 read-write value1 The parity generation is disabled. #00 value3 Even parity is selected (parity bit = 1 on odd number of 1s in data, parity bit = 0 on even number of 1s in data). #10 value4 Odd parity is selected (parity bit = 0 on odd number of 1s in data, parity bit = 1 on even number of 1s in data). #11 RIEN Receive Interrupt Enable 14 read-write value1 The receive interrupt is disabled. #0 value2 The receive interrupt is enabled. In case of a receive event, the service request output SRx indicated by INPR.RINP is activated. #1 RSIEN Receiver Start Interrupt Enable 10 read-write value1 The receiver start interrupt is disabled. #0 value2 The receiver start interrupt is enabled. In case of a receiver start event, the service request output SRx indicated by INPR.TBINP is activated. #1 TBIEN Transmit Buffer Interrupt Enable 13 read-write value1 The transmit buffer interrupt is disabled. #0 value2 The transmit buffer interrupt is enabled. In case of a transmit buffer event, the service request output SRx indicated by INPR.TBINP is activated. #1 TSIEN Transmit Shift Interrupt Enable 12 read-write value1 The transmit shift interrupt is disabled. #0 value2 The transmit shift interrupt is enabled. In case of a transmit shift interrupt event, the service request output SRx indicated by INPR.TSINP is activated. #1 CMTR Capture Mode Timer Register 0x44 32 read-write n 0x0 0x0 CTV Captured Timer Value 0 9 read-write DX0CR Input Control Register 0 0x1C 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX1CR Input Control Register 1 0x20 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DX1T. #01 value3 A falling edge activates DX1T. #10 value4 Both edges activate DX1T. #11 DCEN Delay Compensation Enable 3 read-write value1 The receive shift clock is dependent on INSW selection. #0 value2 The receive shift clock is connected to the selected data input line. This setting is used if delay compensation is required in SSC and IIS protocols, else DCEN should always be 0. #1 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DX1A is selected. #000 value2 The data input DX1B is selected. #001 value3 The data input DX1C is selected. #010 value4 The data input DX1D is selected. #011 value5 The data input DX1E is selected. #100 value6 The data input DX1F is selected. #101 value7 The data input DX1G is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DX1S is 0. #0 value2 The current value of DX1S is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX2CR Input Control Register 2 0x24 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX3CR Input Control Register 3 0x28 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX4CR Input Control Register 4 0x2C 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX5CR Input Control Register 5 0x30 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 FDR Fractional Divider Register 0x10 32 read-write n 0x0 0x0 DM Divider Mode 14 1 read-write value1 The divider is switched off, fFD = 0. #00 value2 Normal divider mode selected. #01 value3 Fractional divider mode selected. #10 value4 The divider is switched off, fFD = 0. #11 RESULT Result Value 16 9 read-only STEP Step Value 0 9 read-write FMR Flag Modification Register 0x68 32 read-write n 0x0 0x0 ATVC Activate Bit TVC 4 write-only value1 No action. #0 value2 Bit TCSR.TVC is set. #1 CRDV0 Clear Bits RDV for RBUF0 14 write-only value1 No action. #0 value2 Bits RBUF01SR.RDV00 and RBUF01SR.RDV10 are cleared. #1 CRDV1 Clear Bit RDV for RBUF1 15 write-only value1 No action. #0 value2 Bits RBUF01SR.RDV01 and RBUF01SR.RDV11 are cleared. #1 MTDV Modify Transmit Data Valid 0 1 write-only value1 No action. #00 value2 Bit TDV is set, TE is unchanged. #01 value3 Bits TDV and TE are cleared. #10 SIO0 Set Interrupt Output SRx 16 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO1 Set Interrupt Output SRx 17 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO2 Set Interrupt Output SRx 18 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO3 Set Interrupt Output SRx 19 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO4 Set Interrupt Output SRx 20 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO5 Set Interrupt Output SRx 21 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 INPR Interrupt Node Pointer Register 0x18 32 read-write n 0x0 0x0 AINP Alternative Receive Interrupt Node Pointer 12 2 read-write PINP Transmit Shift Interrupt Node Pointer 16 2 read-write RINP Receive Interrupt Node Pointer 8 2 read-write TBINP Transmit Buffer Interrupt Node Pointer 4 2 read-write TSINP Transmit Shift Interrupt Node Pointer 0 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 IN[0] Transmit FIFO Buffer 0x300 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[10] Transmit FIFO Buffer 0x12DC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[11] Transmit FIFO Buffer 0x1488 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[12] Transmit FIFO Buffer 0x1638 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[13] Transmit FIFO Buffer 0x17EC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[14] Transmit FIFO Buffer 0x19A4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[15] Transmit FIFO Buffer 0x1B60 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[16] Transmit FIFO Buffer 0x1D20 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[17] Transmit FIFO Buffer 0x1EE4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[18] Transmit FIFO Buffer 0x20AC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[19] Transmit FIFO Buffer 0x2278 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[1] Transmit FIFO Buffer 0x484 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[20] Transmit FIFO Buffer 0x2448 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[21] Transmit FIFO Buffer 0x261C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[22] Transmit FIFO Buffer 0x27F4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[23] Transmit FIFO Buffer 0x29D0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[24] Transmit FIFO Buffer 0x2BB0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[25] Transmit FIFO Buffer 0x2D94 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[26] Transmit FIFO Buffer 0x2F7C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[27] Transmit FIFO Buffer 0x3168 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[28] Transmit FIFO Buffer 0x3358 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[29] Transmit FIFO Buffer 0x354C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[2] Transmit FIFO Buffer 0x60C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[30] Transmit FIFO Buffer 0x3744 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[31] Transmit FIFO Buffer 0x3940 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[3] Transmit FIFO Buffer 0x798 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[4] Transmit FIFO Buffer 0x928 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[5] Transmit FIFO Buffer 0xABC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[6] Transmit FIFO Buffer 0xC54 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[7] Transmit FIFO Buffer 0xDF0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[8] Transmit FIFO Buffer 0xF90 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[9] Transmit FIFO Buffer 0x1134 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only KSCFG Kernel State Configuration Register 0xC 32 read-write n 0x0 0x0 BPMODEN Bit Protection for MODEN 1 write-only value1 MODEN is not changed. #0 value2 MODEN is updated with the written value. #1 BPNOM Bit Protection for NOMCFG 7 write-only value1 NOMCFG is not changed. #0 value2 NOMCFG is updated with the written value. #1 BPSUM Bit Protection for SUMCFG 11 write-only value1 SUMCFG is not changed. #0 value2 SUMCFG is updated with the written value. #1 MODEN Module Enable 0 read-write value1 The module is switched off immediately (without respecting a stop condition). It does not react on mode control actions and the module clock is switched off. The module does not react on read accesses and ignores write accesses (except to KSCFG). #0 value2 The module is switched on and can operate. After writing 1 to MODEN, it is recommended to read register KSCFG to avoid pipeline effects in the control block before accessing other Service Request Processing registers. #1 NOMCFG Normal Operation Mode Configuration 4 1 read-write value1 Run mode 0 is selected. #00 value2 Run mode 1 is selected. #01 value3 Stop mode 0 is selected. #10 value4 Stop mode 1 is selected. #11 SUMCFG Suspend Mode Configuration 8 1 read-write OUTDR Receiver Buffer Output Register L for Debugger 0x120 32 read-write n 0x0 0x0 DSR Data from Shift Register 0 15 read-only RCI Receive Control Information from Shift Register 16 4 read-only OUTR Receiver Buffer Output Register 0x11C 32 read-write n 0x0 0x0 modifyExternal DSR Received Data 0 15 read-only RCI Receiver Control Information 16 4 read-only PCR Protocol Control Register 0x3C 32 read-write n 0x0 0x0 CTR0 Protocol Control Bit 0 0 read-write CTR1 Protocol Control Bit 1 1 read-write CTR10 Protocol Control Bit 10 10 read-write CTR11 Protocol Control Bit 11 11 read-write CTR12 Protocol Control Bit 12 12 read-write CTR13 Protocol Control Bit 13 13 read-write CTR14 Protocol Control Bit 14 14 read-write CTR15 Protocol Control Bit 15 15 read-write CTR16 Protocol Control Bit 16 16 read-write CTR17 Protocol Control Bit 17 17 read-write CTR18 Protocol Control Bit 18 18 read-write CTR19 Protocol Control Bit 19 19 read-write CTR2 Protocol Control Bit 2 2 read-write CTR20 Protocol Control Bit 20 20 read-write CTR21 Protocol Control Bit 21 21 read-write CTR22 Protocol Control Bit 22 22 read-write CTR23 Protocol Control Bit 23 23 read-write CTR24 Protocol Control Bit 24 24 read-write CTR25 Protocol Control Bit 25 25 read-write CTR26 Protocol Control Bit 26 26 read-write CTR27 Protocol Control Bit 27 27 read-write CTR28 Protocol Control Bit 28 28 read-write CTR29 Protocol Control Bit 29 29 read-write CTR3 Protocol Control Bit 3 3 read-write CTR30 Protocol Control Bit 30 30 read-write CTR31 Protocol Control Bit 31 31 read-write CTR4 Protocol Control Bit 4 4 read-write CTR5 Protocol Control Bit 5 5 read-write CTR6 Protocol Control Bit 6 6 read-write CTR7 Protocol Control Bit 7 7 read-write CTR8 Protocol Control Bit 8 8 read-write CTR9 Protocol Control Bit 9 9 read-write PCR_ASCMode Protocol Control Register [ASC Mode] PCR 0x3C 32 read-write n 0x0 0x0 CDEN Collision Detection Enable 4 read-write value1 The collision detection is disabled. #0 value2 If a collision is detected, the transmitter stops its data transmission, outputs a 1, sets bit PSR.COL and generates a protocol interrupt. In order to allow data transmission again, PSR.COL has to be cleared by software. #1 FEIEN Format Error Interrupt Enable 6 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 FFIEN Frame Finished Interrupt Enable 7 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 IDM Idle Detection Mode 2 read-write value1 The bus idle detection is switched off and bits PSR.TXIDLE and PSR.RXIDLE are set automatically to enable data transfers without checking the inputs before. #0 value2 The bus is considered as idle after a number of consecutive passive bit times defined by SCTR.FLE plus 2 (in the case without parity bit) or plus 3 (in the case with parity bit). #1 MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and the MCLK signal is 0. #0 value2 The MCLK generation is enabled. #1 PL Pulse Length 13 2 read-write value1 The pulse length is equal to the bit length (no shortened 0). #000 value2 The pulse length of a 0 bit is 2 time quanta. #001 value3 The pulse length of a 0 bit is 3 time quanta. #010 value4 The pulse length of a 0 bit is 8 time quanta. #111 RNIEN Receiver Noise Detection Interrupt Enable 5 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 RSTEN Receiver Status Enable 16 read-write value1 Flag PSR[9] is not modified depending on the receiver status. #0 value2 Flag PSR[9] is set during the complete reception of a frame. #1 SBIEN Synchronization Break Interrupt Enable 3 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 SMD Sample Mode 0 read-write value1 Only one sample is taken per bit time. The current input value is sampled. #0 value2 Three samples are taken per bit time and a majority decision is made. #1 SP Sample Point 8 4 read-write STPB Stop Bits 1 read-write value1 The number of stop bits is 1. #0 value2 The number of stop bits is 2. #1 TSTEN Transmitter Status Enable 17 read-write value1 Flag PSR[9] is not modified depending on the transmitter status. #0 value2 Flag PSR[9] is set during the complete transmission of a frame. #1 PCR_IICMode Protocol Control Register [IIC Mode] PCR 0x3C 32 read-write n 0x0 0x0 ACK00 Acknowledge 00H 16 read-write value1 The slave device is not sensitive to this address. #0 value2 The slave device is sensitive to this address. #1 ACKIEN Acknowledge Interrupt Enable 30 read-write value1 The acknowledge interrupt is disabled. #0 value2 The acknowledge interrupt is enabled. #1 ARLIEN Arbitration Lost Interrupt Enable 22 read-write value1 The arbitration lost interrupt is disabled. #0 value2 The arbitration lost interrupt is enabled. #1 ERRIEN Error Interrupt Enable 24 read-write value1 The error interrupt is disabled. #0 value2 The error interrupt is enabled. #1 HDEL Hardware Delay 26 3 read-write MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and MCLK is 0. #0 value2 The MCLK generation is enabled. #1 NACKIEN Non-Acknowledge Interrupt Enable 21 read-write value1 The non-acknowledge interrupt is disabled. #0 value2 The non-acknowledge interrupt is enabled. #1 PCRIEN Stop Condition Received Interrupt Enable 20 read-write value1 The stop condition interrupt is disabled. #0 value2 The stop condition interrupt is enabled. #1 RSCRIEN Repeated Start Condition Received Interrupt Enable 19 read-write value1 The repeated start condition interrupt is disabled. #0 value2 The repeated start condition interrupt is enabled. #1 SACKDIS Slave Acknowledge Disable 25 read-write value1 The generation of an active slave acknowledge is enabled (slave acknowledge with 0 level = more bytes can be received). #0 value2 The generation of an active slave acknowledge is disabled (slave acknowledge with 1 level = reception stopped). #1 SCRIEN Start Condition Received Interrupt Enable 18 read-write value1 The start condition interrupt is disabled. #0 value2 The start condition interrupt is enabled. #1 SLAD Slave Address 0 15 read-write SRRIEN Slave Read Request Interrupt Enable 23 read-write value1 The slave read request interrupt is disabled. #0 value2 The slave read request interrupt is enabled. #1 STIM Symbol Timing 17 read-write value1 A symbol contains 10 time quanta. The timing is adapted for standard mode (100 kBaud). #0 value2 A symbol contains 25 time quanta. The timing is adapted for fast mode (400 kBaud). #1 PCR_IISMode Protocol Control Register [IIS Mode] PCR 0x3C 32 read-write n 0x0 0x0 DTEN Data Transfers Enable 1 read-write value1 The changes of the WA input signal are ignored and no transfers take place. #0 value2 Transfers are enabled. #1 DX2TIEN DX2T Interrupt Enable 15 read-write value1 A protocol interrupt is not generated if DX2T is active. #0 value2 A protocol interrupt is generated if DX2T is active. #1 ENDIEN END Interrupt Enable 6 read-write value1 A protocol interrupt is not activated. #0 value2 A protocol interrupt is activated. #1 MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and MCLK is 0. #0 value2 The MCLK generation is enabled. #1 SELINV Select Inversion 2 read-write value1 The SELOx outputs have the same polarity as the WA signal. #0 value2 The SELOx outputs have the inverted polarity to the WA signal. #1 TDEL Transfer Delay 16 5 read-write WAFEIEN WA Falling Edge Interrupt Enable 4 read-write value1 A protocol interrupt is not activated if a falling edge of WA is generated. #0 value2 A protocol interrupt is activated if a falling edge of WA is generated. #1 WAGEN WA Generation Enable 0 read-write value1 The IIS can be used as slave. The generation of the word address signal is disabled. The output signal WA is 0. The MCLKO signal generation depends on PCR.MCLK. #0 value2 The IIS can be used as master. The generation of the word address signal is enabled. The signal starts with a 0 after being enabled. The generation of MCLK is enabled, independent of PCR.MCLK. After clearing WAGEN, the USIC module stops the generation of the WA signal within the next 4 WA periods. #1 WAREIEN WA Rising Edge Interrupt Enable 5 read-write value1 A protocol interrupt is not activated if a rising edge of WA is generated. #0 value2 A protocol interrupt is activated if a rising edge of WA is generated. #1 PCR_SSCMode Protocol Control Register [SSC Mode] PCR 0x3C 32 read-write n 0x0 0x0 CTQSEL1 Input Frequency Selection 4 1 read-write value1 fCTQIN = fPDIV #00 value2 fCTQIN = fPPP #01 value3 fCTQIN = fSCLK #10 value4 fCTQIN = fMCLK #11 DCTQ1 Divider Factor DCTQ1 for Tiw and Tnf 8 4 read-write DX2TIEN DX2T Interrupt Enable 15 read-write value1 A protocol interrupt is not generated if DX2T is activated. #0 value2 A protocol interrupt is generated if DX2T is activated. #1 FEM Frame End Mode 3 read-write value1 The current data frame is considered as finished when the last bit of a data word has been sent out and the transmit buffer TBUF does not contain new data (TDV = 0). #0 value2 The MSLS signal is kept active also while no new data is available and no other end of frame condition is reached. In this case, the software can accept delays in delivering the data without automatic deactivation of MSLS in multi-word data frames. #1 MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and output MCLK = 0. #0 value2 The MCLK generation is enabled. #1 MSLSEN MSLS Enable 0 read-write value1 The MSLS generation is disabled (MSLS = 0). This is the setting for SSC slave mode. #0 value2 The MSLS generation is enabled. This is the setting for SSC master mode. #1 MSLSIEN MSLS Interrupt Enable 14 read-write value1 A protocol interrupt is not generated if a change of signal MSLS is detected. #0 value2 A protocol interrupt is generated if a change of signal MSLS is detected. #1 PARIEN Parity Error Interrupt Enable 13 read-write value1 A protocol interrupt is not generated with the detection of a parity error. #0 value2 A protocol interrupt is generated with the detection of a parity error. #1 PCTQ1 Divider Factor PCTQ1 for Tiw and Tnf 6 1 read-write SELCTR Select Control 1 read-write value1 The coded select mode is enabled. #0 value2 The direct select mode is enabled. #1 SELINV Select Inversion 2 read-write value1 The SELO outputs have the same polarity as the MSLS signal (active high). #0 value2 The SELO outputs have the inverted polarity to the MSLS signal (active low). #1 SELO Select Output 16 7 read-write value1 The corresponding SELOx line cannot be activated. #0 value2 The corresponding SELOx line can be activated (according to the mode selected by SELCTR). #1 SLPHSEL Slave Mode Clock Phase Select 25 read-write value1 Data bits are shifted out with the leading edge of the shift clock signal and latched in with the trailing edge. 0b0 value2 The first data bit is shifted out when the data shift unit receives a low to high transition from the DX2 stage. Subsequent bits are shifted out with the trailing edge of the shift clock signal. Data bits are always latched in with the leading edge. 0b1 TIWEN Enable Inter-Word Delay Tiw 24 read-write value1 No delay between data words of the same frame. #0 value2 The inter-word delay Tiw is enabled and introduced between data words of the same frame. #1 PSCR Protocol Status Clear Register 0x4C 32 read-write n 0x0 0x0 CAIF Clear Alternative Receive Indication Flag 15 write-only value1 No action #0 value2 Flag PSR.AIF is cleared. #1 CBRGIF Clear Baud Rate Generator Indication Flag 16 write-only value1 No action #0 value2 Flag PSR.BRGIF is cleared. #1 CDLIF Clear Data Lost Indication Flag 11 write-only value1 No action #0 value2 Flag PSR.DLIF is cleared. #1 CRIF Clear Receive Indication Flag 14 write-only value1 No action #0 value2 Flag PSR.RIF is cleared. #1 CRSIF Clear Receiver Start Indication Flag 10 write-only value1 No action #0 value2 Flag PSR.RSIF is cleared. #1 CST0 Clear Status Flag 0 in PSR 0 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST1 Clear Status Flag 1 in PSR 1 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST2 Clear Status Flag 2 in PSR 2 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST3 Clear Status Flag 3 in PSR 3 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST4 Clear Status Flag 4 in PSR 4 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST5 Clear Status Flag 5 in PSR 5 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST6 Clear Status Flag 6 in PSR 6 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST7 Clear Status Flag 7 in PSR 7 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST8 Clear Status Flag 8 in PSR 8 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST9 Clear Status Flag 9 in PSR 9 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CTBIF Clear Transmit Buffer Indication Flag 13 write-only value1 No action #0 value2 Flag PSR.TBIF is cleared. #1 CTSIF Clear Transmit Shift Indication Flag 12 write-only value1 No action #0 value2 Flag PSR.TSIF is cleared. #1 PSR Protocol Status Register 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 ST0 Protocol Status Flag 0 0 read-write ST1 Protocol Status Flag 1 1 read-write ST2 Protocol Status Flag 2 2 read-write ST3 Protocol Status Flag 3 3 read-write ST4 Protocol Status Flag 4 4 read-write ST5 Protocol Status Flag 5 5 read-write ST6 Protocol Status Flag 6 6 read-write ST7 Protocol Status Flag 7 7 read-write ST8 Protocol Status Flag 8 8 read-write ST9 Protocol Status Flag 9 9 read-write TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 PSR_ASCMode Protocol Status Register [ASC Mode] PSR 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 BUSY Transfer Status BUSY 9 read-only value1 A data transfer does not take place. #0 value2 A data transfer currently takes place. #1 COL Collision Detected 3 read-write value1 A collision has not yet been detected and frame transmission is possible. #0 value2 A collision has been detected and frame transmission is not possible. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 FER0 Format Error in Stop Bit 0 5 read-write value1 A format error 0 has not been detected. #0 value2 A format error 0 has been detected. #1 FER1 Format Error in Stop Bit 1 6 read-write value1 A format error 1 has not been detected. #0 value2 A format error 1 has been detected. #1 RFF Receive Frame Finished 7 read-write value1 The received frame is not yet finished. #0 value2 The received frame is finished. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RNS Receiver Noise Detected 4 read-write value1 Receiver noise has not been detected. #0 value2 Receiver noise has been detected. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 RXIDLE Reception Idle 1 read-write value1 The receiver line has not yet been idle. #0 value2 The receiver line has been idle and frame reception is possible. #1 SBD Synchronization Break Detected 2 read-write value1 A synchronization break has not yet been detected. #0 value2 A synchronization break has been detected. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TFF Transmitter Frame Finished 8 read-write value1 The transmitter frame is not yet finished. #0 value2 The transmitter frame is finished. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 TXIDLE Transmission Idle 0 read-write value1 The transmitter line has not yet been idle. #0 value2 The transmitter line has been idle and frame transmission is possible. #1 PSR_IICMode Protocol Status Register [IIC Mode] PSR 0x48 32 read-write n 0x0 0x0 ACK Acknowledge Received 9 read-write value1 An acknowledge has not been received. #0 value2 An acknowledge has been received. #1 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 ARL Arbitration Lost 6 read-write value1 An arbitration has not been lost. #0 value2 An arbitration has been lost. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 ERR Error 8 read-write value1 An IIC error has not been detected. #0 value2 An IIC error has been detected. #1 NACK Non-Acknowledge Received 5 read-write value1 A non-acknowledge has not been received. #0 value2 A non-acknowledge has been received. #1 PCR Stop Condition Received 4 read-write value1 A stop condition has not yet been detected. #0 value2 A stop condition has been detected. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSCR Repeated Start Condition Received 3 read-write value1 A repeated start condition has not yet been detected. #0 value2 A repeated start condition has been detected. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 SCR Start Condition Received 2 read-write value1 A start condition has not yet been detected. #0 value2 A start condition has been detected. #1 SLSEL Slave Select 0 read-write value1 The device is not selected as slave. #0 value2 The device is selected as slave. #1 SRR Slave Read Request 7 read-write value1 A slave read request has not been detected. #0 value2 A slave read request has been detected. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 WTDF Wrong TDF Code Found 1 read-write value1 A wrong TDF code has not been found. #0 value2 A wrong TDF code has been found. #1 PSR_IISMode Protocol Status Register [IIS Mode] PSR 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 DX2S DX2S Status 1 read-write value1 DX2S is 0. #0 value2 DX2S is 1. #1 DX2TEV DX2T Event Detected 3 read-write value1 The DX2T signal has not been activated. #0 value2 The DX2T signal has been activated. #1 END WA Generation End 6 read-write value1 The WA generation has not yet ended (if it is running and WAGEN has been cleared). #0 value2 The WA generation has ended (if it has been running). #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 WA Word Address 0 read-write value1 WA has been sampled 0. #0 value2 WA has been sampled 1. #1 WAFE WA Falling Edge Event 4 read-write value1 A WA falling edge has not been generated. #0 value2 A WA falling edge has been generated. #1 WARE WA Rising Edge Event 5 read-write value1 A WA rising edge has not been generated. #0 value2 A WA rising edge has been generated. #1 PSR_SSCMode Protocol Status Register [SSC Mode] PSR 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 DX2S DX2S Status 1 read-write value1 DX2S is 0. #0 value2 DX2S is 1. #1 DX2TEV DX2T Event Detected 3 read-write value1 The DX2T signal has not been activated. #0 value2 The DX2T signal has been activated. #1 MSLS MSLS Status 0 read-write value1 The internal signal MSLS is inactive (0). #0 value2 The internal signal MSLS is active (1). #1 MSLSEV MSLS Event Detected 2 read-write value1 The MSLS signal has not changed its state. #0 value2 The MSLS signal has changed its state. #1 PARERR Parity Error Event Detected 4 read-write value1 A parity error event has not been activated. #0 value2 A parity error event has been activated. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 RBCTR Receiver Buffer Control Register 0x10C 32 read-write n 0x0 0x0 ARBIEN Alternative Receive Buffer Interrupt Enable 29 read-write value1 The alternative receive buffer interrupt generation is disabled. #0 value2 The alternative receive buffer interrupt generation is enabled. #1 ARBINP Alternative Receive Buffer Interrupt Node Pointer 19 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 DPTR Data Pointer 0 5 write-only LIMIT Limit For Interrupt Generation 8 5 read-write LOF Buffer Event on Limit Overflow 28 read-write value1 A standard receive buffer event occurs when the filling level equals the limit value and gets lower due to a read access from OUTR. #0 value2 A standard receive buffer event occurs when the filling level equals the limit value and gets bigger due to the reception of a new data word. #1 RBERIEN Receive Buffer Error Interrupt Enable 31 read-write value1 The receive buffer error interrupt generation is disabled. #0 value2 The receive buffer error interrupt generation is enabled. #1 RCIM Receiver Control Information Mode 22 1 read-write value1 RCI[4] = PERR, RCI[3:0] = WLEN #00 value2 RCI[4] = SOF, RCI[3:0] = WLEN #01 value3 RCI[4] = 0, RCI[3:0] = WLEN #10 value4 RCI[4] = PERR, RCI[3] = PAR, RCI[2:1] = 00B, RCI[0] = SOF #11 RNM Receiver Notification Mode 27 read-write value1 Filling level mode: A standard receive buffer event occurs when the filling level equals the limit value and changes, either due to a read access from OUTR (LOF = 0) or due to a new received data word (LOF = 1). #0 value2 RCI mode: A standard receive buffer event occurs when register OUTR is updated with a new value if the corresponding value in OUTR.RCI[4] = 0. If OUTR.RCI[4] = 1, an alternative receive buffer event occurs instead of the standard receive buffer event. #1 SIZE Buffer Size 24 2 read-write value1 The FIFO mechanism is disabled. The buffer does not accept any request for data. #000 value2 The FIFO buffer contains 2 entries. #001 value3 The FIFO buffer contains 4 entries. #010 value4 The FIFO buffer contains 8 entries. #011 value5 The FIFO buffer contains 16 entries. #100 value6 The FIFO buffer contains 32 entries. #101 value7 The FIFO buffer contains 64 entries. #110 SRBIEN Standard Receive Buffer Interrupt Enable 30 read-write value1 The standard receive buffer interrupt generation is disabled. #0 value2 The standard receive buffer interrupt generation is enabled. #1 SRBINP Standard Receive Buffer Interrupt Node Pointer 16 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 SRBTEN Standard Receive Buffer Trigger Enable 15 read-write value1 The standard receive buffer event trigger through bit TRBSR.SRBT is disabled. #0 value2 The standard receive buffer event trigger through bit TRBSR.SRBT is enabled. #1 SRBTM Standard Receive Buffer Trigger Mode 14 read-write value1 Trigger mode 0: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=RBCTR.LIMIT. #0 value2 Trigger mode 1: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=0. #1 RBUF Receiver Buffer Register 0x54 32 read-write n 0x0 0x0 modifyExternal DSR Received Data 0 15 read-only RBUF0 Receiver Buffer Register 0 0x5C 32 read-write n 0x0 0x0 DSR0 Data of Shift Registers 0[3:0] 0 15 read-only RBUF01SR Receiver Buffer 01 Status Register 0x64 32 read-write n 0x0 0x0 DS0 Data Source 15 read-only value1 The register RBUF contains the data of RBUF0 (same for associated status information). #0 value2 The register RBUF contains the data of RBUF1 (same for associated status information). #1 DS1 Data Source 31 read-only value1 The register RBUF contains the data of RBUF0 (same for associated status information). #0 value2 The register RBUF contains the data of RBUF1 (same for associated status information). #1 PAR0 Protocol-Related Argument in RBUF0 8 read-only PAR1 Protocol-Related Argument in RBUF1 24 read-only PERR0 Protocol-related Error in RBUF0 9 read-only value1 The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt. #0 value2 The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt. #1 PERR1 Protocol-related Error in RBUF1 25 read-only value1 The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt. #0 value2 The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt. #1 RDV00 Receive Data Valid in RBUF0 13 read-only value1 Register RBUF0 does not contain data that has not yet been read out. #0 value2 Register RBUF0 contains data that has not yet been read out. #1 RDV01 Receive Data Valid in RBUF1 14 read-only value1 Register RBUF1 does not contain data that has not yet been read out. #0 value2 Register RBUF1 contains data that has not yet been read out. #1 RDV10 Receive Data Valid in RBUF0 29 read-only value1 Register RBUF0 does not contain data that has not yet been read out. #0 value2 Register RBUF0 contains data that has not yet been read out. #1 RDV11 Receive Data Valid in RBUF1 30 read-only value1 Register RBUF1 does not contain data that has not yet been read out. #0 value2 Register RBUF1 contains data that has not yet been read out. #1 SOF0 Start of Frame in RBUF0 6 read-only value1 The data in RBUF0 has not been the first data word of a data frame. #0 value2 The data in RBUF0 has been the first data word of a data frame. #1 SOF1 Start of Frame in RBUF1 22 read-only value1 The data in RBUF1 has not been the first data word of a data frame. #0 value2 The data in RBUF1 has been the first data word of a data frame. #1 WLEN0 Received Data Word Length in RBUF0 0 3 read-only WLEN1 Received Data Word Length in RBUF1 16 3 read-only value1 One bit has been received. 0x0 value2 Sixteen bits have been received. 0xF RBUF1 Receiver Buffer Register 1 0x60 32 read-write n 0x0 0x0 DSR1 Data of Shift Registers 1[3:0] 0 15 read-only RBUFD Receiver Buffer Register for Debugger 0x58 32 read-write n 0x0 0x0 DSR Data from Shift Register 0 15 read-only RBUFSR Receiver Buffer Status Register 0x50 32 read-write n 0x0 0x0 DS Data Source of RBUF or RBUFD 15 read-only PAR Protocol-Related Argument in RBUF or RBUFD 8 read-only PERR Protocol-related Error in RBUF or RBUFD 9 read-only RDV0 Receive Data Valid in RBUF or RBUFD 13 read-only RDV1 Receive Data Valid in RBUF or RBUFD 14 read-only SOF Start of Frame in RBUF or RBUFD 6 read-only WLEN Received Data Word Length in RBUF or RBUFD 0 3 read-only SCTR Shift Control Register 0x34 32 read-write n 0x0 0x0 DOCFG Data Output Configuration 6 1 read-write value1 DOUTx = shift data value #00 value2 DOUTx = inverted shift data value #01 DSM Data Shift Mode 2 1 read-write value1 Receive and transmit data is shifted in and out one bit at a time through DX0 and DOUT0. #00 value3 Receive and transmit data is shifted in and out two bits at a time through two input stages (DX0 and DX3) and DOUT[1:0] respectively. #10 value4 Receive and transmit data is shifted in and out four bits at a time through four input stages (DX0, DX[5:3]) and DOUT[3:0] respectively. #11 FLE Frame Length 16 5 read-write HPCDIR Port Control Direction 4 read-write value1 The pin(s) with hardware pin control enabled are selected to be in input mode. #0 value2 The pin(s) with hardware pin control enabled are selected to be in output mode. #1 PDL Passive Data Level 1 read-write value1 The passive data level is 0. #0 value2 The passive data level is 1. #1 SDIR Shift Direction 0 read-write value1 Shift LSB first. The first data bit of a data word is located at bit position 0. #0 value2 Shift MSB first. The first data bit of a data word is located at the bit position given by bit field SCTR.WLE. #1 TRM Transmission Mode 8 1 read-write value1 The shift control signal is considered as inactive and data frame transfers are not possible. #00 value2 The shift control signal is considered active if it is at 1-level. This is the setting to be programmed to allow data transfers. #01 value3 The shift control signal is considered active if it is at 0-level. It is recommended to avoid this setting and to use the inversion in the DX2 stage in case of a low-active signal. #10 value4 The shift control signal is considered active without referring to the actual signal level. Data frame transfer is possible after each edge of the signal. #11 WLE Word Length 24 3 read-write value1 The data word contains 1 data bit located at bit position 0. 0x0 value2 The data word contains 2 data bits located at bit positions [1:0]. 0x1 value3 The data word contains 15 data bits located at bit positions [14:0]. 0xE value4 The data word contains 16 data bits located at bit positions [15:0]. 0xF TBCTR Transmitter Buffer Control Register 0x108 32 read-write n 0x0 0x0 ATBINP Alternative Transmit Buffer Interrupt Node Pointer 19 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 DPTR Data Pointer 0 5 write-only LIMIT Limit For Interrupt Generation 8 5 read-write LOF Buffer Event on Limit Overflow 28 read-write value1 A standard transmit buffer event occurs when the filling level equals the limit value and gets lower due to transmission of a data word. #0 value2 A standard transmit buffer interrupt event occurs when the filling level equals the limit value and gets bigger due to a write access to a data input location INx. #1 SIZE Buffer Size 24 2 read-write value1 The FIFO mechanism is disabled. The buffer does not accept any request for data. #000 value2 The FIFO buffer contains 2 entries. #001 value3 The FIFO buffer contains 4 entries. #010 value4 The FIFO buffer contains 8 entries. #011 value5 The FIFO buffer contains 16 entries. #100 value6 The FIFO buffer contains 32 entries. #101 value7 The FIFO buffer contains 64 entries. #110 STBIEN Standard Transmit Buffer Interrupt Enable 30 read-write value1 The standard transmit buffer interrupt generation is disabled. #0 value2 The standard transmit buffer interrupt generation is enabled. #1 STBINP Standard Transmit Buffer Interrupt Node Pointer 16 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 STBTEN Standard Transmit Buffer Trigger Enable 15 read-write value1 The standard transmit buffer event trigger through bit TRBSR.STBT is disabled. #0 value2 The standard transmit buffer event trigger through bit TRBSR.STBT is enabled. #1 STBTM Standard Transmit Buffer Trigger Mode 14 read-write value1 Trigger mode 0: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.LIMIT. #0 value2 Trigger mode 1: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.SIZE. #1 TBERIEN Transmit Buffer Error Interrupt Enable 31 read-write value1 The transmit buffer error interrupt generation is disabled. #0 value2 The transmit buffer error interrupt generation is enabled. #1 TBUF[0] Transmit Buffer 0x100 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[10] Transmit Buffer 0x6DC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[11] Transmit Buffer 0x788 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[12] Transmit Buffer 0x838 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[13] Transmit Buffer 0x8EC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[14] Transmit Buffer 0x9A4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[15] Transmit Buffer 0xA60 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[16] Transmit Buffer 0xB20 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[17] Transmit Buffer 0xBE4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[18] Transmit Buffer 0xCAC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[19] Transmit Buffer 0xD78 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[1] Transmit Buffer 0x184 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[20] Transmit Buffer 0xE48 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[21] Transmit Buffer 0xF1C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[22] Transmit Buffer 0xFF4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[23] Transmit Buffer 0x10D0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[24] Transmit Buffer 0x11B0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[25] Transmit Buffer 0x1294 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[26] Transmit Buffer 0x137C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[27] Transmit Buffer 0x1468 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[28] Transmit Buffer 0x1558 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[29] Transmit Buffer 0x164C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[2] Transmit Buffer 0x20C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[30] Transmit Buffer 0x1744 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[31] Transmit Buffer 0x1840 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[3] Transmit Buffer 0x298 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[4] Transmit Buffer 0x328 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[5] Transmit Buffer 0x3BC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[6] Transmit Buffer 0x454 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[7] Transmit Buffer 0x4F0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[8] Transmit Buffer 0x590 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[9] Transmit Buffer 0x634 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TCSR Transmit Control/Status Register 0x38 32 read-write n 0x0 0x0 EOF End Of Frame 6 read-write value1 The data word in TBUF is not considered as last word of an SSC frame. #0 value2 The data word in TBUF is considered as last word of an SSC frame. #1 FLEMD FLE Mode 2 read-write value1 The automatic update of FLE is disabled. #0 value2 The automatic update of FLE is enabled. #1 HPCMD Hardware Port Control Mode 4 read-write value1 The automatic update of bits SCTR.DSM and SCTR.HPCDIR is disabled. #0 value2 The automatic update of bits SCTR.DSM and SCTR.HPCDIR is enabled. #1 SELMD Select Mode 1 read-write value1 The automatic update of PCR.CTR[23:16] is disabled. #0 value2 The automatic update of PCR.CTR[23:16] is disabled. #1 SOF Start Of Frame 5 read-write value1 The data word in TBUF is not considered as first word of a frame. #0 value2 The data word in TBUF is considered as first word of a frame. A currently running frame is finished and MSLS becomes deactivated (respecting the programmed delays). #1 TDEN TBUF Data Enable 10 1 read-write value1 A transmission start of the data word in TBUF is disabled. If a transmission is started, the passive data level is sent out. #00 value2 A transmission of the data word in TBUF can be started if TDV = 1. #01 value3 A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 0. #10 value4 A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 1. #11 TDSSM TBUF Data Single Shot Mode 8 read-write value1 The data word in TBUF is not considered as invalid after it has been loaded into the transmit shift register. The loading of the TBUF data into the shift register does not clear TDV. #0 value2 The data word in TBUF is considered as invalid after it has been loaded into the shift register. In ASC and IIC mode, TDV is cleared with the TBI event, whereas in SSC and IIS mode, it is cleared with the RSI event. TDSSM = 1 has to be programmed if an optional data buffer is used. #1 TDV Transmit Data Valid 7 read-only value1 The data word in TBUF is not valid for transmission. #0 value2 The data word in TBUF is valid for transmission and a transmission start is possible. New data should not be written to a TBUFx input location while TDV = 1. #1 TDVTR TBUF Data Valid Trigger 12 read-write value1 Bit TCSR.TE is permanently set. #0 value2 Bit TCSR.TE is set if DX2T becomes active while TDV = 1. #1 TE Trigger Event 28 read-only value1 The trigger event has not yet been detected. A transmission of the data word in TBUF can not be started. #0 value2 The trigger event has been detected (or the trigger mechanism is switched off) and a transmission of the data word in TBUF can not be started. #1 TSOF Transmitted Start Of Frame 24 read-only value1 The latest data word transmission has not been started for the first word of a data frame. #0 value2 The latest data word transmission has been started for the first word of a data frame. #1 TV Transmission Valid 26 read-only value1 The latest start of a data word transmission has taken place while no valid data was available. As a result, the transmission of a data words with passive level (SCTR.PDL) has been started. #0 value2 The latest start of a data word transmission has taken place with valid data from TBUF. #1 TVC Transmission Valid Cumulated 27 read-only value1 Since TVC has been set, at least one data buffer underflow condition has occurred. #0 value2 Since TVC has been set, no data buffer underflow condition has occurred. #1 WA Word Address 13 read-write value1 The data word in TBUF will be transmitted after a falling edge of WA has been detected (referring to PSR.WA). #0 value2 The data word in TBUF will be transmitted after a rising edge of WA has been detected (referring to PSR.WA). #1 WAMD WA Mode 3 read-write value1 The automatic update of bit WA is disabled. #0 value2 The automatic update of bit WA is enabled. #1 WLEMD WLE Mode 0 read-write value1 The automatic update of SCTR.WLE and TCSR.EOF is disabled. #0 value2 The automatic update of SCTR.WLE and TCSR.EOF is enabled. #1 TRBPTR Transmit/Receive Buffer Pointer Register 0x110 32 read-write n 0x0 0x0 RDIPTR Receiver Data Input Pointer 16 5 read-only RDOPTR Receiver Data Output Pointer 24 5 read-only TDIPTR Transmitter Data Input Pointer 0 5 read-only TDOPTR Transmitter Data Output Pointer 8 5 read-only TRBSCR Transmit/Receive Buffer Status Clear Register 0x118 32 read-write n 0x0 0x0 CARBI Clear Alternative Receive Buffer Event 2 write-only value1 No effect. #0 value2 Clear TRBSR.ARBI. #1 CBDV Clear Bypass Data Valid 10 write-only value1 No effect. #0 value2 Clear BYPCR.BDV. #1 CRBERI Clear Receive Buffer Error Event 1 write-only value1 No effect. #0 value2 Clear TRBSR.RBERI. #1 CSRBI Clear Standard Receive Buffer Event 0 write-only value1 No effect. #0 value2 Clear TRBSR.SRBI. #1 CSTBI Clear Standard Transmit Buffer Event 8 write-only value1 No effect. #0 value2 Clear TRBSR.STBI. #1 CTBERI Clear Transmit Buffer Error Event 9 write-only value1 No effect. #0 value2 Clear TRBSR.TBERI. #1 FLUSHRB Flush Receive Buffer 14 write-only value1 No effect. #0 value2 The receive FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic. #1 FLUSHTB Flush Transmit Buffer 15 write-only value1 No effect. #0 value2 The transmit FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic. #1 TRBSR Transmit/Receive Buffer Status Register 0x114 32 read-write n 0x0 0x0 ARBI Alternative Receive Buffer Event 2 read-write value1 An alternative receive buffer event has not been detected. #0 value2 An alternative receive buffer event has been detected. #1 RBERI Receive Buffer Error Event 1 read-write value1 A receive buffer error event has not been detected. #0 value2 A receive buffer error event has been detected. #1 RBFLVL Receive Buffer Filling Level 16 6 read-only RBUS Receive Buffer Busy 5 read-only value1 The receive buffer information has been completely updated. #0 value2 The OUTR update from the FIFO memory is ongoing. A read from OUTR will be delayed. FIFO pointers from the previous read are not yet updated. #1 REMPTY Receive Buffer Empty 3 read-only value1 The receive buffer is not empty. #0 value2 The receive buffer is empty. #1 RFULL Receive Buffer Full 4 read-only value1 The receive buffer is not full. #0 value2 The receive buffer is full. #1 SRBI Standard Receive Buffer Event 0 read-write value1 A standard receive buffer event has not been detected. #0 value2 A standard receive buffer event has been detected. #1 SRBT Standard Receive Buffer Event Trigger 6 read-only value1 A standard receive buffer event is not triggered using this bit. #0 value2 A standard receive buffer event is triggered using this bit. #1 STBI Standard Transmit Buffer Event 8 read-write value1 A standard transmit buffer event has not been detected. #0 value2 A standard transmit buffer event has been detected. #1 STBT Standard Transmit Buffer Event Trigger 14 read-only value1 A standard transmit buffer event is not triggered using this bit. #0 value2 A standard transmit buffer event is triggered using this bit. #1 TBERI Transmit Buffer Error Event 9 read-write value1 A transmit buffer error event has not been detected. #0 value2 A transmit buffer error event has been detected. #1 TBFLVL Transmit Buffer Filling Level 24 6 read-only TBUS Transmit Buffer Busy 13 read-only value1 The transmit buffer information has been completely updated. #0 value2 The FIFO memory update after write to INx is ongoing. A write to INx will be delayed. FIFO pointers from the previous INx write are not yet updated. #1 TEMPTY Transmit Buffer Empty 11 read-only value1 The transmit buffer is not empty. #0 value2 The transmit buffer is empty. #1 TFULL Transmit Buffer Full 12 read-only value1 The transmit buffer is not full. #0 value2 The transmit buffer is full. #1 USIC0_CH1 Universal Serial Interface Controller 0 USIC 0x0 0x0 0x200 registers n BRG Baud Rate Generator Register 0x14 32 read-write n 0x0 0x0 CLKSEL Clock Selection 0 1 read-write value1 The fractional divider frequency fFD is selected. #00 value3 The trigger signal DX1T defines fPIN. Signal MCLK toggles with fPIN. #10 value4 Signal MCLK corresponds to the DX1S signal and the frequency fPIN is derived from the rising edges of DX1S. #11 CTQSEL Input Selection for CTQ 6 1 read-write value1 fCTQIN = fPDIV #00 value2 fCTQIN = fPPP #01 value3 fCTQIN = fSCLK #10 value4 fCTQIN = fMCLK #11 DCTQ Denominator for Time Quanta Counter 10 4 read-write MCLKCFG Master Clock Configuration 29 read-write value1 The passive level is 0. #0 value2 The passive level is 1. #1 PCTQ Pre-Divider for Time Quanta Counter 8 1 read-write PDIV Divider Mode: Divider Factor to Generate fPDIV 16 9 read-write PPPEN Enable 2:1 Divider for fPPP 4 read-write value1 The 2:1 divider for fPPP is disabled. fPPP = fPIN #0 value2 The 2:1 divider for fPPP is enabled. fPPP = fMCLK = fPIN / 2. #1 SCLKCFG Shift Clock Output Configuration 30 1 read-write value1 The passive level is 0 and the delay is disabled. #00 value2 The passive level is 1 and the delay is disabled. #01 value3 The passive level is 0 and the delay is enabled. #10 value4 The passive level is 1 and the delay is enabled. #11 SCLKOSEL Shift Clock Output Select 28 read-write value1 SCLK from the baud rate generator is selected as the SCLKOUT input source. #0 value2 The transmit shift clock from DX1 input stage is selected as the SCLKOUT input source. #1 TMEN Timing Measurement Enable 3 read-write value1 Timing measurement is disabled: The trigger signals DX0T and DX1T are ignored. #0 value2 Timing measurement is enabled: The 10-bit counter is incremented by 1 with fPPP and stops counting when reaching its maximum value. If one of the trigger signals DX0T or DX1T become active, the counter value is captured into bit field CTV, the counter is cleared and a transmit shift event is generated. #1 BYP Bypass Data Register 0x100 32 read-write n 0x0 0x0 BDATA Bypass Data 0 15 read-write BYPCR Bypass Control Register 0x104 32 read-write n 0x0 0x0 BDEN Bypass Data Enable 10 1 read-write value1 The transfer of bypass data is disabled. #00 value2 The transfer of bypass data to TBUF is possible. Bypass data will be transferred to TBUF according to its priority if BDV = 1. #01 value3 Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 0. #10 value4 Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 1. #11 BDSSM Bypass Data Single Shot Mode 8 read-write value1 The bypass data is still considered as valid after it has been loaded into TBUF. The loading of the data into TBUF does not clear BDV. #0 value2 The bypass data is considered as invalid after it has been loaded into TBUF. The loading of the data into TBUF clears BDV. #1 BDV Bypass Data Valid 15 read-only value1 The bypass data is not valid. #0 value2 The bypass data is valid. #1 BDVTR Bypass Data Valid Trigger 12 read-write value1 Bit BDV is not influenced by DX2T. #0 value2 Bit BDV is set if DX2T is active. #1 BHPC Bypass Hardware Port Control 21 2 read-write BPRIO Bypass Priority 13 read-write value1 The transmit FIFO data has a higher priority than the bypass data. #0 value2 The bypass data has a higher priority than the transmit FIFO data. #1 BSELO Bypass Select Outputs 16 4 read-write BWLE Bypass Word Length 0 3 read-write CCFG Channel Configuration Register 0x4 32 read-write n 0x0 0x0 ASC ASC Protocol Available 1 read-only value1 The ASC protocol is not available. #0 value2 The ASC protocol is available. #1 IIC IIC Protocol Available 2 read-only value1 The IIC protocol is not available. #0 value2 The IIC protocol is available. #1 IIS IIS Protocol Available 3 read-only value1 The IIS protocol is not available. #0 value2 The IIS protocol is available. #1 RB Receive FIFO Buffer Available 6 read-only value1 A receive FIFO buffer is not available. #0 value2 A receive FIFO buffer is available. #1 SSC SSC Protocol Available 0 read-only value1 The SSC protocol is not available. #0 value2 The SSC protocol is available. #1 TB Transmit FIFO Buffer Available 7 read-only value1 A transmit FIFO buffer is not available. #0 value2 A transmit FIFO buffer is available. #1 CCR Channel Control Register 0x40 32 read-write n 0x0 0x0 AIEN Alternative Receive Interrupt Enable 15 read-write value1 The alternative receive interrupt is disabled. #0 value2 The alternative receive interrupt is enabled. In case of an alternative receive event, the service request output SRx indicated by INPR.AINP is activated. #1 BRGIEN Baud Rate Generator Interrupt Enable 16 read-write value1 The baud rate generator interrupt is disabled. #0 value2 The baud rate generator interrupt is enabled. In case of a baud rate generator event, the service request output SRx indicated by INPR.PINP is activated. #1 DLIEN Data Lost Interrupt Enable 11 read-write value1 The data lost interrupt is disabled. #0 value2 The data lost interrupt is enabled. In case of a data lost event, the service request output SRx indicated by INPR.PINP is activated. #1 HPCEN Hardware Port Control Enable 6 1 read-write value1 The hardware port control is disabled. #00 value2 The hardware port control is enabled for DX0 and DOUT0. #01 value3 The hardware port control is enabled for DX3, DX0 and DOUT[1:0]. #10 value4 The hardware port control is enabled for DX0, DX[5:3] and DOUT[3:0]. #11 MODE Operating Mode 0 3 read-write value1 The USIC channel is disabled. All protocol-related state machines are set to an idle state. 0x0 value2 The SSC (SPI) protocol is selected. 0x1 value3 The ASC (SCI, UART) protocol is selected. 0x2 value4 The IIS protocol is selected. 0x3 value5 The IIC protocol is selected. 0x4 PM Parity Mode 8 1 read-write value1 The parity generation is disabled. #00 value3 Even parity is selected (parity bit = 1 on odd number of 1s in data, parity bit = 0 on even number of 1s in data). #10 value4 Odd parity is selected (parity bit = 0 on odd number of 1s in data, parity bit = 1 on even number of 1s in data). #11 RIEN Receive Interrupt Enable 14 read-write value1 The receive interrupt is disabled. #0 value2 The receive interrupt is enabled. In case of a receive event, the service request output SRx indicated by INPR.RINP is activated. #1 RSIEN Receiver Start Interrupt Enable 10 read-write value1 The receiver start interrupt is disabled. #0 value2 The receiver start interrupt is enabled. In case of a receiver start event, the service request output SRx indicated by INPR.TBINP is activated. #1 TBIEN Transmit Buffer Interrupt Enable 13 read-write value1 The transmit buffer interrupt is disabled. #0 value2 The transmit buffer interrupt is enabled. In case of a transmit buffer event, the service request output SRx indicated by INPR.TBINP is activated. #1 TSIEN Transmit Shift Interrupt Enable 12 read-write value1 The transmit shift interrupt is disabled. #0 value2 The transmit shift interrupt is enabled. In case of a transmit shift interrupt event, the service request output SRx indicated by INPR.TSINP is activated. #1 CMTR Capture Mode Timer Register 0x44 32 read-write n 0x0 0x0 CTV Captured Timer Value 0 9 read-write DX0CR Input Control Register 0 0x1C 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX1CR Input Control Register 1 0x20 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DX1T. #01 value3 A falling edge activates DX1T. #10 value4 Both edges activate DX1T. #11 DCEN Delay Compensation Enable 3 read-write value1 The receive shift clock is dependent on INSW selection. #0 value2 The receive shift clock is connected to the selected data input line. This setting is used if delay compensation is required in SSC and IIS protocols, else DCEN should always be 0. #1 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DX1A is selected. #000 value2 The data input DX1B is selected. #001 value3 The data input DX1C is selected. #010 value4 The data input DX1D is selected. #011 value5 The data input DX1E is selected. #100 value6 The data input DX1F is selected. #101 value7 The data input DX1G is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DX1S is 0. #0 value2 The current value of DX1S is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX2CR Input Control Register 2 0x24 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX3CR Input Control Register 3 0x28 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX4CR Input Control Register 4 0x2C 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX5CR Input Control Register 5 0x30 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 FDR Fractional Divider Register 0x10 32 read-write n 0x0 0x0 DM Divider Mode 14 1 read-write value1 The divider is switched off, fFD = 0. #00 value2 Normal divider mode selected. #01 value3 Fractional divider mode selected. #10 value4 The divider is switched off, fFD = 0. #11 RESULT Result Value 16 9 read-only STEP Step Value 0 9 read-write FMR Flag Modification Register 0x68 32 read-write n 0x0 0x0 ATVC Activate Bit TVC 4 write-only value1 No action. #0 value2 Bit TCSR.TVC is set. #1 CRDV0 Clear Bits RDV for RBUF0 14 write-only value1 No action. #0 value2 Bits RBUF01SR.RDV00 and RBUF01SR.RDV10 are cleared. #1 CRDV1 Clear Bit RDV for RBUF1 15 write-only value1 No action. #0 value2 Bits RBUF01SR.RDV01 and RBUF01SR.RDV11 are cleared. #1 MTDV Modify Transmit Data Valid 0 1 write-only value1 No action. #00 value2 Bit TDV is set, TE is unchanged. #01 value3 Bits TDV and TE are cleared. #10 SIO0 Set Interrupt Output SRx 16 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO1 Set Interrupt Output SRx 17 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO2 Set Interrupt Output SRx 18 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO3 Set Interrupt Output SRx 19 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO4 Set Interrupt Output SRx 20 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO5 Set Interrupt Output SRx 21 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 INPR Interrupt Node Pointer Register 0x18 32 read-write n 0x0 0x0 AINP Alternative Receive Interrupt Node Pointer 12 2 read-write PINP Transmit Shift Interrupt Node Pointer 16 2 read-write RINP Receive Interrupt Node Pointer 8 2 read-write TBINP Transmit Buffer Interrupt Node Pointer 4 2 read-write TSINP Transmit Shift Interrupt Node Pointer 0 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 IN[0] Transmit FIFO Buffer 0x300 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[10] Transmit FIFO Buffer 0x12DC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[11] Transmit FIFO Buffer 0x1488 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[12] Transmit FIFO Buffer 0x1638 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[13] Transmit FIFO Buffer 0x17EC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[14] Transmit FIFO Buffer 0x19A4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[15] Transmit FIFO Buffer 0x1B60 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[16] Transmit FIFO Buffer 0x1D20 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[17] Transmit FIFO Buffer 0x1EE4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[18] Transmit FIFO Buffer 0x20AC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[19] Transmit FIFO Buffer 0x2278 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[1] Transmit FIFO Buffer 0x484 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[20] Transmit FIFO Buffer 0x2448 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[21] Transmit FIFO Buffer 0x261C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[22] Transmit FIFO Buffer 0x27F4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[23] Transmit FIFO Buffer 0x29D0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[24] Transmit FIFO Buffer 0x2BB0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[25] Transmit FIFO Buffer 0x2D94 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[26] Transmit FIFO Buffer 0x2F7C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[27] Transmit FIFO Buffer 0x3168 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[28] Transmit FIFO Buffer 0x3358 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[29] Transmit FIFO Buffer 0x354C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[2] Transmit FIFO Buffer 0x60C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[30] Transmit FIFO Buffer 0x3744 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[31] Transmit FIFO Buffer 0x3940 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[3] Transmit FIFO Buffer 0x798 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[4] Transmit FIFO Buffer 0x928 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[5] Transmit FIFO Buffer 0xABC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[6] Transmit FIFO Buffer 0xC54 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[7] Transmit FIFO Buffer 0xDF0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[8] Transmit FIFO Buffer 0xF90 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[9] Transmit FIFO Buffer 0x1134 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only KSCFG Kernel State Configuration Register 0xC 32 read-write n 0x0 0x0 BPMODEN Bit Protection for MODEN 1 write-only value1 MODEN is not changed. #0 value2 MODEN is updated with the written value. #1 BPNOM Bit Protection for NOMCFG 7 write-only value1 NOMCFG is not changed. #0 value2 NOMCFG is updated with the written value. #1 BPSUM Bit Protection for SUMCFG 11 write-only value1 SUMCFG is not changed. #0 value2 SUMCFG is updated with the written value. #1 MODEN Module Enable 0 read-write value1 The module is switched off immediately (without respecting a stop condition). It does not react on mode control actions and the module clock is switched off. The module does not react on read accesses and ignores write accesses (except to KSCFG). #0 value2 The module is switched on and can operate. After writing 1 to MODEN, it is recommended to read register KSCFG to avoid pipeline effects in the control block before accessing other Service Request Processing registers. #1 NOMCFG Normal Operation Mode Configuration 4 1 read-write value1 Run mode 0 is selected. #00 value2 Run mode 1 is selected. #01 value3 Stop mode 0 is selected. #10 value4 Stop mode 1 is selected. #11 SUMCFG Suspend Mode Configuration 8 1 read-write OUTDR Receiver Buffer Output Register L for Debugger 0x120 32 read-write n 0x0 0x0 DSR Data from Shift Register 0 15 read-only RCI Receive Control Information from Shift Register 16 4 read-only OUTR Receiver Buffer Output Register 0x11C 32 read-write n 0x0 0x0 modifyExternal DSR Received Data 0 15 read-only RCI Receiver Control Information 16 4 read-only PCR Protocol Control Register 0x3C 32 read-write n 0x0 0x0 CTR0 Protocol Control Bit 0 0 read-write CTR1 Protocol Control Bit 1 1 read-write CTR10 Protocol Control Bit 10 10 read-write CTR11 Protocol Control Bit 11 11 read-write CTR12 Protocol Control Bit 12 12 read-write CTR13 Protocol Control Bit 13 13 read-write CTR14 Protocol Control Bit 14 14 read-write CTR15 Protocol Control Bit 15 15 read-write CTR16 Protocol Control Bit 16 16 read-write CTR17 Protocol Control Bit 17 17 read-write CTR18 Protocol Control Bit 18 18 read-write CTR19 Protocol Control Bit 19 19 read-write CTR2 Protocol Control Bit 2 2 read-write CTR20 Protocol Control Bit 20 20 read-write CTR21 Protocol Control Bit 21 21 read-write CTR22 Protocol Control Bit 22 22 read-write CTR23 Protocol Control Bit 23 23 read-write CTR24 Protocol Control Bit 24 24 read-write CTR25 Protocol Control Bit 25 25 read-write CTR26 Protocol Control Bit 26 26 read-write CTR27 Protocol Control Bit 27 27 read-write CTR28 Protocol Control Bit 28 28 read-write CTR29 Protocol Control Bit 29 29 read-write CTR3 Protocol Control Bit 3 3 read-write CTR30 Protocol Control Bit 30 30 read-write CTR31 Protocol Control Bit 31 31 read-write CTR4 Protocol Control Bit 4 4 read-write CTR5 Protocol Control Bit 5 5 read-write CTR6 Protocol Control Bit 6 6 read-write CTR7 Protocol Control Bit 7 7 read-write CTR8 Protocol Control Bit 8 8 read-write CTR9 Protocol Control Bit 9 9 read-write PCR_ASCMode Protocol Control Register [ASC Mode] PCR 0x3C 32 read-write n 0x0 0x0 CDEN Collision Detection Enable 4 read-write value1 The collision detection is disabled. #0 value2 If a collision is detected, the transmitter stops its data transmission, outputs a 1, sets bit PSR.COL and generates a protocol interrupt. In order to allow data transmission again, PSR.COL has to be cleared by software. #1 FEIEN Format Error Interrupt Enable 6 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 FFIEN Frame Finished Interrupt Enable 7 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 IDM Idle Detection Mode 2 read-write value1 The bus idle detection is switched off and bits PSR.TXIDLE and PSR.RXIDLE are set automatically to enable data transfers without checking the inputs before. #0 value2 The bus is considered as idle after a number of consecutive passive bit times defined by SCTR.FLE plus 2 (in the case without parity bit) or plus 3 (in the case with parity bit). #1 MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and the MCLK signal is 0. #0 value2 The MCLK generation is enabled. #1 PL Pulse Length 13 2 read-write value1 The pulse length is equal to the bit length (no shortened 0). #000 value2 The pulse length of a 0 bit is 2 time quanta. #001 value3 The pulse length of a 0 bit is 3 time quanta. #010 value4 The pulse length of a 0 bit is 8 time quanta. #111 RNIEN Receiver Noise Detection Interrupt Enable 5 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 RSTEN Receiver Status Enable 16 read-write value1 Flag PSR[9] is not modified depending on the receiver status. #0 value2 Flag PSR[9] is set during the complete reception of a frame. #1 SBIEN Synchronization Break Interrupt Enable 3 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 SMD Sample Mode 0 read-write value1 Only one sample is taken per bit time. The current input value is sampled. #0 value2 Three samples are taken per bit time and a majority decision is made. #1 SP Sample Point 8 4 read-write STPB Stop Bits 1 read-write value1 The number of stop bits is 1. #0 value2 The number of stop bits is 2. #1 TSTEN Transmitter Status Enable 17 read-write value1 Flag PSR[9] is not modified depending on the transmitter status. #0 value2 Flag PSR[9] is set during the complete transmission of a frame. #1 PCR_IICMode Protocol Control Register [IIC Mode] PCR 0x3C 32 read-write n 0x0 0x0 ACK00 Acknowledge 00H 16 read-write value1 The slave device is not sensitive to this address. #0 value2 The slave device is sensitive to this address. #1 ACKIEN Acknowledge Interrupt Enable 30 read-write value1 The acknowledge interrupt is disabled. #0 value2 The acknowledge interrupt is enabled. #1 ARLIEN Arbitration Lost Interrupt Enable 22 read-write value1 The arbitration lost interrupt is disabled. #0 value2 The arbitration lost interrupt is enabled. #1 ERRIEN Error Interrupt Enable 24 read-write value1 The error interrupt is disabled. #0 value2 The error interrupt is enabled. #1 HDEL Hardware Delay 26 3 read-write MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and MCLK is 0. #0 value2 The MCLK generation is enabled. #1 NACKIEN Non-Acknowledge Interrupt Enable 21 read-write value1 The non-acknowledge interrupt is disabled. #0 value2 The non-acknowledge interrupt is enabled. #1 PCRIEN Stop Condition Received Interrupt Enable 20 read-write value1 The stop condition interrupt is disabled. #0 value2 The stop condition interrupt is enabled. #1 RSCRIEN Repeated Start Condition Received Interrupt Enable 19 read-write value1 The repeated start condition interrupt is disabled. #0 value2 The repeated start condition interrupt is enabled. #1 SACKDIS Slave Acknowledge Disable 25 read-write value1 The generation of an active slave acknowledge is enabled (slave acknowledge with 0 level = more bytes can be received). #0 value2 The generation of an active slave acknowledge is disabled (slave acknowledge with 1 level = reception stopped). #1 SCRIEN Start Condition Received Interrupt Enable 18 read-write value1 The start condition interrupt is disabled. #0 value2 The start condition interrupt is enabled. #1 SLAD Slave Address 0 15 read-write SRRIEN Slave Read Request Interrupt Enable 23 read-write value1 The slave read request interrupt is disabled. #0 value2 The slave read request interrupt is enabled. #1 STIM Symbol Timing 17 read-write value1 A symbol contains 10 time quanta. The timing is adapted for standard mode (100 kBaud). #0 value2 A symbol contains 25 time quanta. The timing is adapted for fast mode (400 kBaud). #1 PCR_IISMode Protocol Control Register [IIS Mode] PCR 0x3C 32 read-write n 0x0 0x0 DTEN Data Transfers Enable 1 read-write value1 The changes of the WA input signal are ignored and no transfers take place. #0 value2 Transfers are enabled. #1 DX2TIEN DX2T Interrupt Enable 15 read-write value1 A protocol interrupt is not generated if DX2T is active. #0 value2 A protocol interrupt is generated if DX2T is active. #1 ENDIEN END Interrupt Enable 6 read-write value1 A protocol interrupt is not activated. #0 value2 A protocol interrupt is activated. #1 MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and MCLK is 0. #0 value2 The MCLK generation is enabled. #1 SELINV Select Inversion 2 read-write value1 The SELOx outputs have the same polarity as the WA signal. #0 value2 The SELOx outputs have the inverted polarity to the WA signal. #1 TDEL Transfer Delay 16 5 read-write WAFEIEN WA Falling Edge Interrupt Enable 4 read-write value1 A protocol interrupt is not activated if a falling edge of WA is generated. #0 value2 A protocol interrupt is activated if a falling edge of WA is generated. #1 WAGEN WA Generation Enable 0 read-write value1 The IIS can be used as slave. The generation of the word address signal is disabled. The output signal WA is 0. The MCLKO signal generation depends on PCR.MCLK. #0 value2 The IIS can be used as master. The generation of the word address signal is enabled. The signal starts with a 0 after being enabled. The generation of MCLK is enabled, independent of PCR.MCLK. After clearing WAGEN, the USIC module stops the generation of the WA signal within the next 4 WA periods. #1 WAREIEN WA Rising Edge Interrupt Enable 5 read-write value1 A protocol interrupt is not activated if a rising edge of WA is generated. #0 value2 A protocol interrupt is activated if a rising edge of WA is generated. #1 PCR_SSCMode Protocol Control Register [SSC Mode] PCR 0x3C 32 read-write n 0x0 0x0 CTQSEL1 Input Frequency Selection 4 1 read-write value1 fCTQIN = fPDIV #00 value2 fCTQIN = fPPP #01 value3 fCTQIN = fSCLK #10 value4 fCTQIN = fMCLK #11 DCTQ1 Divider Factor DCTQ1 for Tiw and Tnf 8 4 read-write DX2TIEN DX2T Interrupt Enable 15 read-write value1 A protocol interrupt is not generated if DX2T is activated. #0 value2 A protocol interrupt is generated if DX2T is activated. #1 FEM Frame End Mode 3 read-write value1 The current data frame is considered as finished when the last bit of a data word has been sent out and the transmit buffer TBUF does not contain new data (TDV = 0). #0 value2 The MSLS signal is kept active also while no new data is available and no other end of frame condition is reached. In this case, the software can accept delays in delivering the data without automatic deactivation of MSLS in multi-word data frames. #1 MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and output MCLK = 0. #0 value2 The MCLK generation is enabled. #1 MSLSEN MSLS Enable 0 read-write value1 The MSLS generation is disabled (MSLS = 0). This is the setting for SSC slave mode. #0 value2 The MSLS generation is enabled. This is the setting for SSC master mode. #1 MSLSIEN MSLS Interrupt Enable 14 read-write value1 A protocol interrupt is not generated if a change of signal MSLS is detected. #0 value2 A protocol interrupt is generated if a change of signal MSLS is detected. #1 PARIEN Parity Error Interrupt Enable 13 read-write value1 A protocol interrupt is not generated with the detection of a parity error. #0 value2 A protocol interrupt is generated with the detection of a parity error. #1 PCTQ1 Divider Factor PCTQ1 for Tiw and Tnf 6 1 read-write SELCTR Select Control 1 read-write value1 The coded select mode is enabled. #0 value2 The direct select mode is enabled. #1 SELINV Select Inversion 2 read-write value1 The SELO outputs have the same polarity as the MSLS signal (active high). #0 value2 The SELO outputs have the inverted polarity to the MSLS signal (active low). #1 SELO Select Output 16 7 read-write value1 The corresponding SELOx line cannot be activated. #0 value2 The corresponding SELOx line can be activated (according to the mode selected by SELCTR). #1 SLPHSEL Slave Mode Clock Phase Select 25 read-write value1 Data bits are shifted out with the leading edge of the shift clock signal and latched in with the trailing edge. 0b0 value2 The first data bit is shifted out when the data shift unit receives a low to high transition from the DX2 stage. Subsequent bits are shifted out with the trailing edge of the shift clock signal. Data bits are always latched in with the leading edge. 0b1 TIWEN Enable Inter-Word Delay Tiw 24 read-write value1 No delay between data words of the same frame. #0 value2 The inter-word delay Tiw is enabled and introduced between data words of the same frame. #1 PSCR Protocol Status Clear Register 0x4C 32 read-write n 0x0 0x0 CAIF Clear Alternative Receive Indication Flag 15 write-only value1 No action #0 value2 Flag PSR.AIF is cleared. #1 CBRGIF Clear Baud Rate Generator Indication Flag 16 write-only value1 No action #0 value2 Flag PSR.BRGIF is cleared. #1 CDLIF Clear Data Lost Indication Flag 11 write-only value1 No action #0 value2 Flag PSR.DLIF is cleared. #1 CRIF Clear Receive Indication Flag 14 write-only value1 No action #0 value2 Flag PSR.RIF is cleared. #1 CRSIF Clear Receiver Start Indication Flag 10 write-only value1 No action #0 value2 Flag PSR.RSIF is cleared. #1 CST0 Clear Status Flag 0 in PSR 0 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST1 Clear Status Flag 1 in PSR 1 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST2 Clear Status Flag 2 in PSR 2 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST3 Clear Status Flag 3 in PSR 3 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST4 Clear Status Flag 4 in PSR 4 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST5 Clear Status Flag 5 in PSR 5 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST6 Clear Status Flag 6 in PSR 6 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST7 Clear Status Flag 7 in PSR 7 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST8 Clear Status Flag 8 in PSR 8 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST9 Clear Status Flag 9 in PSR 9 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CTBIF Clear Transmit Buffer Indication Flag 13 write-only value1 No action #0 value2 Flag PSR.TBIF is cleared. #1 CTSIF Clear Transmit Shift Indication Flag 12 write-only value1 No action #0 value2 Flag PSR.TSIF is cleared. #1 PSR Protocol Status Register 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 ST0 Protocol Status Flag 0 0 read-write ST1 Protocol Status Flag 1 1 read-write ST2 Protocol Status Flag 2 2 read-write ST3 Protocol Status Flag 3 3 read-write ST4 Protocol Status Flag 4 4 read-write ST5 Protocol Status Flag 5 5 read-write ST6 Protocol Status Flag 6 6 read-write ST7 Protocol Status Flag 7 7 read-write ST8 Protocol Status Flag 8 8 read-write ST9 Protocol Status Flag 9 9 read-write TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 PSR_ASCMode Protocol Status Register [ASC Mode] PSR 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 BUSY Transfer Status BUSY 9 read-only value1 A data transfer does not take place. #0 value2 A data transfer currently takes place. #1 COL Collision Detected 3 read-write value1 A collision has not yet been detected and frame transmission is possible. #0 value2 A collision has been detected and frame transmission is not possible. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 FER0 Format Error in Stop Bit 0 5 read-write value1 A format error 0 has not been detected. #0 value2 A format error 0 has been detected. #1 FER1 Format Error in Stop Bit 1 6 read-write value1 A format error 1 has not been detected. #0 value2 A format error 1 has been detected. #1 RFF Receive Frame Finished 7 read-write value1 The received frame is not yet finished. #0 value2 The received frame is finished. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RNS Receiver Noise Detected 4 read-write value1 Receiver noise has not been detected. #0 value2 Receiver noise has been detected. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 RXIDLE Reception Idle 1 read-write value1 The receiver line has not yet been idle. #0 value2 The receiver line has been idle and frame reception is possible. #1 SBD Synchronization Break Detected 2 read-write value1 A synchronization break has not yet been detected. #0 value2 A synchronization break has been detected. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TFF Transmitter Frame Finished 8 read-write value1 The transmitter frame is not yet finished. #0 value2 The transmitter frame is finished. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 TXIDLE Transmission Idle 0 read-write value1 The transmitter line has not yet been idle. #0 value2 The transmitter line has been idle and frame transmission is possible. #1 PSR_IICMode Protocol Status Register [IIC Mode] PSR 0x48 32 read-write n 0x0 0x0 ACK Acknowledge Received 9 read-write value1 An acknowledge has not been received. #0 value2 An acknowledge has been received. #1 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 ARL Arbitration Lost 6 read-write value1 An arbitration has not been lost. #0 value2 An arbitration has been lost. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 ERR Error 8 read-write value1 An IIC error has not been detected. #0 value2 An IIC error has been detected. #1 NACK Non-Acknowledge Received 5 read-write value1 A non-acknowledge has not been received. #0 value2 A non-acknowledge has been received. #1 PCR Stop Condition Received 4 read-write value1 A stop condition has not yet been detected. #0 value2 A stop condition has been detected. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSCR Repeated Start Condition Received 3 read-write value1 A repeated start condition has not yet been detected. #0 value2 A repeated start condition has been detected. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 SCR Start Condition Received 2 read-write value1 A start condition has not yet been detected. #0 value2 A start condition has been detected. #1 SLSEL Slave Select 0 read-write value1 The device is not selected as slave. #0 value2 The device is selected as slave. #1 SRR Slave Read Request 7 read-write value1 A slave read request has not been detected. #0 value2 A slave read request has been detected. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 WTDF Wrong TDF Code Found 1 read-write value1 A wrong TDF code has not been found. #0 value2 A wrong TDF code has been found. #1 PSR_IISMode Protocol Status Register [IIS Mode] PSR 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 DX2S DX2S Status 1 read-write value1 DX2S is 0. #0 value2 DX2S is 1. #1 DX2TEV DX2T Event Detected 3 read-write value1 The DX2T signal has not been activated. #0 value2 The DX2T signal has been activated. #1 END WA Generation End 6 read-write value1 The WA generation has not yet ended (if it is running and WAGEN has been cleared). #0 value2 The WA generation has ended (if it has been running). #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 WA Word Address 0 read-write value1 WA has been sampled 0. #0 value2 WA has been sampled 1. #1 WAFE WA Falling Edge Event 4 read-write value1 A WA falling edge has not been generated. #0 value2 A WA falling edge has been generated. #1 WARE WA Rising Edge Event 5 read-write value1 A WA rising edge has not been generated. #0 value2 A WA rising edge has been generated. #1 PSR_SSCMode Protocol Status Register [SSC Mode] PSR 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 DX2S DX2S Status 1 read-write value1 DX2S is 0. #0 value2 DX2S is 1. #1 DX2TEV DX2T Event Detected 3 read-write value1 The DX2T signal has not been activated. #0 value2 The DX2T signal has been activated. #1 MSLS MSLS Status 0 read-write value1 The internal signal MSLS is inactive (0). #0 value2 The internal signal MSLS is active (1). #1 MSLSEV MSLS Event Detected 2 read-write value1 The MSLS signal has not changed its state. #0 value2 The MSLS signal has changed its state. #1 PARERR Parity Error Event Detected 4 read-write value1 A parity error event has not been activated. #0 value2 A parity error event has been activated. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 RBCTR Receiver Buffer Control Register 0x10C 32 read-write n 0x0 0x0 ARBIEN Alternative Receive Buffer Interrupt Enable 29 read-write value1 The alternative receive buffer interrupt generation is disabled. #0 value2 The alternative receive buffer interrupt generation is enabled. #1 ARBINP Alternative Receive Buffer Interrupt Node Pointer 19 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 DPTR Data Pointer 0 5 write-only LIMIT Limit For Interrupt Generation 8 5 read-write LOF Buffer Event on Limit Overflow 28 read-write value1 A standard receive buffer event occurs when the filling level equals the limit value and gets lower due to a read access from OUTR. #0 value2 A standard receive buffer event occurs when the filling level equals the limit value and gets bigger due to the reception of a new data word. #1 RBERIEN Receive Buffer Error Interrupt Enable 31 read-write value1 The receive buffer error interrupt generation is disabled. #0 value2 The receive buffer error interrupt generation is enabled. #1 RCIM Receiver Control Information Mode 22 1 read-write value1 RCI[4] = PERR, RCI[3:0] = WLEN #00 value2 RCI[4] = SOF, RCI[3:0] = WLEN #01 value3 RCI[4] = 0, RCI[3:0] = WLEN #10 value4 RCI[4] = PERR, RCI[3] = PAR, RCI[2:1] = 00B, RCI[0] = SOF #11 RNM Receiver Notification Mode 27 read-write value1 Filling level mode: A standard receive buffer event occurs when the filling level equals the limit value and changes, either due to a read access from OUTR (LOF = 0) or due to a new received data word (LOF = 1). #0 value2 RCI mode: A standard receive buffer event occurs when register OUTR is updated with a new value if the corresponding value in OUTR.RCI[4] = 0. If OUTR.RCI[4] = 1, an alternative receive buffer event occurs instead of the standard receive buffer event. #1 SIZE Buffer Size 24 2 read-write value1 The FIFO mechanism is disabled. The buffer does not accept any request for data. #000 value2 The FIFO buffer contains 2 entries. #001 value3 The FIFO buffer contains 4 entries. #010 value4 The FIFO buffer contains 8 entries. #011 value5 The FIFO buffer contains 16 entries. #100 value6 The FIFO buffer contains 32 entries. #101 value7 The FIFO buffer contains 64 entries. #110 SRBIEN Standard Receive Buffer Interrupt Enable 30 read-write value1 The standard receive buffer interrupt generation is disabled. #0 value2 The standard receive buffer interrupt generation is enabled. #1 SRBINP Standard Receive Buffer Interrupt Node Pointer 16 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 SRBTEN Standard Receive Buffer Trigger Enable 15 read-write value1 The standard receive buffer event trigger through bit TRBSR.SRBT is disabled. #0 value2 The standard receive buffer event trigger through bit TRBSR.SRBT is enabled. #1 SRBTM Standard Receive Buffer Trigger Mode 14 read-write value1 Trigger mode 0: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=RBCTR.LIMIT. #0 value2 Trigger mode 1: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=0. #1 RBUF Receiver Buffer Register 0x54 32 read-write n 0x0 0x0 modifyExternal DSR Received Data 0 15 read-only RBUF0 Receiver Buffer Register 0 0x5C 32 read-write n 0x0 0x0 DSR0 Data of Shift Registers 0[3:0] 0 15 read-only RBUF01SR Receiver Buffer 01 Status Register 0x64 32 read-write n 0x0 0x0 DS0 Data Source 15 read-only value1 The register RBUF contains the data of RBUF0 (same for associated status information). #0 value2 The register RBUF contains the data of RBUF1 (same for associated status information). #1 DS1 Data Source 31 read-only value1 The register RBUF contains the data of RBUF0 (same for associated status information). #0 value2 The register RBUF contains the data of RBUF1 (same for associated status information). #1 PAR0 Protocol-Related Argument in RBUF0 8 read-only PAR1 Protocol-Related Argument in RBUF1 24 read-only PERR0 Protocol-related Error in RBUF0 9 read-only value1 The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt. #0 value2 The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt. #1 PERR1 Protocol-related Error in RBUF1 25 read-only value1 The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt. #0 value2 The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt. #1 RDV00 Receive Data Valid in RBUF0 13 read-only value1 Register RBUF0 does not contain data that has not yet been read out. #0 value2 Register RBUF0 contains data that has not yet been read out. #1 RDV01 Receive Data Valid in RBUF1 14 read-only value1 Register RBUF1 does not contain data that has not yet been read out. #0 value2 Register RBUF1 contains data that has not yet been read out. #1 RDV10 Receive Data Valid in RBUF0 29 read-only value1 Register RBUF0 does not contain data that has not yet been read out. #0 value2 Register RBUF0 contains data that has not yet been read out. #1 RDV11 Receive Data Valid in RBUF1 30 read-only value1 Register RBUF1 does not contain data that has not yet been read out. #0 value2 Register RBUF1 contains data that has not yet been read out. #1 SOF0 Start of Frame in RBUF0 6 read-only value1 The data in RBUF0 has not been the first data word of a data frame. #0 value2 The data in RBUF0 has been the first data word of a data frame. #1 SOF1 Start of Frame in RBUF1 22 read-only value1 The data in RBUF1 has not been the first data word of a data frame. #0 value2 The data in RBUF1 has been the first data word of a data frame. #1 WLEN0 Received Data Word Length in RBUF0 0 3 read-only WLEN1 Received Data Word Length in RBUF1 16 3 read-only value1 One bit has been received. 0x0 value2 Sixteen bits have been received. 0xF RBUF1 Receiver Buffer Register 1 0x60 32 read-write n 0x0 0x0 DSR1 Data of Shift Registers 1[3:0] 0 15 read-only RBUFD Receiver Buffer Register for Debugger 0x58 32 read-write n 0x0 0x0 DSR Data from Shift Register 0 15 read-only RBUFSR Receiver Buffer Status Register 0x50 32 read-write n 0x0 0x0 DS Data Source of RBUF or RBUFD 15 read-only PAR Protocol-Related Argument in RBUF or RBUFD 8 read-only PERR Protocol-related Error in RBUF or RBUFD 9 read-only RDV0 Receive Data Valid in RBUF or RBUFD 13 read-only RDV1 Receive Data Valid in RBUF or RBUFD 14 read-only SOF Start of Frame in RBUF or RBUFD 6 read-only WLEN Received Data Word Length in RBUF or RBUFD 0 3 read-only SCTR Shift Control Register 0x34 32 read-write n 0x0 0x0 DOCFG Data Output Configuration 6 1 read-write value1 DOUTx = shift data value #00 value2 DOUTx = inverted shift data value #01 DSM Data Shift Mode 2 1 read-write value1 Receive and transmit data is shifted in and out one bit at a time through DX0 and DOUT0. #00 value3 Receive and transmit data is shifted in and out two bits at a time through two input stages (DX0 and DX3) and DOUT[1:0] respectively. #10 value4 Receive and transmit data is shifted in and out four bits at a time through four input stages (DX0, DX[5:3]) and DOUT[3:0] respectively. #11 FLE Frame Length 16 5 read-write HPCDIR Port Control Direction 4 read-write value1 The pin(s) with hardware pin control enabled are selected to be in input mode. #0 value2 The pin(s) with hardware pin control enabled are selected to be in output mode. #1 PDL Passive Data Level 1 read-write value1 The passive data level is 0. #0 value2 The passive data level is 1. #1 SDIR Shift Direction 0 read-write value1 Shift LSB first. The first data bit of a data word is located at bit position 0. #0 value2 Shift MSB first. The first data bit of a data word is located at the bit position given by bit field SCTR.WLE. #1 TRM Transmission Mode 8 1 read-write value1 The shift control signal is considered as inactive and data frame transfers are not possible. #00 value2 The shift control signal is considered active if it is at 1-level. This is the setting to be programmed to allow data transfers. #01 value3 The shift control signal is considered active if it is at 0-level. It is recommended to avoid this setting and to use the inversion in the DX2 stage in case of a low-active signal. #10 value4 The shift control signal is considered active without referring to the actual signal level. Data frame transfer is possible after each edge of the signal. #11 WLE Word Length 24 3 read-write value1 The data word contains 1 data bit located at bit position 0. 0x0 value2 The data word contains 2 data bits located at bit positions [1:0]. 0x1 value3 The data word contains 15 data bits located at bit positions [14:0]. 0xE value4 The data word contains 16 data bits located at bit positions [15:0]. 0xF TBCTR Transmitter Buffer Control Register 0x108 32 read-write n 0x0 0x0 ATBINP Alternative Transmit Buffer Interrupt Node Pointer 19 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 DPTR Data Pointer 0 5 write-only LIMIT Limit For Interrupt Generation 8 5 read-write LOF Buffer Event on Limit Overflow 28 read-write value1 A standard transmit buffer event occurs when the filling level equals the limit value and gets lower due to transmission of a data word. #0 value2 A standard transmit buffer interrupt event occurs when the filling level equals the limit value and gets bigger due to a write access to a data input location INx. #1 SIZE Buffer Size 24 2 read-write value1 The FIFO mechanism is disabled. The buffer does not accept any request for data. #000 value2 The FIFO buffer contains 2 entries. #001 value3 The FIFO buffer contains 4 entries. #010 value4 The FIFO buffer contains 8 entries. #011 value5 The FIFO buffer contains 16 entries. #100 value6 The FIFO buffer contains 32 entries. #101 value7 The FIFO buffer contains 64 entries. #110 STBIEN Standard Transmit Buffer Interrupt Enable 30 read-write value1 The standard transmit buffer interrupt generation is disabled. #0 value2 The standard transmit buffer interrupt generation is enabled. #1 STBINP Standard Transmit Buffer Interrupt Node Pointer 16 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 STBTEN Standard Transmit Buffer Trigger Enable 15 read-write value1 The standard transmit buffer event trigger through bit TRBSR.STBT is disabled. #0 value2 The standard transmit buffer event trigger through bit TRBSR.STBT is enabled. #1 STBTM Standard Transmit Buffer Trigger Mode 14 read-write value1 Trigger mode 0: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.LIMIT. #0 value2 Trigger mode 1: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.SIZE. #1 TBERIEN Transmit Buffer Error Interrupt Enable 31 read-write value1 The transmit buffer error interrupt generation is disabled. #0 value2 The transmit buffer error interrupt generation is enabled. #1 TBUF[0] Transmit Buffer 0x100 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[10] Transmit Buffer 0x6DC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[11] Transmit Buffer 0x788 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[12] Transmit Buffer 0x838 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[13] Transmit Buffer 0x8EC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[14] Transmit Buffer 0x9A4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[15] Transmit Buffer 0xA60 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[16] Transmit Buffer 0xB20 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[17] Transmit Buffer 0xBE4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[18] Transmit Buffer 0xCAC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[19] Transmit Buffer 0xD78 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[1] Transmit Buffer 0x184 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[20] Transmit Buffer 0xE48 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[21] Transmit Buffer 0xF1C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[22] Transmit Buffer 0xFF4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[23] Transmit Buffer 0x10D0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[24] Transmit Buffer 0x11B0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[25] Transmit Buffer 0x1294 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[26] Transmit Buffer 0x137C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[27] Transmit Buffer 0x1468 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[28] Transmit Buffer 0x1558 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[29] Transmit Buffer 0x164C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[2] Transmit Buffer 0x20C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[30] Transmit Buffer 0x1744 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[31] Transmit Buffer 0x1840 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[3] Transmit Buffer 0x298 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[4] Transmit Buffer 0x328 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[5] Transmit Buffer 0x3BC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[6] Transmit Buffer 0x454 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[7] Transmit Buffer 0x4F0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[8] Transmit Buffer 0x590 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[9] Transmit Buffer 0x634 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TCSR Transmit Control/Status Register 0x38 32 read-write n 0x0 0x0 EOF End Of Frame 6 read-write value1 The data word in TBUF is not considered as last word of an SSC frame. #0 value2 The data word in TBUF is considered as last word of an SSC frame. #1 FLEMD FLE Mode 2 read-write value1 The automatic update of FLE is disabled. #0 value2 The automatic update of FLE is enabled. #1 HPCMD Hardware Port Control Mode 4 read-write value1 The automatic update of bits SCTR.DSM and SCTR.HPCDIR is disabled. #0 value2 The automatic update of bits SCTR.DSM and SCTR.HPCDIR is enabled. #1 SELMD Select Mode 1 read-write value1 The automatic update of PCR.CTR[23:16] is disabled. #0 value2 The automatic update of PCR.CTR[23:16] is disabled. #1 SOF Start Of Frame 5 read-write value1 The data word in TBUF is not considered as first word of a frame. #0 value2 The data word in TBUF is considered as first word of a frame. A currently running frame is finished and MSLS becomes deactivated (respecting the programmed delays). #1 TDEN TBUF Data Enable 10 1 read-write value1 A transmission start of the data word in TBUF is disabled. If a transmission is started, the passive data level is sent out. #00 value2 A transmission of the data word in TBUF can be started if TDV = 1. #01 value3 A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 0. #10 value4 A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 1. #11 TDSSM TBUF Data Single Shot Mode 8 read-write value1 The data word in TBUF is not considered as invalid after it has been loaded into the transmit shift register. The loading of the TBUF data into the shift register does not clear TDV. #0 value2 The data word in TBUF is considered as invalid after it has been loaded into the shift register. In ASC and IIC mode, TDV is cleared with the TBI event, whereas in SSC and IIS mode, it is cleared with the RSI event. TDSSM = 1 has to be programmed if an optional data buffer is used. #1 TDV Transmit Data Valid 7 read-only value1 The data word in TBUF is not valid for transmission. #0 value2 The data word in TBUF is valid for transmission and a transmission start is possible. New data should not be written to a TBUFx input location while TDV = 1. #1 TDVTR TBUF Data Valid Trigger 12 read-write value1 Bit TCSR.TE is permanently set. #0 value2 Bit TCSR.TE is set if DX2T becomes active while TDV = 1. #1 TE Trigger Event 28 read-only value1 The trigger event has not yet been detected. A transmission of the data word in TBUF can not be started. #0 value2 The trigger event has been detected (or the trigger mechanism is switched off) and a transmission of the data word in TBUF can not be started. #1 TSOF Transmitted Start Of Frame 24 read-only value1 The latest data word transmission has not been started for the first word of a data frame. #0 value2 The latest data word transmission has been started for the first word of a data frame. #1 TV Transmission Valid 26 read-only value1 The latest start of a data word transmission has taken place while no valid data was available. As a result, the transmission of a data words with passive level (SCTR.PDL) has been started. #0 value2 The latest start of a data word transmission has taken place with valid data from TBUF. #1 TVC Transmission Valid Cumulated 27 read-only value1 Since TVC has been set, at least one data buffer underflow condition has occurred. #0 value2 Since TVC has been set, no data buffer underflow condition has occurred. #1 WA Word Address 13 read-write value1 The data word in TBUF will be transmitted after a falling edge of WA has been detected (referring to PSR.WA). #0 value2 The data word in TBUF will be transmitted after a rising edge of WA has been detected (referring to PSR.WA). #1 WAMD WA Mode 3 read-write value1 The automatic update of bit WA is disabled. #0 value2 The automatic update of bit WA is enabled. #1 WLEMD WLE Mode 0 read-write value1 The automatic update of SCTR.WLE and TCSR.EOF is disabled. #0 value2 The automatic update of SCTR.WLE and TCSR.EOF is enabled. #1 TRBPTR Transmit/Receive Buffer Pointer Register 0x110 32 read-write n 0x0 0x0 RDIPTR Receiver Data Input Pointer 16 5 read-only RDOPTR Receiver Data Output Pointer 24 5 read-only TDIPTR Transmitter Data Input Pointer 0 5 read-only TDOPTR Transmitter Data Output Pointer 8 5 read-only TRBSCR Transmit/Receive Buffer Status Clear Register 0x118 32 read-write n 0x0 0x0 CARBI Clear Alternative Receive Buffer Event 2 write-only value1 No effect. #0 value2 Clear TRBSR.ARBI. #1 CBDV Clear Bypass Data Valid 10 write-only value1 No effect. #0 value2 Clear BYPCR.BDV. #1 CRBERI Clear Receive Buffer Error Event 1 write-only value1 No effect. #0 value2 Clear TRBSR.RBERI. #1 CSRBI Clear Standard Receive Buffer Event 0 write-only value1 No effect. #0 value2 Clear TRBSR.SRBI. #1 CSTBI Clear Standard Transmit Buffer Event 8 write-only value1 No effect. #0 value2 Clear TRBSR.STBI. #1 CTBERI Clear Transmit Buffer Error Event 9 write-only value1 No effect. #0 value2 Clear TRBSR.TBERI. #1 FLUSHRB Flush Receive Buffer 14 write-only value1 No effect. #0 value2 The receive FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic. #1 FLUSHTB Flush Transmit Buffer 15 write-only value1 No effect. #0 value2 The transmit FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic. #1 TRBSR Transmit/Receive Buffer Status Register 0x114 32 read-write n 0x0 0x0 ARBI Alternative Receive Buffer Event 2 read-write value1 An alternative receive buffer event has not been detected. #0 value2 An alternative receive buffer event has been detected. #1 RBERI Receive Buffer Error Event 1 read-write value1 A receive buffer error event has not been detected. #0 value2 A receive buffer error event has been detected. #1 RBFLVL Receive Buffer Filling Level 16 6 read-only RBUS Receive Buffer Busy 5 read-only value1 The receive buffer information has been completely updated. #0 value2 The OUTR update from the FIFO memory is ongoing. A read from OUTR will be delayed. FIFO pointers from the previous read are not yet updated. #1 REMPTY Receive Buffer Empty 3 read-only value1 The receive buffer is not empty. #0 value2 The receive buffer is empty. #1 RFULL Receive Buffer Full 4 read-only value1 The receive buffer is not full. #0 value2 The receive buffer is full. #1 SRBI Standard Receive Buffer Event 0 read-write value1 A standard receive buffer event has not been detected. #0 value2 A standard receive buffer event has been detected. #1 SRBT Standard Receive Buffer Event Trigger 6 read-only value1 A standard receive buffer event is not triggered using this bit. #0 value2 A standard receive buffer event is triggered using this bit. #1 STBI Standard Transmit Buffer Event 8 read-write value1 A standard transmit buffer event has not been detected. #0 value2 A standard transmit buffer event has been detected. #1 STBT Standard Transmit Buffer Event Trigger 14 read-only value1 A standard transmit buffer event is not triggered using this bit. #0 value2 A standard transmit buffer event is triggered using this bit. #1 TBERI Transmit Buffer Error Event 9 read-write value1 A transmit buffer error event has not been detected. #0 value2 A transmit buffer error event has been detected. #1 TBFLVL Transmit Buffer Filling Level 24 6 read-only TBUS Transmit Buffer Busy 13 read-only value1 The transmit buffer information has been completely updated. #0 value2 The FIFO memory update after write to INx is ongoing. A write to INx will be delayed. FIFO pointers from the previous INx write are not yet updated. #1 TEMPTY Transmit Buffer Empty 11 read-only value1 The transmit buffer is not empty. #0 value2 The transmit buffer is empty. #1 TFULL Transmit Buffer Full 12 read-only value1 The transmit buffer is not full. #0 value2 The transmit buffer is full. #1 USIC1 Universal Serial Interface Controller 1 USIC 0x0 0x0 0x4 registers n USIC1_0 Universal Serial Interface Channel (Module 1) 90 USIC1_1 Universal Serial Interface Channel (Module 1) 91 USIC1_2 Universal Serial Interface Channel (Module 1) 92 USIC1_3 Universal Serial Interface Channel (Module 1) 93 USIC1_4 Universal Serial Interface Channel (Module 1) 94 USIC1_5 Universal Serial Interface Channel (Module 1) 95 ID Module Identification Register 0x0 32 read-write n 0x0 0x0 MOD_NUMBER Module Number Value 16 15 read-only MOD_REV Module Revision Number 0 7 read-only MOD_TYPE Module Type 8 7 read-only USIC1_CH0 Universal Serial Interface Controller 1 USIC 0x0 0x0 0x200 registers n BRG Baud Rate Generator Register 0x14 32 read-write n 0x0 0x0 CLKSEL Clock Selection 0 1 read-write value1 The fractional divider frequency fFD is selected. #00 value3 The trigger signal DX1T defines fPIN. Signal MCLK toggles with fPIN. #10 value4 Signal MCLK corresponds to the DX1S signal and the frequency fPIN is derived from the rising edges of DX1S. #11 CTQSEL Input Selection for CTQ 6 1 read-write value1 fCTQIN = fPDIV #00 value2 fCTQIN = fPPP #01 value3 fCTQIN = fSCLK #10 value4 fCTQIN = fMCLK #11 DCTQ Denominator for Time Quanta Counter 10 4 read-write MCLKCFG Master Clock Configuration 29 read-write value1 The passive level is 0. #0 value2 The passive level is 1. #1 PCTQ Pre-Divider for Time Quanta Counter 8 1 read-write PDIV Divider Mode: Divider Factor to Generate fPDIV 16 9 read-write PPPEN Enable 2:1 Divider for fPPP 4 read-write value1 The 2:1 divider for fPPP is disabled. fPPP = fPIN #0 value2 The 2:1 divider for fPPP is enabled. fPPP = fMCLK = fPIN / 2. #1 SCLKCFG Shift Clock Output Configuration 30 1 read-write value1 The passive level is 0 and the delay is disabled. #00 value2 The passive level is 1 and the delay is disabled. #01 value3 The passive level is 0 and the delay is enabled. #10 value4 The passive level is 1 and the delay is enabled. #11 SCLKOSEL Shift Clock Output Select 28 read-write value1 SCLK from the baud rate generator is selected as the SCLKOUT input source. #0 value2 The transmit shift clock from DX1 input stage is selected as the SCLKOUT input source. #1 TMEN Timing Measurement Enable 3 read-write value1 Timing measurement is disabled: The trigger signals DX0T and DX1T are ignored. #0 value2 Timing measurement is enabled: The 10-bit counter is incremented by 1 with fPPP and stops counting when reaching its maximum value. If one of the trigger signals DX0T or DX1T become active, the counter value is captured into bit field CTV, the counter is cleared and a transmit shift event is generated. #1 BYP Bypass Data Register 0x100 32 read-write n 0x0 0x0 BDATA Bypass Data 0 15 read-write BYPCR Bypass Control Register 0x104 32 read-write n 0x0 0x0 BDEN Bypass Data Enable 10 1 read-write value1 The transfer of bypass data is disabled. #00 value2 The transfer of bypass data to TBUF is possible. Bypass data will be transferred to TBUF according to its priority if BDV = 1. #01 value3 Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 0. #10 value4 Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 1. #11 BDSSM Bypass Data Single Shot Mode 8 read-write value1 The bypass data is still considered as valid after it has been loaded into TBUF. The loading of the data into TBUF does not clear BDV. #0 value2 The bypass data is considered as invalid after it has been loaded into TBUF. The loading of the data into TBUF clears BDV. #1 BDV Bypass Data Valid 15 read-only value1 The bypass data is not valid. #0 value2 The bypass data is valid. #1 BDVTR Bypass Data Valid Trigger 12 read-write value1 Bit BDV is not influenced by DX2T. #0 value2 Bit BDV is set if DX2T is active. #1 BHPC Bypass Hardware Port Control 21 2 read-write BPRIO Bypass Priority 13 read-write value1 The transmit FIFO data has a higher priority than the bypass data. #0 value2 The bypass data has a higher priority than the transmit FIFO data. #1 BSELO Bypass Select Outputs 16 4 read-write BWLE Bypass Word Length 0 3 read-write CCFG Channel Configuration Register 0x4 32 read-write n 0x0 0x0 ASC ASC Protocol Available 1 read-only value1 The ASC protocol is not available. #0 value2 The ASC protocol is available. #1 IIC IIC Protocol Available 2 read-only value1 The IIC protocol is not available. #0 value2 The IIC protocol is available. #1 IIS IIS Protocol Available 3 read-only value1 The IIS protocol is not available. #0 value2 The IIS protocol is available. #1 RB Receive FIFO Buffer Available 6 read-only value1 A receive FIFO buffer is not available. #0 value2 A receive FIFO buffer is available. #1 SSC SSC Protocol Available 0 read-only value1 The SSC protocol is not available. #0 value2 The SSC protocol is available. #1 TB Transmit FIFO Buffer Available 7 read-only value1 A transmit FIFO buffer is not available. #0 value2 A transmit FIFO buffer is available. #1 CCR Channel Control Register 0x40 32 read-write n 0x0 0x0 AIEN Alternative Receive Interrupt Enable 15 read-write value1 The alternative receive interrupt is disabled. #0 value2 The alternative receive interrupt is enabled. In case of an alternative receive event, the service request output SRx indicated by INPR.AINP is activated. #1 BRGIEN Baud Rate Generator Interrupt Enable 16 read-write value1 The baud rate generator interrupt is disabled. #0 value2 The baud rate generator interrupt is enabled. In case of a baud rate generator event, the service request output SRx indicated by INPR.PINP is activated. #1 DLIEN Data Lost Interrupt Enable 11 read-write value1 The data lost interrupt is disabled. #0 value2 The data lost interrupt is enabled. In case of a data lost event, the service request output SRx indicated by INPR.PINP is activated. #1 HPCEN Hardware Port Control Enable 6 1 read-write value1 The hardware port control is disabled. #00 value2 The hardware port control is enabled for DX0 and DOUT0. #01 value3 The hardware port control is enabled for DX3, DX0 and DOUT[1:0]. #10 value4 The hardware port control is enabled for DX0, DX[5:3] and DOUT[3:0]. #11 MODE Operating Mode 0 3 read-write value1 The USIC channel is disabled. All protocol-related state machines are set to an idle state. 0x0 value2 The SSC (SPI) protocol is selected. 0x1 value3 The ASC (SCI, UART) protocol is selected. 0x2 value4 The IIS protocol is selected. 0x3 value5 The IIC protocol is selected. 0x4 PM Parity Mode 8 1 read-write value1 The parity generation is disabled. #00 value3 Even parity is selected (parity bit = 1 on odd number of 1s in data, parity bit = 0 on even number of 1s in data). #10 value4 Odd parity is selected (parity bit = 0 on odd number of 1s in data, parity bit = 1 on even number of 1s in data). #11 RIEN Receive Interrupt Enable 14 read-write value1 The receive interrupt is disabled. #0 value2 The receive interrupt is enabled. In case of a receive event, the service request output SRx indicated by INPR.RINP is activated. #1 RSIEN Receiver Start Interrupt Enable 10 read-write value1 The receiver start interrupt is disabled. #0 value2 The receiver start interrupt is enabled. In case of a receiver start event, the service request output SRx indicated by INPR.TBINP is activated. #1 TBIEN Transmit Buffer Interrupt Enable 13 read-write value1 The transmit buffer interrupt is disabled. #0 value2 The transmit buffer interrupt is enabled. In case of a transmit buffer event, the service request output SRx indicated by INPR.TBINP is activated. #1 TSIEN Transmit Shift Interrupt Enable 12 read-write value1 The transmit shift interrupt is disabled. #0 value2 The transmit shift interrupt is enabled. In case of a transmit shift interrupt event, the service request output SRx indicated by INPR.TSINP is activated. #1 CMTR Capture Mode Timer Register 0x44 32 read-write n 0x0 0x0 CTV Captured Timer Value 0 9 read-write DX0CR Input Control Register 0 0x1C 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX1CR Input Control Register 1 0x20 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DX1T. #01 value3 A falling edge activates DX1T. #10 value4 Both edges activate DX1T. #11 DCEN Delay Compensation Enable 3 read-write value1 The receive shift clock is dependent on INSW selection. #0 value2 The receive shift clock is connected to the selected data input line. This setting is used if delay compensation is required in SSC and IIS protocols, else DCEN should always be 0. #1 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DX1A is selected. #000 value2 The data input DX1B is selected. #001 value3 The data input DX1C is selected. #010 value4 The data input DX1D is selected. #011 value5 The data input DX1E is selected. #100 value6 The data input DX1F is selected. #101 value7 The data input DX1G is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DX1S is 0. #0 value2 The current value of DX1S is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX2CR Input Control Register 2 0x24 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX3CR Input Control Register 3 0x28 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX4CR Input Control Register 4 0x2C 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX5CR Input Control Register 5 0x30 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 FDR Fractional Divider Register 0x10 32 read-write n 0x0 0x0 DM Divider Mode 14 1 read-write value1 The divider is switched off, fFD = 0. #00 value2 Normal divider mode selected. #01 value3 Fractional divider mode selected. #10 value4 The divider is switched off, fFD = 0. #11 RESULT Result Value 16 9 read-only STEP Step Value 0 9 read-write FMR Flag Modification Register 0x68 32 read-write n 0x0 0x0 ATVC Activate Bit TVC 4 write-only value1 No action. #0 value2 Bit TCSR.TVC is set. #1 CRDV0 Clear Bits RDV for RBUF0 14 write-only value1 No action. #0 value2 Bits RBUF01SR.RDV00 and RBUF01SR.RDV10 are cleared. #1 CRDV1 Clear Bit RDV for RBUF1 15 write-only value1 No action. #0 value2 Bits RBUF01SR.RDV01 and RBUF01SR.RDV11 are cleared. #1 MTDV Modify Transmit Data Valid 0 1 write-only value1 No action. #00 value2 Bit TDV is set, TE is unchanged. #01 value3 Bits TDV and TE are cleared. #10 SIO0 Set Interrupt Output SRx 16 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO1 Set Interrupt Output SRx 17 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO2 Set Interrupt Output SRx 18 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO3 Set Interrupt Output SRx 19 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO4 Set Interrupt Output SRx 20 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO5 Set Interrupt Output SRx 21 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 INPR Interrupt Node Pointer Register 0x18 32 read-write n 0x0 0x0 AINP Alternative Receive Interrupt Node Pointer 12 2 read-write PINP Transmit Shift Interrupt Node Pointer 16 2 read-write RINP Receive Interrupt Node Pointer 8 2 read-write TBINP Transmit Buffer Interrupt Node Pointer 4 2 read-write TSINP Transmit Shift Interrupt Node Pointer 0 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 IN[0] Transmit FIFO Buffer 0x300 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[10] Transmit FIFO Buffer 0x12DC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[11] Transmit FIFO Buffer 0x1488 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[12] Transmit FIFO Buffer 0x1638 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[13] Transmit FIFO Buffer 0x17EC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[14] Transmit FIFO Buffer 0x19A4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[15] Transmit FIFO Buffer 0x1B60 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[16] Transmit FIFO Buffer 0x1D20 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[17] Transmit FIFO Buffer 0x1EE4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[18] Transmit FIFO Buffer 0x20AC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[19] Transmit FIFO Buffer 0x2278 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[1] Transmit FIFO Buffer 0x484 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[20] Transmit FIFO Buffer 0x2448 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[21] Transmit FIFO Buffer 0x261C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[22] Transmit FIFO Buffer 0x27F4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[23] Transmit FIFO Buffer 0x29D0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[24] Transmit FIFO Buffer 0x2BB0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[25] Transmit FIFO Buffer 0x2D94 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[26] Transmit FIFO Buffer 0x2F7C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[27] Transmit FIFO Buffer 0x3168 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[28] Transmit FIFO Buffer 0x3358 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[29] Transmit FIFO Buffer 0x354C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[2] Transmit FIFO Buffer 0x60C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[30] Transmit FIFO Buffer 0x3744 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[31] Transmit FIFO Buffer 0x3940 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[3] Transmit FIFO Buffer 0x798 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[4] Transmit FIFO Buffer 0x928 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[5] Transmit FIFO Buffer 0xABC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[6] Transmit FIFO Buffer 0xC54 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[7] Transmit FIFO Buffer 0xDF0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[8] Transmit FIFO Buffer 0xF90 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[9] Transmit FIFO Buffer 0x1134 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only KSCFG Kernel State Configuration Register 0xC 32 read-write n 0x0 0x0 BPMODEN Bit Protection for MODEN 1 write-only value1 MODEN is not changed. #0 value2 MODEN is updated with the written value. #1 BPNOM Bit Protection for NOMCFG 7 write-only value1 NOMCFG is not changed. #0 value2 NOMCFG is updated with the written value. #1 BPSUM Bit Protection for SUMCFG 11 write-only value1 SUMCFG is not changed. #0 value2 SUMCFG is updated with the written value. #1 MODEN Module Enable 0 read-write value1 The module is switched off immediately (without respecting a stop condition). It does not react on mode control actions and the module clock is switched off. The module does not react on read accesses and ignores write accesses (except to KSCFG). #0 value2 The module is switched on and can operate. After writing 1 to MODEN, it is recommended to read register KSCFG to avoid pipeline effects in the control block before accessing other Service Request Processing registers. #1 NOMCFG Normal Operation Mode Configuration 4 1 read-write value1 Run mode 0 is selected. #00 value2 Run mode 1 is selected. #01 value3 Stop mode 0 is selected. #10 value4 Stop mode 1 is selected. #11 SUMCFG Suspend Mode Configuration 8 1 read-write OUTDR Receiver Buffer Output Register L for Debugger 0x120 32 read-write n 0x0 0x0 DSR Data from Shift Register 0 15 read-only RCI Receive Control Information from Shift Register 16 4 read-only OUTR Receiver Buffer Output Register 0x11C 32 read-write n 0x0 0x0 modifyExternal DSR Received Data 0 15 read-only RCI Receiver Control Information 16 4 read-only PCR Protocol Control Register 0x3C 32 read-write n 0x0 0x0 CTR0 Protocol Control Bit 0 0 read-write CTR1 Protocol Control Bit 1 1 read-write CTR10 Protocol Control Bit 10 10 read-write CTR11 Protocol Control Bit 11 11 read-write CTR12 Protocol Control Bit 12 12 read-write CTR13 Protocol Control Bit 13 13 read-write CTR14 Protocol Control Bit 14 14 read-write CTR15 Protocol Control Bit 15 15 read-write CTR16 Protocol Control Bit 16 16 read-write CTR17 Protocol Control Bit 17 17 read-write CTR18 Protocol Control Bit 18 18 read-write CTR19 Protocol Control Bit 19 19 read-write CTR2 Protocol Control Bit 2 2 read-write CTR20 Protocol Control Bit 20 20 read-write CTR21 Protocol Control Bit 21 21 read-write CTR22 Protocol Control Bit 22 22 read-write CTR23 Protocol Control Bit 23 23 read-write CTR24 Protocol Control Bit 24 24 read-write CTR25 Protocol Control Bit 25 25 read-write CTR26 Protocol Control Bit 26 26 read-write CTR27 Protocol Control Bit 27 27 read-write CTR28 Protocol Control Bit 28 28 read-write CTR29 Protocol Control Bit 29 29 read-write CTR3 Protocol Control Bit 3 3 read-write CTR30 Protocol Control Bit 30 30 read-write CTR31 Protocol Control Bit 31 31 read-write CTR4 Protocol Control Bit 4 4 read-write CTR5 Protocol Control Bit 5 5 read-write CTR6 Protocol Control Bit 6 6 read-write CTR7 Protocol Control Bit 7 7 read-write CTR8 Protocol Control Bit 8 8 read-write CTR9 Protocol Control Bit 9 9 read-write PCR_ASCMode Protocol Control Register [ASC Mode] PCR 0x3C 32 read-write n 0x0 0x0 CDEN Collision Detection Enable 4 read-write value1 The collision detection is disabled. #0 value2 If a collision is detected, the transmitter stops its data transmission, outputs a 1, sets bit PSR.COL and generates a protocol interrupt. In order to allow data transmission again, PSR.COL has to be cleared by software. #1 FEIEN Format Error Interrupt Enable 6 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 FFIEN Frame Finished Interrupt Enable 7 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 IDM Idle Detection Mode 2 read-write value1 The bus idle detection is switched off and bits PSR.TXIDLE and PSR.RXIDLE are set automatically to enable data transfers without checking the inputs before. #0 value2 The bus is considered as idle after a number of consecutive passive bit times defined by SCTR.FLE plus 2 (in the case without parity bit) or plus 3 (in the case with parity bit). #1 MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and the MCLK signal is 0. #0 value2 The MCLK generation is enabled. #1 PL Pulse Length 13 2 read-write value1 The pulse length is equal to the bit length (no shortened 0). #000 value2 The pulse length of a 0 bit is 2 time quanta. #001 value3 The pulse length of a 0 bit is 3 time quanta. #010 value4 The pulse length of a 0 bit is 8 time quanta. #111 RNIEN Receiver Noise Detection Interrupt Enable 5 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 RSTEN Receiver Status Enable 16 read-write value1 Flag PSR[9] is not modified depending on the receiver status. #0 value2 Flag PSR[9] is set during the complete reception of a frame. #1 SBIEN Synchronization Break Interrupt Enable 3 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 SMD Sample Mode 0 read-write value1 Only one sample is taken per bit time. The current input value is sampled. #0 value2 Three samples are taken per bit time and a majority decision is made. #1 SP Sample Point 8 4 read-write STPB Stop Bits 1 read-write value1 The number of stop bits is 1. #0 value2 The number of stop bits is 2. #1 TSTEN Transmitter Status Enable 17 read-write value1 Flag PSR[9] is not modified depending on the transmitter status. #0 value2 Flag PSR[9] is set during the complete transmission of a frame. #1 PCR_IICMode Protocol Control Register [IIC Mode] PCR 0x3C 32 read-write n 0x0 0x0 ACK00 Acknowledge 00H 16 read-write value1 The slave device is not sensitive to this address. #0 value2 The slave device is sensitive to this address. #1 ACKIEN Acknowledge Interrupt Enable 30 read-write value1 The acknowledge interrupt is disabled. #0 value2 The acknowledge interrupt is enabled. #1 ARLIEN Arbitration Lost Interrupt Enable 22 read-write value1 The arbitration lost interrupt is disabled. #0 value2 The arbitration lost interrupt is enabled. #1 ERRIEN Error Interrupt Enable 24 read-write value1 The error interrupt is disabled. #0 value2 The error interrupt is enabled. #1 HDEL Hardware Delay 26 3 read-write MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and MCLK is 0. #0 value2 The MCLK generation is enabled. #1 NACKIEN Non-Acknowledge Interrupt Enable 21 read-write value1 The non-acknowledge interrupt is disabled. #0 value2 The non-acknowledge interrupt is enabled. #1 PCRIEN Stop Condition Received Interrupt Enable 20 read-write value1 The stop condition interrupt is disabled. #0 value2 The stop condition interrupt is enabled. #1 RSCRIEN Repeated Start Condition Received Interrupt Enable 19 read-write value1 The repeated start condition interrupt is disabled. #0 value2 The repeated start condition interrupt is enabled. #1 SACKDIS Slave Acknowledge Disable 25 read-write value1 The generation of an active slave acknowledge is enabled (slave acknowledge with 0 level = more bytes can be received). #0 value2 The generation of an active slave acknowledge is disabled (slave acknowledge with 1 level = reception stopped). #1 SCRIEN Start Condition Received Interrupt Enable 18 read-write value1 The start condition interrupt is disabled. #0 value2 The start condition interrupt is enabled. #1 SLAD Slave Address 0 15 read-write SRRIEN Slave Read Request Interrupt Enable 23 read-write value1 The slave read request interrupt is disabled. #0 value2 The slave read request interrupt is enabled. #1 STIM Symbol Timing 17 read-write value1 A symbol contains 10 time quanta. The timing is adapted for standard mode (100 kBaud). #0 value2 A symbol contains 25 time quanta. The timing is adapted for fast mode (400 kBaud). #1 PCR_IISMode Protocol Control Register [IIS Mode] PCR 0x3C 32 read-write n 0x0 0x0 DTEN Data Transfers Enable 1 read-write value1 The changes of the WA input signal are ignored and no transfers take place. #0 value2 Transfers are enabled. #1 DX2TIEN DX2T Interrupt Enable 15 read-write value1 A protocol interrupt is not generated if DX2T is active. #0 value2 A protocol interrupt is generated if DX2T is active. #1 ENDIEN END Interrupt Enable 6 read-write value1 A protocol interrupt is not activated. #0 value2 A protocol interrupt is activated. #1 MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and MCLK is 0. #0 value2 The MCLK generation is enabled. #1 SELINV Select Inversion 2 read-write value1 The SELOx outputs have the same polarity as the WA signal. #0 value2 The SELOx outputs have the inverted polarity to the WA signal. #1 TDEL Transfer Delay 16 5 read-write WAFEIEN WA Falling Edge Interrupt Enable 4 read-write value1 A protocol interrupt is not activated if a falling edge of WA is generated. #0 value2 A protocol interrupt is activated if a falling edge of WA is generated. #1 WAGEN WA Generation Enable 0 read-write value1 The IIS can be used as slave. The generation of the word address signal is disabled. The output signal WA is 0. The MCLKO signal generation depends on PCR.MCLK. #0 value2 The IIS can be used as master. The generation of the word address signal is enabled. The signal starts with a 0 after being enabled. The generation of MCLK is enabled, independent of PCR.MCLK. After clearing WAGEN, the USIC module stops the generation of the WA signal within the next 4 WA periods. #1 WAREIEN WA Rising Edge Interrupt Enable 5 read-write value1 A protocol interrupt is not activated if a rising edge of WA is generated. #0 value2 A protocol interrupt is activated if a rising edge of WA is generated. #1 PCR_SSCMode Protocol Control Register [SSC Mode] PCR 0x3C 32 read-write n 0x0 0x0 CTQSEL1 Input Frequency Selection 4 1 read-write value1 fCTQIN = fPDIV #00 value2 fCTQIN = fPPP #01 value3 fCTQIN = fSCLK #10 value4 fCTQIN = fMCLK #11 DCTQ1 Divider Factor DCTQ1 for Tiw and Tnf 8 4 read-write DX2TIEN DX2T Interrupt Enable 15 read-write value1 A protocol interrupt is not generated if DX2T is activated. #0 value2 A protocol interrupt is generated if DX2T is activated. #1 FEM Frame End Mode 3 read-write value1 The current data frame is considered as finished when the last bit of a data word has been sent out and the transmit buffer TBUF does not contain new data (TDV = 0). #0 value2 The MSLS signal is kept active also while no new data is available and no other end of frame condition is reached. In this case, the software can accept delays in delivering the data without automatic deactivation of MSLS in multi-word data frames. #1 MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and output MCLK = 0. #0 value2 The MCLK generation is enabled. #1 MSLSEN MSLS Enable 0 read-write value1 The MSLS generation is disabled (MSLS = 0). This is the setting for SSC slave mode. #0 value2 The MSLS generation is enabled. This is the setting for SSC master mode. #1 MSLSIEN MSLS Interrupt Enable 14 read-write value1 A protocol interrupt is not generated if a change of signal MSLS is detected. #0 value2 A protocol interrupt is generated if a change of signal MSLS is detected. #1 PARIEN Parity Error Interrupt Enable 13 read-write value1 A protocol interrupt is not generated with the detection of a parity error. #0 value2 A protocol interrupt is generated with the detection of a parity error. #1 PCTQ1 Divider Factor PCTQ1 for Tiw and Tnf 6 1 read-write SELCTR Select Control 1 read-write value1 The coded select mode is enabled. #0 value2 The direct select mode is enabled. #1 SELINV Select Inversion 2 read-write value1 The SELO outputs have the same polarity as the MSLS signal (active high). #0 value2 The SELO outputs have the inverted polarity to the MSLS signal (active low). #1 SELO Select Output 16 7 read-write value1 The corresponding SELOx line cannot be activated. #0 value2 The corresponding SELOx line can be activated (according to the mode selected by SELCTR). #1 SLPHSEL Slave Mode Clock Phase Select 25 read-write value1 Data bits are shifted out with the leading edge of the shift clock signal and latched in with the trailing edge. 0b0 value2 The first data bit is shifted out when the data shift unit receives a low to high transition from the DX2 stage. Subsequent bits are shifted out with the trailing edge of the shift clock signal. Data bits are always latched in with the leading edge. 0b1 TIWEN Enable Inter-Word Delay Tiw 24 read-write value1 No delay between data words of the same frame. #0 value2 The inter-word delay Tiw is enabled and introduced between data words of the same frame. #1 PSCR Protocol Status Clear Register 0x4C 32 read-write n 0x0 0x0 CAIF Clear Alternative Receive Indication Flag 15 write-only value1 No action #0 value2 Flag PSR.AIF is cleared. #1 CBRGIF Clear Baud Rate Generator Indication Flag 16 write-only value1 No action #0 value2 Flag PSR.BRGIF is cleared. #1 CDLIF Clear Data Lost Indication Flag 11 write-only value1 No action #0 value2 Flag PSR.DLIF is cleared. #1 CRIF Clear Receive Indication Flag 14 write-only value1 No action #0 value2 Flag PSR.RIF is cleared. #1 CRSIF Clear Receiver Start Indication Flag 10 write-only value1 No action #0 value2 Flag PSR.RSIF is cleared. #1 CST0 Clear Status Flag 0 in PSR 0 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST1 Clear Status Flag 1 in PSR 1 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST2 Clear Status Flag 2 in PSR 2 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST3 Clear Status Flag 3 in PSR 3 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST4 Clear Status Flag 4 in PSR 4 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST5 Clear Status Flag 5 in PSR 5 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST6 Clear Status Flag 6 in PSR 6 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST7 Clear Status Flag 7 in PSR 7 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST8 Clear Status Flag 8 in PSR 8 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST9 Clear Status Flag 9 in PSR 9 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CTBIF Clear Transmit Buffer Indication Flag 13 write-only value1 No action #0 value2 Flag PSR.TBIF is cleared. #1 CTSIF Clear Transmit Shift Indication Flag 12 write-only value1 No action #0 value2 Flag PSR.TSIF is cleared. #1 PSR Protocol Status Register 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 ST0 Protocol Status Flag 0 0 read-write ST1 Protocol Status Flag 1 1 read-write ST2 Protocol Status Flag 2 2 read-write ST3 Protocol Status Flag 3 3 read-write ST4 Protocol Status Flag 4 4 read-write ST5 Protocol Status Flag 5 5 read-write ST6 Protocol Status Flag 6 6 read-write ST7 Protocol Status Flag 7 7 read-write ST8 Protocol Status Flag 8 8 read-write ST9 Protocol Status Flag 9 9 read-write TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 PSR_ASCMode Protocol Status Register [ASC Mode] PSR 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 BUSY Transfer Status BUSY 9 read-only value1 A data transfer does not take place. #0 value2 A data transfer currently takes place. #1 COL Collision Detected 3 read-write value1 A collision has not yet been detected and frame transmission is possible. #0 value2 A collision has been detected and frame transmission is not possible. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 FER0 Format Error in Stop Bit 0 5 read-write value1 A format error 0 has not been detected. #0 value2 A format error 0 has been detected. #1 FER1 Format Error in Stop Bit 1 6 read-write value1 A format error 1 has not been detected. #0 value2 A format error 1 has been detected. #1 RFF Receive Frame Finished 7 read-write value1 The received frame is not yet finished. #0 value2 The received frame is finished. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RNS Receiver Noise Detected 4 read-write value1 Receiver noise has not been detected. #0 value2 Receiver noise has been detected. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 RXIDLE Reception Idle 1 read-write value1 The receiver line has not yet been idle. #0 value2 The receiver line has been idle and frame reception is possible. #1 SBD Synchronization Break Detected 2 read-write value1 A synchronization break has not yet been detected. #0 value2 A synchronization break has been detected. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TFF Transmitter Frame Finished 8 read-write value1 The transmitter frame is not yet finished. #0 value2 The transmitter frame is finished. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 TXIDLE Transmission Idle 0 read-write value1 The transmitter line has not yet been idle. #0 value2 The transmitter line has been idle and frame transmission is possible. #1 PSR_IICMode Protocol Status Register [IIC Mode] PSR 0x48 32 read-write n 0x0 0x0 ACK Acknowledge Received 9 read-write value1 An acknowledge has not been received. #0 value2 An acknowledge has been received. #1 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 ARL Arbitration Lost 6 read-write value1 An arbitration has not been lost. #0 value2 An arbitration has been lost. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 ERR Error 8 read-write value1 An IIC error has not been detected. #0 value2 An IIC error has been detected. #1 NACK Non-Acknowledge Received 5 read-write value1 A non-acknowledge has not been received. #0 value2 A non-acknowledge has been received. #1 PCR Stop Condition Received 4 read-write value1 A stop condition has not yet been detected. #0 value2 A stop condition has been detected. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSCR Repeated Start Condition Received 3 read-write value1 A repeated start condition has not yet been detected. #0 value2 A repeated start condition has been detected. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 SCR Start Condition Received 2 read-write value1 A start condition has not yet been detected. #0 value2 A start condition has been detected. #1 SLSEL Slave Select 0 read-write value1 The device is not selected as slave. #0 value2 The device is selected as slave. #1 SRR Slave Read Request 7 read-write value1 A slave read request has not been detected. #0 value2 A slave read request has been detected. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 WTDF Wrong TDF Code Found 1 read-write value1 A wrong TDF code has not been found. #0 value2 A wrong TDF code has been found. #1 PSR_IISMode Protocol Status Register [IIS Mode] PSR 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 DX2S DX2S Status 1 read-write value1 DX2S is 0. #0 value2 DX2S is 1. #1 DX2TEV DX2T Event Detected 3 read-write value1 The DX2T signal has not been activated. #0 value2 The DX2T signal has been activated. #1 END WA Generation End 6 read-write value1 The WA generation has not yet ended (if it is running and WAGEN has been cleared). #0 value2 The WA generation has ended (if it has been running). #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 WA Word Address 0 read-write value1 WA has been sampled 0. #0 value2 WA has been sampled 1. #1 WAFE WA Falling Edge Event 4 read-write value1 A WA falling edge has not been generated. #0 value2 A WA falling edge has been generated. #1 WARE WA Rising Edge Event 5 read-write value1 A WA rising edge has not been generated. #0 value2 A WA rising edge has been generated. #1 PSR_SSCMode Protocol Status Register [SSC Mode] PSR 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 DX2S DX2S Status 1 read-write value1 DX2S is 0. #0 value2 DX2S is 1. #1 DX2TEV DX2T Event Detected 3 read-write value1 The DX2T signal has not been activated. #0 value2 The DX2T signal has been activated. #1 MSLS MSLS Status 0 read-write value1 The internal signal MSLS is inactive (0). #0 value2 The internal signal MSLS is active (1). #1 MSLSEV MSLS Event Detected 2 read-write value1 The MSLS signal has not changed its state. #0 value2 The MSLS signal has changed its state. #1 PARERR Parity Error Event Detected 4 read-write value1 A parity error event has not been activated. #0 value2 A parity error event has been activated. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 RBCTR Receiver Buffer Control Register 0x10C 32 read-write n 0x0 0x0 ARBIEN Alternative Receive Buffer Interrupt Enable 29 read-write value1 The alternative receive buffer interrupt generation is disabled. #0 value2 The alternative receive buffer interrupt generation is enabled. #1 ARBINP Alternative Receive Buffer Interrupt Node Pointer 19 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 DPTR Data Pointer 0 5 write-only LIMIT Limit For Interrupt Generation 8 5 read-write LOF Buffer Event on Limit Overflow 28 read-write value1 A standard receive buffer event occurs when the filling level equals the limit value and gets lower due to a read access from OUTR. #0 value2 A standard receive buffer event occurs when the filling level equals the limit value and gets bigger due to the reception of a new data word. #1 RBERIEN Receive Buffer Error Interrupt Enable 31 read-write value1 The receive buffer error interrupt generation is disabled. #0 value2 The receive buffer error interrupt generation is enabled. #1 RCIM Receiver Control Information Mode 22 1 read-write value1 RCI[4] = PERR, RCI[3:0] = WLEN #00 value2 RCI[4] = SOF, RCI[3:0] = WLEN #01 value3 RCI[4] = 0, RCI[3:0] = WLEN #10 value4 RCI[4] = PERR, RCI[3] = PAR, RCI[2:1] = 00B, RCI[0] = SOF #11 RNM Receiver Notification Mode 27 read-write value1 Filling level mode: A standard receive buffer event occurs when the filling level equals the limit value and changes, either due to a read access from OUTR (LOF = 0) or due to a new received data word (LOF = 1). #0 value2 RCI mode: A standard receive buffer event occurs when register OUTR is updated with a new value if the corresponding value in OUTR.RCI[4] = 0. If OUTR.RCI[4] = 1, an alternative receive buffer event occurs instead of the standard receive buffer event. #1 SIZE Buffer Size 24 2 read-write value1 The FIFO mechanism is disabled. The buffer does not accept any request for data. #000 value2 The FIFO buffer contains 2 entries. #001 value3 The FIFO buffer contains 4 entries. #010 value4 The FIFO buffer contains 8 entries. #011 value5 The FIFO buffer contains 16 entries. #100 value6 The FIFO buffer contains 32 entries. #101 value7 The FIFO buffer contains 64 entries. #110 SRBIEN Standard Receive Buffer Interrupt Enable 30 read-write value1 The standard receive buffer interrupt generation is disabled. #0 value2 The standard receive buffer interrupt generation is enabled. #1 SRBINP Standard Receive Buffer Interrupt Node Pointer 16 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 SRBTEN Standard Receive Buffer Trigger Enable 15 read-write value1 The standard receive buffer event trigger through bit TRBSR.SRBT is disabled. #0 value2 The standard receive buffer event trigger through bit TRBSR.SRBT is enabled. #1 SRBTM Standard Receive Buffer Trigger Mode 14 read-write value1 Trigger mode 0: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=RBCTR.LIMIT. #0 value2 Trigger mode 1: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=0. #1 RBUF Receiver Buffer Register 0x54 32 read-write n 0x0 0x0 modifyExternal DSR Received Data 0 15 read-only RBUF0 Receiver Buffer Register 0 0x5C 32 read-write n 0x0 0x0 DSR0 Data of Shift Registers 0[3:0] 0 15 read-only RBUF01SR Receiver Buffer 01 Status Register 0x64 32 read-write n 0x0 0x0 DS0 Data Source 15 read-only value1 The register RBUF contains the data of RBUF0 (same for associated status information). #0 value2 The register RBUF contains the data of RBUF1 (same for associated status information). #1 DS1 Data Source 31 read-only value1 The register RBUF contains the data of RBUF0 (same for associated status information). #0 value2 The register RBUF contains the data of RBUF1 (same for associated status information). #1 PAR0 Protocol-Related Argument in RBUF0 8 read-only PAR1 Protocol-Related Argument in RBUF1 24 read-only PERR0 Protocol-related Error in RBUF0 9 read-only value1 The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt. #0 value2 The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt. #1 PERR1 Protocol-related Error in RBUF1 25 read-only value1 The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt. #0 value2 The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt. #1 RDV00 Receive Data Valid in RBUF0 13 read-only value1 Register RBUF0 does not contain data that has not yet been read out. #0 value2 Register RBUF0 contains data that has not yet been read out. #1 RDV01 Receive Data Valid in RBUF1 14 read-only value1 Register RBUF1 does not contain data that has not yet been read out. #0 value2 Register RBUF1 contains data that has not yet been read out. #1 RDV10 Receive Data Valid in RBUF0 29 read-only value1 Register RBUF0 does not contain data that has not yet been read out. #0 value2 Register RBUF0 contains data that has not yet been read out. #1 RDV11 Receive Data Valid in RBUF1 30 read-only value1 Register RBUF1 does not contain data that has not yet been read out. #0 value2 Register RBUF1 contains data that has not yet been read out. #1 SOF0 Start of Frame in RBUF0 6 read-only value1 The data in RBUF0 has not been the first data word of a data frame. #0 value2 The data in RBUF0 has been the first data word of a data frame. #1 SOF1 Start of Frame in RBUF1 22 read-only value1 The data in RBUF1 has not been the first data word of a data frame. #0 value2 The data in RBUF1 has been the first data word of a data frame. #1 WLEN0 Received Data Word Length in RBUF0 0 3 read-only WLEN1 Received Data Word Length in RBUF1 16 3 read-only value1 One bit has been received. 0x0 value2 Sixteen bits have been received. 0xF RBUF1 Receiver Buffer Register 1 0x60 32 read-write n 0x0 0x0 DSR1 Data of Shift Registers 1[3:0] 0 15 read-only RBUFD Receiver Buffer Register for Debugger 0x58 32 read-write n 0x0 0x0 DSR Data from Shift Register 0 15 read-only RBUFSR Receiver Buffer Status Register 0x50 32 read-write n 0x0 0x0 DS Data Source of RBUF or RBUFD 15 read-only PAR Protocol-Related Argument in RBUF or RBUFD 8 read-only PERR Protocol-related Error in RBUF or RBUFD 9 read-only RDV0 Receive Data Valid in RBUF or RBUFD 13 read-only RDV1 Receive Data Valid in RBUF or RBUFD 14 read-only SOF Start of Frame in RBUF or RBUFD 6 read-only WLEN Received Data Word Length in RBUF or RBUFD 0 3 read-only SCTR Shift Control Register 0x34 32 read-write n 0x0 0x0 DOCFG Data Output Configuration 6 1 read-write value1 DOUTx = shift data value #00 value2 DOUTx = inverted shift data value #01 DSM Data Shift Mode 2 1 read-write value1 Receive and transmit data is shifted in and out one bit at a time through DX0 and DOUT0. #00 value3 Receive and transmit data is shifted in and out two bits at a time through two input stages (DX0 and DX3) and DOUT[1:0] respectively. #10 value4 Receive and transmit data is shifted in and out four bits at a time through four input stages (DX0, DX[5:3]) and DOUT[3:0] respectively. #11 FLE Frame Length 16 5 read-write HPCDIR Port Control Direction 4 read-write value1 The pin(s) with hardware pin control enabled are selected to be in input mode. #0 value2 The pin(s) with hardware pin control enabled are selected to be in output mode. #1 PDL Passive Data Level 1 read-write value1 The passive data level is 0. #0 value2 The passive data level is 1. #1 SDIR Shift Direction 0 read-write value1 Shift LSB first. The first data bit of a data word is located at bit position 0. #0 value2 Shift MSB first. The first data bit of a data word is located at the bit position given by bit field SCTR.WLE. #1 TRM Transmission Mode 8 1 read-write value1 The shift control signal is considered as inactive and data frame transfers are not possible. #00 value2 The shift control signal is considered active if it is at 1-level. This is the setting to be programmed to allow data transfers. #01 value3 The shift control signal is considered active if it is at 0-level. It is recommended to avoid this setting and to use the inversion in the DX2 stage in case of a low-active signal. #10 value4 The shift control signal is considered active without referring to the actual signal level. Data frame transfer is possible after each edge of the signal. #11 WLE Word Length 24 3 read-write value1 The data word contains 1 data bit located at bit position 0. 0x0 value2 The data word contains 2 data bits located at bit positions [1:0]. 0x1 value3 The data word contains 15 data bits located at bit positions [14:0]. 0xE value4 The data word contains 16 data bits located at bit positions [15:0]. 0xF TBCTR Transmitter Buffer Control Register 0x108 32 read-write n 0x0 0x0 ATBINP Alternative Transmit Buffer Interrupt Node Pointer 19 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 DPTR Data Pointer 0 5 write-only LIMIT Limit For Interrupt Generation 8 5 read-write LOF Buffer Event on Limit Overflow 28 read-write value1 A standard transmit buffer event occurs when the filling level equals the limit value and gets lower due to transmission of a data word. #0 value2 A standard transmit buffer interrupt event occurs when the filling level equals the limit value and gets bigger due to a write access to a data input location INx. #1 SIZE Buffer Size 24 2 read-write value1 The FIFO mechanism is disabled. The buffer does not accept any request for data. #000 value2 The FIFO buffer contains 2 entries. #001 value3 The FIFO buffer contains 4 entries. #010 value4 The FIFO buffer contains 8 entries. #011 value5 The FIFO buffer contains 16 entries. #100 value6 The FIFO buffer contains 32 entries. #101 value7 The FIFO buffer contains 64 entries. #110 STBIEN Standard Transmit Buffer Interrupt Enable 30 read-write value1 The standard transmit buffer interrupt generation is disabled. #0 value2 The standard transmit buffer interrupt generation is enabled. #1 STBINP Standard Transmit Buffer Interrupt Node Pointer 16 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 STBTEN Standard Transmit Buffer Trigger Enable 15 read-write value1 The standard transmit buffer event trigger through bit TRBSR.STBT is disabled. #0 value2 The standard transmit buffer event trigger through bit TRBSR.STBT is enabled. #1 STBTM Standard Transmit Buffer Trigger Mode 14 read-write value1 Trigger mode 0: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.LIMIT. #0 value2 Trigger mode 1: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.SIZE. #1 TBERIEN Transmit Buffer Error Interrupt Enable 31 read-write value1 The transmit buffer error interrupt generation is disabled. #0 value2 The transmit buffer error interrupt generation is enabled. #1 TBUF[0] Transmit Buffer 0x100 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[10] Transmit Buffer 0x6DC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[11] Transmit Buffer 0x788 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[12] Transmit Buffer 0x838 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[13] Transmit Buffer 0x8EC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[14] Transmit Buffer 0x9A4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[15] Transmit Buffer 0xA60 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[16] Transmit Buffer 0xB20 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[17] Transmit Buffer 0xBE4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[18] Transmit Buffer 0xCAC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[19] Transmit Buffer 0xD78 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[1] Transmit Buffer 0x184 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[20] Transmit Buffer 0xE48 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[21] Transmit Buffer 0xF1C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[22] Transmit Buffer 0xFF4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[23] Transmit Buffer 0x10D0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[24] Transmit Buffer 0x11B0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[25] Transmit Buffer 0x1294 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[26] Transmit Buffer 0x137C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[27] Transmit Buffer 0x1468 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[28] Transmit Buffer 0x1558 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[29] Transmit Buffer 0x164C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[2] Transmit Buffer 0x20C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[30] Transmit Buffer 0x1744 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[31] Transmit Buffer 0x1840 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[3] Transmit Buffer 0x298 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[4] Transmit Buffer 0x328 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[5] Transmit Buffer 0x3BC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[6] Transmit Buffer 0x454 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[7] Transmit Buffer 0x4F0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[8] Transmit Buffer 0x590 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[9] Transmit Buffer 0x634 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TCSR Transmit Control/Status Register 0x38 32 read-write n 0x0 0x0 EOF End Of Frame 6 read-write value1 The data word in TBUF is not considered as last word of an SSC frame. #0 value2 The data word in TBUF is considered as last word of an SSC frame. #1 FLEMD FLE Mode 2 read-write value1 The automatic update of FLE is disabled. #0 value2 The automatic update of FLE is enabled. #1 HPCMD Hardware Port Control Mode 4 read-write value1 The automatic update of bits SCTR.DSM and SCTR.HPCDIR is disabled. #0 value2 The automatic update of bits SCTR.DSM and SCTR.HPCDIR is enabled. #1 SELMD Select Mode 1 read-write value1 The automatic update of PCR.CTR[23:16] is disabled. #0 value2 The automatic update of PCR.CTR[23:16] is disabled. #1 SOF Start Of Frame 5 read-write value1 The data word in TBUF is not considered as first word of a frame. #0 value2 The data word in TBUF is considered as first word of a frame. A currently running frame is finished and MSLS becomes deactivated (respecting the programmed delays). #1 TDEN TBUF Data Enable 10 1 read-write value1 A transmission start of the data word in TBUF is disabled. If a transmission is started, the passive data level is sent out. #00 value2 A transmission of the data word in TBUF can be started if TDV = 1. #01 value3 A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 0. #10 value4 A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 1. #11 TDSSM TBUF Data Single Shot Mode 8 read-write value1 The data word in TBUF is not considered as invalid after it has been loaded into the transmit shift register. The loading of the TBUF data into the shift register does not clear TDV. #0 value2 The data word in TBUF is considered as invalid after it has been loaded into the shift register. In ASC and IIC mode, TDV is cleared with the TBI event, whereas in SSC and IIS mode, it is cleared with the RSI event. TDSSM = 1 has to be programmed if an optional data buffer is used. #1 TDV Transmit Data Valid 7 read-only value1 The data word in TBUF is not valid for transmission. #0 value2 The data word in TBUF is valid for transmission and a transmission start is possible. New data should not be written to a TBUFx input location while TDV = 1. #1 TDVTR TBUF Data Valid Trigger 12 read-write value1 Bit TCSR.TE is permanently set. #0 value2 Bit TCSR.TE is set if DX2T becomes active while TDV = 1. #1 TE Trigger Event 28 read-only value1 The trigger event has not yet been detected. A transmission of the data word in TBUF can not be started. #0 value2 The trigger event has been detected (or the trigger mechanism is switched off) and a transmission of the data word in TBUF can not be started. #1 TSOF Transmitted Start Of Frame 24 read-only value1 The latest data word transmission has not been started for the first word of a data frame. #0 value2 The latest data word transmission has been started for the first word of a data frame. #1 TV Transmission Valid 26 read-only value1 The latest start of a data word transmission has taken place while no valid data was available. As a result, the transmission of a data words with passive level (SCTR.PDL) has been started. #0 value2 The latest start of a data word transmission has taken place with valid data from TBUF. #1 TVC Transmission Valid Cumulated 27 read-only value1 Since TVC has been set, at least one data buffer underflow condition has occurred. #0 value2 Since TVC has been set, no data buffer underflow condition has occurred. #1 WA Word Address 13 read-write value1 The data word in TBUF will be transmitted after a falling edge of WA has been detected (referring to PSR.WA). #0 value2 The data word in TBUF will be transmitted after a rising edge of WA has been detected (referring to PSR.WA). #1 WAMD WA Mode 3 read-write value1 The automatic update of bit WA is disabled. #0 value2 The automatic update of bit WA is enabled. #1 WLEMD WLE Mode 0 read-write value1 The automatic update of SCTR.WLE and TCSR.EOF is disabled. #0 value2 The automatic update of SCTR.WLE and TCSR.EOF is enabled. #1 TRBPTR Transmit/Receive Buffer Pointer Register 0x110 32 read-write n 0x0 0x0 RDIPTR Receiver Data Input Pointer 16 5 read-only RDOPTR Receiver Data Output Pointer 24 5 read-only TDIPTR Transmitter Data Input Pointer 0 5 read-only TDOPTR Transmitter Data Output Pointer 8 5 read-only TRBSCR Transmit/Receive Buffer Status Clear Register 0x118 32 read-write n 0x0 0x0 CARBI Clear Alternative Receive Buffer Event 2 write-only value1 No effect. #0 value2 Clear TRBSR.ARBI. #1 CBDV Clear Bypass Data Valid 10 write-only value1 No effect. #0 value2 Clear BYPCR.BDV. #1 CRBERI Clear Receive Buffer Error Event 1 write-only value1 No effect. #0 value2 Clear TRBSR.RBERI. #1 CSRBI Clear Standard Receive Buffer Event 0 write-only value1 No effect. #0 value2 Clear TRBSR.SRBI. #1 CSTBI Clear Standard Transmit Buffer Event 8 write-only value1 No effect. #0 value2 Clear TRBSR.STBI. #1 CTBERI Clear Transmit Buffer Error Event 9 write-only value1 No effect. #0 value2 Clear TRBSR.TBERI. #1 FLUSHRB Flush Receive Buffer 14 write-only value1 No effect. #0 value2 The receive FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic. #1 FLUSHTB Flush Transmit Buffer 15 write-only value1 No effect. #0 value2 The transmit FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic. #1 TRBSR Transmit/Receive Buffer Status Register 0x114 32 read-write n 0x0 0x0 ARBI Alternative Receive Buffer Event 2 read-write value1 An alternative receive buffer event has not been detected. #0 value2 An alternative receive buffer event has been detected. #1 RBERI Receive Buffer Error Event 1 read-write value1 A receive buffer error event has not been detected. #0 value2 A receive buffer error event has been detected. #1 RBFLVL Receive Buffer Filling Level 16 6 read-only RBUS Receive Buffer Busy 5 read-only value1 The receive buffer information has been completely updated. #0 value2 The OUTR update from the FIFO memory is ongoing. A read from OUTR will be delayed. FIFO pointers from the previous read are not yet updated. #1 REMPTY Receive Buffer Empty 3 read-only value1 The receive buffer is not empty. #0 value2 The receive buffer is empty. #1 RFULL Receive Buffer Full 4 read-only value1 The receive buffer is not full. #0 value2 The receive buffer is full. #1 SRBI Standard Receive Buffer Event 0 read-write value1 A standard receive buffer event has not been detected. #0 value2 A standard receive buffer event has been detected. #1 SRBT Standard Receive Buffer Event Trigger 6 read-only value1 A standard receive buffer event is not triggered using this bit. #0 value2 A standard receive buffer event is triggered using this bit. #1 STBI Standard Transmit Buffer Event 8 read-write value1 A standard transmit buffer event has not been detected. #0 value2 A standard transmit buffer event has been detected. #1 STBT Standard Transmit Buffer Event Trigger 14 read-only value1 A standard transmit buffer event is not triggered using this bit. #0 value2 A standard transmit buffer event is triggered using this bit. #1 TBERI Transmit Buffer Error Event 9 read-write value1 A transmit buffer error event has not been detected. #0 value2 A transmit buffer error event has been detected. #1 TBFLVL Transmit Buffer Filling Level 24 6 read-only TBUS Transmit Buffer Busy 13 read-only value1 The transmit buffer information has been completely updated. #0 value2 The FIFO memory update after write to INx is ongoing. A write to INx will be delayed. FIFO pointers from the previous INx write are not yet updated. #1 TEMPTY Transmit Buffer Empty 11 read-only value1 The transmit buffer is not empty. #0 value2 The transmit buffer is empty. #1 TFULL Transmit Buffer Full 12 read-only value1 The transmit buffer is not full. #0 value2 The transmit buffer is full. #1 USIC1_CH1 Universal Serial Interface Controller 1 USIC 0x0 0x0 0x200 registers n BRG Baud Rate Generator Register 0x14 32 read-write n 0x0 0x0 CLKSEL Clock Selection 0 1 read-write value1 The fractional divider frequency fFD is selected. #00 value3 The trigger signal DX1T defines fPIN. Signal MCLK toggles with fPIN. #10 value4 Signal MCLK corresponds to the DX1S signal and the frequency fPIN is derived from the rising edges of DX1S. #11 CTQSEL Input Selection for CTQ 6 1 read-write value1 fCTQIN = fPDIV #00 value2 fCTQIN = fPPP #01 value3 fCTQIN = fSCLK #10 value4 fCTQIN = fMCLK #11 DCTQ Denominator for Time Quanta Counter 10 4 read-write MCLKCFG Master Clock Configuration 29 read-write value1 The passive level is 0. #0 value2 The passive level is 1. #1 PCTQ Pre-Divider for Time Quanta Counter 8 1 read-write PDIV Divider Mode: Divider Factor to Generate fPDIV 16 9 read-write PPPEN Enable 2:1 Divider for fPPP 4 read-write value1 The 2:1 divider for fPPP is disabled. fPPP = fPIN #0 value2 The 2:1 divider for fPPP is enabled. fPPP = fMCLK = fPIN / 2. #1 SCLKCFG Shift Clock Output Configuration 30 1 read-write value1 The passive level is 0 and the delay is disabled. #00 value2 The passive level is 1 and the delay is disabled. #01 value3 The passive level is 0 and the delay is enabled. #10 value4 The passive level is 1 and the delay is enabled. #11 SCLKOSEL Shift Clock Output Select 28 read-write value1 SCLK from the baud rate generator is selected as the SCLKOUT input source. #0 value2 The transmit shift clock from DX1 input stage is selected as the SCLKOUT input source. #1 TMEN Timing Measurement Enable 3 read-write value1 Timing measurement is disabled: The trigger signals DX0T and DX1T are ignored. #0 value2 Timing measurement is enabled: The 10-bit counter is incremented by 1 with fPPP and stops counting when reaching its maximum value. If one of the trigger signals DX0T or DX1T become active, the counter value is captured into bit field CTV, the counter is cleared and a transmit shift event is generated. #1 BYP Bypass Data Register 0x100 32 read-write n 0x0 0x0 BDATA Bypass Data 0 15 read-write BYPCR Bypass Control Register 0x104 32 read-write n 0x0 0x0 BDEN Bypass Data Enable 10 1 read-write value1 The transfer of bypass data is disabled. #00 value2 The transfer of bypass data to TBUF is possible. Bypass data will be transferred to TBUF according to its priority if BDV = 1. #01 value3 Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 0. #10 value4 Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 1. #11 BDSSM Bypass Data Single Shot Mode 8 read-write value1 The bypass data is still considered as valid after it has been loaded into TBUF. The loading of the data into TBUF does not clear BDV. #0 value2 The bypass data is considered as invalid after it has been loaded into TBUF. The loading of the data into TBUF clears BDV. #1 BDV Bypass Data Valid 15 read-only value1 The bypass data is not valid. #0 value2 The bypass data is valid. #1 BDVTR Bypass Data Valid Trigger 12 read-write value1 Bit BDV is not influenced by DX2T. #0 value2 Bit BDV is set if DX2T is active. #1 BHPC Bypass Hardware Port Control 21 2 read-write BPRIO Bypass Priority 13 read-write value1 The transmit FIFO data has a higher priority than the bypass data. #0 value2 The bypass data has a higher priority than the transmit FIFO data. #1 BSELO Bypass Select Outputs 16 4 read-write BWLE Bypass Word Length 0 3 read-write CCFG Channel Configuration Register 0x4 32 read-write n 0x0 0x0 ASC ASC Protocol Available 1 read-only value1 The ASC protocol is not available. #0 value2 The ASC protocol is available. #1 IIC IIC Protocol Available 2 read-only value1 The IIC protocol is not available. #0 value2 The IIC protocol is available. #1 IIS IIS Protocol Available 3 read-only value1 The IIS protocol is not available. #0 value2 The IIS protocol is available. #1 RB Receive FIFO Buffer Available 6 read-only value1 A receive FIFO buffer is not available. #0 value2 A receive FIFO buffer is available. #1 SSC SSC Protocol Available 0 read-only value1 The SSC protocol is not available. #0 value2 The SSC protocol is available. #1 TB Transmit FIFO Buffer Available 7 read-only value1 A transmit FIFO buffer is not available. #0 value2 A transmit FIFO buffer is available. #1 CCR Channel Control Register 0x40 32 read-write n 0x0 0x0 AIEN Alternative Receive Interrupt Enable 15 read-write value1 The alternative receive interrupt is disabled. #0 value2 The alternative receive interrupt is enabled. In case of an alternative receive event, the service request output SRx indicated by INPR.AINP is activated. #1 BRGIEN Baud Rate Generator Interrupt Enable 16 read-write value1 The baud rate generator interrupt is disabled. #0 value2 The baud rate generator interrupt is enabled. In case of a baud rate generator event, the service request output SRx indicated by INPR.PINP is activated. #1 DLIEN Data Lost Interrupt Enable 11 read-write value1 The data lost interrupt is disabled. #0 value2 The data lost interrupt is enabled. In case of a data lost event, the service request output SRx indicated by INPR.PINP is activated. #1 HPCEN Hardware Port Control Enable 6 1 read-write value1 The hardware port control is disabled. #00 value2 The hardware port control is enabled for DX0 and DOUT0. #01 value3 The hardware port control is enabled for DX3, DX0 and DOUT[1:0]. #10 value4 The hardware port control is enabled for DX0, DX[5:3] and DOUT[3:0]. #11 MODE Operating Mode 0 3 read-write value1 The USIC channel is disabled. All protocol-related state machines are set to an idle state. 0x0 value2 The SSC (SPI) protocol is selected. 0x1 value3 The ASC (SCI, UART) protocol is selected. 0x2 value4 The IIS protocol is selected. 0x3 value5 The IIC protocol is selected. 0x4 PM Parity Mode 8 1 read-write value1 The parity generation is disabled. #00 value3 Even parity is selected (parity bit = 1 on odd number of 1s in data, parity bit = 0 on even number of 1s in data). #10 value4 Odd parity is selected (parity bit = 0 on odd number of 1s in data, parity bit = 1 on even number of 1s in data). #11 RIEN Receive Interrupt Enable 14 read-write value1 The receive interrupt is disabled. #0 value2 The receive interrupt is enabled. In case of a receive event, the service request output SRx indicated by INPR.RINP is activated. #1 RSIEN Receiver Start Interrupt Enable 10 read-write value1 The receiver start interrupt is disabled. #0 value2 The receiver start interrupt is enabled. In case of a receiver start event, the service request output SRx indicated by INPR.TBINP is activated. #1 TBIEN Transmit Buffer Interrupt Enable 13 read-write value1 The transmit buffer interrupt is disabled. #0 value2 The transmit buffer interrupt is enabled. In case of a transmit buffer event, the service request output SRx indicated by INPR.TBINP is activated. #1 TSIEN Transmit Shift Interrupt Enable 12 read-write value1 The transmit shift interrupt is disabled. #0 value2 The transmit shift interrupt is enabled. In case of a transmit shift interrupt event, the service request output SRx indicated by INPR.TSINP is activated. #1 CMTR Capture Mode Timer Register 0x44 32 read-write n 0x0 0x0 CTV Captured Timer Value 0 9 read-write DX0CR Input Control Register 0 0x1C 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX1CR Input Control Register 1 0x20 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DX1T. #01 value3 A falling edge activates DX1T. #10 value4 Both edges activate DX1T. #11 DCEN Delay Compensation Enable 3 read-write value1 The receive shift clock is dependent on INSW selection. #0 value2 The receive shift clock is connected to the selected data input line. This setting is used if delay compensation is required in SSC and IIS protocols, else DCEN should always be 0. #1 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DX1A is selected. #000 value2 The data input DX1B is selected. #001 value3 The data input DX1C is selected. #010 value4 The data input DX1D is selected. #011 value5 The data input DX1E is selected. #100 value6 The data input DX1F is selected. #101 value7 The data input DX1G is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DX1S is 0. #0 value2 The current value of DX1S is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX2CR Input Control Register 2 0x24 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX3CR Input Control Register 3 0x28 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX4CR Input Control Register 4 0x2C 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 DX5CR Input Control Register 5 0x30 32 read-write n 0x0 0x0 CM Combination Mode 10 1 read-write value1 The trigger activation is disabled. #00 value2 A rising edge activates DXnT. #01 value3 A falling edge activates DXnT. #10 value4 Both edges activate DXnT. #11 DFEN Digital Filter Enable 5 read-write value1 The input signal is not digitally filtered. #0 value2 The input signal is digitally filtered. #1 DPOL Data Polarity for DXn 8 read-write value1 The input signal is not inverted. #0 value2 The input signal is inverted. #1 DSEL Data Selection for Input Signal 0 2 read-write value1 The data input DXnA is selected. #000 value2 The data input DXnB is selected. #001 value3 The data input DXnC is selected. #010 value4 The data input DXnD is selected. #011 value5 The data input DXnE is selected. #100 value6 The data input DXnF is selected. #101 value7 The data input DXnG is selected. #110 value8 The data input is always 1. #111 DSEN Data Synchronization Enable 6 read-write value1 The un-synchronized signal can be taken as input for the data shift unit. #0 value2 The synchronized signal can be taken as input for the data shift unit. #1 DXS Synchronized Data Value 15 read-only value1 The current value of DXnS is 0. #0 value2 The current value of DXnS is 1. #1 INSW Input Switch 4 read-write value1 The input of the data shift unit is controlled by the protocol pre-processor. #0 value2 The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor. #1 SFSEL Sampling Frequency Selection 9 read-write value1 The sampling frequency is fPB. #0 value2 The sampling frequency is fFD. #1 FDR Fractional Divider Register 0x10 32 read-write n 0x0 0x0 DM Divider Mode 14 1 read-write value1 The divider is switched off, fFD = 0. #00 value2 Normal divider mode selected. #01 value3 Fractional divider mode selected. #10 value4 The divider is switched off, fFD = 0. #11 RESULT Result Value 16 9 read-only STEP Step Value 0 9 read-write FMR Flag Modification Register 0x68 32 read-write n 0x0 0x0 ATVC Activate Bit TVC 4 write-only value1 No action. #0 value2 Bit TCSR.TVC is set. #1 CRDV0 Clear Bits RDV for RBUF0 14 write-only value1 No action. #0 value2 Bits RBUF01SR.RDV00 and RBUF01SR.RDV10 are cleared. #1 CRDV1 Clear Bit RDV for RBUF1 15 write-only value1 No action. #0 value2 Bits RBUF01SR.RDV01 and RBUF01SR.RDV11 are cleared. #1 MTDV Modify Transmit Data Valid 0 1 write-only value1 No action. #00 value2 Bit TDV is set, TE is unchanged. #01 value3 Bits TDV and TE are cleared. #10 SIO0 Set Interrupt Output SRx 16 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO1 Set Interrupt Output SRx 17 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO2 Set Interrupt Output SRx 18 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO3 Set Interrupt Output SRx 19 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO4 Set Interrupt Output SRx 20 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 SIO5 Set Interrupt Output SRx 21 write-only value1 No action. #0 value2 The service request output SRx is activated. #1 INPR Interrupt Node Pointer Register 0x18 32 read-write n 0x0 0x0 AINP Alternative Receive Interrupt Node Pointer 12 2 read-write PINP Transmit Shift Interrupt Node Pointer 16 2 read-write RINP Receive Interrupt Node Pointer 8 2 read-write TBINP Transmit Buffer Interrupt Node Pointer 4 2 read-write TSINP Transmit Shift Interrupt Node Pointer 0 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 IN[0] Transmit FIFO Buffer 0x300 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[10] Transmit FIFO Buffer 0x12DC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[11] Transmit FIFO Buffer 0x1488 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[12] Transmit FIFO Buffer 0x1638 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[13] Transmit FIFO Buffer 0x17EC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[14] Transmit FIFO Buffer 0x19A4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[15] Transmit FIFO Buffer 0x1B60 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[16] Transmit FIFO Buffer 0x1D20 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[17] Transmit FIFO Buffer 0x1EE4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[18] Transmit FIFO Buffer 0x20AC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[19] Transmit FIFO Buffer 0x2278 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[1] Transmit FIFO Buffer 0x484 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[20] Transmit FIFO Buffer 0x2448 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[21] Transmit FIFO Buffer 0x261C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[22] Transmit FIFO Buffer 0x27F4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[23] Transmit FIFO Buffer 0x29D0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[24] Transmit FIFO Buffer 0x2BB0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[25] Transmit FIFO Buffer 0x2D94 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[26] Transmit FIFO Buffer 0x2F7C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[27] Transmit FIFO Buffer 0x3168 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[28] Transmit FIFO Buffer 0x3358 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[29] Transmit FIFO Buffer 0x354C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[2] Transmit FIFO Buffer 0x60C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[30] Transmit FIFO Buffer 0x3744 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[31] Transmit FIFO Buffer 0x3940 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[3] Transmit FIFO Buffer 0x798 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[4] Transmit FIFO Buffer 0x928 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[5] Transmit FIFO Buffer 0xABC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[6] Transmit FIFO Buffer 0xC54 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[7] Transmit FIFO Buffer 0xDF0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[8] Transmit FIFO Buffer 0xF90 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only IN[9] Transmit FIFO Buffer 0x1134 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 write-only KSCFG Kernel State Configuration Register 0xC 32 read-write n 0x0 0x0 BPMODEN Bit Protection for MODEN 1 write-only value1 MODEN is not changed. #0 value2 MODEN is updated with the written value. #1 BPNOM Bit Protection for NOMCFG 7 write-only value1 NOMCFG is not changed. #0 value2 NOMCFG is updated with the written value. #1 BPSUM Bit Protection for SUMCFG 11 write-only value1 SUMCFG is not changed. #0 value2 SUMCFG is updated with the written value. #1 MODEN Module Enable 0 read-write value1 The module is switched off immediately (without respecting a stop condition). It does not react on mode control actions and the module clock is switched off. The module does not react on read accesses and ignores write accesses (except to KSCFG). #0 value2 The module is switched on and can operate. After writing 1 to MODEN, it is recommended to read register KSCFG to avoid pipeline effects in the control block before accessing other Service Request Processing registers. #1 NOMCFG Normal Operation Mode Configuration 4 1 read-write value1 Run mode 0 is selected. #00 value2 Run mode 1 is selected. #01 value3 Stop mode 0 is selected. #10 value4 Stop mode 1 is selected. #11 SUMCFG Suspend Mode Configuration 8 1 read-write OUTDR Receiver Buffer Output Register L for Debugger 0x120 32 read-write n 0x0 0x0 DSR Data from Shift Register 0 15 read-only RCI Receive Control Information from Shift Register 16 4 read-only OUTR Receiver Buffer Output Register 0x11C 32 read-write n 0x0 0x0 modifyExternal DSR Received Data 0 15 read-only RCI Receiver Control Information 16 4 read-only PCR Protocol Control Register 0x3C 32 read-write n 0x0 0x0 CTR0 Protocol Control Bit 0 0 read-write CTR1 Protocol Control Bit 1 1 read-write CTR10 Protocol Control Bit 10 10 read-write CTR11 Protocol Control Bit 11 11 read-write CTR12 Protocol Control Bit 12 12 read-write CTR13 Protocol Control Bit 13 13 read-write CTR14 Protocol Control Bit 14 14 read-write CTR15 Protocol Control Bit 15 15 read-write CTR16 Protocol Control Bit 16 16 read-write CTR17 Protocol Control Bit 17 17 read-write CTR18 Protocol Control Bit 18 18 read-write CTR19 Protocol Control Bit 19 19 read-write CTR2 Protocol Control Bit 2 2 read-write CTR20 Protocol Control Bit 20 20 read-write CTR21 Protocol Control Bit 21 21 read-write CTR22 Protocol Control Bit 22 22 read-write CTR23 Protocol Control Bit 23 23 read-write CTR24 Protocol Control Bit 24 24 read-write CTR25 Protocol Control Bit 25 25 read-write CTR26 Protocol Control Bit 26 26 read-write CTR27 Protocol Control Bit 27 27 read-write CTR28 Protocol Control Bit 28 28 read-write CTR29 Protocol Control Bit 29 29 read-write CTR3 Protocol Control Bit 3 3 read-write CTR30 Protocol Control Bit 30 30 read-write CTR31 Protocol Control Bit 31 31 read-write CTR4 Protocol Control Bit 4 4 read-write CTR5 Protocol Control Bit 5 5 read-write CTR6 Protocol Control Bit 6 6 read-write CTR7 Protocol Control Bit 7 7 read-write CTR8 Protocol Control Bit 8 8 read-write CTR9 Protocol Control Bit 9 9 read-write PCR_ASCMode Protocol Control Register [ASC Mode] PCR 0x3C 32 read-write n 0x0 0x0 CDEN Collision Detection Enable 4 read-write value1 The collision detection is disabled. #0 value2 If a collision is detected, the transmitter stops its data transmission, outputs a 1, sets bit PSR.COL and generates a protocol interrupt. In order to allow data transmission again, PSR.COL has to be cleared by software. #1 FEIEN Format Error Interrupt Enable 6 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 FFIEN Frame Finished Interrupt Enable 7 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 IDM Idle Detection Mode 2 read-write value1 The bus idle detection is switched off and bits PSR.TXIDLE and PSR.RXIDLE are set automatically to enable data transfers without checking the inputs before. #0 value2 The bus is considered as idle after a number of consecutive passive bit times defined by SCTR.FLE plus 2 (in the case without parity bit) or plus 3 (in the case with parity bit). #1 MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and the MCLK signal is 0. #0 value2 The MCLK generation is enabled. #1 PL Pulse Length 13 2 read-write value1 The pulse length is equal to the bit length (no shortened 0). #000 value2 The pulse length of a 0 bit is 2 time quanta. #001 value3 The pulse length of a 0 bit is 3 time quanta. #010 value4 The pulse length of a 0 bit is 8 time quanta. #111 RNIEN Receiver Noise Detection Interrupt Enable 5 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 RSTEN Receiver Status Enable 16 read-write value1 Flag PSR[9] is not modified depending on the receiver status. #0 value2 Flag PSR[9] is set during the complete reception of a frame. #1 SBIEN Synchronization Break Interrupt Enable 3 read-write value1 The interrupt generation is disabled. #0 value2 The interrupt generation is enabled. #1 SMD Sample Mode 0 read-write value1 Only one sample is taken per bit time. The current input value is sampled. #0 value2 Three samples are taken per bit time and a majority decision is made. #1 SP Sample Point 8 4 read-write STPB Stop Bits 1 read-write value1 The number of stop bits is 1. #0 value2 The number of stop bits is 2. #1 TSTEN Transmitter Status Enable 17 read-write value1 Flag PSR[9] is not modified depending on the transmitter status. #0 value2 Flag PSR[9] is set during the complete transmission of a frame. #1 PCR_IICMode Protocol Control Register [IIC Mode] PCR 0x3C 32 read-write n 0x0 0x0 ACK00 Acknowledge 00H 16 read-write value1 The slave device is not sensitive to this address. #0 value2 The slave device is sensitive to this address. #1 ACKIEN Acknowledge Interrupt Enable 30 read-write value1 The acknowledge interrupt is disabled. #0 value2 The acknowledge interrupt is enabled. #1 ARLIEN Arbitration Lost Interrupt Enable 22 read-write value1 The arbitration lost interrupt is disabled. #0 value2 The arbitration lost interrupt is enabled. #1 ERRIEN Error Interrupt Enable 24 read-write value1 The error interrupt is disabled. #0 value2 The error interrupt is enabled. #1 HDEL Hardware Delay 26 3 read-write MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and MCLK is 0. #0 value2 The MCLK generation is enabled. #1 NACKIEN Non-Acknowledge Interrupt Enable 21 read-write value1 The non-acknowledge interrupt is disabled. #0 value2 The non-acknowledge interrupt is enabled. #1 PCRIEN Stop Condition Received Interrupt Enable 20 read-write value1 The stop condition interrupt is disabled. #0 value2 The stop condition interrupt is enabled. #1 RSCRIEN Repeated Start Condition Received Interrupt Enable 19 read-write value1 The repeated start condition interrupt is disabled. #0 value2 The repeated start condition interrupt is enabled. #1 SACKDIS Slave Acknowledge Disable 25 read-write value1 The generation of an active slave acknowledge is enabled (slave acknowledge with 0 level = more bytes can be received). #0 value2 The generation of an active slave acknowledge is disabled (slave acknowledge with 1 level = reception stopped). #1 SCRIEN Start Condition Received Interrupt Enable 18 read-write value1 The start condition interrupt is disabled. #0 value2 The start condition interrupt is enabled. #1 SLAD Slave Address 0 15 read-write SRRIEN Slave Read Request Interrupt Enable 23 read-write value1 The slave read request interrupt is disabled. #0 value2 The slave read request interrupt is enabled. #1 STIM Symbol Timing 17 read-write value1 A symbol contains 10 time quanta. The timing is adapted for standard mode (100 kBaud). #0 value2 A symbol contains 25 time quanta. The timing is adapted for fast mode (400 kBaud). #1 PCR_IISMode Protocol Control Register [IIS Mode] PCR 0x3C 32 read-write n 0x0 0x0 DTEN Data Transfers Enable 1 read-write value1 The changes of the WA input signal are ignored and no transfers take place. #0 value2 Transfers are enabled. #1 DX2TIEN DX2T Interrupt Enable 15 read-write value1 A protocol interrupt is not generated if DX2T is active. #0 value2 A protocol interrupt is generated if DX2T is active. #1 ENDIEN END Interrupt Enable 6 read-write value1 A protocol interrupt is not activated. #0 value2 A protocol interrupt is activated. #1 MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and MCLK is 0. #0 value2 The MCLK generation is enabled. #1 SELINV Select Inversion 2 read-write value1 The SELOx outputs have the same polarity as the WA signal. #0 value2 The SELOx outputs have the inverted polarity to the WA signal. #1 TDEL Transfer Delay 16 5 read-write WAFEIEN WA Falling Edge Interrupt Enable 4 read-write value1 A protocol interrupt is not activated if a falling edge of WA is generated. #0 value2 A protocol interrupt is activated if a falling edge of WA is generated. #1 WAGEN WA Generation Enable 0 read-write value1 The IIS can be used as slave. The generation of the word address signal is disabled. The output signal WA is 0. The MCLKO signal generation depends on PCR.MCLK. #0 value2 The IIS can be used as master. The generation of the word address signal is enabled. The signal starts with a 0 after being enabled. The generation of MCLK is enabled, independent of PCR.MCLK. After clearing WAGEN, the USIC module stops the generation of the WA signal within the next 4 WA periods. #1 WAREIEN WA Rising Edge Interrupt Enable 5 read-write value1 A protocol interrupt is not activated if a rising edge of WA is generated. #0 value2 A protocol interrupt is activated if a rising edge of WA is generated. #1 PCR_SSCMode Protocol Control Register [SSC Mode] PCR 0x3C 32 read-write n 0x0 0x0 CTQSEL1 Input Frequency Selection 4 1 read-write value1 fCTQIN = fPDIV #00 value2 fCTQIN = fPPP #01 value3 fCTQIN = fSCLK #10 value4 fCTQIN = fMCLK #11 DCTQ1 Divider Factor DCTQ1 for Tiw and Tnf 8 4 read-write DX2TIEN DX2T Interrupt Enable 15 read-write value1 A protocol interrupt is not generated if DX2T is activated. #0 value2 A protocol interrupt is generated if DX2T is activated. #1 FEM Frame End Mode 3 read-write value1 The current data frame is considered as finished when the last bit of a data word has been sent out and the transmit buffer TBUF does not contain new data (TDV = 0). #0 value2 The MSLS signal is kept active also while no new data is available and no other end of frame condition is reached. In this case, the software can accept delays in delivering the data without automatic deactivation of MSLS in multi-word data frames. #1 MCLK Master Clock Enable 31 read-write value1 The MCLK generation is disabled and output MCLK = 0. #0 value2 The MCLK generation is enabled. #1 MSLSEN MSLS Enable 0 read-write value1 The MSLS generation is disabled (MSLS = 0). This is the setting for SSC slave mode. #0 value2 The MSLS generation is enabled. This is the setting for SSC master mode. #1 MSLSIEN MSLS Interrupt Enable 14 read-write value1 A protocol interrupt is not generated if a change of signal MSLS is detected. #0 value2 A protocol interrupt is generated if a change of signal MSLS is detected. #1 PARIEN Parity Error Interrupt Enable 13 read-write value1 A protocol interrupt is not generated with the detection of a parity error. #0 value2 A protocol interrupt is generated with the detection of a parity error. #1 PCTQ1 Divider Factor PCTQ1 for Tiw and Tnf 6 1 read-write SELCTR Select Control 1 read-write value1 The coded select mode is enabled. #0 value2 The direct select mode is enabled. #1 SELINV Select Inversion 2 read-write value1 The SELO outputs have the same polarity as the MSLS signal (active high). #0 value2 The SELO outputs have the inverted polarity to the MSLS signal (active low). #1 SELO Select Output 16 7 read-write value1 The corresponding SELOx line cannot be activated. #0 value2 The corresponding SELOx line can be activated (according to the mode selected by SELCTR). #1 SLPHSEL Slave Mode Clock Phase Select 25 read-write value1 Data bits are shifted out with the leading edge of the shift clock signal and latched in with the trailing edge. 0b0 value2 The first data bit is shifted out when the data shift unit receives a low to high transition from the DX2 stage. Subsequent bits are shifted out with the trailing edge of the shift clock signal. Data bits are always latched in with the leading edge. 0b1 TIWEN Enable Inter-Word Delay Tiw 24 read-write value1 No delay between data words of the same frame. #0 value2 The inter-word delay Tiw is enabled and introduced between data words of the same frame. #1 PSCR Protocol Status Clear Register 0x4C 32 read-write n 0x0 0x0 CAIF Clear Alternative Receive Indication Flag 15 write-only value1 No action #0 value2 Flag PSR.AIF is cleared. #1 CBRGIF Clear Baud Rate Generator Indication Flag 16 write-only value1 No action #0 value2 Flag PSR.BRGIF is cleared. #1 CDLIF Clear Data Lost Indication Flag 11 write-only value1 No action #0 value2 Flag PSR.DLIF is cleared. #1 CRIF Clear Receive Indication Flag 14 write-only value1 No action #0 value2 Flag PSR.RIF is cleared. #1 CRSIF Clear Receiver Start Indication Flag 10 write-only value1 No action #0 value2 Flag PSR.RSIF is cleared. #1 CST0 Clear Status Flag 0 in PSR 0 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST1 Clear Status Flag 1 in PSR 1 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST2 Clear Status Flag 2 in PSR 2 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST3 Clear Status Flag 3 in PSR 3 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST4 Clear Status Flag 4 in PSR 4 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST5 Clear Status Flag 5 in PSR 5 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST6 Clear Status Flag 6 in PSR 6 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST7 Clear Status Flag 7 in PSR 7 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST8 Clear Status Flag 8 in PSR 8 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CST9 Clear Status Flag 9 in PSR 9 write-only value1 No action #0 value2 Flag PSR.STx is cleared. #1 CTBIF Clear Transmit Buffer Indication Flag 13 write-only value1 No action #0 value2 Flag PSR.TBIF is cleared. #1 CTSIF Clear Transmit Shift Indication Flag 12 write-only value1 No action #0 value2 Flag PSR.TSIF is cleared. #1 PSR Protocol Status Register 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 ST0 Protocol Status Flag 0 0 read-write ST1 Protocol Status Flag 1 1 read-write ST2 Protocol Status Flag 2 2 read-write ST3 Protocol Status Flag 3 3 read-write ST4 Protocol Status Flag 4 4 read-write ST5 Protocol Status Flag 5 5 read-write ST6 Protocol Status Flag 6 6 read-write ST7 Protocol Status Flag 7 7 read-write ST8 Protocol Status Flag 8 8 read-write ST9 Protocol Status Flag 9 9 read-write TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 PSR_ASCMode Protocol Status Register [ASC Mode] PSR 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 BUSY Transfer Status BUSY 9 read-only value1 A data transfer does not take place. #0 value2 A data transfer currently takes place. #1 COL Collision Detected 3 read-write value1 A collision has not yet been detected and frame transmission is possible. #0 value2 A collision has been detected and frame transmission is not possible. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 FER0 Format Error in Stop Bit 0 5 read-write value1 A format error 0 has not been detected. #0 value2 A format error 0 has been detected. #1 FER1 Format Error in Stop Bit 1 6 read-write value1 A format error 1 has not been detected. #0 value2 A format error 1 has been detected. #1 RFF Receive Frame Finished 7 read-write value1 The received frame is not yet finished. #0 value2 The received frame is finished. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RNS Receiver Noise Detected 4 read-write value1 Receiver noise has not been detected. #0 value2 Receiver noise has been detected. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 RXIDLE Reception Idle 1 read-write value1 The receiver line has not yet been idle. #0 value2 The receiver line has been idle and frame reception is possible. #1 SBD Synchronization Break Detected 2 read-write value1 A synchronization break has not yet been detected. #0 value2 A synchronization break has been detected. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TFF Transmitter Frame Finished 8 read-write value1 The transmitter frame is not yet finished. #0 value2 The transmitter frame is finished. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 TXIDLE Transmission Idle 0 read-write value1 The transmitter line has not yet been idle. #0 value2 The transmitter line has been idle and frame transmission is possible. #1 PSR_IICMode Protocol Status Register [IIC Mode] PSR 0x48 32 read-write n 0x0 0x0 ACK Acknowledge Received 9 read-write value1 An acknowledge has not been received. #0 value2 An acknowledge has been received. #1 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 ARL Arbitration Lost 6 read-write value1 An arbitration has not been lost. #0 value2 An arbitration has been lost. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 ERR Error 8 read-write value1 An IIC error has not been detected. #0 value2 An IIC error has been detected. #1 NACK Non-Acknowledge Received 5 read-write value1 A non-acknowledge has not been received. #0 value2 A non-acknowledge has been received. #1 PCR Stop Condition Received 4 read-write value1 A stop condition has not yet been detected. #0 value2 A stop condition has been detected. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSCR Repeated Start Condition Received 3 read-write value1 A repeated start condition has not yet been detected. #0 value2 A repeated start condition has been detected. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 SCR Start Condition Received 2 read-write value1 A start condition has not yet been detected. #0 value2 A start condition has been detected. #1 SLSEL Slave Select 0 read-write value1 The device is not selected as slave. #0 value2 The device is selected as slave. #1 SRR Slave Read Request 7 read-write value1 A slave read request has not been detected. #0 value2 A slave read request has been detected. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 WTDF Wrong TDF Code Found 1 read-write value1 A wrong TDF code has not been found. #0 value2 A wrong TDF code has been found. #1 PSR_IISMode Protocol Status Register [IIS Mode] PSR 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 DX2S DX2S Status 1 read-write value1 DX2S is 0. #0 value2 DX2S is 1. #1 DX2TEV DX2T Event Detected 3 read-write value1 The DX2T signal has not been activated. #0 value2 The DX2T signal has been activated. #1 END WA Generation End 6 read-write value1 The WA generation has not yet ended (if it is running and WAGEN has been cleared). #0 value2 The WA generation has ended (if it has been running). #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 WA Word Address 0 read-write value1 WA has been sampled 0. #0 value2 WA has been sampled 1. #1 WAFE WA Falling Edge Event 4 read-write value1 A WA falling edge has not been generated. #0 value2 A WA falling edge has been generated. #1 WARE WA Rising Edge Event 5 read-write value1 A WA rising edge has not been generated. #0 value2 A WA rising edge has been generated. #1 PSR_SSCMode Protocol Status Register [SSC Mode] PSR 0x48 32 read-write n 0x0 0x0 AIF Alternative Receive Indication Flag 15 read-write value1 An alternative receive event has not occurred. #0 value2 An alternative receive event has occurred. #1 BRGIF Baud Rate Generator Indication Flag 16 read-write value1 A baud rate generator event has not occurred. #0 value2 A baud rate generator event has occurred. #1 DLIF Data Lost Indication Flag 11 read-write value1 A data lost event has not occurred. #0 value2 A data lost event has occurred. #1 DX2S DX2S Status 1 read-write value1 DX2S is 0. #0 value2 DX2S is 1. #1 DX2TEV DX2T Event Detected 3 read-write value1 The DX2T signal has not been activated. #0 value2 The DX2T signal has been activated. #1 MSLS MSLS Status 0 read-write value1 The internal signal MSLS is inactive (0). #0 value2 The internal signal MSLS is active (1). #1 MSLSEV MSLS Event Detected 2 read-write value1 The MSLS signal has not changed its state. #0 value2 The MSLS signal has changed its state. #1 PARERR Parity Error Event Detected 4 read-write value1 A parity error event has not been activated. #0 value2 A parity error event has been activated. #1 RIF Receive Indication Flag 14 read-write value1 A receive event has not occurred. #0 value2 A receive event has occurred. #1 RSIF Receiver Start Indication Flag 10 read-write value1 A receiver start event has not occurred. #0 value2 A receiver start event has occurred. #1 TBIF Transmit Buffer Indication Flag 13 read-write value1 A transmit buffer event has not occurred. #0 value2 A transmit buffer event has occurred. #1 TSIF Transmit Shift Indication Flag 12 read-write value1 A transmit shift event has not occurred. #0 value2 A transmit shift event has occurred. #1 RBCTR Receiver Buffer Control Register 0x10C 32 read-write n 0x0 0x0 ARBIEN Alternative Receive Buffer Interrupt Enable 29 read-write value1 The alternative receive buffer interrupt generation is disabled. #0 value2 The alternative receive buffer interrupt generation is enabled. #1 ARBINP Alternative Receive Buffer Interrupt Node Pointer 19 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 DPTR Data Pointer 0 5 write-only LIMIT Limit For Interrupt Generation 8 5 read-write LOF Buffer Event on Limit Overflow 28 read-write value1 A standard receive buffer event occurs when the filling level equals the limit value and gets lower due to a read access from OUTR. #0 value2 A standard receive buffer event occurs when the filling level equals the limit value and gets bigger due to the reception of a new data word. #1 RBERIEN Receive Buffer Error Interrupt Enable 31 read-write value1 The receive buffer error interrupt generation is disabled. #0 value2 The receive buffer error interrupt generation is enabled. #1 RCIM Receiver Control Information Mode 22 1 read-write value1 RCI[4] = PERR, RCI[3:0] = WLEN #00 value2 RCI[4] = SOF, RCI[3:0] = WLEN #01 value3 RCI[4] = 0, RCI[3:0] = WLEN #10 value4 RCI[4] = PERR, RCI[3] = PAR, RCI[2:1] = 00B, RCI[0] = SOF #11 RNM Receiver Notification Mode 27 read-write value1 Filling level mode: A standard receive buffer event occurs when the filling level equals the limit value and changes, either due to a read access from OUTR (LOF = 0) or due to a new received data word (LOF = 1). #0 value2 RCI mode: A standard receive buffer event occurs when register OUTR is updated with a new value if the corresponding value in OUTR.RCI[4] = 0. If OUTR.RCI[4] = 1, an alternative receive buffer event occurs instead of the standard receive buffer event. #1 SIZE Buffer Size 24 2 read-write value1 The FIFO mechanism is disabled. The buffer does not accept any request for data. #000 value2 The FIFO buffer contains 2 entries. #001 value3 The FIFO buffer contains 4 entries. #010 value4 The FIFO buffer contains 8 entries. #011 value5 The FIFO buffer contains 16 entries. #100 value6 The FIFO buffer contains 32 entries. #101 value7 The FIFO buffer contains 64 entries. #110 SRBIEN Standard Receive Buffer Interrupt Enable 30 read-write value1 The standard receive buffer interrupt generation is disabled. #0 value2 The standard receive buffer interrupt generation is enabled. #1 SRBINP Standard Receive Buffer Interrupt Node Pointer 16 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 SRBTEN Standard Receive Buffer Trigger Enable 15 read-write value1 The standard receive buffer event trigger through bit TRBSR.SRBT is disabled. #0 value2 The standard receive buffer event trigger through bit TRBSR.SRBT is enabled. #1 SRBTM Standard Receive Buffer Trigger Mode 14 read-write value1 Trigger mode 0: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=RBCTR.LIMIT. #0 value2 Trigger mode 1: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=0. #1 RBUF Receiver Buffer Register 0x54 32 read-write n 0x0 0x0 modifyExternal DSR Received Data 0 15 read-only RBUF0 Receiver Buffer Register 0 0x5C 32 read-write n 0x0 0x0 DSR0 Data of Shift Registers 0[3:0] 0 15 read-only RBUF01SR Receiver Buffer 01 Status Register 0x64 32 read-write n 0x0 0x0 DS0 Data Source 15 read-only value1 The register RBUF contains the data of RBUF0 (same for associated status information). #0 value2 The register RBUF contains the data of RBUF1 (same for associated status information). #1 DS1 Data Source 31 read-only value1 The register RBUF contains the data of RBUF0 (same for associated status information). #0 value2 The register RBUF contains the data of RBUF1 (same for associated status information). #1 PAR0 Protocol-Related Argument in RBUF0 8 read-only PAR1 Protocol-Related Argument in RBUF1 24 read-only PERR0 Protocol-related Error in RBUF0 9 read-only value1 The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt. #0 value2 The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt. #1 PERR1 Protocol-related Error in RBUF1 25 read-only value1 The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt. #0 value2 The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt. #1 RDV00 Receive Data Valid in RBUF0 13 read-only value1 Register RBUF0 does not contain data that has not yet been read out. #0 value2 Register RBUF0 contains data that has not yet been read out. #1 RDV01 Receive Data Valid in RBUF1 14 read-only value1 Register RBUF1 does not contain data that has not yet been read out. #0 value2 Register RBUF1 contains data that has not yet been read out. #1 RDV10 Receive Data Valid in RBUF0 29 read-only value1 Register RBUF0 does not contain data that has not yet been read out. #0 value2 Register RBUF0 contains data that has not yet been read out. #1 RDV11 Receive Data Valid in RBUF1 30 read-only value1 Register RBUF1 does not contain data that has not yet been read out. #0 value2 Register RBUF1 contains data that has not yet been read out. #1 SOF0 Start of Frame in RBUF0 6 read-only value1 The data in RBUF0 has not been the first data word of a data frame. #0 value2 The data in RBUF0 has been the first data word of a data frame. #1 SOF1 Start of Frame in RBUF1 22 read-only value1 The data in RBUF1 has not been the first data word of a data frame. #0 value2 The data in RBUF1 has been the first data word of a data frame. #1 WLEN0 Received Data Word Length in RBUF0 0 3 read-only WLEN1 Received Data Word Length in RBUF1 16 3 read-only value1 One bit has been received. 0x0 value2 Sixteen bits have been received. 0xF RBUF1 Receiver Buffer Register 1 0x60 32 read-write n 0x0 0x0 DSR1 Data of Shift Registers 1[3:0] 0 15 read-only RBUFD Receiver Buffer Register for Debugger 0x58 32 read-write n 0x0 0x0 DSR Data from Shift Register 0 15 read-only RBUFSR Receiver Buffer Status Register 0x50 32 read-write n 0x0 0x0 DS Data Source of RBUF or RBUFD 15 read-only PAR Protocol-Related Argument in RBUF or RBUFD 8 read-only PERR Protocol-related Error in RBUF or RBUFD 9 read-only RDV0 Receive Data Valid in RBUF or RBUFD 13 read-only RDV1 Receive Data Valid in RBUF or RBUFD 14 read-only SOF Start of Frame in RBUF or RBUFD 6 read-only WLEN Received Data Word Length in RBUF or RBUFD 0 3 read-only SCTR Shift Control Register 0x34 32 read-write n 0x0 0x0 DOCFG Data Output Configuration 6 1 read-write value1 DOUTx = shift data value #00 value2 DOUTx = inverted shift data value #01 DSM Data Shift Mode 2 1 read-write value1 Receive and transmit data is shifted in and out one bit at a time through DX0 and DOUT0. #00 value3 Receive and transmit data is shifted in and out two bits at a time through two input stages (DX0 and DX3) and DOUT[1:0] respectively. #10 value4 Receive and transmit data is shifted in and out four bits at a time through four input stages (DX0, DX[5:3]) and DOUT[3:0] respectively. #11 FLE Frame Length 16 5 read-write HPCDIR Port Control Direction 4 read-write value1 The pin(s) with hardware pin control enabled are selected to be in input mode. #0 value2 The pin(s) with hardware pin control enabled are selected to be in output mode. #1 PDL Passive Data Level 1 read-write value1 The passive data level is 0. #0 value2 The passive data level is 1. #1 SDIR Shift Direction 0 read-write value1 Shift LSB first. The first data bit of a data word is located at bit position 0. #0 value2 Shift MSB first. The first data bit of a data word is located at the bit position given by bit field SCTR.WLE. #1 TRM Transmission Mode 8 1 read-write value1 The shift control signal is considered as inactive and data frame transfers are not possible. #00 value2 The shift control signal is considered active if it is at 1-level. This is the setting to be programmed to allow data transfers. #01 value3 The shift control signal is considered active if it is at 0-level. It is recommended to avoid this setting and to use the inversion in the DX2 stage in case of a low-active signal. #10 value4 The shift control signal is considered active without referring to the actual signal level. Data frame transfer is possible after each edge of the signal. #11 WLE Word Length 24 3 read-write value1 The data word contains 1 data bit located at bit position 0. 0x0 value2 The data word contains 2 data bits located at bit positions [1:0]. 0x1 value3 The data word contains 15 data bits located at bit positions [14:0]. 0xE value4 The data word contains 16 data bits located at bit positions [15:0]. 0xF TBCTR Transmitter Buffer Control Register 0x108 32 read-write n 0x0 0x0 ATBINP Alternative Transmit Buffer Interrupt Node Pointer 19 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 DPTR Data Pointer 0 5 write-only LIMIT Limit For Interrupt Generation 8 5 read-write LOF Buffer Event on Limit Overflow 28 read-write value1 A standard transmit buffer event occurs when the filling level equals the limit value and gets lower due to transmission of a data word. #0 value2 A standard transmit buffer interrupt event occurs when the filling level equals the limit value and gets bigger due to a write access to a data input location INx. #1 SIZE Buffer Size 24 2 read-write value1 The FIFO mechanism is disabled. The buffer does not accept any request for data. #000 value2 The FIFO buffer contains 2 entries. #001 value3 The FIFO buffer contains 4 entries. #010 value4 The FIFO buffer contains 8 entries. #011 value5 The FIFO buffer contains 16 entries. #100 value6 The FIFO buffer contains 32 entries. #101 value7 The FIFO buffer contains 64 entries. #110 STBIEN Standard Transmit Buffer Interrupt Enable 30 read-write value1 The standard transmit buffer interrupt generation is disabled. #0 value2 The standard transmit buffer interrupt generation is enabled. #1 STBINP Standard Transmit Buffer Interrupt Node Pointer 16 2 read-write value1 Output SR0 becomes activated. #000 value2 Output SR1 becomes activated. #001 value3 Output SR2 becomes activated. #010 value4 Output SR3 becomes activated. #011 value5 Output SR4 becomes activated. #100 value6 Output SR5 becomes activated. #101 STBTEN Standard Transmit Buffer Trigger Enable 15 read-write value1 The standard transmit buffer event trigger through bit TRBSR.STBT is disabled. #0 value2 The standard transmit buffer event trigger through bit TRBSR.STBT is enabled. #1 STBTM Standard Transmit Buffer Trigger Mode 14 read-write value1 Trigger mode 0: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.LIMIT. #0 value2 Trigger mode 1: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.SIZE. #1 TBERIEN Transmit Buffer Error Interrupt Enable 31 read-write value1 The transmit buffer error interrupt generation is disabled. #0 value2 The transmit buffer error interrupt generation is enabled. #1 TBUF[0] Transmit Buffer 0x100 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[10] Transmit Buffer 0x6DC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[11] Transmit Buffer 0x788 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[12] Transmit Buffer 0x838 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[13] Transmit Buffer 0x8EC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[14] Transmit Buffer 0x9A4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[15] Transmit Buffer 0xA60 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[16] Transmit Buffer 0xB20 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[17] Transmit Buffer 0xBE4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[18] Transmit Buffer 0xCAC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[19] Transmit Buffer 0xD78 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[1] Transmit Buffer 0x184 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[20] Transmit Buffer 0xE48 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[21] Transmit Buffer 0xF1C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[22] Transmit Buffer 0xFF4 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[23] Transmit Buffer 0x10D0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[24] Transmit Buffer 0x11B0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[25] Transmit Buffer 0x1294 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[26] Transmit Buffer 0x137C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[27] Transmit Buffer 0x1468 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[28] Transmit Buffer 0x1558 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[29] Transmit Buffer 0x164C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[2] Transmit Buffer 0x20C 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[30] Transmit Buffer 0x1744 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[31] Transmit Buffer 0x1840 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[3] Transmit Buffer 0x298 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[4] Transmit Buffer 0x328 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[5] Transmit Buffer 0x3BC 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[6] Transmit Buffer 0x454 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[7] Transmit Buffer 0x4F0 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[8] Transmit Buffer 0x590 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TBUF[9] Transmit Buffer 0x634 32 read-write n 0x0 0x0 TDATA Transmit Data 0 15 read-write TCSR Transmit Control/Status Register 0x38 32 read-write n 0x0 0x0 EOF End Of Frame 6 read-write value1 The data word in TBUF is not considered as last word of an SSC frame. #0 value2 The data word in TBUF is considered as last word of an SSC frame. #1 FLEMD FLE Mode 2 read-write value1 The automatic update of FLE is disabled. #0 value2 The automatic update of FLE is enabled. #1 HPCMD Hardware Port Control Mode 4 read-write value1 The automatic update of bits SCTR.DSM and SCTR.HPCDIR is disabled. #0 value2 The automatic update of bits SCTR.DSM and SCTR.HPCDIR is enabled. #1 SELMD Select Mode 1 read-write value1 The automatic update of PCR.CTR[23:16] is disabled. #0 value2 The automatic update of PCR.CTR[23:16] is disabled. #1 SOF Start Of Frame 5 read-write value1 The data word in TBUF is not considered as first word of a frame. #0 value2 The data word in TBUF is considered as first word of a frame. A currently running frame is finished and MSLS becomes deactivated (respecting the programmed delays). #1 TDEN TBUF Data Enable 10 1 read-write value1 A transmission start of the data word in TBUF is disabled. If a transmission is started, the passive data level is sent out. #00 value2 A transmission of the data word in TBUF can be started if TDV = 1. #01 value3 A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 0. #10 value4 A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 1. #11 TDSSM TBUF Data Single Shot Mode 8 read-write value1 The data word in TBUF is not considered as invalid after it has been loaded into the transmit shift register. The loading of the TBUF data into the shift register does not clear TDV. #0 value2 The data word in TBUF is considered as invalid after it has been loaded into the shift register. In ASC and IIC mode, TDV is cleared with the TBI event, whereas in SSC and IIS mode, it is cleared with the RSI event. TDSSM = 1 has to be programmed if an optional data buffer is used. #1 TDV Transmit Data Valid 7 read-only value1 The data word in TBUF is not valid for transmission. #0 value2 The data word in TBUF is valid for transmission and a transmission start is possible. New data should not be written to a TBUFx input location while TDV = 1. #1 TDVTR TBUF Data Valid Trigger 12 read-write value1 Bit TCSR.TE is permanently set. #0 value2 Bit TCSR.TE is set if DX2T becomes active while TDV = 1. #1 TE Trigger Event 28 read-only value1 The trigger event has not yet been detected. A transmission of the data word in TBUF can not be started. #0 value2 The trigger event has been detected (or the trigger mechanism is switched off) and a transmission of the data word in TBUF can not be started. #1 TSOF Transmitted Start Of Frame 24 read-only value1 The latest data word transmission has not been started for the first word of a data frame. #0 value2 The latest data word transmission has been started for the first word of a data frame. #1 TV Transmission Valid 26 read-only value1 The latest start of a data word transmission has taken place while no valid data was available. As a result, the transmission of a data words with passive level (SCTR.PDL) has been started. #0 value2 The latest start of a data word transmission has taken place with valid data from TBUF. #1 TVC Transmission Valid Cumulated 27 read-only value1 Since TVC has been set, at least one data buffer underflow condition has occurred. #0 value2 Since TVC has been set, no data buffer underflow condition has occurred. #1 WA Word Address 13 read-write value1 The data word in TBUF will be transmitted after a falling edge of WA has been detected (referring to PSR.WA). #0 value2 The data word in TBUF will be transmitted after a rising edge of WA has been detected (referring to PSR.WA). #1 WAMD WA Mode 3 read-write value1 The automatic update of bit WA is disabled. #0 value2 The automatic update of bit WA is enabled. #1 WLEMD WLE Mode 0 read-write value1 The automatic update of SCTR.WLE and TCSR.EOF is disabled. #0 value2 The automatic update of SCTR.WLE and TCSR.EOF is enabled. #1 TRBPTR Transmit/Receive Buffer Pointer Register 0x110 32 read-write n 0x0 0x0 RDIPTR Receiver Data Input Pointer 16 5 read-only RDOPTR Receiver Data Output Pointer 24 5 read-only TDIPTR Transmitter Data Input Pointer 0 5 read-only TDOPTR Transmitter Data Output Pointer 8 5 read-only TRBSCR Transmit/Receive Buffer Status Clear Register 0x118 32 read-write n 0x0 0x0 CARBI Clear Alternative Receive Buffer Event 2 write-only value1 No effect. #0 value2 Clear TRBSR.ARBI. #1 CBDV Clear Bypass Data Valid 10 write-only value1 No effect. #0 value2 Clear BYPCR.BDV. #1 CRBERI Clear Receive Buffer Error Event 1 write-only value1 No effect. #0 value2 Clear TRBSR.RBERI. #1 CSRBI Clear Standard Receive Buffer Event 0 write-only value1 No effect. #0 value2 Clear TRBSR.SRBI. #1 CSTBI Clear Standard Transmit Buffer Event 8 write-only value1 No effect. #0 value2 Clear TRBSR.STBI. #1 CTBERI Clear Transmit Buffer Error Event 9 write-only value1 No effect. #0 value2 Clear TRBSR.TBERI. #1 FLUSHRB Flush Receive Buffer 14 write-only value1 No effect. #0 value2 The receive FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic. #1 FLUSHTB Flush Transmit Buffer 15 write-only value1 No effect. #0 value2 The transmit FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic. #1 TRBSR Transmit/Receive Buffer Status Register 0x114 32 read-write n 0x0 0x0 ARBI Alternative Receive Buffer Event 2 read-write value1 An alternative receive buffer event has not been detected. #0 value2 An alternative receive buffer event has been detected. #1 RBERI Receive Buffer Error Event 1 read-write value1 A receive buffer error event has not been detected. #0 value2 A receive buffer error event has been detected. #1 RBFLVL Receive Buffer Filling Level 16 6 read-only RBUS Receive Buffer Busy 5 read-only value1 The receive buffer information has been completely updated. #0 value2 The OUTR update from the FIFO memory is ongoing. A read from OUTR will be delayed. FIFO pointers from the previous read are not yet updated. #1 REMPTY Receive Buffer Empty 3 read-only value1 The receive buffer is not empty. #0 value2 The receive buffer is empty. #1 RFULL Receive Buffer Full 4 read-only value1 The receive buffer is not full. #0 value2 The receive buffer is full. #1 SRBI Standard Receive Buffer Event 0 read-write value1 A standard receive buffer event has not been detected. #0 value2 A standard receive buffer event has been detected. #1 SRBT Standard Receive Buffer Event Trigger 6 read-only value1 A standard receive buffer event is not triggered using this bit. #0 value2 A standard receive buffer event is triggered using this bit. #1 STBI Standard Transmit Buffer Event 8 read-write value1 A standard transmit buffer event has not been detected. #0 value2 A standard transmit buffer event has been detected. #1 STBT Standard Transmit Buffer Event Trigger 14 read-only value1 A standard transmit buffer event is not triggered using this bit. #0 value2 A standard transmit buffer event is triggered using this bit. #1 TBERI Transmit Buffer Error Event 9 read-write value1 A transmit buffer error event has not been detected. #0 value2 A transmit buffer error event has been detected. #1 TBFLVL Transmit Buffer Filling Level 24 6 read-only TBUS Transmit Buffer Busy 13 read-only value1 The transmit buffer information has been completely updated. #0 value2 The FIFO memory update after write to INx is ongoing. A write to INx will be delayed. FIFO pointers from the previous INx write are not yet updated. #1 TEMPTY Transmit Buffer Empty 11 read-only value1 The transmit buffer is not empty. #0 value2 The transmit buffer is empty. #1 TFULL Transmit Buffer Full 12 read-only value1 The transmit buffer is not full. #0 value2 The transmit buffer is full. #1 VADC Analog to Digital Converter VADC 0x0 0x0 0x400 registers n VADC0_C0_0 Analog to Digital Converter Common Block 0 14 VADC0_C0_1 Analog to Digital Converter Common Block 0 15 VADC0_C0_2 Analog to Digital Converter Common Block 0 16 VADC0_C0_3 Analog to Digital Converter Common Block 0 17 BRSCTRL Background Request Source Control Register 0x200 32 read-write n 0x0 0x0 GTLVL Gate Input Level 20 read-only GTSEL Gate Input Selection 16 3 read-write GTWC Write Control for Gate Configuration 23 write-only value1 No write access to gate configuration #0 value2 Bitfield GTSEL can be written #1 SRCRESREG Source-specific Result Register 0 3 read-write value1 Use GxCHCTRy.RESREG to select a group result register #0000 value2 Store result in group result register GxRES1 #0001 value3 Store result in group result register GxRES15 #1111 XTLVL External Trigger Level 12 read-only XTMODE Trigger Operating Mode 13 1 read-write value1 No external trigger #00 value2 Trigger event upon a falling edge #01 value3 Trigger event upon a rising edge #10 value4 Trigger event upon any edge #11 XTSEL External Trigger Input Selection 8 3 read-write XTWC Write Control for Trigger Configuration 15 write-only value1 No write access to trigger configuration #0 value2 Bitfields XTMODE and XTSEL can be written #1 BRSMR Background Request Source Mode Register 0x204 32 read-write n 0x0 0x0 CLRPND Clear Pending Bits 8 write-only value1 No action #0 value2 The bits in registers BRSPNDx are cleared #1 ENGT Enable Gate 0 1 read-write value1 No conversion requests are issued #00 value2 Conversion requests are issued if at least one pending bit is set #01 value3 Conversion requests are issued if at least one pending bit is set and REQGTx = 1. #10 value4 Conversion requests are issued if at least one pending bit is set and REQGTx = 0. #11 ENSI Enable Source Interrupt 3 read-write value1 No request source interrupt #0 value2 A request source interrupt is generated upon a request source event (last pending conversion is finished) #1 ENTR Enable External Trigger 2 read-write value1 External trigger disabled #0 value2 The selected edge at the selected trigger input signal REQTR generates the load event #1 LDEV Generate Load Event 9 write-only value1 No action #0 value2 A load event is generated #1 LDM Autoscan Source Load Event Mode 5 read-write value1 Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event #0 value2 Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR) #1 REQGT Request Gate Level 7 read-only value1 The gate input is low #0 value2 The gate input is high #1 RPTDIS Repeat Disable 16 read-write value1 A cancelled conversion is repeated #0 value2 A cancelled conversion is discarded #1 SCAN Autoscan Enable 4 read-write value1 No autoscan #0 value2 Autoscan functionality enabled: a request source event automatically generates a load event #1 BRSPND[0] Background Request Source Pending Register 0x380 32 read-write n 0x0 0x0 CHPNDG0 Channels Pending Group x 0 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG1 Channels Pending Group x 1 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG2 Channels Pending Group x 2 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG3 Channels Pending Group x 3 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG4 Channels Pending Group x 4 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG5 Channels Pending Group x 5 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG6 Channels Pending Group x 6 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG7 Channels Pending Group x 7 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 BRSPND[1] Background Request Source Pending Register 0x544 32 read-write n 0x0 0x0 CHPNDG0 Channels Pending Group x 0 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG1 Channels Pending Group x 1 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG2 Channels Pending Group x 2 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG3 Channels Pending Group x 3 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG4 Channels Pending Group x 4 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG5 Channels Pending Group x 5 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG6 Channels Pending Group x 6 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG7 Channels Pending Group x 7 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 BRSPND[2] Background Request Source Pending Register 0x70C 32 read-write n 0x0 0x0 CHPNDG0 Channels Pending Group x 0 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG1 Channels Pending Group x 1 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG2 Channels Pending Group x 2 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG3 Channels Pending Group x 3 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG4 Channels Pending Group x 4 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG5 Channels Pending Group x 5 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG6 Channels Pending Group x 6 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG7 Channels Pending Group x 7 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 BRSPND[3] Background Request Source Pending Register 0x8D8 32 read-write n 0x0 0x0 CHPNDG0 Channels Pending Group x 0 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG1 Channels Pending Group x 1 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG2 Channels Pending Group x 2 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG3 Channels Pending Group x 3 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG4 Channels Pending Group x 4 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG5 Channels Pending Group x 5 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG6 Channels Pending Group x 6 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPNDG7 Channels Pending Group x 7 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 BRSSEL[0] Background Request Source Channel Select Register 0x300 32 read-write n 0x0 0x0 CHSELG0 Channel Selection Group x 0 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG1 Channel Selection Group x 1 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG2 Channel Selection Group x 2 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG3 Channel Selection Group x 3 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG4 Channel Selection Group x 4 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG5 Channel Selection Group x 5 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG6 Channel Selection Group x 6 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG7 Channel Selection Group x 7 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 BRSSEL[1] Background Request Source Channel Select Register 0x484 32 read-write n 0x0 0x0 CHSELG0 Channel Selection Group x 0 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG1 Channel Selection Group x 1 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG2 Channel Selection Group x 2 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG3 Channel Selection Group x 3 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG4 Channel Selection Group x 4 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG5 Channel Selection Group x 5 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG6 Channel Selection Group x 6 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG7 Channel Selection Group x 7 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 BRSSEL[2] Background Request Source Channel Select Register 0x60C 32 read-write n 0x0 0x0 CHSELG0 Channel Selection Group x 0 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG1 Channel Selection Group x 1 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG2 Channel Selection Group x 2 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG3 Channel Selection Group x 3 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG4 Channel Selection Group x 4 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG5 Channel Selection Group x 5 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG6 Channel Selection Group x 6 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG7 Channel Selection Group x 7 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 BRSSEL[3] Background Request Source Channel Select Register 0x798 32 read-write n 0x0 0x0 CHSELG0 Channel Selection Group x 0 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG1 Channel Selection Group x 1 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG2 Channel Selection Group x 2 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG3 Channel Selection Group x 3 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG4 Channel Selection Group x 4 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG5 Channel Selection Group x 5 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG6 Channel Selection Group x 6 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSELG7 Channel Selection Group x 7 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CLC Clock Control Register 0x0 32 read-write n 0x0 0x0 DISR Module Disable Request Bit 0 read-write value1 On request: enable the module clock #0 value2 Off request: stop the module clock #1 DISS Module Disable Status Bit 1 read-only value1 Module clock is enabled #0 value2 Off: module is not clocked #1 EDIS Sleep Mode Enable Control 3 read-write value1 Sleep mode request is enabled and functional #0 value2 Module disregards the sleep mode control signal #1 EMUXSEL External Multiplexer Select Register 0x3F0 32 read-write n 0x0 0x0 EMUXGRP0 External Multiplexer Group for Interface x 0 3 read-write EMUXGRP1 External Multiplexer Group for Interface x 4 3 read-write GLOBBOUND Global Boundary Select Register 0xB8 32 read-write n 0x0 0x0 BOUNDARY0 Boundary Value 0 for Limit Checking 0 11 read-write BOUNDARY1 Boundary Value 1 for Limit Checking 16 11 read-write GLOBCFG Global Configuration Register 0x80 32 read-write n 0x0 0x0 DCMSB Double Clock for the MSB Conversion 7 read-write value1 1 clock cycles for the MSB (standard) #0 value2 2 clock cycles for the MSB (fADCI > 20 MHz) #1 DIVA Divider Factor for the Analog Internal Clock 0 4 read-write value1 fADCI = fADC / 2 0x00 value2 fADCI = fADC / 2 0x01 value3 fADCI = fADC / 3 0x02 value4 fADCI = fADC / 32 0x1F DIVD Divider Factor for the Arbiter Clock 8 1 read-write value1 fADCD = fADC #00 value2 fADCD = fADC / 2 #01 value3 fADCD = fADC / 3 #10 value4 fADCD = fADC / 4 #11 DIVWC Write Control for Divider Parameters 15 write-only value1 No write access to divider parameters #0 value2 Bitfields DIVA, DCMSB, DIVD can be written #1 DPCAL0 Disable Post-Calibration 16 read-write value1 Automatic post-calibration after each conversion of group x #0 value2 No post-calibration #1 DPCAL1 Disable Post-Calibration 17 read-write value1 Automatic post-calibration after each conversion of group x #0 value2 No post-calibration #1 DPCAL2 Disable Post-Calibration 18 read-write value1 Automatic post-calibration after each conversion of group x #0 value2 No post-calibration #1 DPCAL3 Disable Post-Calibration 19 read-write value1 Automatic post-calibration after each conversion of group x #0 value2 No post-calibration #1 SUCAL Start-Up Calibration 31 write-only value1 No action #0 value2 Initiate the start-up calibration phase (indication in bit GxARBCFG.CAL) #1 GLOBEFLAG Global Event Flag Register 0xE0 32 read-write n 0x0 0x0 REVGLB Global Result Event 8 read-write value1 No result event #0 value2 New result was stored in register GLOBRES #1 REVGLBCLR Clear Global Result Event 24 write-only value1 No action #0 value2 Clear the result event flag REVGLB #1 SEVGLB Source Event (Background) 0 read-write value1 No source event #0 value2 A source event has occurred #1 SEVGLBCLR Clear Source Event (Background) 16 write-only value1 No action #0 value2 Clear the source event flag SEVGLB #1 GLOBEVNP Global Event Node Pointer Register 0x140 32 read-write n 0x0 0x0 REV0NP Service Request Node Pointer Backgr. Result 16 3 read-write value1 Select shared service request line 0 of common service request group 0 #0000 value2 Select shared service request line 3 of common service request group 0 #0011 value3 Select shared service request line 0 of common service request group 1 #0100 value4 Select shared service request line 3 of common service request group 1 #0111 SEV0NP Service Request Node Pointer Backgr. Source 0 3 read-write value1 Select shared service request line 0 of common service request group 0 #0000 value2 Select shared service request line 3 of common service request group 0 #0011 value3 Select shared service request line 0 of common service request group 1 #0100 value4 Select shared service request line 3 of common service request group 1 #0111 GLOBICLASS[0] Input Class Register, Global 0x140 32 read-write n 0x0 0x0 CME Conversion Mode for EMUX Conversions 24 2 read-write value1 12-bit conversion #000 value2 10-bit conversion #001 value3 8-bit conversion #010 value6 10-bit fast compare mode #101 CMS Conversion Mode for Standard Conversions 8 2 read-write value1 12-bit conversion #000 value2 10-bit conversion #001 value3 8-bit conversion #010 value6 10-bit fast compare mode #101 STCE Sample Time Control for EMUX Conversions 16 4 read-write STCS Sample Time Control for Standard Conversions 0 4 read-write GLOBICLASS[1] Input Class Register, Global 0x1E4 32 read-write n 0x0 0x0 CME Conversion Mode for EMUX Conversions 24 2 read-write value1 12-bit conversion #000 value2 10-bit conversion #001 value3 8-bit conversion #010 value6 10-bit fast compare mode #101 CMS Conversion Mode for Standard Conversions 8 2 read-write value1 12-bit conversion #000 value2 10-bit conversion #001 value3 8-bit conversion #010 value6 10-bit fast compare mode #101 STCE Sample Time Control for EMUX Conversions 16 4 read-write STCS Sample Time Control for Standard Conversions 0 4 read-write GLOBRCR Global Result Control Register 0x280 32 read-write n 0x0 0x0 DRCTR Data Reduction Control 16 3 read-write value1 Data reduction disabled #0000 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 GLOBRES Global Result Register 0x300 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 GNR Group Number 16 3 read-only RESULT Result of most recent conversion 0 15 read-write VF Valid Flag 31 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action) #1 GLOBRESD Global Result Register, Debug 0x380 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 GNR Group Number 16 3 read-only RESULT Result of most recent conversion 0 15 read-write VF Valid Flag 31 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action) #1 GLOBTF Global Test Functions Register 0x160 32 read-write n 0x0 0x0 CDEN Converter Diagnostics Enable 8 read-write value1 All diagnostic pull devices are disconnected #0 value2 Diagnostic pull devices connected as selected by bitfield CDSEL #1 CDGR Converter Diagnostics Group 4 3 read-write CDSEL Converter Diagnostics Pull-Devices Select 9 1 read-write value1 Connected to VAREF #00 value2 Connected to VAGND #01 value3 Connected to 1/3rd VAREF #10 value4 Connected to 2/3rd VAREF #11 CDWC Write Control for Conversion Diagnostics 15 write-only value1 No write access to parameters #0 value2 Bitfields CDSEL, CDEN, CDGR can be written #1 MDWC Write Control for Multiplexer Diagnostics 23 write-only value1 No write access to parameters #0 value2 Bitfield PDD can be written #1 PDD Pull-Down Diagnostics Enable 16 read-write value1 Disconnected #0 value2 The pull-down diagnostics device is active #1 ID Module Identification Register 0x8 32 read-write n 0x0 0x0 MOD_NUMBER Module Number 16 15 read-only MOD_REV Module Revision 0 7 read-only MOD_TYPE Module Type 8 7 read-only OCS OCDS Control and Status Register 0x28 32 read-write n 0x0 0x0 SUS OCDS Suspend Control 24 3 read-write value1 Will not suspend #0000 value2 Hard suspend: Clock is switched off immediately. #0001 value3 Soft suspend mode 0: Stop conversions after the currently running one is completed and its result has been stored. No change for the arbiter. #0010 value4 Soft suspend mode 1: Stop conversions after the currently running one is completed and its result has been stored. Stop arbiter after the current arbitration round. #0011 SUSSTA Suspend State 29 read-only value1 Module is not (yet) suspended #0 value2 Module is suspended #1 SUS_P SUS Write Protection 28 write-only TGB OTGB0/1 Bus Select 2 read-write value1 Trigger Set is output on OTGB0 #0 value2 Trigger Set is output on OTGB1 #1 TGS Trigger Set for OTGB0/1 0 1 read-write value1 No Trigger Set output #00 value2 Trigger Set 1: TS16_SSIG, input sample signals #01 TG_P TGS, TGB Write Protection 3 write-only VADC_G0 Analog to Digital Converter VADC 0x0 0x0 0x400 registers n VADC0_G0_0 Analog to Digital Converter Group 0 18 VADC0_G0_1 Analog to Digital Converter Group 0 19 VADC0_G0_2 Analog to Digital Converter Group 0 20 VADC0_G0_3 Analog to Digital Converter Group 0 21 ALIAS Alias Register 0xB0 32 read-write n 0x0 0x0 ALIAS0 Alias Value for CH0 Conversion Requests 0 4 read-write ALIAS1 Alias Value for CH1 Conversion Requests 8 4 read-write ARBCFG Arbitration Configuration Register 0x80 32 read-write n 0x0 0x0 ANONC Analog Converter Control 0 1 read-write ANONS Analog Converter Control Status 16 1 read-only value1 Analog converter off #00 value4 Normal operation (permanently on) #11 ARBM Arbitration Mode 7 read-write value1 The arbiter runs permanently. This setting is required for a synchronization slave (see ) and for equidistant sampling using the signal ARBCNT (see ). #0 value2 The arbiter only runs if at least one conversion request of an enabled request source is pending. This setting ensures a reproducible latency from an incoming request to the conversion start, if the converter is idle. Synchronized conversions are not supported. #1 ARBRND Arbitration Round Length 4 1 read-write value1 4 arbitration slots per round (tARB = 4 / fADCD) #00 value2 8 arbitration slots per round (tARB = 8 / fADCD) #01 value3 16 arbitration slots per round (tARB = 16 / fADCD) #10 value4 20 arbitration slots per round (tARB = 20 / fADCD) #11 BUSY Converter Busy Flag 30 read-only value1 Not busy #0 value2 Converter is busy with a conversion #1 CAL Start-Up Calibration Active Indication 28 read-only value1 Completed or not yet started #0 value2 Start-up calibration phase is active #1 SAMPLE Sample Phase Flag 31 read-only value1 Converting or idle #0 value2 Input signal is currently sampled #1 ARBPR Arbitration Priority Register 0x84 32 read-write n 0x0 0x0 ASEN0 Arbitration Slot 0 Enable 24 read-write value1 The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded. #0 value2 The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated. #1 ASEN1 Arbitration Slot 1 Enable 25 read-write value1 The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded. #0 value2 The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated. #1 ASEN2 Arbitration Slot 2 Enable 26 read-write value1 The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded. #0 value2 The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated. #1 CSM0 Conversion Start Mode of Request Source x 3 read-write value1 Wait-for-start mode #0 value2 Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources. #1 CSM1 Conversion Start Mode of Request Source x 7 read-write value1 Wait-for-start mode #0 value2 Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources. #1 CSM2 Conversion Start Mode of Request Source x 11 read-write value1 Wait-for-start mode #0 value2 Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources. #1 PRIO0 Priority of Request Source x 0 1 read-write value1 Lowest priority is selected. #00 value2 Highest priority is selected. #11 PRIO1 Priority of Request Source x 4 1 read-write value1 Lowest priority is selected. #00 value2 Highest priority is selected. #11 PRIO2 Priority of Request Source x 8 1 read-write value1 Lowest priority is selected. #00 value2 Highest priority is selected. #11 ASCTRL Autoscan Source Control Register 0x120 32 read-write n 0x0 0x0 GTLVL Gate Input Level 20 read-only GTSEL Gate Input Selection 16 3 read-write GTWC Write Control for Gate Configuration 23 write-only value1 No write access to gate configuration #0 value2 Bitfield GTSEL can be written #1 SRCRESREG Source-specific Result Register 0 3 read-write value1 Use GxCHCTRy.RESREG to select a group result register #0000 value2 Store result in group result register GxRES1 #0001 value3 Store result in group result register GxRES15 #1111 TMEN Timer Mode Enable 28 read-write value1 No timer mode: standard gating mechanism can be used #0 value2 Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled #1 TMWC Write Control for Timer Mode 31 write-only value1 No write access to timer mode #0 value2 Bitfield TMEN can be written #1 XTLVL External Trigger Level 12 read-only XTMODE Trigger Operating Mode 13 1 read-write value1 No external trigger #00 value2 Trigger event upon a falling edge #01 value3 Trigger event upon a rising edge #10 value4 Trigger event upon any edge #11 XTSEL External Trigger Input Selection 8 3 read-write XTWC Write Control for Trigger Configuration 15 write-only value1 No write access to trigger configuration #0 value2 Bitfields XTMODE and XTSEL can be written #1 ASMR Autoscan Source Mode Register 0x124 32 read-write n 0x0 0x0 CLRPND Clear Pending Bits 8 write-only value1 No action #0 value2 The bits in register GxASPNDx are cleared #1 ENGT Enable Gate 0 1 read-write value1 No conversion requests are issued #00 value2 Conversion requests are issued if at least one pending bit is set #01 value3 Conversion requests are issued if at least one pending bit is set and REQGTx = 1. #10 value4 Conversion requests are issued if at least one pending bit is set and REQGTx = 0. #11 ENSI Enable Source Interrupt 3 read-write value1 No request source interrupt #0 value2 A request source interrupt is generated upon a request source event (last pending conversion is finished) #1 ENTR Enable External Trigger 2 read-write value1 External trigger disabled #0 value2 The selected edge at the selected trigger input signal REQTR generates the load event #1 LDEV Generate Load Event 9 write-only value1 No action #0 value2 A load event is generated #1 LDM Autoscan Source Load Event Mode 5 read-write value1 Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event #0 value2 Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR) #1 REQGT Request Gate Level 7 read-only value1 The gate input is low #0 value2 The gate input is high #1 RPTDIS Repeat Disable 16 read-write value1 A cancelled conversion is repeated #0 value2 A cancelled conversion is discarded #1 SCAN Autoscan Enable 4 read-write value1 No autoscan #0 value2 Autoscan functionality enabled: a request source event automatically generates a load event #1 ASPND Autoscan Source Pending Register 0x12C 32 read-write n 0x0 0x0 CHPND0 Channels Pending 0 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND1 Channels Pending 1 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND2 Channels Pending 2 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND3 Channels Pending 3 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND4 Channels Pending 4 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND5 Channels Pending 5 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND6 Channels Pending 6 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND7 Channels Pending 7 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 ASSEL Autoscan Source Channel Select Register 0x128 32 read-write n 0x0 0x0 CHSEL0 Channel Selection 0 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL1 Channel Selection 1 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL2 Channel Selection 2 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL3 Channel Selection 3 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL4 Channel Selection 4 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL5 Channel Selection 5 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL6 Channel Selection 6 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL7 Channel Selection 7 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 BFL Boundary Flag Register 0xC8 32 read-write n 0x0 0x0 BFA0 Boundary Flag 0 Activation Select 8 read-write value1 Set boundary flag BFLy if result is above the defined band or compare value, clear if below #0 value2 Set boundary flag BFLy if result is below the defined band or compare value, clear if above #1 BFA1 Boundary Flag 1 Activation Select 9 read-write value1 Set boundary flag BFLy if result is above the defined band or compare value, clear if below #0 value2 Set boundary flag BFLy if result is below the defined band or compare value, clear if above #1 BFA2 Boundary Flag 2 Activation Select 10 read-write value1 Set boundary flag BFLy if result is above the defined band or compare value, clear if below #0 value2 Set boundary flag BFLy if result is below the defined band or compare value, clear if above #1 BFA3 Boundary Flag 3 Activation Select 11 read-write value1 Set boundary flag BFLy if result is above the defined band or compare value, clear if below #0 value2 Set boundary flag BFLy if result is below the defined band or compare value, clear if above #1 BFI0 Boundary Flag 0 Inversion Control 16 read-write value1 Use BFLy directly #0 value2 Invert value and use BFLy #1 BFI1 Boundary Flag 1 Inversion Control 17 read-write value1 Use BFLy directly #0 value2 Invert value and use BFLy #1 BFI2 Boundary Flag 2 Inversion Control 18 read-write value1 Use BFLy directly #0 value2 Invert value and use BFLy #1 BFI3 Boundary Flag 3 Inversion Control 19 read-write value1 Use BFLy directly #0 value2 Invert value and use BFLy #1 BFL0 Boundary Flag 0 0 read-only value1 Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled #0 value2 Active state: result has crossed the activation boundary #1 BFL1 Boundary Flag 1 1 read-only value1 Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled #0 value2 Active state: result has crossed the activation boundary #1 BFL2 Boundary Flag 2 2 read-only value1 Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled #0 value2 Active state: result has crossed the activation boundary #1 BFL3 Boundary Flag 3 3 read-only value1 Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled #0 value2 Active state: result has crossed the activation boundary #1 BFLC Boundary Flag Control Register 0xD0 32 read-write n 0x0 0x0 BFM0 Boundary Flag y Mode Control 0 3 read-write value1 Disable boundary flag, BFLy is not changed #0000 value2 Always enable boundary flag (follow compare results) #0001 value3 Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive #0010 value4 Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive #0011 BFM1 Boundary Flag y Mode Control 4 3 read-write value1 Disable boundary flag, BFLy is not changed #0000 value2 Always enable boundary flag (follow compare results) #0001 value3 Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive #0010 value4 Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive #0011 BFM2 Boundary Flag y Mode Control 8 3 read-write value1 Disable boundary flag, BFLy is not changed #0000 value2 Always enable boundary flag (follow compare results) #0001 value3 Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive #0010 value4 Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive #0011 BFM3 Boundary Flag y Mode Control 12 3 read-write value1 Disable boundary flag, BFLy is not changed #0000 value2 Always enable boundary flag (follow compare results) #0001 value3 Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive #0010 value4 Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive #0011 BFLNP Boundary Flag Node Pointer Register 0xD4 32 read-write n 0x0 0x0 BFL0NP Boundary Flag y Node Pointer 0 3 read-write value1 Select common bondary flag output 0 #0000 value2 Select common bondary flag output 3 #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 value5 Disabled, no common output signal #1111 BFL1NP Boundary Flag y Node Pointer 4 3 read-write value1 Select common bondary flag output 0 #0000 value2 Select common bondary flag output 3 #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 value5 Disabled, no common output signal #1111 BFL2NP Boundary Flag y Node Pointer 8 3 read-write value1 Select common bondary flag output 0 #0000 value2 Select common bondary flag output 3 #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 value5 Disabled, no common output signal #1111 BFL3NP Boundary Flag y Node Pointer 12 3 read-write value1 Select common bondary flag output 0 #0000 value2 Select common bondary flag output 3 #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 value5 Disabled, no common output signal #1111 BFLS Boundary Flag Software Register 0xCC 32 read-write n 0x0 0x0 BFC0 Boundary Flag 0 Clear 0 write-only value1 No action #0 value2 Clear bit BFLy #1 BFC1 Boundary Flag 1 Clear 1 write-only value1 No action #0 value2 Clear bit BFLy #1 BFC2 Boundary Flag 2 Clear 2 write-only value1 No action #0 value2 Clear bit BFLy #1 BFC3 Boundary Flag 3 Clear 3 write-only value1 No action #0 value2 Clear bit BFLy #1 BFS0 Boundary Flag 0 Set 16 write-only value1 No action #0 value2 Set bit BFLy #1 BFS1 Boundary Flag 1 Set 17 write-only value1 No action #0 value2 Set bit BFLy #1 BFS2 Boundary Flag 2 Set 18 write-only value1 No action #0 value2 Set bit BFLy #1 BFS3 Boundary Flag 3 Set 19 write-only value1 No action #0 value2 Set bit BFLy #1 BOUND Boundary Select Register 0xB8 32 read-write n 0x0 0x0 BOUNDARY0 Boundary Value 0 for Limit Checking 0 11 read-write BOUNDARY1 Boundary Value 1 for Limit Checking 16 11 read-write CEFCLR Channel Event Flag Clear Register 0x190 32 read-write n 0x0 0x0 CEV0 Clear Channel Event for Channel 0 0 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV1 Clear Channel Event for Channel 1 1 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV2 Clear Channel Event for Channel 2 2 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV3 Clear Channel Event for Channel 3 3 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV4 Clear Channel Event for Channel 4 4 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV5 Clear Channel Event for Channel 5 5 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV6 Clear Channel Event for Channel 6 6 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV7 Clear Channel Event for Channel 7 7 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEFLAG Channel Event Flag Register 0x180 32 read-write n 0x0 0x0 CEV0 Channel Event for Channel 0 0 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV1 Channel Event for Channel 1 1 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV2 Channel Event for Channel 2 2 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV3 Channel Event for Channel 3 3 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV4 Channel Event for Channel 4 4 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV5 Channel Event for Channel 5 5 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV6 Channel Event for Channel 6 6 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV7 Channel Event for Channel 7 7 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEVNP0 Channel Event Node Pointer Register 0 0x1A0 32 read-write n 0x0 0x0 CEV0NP Service Request Node Pointer Channel Event i 0 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV1NP Service Request Node Pointer Channel Event i 4 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV2NP Service Request Node Pointer Channel Event i 8 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV3NP Service Request Node Pointer Channel Event i 12 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV4NP Service Request Node Pointer Channel Event i 16 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV5NP Service Request Node Pointer Channel Event i 20 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV6NP Service Request Node Pointer Channel Event i 24 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV7NP Service Request Node Pointer Channel Event i 28 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CHASS Channel Assignment Register 0x88 32 read-write n 0x0 0x0 ASSCH0 Assignment for Channel 0 0 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH1 Assignment for Channel 1 1 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH2 Assignment for Channel 2 2 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH3 Assignment for Channel 3 3 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH4 Assignment for Channel 4 4 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH5 Assignment for Channel 5 5 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH6 Assignment for Channel 6 6 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH7 Assignment for Channel 7 7 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 CHCTR[0] Channel Ctrl. Reg. 0x400 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[1] Channel Ctrl. Reg. 0x604 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[2] Channel Ctrl. Reg. 0x80C 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[3] Channel Ctrl. Reg. 0xA18 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[4] Channel Ctrl. Reg. 0xC28 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[5] Channel Ctrl. Reg. 0xE3C 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[6] Channel Ctrl. Reg. 0x1054 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[7] Channel Ctrl. Reg. 0x1270 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 EMUXCTR External Multiplexer Control Register 0x1F0 32 read-write n 0x0 0x0 EMUXACT External Multiplexer Actual Selection 8 2 read-only EMUXCH External Multiplexer Channel Select 16 9 read-write EMUXMODE External Multiplexer Mode 26 1 read-write value1 Software control (no hardware action) #00 value2 Steady mode (use EMUXSET value) #01 value3 Single-step mode #10 value4 Sequence mode #11 EMUXSET External Multiplexer Start Selection 0 2 read-write EMXCOD External Multiplexer Coding Scheme 28 read-write value1 Output the channel number in binary code #0 value2 Output the channel number in Gray code #1 EMXCSS External Multiplexer Channel Selection Style 30 read-only value1 Channel number: Bitfield EMUXCH selects an arbitrary channel #0 value2 Channel enable: Each bit of bitfield EMUXCH selects the associated channel for EMUX control #1 EMXST External Multiplexer Sample Time Control 29 read-write value1 Use STCE whenever the setting changes #0 value2 Use STCE for each conversion of an external channel #1 EMXWC Write Control for EMUX Configuration 31 write-only value1 No write access to EMUX cfg. #0 value2 Bitfields EMXMODE, EMXCOD, EMXST, EMXCSS can be written #1 ICLASS[0] Input Class Register 0x140 32 read-write n 0x0 0x0 CME Conversion Mode for EMUX Conversions 24 2 read-write value1 12-bit conversion #000 value2 10-bit conversion #001 value3 8-bit conversion #010 value6 10-bit fast compare mode #101 CMS Conversion Mode for Standard Conversions 8 2 read-write value1 12-bit conversion #000 value2 10-bit conversion #001 value3 8-bit conversion #010 value6 10-bit fast compare mode #101 STCE Sample Time Control for EMUX Conversions 16 4 read-write STCS Sample Time Control for Standard Conversions 0 4 read-write ICLASS[1] Input Class Register 0x1E4 32 read-write n 0x0 0x0 CME Conversion Mode for EMUX Conversions 24 2 read-write value1 12-bit conversion #000 value2 10-bit conversion #001 value3 8-bit conversion #010 value6 10-bit fast compare mode #101 CMS Conversion Mode for Standard Conversions 8 2 read-write value1 12-bit conversion #000 value2 10-bit conversion #001 value3 8-bit conversion #010 value6 10-bit fast compare mode #101 STCE Sample Time Control for EMUX Conversions 16 4 read-write STCS Sample Time Control for Standard Conversions 0 4 read-write Q0R0 Queue 0 Register 0 0x10C 32 read-write n 0x0 0x0 ENSI Enable Source Interrupt 6 read-only value1 No request source interrupt #0 value2 A request source event interrupt is generated upon a request source event (related conversion is finished) #1 EXTR External Trigger 7 read-only value1 A valid queue entry immediately leads to a conversion request #0 value2 The request handler waits for a trigger event #1 REQCHNR Request Channel Number 0 4 read-only RF Refill 5 read-only value1 The request is discarded after the conversion start. #0 value2 The request is automatically refilled into the queue after the conversion start. #1 V Request Channel Number Valid 8 read-only value1 No valid queue entry #0 value2 The queue entry is valid and leads to a conversion request #1 QBUR0 Queue 0 Backup Register QINR0 0x110 32 read-write n 0x0 0x0 ENSI Enable Source Interrupt 6 read-only EXTR External Trigger 7 read-only REQCHNR Request Channel Number 0 4 read-only RF Refill 5 read-only V Request Channel Number Valid 8 read-only value1 Backup register not valid #0 value2 Backup register contains a valid entry. This will be requested before a valid entry in queue register 0 (stage 0) will be requested. #1 QCTRL0 Queue 0 Source Control Register 0x100 32 read-write n 0x0 0x0 GTLVL Gate Input Level 20 read-only GTSEL Gate Input Selection 16 3 read-write GTWC Write Control for Gate Configuration 23 write-only value1 No write access to gate configuration #0 value2 Bitfield GTSEL can be written #1 SRCRESREG Source-specific Result Register 0 3 read-write value1 Use GxCHCTRy.RESREG to select a group result register #0000 value2 Store result in group result register GxRES1 #0001 value3 Store result in group result register GxRES15 #1111 TMEN Timer Mode Enable 28 read-write value1 No timer mode: standard gating mechanism can be used #0 value2 Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled #1 TMWC Write Control for Timer Mode 31 write-only value1 No write access to timer mode #0 value2 Bitfield TMEN can be written #1 XTLVL External Trigger Level 12 read-only XTMODE Trigger Operating Mode 13 1 read-write value1 No external trigger #00 value2 Trigger event upon a falling edge #01 value3 Trigger event upon a rising edge #10 value4 Trigger event upon any edge #11 XTSEL External Trigger Input Selection 8 3 read-write XTWC Write Control for Trigger Configuration 15 write-only value1 No write access to trigger configuration #0 value2 Bitfields XTMODE and XTSEL can be written #1 QINR0 Queue 0 Input Register 0x110 32 read-write n 0x0 0x0 ENSI Enable Source Interrupt 6 write-only value1 No request source interrupt #0 value2 A request source event interrupt is generated upon a request source event (related conversion is finished) #1 EXTR External Trigger 7 write-only value1 A valid queue entry immediately leads to a conversion request. #0 value2 A valid queue entry waits for a trigger event to occur before issuing a conversion request. #1 REQCHNR Request Channel Number 0 4 write-only RF Refill 5 write-only value1 No refill: this queue entry is converted once and then invalidated #0 value2 Automatic refill: this queue entry is automatically reloaded into QINRx when the related conversion is started #1 QMR0 Queue 0 Mode Register 0x104 32 read-write n 0x0 0x0 CEV Clear Event Flag 11 write-only value1 No action #0 value2 Clear bit EV #1 CLRV Clear Valid Bit 8 write-only value1 No action #0 value2 The next pending valid queue entry in the sequence and the event flag EV are cleared. If there is a valid entry in the queue backup register (QBUR.V = 1), this entry is cleared, otherwise the entry in queue register 0 is cleared. #1 ENGT Enable Gate 0 1 read-write value1 No conversion requests are issued #00 value2 Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register #01 value3 Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 1 #10 value4 Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 0 #11 ENTR Enable External Trigger 2 read-write value1 External trigger disabled #0 value2 The selected edge at the selected trigger input signal REQTR generates the trigger event #1 FLUSH Flush Queue 10 write-only value1 No action #0 value2 Clear all queue entries (including backup stage) and the event flag EV. The queue contains no more valid entry. #1 RPTDIS Repeat Disable 16 read-write value1 A cancelled conversion is repeated #0 value2 A cancelled conversion is discarded #1 TREV Trigger Event 9 write-only value1 No action #0 value2 Generate a trigger event by software #1 QSR0 Queue 0 Status Register 0x108 32 read-write n 0x0 0x0 EMPTY Queue Empty 5 read-only value1 There are valid entries in the queue (see FILL) #0 value2 No valid entries (queue is empty) #1 EV Event Detected 8 read-only value1 No trigger event #0 value2 A trigger event has been detected #1 FILL Filling Level for Queue 2 0 3 read-only value1 There is 1 ( if EMPTY = 0) or no (if EMPTY = 1) valid entry in the queue #0000 value2 There are 2 valid entries in the queue #0001 value3 There are 3 valid entries in the queue #0010 value4 There are 8 valid entries in the queue #0111 REQGT Request Gate Level 7 read-only value1 The gate input is low #0 value2 The gate input is high #1 RCR[0] Result Control Register 0x500 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[10] Result Control Register 0x1EDC 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[11] Result Control Register 0x2188 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[12] Result Control Register 0x2438 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[13] Result Control Register 0x26EC 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[14] Result Control Register 0x29A4 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[15] Result Control Register 0x2C60 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[1] Result Control Register 0x784 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[2] Result Control Register 0xA0C 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[3] Result Control Register 0xC98 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[4] Result Control Register 0xF28 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[5] Result Control Register 0x11BC 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[6] Result Control Register 0x1454 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[7] Result Control Register 0x16F0 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[8] Result Control Register 0x1990 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[9] Result Control Register 0x1C34 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 REFCLR Result Event Flag Clear Register 0x194 32 read-write n 0x0 0x0 REV0 Clear Result Event for Result Register 0 0 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV1 Clear Result Event for Result Register 1 1 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV10 Clear Result Event for Result Register 10 10 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV11 Clear Result Event for Result Register 11 11 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV12 Clear Result Event for Result Register 12 12 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV13 Clear Result Event for Result Register 13 13 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV14 Clear Result Event for Result Register 14 14 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV15 Clear Result Event for Result Register 15 15 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV2 Clear Result Event for Result Register 2 2 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV3 Clear Result Event for Result Register 3 3 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV4 Clear Result Event for Result Register 4 4 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV5 Clear Result Event for Result Register 5 5 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV6 Clear Result Event for Result Register 6 6 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV7 Clear Result Event for Result Register 7 7 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV8 Clear Result Event for Result Register 8 8 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV9 Clear Result Event for Result Register 9 9 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REFLAG Result Event Flag Register 0x184 32 read-write n 0x0 0x0 REV0 Result Event for Result Register 0 0 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV1 Result Event for Result Register 1 1 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV10 Result Event for Result Register 10 10 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV11 Result Event for Result Register 11 11 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV12 Result Event for Result Register 12 12 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV13 Result Event for Result Register 13 13 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV14 Result Event for Result Register 14 14 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV15 Result Event for Result Register 15 15 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV2 Result Event for Result Register 2 2 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV3 Result Event for Result Register 3 3 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV4 Result Event for Result Register 4 4 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV5 Result Event for Result Register 5 5 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV6 Result Event for Result Register 6 6 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV7 Result Event for Result Register 7 7 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV8 Result Event for Result Register 8 8 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV9 Result Event for Result Register 9 9 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 RESD[0] Result Register, Debug 0x700 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[10] Result Register, Debug 0x2ADC 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[11] Result Register, Debug 0x2E88 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[12] Result Register, Debug 0x3238 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[13] Result Register, Debug 0x35EC 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[14] Result Register, Debug 0x39A4 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[15] Result Register, Debug 0x3D60 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[1] Result Register, Debug 0xA84 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[2] Result Register, Debug 0xE0C 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[3] Result Register, Debug 0x1198 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[4] Result Register, Debug 0x1528 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[5] Result Register, Debug 0x18BC 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[6] Result Register, Debug 0x1C54 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[7] Result Register, Debug 0x1FF0 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[8] Result Register, Debug 0x2390 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[9] Result Register, Debug 0x2734 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[0] Result Register 0x600 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[10] Result Register 0x24DC 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[11] Result Register 0x2808 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[12] Result Register 0x2B38 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[13] Result Register 0x2E6C 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[14] Result Register 0x31A4 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[15] Result Register 0x34E0 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[1] Result Register 0x904 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[2] Result Register 0xC0C 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[3] Result Register 0xF18 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[4] Result Register 0x1228 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[5] Result Register 0x153C 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[6] Result Register 0x1854 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[7] Result Register 0x1B70 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[8] Result Register 0x1E90 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[9] Result Register 0x21B4 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 REVNP0 Result Event Node Pointer Register 0 0x1B0 32 read-write n 0x0 0x0 REV0NP Service Request Node Pointer Result Event i 0 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV1NP Service Request Node Pointer Result Event i 4 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV2NP Service Request Node Pointer Result Event i 8 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV3NP Service Request Node Pointer Result Event i 12 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV4NP Service Request Node Pointer Result Event i 16 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV5NP Service Request Node Pointer Result Event i 20 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV6NP Service Request Node Pointer Result Event i 24 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV7NP Service Request Node Pointer Result Event i 28 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REVNP1 Result Event Node Pointer Register 1 0x1B4 32 read-write n 0x0 0x0 REV10NP Service Request Node Pointer Result Event i 8 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV11NP Service Request Node Pointer Result Event i 12 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV12NP Service Request Node Pointer Result Event i 16 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV13NP Service Request Node Pointer Result Event i 20 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV14NP Service Request Node Pointer Result Event i 24 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV15NP Service Request Node Pointer Result Event i 28 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV8NP Service Request Node Pointer Result Event i 0 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV9NP Service Request Node Pointer Result Event i 4 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 SEFCLR Source Event Flag Clear Register 0x198 32 read-write n 0x0 0x0 SEV0 Clear Source Event 0/1 0 write-only value1 No action #0 value2 Clear the source event flag in GxSEFLAG #1 SEV1 Clear Source Event 0/1 1 write-only value1 No action #0 value2 Clear the source event flag in GxSEFLAG #1 SEFLAG Source Event Flag Register 0x188 32 read-write n 0x0 0x0 SEV0 Source Event 0/1 0 read-write value1 No source event #0 value2 A source event has occurred #1 SEV1 Source Event 0/1 1 read-write value1 No source event #0 value2 A source event has occurred #1 SEVNP Source Event Node Pointer Register 0x1C0 32 read-write n 0x0 0x0 SEV0NP Service Request Node Pointer Source Event i 0 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 SEV1NP Service Request Node Pointer Source Event i 4 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 SRACT Service Request Software Activation Trigger 0x1C8 32 read-write n 0x0 0x0 AGSR0 Activate Group Service Request Node 0 0 write-only value1 No action #0 value2 Activate the associated service request line #1 AGSR1 Activate Group Service Request Node 1 1 write-only value1 No action #0 value2 Activate the associated service request line #1 AGSR2 Activate Group Service Request Node 2 2 write-only value1 No action #0 value2 Activate the associated service request line #1 AGSR3 Activate Group Service Request Node 3 3 write-only value1 No action #0 value2 Activate the associated service request line #1 ASSR0 Activate Shared Service Request Node 0 8 write-only value1 No action #0 value2 Activate the associated service request line #1 ASSR1 Activate Shared Service Request Node 1 9 write-only value1 No action #0 value2 Activate the associated service request line #1 ASSR2 Activate Shared Service Request Node 2 10 write-only value1 No action #0 value2 Activate the associated service request line #1 ASSR3 Activate Shared Service Request Node 3 11 write-only value1 No action #0 value2 Activate the associated service request line #1 SYNCTR Synchronization Control Register 0xC0 32 read-write n 0x0 0x0 EVALR1 Evaluate Ready Input Rx 4 read-write value1 No ready input control #0 value2 Ready input Rx is considered for the start of a parallel conversion of this conversion group #1 EVALR2 Evaluate Ready Input Rx 5 read-write value1 No ready input control #0 value2 Ready input Rx is considered for the start of a parallel conversion of this conversion group #1 EVALR3 Evaluate Ready Input Rx 6 read-write value1 No ready input control #0 value2 Ready input Rx is considered for the start of a parallel conversion of this conversion group #1 STSEL Start Selection 0 1 read-write value1 Kernel is synchronization master: Use own bitfield GxARBCFG.ANONC #00 value2 Kernel is synchronization slave: Control information from input CI1 #01 value3 Kernel is synchronization slave: Control information from input CI2 #10 value4 Kernel is synchronization slave: Control information from input CI3 #11 VFR Valid Flag Register 0x1F8 32 read-write n 0x0 0x0 VF0 Valid Flag of Result Register x 0 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF1 Valid Flag of Result Register x 1 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF10 Valid Flag of Result Register x 10 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF11 Valid Flag of Result Register x 11 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF12 Valid Flag of Result Register x 12 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF13 Valid Flag of Result Register x 13 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF14 Valid Flag of Result Register x 14 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF15 Valid Flag of Result Register x 15 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF2 Valid Flag of Result Register x 2 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF3 Valid Flag of Result Register x 3 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF4 Valid Flag of Result Register x 4 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF5 Valid Flag of Result Register x 5 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF6 Valid Flag of Result Register x 6 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF7 Valid Flag of Result Register x 7 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF8 Valid Flag of Result Register x 8 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF9 Valid Flag of Result Register x 9 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VADC_G1 Analog to Digital Converter VADC 0x0 0x0 0x400 registers n VADC0_G1_0 Analog to Digital Converter Group 1 22 VADC0_G1_1 Analog to Digital Converter Group 1 23 VADC0_G1_2 Analog to Digital Converter Group 1 24 VADC0_G1_3 Analog to Digital Converter Group 1 25 ALIAS Alias Register 0xB0 32 read-write n 0x0 0x0 ALIAS0 Alias Value for CH0 Conversion Requests 0 4 read-write ALIAS1 Alias Value for CH1 Conversion Requests 8 4 read-write ARBCFG Arbitration Configuration Register 0x80 32 read-write n 0x0 0x0 ANONC Analog Converter Control 0 1 read-write ANONS Analog Converter Control Status 16 1 read-only value1 Analog converter off #00 value4 Normal operation (permanently on) #11 ARBM Arbitration Mode 7 read-write value1 The arbiter runs permanently. This setting is required for a synchronization slave (see ) and for equidistant sampling using the signal ARBCNT (see ). #0 value2 The arbiter only runs if at least one conversion request of an enabled request source is pending. This setting ensures a reproducible latency from an incoming request to the conversion start, if the converter is idle. Synchronized conversions are not supported. #1 ARBRND Arbitration Round Length 4 1 read-write value1 4 arbitration slots per round (tARB = 4 / fADCD) #00 value2 8 arbitration slots per round (tARB = 8 / fADCD) #01 value3 16 arbitration slots per round (tARB = 16 / fADCD) #10 value4 20 arbitration slots per round (tARB = 20 / fADCD) #11 BUSY Converter Busy Flag 30 read-only value1 Not busy #0 value2 Converter is busy with a conversion #1 CAL Start-Up Calibration Active Indication 28 read-only value1 Completed or not yet started #0 value2 Start-up calibration phase is active #1 SAMPLE Sample Phase Flag 31 read-only value1 Converting or idle #0 value2 Input signal is currently sampled #1 ARBPR Arbitration Priority Register 0x84 32 read-write n 0x0 0x0 ASEN0 Arbitration Slot 0 Enable 24 read-write value1 The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded. #0 value2 The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated. #1 ASEN1 Arbitration Slot 1 Enable 25 read-write value1 The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded. #0 value2 The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated. #1 ASEN2 Arbitration Slot 2 Enable 26 read-write value1 The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded. #0 value2 The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated. #1 CSM0 Conversion Start Mode of Request Source x 3 read-write value1 Wait-for-start mode #0 value2 Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources. #1 CSM1 Conversion Start Mode of Request Source x 7 read-write value1 Wait-for-start mode #0 value2 Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources. #1 CSM2 Conversion Start Mode of Request Source x 11 read-write value1 Wait-for-start mode #0 value2 Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources. #1 PRIO0 Priority of Request Source x 0 1 read-write value1 Lowest priority is selected. #00 value2 Highest priority is selected. #11 PRIO1 Priority of Request Source x 4 1 read-write value1 Lowest priority is selected. #00 value2 Highest priority is selected. #11 PRIO2 Priority of Request Source x 8 1 read-write value1 Lowest priority is selected. #00 value2 Highest priority is selected. #11 ASCTRL Autoscan Source Control Register 0x120 32 read-write n 0x0 0x0 GTLVL Gate Input Level 20 read-only GTSEL Gate Input Selection 16 3 read-write GTWC Write Control for Gate Configuration 23 write-only value1 No write access to gate configuration #0 value2 Bitfield GTSEL can be written #1 SRCRESREG Source-specific Result Register 0 3 read-write value1 Use GxCHCTRy.RESREG to select a group result register #0000 value2 Store result in group result register GxRES1 #0001 value3 Store result in group result register GxRES15 #1111 TMEN Timer Mode Enable 28 read-write value1 No timer mode: standard gating mechanism can be used #0 value2 Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled #1 TMWC Write Control for Timer Mode 31 write-only value1 No write access to timer mode #0 value2 Bitfield TMEN can be written #1 XTLVL External Trigger Level 12 read-only XTMODE Trigger Operating Mode 13 1 read-write value1 No external trigger #00 value2 Trigger event upon a falling edge #01 value3 Trigger event upon a rising edge #10 value4 Trigger event upon any edge #11 XTSEL External Trigger Input Selection 8 3 read-write XTWC Write Control for Trigger Configuration 15 write-only value1 No write access to trigger configuration #0 value2 Bitfields XTMODE and XTSEL can be written #1 ASMR Autoscan Source Mode Register 0x124 32 read-write n 0x0 0x0 CLRPND Clear Pending Bits 8 write-only value1 No action #0 value2 The bits in register GxASPNDx are cleared #1 ENGT Enable Gate 0 1 read-write value1 No conversion requests are issued #00 value2 Conversion requests are issued if at least one pending bit is set #01 value3 Conversion requests are issued if at least one pending bit is set and REQGTx = 1. #10 value4 Conversion requests are issued if at least one pending bit is set and REQGTx = 0. #11 ENSI Enable Source Interrupt 3 read-write value1 No request source interrupt #0 value2 A request source interrupt is generated upon a request source event (last pending conversion is finished) #1 ENTR Enable External Trigger 2 read-write value1 External trigger disabled #0 value2 The selected edge at the selected trigger input signal REQTR generates the load event #1 LDEV Generate Load Event 9 write-only value1 No action #0 value2 A load event is generated #1 LDM Autoscan Source Load Event Mode 5 read-write value1 Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event #0 value2 Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR) #1 REQGT Request Gate Level 7 read-only value1 The gate input is low #0 value2 The gate input is high #1 RPTDIS Repeat Disable 16 read-write value1 A cancelled conversion is repeated #0 value2 A cancelled conversion is discarded #1 SCAN Autoscan Enable 4 read-write value1 No autoscan #0 value2 Autoscan functionality enabled: a request source event automatically generates a load event #1 ASPND Autoscan Source Pending Register 0x12C 32 read-write n 0x0 0x0 CHPND0 Channels Pending 0 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND1 Channels Pending 1 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND2 Channels Pending 2 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND3 Channels Pending 3 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND4 Channels Pending 4 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND5 Channels Pending 5 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND6 Channels Pending 6 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 CHPND7 Channels Pending 7 read-write value1 Ignore this channel #0 value2 Request conversion of this channel #1 ASSEL Autoscan Source Channel Select Register 0x128 32 read-write n 0x0 0x0 CHSEL0 Channel Selection 0 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL1 Channel Selection 1 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL2 Channel Selection 2 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL3 Channel Selection 3 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL4 Channel Selection 4 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL5 Channel Selection 5 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL6 Channel Selection 6 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 CHSEL7 Channel Selection 7 read-write value1 Ignore this channel #0 value2 This channel is part of the scan sequence #1 BFL Boundary Flag Register 0xC8 32 read-write n 0x0 0x0 BFA0 Boundary Flag 0 Activation Select 8 read-write value1 Set boundary flag BFLy if result is above the defined band or compare value, clear if below #0 value2 Set boundary flag BFLy if result is below the defined band or compare value, clear if above #1 BFA1 Boundary Flag 1 Activation Select 9 read-write value1 Set boundary flag BFLy if result is above the defined band or compare value, clear if below #0 value2 Set boundary flag BFLy if result is below the defined band or compare value, clear if above #1 BFA2 Boundary Flag 2 Activation Select 10 read-write value1 Set boundary flag BFLy if result is above the defined band or compare value, clear if below #0 value2 Set boundary flag BFLy if result is below the defined band or compare value, clear if above #1 BFA3 Boundary Flag 3 Activation Select 11 read-write value1 Set boundary flag BFLy if result is above the defined band or compare value, clear if below #0 value2 Set boundary flag BFLy if result is below the defined band or compare value, clear if above #1 BFI0 Boundary Flag 0 Inversion Control 16 read-write value1 Use BFLy directly #0 value2 Invert value and use BFLy #1 BFI1 Boundary Flag 1 Inversion Control 17 read-write value1 Use BFLy directly #0 value2 Invert value and use BFLy #1 BFI2 Boundary Flag 2 Inversion Control 18 read-write value1 Use BFLy directly #0 value2 Invert value and use BFLy #1 BFI3 Boundary Flag 3 Inversion Control 19 read-write value1 Use BFLy directly #0 value2 Invert value and use BFLy #1 BFL0 Boundary Flag 0 0 read-only value1 Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled #0 value2 Active state: result has crossed the activation boundary #1 BFL1 Boundary Flag 1 1 read-only value1 Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled #0 value2 Active state: result has crossed the activation boundary #1 BFL2 Boundary Flag 2 2 read-only value1 Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled #0 value2 Active state: result has crossed the activation boundary #1 BFL3 Boundary Flag 3 3 read-only value1 Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled #0 value2 Active state: result has crossed the activation boundary #1 BFLC Boundary Flag Control Register 0xD0 32 read-write n 0x0 0x0 BFM0 Boundary Flag y Mode Control 0 3 read-write value1 Disable boundary flag, BFLy is not changed #0000 value2 Always enable boundary flag (follow compare results) #0001 value3 Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive #0010 value4 Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive #0011 BFM1 Boundary Flag y Mode Control 4 3 read-write value1 Disable boundary flag, BFLy is not changed #0000 value2 Always enable boundary flag (follow compare results) #0001 value3 Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive #0010 value4 Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive #0011 BFM2 Boundary Flag y Mode Control 8 3 read-write value1 Disable boundary flag, BFLy is not changed #0000 value2 Always enable boundary flag (follow compare results) #0001 value3 Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive #0010 value4 Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive #0011 BFM3 Boundary Flag y Mode Control 12 3 read-write value1 Disable boundary flag, BFLy is not changed #0000 value2 Always enable boundary flag (follow compare results) #0001 value3 Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive #0010 value4 Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive #0011 BFLNP Boundary Flag Node Pointer Register 0xD4 32 read-write n 0x0 0x0 BFL0NP Boundary Flag y Node Pointer 0 3 read-write value1 Select common bondary flag output 0 #0000 value2 Select common bondary flag output 3 #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 value5 Disabled, no common output signal #1111 BFL1NP Boundary Flag y Node Pointer 4 3 read-write value1 Select common bondary flag output 0 #0000 value2 Select common bondary flag output 3 #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 value5 Disabled, no common output signal #1111 BFL2NP Boundary Flag y Node Pointer 8 3 read-write value1 Select common bondary flag output 0 #0000 value2 Select common bondary flag output 3 #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 value5 Disabled, no common output signal #1111 BFL3NP Boundary Flag y Node Pointer 12 3 read-write value1 Select common bondary flag output 0 #0000 value2 Select common bondary flag output 3 #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 value5 Disabled, no common output signal #1111 BFLS Boundary Flag Software Register 0xCC 32 read-write n 0x0 0x0 BFC0 Boundary Flag 0 Clear 0 write-only value1 No action #0 value2 Clear bit BFLy #1 BFC1 Boundary Flag 1 Clear 1 write-only value1 No action #0 value2 Clear bit BFLy #1 BFC2 Boundary Flag 2 Clear 2 write-only value1 No action #0 value2 Clear bit BFLy #1 BFC3 Boundary Flag 3 Clear 3 write-only value1 No action #0 value2 Clear bit BFLy #1 BFS0 Boundary Flag 0 Set 16 write-only value1 No action #0 value2 Set bit BFLy #1 BFS1 Boundary Flag 1 Set 17 write-only value1 No action #0 value2 Set bit BFLy #1 BFS2 Boundary Flag 2 Set 18 write-only value1 No action #0 value2 Set bit BFLy #1 BFS3 Boundary Flag 3 Set 19 write-only value1 No action #0 value2 Set bit BFLy #1 BOUND Boundary Select Register 0xB8 32 read-write n 0x0 0x0 BOUNDARY0 Boundary Value 0 for Limit Checking 0 11 read-write BOUNDARY1 Boundary Value 1 for Limit Checking 16 11 read-write CEFCLR Channel Event Flag Clear Register 0x190 32 read-write n 0x0 0x0 CEV0 Clear Channel Event for Channel 0 0 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV1 Clear Channel Event for Channel 1 1 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV2 Clear Channel Event for Channel 2 2 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV3 Clear Channel Event for Channel 3 3 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV4 Clear Channel Event for Channel 4 4 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV5 Clear Channel Event for Channel 5 5 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV6 Clear Channel Event for Channel 6 6 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEV7 Clear Channel Event for Channel 7 7 write-only value1 No action #0 value2 Clear the channel event flag in GxCEFLAG #1 CEFLAG Channel Event Flag Register 0x180 32 read-write n 0x0 0x0 CEV0 Channel Event for Channel 0 0 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV1 Channel Event for Channel 1 1 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV2 Channel Event for Channel 2 2 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV3 Channel Event for Channel 3 3 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV4 Channel Event for Channel 4 4 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV5 Channel Event for Channel 5 5 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV6 Channel Event for Channel 6 6 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEV7 Channel Event for Channel 7 7 read-write value1 No channel event #0 value2 A channel event has occurred #1 CEVNP0 Channel Event Node Pointer Register 0 0x1A0 32 read-write n 0x0 0x0 CEV0NP Service Request Node Pointer Channel Event i 0 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV1NP Service Request Node Pointer Channel Event i 4 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV2NP Service Request Node Pointer Channel Event i 8 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV3NP Service Request Node Pointer Channel Event i 12 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV4NP Service Request Node Pointer Channel Event i 16 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV5NP Service Request Node Pointer Channel Event i 20 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV6NP Service Request Node Pointer Channel Event i 24 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CEV7NP Service Request Node Pointer Channel Event i 28 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 CHASS Channel Assignment Register 0x88 32 read-write n 0x0 0x0 ASSCH0 Assignment for Channel 0 0 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH1 Assignment for Channel 1 1 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH2 Assignment for Channel 2 2 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH3 Assignment for Channel 3 3 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH4 Assignment for Channel 4 4 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH5 Assignment for Channel 5 5 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH6 Assignment for Channel 6 6 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 ASSCH7 Assignment for Channel 7 7 read-write value1 Channel y can be a background channel converted with lowest priority #0 value2 Channel y is a priority channel within group x #1 CHCTR[0] Channel Ctrl. Reg. 0x400 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[1] Channel Ctrl. Reg. 0x604 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[2] Channel Ctrl. Reg. 0x80C 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[3] Channel Ctrl. Reg. 0xA18 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[4] Channel Ctrl. Reg. 0xC28 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[5] Channel Ctrl. Reg. 0xE3C 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[6] Channel Ctrl. Reg. 0x1054 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 CHCTR[7] Channel Ctrl. Reg. 0x1270 32 read-write n 0x0 0x0 BNDSELL Lower Boundary Select 4 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BNDSELU Upper Boundary Select 6 1 read-write value1 Use group-specific boundary 0 #00 value2 Use group-specific boundary 1 #01 value3 Use global boundary 0 #10 value4 Use global boundary 1 #11 BWDCH Broken Wire Detection Channel 28 1 read-write value1 Select VAGND #00 value2 Select VAREF #01 BWDEN Broken Wire Detection Enable 30 read-write value1 Normal operation #0 value2 Additional preparation phase is enabled #1 CHEVMODE Channel Event Mode 8 1 read-write value1 Never #00 value2 NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.) #01 value3 NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.) #10 value4 NCM: Always (ignore band) FCM: If result switches to either level #11 ICLSEL Input Class Select 0 1 read-write value1 Use group-specific class 0 #00 value2 Use group-specific class 1 #01 value3 Use global class 0 #10 value4 Use global class 1 #11 REFSEL Reference Input Selection 11 read-write value1 Standard reference input VAREF #0 value2 Alternate reference input from CH0 #1 RESPOS Result Position 21 read-write value1 Store results left-aligned #0 value2 Store results right-aligned #1 RESREG Result Register 16 3 read-write value1 Store result in group result register GxRES0 #0000 value2 Store result in group result register GxRES15 #1111 RESTBS Result Target for Background Source 20 read-write value1 Store results in the selected group result register #0 value2 Store results in the global result register #1 SYNC Synchronization Request 10 read-write value1 No synchroniz. request, standalone operation #0 value2 Request a synchronized conversion of this channel (only taken into account for a master) #1 EMUXCTR External Multiplexer Control Register 0x1F0 32 read-write n 0x0 0x0 EMUXACT External Multiplexer Actual Selection 8 2 read-only EMUXCH External Multiplexer Channel Select 16 9 read-write EMUXMODE External Multiplexer Mode 26 1 read-write value1 Software control (no hardware action) #00 value2 Steady mode (use EMUXSET value) #01 value3 Single-step mode #10 value4 Sequence mode #11 EMUXSET External Multiplexer Start Selection 0 2 read-write EMXCOD External Multiplexer Coding Scheme 28 read-write value1 Output the channel number in binary code #0 value2 Output the channel number in Gray code #1 EMXCSS External Multiplexer Channel Selection Style 30 read-only value1 Channel number: Bitfield EMUXCH selects an arbitrary channel #0 value2 Channel enable: Each bit of bitfield EMUXCH selects the associated channel for EMUX control #1 EMXST External Multiplexer Sample Time Control 29 read-write value1 Use STCE whenever the setting changes #0 value2 Use STCE for each conversion of an external channel #1 EMXWC Write Control for EMUX Configuration 31 write-only value1 No write access to EMUX cfg. #0 value2 Bitfields EMXMODE, EMXCOD, EMXST, EMXCSS can be written #1 ICLASS[0] Input Class Register 0x140 32 read-write n 0x0 0x0 CME Conversion Mode for EMUX Conversions 24 2 read-write value1 12-bit conversion #000 value2 10-bit conversion #001 value3 8-bit conversion #010 value6 10-bit fast compare mode #101 CMS Conversion Mode for Standard Conversions 8 2 read-write value1 12-bit conversion #000 value2 10-bit conversion #001 value3 8-bit conversion #010 value6 10-bit fast compare mode #101 STCE Sample Time Control for EMUX Conversions 16 4 read-write STCS Sample Time Control for Standard Conversions 0 4 read-write ICLASS[1] Input Class Register 0x1E4 32 read-write n 0x0 0x0 CME Conversion Mode for EMUX Conversions 24 2 read-write value1 12-bit conversion #000 value2 10-bit conversion #001 value3 8-bit conversion #010 value6 10-bit fast compare mode #101 CMS Conversion Mode for Standard Conversions 8 2 read-write value1 12-bit conversion #000 value2 10-bit conversion #001 value3 8-bit conversion #010 value6 10-bit fast compare mode #101 STCE Sample Time Control for EMUX Conversions 16 4 read-write STCS Sample Time Control for Standard Conversions 0 4 read-write Q0R0 Queue 0 Register 0 0x10C 32 read-write n 0x0 0x0 ENSI Enable Source Interrupt 6 read-only value1 No request source interrupt #0 value2 A request source event interrupt is generated upon a request source event (related conversion is finished) #1 EXTR External Trigger 7 read-only value1 A valid queue entry immediately leads to a conversion request #0 value2 The request handler waits for a trigger event #1 REQCHNR Request Channel Number 0 4 read-only RF Refill 5 read-only value1 The request is discarded after the conversion start. #0 value2 The request is automatically refilled into the queue after the conversion start. #1 V Request Channel Number Valid 8 read-only value1 No valid queue entry #0 value2 The queue entry is valid and leads to a conversion request #1 QBUR0 Queue 0 Backup Register QINR0 0x110 32 read-write n 0x0 0x0 ENSI Enable Source Interrupt 6 read-only EXTR External Trigger 7 read-only REQCHNR Request Channel Number 0 4 read-only RF Refill 5 read-only V Request Channel Number Valid 8 read-only value1 Backup register not valid #0 value2 Backup register contains a valid entry. This will be requested before a valid entry in queue register 0 (stage 0) will be requested. #1 QCTRL0 Queue 0 Source Control Register 0x100 32 read-write n 0x0 0x0 GTLVL Gate Input Level 20 read-only GTSEL Gate Input Selection 16 3 read-write GTWC Write Control for Gate Configuration 23 write-only value1 No write access to gate configuration #0 value2 Bitfield GTSEL can be written #1 SRCRESREG Source-specific Result Register 0 3 read-write value1 Use GxCHCTRy.RESREG to select a group result register #0000 value2 Store result in group result register GxRES1 #0001 value3 Store result in group result register GxRES15 #1111 TMEN Timer Mode Enable 28 read-write value1 No timer mode: standard gating mechanism can be used #0 value2 Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled #1 TMWC Write Control for Timer Mode 31 write-only value1 No write access to timer mode #0 value2 Bitfield TMEN can be written #1 XTLVL External Trigger Level 12 read-only XTMODE Trigger Operating Mode 13 1 read-write value1 No external trigger #00 value2 Trigger event upon a falling edge #01 value3 Trigger event upon a rising edge #10 value4 Trigger event upon any edge #11 XTSEL External Trigger Input Selection 8 3 read-write XTWC Write Control for Trigger Configuration 15 write-only value1 No write access to trigger configuration #0 value2 Bitfields XTMODE and XTSEL can be written #1 QINR0 Queue 0 Input Register 0x110 32 read-write n 0x0 0x0 ENSI Enable Source Interrupt 6 write-only value1 No request source interrupt #0 value2 A request source event interrupt is generated upon a request source event (related conversion is finished) #1 EXTR External Trigger 7 write-only value1 A valid queue entry immediately leads to a conversion request. #0 value2 A valid queue entry waits for a trigger event to occur before issuing a conversion request. #1 REQCHNR Request Channel Number 0 4 write-only RF Refill 5 write-only value1 No refill: this queue entry is converted once and then invalidated #0 value2 Automatic refill: this queue entry is automatically reloaded into QINRx when the related conversion is started #1 QMR0 Queue 0 Mode Register 0x104 32 read-write n 0x0 0x0 CEV Clear Event Flag 11 write-only value1 No action #0 value2 Clear bit EV #1 CLRV Clear Valid Bit 8 write-only value1 No action #0 value2 The next pending valid queue entry in the sequence and the event flag EV are cleared. If there is a valid entry in the queue backup register (QBUR.V = 1), this entry is cleared, otherwise the entry in queue register 0 is cleared. #1 ENGT Enable Gate 0 1 read-write value1 No conversion requests are issued #00 value2 Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register #01 value3 Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 1 #10 value4 Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 0 #11 ENTR Enable External Trigger 2 read-write value1 External trigger disabled #0 value2 The selected edge at the selected trigger input signal REQTR generates the trigger event #1 FLUSH Flush Queue 10 write-only value1 No action #0 value2 Clear all queue entries (including backup stage) and the event flag EV. The queue contains no more valid entry. #1 RPTDIS Repeat Disable 16 read-write value1 A cancelled conversion is repeated #0 value2 A cancelled conversion is discarded #1 TREV Trigger Event 9 write-only value1 No action #0 value2 Generate a trigger event by software #1 QSR0 Queue 0 Status Register 0x108 32 read-write n 0x0 0x0 EMPTY Queue Empty 5 read-only value1 There are valid entries in the queue (see FILL) #0 value2 No valid entries (queue is empty) #1 EV Event Detected 8 read-only value1 No trigger event #0 value2 A trigger event has been detected #1 FILL Filling Level for Queue 2 0 3 read-only value1 There is 1 ( if EMPTY = 0) or no (if EMPTY = 1) valid entry in the queue #0000 value2 There are 2 valid entries in the queue #0001 value3 There are 3 valid entries in the queue #0010 value4 There are 8 valid entries in the queue #0111 REQGT Request Gate Level 7 read-only value1 The gate input is low #0 value2 The gate input is high #1 RCR[0] Result Control Register 0x500 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[10] Result Control Register 0x1EDC 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[11] Result Control Register 0x2188 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[12] Result Control Register 0x2438 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[13] Result Control Register 0x26EC 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[14] Result Control Register 0x29A4 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[15] Result Control Register 0x2C60 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[1] Result Control Register 0x784 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[2] Result Control Register 0xA0C 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[3] Result Control Register 0xC98 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[4] Result Control Register 0xF28 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[5] Result Control Register 0x11BC 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[6] Result Control Register 0x1454 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[7] Result Control Register 0x16F0 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[8] Result Control Register 0x1990 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 RCR[9] Result Control Register 0x1C34 32 read-write n 0x0 0x0 DMM Data Modification Mode 20 1 read-write value1 Standard data reduction (accumulation) #00 value2 Result filtering mode #01 value3 Difference mode #10 DRCTR Data Reduction Control 16 3 read-write FEN FIFO Mode Enable 25 1 read-write value1 Separate result register #00 value2 Part of a FIFO structure: copy each new valid result #01 SRGEN Service Request Generation Enable 31 read-write value1 No service request #0 value2 Service request after a result event #1 WFR Wait-for-Read Mode Enable 24 read-write value1 Overwrite mode #0 value2 Wait-for-read mode enabled for this register #1 REFCLR Result Event Flag Clear Register 0x194 32 read-write n 0x0 0x0 REV0 Clear Result Event for Result Register 0 0 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV1 Clear Result Event for Result Register 1 1 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV10 Clear Result Event for Result Register 10 10 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV11 Clear Result Event for Result Register 11 11 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV12 Clear Result Event for Result Register 12 12 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV13 Clear Result Event for Result Register 13 13 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV14 Clear Result Event for Result Register 14 14 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV15 Clear Result Event for Result Register 15 15 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV2 Clear Result Event for Result Register 2 2 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV3 Clear Result Event for Result Register 3 3 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV4 Clear Result Event for Result Register 4 4 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV5 Clear Result Event for Result Register 5 5 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV6 Clear Result Event for Result Register 6 6 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV7 Clear Result Event for Result Register 7 7 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV8 Clear Result Event for Result Register 8 8 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REV9 Clear Result Event for Result Register 9 9 write-only value1 No action #0 value2 Clear the result event flag in GxREFLAG #1 REFLAG Result Event Flag Register 0x184 32 read-write n 0x0 0x0 REV0 Result Event for Result Register 0 0 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV1 Result Event for Result Register 1 1 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV10 Result Event for Result Register 10 10 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV11 Result Event for Result Register 11 11 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV12 Result Event for Result Register 12 12 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV13 Result Event for Result Register 13 13 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV14 Result Event for Result Register 14 14 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV15 Result Event for Result Register 15 15 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV2 Result Event for Result Register 2 2 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV3 Result Event for Result Register 3 3 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV4 Result Event for Result Register 4 4 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV5 Result Event for Result Register 5 5 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV6 Result Event for Result Register 6 6 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV7 Result Event for Result Register 7 7 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV8 Result Event for Result Register 8 8 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 REV9 Result Event for Result Register 9 9 read-write value1 No result event #0 value2 New result was stored in register GxRESy #1 RESD[0] Result Register, Debug 0x700 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[10] Result Register, Debug 0x2ADC 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[11] Result Register, Debug 0x2E88 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[12] Result Register, Debug 0x3238 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[13] Result Register, Debug 0x35EC 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[14] Result Register, Debug 0x39A4 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[15] Result Register, Debug 0x3D60 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[1] Result Register, Debug 0xA84 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[2] Result Register, Debug 0xE0C 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[3] Result Register, Debug 0x1198 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[4] Result Register, Debug 0x1528 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[5] Result Register, Debug 0x18BC 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[6] Result Register, Debug 0x1C54 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[7] Result Register, Debug 0x1FF0 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[8] Result Register, Debug 0x2390 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RESD[9] Result Register, Debug 0x2734 32 read-write n 0x0 0x0 CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-only VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[0] Result Register 0x600 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[10] Result Register 0x24DC 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[11] Result Register 0x2808 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[12] Result Register 0x2B38 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[13] Result Register 0x2E6C 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[14] Result Register 0x31A4 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[15] Result Register 0x34E0 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[1] Result Register 0x904 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[2] Result Register 0xC0C 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[3] Result Register 0xF18 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[4] Result Register 0x1228 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[5] Result Register 0x153C 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[6] Result Register 0x1854 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[7] Result Register 0x1B70 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[8] Result Register 0x1E90 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 RES[9] Result Register 0x21B4 32 read-write n 0x0 0x0 modifyExternal CHNR Channel Number 20 4 read-only CRS Converted Request Source 28 1 read-only value1 Request source 0 #00 value2 Request source 1 #01 value3 Request source 2 #10 DRC Data Reduction Counter 16 3 read-only EMUX External Multiplexer Setting 25 2 read-only FCR Fast Compare Result 30 read-only value1 Signal level was below compare value #0 value2 Signal level was above compare value #1 RESULT Result of Most Recent Conversion 0 15 read-write VF Valid Flag 31 read-only value1 No new result available #0 value2 Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated #1 REVNP0 Result Event Node Pointer Register 0 0x1B0 32 read-write n 0x0 0x0 REV0NP Service Request Node Pointer Result Event i 0 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV1NP Service Request Node Pointer Result Event i 4 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV2NP Service Request Node Pointer Result Event i 8 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV3NP Service Request Node Pointer Result Event i 12 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV4NP Service Request Node Pointer Result Event i 16 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV5NP Service Request Node Pointer Result Event i 20 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV6NP Service Request Node Pointer Result Event i 24 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV7NP Service Request Node Pointer Result Event i 28 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REVNP1 Result Event Node Pointer Register 1 0x1B4 32 read-write n 0x0 0x0 REV10NP Service Request Node Pointer Result Event i 8 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV11NP Service Request Node Pointer Result Event i 12 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV12NP Service Request Node Pointer Result Event i 16 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV13NP Service Request Node Pointer Result Event i 20 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV14NP Service Request Node Pointer Result Event i 24 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV15NP Service Request Node Pointer Result Event i 28 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV8NP Service Request Node Pointer Result Event i 0 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 REV9NP Service Request Node Pointer Result Event i 4 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 SEFCLR Source Event Flag Clear Register 0x198 32 read-write n 0x0 0x0 SEV0 Clear Source Event 0/1 0 write-only value1 No action #0 value2 Clear the source event flag in GxSEFLAG #1 SEV1 Clear Source Event 0/1 1 write-only value1 No action #0 value2 Clear the source event flag in GxSEFLAG #1 SEFLAG Source Event Flag Register 0x188 32 read-write n 0x0 0x0 SEV0 Source Event 0/1 0 read-write value1 No source event #0 value2 A source event has occurred #1 SEV1 Source Event 0/1 1 read-write value1 No source event #0 value2 A source event has occurred #1 SEVNP Source Event Node Pointer Register 0x1C0 32 read-write n 0x0 0x0 SEV0NP Service Request Node Pointer Source Event i 0 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 SEV1NP Service Request Node Pointer Source Event i 4 3 read-write value1 Select service request line 0 of group x #0000 value2 Select service request line 3 of group x #0011 value3 Select shared service request line 0 #0100 value4 Select shared service request line 3 #0111 SRACT Service Request Software Activation Trigger 0x1C8 32 read-write n 0x0 0x0 AGSR0 Activate Group Service Request Node 0 0 write-only value1 No action #0 value2 Activate the associated service request line #1 AGSR1 Activate Group Service Request Node 1 1 write-only value1 No action #0 value2 Activate the associated service request line #1 AGSR2 Activate Group Service Request Node 2 2 write-only value1 No action #0 value2 Activate the associated service request line #1 AGSR3 Activate Group Service Request Node 3 3 write-only value1 No action #0 value2 Activate the associated service request line #1 ASSR0 Activate Shared Service Request Node 0 8 write-only value1 No action #0 value2 Activate the associated service request line #1 ASSR1 Activate Shared Service Request Node 1 9 write-only value1 No action #0 value2 Activate the associated service request line #1 ASSR2 Activate Shared Service Request Node 2 10 write-only value1 No action #0 value2 Activate the associated service request line #1 ASSR3 Activate Shared Service Request Node 3 11 write-only value1 No action #0 value2 Activate the associated service request line #1 SYNCTR Synchronization Control Register 0xC0 32 read-write n 0x0 0x0 EVALR1 Evaluate Ready Input Rx 4 read-write value1 No ready input control #0 value2 Ready input Rx is considered for the start of a parallel conversion of this conversion group #1 EVALR2 Evaluate Ready Input Rx 5 read-write value1 No ready input control #0 value2 Ready input Rx is considered for the start of a parallel conversion of this conversion group #1 EVALR3 Evaluate Ready Input Rx 6 read-write value1 No ready input control #0 value2 Ready input Rx is considered for the start of a parallel conversion of this conversion group #1 STSEL Start Selection 0 1 read-write value1 Kernel is synchronization master: Use own bitfield GxARBCFG.ANONC #00 value2 Kernel is synchronization slave: Control information from input CI1 #01 value3 Kernel is synchronization slave: Control information from input CI2 #10 value4 Kernel is synchronization slave: Control information from input CI3 #11 VFR Valid Flag Register 0x1F8 32 read-write n 0x0 0x0 VF0 Valid Flag of Result Register x 0 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF1 Valid Flag of Result Register x 1 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF10 Valid Flag of Result Register x 10 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF11 Valid Flag of Result Register x 11 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF12 Valid Flag of Result Register x 12 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF13 Valid Flag of Result Register x 13 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF14 Valid Flag of Result Register x 14 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF15 Valid Flag of Result Register x 15 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF2 Valid Flag of Result Register x 2 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF3 Valid Flag of Result Register x 3 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF4 Valid Flag of Result Register x 4 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF5 Valid Flag of Result Register x 5 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF6 Valid Flag of Result Register x 6 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF7 Valid Flag of Result Register x 7 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF8 Valid Flag of Result Register x 8 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 VF9 Valid Flag of Result Register x 9 read-write value1 Read access: No new valid data available Write access: No effect #0 value2 Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action) #1 WDT Watch Dog Timer WDT 0x0 0x0 0x50 registers n CTR WDT Control Register 0x4 32 read-write n 0x0 0x0 DSP Debug Suspend 4 read-write ENB Enable 0 read-write PRE Pre-warning 1 read-write SPW Service Indication Pulse Width 8 7 read-write ID WDT ID Register 0x0 32 read-write n 0x0 0x0 MOD_NUMBER Module Number 16 15 read-only MOD_REV Module Revision 0 7 read-only MOD_TYPE Module Type 8 7 read-only SRV WDT Service Register 0x8 32 read-write n 0x0 0x0 SRV Service 0 31 write-only TIM WDT Timer Register 0xC 32 read-write n 0x0 0x0 TIM Timer Value 0 31 read-only WDTCLR WDT Clear Register 0x1C 32 read-write n 0x0 0x0 ALMC Pre-warning Alarm 0 write-only WDTSTS WDT Status Register 0x18 32 read-write n 0x0 0x0 ALMS Pre-warning Alarm 0 read-only WLB WDT Window Lower Bound Register 0x10 32 read-write n 0x0 0x0 WLB Window Lower Bound 0 31 read-write WUB WDT Window Upper Bound Register 0x14 32 read-write n 0x0 0x0 WUB Window Upper Bound 0 31 read-write