SiliconLabs EFM32G890F64 2024.04.19 Silicon Labs EFM32G890F64 Cortex-M MCU CM3 r2p0 little 3 false 8 32 ACMP0 ACMP0 ACMP0 0x0 0x0 0x400 registers n ACMP0 5 CTRL Control Register 0x0 32 read-write n 0x0 0x0 BIASPROG Bias Configuration 24 4 read-write EN Analog Comparator Enable 0 1 read-write FULLBIAS Full Bias Current 31 1 read-write GPIOINV Comparator GPIO Output Invert 3 1 read-write HALFBIAS Half Bias Current 30 1 read-write HYSTSEL Hysteresis Select 4 3 read-write HYST0 No hysteresis. 0x00000000 HYST1 ~15 mV hysteresis. 0x00000001 HYST2 ~22 mV hysteresis. 0x00000002 HYST3 ~29 mV hysteresis. 0x00000003 HYST4 ~36 mV hysteresis. 0x00000004 HYST5 ~43 mV hysteresis. 0x00000005 HYST6 ~50 mV hysteresis. 0x00000006 HYST7 ~57 mV hysteresis. 0x00000007 IFALL Falling Edge Interrupt Sense 17 1 read-write INACTVAL Inactive Value 2 1 read-write IRISE Rising Edge Interrupt Sense 16 1 read-write MUXEN Input Mux Enable 1 1 read-write WARMTIME Warm-up Time 8 3 read-write 4CYCLES 4 HFPERCLK cycles. 0x00000000 8CYCLES 8 HFPERCLK cycles. 0x00000001 16CYCLES 16 HFPERCLK cycles. 0x00000002 32CYCLES 32 HFPERCLK cycles. 0x00000003 64CYCLES 64 HFPERCLK cycles. 0x00000004 128CYCLES 128 HFPERCLK cycles. 0x00000005 256CYCLES 256 HFPERCLK cycles. 0x00000006 512CYCLES 512 HFPERCLK cycles. 0x00000007 IEN Interrupt Enable Register 0xC 32 read-write n 0x0 0x0 EDGE Edge Trigger Interrupt Enable 0 1 read-write WARMUP Warm-up Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0x10 32 read-only n 0x0 0x0 EDGE Edge Triggered Interrupt Flag 0 1 read-only WARMUP Warm-up Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x18 32 write-only n 0x0 0x0 EDGE Edge Triggered Interrupt Flag Clear 0 1 write-only WARMUP Warm-up Interrupt Flag Clear 1 1 write-only IFS Interrupt Flag Set Register 0x14 32 write-only n 0x0 0x0 EDGE Edge Triggered Interrupt Flag Set 0 1 write-only WARMUP Warm-up Interrupt Flag Set 1 1 write-only INPUTSEL Input Selection Register 0x4 32 read-write n 0x0 0x0 CSRESEN Capacitive Sense Mode Internal Resistor Enable 24 1 read-write CSRESSEL Capacitive Sense Mode Internal Resistor Select 28 2 read-write RES0 Internal capacitive sense resistor value 0. 0x00000000 RES1 Internal capacitive sense resistor value 1. 0x00000001 RES2 Internal capacitive sense resistor value 2. 0x00000002 RES3 Internal capacitive sense resistor value 3. 0x00000003 LPREF Low Power Reference Mode 16 1 read-write NEGSEL Negative Input Select 4 4 read-write CH0 Channel 0 as negative input. 0x00000000 CH1 Channel 1 as negative input. 0x00000001 CH2 Channel 2 as negative input. 0x00000002 CH3 Channel 3 as negative input. 0x00000003 CH4 Channel 4 as negative input. 0x00000004 CH5 Channel 5 as negative input. 0x00000005 CH6 Channel 6 as negative input. 0x00000006 CH7 Channel 7 as negative input. 0x00000007 1V25 1.25 V as negative input. 0x00000008 2V5 2.5 V as negative input. 0x00000009 VDD Scaled VDD as negative input. 0x0000000A CAPSENSE Capacitive sense mode. 0x0000000B POSSEL Positive Input Select 0 3 read-write CH0 Channel 0 as positive input. 0x00000000 CH1 Channel 1 as positive input. 0x00000001 CH2 Channel 2 as positive input. 0x00000002 CH3 Channel 3 as positive input. 0x00000003 CH4 Channel 4 as positive input. 0x00000004 CH5 Channel 5 as positive input. 0x00000005 CH6 Channel 6 as positive input. 0x00000006 CH7 Channel 7 as positive input. 0x00000007 VDDLEVEL VDD Reference Level 8 6 read-write ROUTE I/O Routing Register 0x1C 32 read-write n 0x0 0x0 ACMPPEN ACMP Output Pin Enable 0 1 read-write LOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 STATUS Status Register 0x8 32 read-only n 0x0 0x0 ACMPACT Analog Comparator Active 0 1 read-only ACMPOUT Analog Comparator Output 1 1 read-only ACMP1 ACMP1 ACMP1 0x0 0x0 0x400 registers n ACMP0 5 CTRL Control Register 0x0 32 read-write n 0x0 0x0 BIASPROG Bias Configuration 24 4 read-write EN Analog Comparator Enable 0 1 read-write FULLBIAS Full Bias Current 31 1 read-write GPIOINV Comparator GPIO Output Invert 3 1 read-write HALFBIAS Half Bias Current 30 1 read-write HYSTSEL Hysteresis Select 4 3 read-write HYST0 No hysteresis. 0x00000000 HYST1 ~15 mV hysteresis. 0x00000001 HYST2 ~22 mV hysteresis. 0x00000002 HYST3 ~29 mV hysteresis. 0x00000003 HYST4 ~36 mV hysteresis. 0x00000004 HYST5 ~43 mV hysteresis. 0x00000005 HYST6 ~50 mV hysteresis. 0x00000006 HYST7 ~57 mV hysteresis. 0x00000007 IFALL Falling Edge Interrupt Sense 17 1 read-write INACTVAL Inactive Value 2 1 read-write IRISE Rising Edge Interrupt Sense 16 1 read-write MUXEN Input Mux Enable 1 1 read-write WARMTIME Warm-up Time 8 3 read-write 4CYCLES 4 HFPERCLK cycles. 0x00000000 8CYCLES 8 HFPERCLK cycles. 0x00000001 16CYCLES 16 HFPERCLK cycles. 0x00000002 32CYCLES 32 HFPERCLK cycles. 0x00000003 64CYCLES 64 HFPERCLK cycles. 0x00000004 128CYCLES 128 HFPERCLK cycles. 0x00000005 256CYCLES 256 HFPERCLK cycles. 0x00000006 512CYCLES 512 HFPERCLK cycles. 0x00000007 IEN Interrupt Enable Register 0xC 32 read-write n 0x0 0x0 EDGE Edge Trigger Interrupt Enable 0 1 read-write WARMUP Warm-up Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0x10 32 read-only n 0x0 0x0 EDGE Edge Triggered Interrupt Flag 0 1 read-only WARMUP Warm-up Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x18 32 write-only n 0x0 0x0 EDGE Edge Triggered Interrupt Flag Clear 0 1 write-only WARMUP Warm-up Interrupt Flag Clear 1 1 write-only IFS Interrupt Flag Set Register 0x14 32 write-only n 0x0 0x0 EDGE Edge Triggered Interrupt Flag Set 0 1 write-only WARMUP Warm-up Interrupt Flag Set 1 1 write-only INPUTSEL Input Selection Register 0x4 32 read-write n 0x0 0x0 CSRESEN Capacitive Sense Mode Internal Resistor Enable 24 1 read-write CSRESSEL Capacitive Sense Mode Internal Resistor Select 28 2 read-write RES0 Internal capacitive sense resistor value 0. 0x00000000 RES1 Internal capacitive sense resistor value 1. 0x00000001 RES2 Internal capacitive sense resistor value 2. 0x00000002 RES3 Internal capacitive sense resistor value 3. 0x00000003 LPREF Low Power Reference Mode 16 1 read-write NEGSEL Negative Input Select 4 4 read-write CH0 Channel 0 as negative input. 0x00000000 CH1 Channel 1 as negative input. 0x00000001 CH2 Channel 2 as negative input. 0x00000002 CH3 Channel 3 as negative input. 0x00000003 CH4 Channel 4 as negative input. 0x00000004 CH5 Channel 5 as negative input. 0x00000005 CH6 Channel 6 as negative input. 0x00000006 CH7 Channel 7 as negative input. 0x00000007 1V25 1.25 V as negative input. 0x00000008 2V5 2.5 V as negative input. 0x00000009 VDD Scaled VDD as negative input. 0x0000000A CAPSENSE Capacitive sense mode. 0x0000000B POSSEL Positive Input Select 0 3 read-write CH0 Channel 0 as positive input. 0x00000000 CH1 Channel 1 as positive input. 0x00000001 CH2 Channel 2 as positive input. 0x00000002 CH3 Channel 3 as positive input. 0x00000003 CH4 Channel 4 as positive input. 0x00000004 CH5 Channel 5 as positive input. 0x00000005 CH6 Channel 6 as positive input. 0x00000006 CH7 Channel 7 as positive input. 0x00000007 VDDLEVEL VDD Reference Level 8 6 read-write ROUTE I/O Routing Register 0x1C 32 read-write n 0x0 0x0 ACMPPEN ACMP Output Pin Enable 0 1 read-write LOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 STATUS Status Register 0x8 32 read-only n 0x0 0x0 ACMPACT Analog Comparator Active 0 1 read-only ACMPOUT Analog Comparator Output 1 1 read-only ADC0 ADC0 ADC0 0x0 0x0 0x400 registers n ADC0 6 BIASPROG Bias Programming Register 0x3C 32 read-write n 0x0 0x0 BIASPROG Bias Programming Value 0 4 read-write COMPBIAS Comparator Bias Value 8 4 read-write HALFBIAS Half Bias Current 6 1 read-write CAL Calibration Register 0x34 32 read-write n 0x0 0x0 SCANGAIN Scan Mode Gain Calibration Value 24 7 read-write SCANOFFSET Scan Mode Offset Calibration Value 16 7 read-write SINGLEGAIN Single Mode Gain Calibration Value 8 7 read-write SINGLEOFFSET Single Mode Offset Calibration Value 0 7 read-write CMD Command Register 0x4 32 write-only n 0x0 0x0 SCANSTART Scan Sequence Start 2 1 write-only SCANSTOP Scan Sequence Stop 3 1 write-only SINGLESTART Single Conversion Start 0 1 write-only SINGLESTOP Single Conversion Stop 1 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 LPFMODE Low Pass Filter Mode 4 2 read-write BYPASS No filter or decoupling capacitor 0x00000000 DECAP On chip decoupling capacitor selected 0x00000001 RCFILT On chip RC filter selected 0x00000002 OVSRSEL Oversample Rate Select 24 4 read-write X2 2 samples for each conversion result 0x00000000 X4 4 samples for each conversion result 0x00000001 X8 8 samples for each conversion result 0x00000002 X16 16 samples for each conversion result 0x00000003 X32 32 samples for each conversion result 0x00000004 X64 64 samples for each conversion result 0x00000005 X128 128 samples for each conversion result 0x00000006 X256 256 samples for each conversion result 0x00000007 X512 512 samples for each conversion result 0x00000008 X1024 1024 samples for each conversion result 0x00000009 X2048 2048 samples for each conversion result 0x0000000A X4096 4096 samples for each conversion result 0x0000000B PRESC Prescaler Setting 8 7 read-write NODIVISION 0x00000000 TAILGATE Conversion Tailgating 3 1 read-write TIMEBASE Time Base 16 5 read-write WARMUPMODE Warm-up Mode 0 2 read-write NORMAL ADC is shut down after each conversion 0x00000000 FASTBG Bandgap references do not need warm up, but have reduced accuracy. 0x00000001 KEEPSCANREFWARM Reference selected for scan mode is kept warm. 0x00000002 KEEPADCWARM ADC is kept warmed up and scan reference is kept warm 0x00000003 IEN Interrupt Enable Register 0x14 32 read-write n 0x0 0x0 SCAN Scan Conversion Complete Interrupt Enable 1 1 read-write SCANOF Scan Result Overflow Interrupt Enable 9 1 read-write SINGLE Single Conversion Complete Interrupt Enable 0 1 read-write SINGLEOF Single Result Overflow Interrupt Enable 8 1 read-write IF Interrupt Flag Register 0x18 32 read-only n 0x0 0x0 SCAN Scan Conversion Complete Interrupt Flag 1 1 read-only SCANOF Scan Result Overflow Interrupt Flag 9 1 read-only SINGLE Single Conversion Complete Interrupt Flag 0 1 read-only SINGLEOF Single Result Overflow Interrupt Flag 8 1 read-only IFC Interrupt Flag Clear Register 0x20 32 write-only n 0x0 0x0 SCAN Scan Conversion Complete Interrupt Flag Clear 1 1 write-only SCANOF Scan Result Overflow Interrupt Flag Clear 9 1 write-only SINGLE Single Conversion Complete Interrupt Flag Clear 0 1 write-only SINGLEOF Single Result Overflow Interrupt Flag Clear 8 1 write-only IFS Interrupt Flag Set Register 0x1C 32 write-only n 0x0 0x0 SCAN Scan Conversion Complete Interrupt Flag Set 1 1 write-only SCANOF Scan Result Overflow Interrupt Flag Set 9 1 write-only SINGLE Single Conversion Complete Interrupt Flag Set 0 1 write-only SINGLEOF Single Result Overflow Interrupt Flag Set 8 1 write-only SCANCTRL Scan Control Register 0x10 32 read-write n 0x0 0x0 ADJ Scan Sequence Result Adjustment 2 1 read-write AT Scan Sample Acquisition Time 20 4 read-write 1CYCLE 1 ADC_CLK cycle acquisition time for scan samples 0x00000000 2CYCLES 2 ADC_CLK cycles acquisition time for scan samples 0x00000001 4CYCLES 4 ADC_CLK cycles acquisition time for scan samples 0x00000002 8CYCLES 8 ADC_CLK cycles acquisition time for scan samples 0x00000003 16CYCLES 16 ADC_CLK cycles acquisition time for scan samples 0x00000004 32CYCLES 32 ADC_CLK cycles acquisition time for scan samples 0x00000005 64CYCLES 64 ADC_CLK cycles acquisition time for scan samples 0x00000006 128CYCLES 128 ADC_CLK cycles acquisition time for scan samples 0x00000007 256CYCLES 256 ADC_CLK cycles acquisition time for scan samples 0x00000008 DIFF Scan Sequence Differential Mode 1 1 read-write INPUTMASK Scan Sequence Input Mask 8 8 read-write PRSEN Scan Sequence PRS Trigger Enable 24 1 read-write PRSSEL Scan Sequence PRS Trigger Select 28 3 read-write PRSCH0 PRS ch 0 triggers scan sequence 0x00000000 PRSCH1 PRS ch 1 triggers scan sequence 0x00000001 PRSCH2 PRS ch 2 triggers scan sequence 0x00000002 PRSCH3 PRS ch 3 triggers scan sequence 0x00000003 PRSCH4 PRS ch 4 triggers scan sequence 0x00000004 PRSCH5 PRS ch 5 triggers scan sequence 0x00000005 PRSCH6 PRS ch 6 triggers scan sequence 0x00000006 PRSCH7 PRS ch 7 triggers scan sequence 0x00000007 REF Scan Sequence Reference Selection 16 3 read-write 1V25 Internal 1.25 V reference 0x00000000 2V5 Internal 2.5 V reference 0x00000001 VDD VDD 0x00000002 5VDIFF Internal differential 5 V reference 0x00000003 EXTSINGLE Single ended external reference from ADCn_CH6 0x00000004 2XEXTDIFF Differential external reference, 2x(ADCn_CH6 - ADCn_CH7) 0x00000005 2XVDD Unbuffered 2xVDD 0x00000006 REP Scan Sequence Repetitive Mode 0 1 read-write RES Scan Sequence Resolution Select 4 2 read-write 12BIT 12-bit resolution 0x00000000 8BIT 8-bit resolution 0x00000001 6BIT 6-bit resolution 0x00000002 OVS Oversampling enabled. Oversampling rate is set in OVSRSEL 0x00000003 SCANDATA Scan Conversion Result Data 0x28 32 read-only n 0x0 0x0 modifyExternal DATA Scan Conversion Result Data 0 32 read-only SCANDATAP Scan Sequence Result Data Peek Register 0x30 32 read-only n 0x0 0x0 DATAP Scan Conversion Result Data Peek 0 32 read-only SINGLECTRL Single Sample Control Register 0xC 32 read-write n 0x0 0x0 ADJ Single Sample Result Adjustment 2 1 read-write AT Single Sample Acquisition Time 20 4 read-write 1CYCLE 1 ADC_CLK cycle acquisition time for single sample 0x00000000 2CYCLES 2 ADC_CLK cycles acquisition time for single sample 0x00000001 4CYCLES 4 ADC_CLK cycles acquisition time for single sample 0x00000002 8CYCLES 8 ADC_CLK cycles acquisition time for single sample 0x00000003 16CYCLES 16 ADC_CLK cycles acquisition time for single sample 0x00000004 32CYCLES 32 ADC_CLK cycles acquisition time for single sample 0x00000005 64CYCLES 64 ADC_CLK cycles acquisition time for single sample 0x00000006 128CYCLES 128 ADC_CLK cycles acquisition time for single sample 0x00000007 256CYCLES 256 ADC_CLK cycles acquisition time for single sample 0x00000008 DIFF Single Sample Differential Mode 1 1 read-write INPUTSEL Single Sample Input Selection 8 4 read-write PRSEN Single Sample PRS Trigger Enable 24 1 read-write PRSSEL Single Sample PRS Trigger Select 28 3 read-write PRSCH0 PRS ch 0 triggers single sample 0x00000000 PRSCH1 PRS ch 1 triggers single sample 0x00000001 PRSCH2 PRS ch 2 triggers single sample 0x00000002 PRSCH3 PRS ch 3 triggers single sample 0x00000003 PRSCH4 PRS ch 4 triggers single sample 0x00000004 PRSCH5 PRS ch 5 triggers single sample 0x00000005 PRSCH6 PRS ch 6 triggers single sample 0x00000006 PRSCH7 PRS ch 7 triggers single sample 0x00000007 REF Single Sample Reference Selection 16 3 read-write 1V25 Internal 1.25 V reference 0x00000000 2V5 Internal 2.5 V reference 0x00000001 VDD Buffered VDD 0x00000002 5VDIFF Internal differential 5 V reference 0x00000003 EXTSINGLE Single ended external reference from ADCn_CH6 0x00000004 2XEXTDIFF Differential external reference, 2x(ADCn_CH6 - ADCn_CH7) 0x00000005 2XVDD Unbuffered 2xVDD 0x00000006 REP Single Sample Repetitive Mode 0 1 read-write RES Single Sample Resolution Select 4 2 read-write 12BIT 12-bit resolution 0x00000000 8BIT 8-bit resolution 0x00000001 6BIT 6-bit resolution 0x00000002 OVS Oversampling enabled. Oversampling rate is set in OVSRSEL 0x00000003 SINGLEDATA Single Conversion Result Data 0x24 32 read-only n 0x0 0x0 modifyExternal DATA Single Conversion Result Data 0 32 read-only SINGLEDATAP Single Conversion Result Data Peek Register 0x2C 32 read-only n 0x0 0x0 DATAP Single Conversion Result Data Peek 0 32 read-only STATUS Status Register 0x8 32 read-only n 0x0 0x0 SCANACT Scan Conversion Active 1 1 read-only SCANDATASRC Scan Data Source 24 3 read-only CH0 Single ended mode: SCANDATA result originates from ADCn_CH0. Differential mode: SCANDATA result originates from ADCn_CH0-ADCn_CH1 0x00000000 CH1 Single ended mode: SCANDATA result originates from ADCn_CH1. Differential mode: SCANDATA result originates from ADCn_CH2_ADCn_CH3 0x00000001 CH2 Single ended mode: SCANDATA result originates from ADCn_CH2. Differential mode: SCANDATA result originates from ADCn_CH4-ADCn_CH5 0x00000002 CH3 Single ended mode: SCANDATA result originates from ADCn_CH3. Differential mode: SCANDATA result originates from ADCn_CH6-ADCn_CH7 0x00000003 CH4 SCANDATA result originates from ADCn_CH4 0x00000004 CH5 SCANDATA result originates from ADCn_CH5 0x00000005 CH6 SCANDATA result originates from ADCn_CH6 0x00000006 CH7 SCANDATA result originates from ADCn_CH7 0x00000007 SCANDV Scan Data Valid 17 1 read-only SCANREFWARM Scan Reference Warmed Up 9 1 read-only SINGLEACT Single Conversion Active 0 1 read-only SINGLEDV Single Sample Data Valid 16 1 read-only SINGLEREFWARM Single Reference Warmed Up 8 1 read-only WARM ADC Warmed Up 12 1 read-only AES AES AES 0x0 0x0 0x400 registers n AES 29 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Encryption/Decryption Start 0 1 write-only STOP Encryption/Decryption Stop 1 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AES256 AES-256 Mode 1 1 read-write DATASTART AES_DATA Write Start 4 1 read-write DECRYPT Decryption/Encryption Mode 0 1 read-write KEYBUFEN Key Buffer Enable 2 1 read-write XORSTART AES_XORDATA Write Start 5 1 read-write DATA DATA Register 0x1C 32 read-write n 0x0 0x0 modifyExternal DATA Data Access 0 32 read-write IEN Interrupt Enable Register 0xC 32 read-write n 0x0 0x0 DONE Encryption/Decryption Done Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0x10 32 read-only n 0x0 0x0 DONE Encryption/Decryption Done Interrupt Flag 0 1 read-only IFC Interrupt Flag Clear Register 0x18 32 write-only n 0x0 0x0 DONE Encryption/Decryption Done Interrupt Flag Clear 0 1 write-only IFS Interrupt Flag Set Register 0x14 32 write-only n 0x0 0x0 DONE Encryption/Decryption Done Interrupt Flag Set 0 1 write-only KEYHA KEY High Register 0x40 32 read-write n 0x0 0x0 modifyExternal KEYHA Key High Access A 0 32 read-write KEYHB KEY High Register 0x44 32 read-write n 0x0 0x0 modifyExternal KEYHB Key High Access B 0 32 read-write KEYHC KEY High Register 0x48 32 read-write n 0x0 0x0 modifyExternal KEYHC Key High Access C 0 32 read-write KEYHD KEY High Register 0x4C 32 read-write n 0x0 0x0 modifyExternal KEYHD Key High Access D 0 32 read-write KEYLA KEY Low Register 0x30 32 read-write n 0x0 0x0 modifyExternal KEYLA Key Low Access A 0 32 read-write KEYLB KEY Low Register 0x34 32 read-write n 0x0 0x0 modifyExternal KEYLB Key Low Access B 0 32 read-write KEYLC KEY Low Register 0x38 32 read-write n 0x0 0x0 modifyExternal KEYLC Key Low Access C 0 32 read-write KEYLD KEY Low Register 0x3C 32 read-write n 0x0 0x0 modifyExternal KEYLD Key Low Access D 0 32 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 RUNNING AES Running 0 1 read-only XORDATA XORDATA Register 0x20 32 read-write n 0x0 0x0 modifyExternal XORDATA XOR Data Access 0 32 read-write CMU CMU CMU 0x0 0x0 0x400 registers n CMU 25 AUXHFRCOCTRL AUXHFRCO Control Register 0x14 32 read-write n 0x0 0x0 TUNING AUXHFRCO Tuning Value 0 8 read-write CALCNT Calibration Counter Register 0x1C 32 read-write n 0x0 0x0 CALCNT Calibration Counter 0 20 read-write CALCTRL Calibration Control Register 0x18 32 read-write n 0x0 0x0 UPSEL Calibration Up-counter Select 0 3 read-write HFXO Select HFXO as up-counter. 0x00000000 LFXO Select LFXO as up-counter. 0x00000001 HFRCO Select HFRCO as up-counter. 0x00000002 LFRCO Select LFRCO as up-counter. 0x00000003 AUXHFRCO Select AUXHFRCO as up-counter. 0x00000004 CMD Command Register 0x24 32 write-only n 0x0 0x0 CALSTART Calibration Start 3 1 write-only HFCLKSEL HFCLK Select 0 3 write-only HFRCO Select HFRCO as HFCLK. 0x00000001 HFXO Select HFXO as HFCLK. 0x00000002 LFRCO Select LFRCO as HFCLK. 0x00000003 LFXO Select LFXO as HFCLK. 0x00000004 CTRL CMU Control Register 0x0 32 read-write n 0x0 0x0 CLKOUTSEL0 Clock Output Select 0 20 3 read-write HFRCO HFRCO (directly from oscillator). 0x00000000 HFXO HFXO (directly from oscillator). 0x00000001 HFCLK2 HFCLK/2. 0x00000002 HFCLK4 HFCLK/4. 0x00000003 HFCLK8 HFCLK/8. 0x00000004 HFCLK16 HFCLK/16. 0x00000005 ULFRCO ULFRCO (directly from oscillator). 0x00000006 CLKOUTSEL1 Clock Output Select 1 23 1 read-write HFXOBOOST HFXO Start-up Boost Current 2 2 read-write 50PCENT 50 %. 0x00000000 70PCENT 70 %. 0x00000001 80PCENT 80 %. 0x00000002 100PCENT 100 % (default). 0x00000003 HFXOBUFCUR HFXO Boost Buffer Current 5 2 read-write HFXOGLITCHDETEN HFXO Glitch Detector Enable 7 1 read-write HFXOMODE HFXO Mode 0 2 read-write XTAL 4-32 MHz crystal oscillator. 0x00000000 BUFEXTCLK An AC coupled buffer is coupled in series with HFXTAL_N, suitable for external sine wave (4-32 MHz). The sine wave should have a minimum of 200 mV peak to peak. 0x00000001 DIGEXTCLK Digital external clock on HFXTAL_N pin. Oscillator is effectively bypassed. 0x00000002 HFXOTIMEOUT HFXO Timeout 9 2 read-write 8CYCLES Timeout period of 8 cycles. 0x00000000 256CYCLES Timeout period of 256 cycles. 0x00000001 1KCYCLES Timeout period of 1024 cycles. 0x00000002 16KCYCLES Timeout period of 16384 cycles. 0x00000003 LFXOBOOST LFXO Start-up Boost Current 13 1 read-write LFXOBUFCUR LFXO Boost Buffer Current 17 1 read-write LFXOMODE LFXO Mode 11 2 read-write XTAL 32.768 kHz crystal oscillator. 0x00000000 BUFEXTCLK An AC coupled buffer is coupled in series with LFXTAL_N pin, suitable for external sinus wave (32.768 kHz). 0x00000001 DIGEXTCLK Digital external clock on LFXTAL_N pin. Oscillator is effectively bypassed. 0x00000002 LFXOTIMEOUT LFXO Timeout 18 2 read-write 8CYCLES Timeout period of 8 cycles. 0x00000000 1KCYCLES Timeout period of 1024 cycles. 0x00000001 16KCYCLES Timeout period of 16384 cycles. 0x00000002 32KCYCLES Timeout period of 32768 cycles. 0x00000003 FREEZE Freeze Register 0x54 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write HFCORECLKDIV High Frequency Core Clock Division Register 0x4 32 read-write n 0x0 0x0 HFCORECLKDIV HFCORECLK Divider 0 4 read-write HFCLK HFCORECLK = HFCLK. 0x00000000 HFCLK2 HFCORECLK = HFCLK/2. 0x00000001 HFCLK4 HFCORECLK = HFCLK/4. 0x00000002 HFCLK8 HFCORECLK = HFCLK/8. 0x00000003 HFCLK16 HFCORECLK = HFCLK/16. 0x00000004 HFCLK32 HFCORECLK = HFCLK/32. 0x00000005 HFCLK64 HFCORECLK = HFCLK/64. 0x00000006 HFCLK128 HFCORECLK = HFCLK/128. 0x00000007 HFCLK256 HFCORECLK = HFCLK/256. 0x00000008 HFCLK512 HFCORECLK = HFCLK/512. 0x00000009 HFCORECLKEN0 High Frequency Core Clock Enable Register 0 0x40 32 read-write n 0x0 0x0 AES Advanced Encryption Standard Accelerator Clock Enable 0 1 read-write DMA Direct Memory Access Controller Clock Enable 1 1 read-write EBI External Bus Interface Clock Enable 3 1 read-write LE Low Energy Peripheral Interface Clock Enable 2 1 read-write HFPERCLKDIV High Frequency Peripheral Clock Division Register 0x8 32 read-write n 0x0 0x0 HFPERCLKDIV HFPERCLK Divider 0 4 read-write HFCLK HFPERCLK = HFCLK. 0x00000000 HFCLK2 HFPERCLK = HFCLK/2. 0x00000001 HFCLK4 HFPERCLK = HFCLK/4. 0x00000002 HFCLK8 HFPERCLK = HFCLK/8. 0x00000003 HFCLK16 HFPERCLK = HFCLK/16. 0x00000004 HFCLK32 HFPERCLK = HFCLK/32. 0x00000005 HFCLK64 HFPERCLK = HFCLK/64. 0x00000006 HFCLK128 HFPERCLK = HFCLK/128. 0x00000007 HFCLK256 HFPERCLK = HFCLK/256. 0x00000008 HFCLK512 HFPERCLK = HFCLK/512. 0x00000009 HFPERCLKEN HFPERCLK Enable 8 1 read-write HFPERCLKEN0 High Frequency Peripheral Clock Enable Register 0 0x44 32 read-write n 0x0 0x0 ACMP0 Analog Comparator 0 Clock Enable 7 1 read-write ACMP1 Analog Comparator 1 Clock Enable 8 1 read-write ADC0 Analog to Digital Converter 0 Clock Enable 14 1 read-write DAC0 Digital to Analog Converter 0 Clock Enable 11 1 read-write GPIO General purpose Input/Output Clock Enable 12 1 read-write I2C0 I2C 0 Clock Enable 15 1 read-write PRS Peripheral Reflex System Clock Enable 10 1 read-write TIMER0 Timer 0 Clock Enable 4 1 read-write TIMER1 Timer 1 Clock Enable 5 1 read-write TIMER2 Timer 2 Clock Enable 6 1 read-write UART0 Universal Asynchronous Receiver/Transmitter 0 Clock Enable 3 1 read-write USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 Clock Enable 0 1 read-write USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 Clock Enable 1 1 read-write USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 Clock Enable 2 1 read-write VCMP Voltage Comparator Clock Enable 13 1 read-write HFRCOCTRL HFRCO Control Register 0xC 32 read-write n 0x0 0x0 BAND HFRCO Band Select 8 3 read-write 1MHZ 1 MHz band. NOTE: Also set the TUNING value (bits 7:0) when changing band. 0x00000000 7MHZ 7 MHz band. NOTE: Also set the TUNING value (bits 7:0) when changing band. 0x00000001 11MHZ 11 MHz band. NOTE: Also set the TUNING value (bits 7:0) when changing band. 0x00000002 14MHZ 14 MHz band. NOTE: Also set the TUNING value (bits 7:0) when changing band. 0x00000003 21MHZ 21 MHz band. NOTE: Also set the TUNING value (bits 7:0) when changing band. 0x00000004 28MHZ 28 MHz band. NOTE: Also set the TUNING value (bits 7:0) when changing band. 0x00000005 SUDELAY HFRCO Start-up Delay 12 5 read-write TUNING HFRCO Tuning Value 0 8 read-write IEN Interrupt Enable Register 0x3C 32 read-write n 0x0 0x0 AUXHFRCORDY AUXHFRCO Ready Interrupt Enable 4 1 read-write CALRDY Calibration Ready Interrupt Enable 5 1 read-write HFRCORDY HFRCO Ready Interrupt Enable 0 1 read-write HFXORDY HFXO Ready Interrupt Enable 1 1 read-write LFRCORDY LFRCO Ready Interrupt Enable 2 1 read-write LFXORDY LFXO Ready Interrupt Enable 3 1 read-write IF Interrupt Flag Register 0x30 32 read-only n 0x0 0x0 AUXHFRCORDY AUXHFRCO Ready Interrupt Flag 4 1 read-only CALRDY Calibration Ready Interrupt Flag 5 1 read-only HFRCORDY HFRCO Ready Interrupt Flag 0 1 read-only HFXORDY HFXO Ready Interrupt Flag 1 1 read-only LFRCORDY LFRCO Ready Interrupt Flag 2 1 read-only LFXORDY LFXO Ready Interrupt Flag 3 1 read-only IFC Interrupt Flag Clear Register 0x38 32 write-only n 0x0 0x0 AUXHFRCORDY AUXHFRCO Ready Interrupt Flag Clear 4 1 write-only CALRDY Calibration Ready Interrupt Flag Clear 5 1 write-only HFRCORDY HFRCO Ready Interrupt Flag Clear 0 1 write-only HFXORDY HFXO Ready Interrupt Flag Clear 1 1 write-only LFRCORDY LFRCO Ready Interrupt Flag Clear 2 1 write-only LFXORDY LFXO Ready Interrupt Flag Clear 3 1 write-only IFS Interrupt Flag Set Register 0x34 32 write-only n 0x0 0x0 AUXHFRCORDY AUXHFRCO Ready Interrupt Flag Set 4 1 write-only CALRDY Calibration Ready Interrupt Flag Set 5 1 write-only HFRCORDY HFRCO Ready Interrupt Flag Set 0 1 write-only HFXORDY HFXO Ready Interrupt Flag Set 1 1 write-only LFRCORDY LFRCO Ready Interrupt Flag Set 2 1 write-only LFXORDY LFXO Ready Interrupt Flag Set 3 1 write-only LCDCTRL LCD Control Register 0x7C 32 read-write n 0x0 0x0 FDIV Frame Rate Control 0 3 read-write VBFDIV Voltage Boost Frequency Division 4 3 read-write DIV1 Voltage Boost update Frequency = LFACLK. 0x00000000 DIV2 Voltage Boost update Frequency = LFACLK/2. 0x00000001 DIV4 Voltage Boost update Frequency = LFACLK/4. 0x00000002 DIV8 Voltage Boost update Frequency = LFACLK/8. 0x00000003 DIV16 Voltage Boost update Frequency = LFACLK/16. 0x00000004 DIV32 Voltage Boost update Frequency = LFACLK/32. 0x00000005 DIV64 Voltage Boost update Frequency = LFACLK/64. 0x00000006 DIV128 Voltage Boost update Frequency = LFACLK/128. 0x00000007 VBOOSTEN Voltage Boost Enable 3 1 read-write LFACLKEN0 Low Frequency A Clock Enable Register 0 (Async Reg) 0x58 32 read-write n 0x0 0x0 LCD Liquid Crystal Display Controller Clock Enable 2 1 read-write LETIMER0 Low Energy Timer 0 Clock Enable 1 1 read-write RTC Real-Time Counter Clock Enable 0 1 read-write LFAPRESC0 Low Frequency A Prescaler Register 0 (Async Reg) 0x68 32 read-write n 0x0 0x0 LCD Liquid Crystal Display Controller Prescaler 8 2 read-write DIV16 LFACLKLCD = LFACLK/16 0x00000000 DIV32 LFACLKLCD = LFACLK/32 0x00000001 DIV64 LFACLKLCD = LFACLK/64 0x00000002 DIV128 LFACLKLCD = LFACLK/128 0x00000003 LETIMER0 Low Energy Timer 0 Prescaler 4 4 read-write DIV1 LFACLKLETIMER0 = LFACLK 0x00000000 DIV2 LFACLKLETIMER0 = LFACLK/2 0x00000001 DIV4 LFACLKLETIMER0 = LFACLK/4 0x00000002 DIV8 LFACLKLETIMER0 = LFACLK/8 0x00000003 DIV16 LFACLKLETIMER0 = LFACLK/16 0x00000004 DIV32 LFACLKLETIMER0 = LFACLK/32 0x00000005 DIV64 LFACLKLETIMER0 = LFACLK/64 0x00000006 DIV128 LFACLKLETIMER0 = LFACLK/128 0x00000007 DIV256 LFACLKLETIMER0 = LFACLK/256 0x00000008 DIV512 LFACLKLETIMER0 = LFACLK/512 0x00000009 DIV1024 LFACLKLETIMER0 = LFACLK/1024 0x0000000A DIV2048 LFACLKLETIMER0 = LFACLK/2048 0x0000000B DIV4096 LFACLKLETIMER0 = LFACLK/4096 0x0000000C DIV8192 LFACLKLETIMER0 = LFACLK/8192 0x0000000D DIV16384 LFACLKLETIMER0 = LFACLK/16384 0x0000000E DIV32768 LFACLKLETIMER0 = LFACLK/32768 0x0000000F RTC Real-Time Counter Prescaler 0 4 read-write DIV1 LFACLKRTC = LFACLK 0x00000000 DIV2 LFACLKRTC = LFACLK/2 0x00000001 DIV4 LFACLKRTC = LFACLK/4 0x00000002 DIV8 LFACLKRTC = LFACLK/8 0x00000003 DIV16 LFACLKRTC = LFACLK/16 0x00000004 DIV32 LFACLKRTC = LFACLK/32 0x00000005 DIV64 LFACLKRTC = LFACLK/64 0x00000006 DIV128 LFACLKRTC = LFACLK/128 0x00000007 DIV256 LFACLKRTC = LFACLK/256 0x00000008 DIV512 LFACLKRTC = LFACLK/512 0x00000009 DIV1024 LFACLKRTC = LFACLK/1024 0x0000000A DIV2048 LFACLKRTC = LFACLK/2048 0x0000000B DIV4096 LFACLKRTC = LFACLK/4096 0x0000000C DIV8192 LFACLKRTC = LFACLK/8192 0x0000000D DIV16384 LFACLKRTC = LFACLK/16384 0x0000000E DIV32768 LFACLKRTC = LFACLK/32768 0x0000000F LFBCLKEN0 Low Frequency B Clock Enable Register 0 (Async Reg) 0x60 32 read-write n 0x0 0x0 LEUART0 Low Energy UART 0 Clock Enable 0 1 read-write LEUART1 Low Energy UART 1 Clock Enable 1 1 read-write LFBPRESC0 Low Frequency B Prescaler Register 0 (Async Reg) 0x70 32 read-write n 0x0 0x0 LEUART0 Low Energy UART 0 Prescaler 0 2 read-write DIV1 LFBCLKLEUART0 = LFBCLK 0x00000000 DIV2 LFBCLKLEUART0 = LFBCLK/2 0x00000001 DIV4 LFBCLKLEUART0 = LFBCLK/4 0x00000002 DIV8 LFBCLKLEUART0 = LFBCLK/8 0x00000003 LEUART1 Low Energy UART 1 Prescaler 4 2 read-write DIV1 LFBCLKLEUART1 = LFBCLK 0x00000000 DIV2 LFBCLKLEUART1 = LFBCLK/2 0x00000001 DIV4 LFBCLKLEUART1 = LFBCLK/4 0x00000002 DIV8 LFBCLKLEUART1 = LFBCLK/8 0x00000003 LFCLKSEL Low Frequency Clock Select Register 0x28 32 read-write n 0x0 0x0 LFA Clock Select for LFA 0 2 read-write DISABLED LFACLK is disabled 0x00000000 LFRCO LFRCO selected as LFACLK 0x00000001 LFXO LFXO selected as LFACLK 0x00000002 HFCORECLKLEDIV2 HFCORECLKLE divided by two or four is selected as LFACLK. The division factor is determined by CMU_CTRL_HFLE and CMU_HFCORECLKDIV_HFCORECLKLEDIV. 0x00000003 LFB Clock Select for LFB 2 2 read-write DISABLED LFBCLK is disabled 0x00000000 LFRCO LFRCO selected as LFBCLK 0x00000001 LFXO LFXO selected as LFBCLK 0x00000002 HFCORECLKLEDIV2 HFCORECLKLE divided by two or four is selected as LFACLK. The division factor is determined by CMU_CTRL_HFLE and CMU_HFCORECLKDIV_HFCORECLKLEDIV. 0x00000003 LFRCOCTRL LFRCO Control Register 0x10 32 read-write n 0x0 0x0 TUNING LFRCO Tuning Value 0 7 read-write LOCK Configuration Lock Register 0x84 32 read-write n 0x0 0x0 LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 OSCENCMD Oscillator Enable/Disable Command Register 0x20 32 write-only n 0x0 0x0 AUXHFRCODIS AUXHFRCO Disable 5 1 write-only AUXHFRCOEN AUXHFRCO Enable 4 1 write-only HFRCODIS HFRCO Disable 1 1 write-only HFRCOEN HFRCO Enable 0 1 write-only HFXODIS HFXO Disable 3 1 write-only HFXOEN HFXO Enable 2 1 write-only LFRCODIS LFRCO Disable 7 1 write-only LFRCOEN LFRCO Enable 6 1 write-only LFXODIS LFXO Disable 9 1 write-only LFXOEN LFXO Enable 8 1 write-only PCNTCTRL PCNT Control Register 0x78 32 read-write n 0x0 0x0 PCNT0CLKEN PCNT0 Clock Enable 0 1 read-write PCNT0CLKSEL PCNT0 Clock Select 1 1 read-write PCNT1CLKEN PCNT1 Clock Enable 2 1 read-write PCNT1CLKSEL PCNT1 Clock Select 3 1 read-write PCNT2CLKEN PCNT2 Clock Enable 4 1 read-write PCNT2CLKSEL PCNT2 Clock Select 5 1 read-write ROUTE I/O Routing Register 0x80 32 read-write n 0x0 0x0 CLKOUT0PEN CLKOUT0 Pin Enable 0 1 read-write CLKOUT1PEN CLKOUT1 Pin Enable 1 1 read-write LOCATION I/O Location 2 1 read-write STATUS Status Register 0x2C 32 read-only n 0x0 0x0 AUXHFRCOENS AUXHFRCO Enable Status 4 1 read-only AUXHFRCORDY AUXHFRCO Ready 5 1 read-only CALBSY Calibration Busy 14 1 read-only HFRCOENS HFRCO Enable Status 0 1 read-only HFRCORDY HFRCO Ready 1 1 read-only HFRCOSEL HFRCO Selected 10 1 read-only HFXOENS HFXO Enable Status 2 1 read-only HFXORDY HFXO Ready 3 1 read-only HFXOSEL HFXO Selected 11 1 read-only LFRCOENS LFRCO Enable Status 6 1 read-only LFRCORDY LFRCO Ready 7 1 read-only LFRCOSEL LFRCO Selected 12 1 read-only LFXOENS LFXO Enable Status 8 1 read-only LFXORDY LFXO Ready 9 1 read-only LFXOSEL LFXO Selected 13 1 read-only SYNCBUSY Synchronization Busy Register 0x50 32 read-only n 0x0 0x0 LFACLKEN0 Low Frequency A Clock Enable 0 Busy 0 1 read-only LFAPRESC0 Low Frequency A Prescaler 0 Busy 2 1 read-only LFBCLKEN0 Low Frequency B Clock Enable 0 Busy 4 1 read-only LFBPRESC0 Low Frequency B Prescaler 0 Busy 6 1 read-only DAC0 DAC0 DAC0 0x0 0x0 0x400 registers n DAC0 7 BIASPROG Bias Programming Register 0x30 32 read-write n 0x0 0x0 BIASPROG Bias Programming Value 0 4 read-write HALFBIAS Half Bias Current 6 1 read-write CAL Calibration Register 0x2C 32 read-write n 0x0 0x0 CH0OFFSET Channel 0 Offset Calibration Value 0 6 read-write CH1OFFSET Channel 1 Offset Calibration Value 8 6 read-write GAIN Gain Calibration Value 16 7 read-write CH0CTRL Channel 0 Control Register 0x8 32 read-write n 0x0 0x0 EN Channel 0 Enable 0 1 read-write PRSEN Channel 0 PRS Trigger Enable 2 1 read-write PRSSEL Channel 0 PRS Trigger Select 4 3 read-write PRSCH0 PRS ch 0 triggers channel 0 conversion. 0x00000000 PRSCH1 PRS ch 1 triggers channel 0 conversion. 0x00000001 PRSCH2 PRS ch 2 triggers channel 0 conversion. 0x00000002 PRSCH3 PRS ch 3 triggers channel 0 conversion. 0x00000003 PRSCH4 PRS ch 4 triggers channel 0 conversion. 0x00000004 PRSCH5 PRS ch 5 triggers channel 0 conversion. 0x00000005 PRSCH6 PRS ch 6 triggers channel 0 conversion. 0x00000006 PRSCH7 PRS ch 7 triggers channel 0 conversion. 0x00000007 REFREN Channel 0 Automatic Refresh Enable 1 1 read-write CH0DATA Channel 0 Data Register 0x20 32 read-write n 0x0 0x0 DATA Channel 0 Data 0 12 read-write CH1CTRL Channel 1 Control Register 0xC 32 read-write n 0x0 0x0 EN Channel 1 Enable 0 1 read-write PRSEN Channel 1 PRS Trigger Enable 2 1 read-write PRSSEL Channel 1 PRS Trigger Select 4 3 read-write PRSCH0 PRS ch 0 triggers channel 1 conversion. 0x00000000 PRSCH1 PRS ch 1 triggers channel 1 conversion. 0x00000001 PRSCH2 PRS ch 2 triggers channel 1 conversion. 0x00000002 PRSCH3 PRS ch 3 triggers channel 1 conversion. 0x00000003 PRSCH4 PRS ch 4 triggers channel 1 conversion. 0x00000004 PRSCH5 PRS ch 5 triggers channel 1 conversion. 0x00000005 PRSCH6 PRS ch 6 triggers channel 1 conversion. 0x00000006 PRSCH7 PRS ch 7 triggers channel 1 conversion. 0x00000007 REFREN Channel 1 Automatic Refresh Enable 1 1 read-write CH1DATA Channel 1 Data Register 0x24 32 read-write n 0x0 0x0 DATA Channel 1 Data 0 12 read-write COMBDATA Combined Data Register 0x28 32 write-only n 0x0 0x0 CH0DATA Channel 0 Data 0 12 write-only CH1DATA Channel 1 Data 16 12 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 CH0PRESCRST Channel 0 Start Reset Prescaler 7 1 read-write CONVMODE Conversion Mode 2 2 read-write CONTINUOUS DAC is set in continuous mode 0x00000000 SAMPLEHOLD DAC is set in sample/hold mode 0x00000001 SAMPLEOFF DAC is set in sample/shut off mode 0x00000002 DIFF Differential Mode 0 1 read-write OUTENPRS PRS Controlled Output Enable 6 1 read-write OUTMODE Output Mode 4 2 read-write DISABLE DAC output to pin and ADC disabled 0x00000000 PIN DAC output to pin enabled. DAC output to ADC disabled 0x00000001 ADC DAC output to pin disabled. DAC output to ADC enabled 0x00000002 PINADC DAC output to pin and ADC enabled 0x00000003 PRESC Prescaler Setting 16 3 read-write NODIVISION 0x00000000 REFRSEL Refresh Interval Select 20 2 read-write 8CYCLES All channels with enabled refresh are refreshed every 8 prescaled cycles 0x00000000 16CYCLES All channels with enabled refresh are refreshed every 16 prescaled cycles 0x00000001 32CYCLES All channels with enabled refresh are refreshed every 32 prescaled cycles 0x00000002 64CYCLES All channels with enabled refresh are refreshed every 64 prescaled cycles 0x00000003 REFSEL Reference Selection 8 2 read-write 1V25 Internal 1.25 V bandgap reference 0x00000000 2V5 Internal 2.5 V bandgap reference 0x00000001 VDD VDD reference 0x00000002 SINEMODE Sine Mode 1 1 read-write IEN Interrupt Enable Register 0x10 32 read-write n 0x0 0x0 CH0 Channel 0 Conversion Complete Interrupt Enable 0 1 read-write CH0UF Channel 0 Conversion Data Underflow Interrupt Enable 4 1 read-write CH1 Channel 1 Conversion Complete Interrupt Enable 1 1 read-write CH1UF Channel 1 Conversion Data Underflow Interrupt Enable 5 1 read-write IF Interrupt Flag Register 0x14 32 read-only n 0x0 0x0 CH0 Channel 0 Conversion Complete Interrupt Flag 0 1 read-only CH0UF Channel 0 Data Underflow Interrupt Flag 4 1 read-only CH1 Channel 1 Conversion Complete Interrupt Flag 1 1 read-only CH1UF Channel 1 Data Underflow Interrupt Flag 5 1 read-only IFC Interrupt Flag Clear Register 0x1C 32 write-only n 0x0 0x0 CH0 Channel 0 Conversion Complete Interrupt Flag Clear 0 1 write-only CH0UF Channel 0 Data Underflow Interrupt Flag Clear 4 1 write-only CH1 Channel 1 Conversion Complete Interrupt Flag Clear 1 1 write-only CH1UF Channel 1 Data Underflow Interrupt Flag Clear 5 1 write-only IFS Interrupt Flag Set Register 0x18 32 write-only n 0x0 0x0 CH0 Channel 0 Conversion Complete Interrupt Flag Set 0 1 write-only CH0UF Channel 0 Data Underflow Interrupt Flag Set 4 1 write-only CH1 Channel 1 Conversion Complete Interrupt Flag Set 1 1 write-only CH1UF Channel 1 Data Underflow Interrupt Flag Set 5 1 write-only STATUS Status Register 0x4 32 read-only n 0x0 0x0 CH0DV Channel 0 Data Valid 0 1 read-only CH1DV Channel 1 Data Valid 1 1 read-only DMA DMA DMA 0x0 0x0 0x2000 registers n DMA 0 ALTCTRLBASE Channel Alternate Control Data Base Pointer Register 0xC 32 read-only n 0x0 0x0 ALTCTRLBASE Channel Alternate Control Data Base Pointer 0 32 read-only CH0_CTRL Channel Control Register 0x1100 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 ADC0 Analog to Digital Converter 0 0x00000008 DAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E LEUART0 Low Energy UART 0 0x00000010 LEUART1 Low Energy UART 1 0x00000011 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 TIMER2 Timer 2 0x0000001A UART0 Universal Asynchronous Receiver/Transmitter 0 0x0000002C MSC 0x00000030 AES Advanced Encryption Standard Accelerator 0x00000031 CH1_CTRL Channel Control Register 0x1104 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 ADC0 Analog to Digital Converter 0 0x00000008 DAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E LEUART0 Low Energy UART 0 0x00000010 LEUART1 Low Energy UART 1 0x00000011 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 TIMER2 Timer 2 0x0000001A UART0 Universal Asynchronous Receiver/Transmitter 0 0x0000002C MSC 0x00000030 AES Advanced Encryption Standard Accelerator 0x00000031 CH2_CTRL Channel Control Register 0x1108 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 ADC0 Analog to Digital Converter 0 0x00000008 DAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E LEUART0 Low Energy UART 0 0x00000010 LEUART1 Low Energy UART 1 0x00000011 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 TIMER2 Timer 2 0x0000001A UART0 Universal Asynchronous Receiver/Transmitter 0 0x0000002C MSC 0x00000030 AES Advanced Encryption Standard Accelerator 0x00000031 CH3_CTRL Channel Control Register 0x110C 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 ADC0 Analog to Digital Converter 0 0x00000008 DAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E LEUART0 Low Energy UART 0 0x00000010 LEUART1 Low Energy UART 1 0x00000011 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 TIMER2 Timer 2 0x0000001A UART0 Universal Asynchronous Receiver/Transmitter 0 0x0000002C MSC 0x00000030 AES Advanced Encryption Standard Accelerator 0x00000031 CH4_CTRL Channel Control Register 0x1110 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 ADC0 Analog to Digital Converter 0 0x00000008 DAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E LEUART0 Low Energy UART 0 0x00000010 LEUART1 Low Energy UART 1 0x00000011 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 TIMER2 Timer 2 0x0000001A UART0 Universal Asynchronous Receiver/Transmitter 0 0x0000002C MSC 0x00000030 AES Advanced Encryption Standard Accelerator 0x00000031 CH5_CTRL Channel Control Register 0x1114 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 ADC0 Analog to Digital Converter 0 0x00000008 DAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E LEUART0 Low Energy UART 0 0x00000010 LEUART1 Low Energy UART 1 0x00000011 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 TIMER2 Timer 2 0x0000001A UART0 Universal Asynchronous Receiver/Transmitter 0 0x0000002C MSC 0x00000030 AES Advanced Encryption Standard Accelerator 0x00000031 CH6_CTRL Channel Control Register 0x1118 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 ADC0 Analog to Digital Converter 0 0x00000008 DAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E LEUART0 Low Energy UART 0 0x00000010 LEUART1 Low Energy UART 1 0x00000011 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 TIMER2 Timer 2 0x0000001A UART0 Universal Asynchronous Receiver/Transmitter 0 0x0000002C MSC 0x00000030 AES Advanced Encryption Standard Accelerator 0x00000031 CH7_CTRL Channel Control Register 0x111C 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 ADC0 Analog to Digital Converter 0 0x00000008 DAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E LEUART0 Low Energy UART 0 0x00000010 LEUART1 Low Energy UART 1 0x00000011 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 TIMER2 Timer 2 0x0000001A UART0 Universal Asynchronous Receiver/Transmitter 0 0x0000002C MSC 0x00000030 AES Advanced Encryption Standard Accelerator 0x00000031 CHALTC Channel Alternate Clear Register 0x34 32 write-only n 0x0 0x0 CH0ALTC Channel 0 Alternate Clear 0 1 write-only CH1ALTC Channel 1 Alternate Clear 1 1 write-only CH2ALTC Channel 2 Alternate Clear 2 1 write-only CH3ALTC Channel 3 Alternate Clear 3 1 write-only CH4ALTC Channel 4 Alternate Clear 4 1 write-only CH5ALTC Channel 5 Alternate Clear 5 1 write-only CH6ALTC Channel 6 Alternate Clear 6 1 write-only CH7ALTC Channel 7 Alternate Clear 7 1 write-only CHALTS Channel Alternate Set Register 0x30 32 write-only n 0x0 0x0 CH0ALTS Channel 0 Alternate Structure Set 0 1 write-only CH1ALTS Channel 1 Alternate Structure Set 1 1 write-only CH2ALTS Channel 2 Alternate Structure Set 2 1 write-only CH3ALTS Channel 3 Alternate Structure Set 3 1 write-only CH4ALTS Channel 4 Alternate Structure Set 4 1 write-only CH5ALTS Channel 5 Alternate Structure Set 5 1 write-only CH6ALTS Channel 6 Alternate Structure Set 6 1 write-only CH7ALTS Channel 7 Alternate Structure Set 7 1 write-only CHENC Channel Enable Clear Register 0x2C 32 write-only n 0x0 0x0 CH0ENC Channel 0 Enable Clear 0 1 write-only CH1ENC Channel 1 Enable Clear 1 1 write-only CH2ENC Channel 2 Enable Clear 2 1 write-only CH3ENC Channel 3 Enable Clear 3 1 write-only CH4ENC Channel 4 Enable Clear 4 1 write-only CH5ENC Channel 5 Enable Clear 5 1 write-only CH6ENC Channel 6 Enable Clear 6 1 write-only CH7ENC Channel 7 Enable Clear 7 1 write-only CHENS Channel Enable Set Register 0x28 32 write-only n 0x0 0x0 CH0ENS Channel 0 Enable Set 0 1 write-only CH1ENS Channel 1 Enable Set 1 1 write-only CH2ENS Channel 2 Enable Set 2 1 write-only CH3ENS Channel 3 Enable Set 3 1 write-only CH4ENS Channel 4 Enable Set 4 1 write-only CH5ENS Channel 5 Enable Set 5 1 write-only CH6ENS Channel 6 Enable Set 6 1 write-only CH7ENS Channel 7 Enable Set 7 1 write-only CHPRIC Channel Priority Clear Register 0x3C 32 write-only n 0x0 0x0 CH0PRIC Channel 0 High Priority Clear 0 1 write-only CH1PRIC Channel 1 High Priority Clear 1 1 write-only CH2PRIC Channel 2 High Priority Clear 2 1 write-only CH3PRIC Channel 3 High Priority Clear 3 1 write-only CH4PRIC Channel 4 High Priority Clear 4 1 write-only CH5PRIC Channel 5 High Priority Clear 5 1 write-only CH6PRIC Channel 6 High Priority Clear 6 1 write-only CH7PRIC Channel 7 High Priority Clear 7 1 write-only CHPRIS Channel Priority Set Register 0x38 32 write-only n 0x0 0x0 CH0PRIS Channel 0 High Priority Set 0 1 write-only CH1PRIS Channel 1 High Priority Set 1 1 write-only CH2PRIS Channel 2 High Priority Set 2 1 write-only CH3PRIS Channel 3 High Priority Set 3 1 write-only CH4PRIS Channel 4 High Priority Set 4 1 write-only CH5PRIS Channel 5 High Priority Set 5 1 write-only CH6PRIS Channel 6 High Priority Set 6 1 write-only CH7PRIS Channel 7 High Priority Set 7 1 write-only CHREQMASKC Channel Request Mask Clear Register 0x24 32 write-only n 0x0 0x0 CH0REQMASKC Channel 0 Request Mask Clear 0 1 write-only CH1REQMASKC Channel 1 Request Mask Clear 1 1 write-only CH2REQMASKC Channel 2 Request Mask Clear 2 1 write-only CH3REQMASKC Channel 3 Request Mask Clear 3 1 write-only CH4REQMASKC Channel 4 Request Mask Clear 4 1 write-only CH5REQMASKC Channel 5 Request Mask Clear 5 1 write-only CH6REQMASKC Channel 6 Request Mask Clear 6 1 write-only CH7REQMASKC Channel 7 Request Mask Clear 7 1 write-only CHREQMASKS Channel Request Mask Set Register 0x20 32 write-only n 0x0 0x0 CH0REQMASKS Channel 0 Request Mask Set 0 1 write-only CH1REQMASKS Channel 1 Request Mask Set 1 1 write-only CH2REQMASKS Channel 2 Request Mask Set 2 1 write-only CH3REQMASKS Channel 3 Request Mask Set 3 1 write-only CH4REQMASKS Channel 4 Request Mask Set 4 1 write-only CH5REQMASKS Channel 5 Request Mask Set 5 1 write-only CH6REQMASKS Channel 6 Request Mask Set 6 1 write-only CH7REQMASKS Channel 7 Request Mask Set 7 1 write-only CHREQSTATUS Channel Request Status 0xE10 32 read-only n 0x0 0x0 CH0REQSTATUS Channel 0 Request Status 0 1 read-only CH1REQSTATUS Channel 1 Request Status 1 1 read-only CH2REQSTATUS Channel 2 Request Status 2 1 read-only CH3REQSTATUS Channel 3 Request Status 3 1 read-only CH4REQSTATUS Channel 4 Request Status 4 1 read-only CH5REQSTATUS Channel 5 Request Status 5 1 read-only CH6REQSTATUS Channel 6 Request Status 6 1 read-only CH7REQSTATUS Channel 7 Request Status 7 1 read-only CHSREQSTATUS Channel Single Request Status 0xE18 32 read-only n 0x0 0x0 CH0SREQSTATUS Channel 0 Single Request Status 0 1 read-only CH1SREQSTATUS Channel 1 Single Request Status 1 1 read-only CH2SREQSTATUS Channel 2 Single Request Status 2 1 read-only CH3SREQSTATUS Channel 3 Single Request Status 3 1 read-only CH4SREQSTATUS Channel 4 Single Request Status 4 1 read-only CH5SREQSTATUS Channel 5 Single Request Status 5 1 read-only CH6SREQSTATUS Channel 6 Single Request Status 6 1 read-only CH7SREQSTATUS Channel 7 Single Request Status 7 1 read-only CHSWREQ Channel Software Request Register 0x14 32 write-only n 0x0 0x0 CH0SWREQ Channel 0 Software Request 0 1 write-only CH1SWREQ Channel 1 Software Request 1 1 write-only CH2SWREQ Channel 2 Software Request 2 1 write-only CH3SWREQ Channel 3 Software Request 3 1 write-only CH4SWREQ Channel 4 Software Request 4 1 write-only CH5SWREQ Channel 5 Software Request 5 1 write-only CH6SWREQ Channel 6 Software Request 6 1 write-only CH7SWREQ Channel 7 Software Request 7 1 write-only CHUSEBURSTC Channel Useburst Clear Register 0x1C 32 write-only n 0x0 0x0 CH0USEBURSTC Channel 0 Useburst Clear 0 1 write-only CH1USEBURSTC Channel 1 Useburst Clear 1 1 write-only CH2USEBURSTC Channel 2 Useburst Clear 2 1 write-only CH3USEBURSTC Channel 3 Useburst Clear 3 1 write-only CH4USEBURSTC Channel 4 Useburst Clear 4 1 write-only CH5USEBURSTC Channel 5 Useburst Clear 5 1 write-only CH6USEBURSTC Channel 6 Useburst Clear 6 1 write-only CH7USEBURSTC Channel 7 Useburst Clear 7 1 write-only CHUSEBURSTS Channel Useburst Set Register 0x18 32 read-write n 0x0 0x0 CH0USEBURSTS Channel 0 Useburst Set 0 1 read-write CH1USEBURSTS Channel 1 Useburst Set 1 1 read-write CH2USEBURSTS Channel 2 Useburst Set 2 1 read-write CH3USEBURSTS Channel 3 Useburst Set 3 1 read-write CH4USEBURSTS Channel 4 Useburst Set 4 1 read-write CH5USEBURSTS Channel 5 Useburst Set 5 1 read-write CH6USEBURSTS Channel 6 Useburst Set 6 1 read-write CH7USEBURSTS Channel 7 Useburst Set 7 1 read-write CHWAITSTATUS Channel Wait on Request Status Register 0x10 32 read-only n 0x0 0x0 CH0WAITSTATUS Channel 0 Wait on Request Status 0 1 read-only CH1WAITSTATUS Channel 1 Wait on Request Status 1 1 read-only CH2WAITSTATUS Channel 2 Wait on Request Status 2 1 read-only CH3WAITSTATUS Channel 3 Wait on Request Status 3 1 read-only CH4WAITSTATUS Channel 4 Wait on Request Status 4 1 read-only CH5WAITSTATUS Channel 5 Wait on Request Status 5 1 read-only CH6WAITSTATUS Channel 6 Wait on Request Status 6 1 read-only CH7WAITSTATUS Channel 7 Wait on Request Status 7 1 read-only CONFIG DMA Configuration Register 0x4 32 write-only n 0x0 0x0 CHPROT Channel Protection Control 5 1 write-only EN Enable DMA 0 1 write-only CTRLBASE Channel Control Data Base Pointer Register 0x8 32 read-write n 0x0 0x0 CTRLBASE Channel Control Data Base Pointer 0 32 read-write ERRORC Bus Error Clear Register 0x4C 32 read-write n 0x0 0x0 ERRORC Bus Error Clear 0 1 read-write IEN Interrupt Enable register 0x100C 32 read-write n 0x0 0x0 CH0DONE DMA Channel 0 Complete Interrupt Enable 0 1 read-write CH1DONE DMA Channel 1 Complete Interrupt Enable 1 1 read-write CH2DONE DMA Channel 2 Complete Interrupt Enable 2 1 read-write CH3DONE DMA Channel 3 Complete Interrupt Enable 3 1 read-write CH4DONE DMA Channel 4 Complete Interrupt Enable 4 1 read-write CH5DONE DMA Channel 5 Complete Interrupt Enable 5 1 read-write CH6DONE DMA Channel 6 Complete Interrupt Enable 6 1 read-write CH7DONE DMA Channel 7 Complete Interrupt Enable 7 1 read-write ERR DMA Error Interrupt Flag Enable 31 1 read-write IF Interrupt Flag Register 0x1000 32 read-only n 0x0 0x0 CH0DONE DMA Channel 0 Complete Interrupt Flag 0 1 read-only CH1DONE DMA Channel 1 Complete Interrupt Flag 1 1 read-only CH2DONE DMA Channel 2 Complete Interrupt Flag 2 1 read-only CH3DONE DMA Channel 3 Complete Interrupt Flag 3 1 read-only CH4DONE DMA Channel 4 Complete Interrupt Flag 4 1 read-only CH5DONE DMA Channel 5 Complete Interrupt Flag 5 1 read-only CH6DONE DMA Channel 6 Complete Interrupt Flag 6 1 read-only CH7DONE DMA Channel 7 Complete Interrupt Flag 7 1 read-only ERR DMA Error Interrupt Flag 31 1 read-only IFC Interrupt Flag Clear Register 0x1008 32 write-only n 0x0 0x0 CH0DONE DMA Channel 0 Complete Interrupt Flag Clear 0 1 write-only CH1DONE DMA Channel 1 Complete Interrupt Flag Clear 1 1 write-only CH2DONE DMA Channel 2 Complete Interrupt Flag Clear 2 1 write-only CH3DONE DMA Channel 3 Complete Interrupt Flag Clear 3 1 write-only CH4DONE DMA Channel 4 Complete Interrupt Flag Clear 4 1 write-only CH5DONE DMA Channel 5 Complete Interrupt Flag Clear 5 1 write-only CH6DONE DMA Channel 6 Complete Interrupt Flag Clear 6 1 write-only CH7DONE DMA Channel 7 Complete Interrupt Flag Clear 7 1 write-only ERR DMA Error Interrupt Flag Clear 31 1 write-only IFS Interrupt Flag Set Register 0x1004 32 write-only n 0x0 0x0 CH0DONE DMA Channel 0 Complete Interrupt Flag Set 0 1 write-only CH1DONE DMA Channel 1 Complete Interrupt Flag Set 1 1 write-only CH2DONE DMA Channel 2 Complete Interrupt Flag Set 2 1 write-only CH3DONE DMA Channel 3 Complete Interrupt Flag Set 3 1 write-only CH4DONE DMA Channel 4 Complete Interrupt Flag Set 4 1 write-only CH5DONE DMA Channel 5 Complete Interrupt Flag Set 5 1 write-only CH6DONE DMA Channel 6 Complete Interrupt Flag Set 6 1 write-only CH7DONE DMA Channel 7 Complete Interrupt Flag Set 7 1 write-only ERR DMA Error Interrupt Flag Set 31 1 write-only STATUS DMA Status Registers 0x0 32 read-only n 0x0 0x0 CHNUM Channel Number 16 5 read-only EN DMA Enable Status 0 1 read-only STATE Control Current State 4 4 read-only IDLE Idle 0x00000000 RDCHCTRLDATA Reading channel controller data 0x00000001 RDSRCENDPTR Reading source data end pointer 0x00000002 RDDSTENDPTR Reading destination data end pointer 0x00000003 RDSRCDATA Reading source data 0x00000004 WRDSTDATA Writing destination data 0x00000005 WAITREQCLR Waiting for DMA request to clear 0x00000006 WRCHCTRLDATA Writing channel controller data 0x00000007 STALLED Stalled 0x00000008 DONE Done 0x00000009 PERSCATTRANS Peripheral scatter-gather transition 0x0000000A EBI EBI EBI 0x0 0x0 0x400 registers n ADDRTIMING Address Timing Register 0x4 32 read-write n 0x0 0x0 ADDRHOLD Address Hold Time 8 2 read-write ADDRSETUP Address Setup Time 0 2 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ARDYEN ARDY Enable 16 1 read-write ARDYTODIS ARDY Timeout Disable 17 1 read-write BANK0EN Bank 0 Enable 8 1 read-write BANK1EN Bank 1 Enable 9 1 read-write BANK2EN Bank 2 Enable 10 1 read-write BANK3EN Bank 3 Enable 11 1 read-write MODE Mode 0 2 read-write D8A8 8 bit data, 8 bit address, ALE not used. 0x00000000 D16A16ALE 16 bit data, 16 bit address, ALE is used for address latching. 0x00000001 D8A24ALE 8 bit data, 24 bit address, ALE is used for address latching. 0x00000002 POLARITY Polarity Register 0x10 32 read-write n 0x0 0x0 ALEPOL Address Latch Polarity 3 1 read-write ARDYPOL ARDY Polarity 4 1 read-write CSPOL Chip Select Polarity 0 1 read-write REPOL Read Enable Polarity 1 1 read-write WEPOL Write Enable Polarity 2 1 read-write RDTIMING Read Timing Register 0x8 32 read-write n 0x0 0x0 RDHOLD Read Hold Time 16 2 read-write RDSETUP Read Setup Time 0 2 read-write RDSTRB Read Strobe Time 8 4 read-write ROUTE I/O Routing Register 0x14 32 read-write n 0x0 0x0 ALEPEN EBI_ALE Pin Enable 5 1 read-write ARDYPEN EBI_ARDY Pin Enable 6 1 read-write CS0PEN EBI_CS0 Pin Enable 1 1 read-write CS1PEN EBI_CS1 Pin Enable 2 1 read-write CS2PEN EBI_CS2 Pin Enable 3 1 read-write CS3PEN EBI_CS3 Pin Enable 4 1 read-write EBIPEN EBI Pin Enable 0 1 read-write WRTIMING Write Timing Register 0xC 32 read-write n 0x0 0x0 WRHOLD Write Hold Time 16 2 read-write WRSETUP Write Setup Time 0 2 read-write WRSTRB Write Strobe Time 8 4 read-write EMU EMU EMU 0x0 0x0 0x400 registers n AUXCTRL Auxiliary Control Register 0x24 32 read-write n 0x0 0x0 HRCCLR Hard Reset Cause Clear 0 1 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 EM2BLOCK Energy Mode 2 Block 1 1 read-write EM4CTRL Energy Mode 4 Control 2 2 read-write EMVREG Energy Mode Voltage Regulator Control 0 1 read-write LOCK Configuration Lock Register 0x8 32 read-write n 0x0 0x0 LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 MEMCTRL Memory Control Register 0x4 32 read-write n 0x0 0x0 POWERDOWN RAM block power-down 0 3 read-write BLK3 Power down RAM block 3 (address range 0x20018000-0x2001FFFF). 0x00000004 BLK23 Power down RAM blocks 2-3 (address range 0x20010000-0x2001FFFF). 0x00000006 BLK123 Power down RAM blocks 1-3 (address range 0x20008000-0x2001FFFF). 0x00000007 GPIO GPIO GPIO 0x0 0x0 0x1000 registers n GPIO_EVEN 1 GPIO_ODD 9 EXTIFALL External Interrupt Falling Edge Trigger Register 0x10C 32 read-write n 0x0 0x0 EXTIFALL External Interrupt n Falling Edge Trigger Enable 0 16 read-write EXTIPSELH External Interrupt Port Select High Register 0x104 32 read-write n 0x0 0x0 EXTIPSEL10 External Interrupt 10 Port Select 8 3 read-write PORTA Port A pin 10 selected for external interrupt 10 0x00000000 PORTB Port B pin 10 selected for external interrupt 10 0x00000001 PORTC Port C pin 10 selected for external interrupt 10 0x00000002 PORTD Port D pin 10 selected for external interrupt 10 0x00000003 PORTE Port E pin 10 selected for external interrupt 10 0x00000004 PORTF Port F pin 10 selected for external interrupt 10 0x00000005 EXTIPSEL11 External Interrupt 11 Port Select 12 3 read-write PORTA Port A pin 11 selected for external interrupt 11 0x00000000 PORTB Port B pin 11 selected for external interrupt 11 0x00000001 PORTC Port C pin 11 selected for external interrupt 11 0x00000002 PORTD Port D pin 11 selected for external interrupt 11 0x00000003 PORTE Port E pin 11 selected for external interrupt 11 0x00000004 PORTF Port F pin 11 selected for external interrupt 11 0x00000005 EXTIPSEL12 External Interrupt 12 Port Select 16 3 read-write PORTA Port A pin 12 selected for external interrupt 12 0x00000000 PORTB Port B pin 12 selected for external interrupt 12 0x00000001 PORTC Port C pin 12 selected for external interrupt 12 0x00000002 PORTD Port D pin 12 selected for external interrupt 12 0x00000003 PORTE Port E pin 12 selected for external interrupt 12 0x00000004 PORTF Port F pin 12 selected for external interrupt 12 0x00000005 EXTIPSEL13 External Interrupt 13 Port Select 20 3 read-write PORTA Port A pin 13 selected for external interrupt 13 0x00000000 PORTB Port B pin 13 selected for external interrupt 13 0x00000001 PORTC Port C pin 13 selected for external interrupt 13 0x00000002 PORTD Port D pin 13 selected for external interrupt 13 0x00000003 PORTE Port E pin 13 selected for external interrupt 13 0x00000004 PORTF Port F pin 13 selected for external interrupt 13 0x00000005 EXTIPSEL14 External Interrupt 14 Port Select 24 3 read-write PORTA Port A pin 14 selected for external interrupt 14 0x00000000 PORTB Port B pin 14 selected for external interrupt 14 0x00000001 PORTC Port C pin 14 selected for external interrupt 14 0x00000002 PORTD Port D pin 14 selected for external interrupt 14 0x00000003 PORTE Port E pin 14 selected for external interrupt 14 0x00000004 PORTF Port F pin 14 selected for external interrupt 14 0x00000005 EXTIPSEL15 External Interrupt 15 Port Select 28 3 read-write PORTA Port A pin 15 selected for external interrupt 15 0x00000000 PORTB Port B pin 15 selected for external interrupt 15 0x00000001 PORTC Port C pin 15 selected for external interrupt 15 0x00000002 PORTD Port D pin 15 selected for external interrupt 15 0x00000003 PORTE Port E pin 15 selected for external interrupt 15 0x00000004 PORTF Port F pin 15 selected for external interrupt 15 0x00000005 EXTIPSEL8 External Interrupt 8 Port Select 0 3 read-write PORTA Port A pin 8 selected for external interrupt 8 0x00000000 PORTB Port B pin 8 selected for external interrupt 8 0x00000001 PORTC Port C pin 8 selected for external interrupt 8 0x00000002 PORTD Port D pin 8 selected for external interrupt 8 0x00000003 PORTE Port E pin 8 selected for external interrupt 8 0x00000004 PORTF Port F pin 8 selected for external interrupt 8 0x00000005 EXTIPSEL9 External Interrupt 9 Port Select 4 3 read-write PORTA Port A pin 9 selected for external interrupt 9 0x00000000 PORTB Port B pin 9 selected for external interrupt 9 0x00000001 PORTC Port C pin 9 selected for external interrupt 9 0x00000002 PORTD Port D pin 9 selected for external interrupt 9 0x00000003 PORTE Port E pin 9 selected for external interrupt 9 0x00000004 PORTF Port F pin 9 selected for external interrupt 9 0x00000005 EXTIPSELL External Interrupt Port Select Low Register 0x100 32 read-write n 0x0 0x0 EXTIPSEL0 External Interrupt 0 Port Select 0 3 read-write PORTA Port A pin 0 selected for external interrupt 0 0x00000000 PORTB Port B pin 0 selected for external interrupt 0 0x00000001 PORTC Port C pin 0 selected for external interrupt 0 0x00000002 PORTD Port D pin 0 selected for external interrupt 0 0x00000003 PORTE Port E pin 0 selected for external interrupt 0 0x00000004 PORTF Port F pin 0 selected for external interrupt 0 0x00000005 EXTIPSEL1 External Interrupt 1 Port Select 4 3 read-write PORTA Port A pin 1 selected for external interrupt 1 0x00000000 PORTB Port B pin 1 selected for external interrupt 1 0x00000001 PORTC Port C pin 1 selected for external interrupt 1 0x00000002 PORTD Port D pin 1 selected for external interrupt 1 0x00000003 PORTE Port E pin 1 selected for external interrupt 1 0x00000004 PORTF Port F pin 1 selected for external interrupt 1 0x00000005 EXTIPSEL2 External Interrupt 2 Port Select 8 3 read-write PORTA Port A pin 2 selected for external interrupt 2 0x00000000 PORTB Port B pin 2 selected for external interrupt 2 0x00000001 PORTC Port C pin 2 selected for external interrupt 2 0x00000002 PORTD Port D pin 2 selected for external interrupt 2 0x00000003 PORTE Port E pin 2 selected for external interrupt 2 0x00000004 PORTF Port F pin 2 selected for external interrupt 2 0x00000005 EXTIPSEL3 External Interrupt 3 Port Select 12 3 read-write PORTA Port A pin 3 selected for external interrupt 3 0x00000000 PORTB Port B pin 3 selected for external interrupt 3 0x00000001 PORTC Port C pin 3 selected for external interrupt 3 0x00000002 PORTD Port D pin 3 selected for external interrupt 3 0x00000003 PORTE Port E pin 3 selected for external interrupt 3 0x00000004 PORTF Port F pin 3 selected for external interrupt 3 0x00000005 EXTIPSEL4 External Interrupt 4 Port Select 16 3 read-write PORTA Port A pin 4 selected for external interrupt 4 0x00000000 PORTB Port B pin 4 selected for external interrupt 4 0x00000001 PORTC Port C pin 4 selected for external interrupt 4 0x00000002 PORTD Port D pin 4 selected for external interrupt 4 0x00000003 PORTE Port E pin 4 selected for external interrupt 4 0x00000004 PORTF Port F pin 4 selected for external interrupt 4 0x00000005 EXTIPSEL5 External Interrupt 5 Port Select 20 3 read-write PORTA Port A pin 5 selected for external interrupt 5 0x00000000 PORTB Port B pin 5 selected for external interrupt 5 0x00000001 PORTC Port C pin 5 selected for external interrupt 5 0x00000002 PORTD Port D pin 5 selected for external interrupt 5 0x00000003 PORTE Port E pin 5 selected for external interrupt 5 0x00000004 PORTF Port F pin 5 selected for external interrupt 5 0x00000005 EXTIPSEL6 External Interrupt 6 Port Select 24 3 read-write PORTA Port A pin 6 selected for external interrupt 6 0x00000000 PORTB Port B pin 6 selected for external interrupt 6 0x00000001 PORTC Port C pin 6 selected for external interrupt 6 0x00000002 PORTD Port D pin 6 selected for external interrupt 6 0x00000003 PORTE Port E pin 6 selected for external interrupt 6 0x00000004 PORTF Port F pin 6 selected for external interrupt 6 0x00000005 EXTIPSEL7 External Interrupt 7 Port Select 28 3 read-write PORTA Port A pin 7 selected for external interrupt 7 0x00000000 PORTB Port B pin 7 selected for external interrupt 7 0x00000001 PORTC Port C pin 7 selected for external interrupt 7 0x00000002 PORTD Port D pin 7 selected for external interrupt 7 0x00000003 PORTE Port E pin 7 selected for external interrupt 7 0x00000004 PORTF Port F pin 7 selected for external interrupt 7 0x00000005 EXTIRISE External Interrupt Rising Edge Trigger Register 0x108 32 read-write n 0x0 0x0 EXTIRISE External Interrupt n Rising Edge Trigger Enable 0 16 read-write IEN Interrupt Enable Register 0x110 32 read-write n 0x0 0x0 EXT External Interrupt n Enable 0 16 read-write IF Interrupt Flag Register 0x114 32 read-only n 0x0 0x0 EXT External Interrupt Flag n 0 16 read-only IFC Interrupt Flag Clear Register 0x11C 32 write-only n 0x0 0x0 EXT External Interrupt Flag Clear 0 16 write-only IFS Interrupt Flag Set Register 0x118 32 write-only n 0x0 0x0 EXT External Interrupt Flag n Set 0 16 write-only INSENSE Input Sense Register 0x124 32 read-write n 0x0 0x0 INT Interrupt Sense Enable 0 1 read-write PRS PRS Sense Enable 1 1 read-write LOCK Configuration Lock Register 0x128 32 read-write n 0x0 0x0 LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 PA_CTRL Port Control Register 0x0 32 read-write n 0x0 0x0 DRIVEMODE Drive Mode Select 0 2 read-write STANDARD 6 mA drive current 0x00000000 LOWEST 0.1 mA drive current 0x00000001 HIGH 20 mA drive current 0x00000002 LOW 1 mA drive current 0x00000003 PA_DIN Port Data In Register 0x1C 32 read-only n 0x0 0x0 DIN Data In 0 16 read-only PA_DOUT Port Data Out Register 0xC 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PA_DOUTCLR Port Data Out Clear Register 0x14 32 write-only n 0x0 0x0 DOUTCLR Data Out Clear 0 16 write-only PA_DOUTSET Port Data Out Set Register 0x10 32 write-only n 0x0 0x0 DOUTSET Data Out Set 0 16 write-only PA_DOUTTGL Port Data Out Toggle Register 0x18 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PA_MODEH Port Pin Mode High Register 0x8 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F PA_MODEL Port Pin Mode Low Register 0x4 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F PA_PINLOCKN Port Unlocked Pins Register 0x20 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PB_CTRL Port Control Register 0x24 32 read-write n 0x0 0x0 DRIVEMODE Drive Mode Select 0 2 read-write STANDARD 6 mA drive current 0x00000000 LOWEST 0.1 mA drive current 0x00000001 HIGH 20 mA drive current 0x00000002 LOW 1 mA drive current 0x00000003 PB_DIN Port Data In Register 0x40 32 read-only n 0x0 0x0 DIN Data In 0 16 read-only PB_DOUT Port Data Out Register 0x30 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PB_DOUTCLR Port Data Out Clear Register 0x38 32 write-only n 0x0 0x0 DOUTCLR Data Out Clear 0 16 write-only PB_DOUTSET Port Data Out Set Register 0x34 32 write-only n 0x0 0x0 DOUTSET Data Out Set 0 16 write-only PB_DOUTTGL Port Data Out Toggle Register 0x3C 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PB_MODEH Port Pin Mode High Register 0x2C 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F PB_MODEL Port Pin Mode Low Register 0x28 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F PB_PINLOCKN Port Unlocked Pins Register 0x44 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PC_CTRL Port Control Register 0x48 32 read-write n 0x0 0x0 DRIVEMODE Drive Mode Select 0 2 read-write STANDARD 6 mA drive current 0x00000000 LOWEST 0.1 mA drive current 0x00000001 HIGH 20 mA drive current 0x00000002 LOW 1 mA drive current 0x00000003 PC_DIN Port Data In Register 0x64 32 read-only n 0x0 0x0 DIN Data In 0 16 read-only PC_DOUT Port Data Out Register 0x54 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PC_DOUTCLR Port Data Out Clear Register 0x5C 32 write-only n 0x0 0x0 DOUTCLR Data Out Clear 0 16 write-only PC_DOUTSET Port Data Out Set Register 0x58 32 write-only n 0x0 0x0 DOUTSET Data Out Set 0 16 write-only PC_DOUTTGL Port Data Out Toggle Register 0x60 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PC_MODEH Port Pin Mode High Register 0x50 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F PC_MODEL Port Pin Mode Low Register 0x4C 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F PC_PINLOCKN Port Unlocked Pins Register 0x68 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PD_CTRL Port Control Register 0x6C 32 read-write n 0x0 0x0 DRIVEMODE Drive Mode Select 0 2 read-write STANDARD 6 mA drive current 0x00000000 LOWEST 0.1 mA drive current 0x00000001 HIGH 20 mA drive current 0x00000002 LOW 1 mA drive current 0x00000003 PD_DIN Port Data In Register 0x88 32 read-only n 0x0 0x0 DIN Data In 0 16 read-only PD_DOUT Port Data Out Register 0x78 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PD_DOUTCLR Port Data Out Clear Register 0x80 32 write-only n 0x0 0x0 DOUTCLR Data Out Clear 0 16 write-only PD_DOUTSET Port Data Out Set Register 0x7C 32 write-only n 0x0 0x0 DOUTSET Data Out Set 0 16 write-only PD_DOUTTGL Port Data Out Toggle Register 0x84 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PD_MODEH Port Pin Mode High Register 0x74 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F PD_MODEL Port Pin Mode Low Register 0x70 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F PD_PINLOCKN Port Unlocked Pins Register 0x8C 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PE_CTRL Port Control Register 0x90 32 read-write n 0x0 0x0 DRIVEMODE Drive Mode Select 0 2 read-write STANDARD 6 mA drive current 0x00000000 LOWEST 0.1 mA drive current 0x00000001 HIGH 20 mA drive current 0x00000002 LOW 1 mA drive current 0x00000003 PE_DIN Port Data In Register 0xAC 32 read-only n 0x0 0x0 DIN Data In 0 16 read-only PE_DOUT Port Data Out Register 0x9C 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PE_DOUTCLR Port Data Out Clear Register 0xA4 32 write-only n 0x0 0x0 DOUTCLR Data Out Clear 0 16 write-only PE_DOUTSET Port Data Out Set Register 0xA0 32 write-only n 0x0 0x0 DOUTSET Data Out Set 0 16 write-only PE_DOUTTGL Port Data Out Toggle Register 0xA8 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PE_MODEH Port Pin Mode High Register 0x98 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F PE_MODEL Port Pin Mode Low Register 0x94 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F PE_PINLOCKN Port Unlocked Pins Register 0xB0 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PF_CTRL Port Control Register 0xB4 32 read-write n 0x0 0x0 DRIVEMODE Drive Mode Select 0 2 read-write STANDARD 6 mA drive current 0x00000000 LOWEST 0.1 mA drive current 0x00000001 HIGH 20 mA drive current 0x00000002 LOW 1 mA drive current 0x00000003 PF_DIN Port Data In Register 0xD0 32 read-only n 0x0 0x0 DIN Data In 0 16 read-only PF_DOUT Port Data Out Register 0xC0 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PF_DOUTCLR Port Data Out Clear Register 0xC8 32 write-only n 0x0 0x0 DOUTCLR Data Out Clear 0 16 write-only PF_DOUTSET Port Data Out Set Register 0xC4 32 write-only n 0x0 0x0 DOUTSET Data Out Set 0 16 write-only PF_DOUTTGL Port Data Out Toggle Register 0xCC 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PF_MODEH Port Pin Mode High Register 0xBC 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F PF_MODEL Port Pin Mode Low Register 0xB8 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLDRIVE Push-pull output with drive-strength set by DRIVEMODE 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDDRIVE Open-drain output with drive-strength set by DRIVEMODE 0x0000000C WIREDANDDRIVEFILTER Open-drain output with filter and drive-strength set by DRIVEMODE 0x0000000D WIREDANDDRIVEPULLUP Open-drain output with pullup and drive-strength set by DRIVEMODE 0x0000000E WIREDANDDRIVEPULLUPFILTER Open-drain output with filter, pullup and drive-strength set by DRIVEMODE 0x0000000F PF_PINLOCKN Port Unlocked Pins Register 0xD4 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write ROUTE I/O Routing Register 0x120 32 read-write n 0x0 0x0 SWCLKPEN Serial Wire Clock Pin Enable 0 1 read-write SWDIOPEN Serial Wire Data Pin Enable 1 1 read-write SWLOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 SWOPEN Serial Wire Viewer Output Pin Enable 2 1 read-write I2C0 I2C0 I2C0 0x0 0x0 0x400 registers n I2C0 8 CLKDIV Clock Division Register 0x10 32 read-write n 0x0 0x0 DIV Clock Divider 0 9 read-write CMD Command Register 0x4 32 write-only n 0x0 0x0 ABORT Abort transmission 5 1 write-only ACK Send ACK 2 1 write-only CLEARPC Clear Pending Commands 7 1 write-only CLEARTX Clear TX 6 1 write-only CONT Continue transmission 4 1 write-only NACK Send NACK 3 1 write-only START Send start condition 0 1 write-only STOP Send stop condition 1 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 ARBDIS Arbitration Disable 5 1 read-write AUTOACK Automatic Acknowledge 2 1 read-write AUTOSE Automatic STOP when Empty 3 1 read-write AUTOSN Automatic STOP on NACK 4 1 read-write BITO Bus Idle Timeout 12 2 read-write OFF Timeout disabled 0x00000000 40PCC Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. 0x00000001 80PCC Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. 0x00000002 160PCC Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. 0x00000003 CLHR Clock Low High Ratio 8 2 read-write STANDARD The ratio between low period and high period counters (Nlow:Nhigh) is 4:4 0x00000000 ASYMMETRIC The ratio between low period and high period counters (Nlow:Nhigh) is 6:3 0x00000001 FAST The ratio between low period and high period counters (Nlow:Nhigh) is 11:6 0x00000002 CLTO Clock Low Timeout 16 3 read-write OFF Timeout disabled 0x00000000 40PCC Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. 0x00000001 80PCC Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. 0x00000002 160PCC Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. 0x00000003 320PPC Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout. 0x00000004 1024PPC Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout. 0x00000005 EN I2C Enable 0 1 read-write GCAMEN General Call Address Match Enable 6 1 read-write GIBITO Go Idle on Bus Idle Timeout 15 1 read-write SLAVE Addressable as Slave 1 1 read-write IEN Interrupt Enable Register 0x34 32 read-write n 0x0 0x0 ACK Acknowledge Received Interrupt Enable 6 1 read-write ADDR Address Interrupt Enable 2 1 read-write ARBLOST Arbitration Lost Interrupt Enable 9 1 read-write BITO Bus Idle Timeout Interrupt Enable 14 1 read-write BUSERR Bus Error Interrupt Enable 10 1 read-write BUSHOLD Bus Held Interrupt Enable 11 1 read-write CLTO Clock Low Interrupt Enable 15 1 read-write MSTOP MSTOP Interrupt Enable 8 1 read-write NACK Not Acknowledge Received Interrupt Enable 7 1 read-write RSTART Repeated START condition Interrupt Enable 1 1 read-write RXDATAV Receive Data Valid Interrupt Enable 5 1 read-write RXUF Receive Buffer Underflow Interrupt Enable 13 1 read-write SSTOP SSTOP Interrupt Enable 16 1 read-write START START Condition Interrupt Enable 0 1 read-write TXBL Transmit Buffer level Interrupt Enable 4 1 read-write TXC Transfer Completed Interrupt Enable 3 1 read-write TXOF Transmit Buffer Overflow Interrupt Enable 12 1 read-write IF Interrupt Flag Register 0x28 32 read-only n 0x0 0x0 ACK Acknowledge Received Interrupt Flag 6 1 read-only ADDR Address Interrupt Flag 2 1 read-only ARBLOST Arbitration Lost Interrupt Flag 9 1 read-only BITO Bus Idle Timeout Interrupt Flag 14 1 read-only BUSERR Bus Error Interrupt Flag 10 1 read-only BUSHOLD Bus Held Interrupt Flag 11 1 read-only CLTO Clock Low Timeout Interrupt Flag 15 1 read-only MSTOP Master STOP Condition Interrupt Flag 8 1 read-only NACK Not Acknowledge Received Interrupt Flag 7 1 read-only RSTART Repeated START condition Interrupt Flag 1 1 read-only RXDATAV Receive Data Valid Interrupt Flag 5 1 read-only RXUF Receive Buffer Underflow Interrupt Flag 13 1 read-only SSTOP Slave STOP condition Interrupt Flag 16 1 read-only START START condition Interrupt Flag 0 1 read-only TXBL Transmit Buffer Level Interrupt Flag 4 1 read-only TXC Transfer Completed Interrupt Flag 3 1 read-only TXOF Transmit Buffer Overflow Interrupt Flag 12 1 read-only IFC Interrupt Flag Clear Register 0x30 32 write-only n 0x0 0x0 ACK Clear Acknowledge Received Interrupt Flag 6 1 write-only ADDR Clear Address Interrupt Flag 2 1 write-only ARBLOST Clear Arbitration Lost Interrupt Flag 9 1 write-only BITO Clear Bus Idle Timeout Interrupt Flag 14 1 write-only BUSERR Clear Bus Error Interrupt Flag 10 1 write-only BUSHOLD Clear Bus Held Interrupt Flag 11 1 write-only CLTO Clear Clock Low Interrupt Flag 15 1 write-only MSTOP Clear MSTOP Interrupt Flag 8 1 write-only NACK Clear Not Acknowledge Received Interrupt Flag 7 1 write-only RSTART Clear Repeated START Interrupt Flag 1 1 write-only RXUF Clear Receive Buffer Underflow Interrupt Flag 13 1 write-only SSTOP Clear SSTOP Interrupt Flag 16 1 write-only START Clear START Interrupt Flag 0 1 write-only TXC Clear Transfer Completed Interrupt Flag 3 1 write-only TXOF Clear Transmit Buffer Overflow Interrupt Flag 12 1 write-only IFS Interrupt Flag Set Register 0x2C 32 write-only n 0x0 0x0 ACK Set Acknowledge Received Interrupt Flag 6 1 write-only ADDR Set Address Interrupt Flag 2 1 write-only ARBLOST Set Arbitration Lost Interrupt Flag 9 1 write-only BITO Set Bus Idle Timeout Interrupt Flag 14 1 write-only BUSERR Set Bus Error Interrupt Flag 10 1 write-only BUSHOLD Set Bus Held Interrupt Flag 11 1 write-only CLTO Set Clock Low Interrupt Flag 15 1 write-only MSTOP Set MSTOP Interrupt Flag 8 1 write-only NACK Set Not Acknowledge Received Interrupt Flag 7 1 write-only RSTART Set Repeated START Interrupt Flag 1 1 write-only RXUF Set Receive Buffer Underflow Interrupt Flag 13 1 write-only SSTOP Set SSTOP Interrupt Flag 16 1 write-only START Set START Interrupt Flag 0 1 write-only TXC Set Transfer Completed Interrupt Flag 3 1 write-only TXOF Set Transmit Buffer Overflow Interrupt Flag 12 1 write-only ROUTE I/O Routing Register 0x38 32 read-write n 0x0 0x0 LOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 SCLPEN SCL Pin Enable 1 1 read-write SDAPEN SDA Pin Enable 0 1 read-write RXDATA Receive Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAP Receive Buffer Data Peek Register 0x20 32 read-only n 0x0 0x0 RXDATAP RX Data Peek 0 8 read-only SADDR Slave Address Register 0x14 32 read-write n 0x0 0x0 ADDR Slave address 1 7 read-write SADDRMASK Slave Address Mask Register 0x18 32 read-write n 0x0 0x0 MASK Slave Address Mask 1 7 read-write STATE State Register 0x8 32 read-only n 0x0 0x0 BUSHOLD Bus Held 4 1 read-only BUSY Bus Busy 0 1 read-only MASTER Master 1 1 read-only NACKED Nack Received 3 1 read-only STATE Transmission State 5 3 read-only IDLE No transmission is being performed. 0x00000000 WAIT Waiting for idle. Will send a start condition as soon as the bus is idle. 0x00000001 START Start transmitted or received 0x00000002 ADDR Address transmitted or received 0x00000003 ADDRACK Address ack/nack transmitted or received 0x00000004 DATA Data transmitted or received 0x00000005 DATAACK Data ack/nack transmitted or received 0x00000006 TRANSMITTER Transmitter 2 1 read-only STATUS Status Register 0xC 32 read-only n 0x0 0x0 PABORT Pending abort 5 1 read-only PACK Pending ACK 2 1 read-only PCONT Pending continue 4 1 read-only PNACK Pending NACK 3 1 read-only PSTART Pending START 0 1 read-only PSTOP Pending STOP 1 1 read-only RXDATAV RX Data Valid 8 1 read-only TXBL TX Buffer Level 7 1 read-only TXC TX Complete 6 1 read-only TXDATA Transmit Buffer Data Register 0x24 32 write-only n 0x0 0x0 TXDATA TX Data 0 8 write-only LCD LCD LCD 0x0 0x0 0x400 registers n LCD 27 AREGA Animation Register A 0x14 32 read-write n 0x0 0x0 AREGA Animation Register A Data 0 8 read-write AREGB Animation Register B 0x18 32 read-write n 0x0 0x0 AREGB Animation Register B Data 0 8 read-write BACTRL Blink and Animation Control Register 0xC 32 read-write n 0x0 0x0 AEN Animation Enable 2 1 read-write ALOGSEL Animate Logic Function Select 7 1 read-write AREGASC Animate Register A Shift Control 3 2 read-write NOSHIFT No Shift operation on Animation Register A 0x00000000 SHIFTLEFT Animation Register A is shifted left 0x00000001 SHIFTRIGHT Animation Register A is shifted right 0x00000002 AREGBSC Animate Register B Shift Control 5 2 read-write NOSHIFT No Shift operation on Animation Register B 0x00000000 SHIFTLEFT Animation Register B is shifted left 0x00000001 SHIFTRIGHT Animation Register B is shifted right 0x00000002 BLANK Blank Display 1 1 read-write BLINKEN Blink Enable 0 1 read-write FCEN Frame Counter Enable 8 1 read-write FCPRESC Frame Counter Prescaler 16 2 read-write DIV1 CLKFC = CLKFRAME / 1 0x00000000 DIV2 CLKFC = CLKFRAME / 2 0x00000001 DIV4 CLKFC = CLKFRAME / 4 0x00000002 DIV8 CLKFC = CLKFRAME / 8 0x00000003 FCTOP Frame Counter Top Value 18 6 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 EN LCD Enable 0 1 read-write UDCTRL Update Data Control 1 2 read-write REGULAR The data transfer is controlled by SW. Transfer is performed as soon as possible 0x00000000 FCEVENT The data transfer is done at the next event triggered by the Frame Counter 0x00000001 FRAMESTART The data transfer is done continuously at every LCD frame start 0x00000002 DISPCTRL Display Control Register 0x4 32 read-write n 0x0 0x0 BIAS Bias Configuration 2 2 read-write STATIC Static 0x00000000 ONEHALF 1/2 Bias 0x00000001 ONETHIRD 1/3 Bias 0x00000002 CONCONF Contrast Configuration 15 1 read-write CONLEV Contrast Level 8 5 read-write MIN Minimum contrast 0x00000000 MAX Maximum contrast 0x0000001F MUX Mux Configuration 0 2 read-write STATIC Static 0x00000000 DUPLEX Duplex 0x00000001 TRIPLEX Triplex 0x00000002 QUADRUPLEX Quadruplex 0x00000003 VBLEV Voltage Boost Level 18 3 read-write LEVEL0 Minimum boost level 0x00000000 LEVEL1 0x00000001 LEVEL2 0x00000002 LEVEL3 0x00000003 LEVEL4 0x00000004 LEVEL5 0x00000005 LEVEL6 0x00000006 LEVEL7 Maximum boost level 0x00000007 VLCDSEL VLCD Selection 16 1 read-write WAVE Waveform Selection 4 1 read-write FREEZE Freeze Register 0x60 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x28 32 read-write n 0x0 0x0 FC Frame Counter Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0x1C 32 read-only n 0x0 0x0 FC Frame Counter Interrupt Flag 0 1 read-only IFC Interrupt Flag Clear Register 0x24 32 write-only n 0x0 0x0 FC Frame Counter Interrupt Flag Clear 0 1 write-only IFS Interrupt Flag Set Register 0x20 32 write-only n 0x0 0x0 FC Frame Counter Interrupt Flag Set 0 1 write-only SEGD0H Segment Data High Register 0 0x50 32 read-write n 0x0 0x0 SEGD0H COM0 Segment Data High 0 8 read-write SEGD0L Segment Data Low Register 0 0x40 32 read-write n 0x0 0x0 SEGD0L COM0 Segment Data Low 0 32 read-write SEGD1H Segment Data High Register 1 0x54 32 read-write n 0x0 0x0 SEGD1H COM1 Segment Data High 0 8 read-write SEGD1L Segment Data Low Register 1 0x44 32 read-write n 0x0 0x0 SEGD1L COM1 Segment Data Low 0 32 read-write SEGD2H Segment Data High Register 2 0x58 32 read-write n 0x0 0x0 SEGD2H COM2 Segment Data High 0 8 read-write SEGD2L Segment Data Low Register 2 0x48 32 read-write n 0x0 0x0 SEGD2L COM2 Segment Data Low 0 32 read-write SEGD3H Segment Data High Register 3 0x5C 32 read-write n 0x0 0x0 SEGD3H COM3 Segment Data High 0 8 read-write SEGD3L Segment Data Low Register 3 0x4C 32 read-write n 0x0 0x0 SEGD3L COM3 Segment Data Low 0 32 read-write SEGEN Segment Enable Register 0x8 32 read-write n 0x0 0x0 SEGEN Segment Enable 0 10 read-write STATUS Status Register 0x10 32 read-only n 0x0 0x0 ASTATE Current Animation State 0 4 read-only BLINK Blink State 8 1 read-only SYNCBUSY Synchronization Busy Register 0x64 32 read-only n 0x0 0x0 AREGA AREGA Register Busy 2 1 read-only AREGB AREGB Register Busy 3 1 read-only BACTRL BACTRL Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only SEGD0H SEGD0H Register Busy 8 1 read-only SEGD0L SEGD0L Register Busy 4 1 read-only SEGD1H SEGD1H Register Busy 9 1 read-only SEGD1L SEGD1L Register Busy 5 1 read-only SEGD2H SEGD2H Register Busy 10 1 read-only SEGD2L SEGD2L Register Busy 6 1 read-only SEGD3H SEGD3H Register Busy 11 1 read-only SEGD3L SEGD3L Register Busy 7 1 read-only LETIMER0 LETIMER0 LETIMER0 0x0 0x0 0x400 registers n LETIMER0 20 CMD Command Register 0x4 32 write-only n 0x0 0x0 CLEAR Clear LETIMER 2 1 write-only CTO0 Clear Toggle Output 0 3 1 write-only CTO1 Clear Toggle Output 1 4 1 write-only START Start LETIMER 0 1 write-only STOP Stop LETIMER 1 1 write-only CNT Counter Value Register 0xC 32 read-only n 0x0 0x0 CNT Counter Value 0 16 read-only COMP0 Compare Value Register 0 0x10 32 read-write n 0x0 0x0 COMP0 Compare Value 0 0 16 read-write COMP1 Compare Value Register 1 0x14 32 read-write n 0x0 0x0 COMP1 Compare Value 1 0 16 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 BUFTOP Buffered Top 8 1 read-write COMP0TOP Compare Value 0 Is Top Value 9 1 read-write DEBUGRUN Debug Mode Run Enable 12 1 read-write OPOL0 Output 0 Polarity 6 1 read-write OPOL1 Output 1 Polarity 7 1 read-write REPMODE Repeat Mode 0 2 read-write FREE When started, the LETIMER counts down until it is stopped by software. 0x00000000 ONESHOT The counter counts REP0 times. When REP0 reaches zero, the counter stops. 0x00000001 BUFFERED The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero. Else the counter stops 0x00000002 DOUBLE Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero 0x00000003 RTCC0TEN RTC Compare 0 Trigger Enable 10 1 read-write RTCC1TEN RTC Compare 1 Trigger Enable 11 1 read-write UFOA0 Underflow Output Action 0 2 2 read-write NONE LETn_O0 is held at its idle value as defined by OPOL0. 0x00000000 TOGGLE LETn_O0 is toggled on CNT underflow. 0x00000001 PULSE LETn_O0 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0. 0x00000002 PWM LETn_O0 is set idle on CNT underflow, and active on compare match with COMP1 0x00000003 UFOA1 Underflow Output Action 1 4 2 read-write NONE LETn_O1 is held at its idle value as defined by OPOL1. 0x00000000 TOGGLE LETn_O1 is toggled on CNT underflow. 0x00000001 PULSE LETn_O1 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1. 0x00000002 PWM LETn_O1 is set idle on CNT underflow, and active on compare match with COMP1 0x00000003 FREEZE Freeze Register 0x30 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x2C 32 read-write n 0x0 0x0 COMP0 Compare Match 0 Interrupt Enable 0 1 read-write COMP1 Compare Match 1 Interrupt Enable 1 1 read-write REP0 Repeat Counter 0 Interrupt Enable 3 1 read-write REP1 Repeat Counter 1 Interrupt Enable 4 1 read-write UF Underflow Interrupt Enable 2 1 read-write IF Interrupt Flag Register 0x20 32 read-only n 0x0 0x0 COMP0 Compare Match 0 Interrupt Flag 0 1 read-only COMP1 Compare Match 1 Interrupt Flag 1 1 read-only REP0 Repeat Counter 0 Interrupt Flag 3 1 read-only REP1 Repeat Counter 1 Interrupt Flag 4 1 read-only UF Underflow Interrupt Flag 2 1 read-only IFC Interrupt Flag Clear Register 0x28 32 write-only n 0x0 0x0 COMP0 Clear Compare Match 0 Interrupt Flag 0 1 write-only COMP1 Clear Compare Match 1 Interrupt Flag 1 1 write-only REP0 Clear Repeat Counter 0 Interrupt Flag 3 1 write-only REP1 Clear Repeat Counter 1 Interrupt Flag 4 1 write-only UF Clear Underflow Interrupt Flag 2 1 write-only IFS Interrupt Flag Set Register 0x24 32 write-only n 0x0 0x0 COMP0 Set Compare Match 0 Interrupt Flag 0 1 write-only COMP1 Set Compare Match 1 Interrupt Flag 1 1 write-only REP0 Set Repeat Counter 0 Interrupt Flag 3 1 write-only REP1 Set Repeat Counter 1 Interrupt Flag 4 1 write-only UF Set Underflow Interrupt Flag 2 1 write-only REP0 Repeat Counter Register 0 0x18 32 read-write n 0x0 0x0 REP0 Repeat Counter 0 0 8 read-write REP1 Repeat Counter Register 1 0x1C 32 read-write n 0x0 0x0 REP1 Repeat Counter 1 0 8 read-write ROUTE I/O Routing Register 0x40 32 read-write n 0x0 0x0 LOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 OUT0PEN Output 0 Pin Enable 0 1 read-write OUT1PEN Output 1 Pin Enable 1 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 RUNNING LETIMER Running 0 1 read-only SYNCBUSY Synchronization Busy Register 0x34 32 read-only n 0x0 0x0 CMD CMD Register Busy 1 1 read-only COMP0 COMP0 Register Busy 2 1 read-only COMP1 COMP1 Register Busy 3 1 read-only CTRL CTRL Register Busy 0 1 read-only REP0 REP0 Register Busy 4 1 read-only REP1 REP1 Register Busy 5 1 read-only LEUART0 LEUART0 LEUART0 0x0 0x0 0x400 registers n LEUART0 18 CLKDIV Clock Control Register 0xC 32 read-write n 0x0 0x0 DIV Fractional Clock Divider 3 12 read-write CMD Command Register 0x4 32 write-only n 0x0 0x0 CLEARRX Clear RX 7 1 write-only CLEARTX Clear TX 6 1 write-only RXBLOCKDIS Receiver Block Disable 5 1 write-only RXBLOCKEN Receiver Block Enable 4 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOTRI Automatic Transmitter Tristate 0 1 read-write BIT8DV Bit 8 Default Value 11 1 read-write DATABITS Data-Bit Mode 1 1 read-write ERRSDMA Clear RX DMA On Error 6 1 read-write INV Invert Input And Output 5 1 read-write LOOPBK Loopback Enable 7 1 read-write MPAB Multi-Processor Address-Bit 10 1 read-write MPM Multi-Processor Mode 9 1 read-write PARITY Parity-Bit Mode 2 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 RXDMAWU RX DMA Wakeup 12 1 read-write SFUBRX Start-Frame UnBlock RX 8 1 read-write STOPBITS Stop-Bit Mode 4 1 read-write TXDELAY TX Delay Transmission 14 2 read-write NONE Frames are transmitted immediately 0x00000000 SINGLE Transmission of new frames are delayed by a single baud period 0x00000001 DOUBLE Transmission of new frames are delayed by two baud periods 0x00000002 TRIPLE Transmission of new frames are delayed by three baud periods 0x00000003 TXDMAWU TX DMA Wakeup 13 1 read-write FREEZE Freeze Register 0x40 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x38 32 read-write n 0x0 0x0 FERR Framing Error Interrupt Enable 7 1 read-write MPAF Multi-Processor Address Frame Interrupt Enable 8 1 read-write PERR Parity Error Interrupt Enable 6 1 read-write RXDATAV RX Data Valid Interrupt Enable 2 1 read-write RXOF RX Overflow Interrupt Enable 3 1 read-write RXUF RX Underflow Interrupt Enable 4 1 read-write SIGF Signal Frame Interrupt Enable 10 1 read-write STARTF Start Frame Interrupt Enable 9 1 read-write TXBL TX Buffer Level Interrupt Enable 1 1 read-write TXC TX Complete Interrupt Enable 0 1 read-write TXOF TX Overflow Interrupt Enable 5 1 read-write IF Interrupt Flag Register 0x2C 32 read-only n 0x0 0x0 FERR Framing Error Interrupt Flag 7 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 8 1 read-only PERR Parity Error Interrupt Flag 6 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXOF RX Overflow Interrupt Flag 3 1 read-only RXUF RX Underflow Interrupt Flag 4 1 read-only SIGF Signal Frame Interrupt Flag 10 1 read-only STARTF Start Frame Interrupt Flag 9 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXOF TX Overflow Interrupt Flag 5 1 read-only IFC Interrupt Flag Clear Register 0x34 32 write-only n 0x0 0x0 FERR Clear Framing Error Interrupt Flag 7 1 write-only MPAF Clear Multi-Processor Address Frame Interrupt Flag 8 1 write-only PERR Clear Parity Error Interrupt Flag 6 1 write-only RXOF Clear RX Overflow Interrupt Flag 3 1 write-only RXUF Clear RX Underflow Interrupt Flag 4 1 write-only SIGF Clear Signal-Frame Interrupt Flag 10 1 write-only STARTF Clear Start-Frame Interrupt Flag 9 1 write-only TXC Clear TX Complete Interrupt Flag 0 1 write-only TXOF Clear TX Overflow Interrupt Flag 5 1 write-only IFS Interrupt Flag Set Register 0x30 32 write-only n 0x0 0x0 FERR Set Framing Error Interrupt Flag 7 1 write-only MPAF Set Multi-Processor Address Frame Interrupt Flag 8 1 write-only PERR Set Parity Error Interrupt Flag 6 1 write-only RXOF Set RX Overflow Interrupt Flag 3 1 write-only RXUF Set RX Underflow Interrupt Flag 4 1 write-only SIGF Set Signal Frame Interrupt Flag 10 1 write-only STARTF Set Start Frame Interrupt Flag 9 1 write-only TXC Set TX Complete Interrupt Flag 0 1 write-only TXOF Set TX Overflow Interrupt Flag 5 1 write-only PULSECTRL Pulse Control Register 0x3C 32 read-write n 0x0 0x0 PULSEEN Pulse Generator/Extender Enable 4 1 read-write PULSEFILT Pulse Filter 5 1 read-write PULSEW Pulse Width 0 4 read-write ROUTE I/O Routing Register 0x54 32 read-write n 0x0 0x0 LOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA Receive Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX Receive Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Receive Data Framing Error 15 1 read-only PERR Receive Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP Receive Buffer Data Extended Peek Register 0x20 32 read-only n 0x0 0x0 FERRP Receive Data Framing Error Peek 15 1 read-only PERRP Receive Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only SIGFRAME Signal Frame Register 0x14 32 read-write n 0x0 0x0 SIGFRAME Signal Frame 0 9 read-write STARTFRAME Start Frame Register 0x10 32 read-write n 0x0 0x0 STARTFRAME Start Frame 0 9 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 RXBLOCK Block Incoming Data 2 1 read-only RXDATAV RX Data Valid 5 1 read-only RXENS Receiver Enable Status 0 1 read-only TXBL TX Buffer Level 4 1 read-only TXC TX Complete 3 1 read-only TXENS Transmitter Enable Status 1 1 read-only SYNCBUSY Synchronization Busy Register 0x44 32 read-only n 0x0 0x0 CLKDIV CLKDIV Register Busy 2 1 read-only CMD CMD Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only PULSECTRL PULSECTRL Register Busy 7 1 read-only SIGFRAME SIGFRAME Register Busy 4 1 read-only STARTFRAME STARTFRAME Register Busy 3 1 read-only TXDATA TXDATA Register Busy 6 1 read-only TXDATAX TXDATAX Register Busy 5 1 read-only TXDATA Transmit Buffer Data Register 0x28 32 write-only n 0x0 0x0 TXDATA TX Data 0 8 write-only TXDATAX Transmit Buffer Data Extended Register 0x24 32 write-only n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 write-only TXBREAK Transmit Data As Break 13 1 write-only TXDATA TX Data 0 9 write-only TXDISAT Disable TX After Transmission 14 1 write-only LEUART1 LEUART1 LEUART1 0x0 0x0 0x400 registers n LEUART1 19 CLKDIV Clock Control Register 0xC 32 read-write n 0x0 0x0 DIV Fractional Clock Divider 3 12 read-write CMD Command Register 0x4 32 write-only n 0x0 0x0 CLEARRX Clear RX 7 1 write-only CLEARTX Clear TX 6 1 write-only RXBLOCKDIS Receiver Block Disable 5 1 write-only RXBLOCKEN Receiver Block Enable 4 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOTRI Automatic Transmitter Tristate 0 1 read-write BIT8DV Bit 8 Default Value 11 1 read-write DATABITS Data-Bit Mode 1 1 read-write ERRSDMA Clear RX DMA On Error 6 1 read-write INV Invert Input And Output 5 1 read-write LOOPBK Loopback Enable 7 1 read-write MPAB Multi-Processor Address-Bit 10 1 read-write MPM Multi-Processor Mode 9 1 read-write PARITY Parity-Bit Mode 2 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 RXDMAWU RX DMA Wakeup 12 1 read-write SFUBRX Start-Frame UnBlock RX 8 1 read-write STOPBITS Stop-Bit Mode 4 1 read-write TXDELAY TX Delay Transmission 14 2 read-write NONE Frames are transmitted immediately 0x00000000 SINGLE Transmission of new frames are delayed by a single baud period 0x00000001 DOUBLE Transmission of new frames are delayed by two baud periods 0x00000002 TRIPLE Transmission of new frames are delayed by three baud periods 0x00000003 TXDMAWU TX DMA Wakeup 13 1 read-write FREEZE Freeze Register 0x40 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x38 32 read-write n 0x0 0x0 FERR Framing Error Interrupt Enable 7 1 read-write MPAF Multi-Processor Address Frame Interrupt Enable 8 1 read-write PERR Parity Error Interrupt Enable 6 1 read-write RXDATAV RX Data Valid Interrupt Enable 2 1 read-write RXOF RX Overflow Interrupt Enable 3 1 read-write RXUF RX Underflow Interrupt Enable 4 1 read-write SIGF Signal Frame Interrupt Enable 10 1 read-write STARTF Start Frame Interrupt Enable 9 1 read-write TXBL TX Buffer Level Interrupt Enable 1 1 read-write TXC TX Complete Interrupt Enable 0 1 read-write TXOF TX Overflow Interrupt Enable 5 1 read-write IF Interrupt Flag Register 0x2C 32 read-only n 0x0 0x0 FERR Framing Error Interrupt Flag 7 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 8 1 read-only PERR Parity Error Interrupt Flag 6 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXOF RX Overflow Interrupt Flag 3 1 read-only RXUF RX Underflow Interrupt Flag 4 1 read-only SIGF Signal Frame Interrupt Flag 10 1 read-only STARTF Start Frame Interrupt Flag 9 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXOF TX Overflow Interrupt Flag 5 1 read-only IFC Interrupt Flag Clear Register 0x34 32 write-only n 0x0 0x0 FERR Clear Framing Error Interrupt Flag 7 1 write-only MPAF Clear Multi-Processor Address Frame Interrupt Flag 8 1 write-only PERR Clear Parity Error Interrupt Flag 6 1 write-only RXOF Clear RX Overflow Interrupt Flag 3 1 write-only RXUF Clear RX Underflow Interrupt Flag 4 1 write-only SIGF Clear Signal-Frame Interrupt Flag 10 1 write-only STARTF Clear Start-Frame Interrupt Flag 9 1 write-only TXC Clear TX Complete Interrupt Flag 0 1 write-only TXOF Clear TX Overflow Interrupt Flag 5 1 write-only IFS Interrupt Flag Set Register 0x30 32 write-only n 0x0 0x0 FERR Set Framing Error Interrupt Flag 7 1 write-only MPAF Set Multi-Processor Address Frame Interrupt Flag 8 1 write-only PERR Set Parity Error Interrupt Flag 6 1 write-only RXOF Set RX Overflow Interrupt Flag 3 1 write-only RXUF Set RX Underflow Interrupt Flag 4 1 write-only SIGF Set Signal Frame Interrupt Flag 10 1 write-only STARTF Set Start Frame Interrupt Flag 9 1 write-only TXC Set TX Complete Interrupt Flag 0 1 write-only TXOF Set TX Overflow Interrupt Flag 5 1 write-only PULSECTRL Pulse Control Register 0x3C 32 read-write n 0x0 0x0 PULSEEN Pulse Generator/Extender Enable 4 1 read-write PULSEFILT Pulse Filter 5 1 read-write PULSEW Pulse Width 0 4 read-write ROUTE I/O Routing Register 0x54 32 read-write n 0x0 0x0 LOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA Receive Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX Receive Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Receive Data Framing Error 15 1 read-only PERR Receive Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP Receive Buffer Data Extended Peek Register 0x20 32 read-only n 0x0 0x0 FERRP Receive Data Framing Error Peek 15 1 read-only PERRP Receive Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only SIGFRAME Signal Frame Register 0x14 32 read-write n 0x0 0x0 SIGFRAME Signal Frame 0 9 read-write STARTFRAME Start Frame Register 0x10 32 read-write n 0x0 0x0 STARTFRAME Start Frame 0 9 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 RXBLOCK Block Incoming Data 2 1 read-only RXDATAV RX Data Valid 5 1 read-only RXENS Receiver Enable Status 0 1 read-only TXBL TX Buffer Level 4 1 read-only TXC TX Complete 3 1 read-only TXENS Transmitter Enable Status 1 1 read-only SYNCBUSY Synchronization Busy Register 0x44 32 read-only n 0x0 0x0 CLKDIV CLKDIV Register Busy 2 1 read-only CMD CMD Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only PULSECTRL PULSECTRL Register Busy 7 1 read-only SIGFRAME SIGFRAME Register Busy 4 1 read-only STARTFRAME STARTFRAME Register Busy 3 1 read-only TXDATA TXDATA Register Busy 6 1 read-only TXDATAX TXDATAX Register Busy 5 1 read-only TXDATA Transmit Buffer Data Register 0x28 32 write-only n 0x0 0x0 TXDATA TX Data 0 8 write-only TXDATAX Transmit Buffer Data Extended Register 0x24 32 write-only n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 write-only TXBREAK Transmit Data As Break 13 1 write-only TXDATA TX Data 0 9 write-only TXDISAT Disable TX After Transmission 14 1 write-only MSC MSC MSC 0x0 0x0 0x400 registers n MSC 28 ADDRB Page Erase/Write Address Buffer 0x10 32 read-write n 0x0 0x0 ADDRB Page Erase or Write Address Buffer 0 32 read-write CTRL Memory System Control Register 0x0 32 read-write n 0x0 0x0 BUSFAULT Bus Fault Response Enable 0 1 read-write IEN Interrupt Enable Register 0x38 32 read-write n 0x0 0x0 ERASE Erase Done Interrupt Enable 0 1 read-write WRITE Write Done Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0x2C 32 read-only n 0x0 0x0 ERASE Erase Done Interrupt Read Flag 0 1 read-only WRITE Write Done Interrupt Read Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x34 32 write-only n 0x0 0x0 ERASE Erase Done Interrupt Clear 0 1 write-only WRITE Write Done Interrupt Clear 1 1 write-only IFS Interrupt Flag Set Register 0x30 32 write-only n 0x0 0x0 ERASE Erase Done Interrupt Set 0 1 write-only WRITE Write Done Interrupt Set 1 1 write-only LOCK Configuration Lock Register 0x3C 32 read-write n 0x0 0x0 LOCKKEY Configuration Lock 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 READCTRL Read Control Register 0x4 32 read-write n 0x0 0x0 MODE Read Mode 0 3 read-write WS0 Zero wait-states inserted in fetch or read transfers. 0x00000000 WS1 One wait-state inserted for each fetch or read transfer. This mode is required for a core frequency above 16 MHz. 0x00000001 WS0SCBTP Zero wait-states inserted with the Suppressed Conditional Branch Target Prefetch (SCBTP) function enabled. SCBTP saves energy by delaying the Cortex' conditional branch target prefetches until the conditional branch instruction is in the execute stage. When the instruction reaches this stage, the evaluation of the branch condition is completed and the core does not perform a speculative prefetch of both the branch target address and the next sequential address. With the SCBTP function enabled, one instruction fetch is saved for each branch not taken, with a negligible performance penalty. 0x00000002 WS1SCBTP One wait-state access with SCBTP enabled. 0x00000003 STATUS Status Register 0x1C 32 read-only n 0x0 0x0 BUSY Erase/Write Busy 0 1 read-only ERASEABORTED The Current Flash Erase Operation Aborted 5 1 read-only INVADDR Invalid Write Address or Erase Page 2 1 read-only LOCKED Access Locked 1 1 read-only WDATAREADY WDATA Write Ready 3 1 read-only WORDTIMEOUT Flash Write Word Timeout 4 1 read-only WDATA Write Data Register 0x18 32 read-write n 0x0 0x0 WDATA Write Data 0 32 read-write WRITECMD Write Command Register 0xC 32 write-only n 0x0 0x0 ERASEPAGE Erase Page 1 1 write-only LADDRIM Load MSC_ADDRB into ADDR 0 1 write-only WRITEEND End Write Mode 2 1 write-only WRITEONCE Word Write-Once Trigger 3 1 write-only WRITETRIG Word Write Sequence Trigger 4 1 write-only WRITECTRL Write Control Register 0x8 32 read-write n 0x0 0x0 IRQERASEABORT Abort Page Erase on Interrupt 1 1 read-write WREN Enable Write/Erase Controller 0 1 read-write PCNT0 PCNT0 PCNT0 0x0 0x0 0x400 registers n PCNT0 21 CMD Command Register 0x4 32 write-only n 0x0 0x0 LCNTIM Load CNT Immediately 0 1 write-only LTOPBIM Load TOPB Immediately 1 1 write-only CNT Counter Value Register 0xC 32 read-only n 0x0 0x0 CNT Counter Value 0 16 read-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 CNTDIR Non-Quadrature Mode Counter Direction Control 2 1 read-write EDGE Edge Select 3 1 read-write FILT Enable Digital Pulse Width Filter 4 1 read-write MODE Mode Select 0 2 read-write DISABLE The module is disabled. 0x00000000 OVSSINGLE Single input LFACLK oversampling mode (available in EM0-EM2). 0x00000001 EXTCLKSINGLE Externally clocked single input counter mode (available in EM0-EM3). 0x00000002 EXTCLKQUAD Externally clocked quadrature decoder mode (available in EM0-EM3). 0x00000003 RSTEN Enable PCNT Clock Domain Reset 5 1 read-write FREEZE Freeze Register 0x2C 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x24 32 read-write n 0x0 0x0 DIRCNG Direction Change Detect Interrupt Enable 2 1 read-write OF Overflow Interrupt Enable 1 1 read-write UF Underflow Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0x18 32 read-only n 0x0 0x0 DIRCNG Direction Change Detect Interrupt Flag 2 1 read-only OF Overflow Interrupt Read Flag 1 1 read-only UF Underflow Interrupt Read Flag 0 1 read-only IFC Interrupt Flag Clear Register 0x20 32 write-only n 0x0 0x0 DIRCNG Direction Change Detect Interrupt Clear 2 1 write-only OF Overflow Interrupt Clear 1 1 write-only UF Underflow Interrupt Clear 0 1 write-only IFS Interrupt Flag Set Register 0x1C 32 write-only n 0x0 0x0 DIRCNG Direction Change Detect Interrupt Set 2 1 write-only OF Overflow Interrupt Set 1 1 write-only UF Underflow interrupt set 0 1 write-only ROUTE I/O Routing Register 0x28 32 read-write n 0x0 0x0 LOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 STATUS Status Register 0x8 32 read-only n 0x0 0x0 DIR Current Counter Direction 0 1 read-only SYNCBUSY Synchronization Busy Register 0x30 32 read-only n 0x0 0x0 CMD CMD Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only TOPB TOPB Register Busy 2 1 read-only TOP Top Value Register 0x10 32 read-only n 0x0 0x0 TOP Counter Top Value 0 16 read-only TOPB Top Value Buffer Register 0x14 32 read-write n 0x0 0x0 TOPB Counter Top Buffer 0 16 read-write PCNT1 PCNT1 PCNT1 0x0 0x0 0x400 registers n PCNT1 22 CMD Command Register 0x4 32 write-only n 0x0 0x0 LCNTIM Load CNT Immediately 0 1 write-only LTOPBIM Load TOPB Immediately 1 1 write-only CNT Counter Value Register 0xC 32 read-only n 0x0 0x0 CNT Counter Value 0 16 read-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 CNTDIR Non-Quadrature Mode Counter Direction Control 2 1 read-write EDGE Edge Select 3 1 read-write FILT Enable Digital Pulse Width Filter 4 1 read-write MODE Mode Select 0 2 read-write DISABLE The module is disabled. 0x00000000 OVSSINGLE Single input LFACLK oversampling mode (available in EM0-EM2). 0x00000001 EXTCLKSINGLE Externally clocked single input counter mode (available in EM0-EM3). 0x00000002 EXTCLKQUAD Externally clocked quadrature decoder mode (available in EM0-EM3). 0x00000003 RSTEN Enable PCNT Clock Domain Reset 5 1 read-write FREEZE Freeze Register 0x2C 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x24 32 read-write n 0x0 0x0 DIRCNG Direction Change Detect Interrupt Enable 2 1 read-write OF Overflow Interrupt Enable 1 1 read-write UF Underflow Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0x18 32 read-only n 0x0 0x0 DIRCNG Direction Change Detect Interrupt Flag 2 1 read-only OF Overflow Interrupt Read Flag 1 1 read-only UF Underflow Interrupt Read Flag 0 1 read-only IFC Interrupt Flag Clear Register 0x20 32 write-only n 0x0 0x0 DIRCNG Direction Change Detect Interrupt Clear 2 1 write-only OF Overflow Interrupt Clear 1 1 write-only UF Underflow Interrupt Clear 0 1 write-only IFS Interrupt Flag Set Register 0x1C 32 write-only n 0x0 0x0 DIRCNG Direction Change Detect Interrupt Set 2 1 write-only OF Overflow Interrupt Set 1 1 write-only UF Underflow interrupt set 0 1 write-only ROUTE I/O Routing Register 0x28 32 read-write n 0x0 0x0 LOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 STATUS Status Register 0x8 32 read-only n 0x0 0x0 DIR Current Counter Direction 0 1 read-only SYNCBUSY Synchronization Busy Register 0x30 32 read-only n 0x0 0x0 CMD CMD Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only TOPB TOPB Register Busy 2 1 read-only TOP Top Value Register 0x10 32 read-only n 0x0 0x0 TOP Counter Top Value 0 16 read-only TOPB Top Value Buffer Register 0x14 32 read-write n 0x0 0x0 TOPB Counter Top Buffer 0 16 read-write PCNT2 PCNT2 PCNT2 0x0 0x0 0x400 registers n PCNT2 23 CMD Command Register 0x4 32 write-only n 0x0 0x0 LCNTIM Load CNT Immediately 0 1 write-only LTOPBIM Load TOPB Immediately 1 1 write-only CNT Counter Value Register 0xC 32 read-only n 0x0 0x0 CNT Counter Value 0 16 read-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 CNTDIR Non-Quadrature Mode Counter Direction Control 2 1 read-write EDGE Edge Select 3 1 read-write FILT Enable Digital Pulse Width Filter 4 1 read-write MODE Mode Select 0 2 read-write DISABLE The module is disabled. 0x00000000 OVSSINGLE Single input LFACLK oversampling mode (available in EM0-EM2). 0x00000001 EXTCLKSINGLE Externally clocked single input counter mode (available in EM0-EM3). 0x00000002 EXTCLKQUAD Externally clocked quadrature decoder mode (available in EM0-EM3). 0x00000003 RSTEN Enable PCNT Clock Domain Reset 5 1 read-write FREEZE Freeze Register 0x2C 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x24 32 read-write n 0x0 0x0 DIRCNG Direction Change Detect Interrupt Enable 2 1 read-write OF Overflow Interrupt Enable 1 1 read-write UF Underflow Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0x18 32 read-only n 0x0 0x0 DIRCNG Direction Change Detect Interrupt Flag 2 1 read-only OF Overflow Interrupt Read Flag 1 1 read-only UF Underflow Interrupt Read Flag 0 1 read-only IFC Interrupt Flag Clear Register 0x20 32 write-only n 0x0 0x0 DIRCNG Direction Change Detect Interrupt Clear 2 1 write-only OF Overflow Interrupt Clear 1 1 write-only UF Underflow Interrupt Clear 0 1 write-only IFS Interrupt Flag Set Register 0x1C 32 write-only n 0x0 0x0 DIRCNG Direction Change Detect Interrupt Set 2 1 write-only OF Overflow Interrupt Set 1 1 write-only UF Underflow interrupt set 0 1 write-only ROUTE I/O Routing Register 0x28 32 read-write n 0x0 0x0 LOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 STATUS Status Register 0x8 32 read-only n 0x0 0x0 DIR Current Counter Direction 0 1 read-only SYNCBUSY Synchronization Busy Register 0x30 32 read-only n 0x0 0x0 CMD CMD Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only TOPB TOPB Register Busy 2 1 read-only TOP Top Value Register 0x10 32 read-only n 0x0 0x0 TOP Counter Top Value 0 16 read-only TOPB Top Value Buffer Register 0x14 32 read-write n 0x0 0x0 TOPB Counter Top Buffer 0 16 read-write PRS PRS PRS 0x0 0x0 0x400 registers n CH0_CTRL Channel Control Register 0x10 32 read-write n 0x0 0x0 EDSEL Edge Detect Select 24 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 VCMP Voltage Comparator 0x00000001 ACMP0 Analog Comparator 0 0x00000002 ACMP1 Analog Comparator 1 0x00000003 DAC0 Digital to Analog Converter 0 0x00000006 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000012 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D TIMER2 Timer 2 0x0000001E RTC Real-Time Counter 0x00000028 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 CH1_CTRL Channel Control Register 0x14 32 read-write n 0x0 0x0 EDSEL Edge Detect Select 24 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 VCMP Voltage Comparator 0x00000001 ACMP0 Analog Comparator 0 0x00000002 ACMP1 Analog Comparator 1 0x00000003 DAC0 Digital to Analog Converter 0 0x00000006 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000012 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D TIMER2 Timer 2 0x0000001E RTC Real-Time Counter 0x00000028 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 CH2_CTRL Channel Control Register 0x18 32 read-write n 0x0 0x0 EDSEL Edge Detect Select 24 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 VCMP Voltage Comparator 0x00000001 ACMP0 Analog Comparator 0 0x00000002 ACMP1 Analog Comparator 1 0x00000003 DAC0 Digital to Analog Converter 0 0x00000006 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000012 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D TIMER2 Timer 2 0x0000001E RTC Real-Time Counter 0x00000028 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 CH3_CTRL Channel Control Register 0x1C 32 read-write n 0x0 0x0 EDSEL Edge Detect Select 24 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 VCMP Voltage Comparator 0x00000001 ACMP0 Analog Comparator 0 0x00000002 ACMP1 Analog Comparator 1 0x00000003 DAC0 Digital to Analog Converter 0 0x00000006 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000012 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D TIMER2 Timer 2 0x0000001E RTC Real-Time Counter 0x00000028 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 CH4_CTRL Channel Control Register 0x20 32 read-write n 0x0 0x0 EDSEL Edge Detect Select 24 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 VCMP Voltage Comparator 0x00000001 ACMP0 Analog Comparator 0 0x00000002 ACMP1 Analog Comparator 1 0x00000003 DAC0 Digital to Analog Converter 0 0x00000006 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000012 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D TIMER2 Timer 2 0x0000001E RTC Real-Time Counter 0x00000028 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 CH5_CTRL Channel Control Register 0x24 32 read-write n 0x0 0x0 EDSEL Edge Detect Select 24 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 VCMP Voltage Comparator 0x00000001 ACMP0 Analog Comparator 0 0x00000002 ACMP1 Analog Comparator 1 0x00000003 DAC0 Digital to Analog Converter 0 0x00000006 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000012 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D TIMER2 Timer 2 0x0000001E RTC Real-Time Counter 0x00000028 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 CH6_CTRL Channel Control Register 0x28 32 read-write n 0x0 0x0 EDSEL Edge Detect Select 24 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 VCMP Voltage Comparator 0x00000001 ACMP0 Analog Comparator 0 0x00000002 ACMP1 Analog Comparator 1 0x00000003 DAC0 Digital to Analog Converter 0 0x00000006 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000012 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D TIMER2 Timer 2 0x0000001E RTC Real-Time Counter 0x00000028 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 CH7_CTRL Channel Control Register 0x2C 32 read-write n 0x0 0x0 EDSEL Edge Detect Select 24 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 VCMP Voltage Comparator 0x00000001 ACMP0 Analog Comparator 0 0x00000002 ACMP1 Analog Comparator 1 0x00000003 DAC0 Digital to Analog Converter 0 0x00000006 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000012 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D TIMER2 Timer 2 0x0000001E RTC Real-Time Counter 0x00000028 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 SWLEVEL Software Level Register 0x4 32 read-write n 0x0 0x0 CH0LEVEL Channel 0 Software Level 0 1 read-write CH1LEVEL Channel 1 Software Level 1 1 read-write CH2LEVEL Channel 2 Software Level 2 1 read-write CH3LEVEL Channel 3 Software Level 3 1 read-write CH4LEVEL Channel 4 Software Level 4 1 read-write CH5LEVEL Channel 5 Software Level 5 1 read-write CH6LEVEL Channel 6 Software Level 6 1 read-write CH7LEVEL Channel 7 Software Level 7 1 read-write SWPULSE Software Pulse Register 0x0 32 write-only n 0x0 0x0 CH0PULSE Channel 0 Pulse Generation 0 1 write-only CH1PULSE Channel 1 Pulse Generation 1 1 write-only CH2PULSE Channel 2 Pulse Generation 2 1 write-only CH3PULSE Channel 3 Pulse Generation 3 1 write-only CH4PULSE Channel 4 Pulse Generation 4 1 write-only CH5PULSE Channel 5 Pulse Generation 5 1 write-only CH6PULSE Channel 6 Pulse Generation 6 1 write-only CH7PULSE Channel 7 Pulse Generation 7 1 write-only RMU RMU RMU 0x0 0x0 0x400 registers n CMD Command Register 0x8 32 write-only n 0x0 0x0 RCCLR Reset Cause Clear 0 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 LOCKUPRDIS Lockup Reset Disable 0 1 read-write RSTCAUSE Reset Cause Register 0x4 32 read-only n 0x0 0x0 BODREGRST Brown Out Detector Regulated Domain Reset 2 1 read-only BODUNREGRST Brown Out Detector Unregulated Domain Reset 1 1 read-only EXTRST External Pin Reset 3 1 read-only LOCKUPRST LOCKUP Reset 5 1 read-only PORST Power On Reset 0 1 read-only SYSREQRST System Request Reset 6 1 read-only WDOGRST Watchdog Reset 4 1 read-only RTC RTC RTC 0x0 0x0 0x400 registers n RTC 24 CNT Counter Value Register 0x4 32 read-only n 0x0 0x0 CNT Counter Value 0 24 read-only COMP0 Compare Value Register 0 0x8 32 read-write n 0x0 0x0 COMP0 Compare Value 0 0 24 read-write COMP1 Compare Value Register 1 0xC 32 read-write n 0x0 0x0 COMP1 Compare Value 1 0 24 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 COMP0TOP Compare Channel 0 is Top Value 2 1 read-write DEBUGRUN Debug Mode Run Enable 1 1 read-write EN RTC Enable 0 1 read-write FREEZE Freeze Register 0x20 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x1C 32 read-write n 0x0 0x0 COMP0 Compare Match 0 Interrupt Enable 1 1 read-write COMP1 Compare Match 1 Interrupt Enable 2 1 read-write OF Overflow Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0x10 32 read-only n 0x0 0x0 COMP0 Compare Match 0 Interrupt Flag 1 1 read-only COMP1 Compare Match 1 Interrupt Flag 2 1 read-only OF Overflow Interrupt Flag 0 1 read-only IFC Interrupt Flag Clear Register 0x18 32 write-only n 0x0 0x0 COMP0 Clear Compare match 0 Interrupt Flag 1 1 write-only COMP1 Clear Compare match 1 Interrupt Flag 2 1 write-only OF Clear Overflow Interrupt Flag 0 1 write-only IFS Interrupt Flag Set Register 0x14 32 write-only n 0x0 0x0 COMP0 Set Compare match 0 Interrupt Flag 1 1 write-only COMP1 Set Compare match 1 Interrupt Flag 2 1 write-only OF Set Overflow Interrupt Flag 0 1 write-only SYNCBUSY Synchronization Busy Register 0x24 32 read-only n 0x0 0x0 COMP0 COMP0 Register Busy 1 1 read-only COMP1 COMP1 Register Busy 2 1 read-only CTRL CTRL Register Busy 0 1 read-only TIMER0 TIMER0 TIMER0 0x0 0x0 0x400 registers n TIMER0 2 CC0_CCV CC Channel Value Register 0x34 32 read-write n 0x0 0x0 CCV CC Channel Value 0 16 read-write CC0_CCVB CC Channel Buffer Register 0x3C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 16 read-write CC0_CCVP CC Channel Value Peek Register 0x38 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 16 read-only CC0_CTRL CC Channel Control Register 0x30 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 21 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse, interrupt flag and DMA request set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse, interrupt flag and DMA request set on every second capture 0x00000001 RISING PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 20 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 3 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 CC1_CCV CC Channel Value Register 0x44 32 read-write n 0x0 0x0 CCV CC Channel Value 0 16 read-write CC1_CCVB CC Channel Buffer Register 0x4C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 16 read-write CC1_CCVP CC Channel Value Peek Register 0x48 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 16 read-only CC1_CTRL CC Channel Control Register 0x40 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 21 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse, interrupt flag and DMA request set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse, interrupt flag and DMA request set on every second capture 0x00000001 RISING PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 20 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 3 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 CC2_CCV CC Channel Value Register 0x54 32 read-write n 0x0 0x0 CCV CC Channel Value 0 16 read-write CC2_CCVB CC Channel Buffer Register 0x5C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 16 read-write CC2_CCVP CC Channel Value Peek Register 0x58 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 16 read-only CC2_CTRL CC Channel Control Register 0x50 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 21 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse, interrupt flag and DMA request set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse, interrupt flag and DMA request set on every second capture 0x00000001 RISING PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 20 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 3 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 16 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write DTCTRL DTI Control Register 0x70 32 read-write n 0x0 0x0 DTCINV DTI Complementary Output Invert. 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 3 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 DTFAULT DTI Fault Register 0x80 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0x84 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0x78 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 3 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 0 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 0 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 0 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 0 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 0 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 0 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 0 0x00000007 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 3 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 DTLOCK DTI Configuration Lock Register 0x88 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 DTOGEN DTI Output Generation Enable Register 0x7C 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0x74 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0xC 32 read-write n 0x0 0x0 CC0 CC Channel 0 Interrupt Enable 4 1 read-write CC1 CC Channel 1 Interrupt Enable 5 1 read-write CC2 CC Channel 2 Interrupt Enable 6 1 read-write ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Enable 8 1 read-write ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Enable 9 1 read-write ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Enable 10 1 read-write OF Overflow Interrupt Enable 0 1 read-write UF Underflow Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0x10 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x18 32 write-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag Clear 4 1 write-only CC1 CC Channel 1 Interrupt Flag Clear 5 1 write-only CC2 CC Channel 2 Interrupt Flag Clear 6 1 write-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Clear 8 1 write-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Clear 9 1 write-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Clear 10 1 write-only OF Overflow Interrupt Flag Clear 0 1 write-only UF Underflow Interrupt Flag Clear 1 1 write-only IFS Interrupt Flag Set Register 0x14 32 write-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag Set 4 1 write-only CC1 CC Channel 1 Interrupt Flag Set 5 1 write-only CC2 CC Channel 2 Interrupt Flag Set 6 1 write-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Set 8 1 write-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Set 9 1 write-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Set 10 1 write-only OF Overflow Interrupt Flag Set 0 1 write-only UF Underflow Interrupt Flag Set 1 1 write-only ROUTE I/O Routing Register 0x28 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write LOCATION I/O Location 16 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 16 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 16 read-write TIMER1 TIMER1 TIMER1 0x0 0x0 0x400 registers n TIMER1 10 CC0_CCV CC Channel Value Register 0x34 32 read-write n 0x0 0x0 CCV CC Channel Value 0 16 read-write CC0_CCVB CC Channel Buffer Register 0x3C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 16 read-write CC0_CCVP CC Channel Value Peek Register 0x38 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 16 read-only CC0_CTRL CC Channel Control Register 0x30 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 21 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse, interrupt flag and DMA request set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse, interrupt flag and DMA request set on every second capture 0x00000001 RISING PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 20 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 3 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 CC1_CCV CC Channel Value Register 0x44 32 read-write n 0x0 0x0 CCV CC Channel Value 0 16 read-write CC1_CCVB CC Channel Buffer Register 0x4C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 16 read-write CC1_CCVP CC Channel Value Peek Register 0x48 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 16 read-only CC1_CTRL CC Channel Control Register 0x40 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 21 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse, interrupt flag and DMA request set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse, interrupt flag and DMA request set on every second capture 0x00000001 RISING PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 20 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 3 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 CC2_CCV CC Channel Value Register 0x54 32 read-write n 0x0 0x0 CCV CC Channel Value 0 16 read-write CC2_CCVB CC Channel Buffer Register 0x5C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 16 read-write CC2_CCVP CC Channel Value Peek Register 0x58 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 16 read-only CC2_CTRL CC Channel Control Register 0x50 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 21 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse, interrupt flag and DMA request set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse, interrupt flag and DMA request set on every second capture 0x00000001 RISING PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 20 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 3 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 16 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write DTCTRL DTI Control Register 0x70 32 read-write n 0x0 0x0 DTCINV DTI Complementary Output Invert. 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 3 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 DTFAULT DTI Fault Register 0x80 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0x84 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0x78 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 3 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 0 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 0 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 0 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 0 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 0 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 0 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 0 0x00000007 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 3 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 DTLOCK DTI Configuration Lock Register 0x88 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 DTOGEN DTI Output Generation Enable Register 0x7C 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0x74 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0xC 32 read-write n 0x0 0x0 CC0 CC Channel 0 Interrupt Enable 4 1 read-write CC1 CC Channel 1 Interrupt Enable 5 1 read-write CC2 CC Channel 2 Interrupt Enable 6 1 read-write ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Enable 8 1 read-write ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Enable 9 1 read-write ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Enable 10 1 read-write OF Overflow Interrupt Enable 0 1 read-write UF Underflow Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0x10 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x18 32 write-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag Clear 4 1 write-only CC1 CC Channel 1 Interrupt Flag Clear 5 1 write-only CC2 CC Channel 2 Interrupt Flag Clear 6 1 write-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Clear 8 1 write-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Clear 9 1 write-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Clear 10 1 write-only OF Overflow Interrupt Flag Clear 0 1 write-only UF Underflow Interrupt Flag Clear 1 1 write-only IFS Interrupt Flag Set Register 0x14 32 write-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag Set 4 1 write-only CC1 CC Channel 1 Interrupt Flag Set 5 1 write-only CC2 CC Channel 2 Interrupt Flag Set 6 1 write-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Set 8 1 write-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Set 9 1 write-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Set 10 1 write-only OF Overflow Interrupt Flag Set 0 1 write-only UF Underflow Interrupt Flag Set 1 1 write-only ROUTE I/O Routing Register 0x28 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write LOCATION I/O Location 16 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 16 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 16 read-write TIMER2 TIMER2 TIMER2 0x0 0x0 0x400 registers n TIMER2 11 CC0_CCV CC Channel Value Register 0x34 32 read-write n 0x0 0x0 CCV CC Channel Value 0 16 read-write CC0_CCVB CC Channel Buffer Register 0x3C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 16 read-write CC0_CCVP CC Channel Value Peek Register 0x38 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 16 read-only CC0_CTRL CC Channel Control Register 0x30 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 21 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse, interrupt flag and DMA request set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse, interrupt flag and DMA request set on every second capture 0x00000001 RISING PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 20 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 3 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 CC1_CCV CC Channel Value Register 0x44 32 read-write n 0x0 0x0 CCV CC Channel Value 0 16 read-write CC1_CCVB CC Channel Buffer Register 0x4C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 16 read-write CC1_CCVP CC Channel Value Peek Register 0x48 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 16 read-only CC1_CTRL CC Channel Control Register 0x40 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 21 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse, interrupt flag and DMA request set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse, interrupt flag and DMA request set on every second capture 0x00000001 RISING PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 20 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 3 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 CC2_CCV CC Channel Value Register 0x54 32 read-write n 0x0 0x0 CCV CC Channel Value 0 16 read-write CC2_CCVB CC Channel Buffer Register 0x5C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 16 read-write CC2_CCVP CC Channel Value Peek Register 0x58 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 16 read-only CC2_CTRL CC Channel Control Register 0x50 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 21 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse, interrupt flag and DMA request set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse, interrupt flag and DMA request set on every second capture 0x00000001 RISING PRS output pulse, interrupt flag and DMA request set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse, interrupt flag and DMA request set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 20 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 3 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 16 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write DTCTRL DTI Control Register 0x70 32 read-write n 0x0 0x0 DTCINV DTI Complementary Output Invert. 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 3 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 DTFAULT DTI Fault Register 0x80 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0x84 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0x78 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 3 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 0 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 0 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 0 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 0 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 0 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 0 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 0 0x00000007 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 3 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 DTLOCK DTI Configuration Lock Register 0x88 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 DTOGEN DTI Output Generation Enable Register 0x7C 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0x74 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0xC 32 read-write n 0x0 0x0 CC0 CC Channel 0 Interrupt Enable 4 1 read-write CC1 CC Channel 1 Interrupt Enable 5 1 read-write CC2 CC Channel 2 Interrupt Enable 6 1 read-write ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Enable 8 1 read-write ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Enable 9 1 read-write ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Enable 10 1 read-write OF Overflow Interrupt Enable 0 1 read-write UF Underflow Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0x10 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x18 32 write-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag Clear 4 1 write-only CC1 CC Channel 1 Interrupt Flag Clear 5 1 write-only CC2 CC Channel 2 Interrupt Flag Clear 6 1 write-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Clear 8 1 write-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Clear 9 1 write-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Clear 10 1 write-only OF Overflow Interrupt Flag Clear 0 1 write-only UF Underflow Interrupt Flag Clear 1 1 write-only IFS Interrupt Flag Set Register 0x14 32 write-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag Set 4 1 write-only CC1 CC Channel 1 Interrupt Flag Set 5 1 write-only CC2 CC Channel 2 Interrupt Flag Set 6 1 write-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag Set 8 1 write-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag Set 9 1 write-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag Set 10 1 write-only OF Overflow Interrupt Flag Set 0 1 write-only UF Underflow Interrupt Flag Set 1 1 write-only ROUTE I/O Routing Register 0x28 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write LOCATION I/O Location 16 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 16 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 16 read-write UART0 UART0 UART0 0x0 0x0 0x400 registers n UART0_RX 16 UART0_TX 17 CLKDIV Clock Control Register 0x14 32 read-write n 0x0 0x0 DIV Fractional Clock Divider 6 15 read-write CMD Command Register 0xC 32 write-only n 0x0 0x0 CLEARRX Clear RX 11 1 write-only CLEARTX Clear TX 10 1 write-only MASTERDIS Master Disable 5 1 write-only MASTEREN Master Enable 4 1 write-only RXBLOCKDIS Receiver Block Disable 7 1 write-only RXBLOCKEN Receiver Block Enable 6 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only TXTRIDIS Transmitter Tristate Disable 9 1 write-only TXTRIEN Transmitter Tristate Enable 8 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOCS Automatic Chip Select 16 1 read-write AUTOTRI Automatic TX Tristate 17 1 read-write BIT8DV Bit 8 Default Value 21 1 read-write BYTESWAP Byteswap In Double Accesses 28 1 read-write CCEN Collision Check Enable 2 1 read-write CLKPHA Clock Edge For Setup/Sample 9 1 read-write CLKPOL Clock Polarity 8 1 read-write CSINV Chip Select Invert 15 1 read-write CSMA Action On Slave-Select In Master Mode 11 1 read-write ERRSDMA Halt DMA On Error 22 1 read-write ERRSRX Disable RX On Error 23 1 read-write ERRSTX Disable TX On Error 24 1 read-write LOOPBK Loopback Enable 1 1 read-write MPAB Multi-Processor Address-Bit 4 1 read-write MPM Multi-Processor Mode 3 1 read-write MSBF Most Significant Bit First 10 1 read-write OVS Oversampling 5 2 read-write X16 Regular UART mode with 16X oversampling in asynchronous mode 0x00000000 X8 Double speed with 8X oversampling in asynchronous mode 0x00000001 X6 6X oversampling in asynchronous mode 0x00000002 X4 Quadruple speed with 4X oversampling in asynchronous mode 0x00000003 RXINV Receiver Input Invert 13 1 read-write SCMODE SmartCard Mode 18 1 read-write SCRETRANS SmartCard Retransmit 19 1 read-write SKIPPERRF Skip Parity Error Frames 20 1 read-write SYNC USART Synchronous Mode 0 1 read-write TXBIL TX Buffer Interrupt Level 12 1 read-write TXDELAY TX Delay Transmission 26 2 read-write NONE Frames are transmitted immediately 0x00000000 SINGLE Transmission of new frames are delayed by a single baud period 0x00000001 DOUBLE Transmission of new frames are delayed by two baud periods 0x00000002 TRIPLE Transmission of new frames are delayed by three baud periods 0x00000003 TXINV Transmitter output Invert 14 1 read-write FRAME USART Frame Format Register 0x4 32 read-write n 0x0 0x0 DATABITS Data-Bit Mode 0 4 read-write FOUR Each frame contains 4 data bits 0x00000001 FIVE Each frame contains 5 data bits 0x00000002 SIX Each frame contains 6 data bits 0x00000003 SEVEN Each frame contains 7 data bits 0x00000004 EIGHT Each frame contains 8 data bits 0x00000005 NINE Each frame contains 9 data bits 0x00000006 TEN Each frame contains 10 data bits 0x00000007 ELEVEN Each frame contains 11 data bits 0x00000008 TWELVE Each frame contains 12 data bits 0x00000009 THIRTEEN Each frame contains 13 data bits 0x0000000A FOURTEEN Each frame contains 14 data bits 0x0000000B FIFTEEN Each frame contains 15 data bits 0x0000000C SIXTEEN Each frame contains 16 data bits 0x0000000D PARITY Parity-Bit Mode 8 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 12 2 read-write HALF The transmitter generates a half stop bit. Stop-bits are not verified by receiver 0x00000000 ONE One stop bit is generated and verified 0x00000001 ONEANDAHALF The transmitter generates one and a half stop bit. The receiver verifies the first stop bit 0x00000002 TWO The transmitter generates two stop bits. The receiver checks the first stop-bit only 0x00000003 IEN Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 CCF Collision Check Fail Interrupt Enable 12 1 read-write FERR Framing Error Interrupt Enable 9 1 read-write MPAF Multi-Processor Address Frame Interrupt Enable 10 1 read-write PERR Parity Error Interrupt Enable 8 1 read-write RXDATAV RX Data Valid Interrupt Enable 2 1 read-write RXFULL RX Buffer Full Interrupt Enable 3 1 read-write RXOF RX Overflow Interrupt Enable 4 1 read-write RXUF RX Underflow Interrupt Enable 5 1 read-write SSM Slave-Select In Master Mode Interrupt Enable 11 1 read-write TXBL TX Buffer Level Interrupt Enable 1 1 read-write TXC TX Complete Interrupt Enable 0 1 read-write TXOF TX Overflow Interrupt Enable 6 1 read-write TXUF TX Underflow Interrupt Enable 7 1 read-write IF Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 CCF Collision Check Fail Interrupt Flag 12 1 read-only FERR Framing Error Interrupt Flag 9 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 10 1 read-only PERR Parity Error Interrupt Flag 8 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXFULL RX Buffer Full Interrupt Flag 3 1 read-only RXOF RX Overflow Interrupt Flag 4 1 read-only RXUF RX Underflow Interrupt Flag 5 1 read-only SSM Slave-Select In Master Mode Interrupt Flag 11 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXOF TX Overflow Interrupt Flag 6 1 read-only TXUF TX Underflow Interrupt Flag 7 1 read-only IFC Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 CCF Clear Collision Check Fail Interrupt Flag 12 1 write-only FERR Clear Framing Error Interrupt Flag 9 1 write-only MPAF Clear Multi-Processor Address Frame Interrupt Flag 10 1 write-only PERR Clear Parity Error Interrupt Flag 8 1 write-only RXFULL Clear RX Buffer Full Interrupt Flag 3 1 write-only RXOF Clear RX Overflow Interrupt Flag 4 1 write-only RXUF Clear RX Underflow Interrupt Flag 5 1 write-only SSM Clear Slave-Select In Master Mode Interrupt Flag 11 1 write-only TXC Clear TX Complete Interrupt Flag 0 1 write-only TXOF Clear TX Overflow Interrupt Flag 6 1 write-only TXUF Clear TX Underflow Interrupt Flag 7 1 write-only IFS Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 CCF Set Collision Check Fail Interrupt Flag 12 1 write-only FERR Set Framing Error Interrupt Flag 9 1 write-only MPAF Set Multi-Processor Address Frame Interrupt Flag 10 1 write-only PERR Set Parity Error Interrupt Flag 8 1 write-only RXFULL Set RX Buffer Full Interrupt Flag 3 1 write-only RXOF Set RX Overflow Interrupt Flag 4 1 write-only RXUF Set RX Underflow Interrupt Flag 5 1 write-only SSM Set Slave-Select in Master mode Interrupt Flag 11 1 write-only TXC Set TX Complete Interrupt Flag 0 1 write-only TXOF Set TX Overflow Interrupt Flag 6 1 write-only TXUF Set TX Underflow Interrupt Flag 7 1 write-only IRCTRL IrDA Control Register 0x50 32 read-write n 0x0 0x0 IREN Enable IrDA Module 0 1 read-write IRFILT IrDA RX Filter 3 1 read-write IRPRSEN IrDA PRS Channel Enable 7 1 read-write IRPRSSEL IrDA PRS Channel Select 4 3 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 IRPW IrDA TX Pulse Width 1 2 read-write ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 0x00000000 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 0x00000001 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 0x00000002 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 0x00000003 ROUTE I/O Routing Register 0x54 32 read-write n 0x0 0x0 CLKPEN CLK Pin Enable 3 1 read-write CSPEN CS Pin Enable 2 1 read-write LOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA RX Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX RX Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Data Framing Error 15 1 read-only PERR Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP RX Buffer Data Extended Peek Register 0x28 32 read-only n 0x0 0x0 FERRP Data Framing Error Peek 15 1 read-only PERRP Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only RXDOUBLE RX FIFO Double Data Register 0x24 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEX RX Buffer Double Data Extended Register 0x20 32 read-only n 0x0 0x0 modifyExternal FERR0 Data Framing Error 0 15 1 read-only FERR1 Data Framing Error 1 31 1 read-only PERR0 Data Parity Error 0 14 1 read-only PERR1 Data Parity Error 1 30 1 read-only RXDATA0 RX Data 0 0 9 read-only RXDATA1 RX Data 1 16 9 read-only RXDOUBLEXP RX Buffer Double Data Extended Peek Register 0x2C 32 read-only n 0x0 0x0 FERRP0 Data Framing Error 0 Peek 15 1 read-only FERRP1 Data Framing Error 1 Peek 31 1 read-only PERRP0 Data Parity Error 0 Peek 14 1 read-only PERRP1 Data Parity Error 1 Peek 30 1 read-only RXDATAP0 RX Data 0 Peek 0 9 read-only RXDATAP1 RX Data 1 Peek 16 9 read-only STATUS USART Status Register 0x10 32 read-only n 0x0 0x0 MASTER SPI Master Mode 2 1 read-only RXBLOCK Block Incoming Data 3 1 read-only RXDATAV RX Data Valid 7 1 read-only RXENS Receiver Enable Status 0 1 read-only RXFULL RX FIFO Full 8 1 read-only TXBL TX Buffer Level 6 1 read-only TXC TX Complete 5 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXTRI Transmitter Tristated 4 1 read-only TRIGCTRL USART Trigger Control register 0x8 32 read-write n 0x0 0x0 RXTEN Receive Trigger Enable 4 1 read-write TSEL Trigger PRS Channel Select 0 3 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 TXTEN Transmit Trigger Enable 5 1 read-write TXDATA TX Buffer Data Register 0x34 32 write-only n 0x0 0x0 TXDATA TX Data 0 8 write-only TXDATAX TX Buffer Data Extended Register 0x30 32 write-only n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 write-only TXBREAK Transmit Data As Break 13 1 write-only TXDATAX TX Data 0 9 write-only TXDISAT Clear TXEN After Transmission 14 1 write-only TXTRIAT Set TXTRI After Transmission 12 1 write-only UBRXAT Unblock RX After Transmission 11 1 write-only TXDOUBLE TX Buffer Double Data Register 0x3C 32 write-only n 0x0 0x0 TXDATA0 TX Data 0 8 write-only TXDATA1 TX Data 8 8 write-only TXDOUBLEX TX Buffer Double Data Extended Register 0x38 32 write-only n 0x0 0x0 RXENAT0 Enable RX After Transmission 15 1 write-only RXENAT1 Enable RX After Transmission 31 1 write-only TXBREAK0 Transmit Data As Break 13 1 write-only TXBREAK1 Transmit Data As Break 29 1 write-only TXDATA0 TX Data 0 9 write-only TXDATA1 TX Data 16 9 write-only TXDISAT0 Clear TXEN After Transmission 14 1 write-only TXDISAT1 Clear TXEN After Transmission 30 1 write-only TXTRIAT0 Set TXTRI After Transmission 12 1 write-only TXTRIAT1 Set TXTRI After Transmission 28 1 write-only UBRXAT0 Unblock RX After Transmission 11 1 write-only UBRXAT1 Unblock RX After Transmission 27 1 write-only USART0 USART0 USART0 0x0 0x0 0x400 registers n USART0_RX 3 USART0_TX 4 CLKDIV Clock Control Register 0x14 32 read-write n 0x0 0x0 DIV Fractional Clock Divider 6 15 read-write CMD Command Register 0xC 32 write-only n 0x0 0x0 CLEARRX Clear RX 11 1 write-only CLEARTX Clear TX 10 1 write-only MASTERDIS Master Disable 5 1 write-only MASTEREN Master Enable 4 1 write-only RXBLOCKDIS Receiver Block Disable 7 1 write-only RXBLOCKEN Receiver Block Enable 6 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only TXTRIDIS Transmitter Tristate Disable 9 1 write-only TXTRIEN Transmitter Tristate Enable 8 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOCS Automatic Chip Select 16 1 read-write AUTOTRI Automatic TX Tristate 17 1 read-write BIT8DV Bit 8 Default Value 21 1 read-write BYTESWAP Byteswap In Double Accesses 28 1 read-write CCEN Collision Check Enable 2 1 read-write CLKPHA Clock Edge For Setup/Sample 9 1 read-write CLKPOL Clock Polarity 8 1 read-write CSINV Chip Select Invert 15 1 read-write CSMA Action On Slave-Select In Master Mode 11 1 read-write ERRSDMA Halt DMA On Error 22 1 read-write ERRSRX Disable RX On Error 23 1 read-write ERRSTX Disable TX On Error 24 1 read-write LOOPBK Loopback Enable 1 1 read-write MPAB Multi-Processor Address-Bit 4 1 read-write MPM Multi-Processor Mode 3 1 read-write MSBF Most Significant Bit First 10 1 read-write OVS Oversampling 5 2 read-write X16 Regular UART mode with 16X oversampling in asynchronous mode 0x00000000 X8 Double speed with 8X oversampling in asynchronous mode 0x00000001 X6 6X oversampling in asynchronous mode 0x00000002 X4 Quadruple speed with 4X oversampling in asynchronous mode 0x00000003 RXINV Receiver Input Invert 13 1 read-write SCMODE SmartCard Mode 18 1 read-write SCRETRANS SmartCard Retransmit 19 1 read-write SKIPPERRF Skip Parity Error Frames 20 1 read-write SYNC USART Synchronous Mode 0 1 read-write TXBIL TX Buffer Interrupt Level 12 1 read-write TXDELAY TX Delay Transmission 26 2 read-write NONE Frames are transmitted immediately 0x00000000 SINGLE Transmission of new frames are delayed by a single baud period 0x00000001 DOUBLE Transmission of new frames are delayed by two baud periods 0x00000002 TRIPLE Transmission of new frames are delayed by three baud periods 0x00000003 TXINV Transmitter output Invert 14 1 read-write FRAME USART Frame Format Register 0x4 32 read-write n 0x0 0x0 DATABITS Data-Bit Mode 0 4 read-write FOUR Each frame contains 4 data bits 0x00000001 FIVE Each frame contains 5 data bits 0x00000002 SIX Each frame contains 6 data bits 0x00000003 SEVEN Each frame contains 7 data bits 0x00000004 EIGHT Each frame contains 8 data bits 0x00000005 NINE Each frame contains 9 data bits 0x00000006 TEN Each frame contains 10 data bits 0x00000007 ELEVEN Each frame contains 11 data bits 0x00000008 TWELVE Each frame contains 12 data bits 0x00000009 THIRTEEN Each frame contains 13 data bits 0x0000000A FOURTEEN Each frame contains 14 data bits 0x0000000B FIFTEEN Each frame contains 15 data bits 0x0000000C SIXTEEN Each frame contains 16 data bits 0x0000000D PARITY Parity-Bit Mode 8 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 12 2 read-write HALF The transmitter generates a half stop bit. Stop-bits are not verified by receiver 0x00000000 ONE One stop bit is generated and verified 0x00000001 ONEANDAHALF The transmitter generates one and a half stop bit. The receiver verifies the first stop bit 0x00000002 TWO The transmitter generates two stop bits. The receiver checks the first stop-bit only 0x00000003 IEN Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 CCF Collision Check Fail Interrupt Enable 12 1 read-write FERR Framing Error Interrupt Enable 9 1 read-write MPAF Multi-Processor Address Frame Interrupt Enable 10 1 read-write PERR Parity Error Interrupt Enable 8 1 read-write RXDATAV RX Data Valid Interrupt Enable 2 1 read-write RXFULL RX Buffer Full Interrupt Enable 3 1 read-write RXOF RX Overflow Interrupt Enable 4 1 read-write RXUF RX Underflow Interrupt Enable 5 1 read-write SSM Slave-Select In Master Mode Interrupt Enable 11 1 read-write TXBL TX Buffer Level Interrupt Enable 1 1 read-write TXC TX Complete Interrupt Enable 0 1 read-write TXOF TX Overflow Interrupt Enable 6 1 read-write TXUF TX Underflow Interrupt Enable 7 1 read-write IF Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 CCF Collision Check Fail Interrupt Flag 12 1 read-only FERR Framing Error Interrupt Flag 9 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 10 1 read-only PERR Parity Error Interrupt Flag 8 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXFULL RX Buffer Full Interrupt Flag 3 1 read-only RXOF RX Overflow Interrupt Flag 4 1 read-only RXUF RX Underflow Interrupt Flag 5 1 read-only SSM Slave-Select In Master Mode Interrupt Flag 11 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXOF TX Overflow Interrupt Flag 6 1 read-only TXUF TX Underflow Interrupt Flag 7 1 read-only IFC Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 CCF Clear Collision Check Fail Interrupt Flag 12 1 write-only FERR Clear Framing Error Interrupt Flag 9 1 write-only MPAF Clear Multi-Processor Address Frame Interrupt Flag 10 1 write-only PERR Clear Parity Error Interrupt Flag 8 1 write-only RXFULL Clear RX Buffer Full Interrupt Flag 3 1 write-only RXOF Clear RX Overflow Interrupt Flag 4 1 write-only RXUF Clear RX Underflow Interrupt Flag 5 1 write-only SSM Clear Slave-Select In Master Mode Interrupt Flag 11 1 write-only TXC Clear TX Complete Interrupt Flag 0 1 write-only TXOF Clear TX Overflow Interrupt Flag 6 1 write-only TXUF Clear TX Underflow Interrupt Flag 7 1 write-only IFS Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 CCF Set Collision Check Fail Interrupt Flag 12 1 write-only FERR Set Framing Error Interrupt Flag 9 1 write-only MPAF Set Multi-Processor Address Frame Interrupt Flag 10 1 write-only PERR Set Parity Error Interrupt Flag 8 1 write-only RXFULL Set RX Buffer Full Interrupt Flag 3 1 write-only RXOF Set RX Overflow Interrupt Flag 4 1 write-only RXUF Set RX Underflow Interrupt Flag 5 1 write-only SSM Set Slave-Select in Master mode Interrupt Flag 11 1 write-only TXC Set TX Complete Interrupt Flag 0 1 write-only TXOF Set TX Overflow Interrupt Flag 6 1 write-only TXUF Set TX Underflow Interrupt Flag 7 1 write-only IRCTRL IrDA Control Register 0x50 32 read-write n 0x0 0x0 IREN Enable IrDA Module 0 1 read-write IRFILT IrDA RX Filter 3 1 read-write IRPRSEN IrDA PRS Channel Enable 7 1 read-write IRPRSSEL IrDA PRS Channel Select 4 3 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 IRPW IrDA TX Pulse Width 1 2 read-write ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 0x00000000 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 0x00000001 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 0x00000002 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 0x00000003 ROUTE I/O Routing Register 0x54 32 read-write n 0x0 0x0 CLKPEN CLK Pin Enable 3 1 read-write CSPEN CS Pin Enable 2 1 read-write LOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA RX Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX RX Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Data Framing Error 15 1 read-only PERR Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP RX Buffer Data Extended Peek Register 0x28 32 read-only n 0x0 0x0 FERRP Data Framing Error Peek 15 1 read-only PERRP Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only RXDOUBLE RX FIFO Double Data Register 0x24 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEX RX Buffer Double Data Extended Register 0x20 32 read-only n 0x0 0x0 modifyExternal FERR0 Data Framing Error 0 15 1 read-only FERR1 Data Framing Error 1 31 1 read-only PERR0 Data Parity Error 0 14 1 read-only PERR1 Data Parity Error 1 30 1 read-only RXDATA0 RX Data 0 0 9 read-only RXDATA1 RX Data 1 16 9 read-only RXDOUBLEXP RX Buffer Double Data Extended Peek Register 0x2C 32 read-only n 0x0 0x0 FERRP0 Data Framing Error 0 Peek 15 1 read-only FERRP1 Data Framing Error 1 Peek 31 1 read-only PERRP0 Data Parity Error 0 Peek 14 1 read-only PERRP1 Data Parity Error 1 Peek 30 1 read-only RXDATAP0 RX Data 0 Peek 0 9 read-only RXDATAP1 RX Data 1 Peek 16 9 read-only STATUS USART Status Register 0x10 32 read-only n 0x0 0x0 MASTER SPI Master Mode 2 1 read-only RXBLOCK Block Incoming Data 3 1 read-only RXDATAV RX Data Valid 7 1 read-only RXENS Receiver Enable Status 0 1 read-only RXFULL RX FIFO Full 8 1 read-only TXBL TX Buffer Level 6 1 read-only TXC TX Complete 5 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXTRI Transmitter Tristated 4 1 read-only TRIGCTRL USART Trigger Control register 0x8 32 read-write n 0x0 0x0 RXTEN Receive Trigger Enable 4 1 read-write TSEL Trigger PRS Channel Select 0 3 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 TXTEN Transmit Trigger Enable 5 1 read-write TXDATA TX Buffer Data Register 0x34 32 write-only n 0x0 0x0 TXDATA TX Data 0 8 write-only TXDATAX TX Buffer Data Extended Register 0x30 32 write-only n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 write-only TXBREAK Transmit Data As Break 13 1 write-only TXDATAX TX Data 0 9 write-only TXDISAT Clear TXEN After Transmission 14 1 write-only TXTRIAT Set TXTRI After Transmission 12 1 write-only UBRXAT Unblock RX After Transmission 11 1 write-only TXDOUBLE TX Buffer Double Data Register 0x3C 32 write-only n 0x0 0x0 TXDATA0 TX Data 0 8 write-only TXDATA1 TX Data 8 8 write-only TXDOUBLEX TX Buffer Double Data Extended Register 0x38 32 write-only n 0x0 0x0 RXENAT0 Enable RX After Transmission 15 1 write-only RXENAT1 Enable RX After Transmission 31 1 write-only TXBREAK0 Transmit Data As Break 13 1 write-only TXBREAK1 Transmit Data As Break 29 1 write-only TXDATA0 TX Data 0 9 write-only TXDATA1 TX Data 16 9 write-only TXDISAT0 Clear TXEN After Transmission 14 1 write-only TXDISAT1 Clear TXEN After Transmission 30 1 write-only TXTRIAT0 Set TXTRI After Transmission 12 1 write-only TXTRIAT1 Set TXTRI After Transmission 28 1 write-only UBRXAT0 Unblock RX After Transmission 11 1 write-only UBRXAT1 Unblock RX After Transmission 27 1 write-only USART1 USART1 USART1 0x0 0x0 0x400 registers n USART1_RX 12 USART1_TX 13 CLKDIV Clock Control Register 0x14 32 read-write n 0x0 0x0 DIV Fractional Clock Divider 6 15 read-write CMD Command Register 0xC 32 write-only n 0x0 0x0 CLEARRX Clear RX 11 1 write-only CLEARTX Clear TX 10 1 write-only MASTERDIS Master Disable 5 1 write-only MASTEREN Master Enable 4 1 write-only RXBLOCKDIS Receiver Block Disable 7 1 write-only RXBLOCKEN Receiver Block Enable 6 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only TXTRIDIS Transmitter Tristate Disable 9 1 write-only TXTRIEN Transmitter Tristate Enable 8 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOCS Automatic Chip Select 16 1 read-write AUTOTRI Automatic TX Tristate 17 1 read-write BIT8DV Bit 8 Default Value 21 1 read-write BYTESWAP Byteswap In Double Accesses 28 1 read-write CCEN Collision Check Enable 2 1 read-write CLKPHA Clock Edge For Setup/Sample 9 1 read-write CLKPOL Clock Polarity 8 1 read-write CSINV Chip Select Invert 15 1 read-write CSMA Action On Slave-Select In Master Mode 11 1 read-write ERRSDMA Halt DMA On Error 22 1 read-write ERRSRX Disable RX On Error 23 1 read-write ERRSTX Disable TX On Error 24 1 read-write LOOPBK Loopback Enable 1 1 read-write MPAB Multi-Processor Address-Bit 4 1 read-write MPM Multi-Processor Mode 3 1 read-write MSBF Most Significant Bit First 10 1 read-write OVS Oversampling 5 2 read-write X16 Regular UART mode with 16X oversampling in asynchronous mode 0x00000000 X8 Double speed with 8X oversampling in asynchronous mode 0x00000001 X6 6X oversampling in asynchronous mode 0x00000002 X4 Quadruple speed with 4X oversampling in asynchronous mode 0x00000003 RXINV Receiver Input Invert 13 1 read-write SCMODE SmartCard Mode 18 1 read-write SCRETRANS SmartCard Retransmit 19 1 read-write SKIPPERRF Skip Parity Error Frames 20 1 read-write SYNC USART Synchronous Mode 0 1 read-write TXBIL TX Buffer Interrupt Level 12 1 read-write TXDELAY TX Delay Transmission 26 2 read-write NONE Frames are transmitted immediately 0x00000000 SINGLE Transmission of new frames are delayed by a single baud period 0x00000001 DOUBLE Transmission of new frames are delayed by two baud periods 0x00000002 TRIPLE Transmission of new frames are delayed by three baud periods 0x00000003 TXINV Transmitter output Invert 14 1 read-write FRAME USART Frame Format Register 0x4 32 read-write n 0x0 0x0 DATABITS Data-Bit Mode 0 4 read-write FOUR Each frame contains 4 data bits 0x00000001 FIVE Each frame contains 5 data bits 0x00000002 SIX Each frame contains 6 data bits 0x00000003 SEVEN Each frame contains 7 data bits 0x00000004 EIGHT Each frame contains 8 data bits 0x00000005 NINE Each frame contains 9 data bits 0x00000006 TEN Each frame contains 10 data bits 0x00000007 ELEVEN Each frame contains 11 data bits 0x00000008 TWELVE Each frame contains 12 data bits 0x00000009 THIRTEEN Each frame contains 13 data bits 0x0000000A FOURTEEN Each frame contains 14 data bits 0x0000000B FIFTEEN Each frame contains 15 data bits 0x0000000C SIXTEEN Each frame contains 16 data bits 0x0000000D PARITY Parity-Bit Mode 8 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 12 2 read-write HALF The transmitter generates a half stop bit. Stop-bits are not verified by receiver 0x00000000 ONE One stop bit is generated and verified 0x00000001 ONEANDAHALF The transmitter generates one and a half stop bit. The receiver verifies the first stop bit 0x00000002 TWO The transmitter generates two stop bits. The receiver checks the first stop-bit only 0x00000003 IEN Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 CCF Collision Check Fail Interrupt Enable 12 1 read-write FERR Framing Error Interrupt Enable 9 1 read-write MPAF Multi-Processor Address Frame Interrupt Enable 10 1 read-write PERR Parity Error Interrupt Enable 8 1 read-write RXDATAV RX Data Valid Interrupt Enable 2 1 read-write RXFULL RX Buffer Full Interrupt Enable 3 1 read-write RXOF RX Overflow Interrupt Enable 4 1 read-write RXUF RX Underflow Interrupt Enable 5 1 read-write SSM Slave-Select In Master Mode Interrupt Enable 11 1 read-write TXBL TX Buffer Level Interrupt Enable 1 1 read-write TXC TX Complete Interrupt Enable 0 1 read-write TXOF TX Overflow Interrupt Enable 6 1 read-write TXUF TX Underflow Interrupt Enable 7 1 read-write IF Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 CCF Collision Check Fail Interrupt Flag 12 1 read-only FERR Framing Error Interrupt Flag 9 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 10 1 read-only PERR Parity Error Interrupt Flag 8 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXFULL RX Buffer Full Interrupt Flag 3 1 read-only RXOF RX Overflow Interrupt Flag 4 1 read-only RXUF RX Underflow Interrupt Flag 5 1 read-only SSM Slave-Select In Master Mode Interrupt Flag 11 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXOF TX Overflow Interrupt Flag 6 1 read-only TXUF TX Underflow Interrupt Flag 7 1 read-only IFC Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 CCF Clear Collision Check Fail Interrupt Flag 12 1 write-only FERR Clear Framing Error Interrupt Flag 9 1 write-only MPAF Clear Multi-Processor Address Frame Interrupt Flag 10 1 write-only PERR Clear Parity Error Interrupt Flag 8 1 write-only RXFULL Clear RX Buffer Full Interrupt Flag 3 1 write-only RXOF Clear RX Overflow Interrupt Flag 4 1 write-only RXUF Clear RX Underflow Interrupt Flag 5 1 write-only SSM Clear Slave-Select In Master Mode Interrupt Flag 11 1 write-only TXC Clear TX Complete Interrupt Flag 0 1 write-only TXOF Clear TX Overflow Interrupt Flag 6 1 write-only TXUF Clear TX Underflow Interrupt Flag 7 1 write-only IFS Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 CCF Set Collision Check Fail Interrupt Flag 12 1 write-only FERR Set Framing Error Interrupt Flag 9 1 write-only MPAF Set Multi-Processor Address Frame Interrupt Flag 10 1 write-only PERR Set Parity Error Interrupt Flag 8 1 write-only RXFULL Set RX Buffer Full Interrupt Flag 3 1 write-only RXOF Set RX Overflow Interrupt Flag 4 1 write-only RXUF Set RX Underflow Interrupt Flag 5 1 write-only SSM Set Slave-Select in Master mode Interrupt Flag 11 1 write-only TXC Set TX Complete Interrupt Flag 0 1 write-only TXOF Set TX Overflow Interrupt Flag 6 1 write-only TXUF Set TX Underflow Interrupt Flag 7 1 write-only IRCTRL IrDA Control Register 0x50 32 read-write n 0x0 0x0 IREN Enable IrDA Module 0 1 read-write IRFILT IrDA RX Filter 3 1 read-write IRPRSEN IrDA PRS Channel Enable 7 1 read-write IRPRSSEL IrDA PRS Channel Select 4 3 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 IRPW IrDA TX Pulse Width 1 2 read-write ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 0x00000000 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 0x00000001 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 0x00000002 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 0x00000003 ROUTE I/O Routing Register 0x54 32 read-write n 0x0 0x0 CLKPEN CLK Pin Enable 3 1 read-write CSPEN CS Pin Enable 2 1 read-write LOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA RX Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX RX Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Data Framing Error 15 1 read-only PERR Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP RX Buffer Data Extended Peek Register 0x28 32 read-only n 0x0 0x0 FERRP Data Framing Error Peek 15 1 read-only PERRP Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only RXDOUBLE RX FIFO Double Data Register 0x24 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEX RX Buffer Double Data Extended Register 0x20 32 read-only n 0x0 0x0 modifyExternal FERR0 Data Framing Error 0 15 1 read-only FERR1 Data Framing Error 1 31 1 read-only PERR0 Data Parity Error 0 14 1 read-only PERR1 Data Parity Error 1 30 1 read-only RXDATA0 RX Data 0 0 9 read-only RXDATA1 RX Data 1 16 9 read-only RXDOUBLEXP RX Buffer Double Data Extended Peek Register 0x2C 32 read-only n 0x0 0x0 FERRP0 Data Framing Error 0 Peek 15 1 read-only FERRP1 Data Framing Error 1 Peek 31 1 read-only PERRP0 Data Parity Error 0 Peek 14 1 read-only PERRP1 Data Parity Error 1 Peek 30 1 read-only RXDATAP0 RX Data 0 Peek 0 9 read-only RXDATAP1 RX Data 1 Peek 16 9 read-only STATUS USART Status Register 0x10 32 read-only n 0x0 0x0 MASTER SPI Master Mode 2 1 read-only RXBLOCK Block Incoming Data 3 1 read-only RXDATAV RX Data Valid 7 1 read-only RXENS Receiver Enable Status 0 1 read-only RXFULL RX FIFO Full 8 1 read-only TXBL TX Buffer Level 6 1 read-only TXC TX Complete 5 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXTRI Transmitter Tristated 4 1 read-only TRIGCTRL USART Trigger Control register 0x8 32 read-write n 0x0 0x0 RXTEN Receive Trigger Enable 4 1 read-write TSEL Trigger PRS Channel Select 0 3 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 TXTEN Transmit Trigger Enable 5 1 read-write TXDATA TX Buffer Data Register 0x34 32 write-only n 0x0 0x0 TXDATA TX Data 0 8 write-only TXDATAX TX Buffer Data Extended Register 0x30 32 write-only n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 write-only TXBREAK Transmit Data As Break 13 1 write-only TXDATAX TX Data 0 9 write-only TXDISAT Clear TXEN After Transmission 14 1 write-only TXTRIAT Set TXTRI After Transmission 12 1 write-only UBRXAT Unblock RX After Transmission 11 1 write-only TXDOUBLE TX Buffer Double Data Register 0x3C 32 write-only n 0x0 0x0 TXDATA0 TX Data 0 8 write-only TXDATA1 TX Data 8 8 write-only TXDOUBLEX TX Buffer Double Data Extended Register 0x38 32 write-only n 0x0 0x0 RXENAT0 Enable RX After Transmission 15 1 write-only RXENAT1 Enable RX After Transmission 31 1 write-only TXBREAK0 Transmit Data As Break 13 1 write-only TXBREAK1 Transmit Data As Break 29 1 write-only TXDATA0 TX Data 0 9 write-only TXDATA1 TX Data 16 9 write-only TXDISAT0 Clear TXEN After Transmission 14 1 write-only TXDISAT1 Clear TXEN After Transmission 30 1 write-only TXTRIAT0 Set TXTRI After Transmission 12 1 write-only TXTRIAT1 Set TXTRI After Transmission 28 1 write-only UBRXAT0 Unblock RX After Transmission 11 1 write-only UBRXAT1 Unblock RX After Transmission 27 1 write-only USART2 USART2 USART2 0x0 0x0 0x400 registers n USART2_RX 14 USART2_TX 15 CLKDIV Clock Control Register 0x14 32 read-write n 0x0 0x0 DIV Fractional Clock Divider 6 15 read-write CMD Command Register 0xC 32 write-only n 0x0 0x0 CLEARRX Clear RX 11 1 write-only CLEARTX Clear TX 10 1 write-only MASTERDIS Master Disable 5 1 write-only MASTEREN Master Enable 4 1 write-only RXBLOCKDIS Receiver Block Disable 7 1 write-only RXBLOCKEN Receiver Block Enable 6 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only TXTRIDIS Transmitter Tristate Disable 9 1 write-only TXTRIEN Transmitter Tristate Enable 8 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOCS Automatic Chip Select 16 1 read-write AUTOTRI Automatic TX Tristate 17 1 read-write BIT8DV Bit 8 Default Value 21 1 read-write BYTESWAP Byteswap In Double Accesses 28 1 read-write CCEN Collision Check Enable 2 1 read-write CLKPHA Clock Edge For Setup/Sample 9 1 read-write CLKPOL Clock Polarity 8 1 read-write CSINV Chip Select Invert 15 1 read-write CSMA Action On Slave-Select In Master Mode 11 1 read-write ERRSDMA Halt DMA On Error 22 1 read-write ERRSRX Disable RX On Error 23 1 read-write ERRSTX Disable TX On Error 24 1 read-write LOOPBK Loopback Enable 1 1 read-write MPAB Multi-Processor Address-Bit 4 1 read-write MPM Multi-Processor Mode 3 1 read-write MSBF Most Significant Bit First 10 1 read-write OVS Oversampling 5 2 read-write X16 Regular UART mode with 16X oversampling in asynchronous mode 0x00000000 X8 Double speed with 8X oversampling in asynchronous mode 0x00000001 X6 6X oversampling in asynchronous mode 0x00000002 X4 Quadruple speed with 4X oversampling in asynchronous mode 0x00000003 RXINV Receiver Input Invert 13 1 read-write SCMODE SmartCard Mode 18 1 read-write SCRETRANS SmartCard Retransmit 19 1 read-write SKIPPERRF Skip Parity Error Frames 20 1 read-write SYNC USART Synchronous Mode 0 1 read-write TXBIL TX Buffer Interrupt Level 12 1 read-write TXDELAY TX Delay Transmission 26 2 read-write NONE Frames are transmitted immediately 0x00000000 SINGLE Transmission of new frames are delayed by a single baud period 0x00000001 DOUBLE Transmission of new frames are delayed by two baud periods 0x00000002 TRIPLE Transmission of new frames are delayed by three baud periods 0x00000003 TXINV Transmitter output Invert 14 1 read-write FRAME USART Frame Format Register 0x4 32 read-write n 0x0 0x0 DATABITS Data-Bit Mode 0 4 read-write FOUR Each frame contains 4 data bits 0x00000001 FIVE Each frame contains 5 data bits 0x00000002 SIX Each frame contains 6 data bits 0x00000003 SEVEN Each frame contains 7 data bits 0x00000004 EIGHT Each frame contains 8 data bits 0x00000005 NINE Each frame contains 9 data bits 0x00000006 TEN Each frame contains 10 data bits 0x00000007 ELEVEN Each frame contains 11 data bits 0x00000008 TWELVE Each frame contains 12 data bits 0x00000009 THIRTEEN Each frame contains 13 data bits 0x0000000A FOURTEEN Each frame contains 14 data bits 0x0000000B FIFTEEN Each frame contains 15 data bits 0x0000000C SIXTEEN Each frame contains 16 data bits 0x0000000D PARITY Parity-Bit Mode 8 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 12 2 read-write HALF The transmitter generates a half stop bit. Stop-bits are not verified by receiver 0x00000000 ONE One stop bit is generated and verified 0x00000001 ONEANDAHALF The transmitter generates one and a half stop bit. The receiver verifies the first stop bit 0x00000002 TWO The transmitter generates two stop bits. The receiver checks the first stop-bit only 0x00000003 IEN Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 CCF Collision Check Fail Interrupt Enable 12 1 read-write FERR Framing Error Interrupt Enable 9 1 read-write MPAF Multi-Processor Address Frame Interrupt Enable 10 1 read-write PERR Parity Error Interrupt Enable 8 1 read-write RXDATAV RX Data Valid Interrupt Enable 2 1 read-write RXFULL RX Buffer Full Interrupt Enable 3 1 read-write RXOF RX Overflow Interrupt Enable 4 1 read-write RXUF RX Underflow Interrupt Enable 5 1 read-write SSM Slave-Select In Master Mode Interrupt Enable 11 1 read-write TXBL TX Buffer Level Interrupt Enable 1 1 read-write TXC TX Complete Interrupt Enable 0 1 read-write TXOF TX Overflow Interrupt Enable 6 1 read-write TXUF TX Underflow Interrupt Enable 7 1 read-write IF Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 CCF Collision Check Fail Interrupt Flag 12 1 read-only FERR Framing Error Interrupt Flag 9 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 10 1 read-only PERR Parity Error Interrupt Flag 8 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXFULL RX Buffer Full Interrupt Flag 3 1 read-only RXOF RX Overflow Interrupt Flag 4 1 read-only RXUF RX Underflow Interrupt Flag 5 1 read-only SSM Slave-Select In Master Mode Interrupt Flag 11 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXOF TX Overflow Interrupt Flag 6 1 read-only TXUF TX Underflow Interrupt Flag 7 1 read-only IFC Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 CCF Clear Collision Check Fail Interrupt Flag 12 1 write-only FERR Clear Framing Error Interrupt Flag 9 1 write-only MPAF Clear Multi-Processor Address Frame Interrupt Flag 10 1 write-only PERR Clear Parity Error Interrupt Flag 8 1 write-only RXFULL Clear RX Buffer Full Interrupt Flag 3 1 write-only RXOF Clear RX Overflow Interrupt Flag 4 1 write-only RXUF Clear RX Underflow Interrupt Flag 5 1 write-only SSM Clear Slave-Select In Master Mode Interrupt Flag 11 1 write-only TXC Clear TX Complete Interrupt Flag 0 1 write-only TXOF Clear TX Overflow Interrupt Flag 6 1 write-only TXUF Clear TX Underflow Interrupt Flag 7 1 write-only IFS Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 CCF Set Collision Check Fail Interrupt Flag 12 1 write-only FERR Set Framing Error Interrupt Flag 9 1 write-only MPAF Set Multi-Processor Address Frame Interrupt Flag 10 1 write-only PERR Set Parity Error Interrupt Flag 8 1 write-only RXFULL Set RX Buffer Full Interrupt Flag 3 1 write-only RXOF Set RX Overflow Interrupt Flag 4 1 write-only RXUF Set RX Underflow Interrupt Flag 5 1 write-only SSM Set Slave-Select in Master mode Interrupt Flag 11 1 write-only TXC Set TX Complete Interrupt Flag 0 1 write-only TXOF Set TX Overflow Interrupt Flag 6 1 write-only TXUF Set TX Underflow Interrupt Flag 7 1 write-only IRCTRL IrDA Control Register 0x50 32 read-write n 0x0 0x0 IREN Enable IrDA Module 0 1 read-write IRFILT IrDA RX Filter 3 1 read-write IRPRSEN IrDA PRS Channel Enable 7 1 read-write IRPRSSEL IrDA PRS Channel Select 4 3 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 IRPW IrDA TX Pulse Width 1 2 read-write ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 0x00000000 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 0x00000001 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 0x00000002 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 0x00000003 ROUTE I/O Routing Register 0x54 32 read-write n 0x0 0x0 CLKPEN CLK Pin Enable 3 1 read-write CSPEN CS Pin Enable 2 1 read-write LOCATION I/O Location 8 2 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA RX Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX RX Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Data Framing Error 15 1 read-only PERR Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP RX Buffer Data Extended Peek Register 0x28 32 read-only n 0x0 0x0 FERRP Data Framing Error Peek 15 1 read-only PERRP Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only RXDOUBLE RX FIFO Double Data Register 0x24 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEX RX Buffer Double Data Extended Register 0x20 32 read-only n 0x0 0x0 modifyExternal FERR0 Data Framing Error 0 15 1 read-only FERR1 Data Framing Error 1 31 1 read-only PERR0 Data Parity Error 0 14 1 read-only PERR1 Data Parity Error 1 30 1 read-only RXDATA0 RX Data 0 0 9 read-only RXDATA1 RX Data 1 16 9 read-only RXDOUBLEXP RX Buffer Double Data Extended Peek Register 0x2C 32 read-only n 0x0 0x0 FERRP0 Data Framing Error 0 Peek 15 1 read-only FERRP1 Data Framing Error 1 Peek 31 1 read-only PERRP0 Data Parity Error 0 Peek 14 1 read-only PERRP1 Data Parity Error 1 Peek 30 1 read-only RXDATAP0 RX Data 0 Peek 0 9 read-only RXDATAP1 RX Data 1 Peek 16 9 read-only STATUS USART Status Register 0x10 32 read-only n 0x0 0x0 MASTER SPI Master Mode 2 1 read-only RXBLOCK Block Incoming Data 3 1 read-only RXDATAV RX Data Valid 7 1 read-only RXENS Receiver Enable Status 0 1 read-only RXFULL RX FIFO Full 8 1 read-only TXBL TX Buffer Level 6 1 read-only TXC TX Complete 5 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXTRI Transmitter Tristated 4 1 read-only TRIGCTRL USART Trigger Control register 0x8 32 read-write n 0x0 0x0 RXTEN Receive Trigger Enable 4 1 read-write TSEL Trigger PRS Channel Select 0 3 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 TXTEN Transmit Trigger Enable 5 1 read-write TXDATA TX Buffer Data Register 0x34 32 write-only n 0x0 0x0 TXDATA TX Data 0 8 write-only TXDATAX TX Buffer Data Extended Register 0x30 32 write-only n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 write-only TXBREAK Transmit Data As Break 13 1 write-only TXDATAX TX Data 0 9 write-only TXDISAT Clear TXEN After Transmission 14 1 write-only TXTRIAT Set TXTRI After Transmission 12 1 write-only UBRXAT Unblock RX After Transmission 11 1 write-only TXDOUBLE TX Buffer Double Data Register 0x3C 32 write-only n 0x0 0x0 TXDATA0 TX Data 0 8 write-only TXDATA1 TX Data 8 8 write-only TXDOUBLEX TX Buffer Double Data Extended Register 0x38 32 write-only n 0x0 0x0 RXENAT0 Enable RX After Transmission 15 1 write-only RXENAT1 Enable RX After Transmission 31 1 write-only TXBREAK0 Transmit Data As Break 13 1 write-only TXBREAK1 Transmit Data As Break 29 1 write-only TXDATA0 TX Data 0 9 write-only TXDATA1 TX Data 16 9 write-only TXDISAT0 Clear TXEN After Transmission 14 1 write-only TXDISAT1 Clear TXEN After Transmission 30 1 write-only TXTRIAT0 Set TXTRI After Transmission 12 1 write-only TXTRIAT1 Set TXTRI After Transmission 28 1 write-only UBRXAT0 Unblock RX After Transmission 11 1 write-only UBRXAT1 Unblock RX After Transmission 27 1 write-only VCMP VCMP VCMP 0x0 0x0 0x400 registers n VCMP 26 CTRL Control Register 0x0 32 read-write n 0x0 0x0 BIASPROG VCMP Bias Programming Value 24 4 read-write EN Voltage Supply Comparator Enable 0 1 read-write HALFBIAS Half Bias Current 30 1 read-write HYSTEN Hysteresis Enable 4 1 read-write IFALL Falling Edge Interrupt Sense 17 1 read-write INACTVAL Inactive Value 2 1 read-write IRISE Rising Edge Interrupt Sense 16 1 read-write WARMTIME Warm-Up Time 8 3 read-write 4CYCLES 4 HFPERCLK cycles 0x00000000 8CYCLES 8 HFPERCLK cycles 0x00000001 16CYCLES 16 HFPERCLK cycles 0x00000002 32CYCLES 32 HFPERCLK cycles 0x00000003 64CYCLES 64 HFPERCLK cycles 0x00000004 128CYCLES 128 HFPERCLK cycles 0x00000005 256CYCLES 256 HFPERCLK cycles 0x00000006 512CYCLES 512 HFPERCLK cycles 0x00000007 IEN Interrupt Enable Register 0xC 32 read-write n 0x0 0x0 EDGE Edge Trigger Interrupt Enable 0 1 read-write WARMUP Warm-up Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0x10 32 read-only n 0x0 0x0 EDGE Edge Triggered Interrupt Flag 0 1 read-only WARMUP Warm-up Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x18 32 write-only n 0x0 0x0 EDGE Edge Triggered Interrupt Flag Clear 0 1 write-only WARMUP Warm-up Interrupt Flag Clear 1 1 write-only IFS Interrupt Flag Set Register 0x14 32 write-only n 0x0 0x0 EDGE Edge Triggered Interrupt Flag Set 0 1 write-only WARMUP Warm-up Interrupt Flag Set 1 1 write-only INPUTSEL Input Selection Register 0x4 32 read-write n 0x0 0x0 LPREF Low Power Reference 8 1 read-write TRIGLEVEL Trigger Level 0 6 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 VCMPACT Voltage Supply Comparator Active 0 1 read-only VCMPOUT Voltage Supply Comparator Output 1 1 read-only WDOG WDOG WDOG 0x0 0x0 0x400 registers n CMD Command Register 0x4 32 write-only n 0x0 0x0 CLEAR Watchdog Timer Clear 0 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 CLKSEL Watchdog Clock Select 12 2 read-write ULFRCO ULFRCO 0x00000000 LFRCO LFRCO 0x00000001 LFXO LFXO 0x00000002 DEBUGRUN Debug Mode Run Enable 1 1 read-write EM2RUN Energy Mode 2 Run Enable 2 1 read-write EM3RUN Energy Mode 3 Run Enable 3 1 read-write EM4BLOCK Energy Mode 4 Block 5 1 read-write EN Watchdog Timer Enable 0 1 read-write LOCK Configuration lock 4 1 read-write PERSEL Watchdog Timeout Period Select 8 4 read-write SWOSCBLOCK Software Oscillator Disable Block 6 1 read-write SYNCBUSY Synchronization Busy Register 0x8 32 read-only n 0x0 0x0 CMD CMD Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only