SiliconLabs EFM32GG11B840F1024GL192 2024.04.20 Silicon Labs EFM32GG11B840F1024GL192 Cortex-M MCU CM4 r0p1 little true true 3 false 8 32 ACMP0 ACMP0 ACMP0 0x0 0x0 0x400 registers n ACMP0 8 APORTCONFLICT APORT Conflict Status Register 0x24 32 read-only n 0x0 0x0 APORT0XCONFLICT 1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral 0 1 read-only APORT0YCONFLICT 1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral 1 1 read-only APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only APORTREQ APORT Request Status Register 0x20 32 read-only n 0x0 0x0 APORT0XREQ 1 If the Bus Connected to APORT0X is Requested 0 1 read-only APORT0YREQ 1 If the Bus Connected to APORT0Y is Requested 1 1 read-only APORT1XREQ 1 If the Bus Connected to APORT2X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1X is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 ACCURACY ACMP Accuracy Mode 15 1 read-write APORTVMASTERDIS APORT Bus Master Disable for Bus Selected By VASEL 10 1 read-write APORTXMASTERDIS APORT Bus X Master Disable 8 1 read-write APORTYMASTERDIS APORT Bus Y Master Disable 9 1 read-write BIASPROG Bias Configuration 24 6 read-write EN Analog Comparator Enable 0 1 read-write FULLBIAS Full Bias Current 31 1 read-write GPIOINV Comparator GPIO Output Invert 3 1 read-write IFALL Falling Edge Interrupt Sense 21 1 read-write INACTVAL Inactive Value 2 1 read-write INPUTRANGE Input Range 18 2 read-write FULL Setting when the input can be from 0 to ACMPVDD. 0x00000000 GTVDDDIV2 Setting when the input will always be greater than ACMPVDD/2. 0x00000001 LTVDDDIV2 Setting when the input will always be less than ACMPVDD/2. 0x00000002 IRISE Rising Edge Interrupt Sense 20 1 read-write PWRSEL Power Select 12 3 read-write AVDD AVDD supply 0x00000000 DVDD DVDD supply 0x00000001 IOVDD0 IOVDD/IOVDD0 supply 0x00000002 IOVDD1 IOVDD1 supply (if part has two I/O voltages) 0x00000004 EXTIFCTRL External Override Interface Control 0x48 32 read-write n 0x0 0x0 APORTSEL APORT Selection for External Interface 4 4 read-write APORT0X APORT0X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT0XCH0. 0x00000000 APORT0Y APORT0Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT0YCH0. 0x00000001 APORT1X APORT1X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT1XCH0. 0x00000002 APORT1Y APORT1Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT1XCH0. 0x00000003 APORT1XY APORT1X/Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT1XCH0. 0x00000004 APORT2X APORT2X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT2YCH0. 0x00000005 APORT2Y APORT2Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT2YCH0. 0x00000006 APORT2YX APORT2Y/X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT2YCH0. 0x00000007 APORT3X APORT3X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT3XCH0. 0x00000008 APORT3Y APORT3Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT3XCH0. 0x00000009 APORT3XY APORT3X/Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT3XCH0. 0x0000000A APORT4X APORT4X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT4YCH0. 0x0000000B APORT4Y APORT4Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT4YCH0. 0x0000000C APORT4YX APORT4Y/X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT4YCH0. 0x0000000D EN Enable External Interface 0 1 read-write HYSTERESIS0 Hysteresis 0 Register 0x28 32 read-write n 0x0 0x0 DIVVA Divider for VA Voltage When ACMPOUT=0 16 6 read-write DIVVB Divider for VB Voltage When ACMPOUT=0 24 6 read-write HYST Hysteresis Select When ACMPOUT=0 0 4 read-write HYST0 No hysteresis 0x00000000 HYST1 14 mV hysteresis 0x00000001 HYST2 25 mV hysteresis 0x00000002 HYST3 30 mV hysteresis 0x00000003 HYST4 35 mV hysteresis 0x00000004 HYST5 39 mV hysteresis 0x00000005 HYST6 42 mV hysteresis 0x00000006 HYST7 45 mV hysteresis 0x00000007 HYST8 No hysteresis 0x00000008 HYST9 -14 mV hysteresis 0x00000009 HYST10 -25 mV hysteresis 0x0000000A HYST11 -30 mV hysteresis 0x0000000B HYST12 -35 mV hysteresis 0x0000000C HYST13 -39 mV hysteresis 0x0000000D HYST14 -42 mV hysteresis 0x0000000E HYST15 -45 mV hysteresis 0x0000000F HYSTERESIS1 Hysteresis 1 Register 0x2C 32 read-write n 0x0 0x0 DIVVA Divider for VA Voltage When ACMPOUT=1 16 6 read-write DIVVB Divider for VB Voltage When ACMPOUT=1 24 6 read-write HYST Hysteresis Select When ACMPOUT=1 0 4 read-write HYST0 No hysteresis 0x00000000 HYST1 14 mV hysteresis 0x00000001 HYST2 25 mV hysteresis 0x00000002 HYST3 30 mV hysteresis 0x00000003 HYST4 35 mV hysteresis 0x00000004 HYST5 39 mV hysteresis 0x00000005 HYST6 42 mV hysteresis 0x00000006 HYST7 45 mV hysteresis 0x00000007 HYST8 No hysteresis 0x00000008 HYST9 -14 mV hysteresis 0x00000009 HYST10 -25 mV hysteresis 0x0000000A HYST11 -30 mV hysteresis 0x0000000B HYST12 -35 mV hysteresis 0x0000000C HYST13 -39 mV hysteresis 0x0000000D HYST14 -42 mV hysteresis 0x0000000E HYST15 -45 mV hysteresis 0x0000000F IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 APORTCONFLICT APORTCONFLICT Interrupt Enable 2 1 read-write EDGE EDGE Interrupt Enable 0 1 read-write WARMUP WARMUP Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 APORTCONFLICT APORT Conflict Interrupt Flag 2 1 read-only EDGE Edge Triggered Interrupt Flag 0 1 read-only WARMUP Warm-up Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 APORTCONFLICT Clear APORTCONFLICT Interrupt Flag 2 1 write-only EDGE Clear EDGE Interrupt Flag 0 1 write-only WARMUP Clear WARMUP Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 APORTCONFLICT Set APORTCONFLICT Interrupt Flag 2 1 write-only EDGE Set EDGE Interrupt Flag 0 1 write-only WARMUP Set WARMUP Interrupt Flag 1 1 write-only INPUTSEL Input Selection Register 0x4 32 read-write n 0x0 0x0 CSRESEN Capacitive Sense Mode Internal Resistor Enable 26 1 read-write CSRESSEL Capacitive Sense Mode Internal Resistor Select 28 3 read-write RES0 Internal capacitive sense resistor value 0 0x00000000 RES1 Internal capacitive sense resistor value 1 0x00000001 RES2 Internal capacitive sense resistor value 2 0x00000002 RES3 Internal capacitive sense resistor value 3 0x00000003 RES4 Internal capacitive sense resistor value 4 0x00000004 RES5 Internal capacitive sense resistor value 5 0x00000005 RES6 Internal capacitive sense resistor value 6 0x00000006 RES7 Internal capacitive sense resistor value 7 0x00000007 NEGSEL Negative Input Select 8 8 read-write POSSEL Positive Input Select 0 8 read-write VASEL VA Selection 16 6 read-write VDD ACMPVDD 0x00000000 APORT2YCH0 APORT2Y Channel 0 0x00000001 APORT2YCH2 APORT2Y Channel 2 0x00000003 APORT2YCH4 APORT2Y Channel 4 0x00000005 APORT2YCH6 APORT2Y Channel 6 0x00000007 APORT2YCH8 APORT2Y Channel 8 0x00000009 APORT2YCH10 APORT2Y Channel 10 0x0000000B APORT2YCH12 APORT2Y Channel 12 0x0000000D APORT2YCH14 APORT2Y Channel 14 0x0000000F APORT2YCH16 APORT2Y Channel 16 0x00000011 APORT2YCH18 APORT2Y Channel 18 0x00000013 APORT2YCH20 APORT2Y Channel 20 0x00000015 APORT2YCH22 APORT2Y Channel 22 0x00000017 APORT2YCH24 APORT2Y Channel 24 0x00000019 APORT2YCH26 APORT2Y Channel 26 0x0000001B APORT2YCH28 APORT2Y Channel 28 0x0000001D APORT2YCH30 APORT2Y Channel 30 0x0000001F APORT1XCH0 APORT1X Channel 0 0x00000020 APORT1YCH1 APORT1Y Channel 1 0x00000021 APORT1XCH2 APORT1X Channel 2 0x00000022 APORT1YCH3 APORT1Y Channel 3 0x00000023 APORT1XCH4 APORT1X Channel 4 0x00000024 APORT1YCH5 APORT1Y Channel 5 0x00000025 APORT1XCH6 APORT1X Channel 6 0x00000026 APORT1YCH7 APORT1Y Channel 7 0x00000027 APORT1XCH8 APORT1X Channel 8 0x00000028 APORT1YCH9 APORT1Y Channel 9 0x00000029 APORT1XCH10 APORT1X Channel 10 0x0000002A APORT1YCH11 APORT1Y Channel 11 0x0000002B APORT1XCH12 APORT1X Channel 12 0x0000002C APORT1YCH13 APORT1Y Channel 13 0x0000002D APORT1XCH14 APORT1X Channel 14 0x0000002E APORT1YCH15 APORT1Y Channel 15 0x0000002F APORT1XCH16 APORT1X Channel 16 0x00000030 APORT1YCH17 APORT1Y Channel 17 0x00000031 APORT1XCH18 APORT1X Channel 18 0x00000032 APORT1YCH19 APORT1Y Channel 19 0x00000033 APORT1XCH20 APORT1X Channel 20 0x00000034 APORT1YCH21 APORT1Y Channel 21 0x00000035 APORT1XCH22 APORT1X Channel 22 0x00000036 APORT1YCH23 APORT1Y Channel 23 0x00000037 APORT1XCH24 APORT1X Channel 24 0x00000038 APORT1YCH25 APORT1Y Channel 25 0x00000039 APORT1XCH26 APORT1X Channel 26 0x0000003A APORT1YCH27 APORT1Y Channel 27 0x0000003B APORT1XCH28 APORT1X Channel 28 0x0000003C APORT1YCH29 APORT1Y Channel 29 0x0000003D APORT1XCH30 APORT1X Channel 30 0x0000003E APORT1YCH31 APORT1Y Channel 31 0x0000003F VBSEL VB Selection 22 1 read-write VLPSEL Low-Power Sampled Voltage Selection 24 1 read-write ROUTELOC0 I/O Routing Location Register 0x44 32 read-write n 0x0 0x0 OUTLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTEPEN I/O Routing Pine Enable Register 0x40 32 read-write n 0x0 0x0 OUTPEN ACMP Output Pin Enable 0 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 ACMPACT Analog Comparator Active 0 1 read-only ACMPOUT Analog Comparator Output 1 1 read-only APORTCONFLICT APORT Conflict Output 2 1 read-only EXTIFACT External Override Interface Active 3 1 read-only ACMP1 ACMP1 ACMP1 0x0 0x0 0x400 registers n ACMP0 8 APORTCONFLICT APORT Conflict Status Register 0x24 32 read-only n 0x0 0x0 APORT0XCONFLICT 1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral 0 1 read-only APORT0YCONFLICT 1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral 1 1 read-only APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only APORTREQ APORT Request Status Register 0x20 32 read-only n 0x0 0x0 APORT0XREQ 1 If the Bus Connected to APORT0X is Requested 0 1 read-only APORT0YREQ 1 If the Bus Connected to APORT0Y is Requested 1 1 read-only APORT1XREQ 1 If the Bus Connected to APORT2X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1X is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 ACCURACY ACMP Accuracy Mode 15 1 read-write APORTVMASTERDIS APORT Bus Master Disable for Bus Selected By VASEL 10 1 read-write APORTXMASTERDIS APORT Bus X Master Disable 8 1 read-write APORTYMASTERDIS APORT Bus Y Master Disable 9 1 read-write BIASPROG Bias Configuration 24 6 read-write EN Analog Comparator Enable 0 1 read-write FULLBIAS Full Bias Current 31 1 read-write GPIOINV Comparator GPIO Output Invert 3 1 read-write IFALL Falling Edge Interrupt Sense 21 1 read-write INACTVAL Inactive Value 2 1 read-write INPUTRANGE Input Range 18 2 read-write FULL Setting when the input can be from 0 to ACMPVDD. 0x00000000 GTVDDDIV2 Setting when the input will always be greater than ACMPVDD/2. 0x00000001 LTVDDDIV2 Setting when the input will always be less than ACMPVDD/2. 0x00000002 IRISE Rising Edge Interrupt Sense 20 1 read-write PWRSEL Power Select 12 3 read-write AVDD AVDD supply 0x00000000 DVDD DVDD supply 0x00000001 IOVDD0 IOVDD/IOVDD0 supply 0x00000002 IOVDD1 IOVDD1 supply (if part has two I/O voltages) 0x00000004 EXTIFCTRL External Override Interface Control 0x48 32 read-write n 0x0 0x0 APORTSEL APORT Selection for External Interface 4 4 read-write APORT0X APORT0X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT0XCH0. 0x00000000 APORT0Y APORT0Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT0YCH0. 0x00000001 APORT1X APORT1X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT1XCH0. 0x00000002 APORT1Y APORT1Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT1XCH0. 0x00000003 APORT1XY APORT1X/Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT1XCH0. 0x00000004 APORT2X APORT2X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT2YCH0. 0x00000005 APORT2Y APORT2Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT2YCH0. 0x00000006 APORT2YX APORT2Y/X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT2YCH0. 0x00000007 APORT3X APORT3X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT3XCH0. 0x00000008 APORT3Y APORT3Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT3XCH0. 0x00000009 APORT3XY APORT3X/Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT3XCH0. 0x0000000A APORT4X APORT4X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT4YCH0. 0x0000000B APORT4Y APORT4Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT4YCH0. 0x0000000C APORT4YX APORT4Y/X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT4YCH0. 0x0000000D EN Enable External Interface 0 1 read-write HYSTERESIS0 Hysteresis 0 Register 0x28 32 read-write n 0x0 0x0 DIVVA Divider for VA Voltage When ACMPOUT=0 16 6 read-write DIVVB Divider for VB Voltage When ACMPOUT=0 24 6 read-write HYST Hysteresis Select When ACMPOUT=0 0 4 read-write HYST0 No hysteresis 0x00000000 HYST1 14 mV hysteresis 0x00000001 HYST2 25 mV hysteresis 0x00000002 HYST3 30 mV hysteresis 0x00000003 HYST4 35 mV hysteresis 0x00000004 HYST5 39 mV hysteresis 0x00000005 HYST6 42 mV hysteresis 0x00000006 HYST7 45 mV hysteresis 0x00000007 HYST8 No hysteresis 0x00000008 HYST9 -14 mV hysteresis 0x00000009 HYST10 -25 mV hysteresis 0x0000000A HYST11 -30 mV hysteresis 0x0000000B HYST12 -35 mV hysteresis 0x0000000C HYST13 -39 mV hysteresis 0x0000000D HYST14 -42 mV hysteresis 0x0000000E HYST15 -45 mV hysteresis 0x0000000F HYSTERESIS1 Hysteresis 1 Register 0x2C 32 read-write n 0x0 0x0 DIVVA Divider for VA Voltage When ACMPOUT=1 16 6 read-write DIVVB Divider for VB Voltage When ACMPOUT=1 24 6 read-write HYST Hysteresis Select When ACMPOUT=1 0 4 read-write HYST0 No hysteresis 0x00000000 HYST1 14 mV hysteresis 0x00000001 HYST2 25 mV hysteresis 0x00000002 HYST3 30 mV hysteresis 0x00000003 HYST4 35 mV hysteresis 0x00000004 HYST5 39 mV hysteresis 0x00000005 HYST6 42 mV hysteresis 0x00000006 HYST7 45 mV hysteresis 0x00000007 HYST8 No hysteresis 0x00000008 HYST9 -14 mV hysteresis 0x00000009 HYST10 -25 mV hysteresis 0x0000000A HYST11 -30 mV hysteresis 0x0000000B HYST12 -35 mV hysteresis 0x0000000C HYST13 -39 mV hysteresis 0x0000000D HYST14 -42 mV hysteresis 0x0000000E HYST15 -45 mV hysteresis 0x0000000F IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 APORTCONFLICT APORTCONFLICT Interrupt Enable 2 1 read-write EDGE EDGE Interrupt Enable 0 1 read-write WARMUP WARMUP Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 APORTCONFLICT APORT Conflict Interrupt Flag 2 1 read-only EDGE Edge Triggered Interrupt Flag 0 1 read-only WARMUP Warm-up Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 APORTCONFLICT Clear APORTCONFLICT Interrupt Flag 2 1 write-only EDGE Clear EDGE Interrupt Flag 0 1 write-only WARMUP Clear WARMUP Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 APORTCONFLICT Set APORTCONFLICT Interrupt Flag 2 1 write-only EDGE Set EDGE Interrupt Flag 0 1 write-only WARMUP Set WARMUP Interrupt Flag 1 1 write-only INPUTSEL Input Selection Register 0x4 32 read-write n 0x0 0x0 CSRESEN Capacitive Sense Mode Internal Resistor Enable 26 1 read-write CSRESSEL Capacitive Sense Mode Internal Resistor Select 28 3 read-write RES0 Internal capacitive sense resistor value 0 0x00000000 RES1 Internal capacitive sense resistor value 1 0x00000001 RES2 Internal capacitive sense resistor value 2 0x00000002 RES3 Internal capacitive sense resistor value 3 0x00000003 RES4 Internal capacitive sense resistor value 4 0x00000004 RES5 Internal capacitive sense resistor value 5 0x00000005 RES6 Internal capacitive sense resistor value 6 0x00000006 RES7 Internal capacitive sense resistor value 7 0x00000007 NEGSEL Negative Input Select 8 8 read-write POSSEL Positive Input Select 0 8 read-write VASEL VA Selection 16 6 read-write VDD ACMPVDD 0x00000000 APORT2YCH0 APORT2Y Channel 0 0x00000001 APORT2YCH2 APORT2Y Channel 2 0x00000003 APORT2YCH4 APORT2Y Channel 4 0x00000005 APORT2YCH6 APORT2Y Channel 6 0x00000007 APORT2YCH8 APORT2Y Channel 8 0x00000009 APORT2YCH10 APORT2Y Channel 10 0x0000000B APORT2YCH12 APORT2Y Channel 12 0x0000000D APORT2YCH14 APORT2Y Channel 14 0x0000000F APORT2YCH16 APORT2Y Channel 16 0x00000011 APORT2YCH18 APORT2Y Channel 18 0x00000013 APORT2YCH20 APORT2Y Channel 20 0x00000015 APORT2YCH22 APORT2Y Channel 22 0x00000017 APORT2YCH24 APORT2Y Channel 24 0x00000019 APORT2YCH26 APORT2Y Channel 26 0x0000001B APORT2YCH28 APORT2Y Channel 28 0x0000001D APORT2YCH30 APORT2Y Channel 30 0x0000001F APORT1XCH0 APORT1X Channel 0 0x00000020 APORT1YCH1 APORT1Y Channel 1 0x00000021 APORT1XCH2 APORT1X Channel 2 0x00000022 APORT1YCH3 APORT1Y Channel 3 0x00000023 APORT1XCH4 APORT1X Channel 4 0x00000024 APORT1YCH5 APORT1Y Channel 5 0x00000025 APORT1XCH6 APORT1X Channel 6 0x00000026 APORT1YCH7 APORT1Y Channel 7 0x00000027 APORT1XCH8 APORT1X Channel 8 0x00000028 APORT1YCH9 APORT1Y Channel 9 0x00000029 APORT1XCH10 APORT1X Channel 10 0x0000002A APORT1YCH11 APORT1Y Channel 11 0x0000002B APORT1XCH12 APORT1X Channel 12 0x0000002C APORT1YCH13 APORT1Y Channel 13 0x0000002D APORT1XCH14 APORT1X Channel 14 0x0000002E APORT1YCH15 APORT1Y Channel 15 0x0000002F APORT1XCH16 APORT1X Channel 16 0x00000030 APORT1YCH17 APORT1Y Channel 17 0x00000031 APORT1XCH18 APORT1X Channel 18 0x00000032 APORT1YCH19 APORT1Y Channel 19 0x00000033 APORT1XCH20 APORT1X Channel 20 0x00000034 APORT1YCH21 APORT1Y Channel 21 0x00000035 APORT1XCH22 APORT1X Channel 22 0x00000036 APORT1YCH23 APORT1Y Channel 23 0x00000037 APORT1XCH24 APORT1X Channel 24 0x00000038 APORT1YCH25 APORT1Y Channel 25 0x00000039 APORT1XCH26 APORT1X Channel 26 0x0000003A APORT1YCH27 APORT1Y Channel 27 0x0000003B APORT1XCH28 APORT1X Channel 28 0x0000003C APORT1YCH29 APORT1Y Channel 29 0x0000003D APORT1XCH30 APORT1X Channel 30 0x0000003E APORT1YCH31 APORT1Y Channel 31 0x0000003F VBSEL VB Selection 22 1 read-write VLPSEL Low-Power Sampled Voltage Selection 24 1 read-write ROUTELOC0 I/O Routing Location Register 0x44 32 read-write n 0x0 0x0 OUTLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTEPEN I/O Routing Pine Enable Register 0x40 32 read-write n 0x0 0x0 OUTPEN ACMP Output Pin Enable 0 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 ACMPACT Analog Comparator Active 0 1 read-only ACMPOUT Analog Comparator Output 1 1 read-only APORTCONFLICT APORT Conflict Output 2 1 read-only EXTIFACT External Override Interface Active 3 1 read-only ACMP2 ACMP2 ACMP2 0x0 0x0 0x400 registers n ACMP2 55 APORTCONFLICT APORT Conflict Status Register 0x24 32 read-only n 0x0 0x0 APORT0XCONFLICT 1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral 0 1 read-only APORT0YCONFLICT 1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral 1 1 read-only APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only APORTREQ APORT Request Status Register 0x20 32 read-only n 0x0 0x0 APORT0XREQ 1 If the Bus Connected to APORT0X is Requested 0 1 read-only APORT0YREQ 1 If the Bus Connected to APORT0Y is Requested 1 1 read-only APORT1XREQ 1 If the Bus Connected to APORT2X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1X is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 ACCURACY ACMP Accuracy Mode 15 1 read-write APORTVMASTERDIS APORT Bus Master Disable for Bus Selected By VASEL 10 1 read-write APORTXMASTERDIS APORT Bus X Master Disable 8 1 read-write APORTYMASTERDIS APORT Bus Y Master Disable 9 1 read-write BIASPROG Bias Configuration 24 6 read-write EN Analog Comparator Enable 0 1 read-write FULLBIAS Full Bias Current 31 1 read-write GPIOINV Comparator GPIO Output Invert 3 1 read-write IFALL Falling Edge Interrupt Sense 21 1 read-write INACTVAL Inactive Value 2 1 read-write INPUTRANGE Input Range 18 2 read-write FULL Setting when the input can be from 0 to ACMPVDD. 0x00000000 GTVDDDIV2 Setting when the input will always be greater than ACMPVDD/2. 0x00000001 LTVDDDIV2 Setting when the input will always be less than ACMPVDD/2. 0x00000002 IRISE Rising Edge Interrupt Sense 20 1 read-write PWRSEL Power Select 12 3 read-write AVDD AVDD supply 0x00000000 DVDD DVDD supply 0x00000001 IOVDD0 IOVDD/IOVDD0 supply 0x00000002 IOVDD1 IOVDD1 supply (if part has two I/O voltages) 0x00000004 EXTIFCTRL External Override Interface Control 0x48 32 read-write n 0x0 0x0 APORTSEL APORT Selection for External Interface 4 4 read-write APORT0X APORT0X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT0XCH0. 0x00000000 APORT0Y APORT0Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT0YCH0. 0x00000001 APORT1X APORT1X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT1XCH0. 0x00000002 APORT1Y APORT1Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT1XCH0. 0x00000003 APORT1XY APORT1X/Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT1XCH0. 0x00000004 APORT2X APORT2X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT2YCH0. 0x00000005 APORT2Y APORT2Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT2YCH0. 0x00000006 APORT2YX APORT2Y/X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT2YCH0. 0x00000007 APORT3X APORT3X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT3XCH0. 0x00000008 APORT3Y APORT3Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT3XCH0. 0x00000009 APORT3XY APORT3X/Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT3XCH0. 0x0000000A APORT4X APORT4X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT4YCH0. 0x0000000B APORT4Y APORT4Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT4YCH0. 0x0000000C APORT4YX APORT4Y/X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT4YCH0. 0x0000000D EN Enable External Interface 0 1 read-write HYSTERESIS0 Hysteresis 0 Register 0x28 32 read-write n 0x0 0x0 DIVVA Divider for VA Voltage When ACMPOUT=0 16 6 read-write DIVVB Divider for VB Voltage When ACMPOUT=0 24 6 read-write HYST Hysteresis Select When ACMPOUT=0 0 4 read-write HYST0 No hysteresis 0x00000000 HYST1 14 mV hysteresis 0x00000001 HYST2 25 mV hysteresis 0x00000002 HYST3 30 mV hysteresis 0x00000003 HYST4 35 mV hysteresis 0x00000004 HYST5 39 mV hysteresis 0x00000005 HYST6 42 mV hysteresis 0x00000006 HYST7 45 mV hysteresis 0x00000007 HYST8 No hysteresis 0x00000008 HYST9 -14 mV hysteresis 0x00000009 HYST10 -25 mV hysteresis 0x0000000A HYST11 -30 mV hysteresis 0x0000000B HYST12 -35 mV hysteresis 0x0000000C HYST13 -39 mV hysteresis 0x0000000D HYST14 -42 mV hysteresis 0x0000000E HYST15 -45 mV hysteresis 0x0000000F HYSTERESIS1 Hysteresis 1 Register 0x2C 32 read-write n 0x0 0x0 DIVVA Divider for VA Voltage When ACMPOUT=1 16 6 read-write DIVVB Divider for VB Voltage When ACMPOUT=1 24 6 read-write HYST Hysteresis Select When ACMPOUT=1 0 4 read-write HYST0 No hysteresis 0x00000000 HYST1 14 mV hysteresis 0x00000001 HYST2 25 mV hysteresis 0x00000002 HYST3 30 mV hysteresis 0x00000003 HYST4 35 mV hysteresis 0x00000004 HYST5 39 mV hysteresis 0x00000005 HYST6 42 mV hysteresis 0x00000006 HYST7 45 mV hysteresis 0x00000007 HYST8 No hysteresis 0x00000008 HYST9 -14 mV hysteresis 0x00000009 HYST10 -25 mV hysteresis 0x0000000A HYST11 -30 mV hysteresis 0x0000000B HYST12 -35 mV hysteresis 0x0000000C HYST13 -39 mV hysteresis 0x0000000D HYST14 -42 mV hysteresis 0x0000000E HYST15 -45 mV hysteresis 0x0000000F IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 APORTCONFLICT APORTCONFLICT Interrupt Enable 2 1 read-write EDGE EDGE Interrupt Enable 0 1 read-write WARMUP WARMUP Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 APORTCONFLICT APORT Conflict Interrupt Flag 2 1 read-only EDGE Edge Triggered Interrupt Flag 0 1 read-only WARMUP Warm-up Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 APORTCONFLICT Clear APORTCONFLICT Interrupt Flag 2 1 write-only EDGE Clear EDGE Interrupt Flag 0 1 write-only WARMUP Clear WARMUP Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 APORTCONFLICT Set APORTCONFLICT Interrupt Flag 2 1 write-only EDGE Set EDGE Interrupt Flag 0 1 write-only WARMUP Set WARMUP Interrupt Flag 1 1 write-only INPUTSEL Input Selection Register 0x4 32 read-write n 0x0 0x0 CSRESEN Capacitive Sense Mode Internal Resistor Enable 26 1 read-write CSRESSEL Capacitive Sense Mode Internal Resistor Select 28 3 read-write RES0 Internal capacitive sense resistor value 0 0x00000000 RES1 Internal capacitive sense resistor value 1 0x00000001 RES2 Internal capacitive sense resistor value 2 0x00000002 RES3 Internal capacitive sense resistor value 3 0x00000003 RES4 Internal capacitive sense resistor value 4 0x00000004 RES5 Internal capacitive sense resistor value 5 0x00000005 RES6 Internal capacitive sense resistor value 6 0x00000006 RES7 Internal capacitive sense resistor value 7 0x00000007 NEGSEL Negative Input Select 8 8 read-write POSSEL Positive Input Select 0 8 read-write VASEL VA Selection 16 6 read-write VDD ACMPVDD 0x00000000 APORT2YCH0 APORT2Y Channel 0 0x00000001 APORT2YCH2 APORT2Y Channel 2 0x00000003 APORT2YCH4 APORT2Y Channel 4 0x00000005 APORT2YCH6 APORT2Y Channel 6 0x00000007 APORT2YCH8 APORT2Y Channel 8 0x00000009 APORT2YCH10 APORT2Y Channel 10 0x0000000B APORT2YCH12 APORT2Y Channel 12 0x0000000D APORT2YCH14 APORT2Y Channel 14 0x0000000F APORT2YCH16 APORT2Y Channel 16 0x00000011 APORT2YCH18 APORT2Y Channel 18 0x00000013 APORT2YCH20 APORT2Y Channel 20 0x00000015 APORT2YCH22 APORT2Y Channel 22 0x00000017 APORT2YCH24 APORT2Y Channel 24 0x00000019 APORT2YCH26 APORT2Y Channel 26 0x0000001B APORT2YCH28 APORT2Y Channel 28 0x0000001D APORT2YCH30 APORT2Y Channel 30 0x0000001F APORT1XCH0 APORT1X Channel 0 0x00000020 APORT1YCH1 APORT1Y Channel 1 0x00000021 APORT1XCH2 APORT1X Channel 2 0x00000022 APORT1YCH3 APORT1Y Channel 3 0x00000023 APORT1XCH4 APORT1X Channel 4 0x00000024 APORT1YCH5 APORT1Y Channel 5 0x00000025 APORT1XCH6 APORT1X Channel 6 0x00000026 APORT1YCH7 APORT1Y Channel 7 0x00000027 APORT1XCH8 APORT1X Channel 8 0x00000028 APORT1YCH9 APORT1Y Channel 9 0x00000029 APORT1XCH10 APORT1X Channel 10 0x0000002A APORT1YCH11 APORT1Y Channel 11 0x0000002B APORT1XCH12 APORT1X Channel 12 0x0000002C APORT1YCH13 APORT1Y Channel 13 0x0000002D APORT1XCH14 APORT1X Channel 14 0x0000002E APORT1YCH15 APORT1Y Channel 15 0x0000002F APORT1XCH16 APORT1X Channel 16 0x00000030 APORT1YCH17 APORT1Y Channel 17 0x00000031 APORT1XCH18 APORT1X Channel 18 0x00000032 APORT1YCH19 APORT1Y Channel 19 0x00000033 APORT1XCH20 APORT1X Channel 20 0x00000034 APORT1YCH21 APORT1Y Channel 21 0x00000035 APORT1XCH22 APORT1X Channel 22 0x00000036 APORT1YCH23 APORT1Y Channel 23 0x00000037 APORT1XCH24 APORT1X Channel 24 0x00000038 APORT1YCH25 APORT1Y Channel 25 0x00000039 APORT1XCH26 APORT1X Channel 26 0x0000003A APORT1YCH27 APORT1Y Channel 27 0x0000003B APORT1XCH28 APORT1X Channel 28 0x0000003C APORT1YCH29 APORT1Y Channel 29 0x0000003D APORT1XCH30 APORT1X Channel 30 0x0000003E APORT1YCH31 APORT1Y Channel 31 0x0000003F VBSEL VB Selection 22 1 read-write VLPSEL Low-Power Sampled Voltage Selection 24 1 read-write ROUTELOC0 I/O Routing Location Register 0x44 32 read-write n 0x0 0x0 OUTLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTEPEN I/O Routing Pine Enable Register 0x40 32 read-write n 0x0 0x0 OUTPEN ACMP Output Pin Enable 0 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 ACMPACT Analog Comparator Active 0 1 read-only ACMPOUT Analog Comparator Output 1 1 read-only APORTCONFLICT APORT Conflict Output 2 1 read-only EXTIFACT External Override Interface Active 3 1 read-only ACMP3 ACMP3 ACMP3 0x0 0x0 0x400 registers n ACMP2 55 APORTCONFLICT APORT Conflict Status Register 0x24 32 read-only n 0x0 0x0 APORT0XCONFLICT 1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral 0 1 read-only APORT0YCONFLICT 1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral 1 1 read-only APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only APORTREQ APORT Request Status Register 0x20 32 read-only n 0x0 0x0 APORT0XREQ 1 If the Bus Connected to APORT0X is Requested 0 1 read-only APORT0YREQ 1 If the Bus Connected to APORT0Y is Requested 1 1 read-only APORT1XREQ 1 If the Bus Connected to APORT2X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1X is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 ACCURACY ACMP Accuracy Mode 15 1 read-write APORTVMASTERDIS APORT Bus Master Disable for Bus Selected By VASEL 10 1 read-write APORTXMASTERDIS APORT Bus X Master Disable 8 1 read-write APORTYMASTERDIS APORT Bus Y Master Disable 9 1 read-write BIASPROG Bias Configuration 24 6 read-write EN Analog Comparator Enable 0 1 read-write FULLBIAS Full Bias Current 31 1 read-write GPIOINV Comparator GPIO Output Invert 3 1 read-write IFALL Falling Edge Interrupt Sense 21 1 read-write INACTVAL Inactive Value 2 1 read-write INPUTRANGE Input Range 18 2 read-write FULL Setting when the input can be from 0 to ACMPVDD. 0x00000000 GTVDDDIV2 Setting when the input will always be greater than ACMPVDD/2. 0x00000001 LTVDDDIV2 Setting when the input will always be less than ACMPVDD/2. 0x00000002 IRISE Rising Edge Interrupt Sense 20 1 read-write PWRSEL Power Select 12 3 read-write AVDD AVDD supply 0x00000000 DVDD DVDD supply 0x00000001 IOVDD0 IOVDD/IOVDD0 supply 0x00000002 IOVDD1 IOVDD1 supply (if part has two I/O voltages) 0x00000004 EXTIFCTRL External Override Interface Control 0x48 32 read-write n 0x0 0x0 APORTSEL APORT Selection for External Interface 4 4 read-write APORT0X APORT0X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT0XCH0. 0x00000000 APORT0Y APORT0Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT0YCH0. 0x00000001 APORT1X APORT1X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT1XCH0. 0x00000002 APORT1Y APORT1Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT1XCH0. 0x00000003 APORT1XY APORT1X/Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT1XCH0. 0x00000004 APORT2X APORT2X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT2YCH0. 0x00000005 APORT2Y APORT2Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT2YCH0. 0x00000006 APORT2YX APORT2Y/X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT2YCH0. 0x00000007 APORT3X APORT3X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT3XCH0. 0x00000008 APORT3Y APORT3Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT3XCH0. 0x00000009 APORT3XY APORT3X/Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT3XCH0. 0x0000000A APORT4X APORT4X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT4YCH0. 0x0000000B APORT4Y APORT4Y used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT4YCH0. 0x0000000C APORT4YX APORT4Y/X used. EXT_BASE = ACMP_INPUTSEL_POSSEL_APORT4YCH0. 0x0000000D EN Enable External Interface 0 1 read-write HYSTERESIS0 Hysteresis 0 Register 0x28 32 read-write n 0x0 0x0 DIVVA Divider for VA Voltage When ACMPOUT=0 16 6 read-write DIVVB Divider for VB Voltage When ACMPOUT=0 24 6 read-write HYST Hysteresis Select When ACMPOUT=0 0 4 read-write HYST0 No hysteresis 0x00000000 HYST1 14 mV hysteresis 0x00000001 HYST2 25 mV hysteresis 0x00000002 HYST3 30 mV hysteresis 0x00000003 HYST4 35 mV hysteresis 0x00000004 HYST5 39 mV hysteresis 0x00000005 HYST6 42 mV hysteresis 0x00000006 HYST7 45 mV hysteresis 0x00000007 HYST8 No hysteresis 0x00000008 HYST9 -14 mV hysteresis 0x00000009 HYST10 -25 mV hysteresis 0x0000000A HYST11 -30 mV hysteresis 0x0000000B HYST12 -35 mV hysteresis 0x0000000C HYST13 -39 mV hysteresis 0x0000000D HYST14 -42 mV hysteresis 0x0000000E HYST15 -45 mV hysteresis 0x0000000F HYSTERESIS1 Hysteresis 1 Register 0x2C 32 read-write n 0x0 0x0 DIVVA Divider for VA Voltage When ACMPOUT=1 16 6 read-write DIVVB Divider for VB Voltage When ACMPOUT=1 24 6 read-write HYST Hysteresis Select When ACMPOUT=1 0 4 read-write HYST0 No hysteresis 0x00000000 HYST1 14 mV hysteresis 0x00000001 HYST2 25 mV hysteresis 0x00000002 HYST3 30 mV hysteresis 0x00000003 HYST4 35 mV hysteresis 0x00000004 HYST5 39 mV hysteresis 0x00000005 HYST6 42 mV hysteresis 0x00000006 HYST7 45 mV hysteresis 0x00000007 HYST8 No hysteresis 0x00000008 HYST9 -14 mV hysteresis 0x00000009 HYST10 -25 mV hysteresis 0x0000000A HYST11 -30 mV hysteresis 0x0000000B HYST12 -35 mV hysteresis 0x0000000C HYST13 -39 mV hysteresis 0x0000000D HYST14 -42 mV hysteresis 0x0000000E HYST15 -45 mV hysteresis 0x0000000F IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 APORTCONFLICT APORTCONFLICT Interrupt Enable 2 1 read-write EDGE EDGE Interrupt Enable 0 1 read-write WARMUP WARMUP Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 APORTCONFLICT APORT Conflict Interrupt Flag 2 1 read-only EDGE Edge Triggered Interrupt Flag 0 1 read-only WARMUP Warm-up Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 APORTCONFLICT Clear APORTCONFLICT Interrupt Flag 2 1 write-only EDGE Clear EDGE Interrupt Flag 0 1 write-only WARMUP Clear WARMUP Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 APORTCONFLICT Set APORTCONFLICT Interrupt Flag 2 1 write-only EDGE Set EDGE Interrupt Flag 0 1 write-only WARMUP Set WARMUP Interrupt Flag 1 1 write-only INPUTSEL Input Selection Register 0x4 32 read-write n 0x0 0x0 CSRESEN Capacitive Sense Mode Internal Resistor Enable 26 1 read-write CSRESSEL Capacitive Sense Mode Internal Resistor Select 28 3 read-write RES0 Internal capacitive sense resistor value 0 0x00000000 RES1 Internal capacitive sense resistor value 1 0x00000001 RES2 Internal capacitive sense resistor value 2 0x00000002 RES3 Internal capacitive sense resistor value 3 0x00000003 RES4 Internal capacitive sense resistor value 4 0x00000004 RES5 Internal capacitive sense resistor value 5 0x00000005 RES6 Internal capacitive sense resistor value 6 0x00000006 RES7 Internal capacitive sense resistor value 7 0x00000007 NEGSEL Negative Input Select 8 8 read-write POSSEL Positive Input Select 0 8 read-write VASEL VA Selection 16 6 read-write VDD ACMPVDD 0x00000000 APORT2YCH0 APORT2Y Channel 0 0x00000001 APORT2YCH2 APORT2Y Channel 2 0x00000003 APORT2YCH4 APORT2Y Channel 4 0x00000005 APORT2YCH6 APORT2Y Channel 6 0x00000007 APORT2YCH8 APORT2Y Channel 8 0x00000009 APORT2YCH10 APORT2Y Channel 10 0x0000000B APORT2YCH12 APORT2Y Channel 12 0x0000000D APORT2YCH14 APORT2Y Channel 14 0x0000000F APORT2YCH16 APORT2Y Channel 16 0x00000011 APORT2YCH18 APORT2Y Channel 18 0x00000013 APORT2YCH20 APORT2Y Channel 20 0x00000015 APORT2YCH22 APORT2Y Channel 22 0x00000017 APORT2YCH24 APORT2Y Channel 24 0x00000019 APORT2YCH26 APORT2Y Channel 26 0x0000001B APORT2YCH28 APORT2Y Channel 28 0x0000001D APORT2YCH30 APORT2Y Channel 30 0x0000001F APORT1XCH0 APORT1X Channel 0 0x00000020 APORT1YCH1 APORT1Y Channel 1 0x00000021 APORT1XCH2 APORT1X Channel 2 0x00000022 APORT1YCH3 APORT1Y Channel 3 0x00000023 APORT1XCH4 APORT1X Channel 4 0x00000024 APORT1YCH5 APORT1Y Channel 5 0x00000025 APORT1XCH6 APORT1X Channel 6 0x00000026 APORT1YCH7 APORT1Y Channel 7 0x00000027 APORT1XCH8 APORT1X Channel 8 0x00000028 APORT1YCH9 APORT1Y Channel 9 0x00000029 APORT1XCH10 APORT1X Channel 10 0x0000002A APORT1YCH11 APORT1Y Channel 11 0x0000002B APORT1XCH12 APORT1X Channel 12 0x0000002C APORT1YCH13 APORT1Y Channel 13 0x0000002D APORT1XCH14 APORT1X Channel 14 0x0000002E APORT1YCH15 APORT1Y Channel 15 0x0000002F APORT1XCH16 APORT1X Channel 16 0x00000030 APORT1YCH17 APORT1Y Channel 17 0x00000031 APORT1XCH18 APORT1X Channel 18 0x00000032 APORT1YCH19 APORT1Y Channel 19 0x00000033 APORT1XCH20 APORT1X Channel 20 0x00000034 APORT1YCH21 APORT1Y Channel 21 0x00000035 APORT1XCH22 APORT1X Channel 22 0x00000036 APORT1YCH23 APORT1Y Channel 23 0x00000037 APORT1XCH24 APORT1X Channel 24 0x00000038 APORT1YCH25 APORT1Y Channel 25 0x00000039 APORT1XCH26 APORT1X Channel 26 0x0000003A APORT1YCH27 APORT1Y Channel 27 0x0000003B APORT1XCH28 APORT1X Channel 28 0x0000003C APORT1YCH29 APORT1Y Channel 29 0x0000003D APORT1XCH30 APORT1X Channel 30 0x0000003E APORT1YCH31 APORT1Y Channel 31 0x0000003F VBSEL VB Selection 22 1 read-write VLPSEL Low-Power Sampled Voltage Selection 24 1 read-write ROUTELOC0 I/O Routing Location Register 0x44 32 read-write n 0x0 0x0 OUTLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTEPEN I/O Routing Pine Enable Register 0x40 32 read-write n 0x0 0x0 OUTPEN ACMP Output Pin Enable 0 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 ACMPACT Analog Comparator Active 0 1 read-only ACMPOUT Analog Comparator Output 1 1 read-only APORTCONFLICT APORT Conflict Output 2 1 read-only EXTIFACT External Override Interface Active 3 1 read-only ADC0 ADC0 ADC0 0x0 0x0 0x400 registers n ADC0 9 APORTCONFLICT APORT Conflict Status Register 0x80 32 read-only n 0x0 0x0 APORT0XCONFLICT 1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral 0 1 read-only APORT0YCONFLICT 1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral 1 1 read-only APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only APORTMASTERDIS APORT Bus Master Disable Register 0x94 32 read-write n 0x0 0x0 APORT1XMASTERDIS APORT1X Master Disable 2 1 read-write APORT1YMASTERDIS APORT1Y Master Disable 3 1 read-write APORT2XMASTERDIS APORT2X Master Disable 4 1 read-write APORT2YMASTERDIS APORT2Y Master Disable 5 1 read-write APORT3XMASTERDIS APORT3X Master Disable 6 1 read-write APORT3YMASTERDIS APORT3Y Master Disable 7 1 read-write APORT4XMASTERDIS APORT4X Master Disable 8 1 read-write APORT4YMASTERDIS APORT4Y Master Disable 9 1 read-write APORTREQ APORT Request Status Register 0x7C 32 read-only n 0x0 0x0 APORT0XREQ 1 If the Bus Connected to APORT0X is Requested 0 1 read-only APORT0YREQ 1 If the Bus Connected to APORT0Y is Requested 1 1 read-only APORT1XREQ 1 If the Bus Connected to APORT1X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1Y is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only BIASPROG Bias Programming Register for Various Analog Blocks Used in ADC Operation 0x30 32 read-write n 0x0 0x0 ADCBIASPROG Bias Programming Value of Analog ADC Block 0 4 read-write NORMAL Normal power (use for 1Msps operation) 0x00000000 SCALE2 Scaling bias to 1/2 0x00000004 SCALE4 Scaling bias to 1/4 0x00000008 SCALE8 Scaling bias to 1/8 0x0000000C SCALE16 Scaling bias to 1/16 0x0000000E SCALE32 Scaling bias to 1/32 0x0000000F GPBIASACC Accuracy Setting for the System Bias During ADC Operation 16 1 read-write VFAULTCLR Clear VREFOF Flag 12 1 read-write CAL Calibration Register 0x34 32 read-write n 0x0 0x0 CALEN Calibration Mode is Enabled 31 1 read-write OFFSETINVMODE Negative Single-ended Offset Calibration is Enabled 15 1 read-write SCANGAIN Scan Mode Gain Calibration Value 24 7 read-write SCANOFFSET Scan Mode Offset Calibration Value for Differential or Positive Single-ended Mode 16 4 read-write SCANOFFSETINV Scan Mode Offset Calibration Value for Negative Single-ended Mode 20 4 read-write SINGLEGAIN Single Mode Gain Calibration Value 8 7 read-write SINGLEOFFSET Single Mode Offset Calibration Value for Differential or Positive Single-ended Mode 0 4 read-write SINGLEOFFSETINV Single Mode Offset Calibration Value for Negative Single-ended Mode 4 4 read-write CMD Command Register 0x8 32 write-only n 0x0 0x0 SCANSTART Scan Sequence Start 2 1 write-only SCANSTOP Scan Sequence Stop 3 1 write-only SINGLESTART Single Channel Conversion Start 0 1 write-only SINGLESTOP Single Channel Conversion Stop 1 1 write-only CMPTHR Compare Threshold Register 0x2C 32 read-write n 0x0 0x0 ADGT Greater Than Compare Threshold 16 16 read-write ADLT Less Than Compare Threshold 0 16 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ADCCLKMODE ADC Clock Mode 7 1 read-write ASYNCCLKEN Selects ASYNC CLK Enable Mode When ADCCLKMODE=1 6 1 read-write CHCONMODE Channel Connect 29 1 read-write CHCONREFWARMIDLE Channel Connect and Reference Warm Sel When ADC is IDLE 30 2 read-write PREFSCAN Keep scan reference warm and APORT switches for first scan channel closed if WARMUPMODE is not NORMAL 0x00000000 PREFSINGLE Keep single reference warm and keep APORT switches for single channel closed if WARMUPMODE is not NORMAL 0x00000001 KEEPPREV Keep last used reference warm and keep APORT switches for corresponding channel closed if WARMUPMODE is not NORMAL 0x00000002 DBGHALT Debug Mode Halt Enable 28 1 read-write OVSRSEL Oversample Rate Select 24 4 read-write X2 2 samples for each conversion result 0x00000000 X4 4 samples for each conversion result 0x00000001 X8 8 samples for each conversion result 0x00000002 X16 16 samples for each conversion result 0x00000003 X32 32 samples for each conversion result 0x00000004 X64 64 samples for each conversion result 0x00000005 X128 128 samples for each conversion result 0x00000006 X256 256 samples for each conversion result 0x00000007 X512 512 samples for each conversion result 0x00000008 X1024 1024 samples for each conversion result 0x00000009 X2048 2048 samples for each conversion result 0x0000000A X4096 4096 samples for each conversion result 0x0000000B PRESC Prescalar Setting for ADC Sample and Conversion Clock 8 7 read-write NODIVISION None 0x00000000 SCANDMAWU SCANFIFO DMA Wakeup 3 1 read-write SINGLEDMAWU SINGLEFIFO DMA Wakeup 2 1 read-write TAILGATE Conversion Tailgating 4 1 read-write TIMEBASE 1us Time Base 16 7 read-write WARMUPMODE Warm-up Mode 0 2 read-write NORMAL ADC is shut down after each conversion. 5us warmup time is used before each conversion. 0x00000000 KEEPINSTANDBY ADC is kept in standby mode between conversions. 1us warmup time is used before each conversion. 0x00000001 KEEPINSLOWACC ADC is kept in slow acquisition mode between conversions. 1us warmup time is used before each conversion. 0x00000002 KEEPADCWARM ADC is kept on after conversions, allowing for continuous conversion. 0x00000003 IEN Interrupt Enable Register 0x44 32 read-write n 0x0 0x0 EM23ERR EM23ERR Interrupt Enable 29 1 read-write PROGERR PROGERR Interrupt Enable 25 1 read-write PRSTIMEDERR PRSTIMEDERR Interrupt Enable 28 1 read-write SCAN SCAN Interrupt Enable 1 1 read-write SCANCMP SCANCMP Interrupt Enable 17 1 read-write SCANEXTPEND SCANEXTPEND Interrupt Enable 26 1 read-write SCANOF SCANOF Interrupt Enable 9 1 read-write SCANPEND SCANPEND Interrupt Enable 27 1 read-write SCANUF SCANUF Interrupt Enable 11 1 read-write SINGLE SINGLE Interrupt Enable 0 1 read-write SINGLECMP SINGLECMP Interrupt Enable 16 1 read-write SINGLEOF SINGLEOF Interrupt Enable 8 1 read-write SINGLEUF SINGLEUF Interrupt Enable 10 1 read-write VREFOV VREFOV Interrupt Enable 24 1 read-write IF Interrupt Flag Register 0x38 32 read-only n 0x0 0x0 EM23ERR EM23 Entry Error Flag 29 1 read-only PROGERR Programming Error Interrupt Flag 25 1 read-only PRSTIMEDERR PRS Timed Mode Error Flag 28 1 read-only SCAN Scan Conversion Complete Interrupt Flag 1 1 read-only SCANCMP Scan Result Compare Match Interrupt Flag 17 1 read-only SCANEXTPEND External Scan Trigger Pending Flag 26 1 read-only SCANOF Scan FIFO Overflow Interrupt Flag 9 1 read-only SCANPEND Scan Trigger Pending Flag 27 1 read-only SCANUF Scan FIFO Underflow Interrupt Flag 11 1 read-only SINGLE Single Conversion Complete Interrupt Flag 0 1 read-only SINGLECMP Single Result Compare Match Interrupt Flag 16 1 read-only SINGLEOF Single FIFO Overflow Interrupt Flag 8 1 read-only SINGLEUF Single FIFO Underflow Interrupt Flag 10 1 read-only VREFOV VREF Over Voltage Interrupt Flag 24 1 read-only IFC Interrupt Flag Clear Register 0x40 32 write-only n 0x0 0x0 EM23ERR Clear EM23ERR Interrupt Flag 29 1 write-only PROGERR Clear PROGERR Interrupt Flag 25 1 write-only PRSTIMEDERR Clear PRSTIMEDERR Interrupt Flag 28 1 write-only SCANCMP Clear SCANCMP Interrupt Flag 17 1 write-only SCANEXTPEND Clear SCANEXTPEND Interrupt Flag 26 1 write-only SCANOF Clear SCANOF Interrupt Flag 9 1 write-only SCANPEND Clear SCANPEND Interrupt Flag 27 1 write-only SCANUF Clear SCANUF Interrupt Flag 11 1 write-only SINGLECMP Clear SINGLECMP Interrupt Flag 16 1 write-only SINGLEOF Clear SINGLEOF Interrupt Flag 8 1 write-only SINGLEUF Clear SINGLEUF Interrupt Flag 10 1 write-only VREFOV Clear VREFOV Interrupt Flag 24 1 write-only IFS Interrupt Flag Set Register 0x3C 32 write-only n 0x0 0x0 EM23ERR Set EM23ERR Interrupt Flag 29 1 write-only PROGERR Set PROGERR Interrupt Flag 25 1 write-only PRSTIMEDERR Set PRSTIMEDERR Interrupt Flag 28 1 write-only SCANCMP Set SCANCMP Interrupt Flag 17 1 write-only SCANEXTPEND Set SCANEXTPEND Interrupt Flag 26 1 write-only SCANOF Set SCANOF Interrupt Flag 9 1 write-only SCANPEND Set SCANPEND Interrupt Flag 27 1 write-only SCANUF Set SCANUF Interrupt Flag 11 1 write-only SINGLECMP Set SINGLECMP Interrupt Flag 16 1 write-only SINGLEOF Set SINGLEOF Interrupt Flag 8 1 write-only SINGLEUF Set SINGLEUF Interrupt Flag 10 1 write-only VREFOV Set VREFOV Interrupt Flag 24 1 write-only SCANCTRL Scan Control Register 0x18 32 read-write n 0x0 0x0 ADJ Scan Sequence Result Adjustment 2 1 read-write AT Scan Acquisition Time 24 4 read-write 1CYCLE 1 conversion clock cycle acquisition time for scan 0x00000000 2CYCLES 2 conversion clock cycles acquisition time for scan 0x00000001 3CYCLES 3 conversion clock cycles acquisition time for scan 0x00000002 4CYCLES 4 conversion clock cycles acquisition time for scan 0x00000003 8CYCLES 8 conversion clock cycles acquisition time for scan 0x00000004 16CYCLES 16 conversion clock cycles acquisition time for scan 0x00000005 32CYCLES 32 conversion clock cycles acquisition time for scan 0x00000006 64CYCLES 64 conversion clock cycles acquisition time for scan 0x00000007 128CYCLES 128 conversion clock cycles acquisition time for scan 0x00000008 256CYCLES 256 conversion clock cycles acquisition time for scan 0x00000009 CMPEN Compare Logic Enable for Scan 31 1 read-write DIFF Scan Sequence Differential Mode 1 1 read-write PRSEN Scan Sequence PRS Trigger Enable 29 1 read-write REF Scan Sequence Reference Selection 5 3 read-write 1V25 VFS = 1.25V with internal VBGR reference 0x00000000 2V5 VFS = 2.5V with internal VBGR reference 0x00000001 VDD VFS = AVDD with AVDD as reference source 0x00000002 5V VFS = 5V with internal VBGR reference 0x00000003 EXTSINGLE Single ended external reference 0x00000004 2XEXTDIFF Differential external reference, 2x 0x00000005 2XVDD VFS=2xAVDD with AVDD as the reference source 0x00000006 CONF Use SCANCTRLX to configure reference 0x00000007 REP Scan Sequence Repetitive Mode 0 1 read-write RES Scan Sequence Resolution Select 3 2 read-write 12BIT 12-bit resolution 0x00000000 8BIT 8-bit resolution 0x00000001 6BIT 6-bit resolution 0x00000002 OVS Oversampling enabled. Oversampling rate is set in OVSRSEL 0x00000003 SCANCTRLX Scan Control Register Continued 0x1C 32 read-write n 0x0 0x0 CONVSTARTDELAY Delay Next Conversion Start If CONVSTARTDELAYEN is Set 22 5 read-write CONVSTARTDELAYEN Enable Delaying Next Conversion Start 27 1 read-write DVL Scan DV Level Select 12 2 read-write FIFOOFACT Scan FIFO Overflow Action 14 1 read-write PRSMODE Scan PRS Trigger Mode 16 1 read-write PRSSEL Scan Sequence PRS Trigger Select 17 5 read-write PRSCH0 PRS ch 0 triggers scan sequence 0x00000000 PRSCH1 PRS ch 1 triggers scan sequence 0x00000001 PRSCH2 PRS ch 2 triggers scan sequence 0x00000002 PRSCH3 PRS ch 3 triggers scan sequence 0x00000003 PRSCH4 PRS ch 4 triggers scan sequence 0x00000004 PRSCH5 PRS ch 5 triggers scan sequence 0x00000005 PRSCH6 PRS ch 6 triggers scan sequence 0x00000006 PRSCH7 PRS ch 7 triggers scan sequence 0x00000007 PRSCH8 PRS ch 8 triggers scan sequence 0x00000008 PRSCH9 PRS ch 9 triggers scan sequence 0x00000009 PRSCH10 PRS ch 10 triggers scan sequence 0x0000000A PRSCH11 PRS ch 11 triggers scan sequence 0x0000000B PRSCH12 PRS ch 12 triggers scan sequence 0x0000000C PRSCH13 PRS ch 13 triggers scan sequence 0x0000000D PRSCH14 PRS ch 14 triggers scan sequence 0x0000000E PRSCH15 PRS ch 15 triggers scan sequence 0x0000000F PRSCH16 PRS ch 16 triggers scan sequence 0x00000010 PRSCH17 PRS ch 17 triggers scan sequence 0x00000011 PRSCH18 PRS ch 18 triggers scan sequence 0x00000012 PRSCH19 PRS ch 19 triggers scan sequence 0x00000013 PRSCH20 PRS ch 20 triggers scan sequence 0x00000014 PRSCH21 PRS ch 21 triggers scan sequence 0x00000015 PRSCH22 PRS ch 22 triggers scan sequence 0x00000016 PRSCH23 PRS ch 23 triggers scan sequence 0x00000017 REPDELAY REPDELAY Select for SCAN REP Mode 29 3 read-write NODELAY No delay 0x00000000 4CYCLES 4 conversion clock cycles 0x00000001 8CYCLES 8 conversion clock cycles 0x00000002 16CYCLES 16 conversion clock cycles 0x00000003 32CYCLES 32 conversion clock cycles 0x00000004 64CYCLES 64 conversion clock cycles 0x00000005 128CYCLES 128 conversion clock cycles 0x00000006 256CYCLES 256 conversion clock cycles 0x00000007 VINATT Code for VIN Attenuation Factor 8 4 read-write VREFATT Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5 4 4 read-write VREFATTFIX Enable Fixed Scaling on VREF 3 1 read-write VREFSEL Scan Channel Reference Selection 0 3 read-write VBGR Internal 0.83V Bandgap reference 0x00000000 VDDXWATT Scaled AVDD: AVDD*(the VREF attenuation factor) 0x00000001 VREFPWATT Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor) 0x00000002 VREFP Raw single ended external Vref: ADCn_EXTP 0x00000003 VREFPNWATT Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor) 0x00000005 VREFPN Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN) 0x00000006 VBGRLOW Internal Bandgap reference at low setting 0.78V 0x00000007 SCANDATA Scan Conversion Result Data 0x4C 32 read-only n 0x0 0x0 modifyExternal DATA Scan Conversion Result Data 0 32 read-only SCANDATAP Scan Sequence Result Data Peek Register 0x54 32 read-only n 0x0 0x0 DATAP Scan Conversion Result Data Peek 0 32 read-only SCANDATAX Scan Sequence Result Data + Data Source Register 0x68 32 read-only n 0x0 0x0 modifyExternal DATA Scan Conversion Result Data 0 16 read-only SCANINPUTID Scan Conversion Input ID 16 5 read-only SCANDATAXP Scan Sequence Result Data + Data Source Peek Register 0x6C 32 read-only n 0x0 0x0 DATAP Scan Conversion Result Data Peek 0 16 read-only SCANINPUTIDPEEK Scan Conversion Data Source Peek 16 5 read-only SCANFIFOCLEAR Scan FIFO Clear Register 0x90 32 write-only n 0x0 0x0 SCANFIFOCLEAR Clear Scan FIFO Content 0 1 write-only SCANFIFOCOUNT Scan FIFO Count Register 0x88 32 read-only n 0x0 0x0 SCANDC Scan Data Count 0 3 read-only SCANINPUTSEL Input Selection Register for Scan Mode 0x24 32 read-write n 0x0 0x0 INPUT0TO7SEL Inputs Chosen for ADCn_INPUT7-ADCn_INPUT0 as Referred in SCANMASK 0 5 read-write APORT0CH0TO7 None 0x00000000 APORT0CH8TO15 None 0x00000001 APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT2CH0TO7 None 0x00000008 APORT2CH8TO15 None 0x00000009 APORT2CH16TO23 None 0x0000000A APORT2CH24TO31 None 0x0000000B APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F APORT4CH0TO7 None 0x00000010 APORT4CH8TO15 None 0x00000011 APORT4CH16TO23 None 0x00000012 APORT4CH24TO31 None 0x00000013 INPUT16TO23SEL Inputs Chosen for ADCn_INPUT16-ADCn_INPUT23 as Referred in SCANMASK 16 5 read-write APORT0CH0TO7 None 0x00000000 APORT0CH8TO15 None 0x00000001 APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT2CH0TO7 None 0x00000008 APORT2CH8TO15 None 0x00000009 APORT2CH16TO23 None 0x0000000A APORT2CH24TO31 None 0x0000000B APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F APORT4CH0TO7 None 0x00000010 APORT4CH8TO15 None 0x00000011 APORT4CH16TO23 None 0x00000012 APORT4CH24TO31 None 0x00000013 INPUT24TO31SEL Inputs Chosen for ADCn_INPUT24-ADCn_INPUT31 as Referred in SCANMASK 24 5 read-write APORT0CH0TO7 None 0x00000000 APORT0CH8TO15 None 0x00000001 APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT2CH0TO7 None 0x00000008 APORT2CH8TO15 None 0x00000009 APORT2CH16TO23 None 0x0000000A APORT2CH24TO31 None 0x0000000B APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F APORT4CH0TO7 None 0x00000010 APORT4CH8TO15 None 0x00000011 APORT4CH16TO23 None 0x00000012 APORT4CH24TO31 None 0x00000013 INPUT8TO15SEL Inputs Chosen for ADCn_INPUT8-ADCn_INPUT15 as Referred in SCANMASK 8 5 read-write APORT0CH0TO7 None 0x00000000 APORT0CH8TO15 None 0x00000001 APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT2CH0TO7 None 0x00000008 APORT2CH8TO15 None 0x00000009 APORT2CH16TO23 None 0x0000000A APORT2CH24TO31 None 0x0000000B APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F APORT4CH0TO7 None 0x00000010 APORT4CH8TO15 None 0x00000011 APORT4CH16TO23 None 0x00000012 APORT4CH24TO31 None 0x00000013 SCANMASK Scan Sequence Input Mask Register 0x20 32 read-write n 0x0 0x0 SCANINPUTEN Scan Sequence Input Mask 0 32 read-write SCANNEGSEL Negative Input Select Register for Scan 0x28 32 read-write n 0x0 0x0 INPUT0NEGSEL Negative Input Select Register for ADCn_INPUT0 in Differential Scan Mode 0 2 read-write INPUT1 Selects ADCn_INPUT1 as negative channel input 0x00000000 INPUT3 Selects ADCn_INPUT3 as negative channel input 0x00000001 INPUT5 Selects ADCn_INPUT5 as negative channel input 0x00000002 INPUT7 Selects ADCn_INPUT7 as negative channel input 0x00000003 INPUT11NEGSEL Negative Input Select Register for ADCn_INPUT11 in Differential Scan Mode 10 2 read-write INPUT8 Selects ADCn_INPUT8 as negative channel input 0x00000000 INPUT10 Selects ADCn_INPUT10 as negative channel input 0x00000001 INPUT12 Selects ADCn_INPUT12 as negative channel input 0x00000002 INPUT14 Selects ADCn_INPUT14 as negative channel input 0x00000003 INPUT13NEGSEL Negative Input Select Register for ADCn_INPUT13 in Differential Scan Mode 12 2 read-write INPUT8 Selects ADCn_INPUT8 as negative channel input 0x00000000 INPUT10 Selects ADCn_INPUT10 as negative channel input 0x00000001 INPUT12 Selects ADCn_INPUT12 as negative channel input 0x00000002 INPUT14 Selects ADCn_INPUT14 as negative channel input 0x00000003 INPUT15NEGSEL Negative Input Select Register for ADCn_INPUT15 in Differential Scan Mode 14 2 read-write INPUT8 Selects ADCn_INPUT8 as negative channel input 0x00000000 INPUT10 Selects ADCn_INPUT10 as negative channel input 0x00000001 INPUT12 Selects ADCn_INPUT12 as negative channel input 0x00000002 INPUT14 Selects ADCn_INPUT14 as negative channel input 0x00000003 INPUT2NEGSEL Negative Input Select Register for ADCn_INPUT2 in Differential Scan Mode 2 2 read-write INPUT1 Selects ADCn_INPUT1 as negative channel input 0x00000000 INPUT3 Selects ADCn_INPUT3 as negative channel input 0x00000001 INPUT5 Selects ADCn_INPUT5 as negative channel input 0x00000002 INPUT7 Selects ADCn_INPUT7 as negative channel input 0x00000003 INPUT4NEGSEL Negative Input Select Register for ADCn_INPUT4 in Differential Scan Mode 4 2 read-write INPUT1 Selects ADCn_INPUT1 as negative channel input 0x00000000 INPUT3 Selects ADCn_INPUT3 as negative channel input 0x00000001 INPUT5 Selects ADCn_INPUT5 as negative channel input 0x00000002 INPUT7 Selects ADCn_INPUT7 as negative channel input 0x00000003 INPUT6NEGSEL Negative Input Select Register for ADCn_INPUT1 in Differential Scan Mode 6 2 read-write INPUT1 Selects ADCn_INPUT1 as negative channel input 0x00000000 INPUT3 Selects ADCn_INPUT3 as negative channel input 0x00000001 INPUT5 Selects ADCn_INPUT5 as negative channel input 0x00000002 INPUT7 Selects ADCn_INPUT7 as negative channel input 0x00000003 INPUT9NEGSEL Negative Input Select Register for ADCn_INPUT9 in Differential Scan Mode 8 2 read-write INPUT8 Selects ADCn_INPUT8 as negative channel input 0x00000000 INPUT10 Selects ADCn_INPUT10 as negative channel input 0x00000001 INPUT12 Selects ADCn_INPUT12 as negative channel input 0x00000002 INPUT14 Selects ADCn_INPUT14 as negative channel input 0x00000003 SINGLECTRL Single Channel Control Register 0x10 32 read-write n 0x0 0x0 ADJ Single Channel Result Adjustment 2 1 read-write AT Single Channel Acquisition Time 24 4 read-write 1CYCLE 1 conversion clock cycle acquisition time for single channel 0x00000000 2CYCLES 2 conversion clock cycles acquisition time for single channel 0x00000001 3CYCLES 3 conversion clock cycles acquisition time for single channel 0x00000002 4CYCLES 4 conversion clock cycles acquisition time for single channel 0x00000003 8CYCLES 8 conversion clock cycles acquisition time for single channel 0x00000004 16CYCLES 16 conversion clock cycles acquisition time for single channel 0x00000005 32CYCLES 32 conversion clock cycles acquisition time for single channel 0x00000006 64CYCLES 64 conversion clock cycles acquisition time for single channel 0x00000007 128CYCLES 128 conversion clock cycles acquisition time for single channel 0x00000008 256CYCLES 256 conversion clock cycles acquisition time for single channel 0x00000009 CMPEN Compare Logic Enable for Single Channel 31 1 read-write DIFF Single Channel Differential Mode 1 1 read-write NEGSEL Single Channel Negative Input Selection 16 8 read-write POSSEL Single Channel Positive Input Selection 8 8 read-write PRSEN Single Channel PRS Trigger Enable 29 1 read-write REF Single Channel Reference Selection 5 3 read-write 1V25 VFS = 1.25V with internal VBGR reference 0x00000000 2V5 VFS = 2.5V with internal VBGR reference 0x00000001 VDD VFS = AVDD with AVDD as reference source 0x00000002 5V VFS = 5V with internal VBGR reference 0x00000003 EXTSINGLE Single ended external reference 0x00000004 2XEXTDIFF Differential external reference, 2x 0x00000005 2XVDD VFS = 2xAVDD with AVDD as the reference source 0x00000006 CONF Use SINGLECTRLX to configure reference 0x00000007 REP Single Channel Repetitive Mode 0 1 read-write RES Single Channel Resolution Select 3 2 read-write 12BIT 12-bit resolution. 0x00000000 8BIT 8-bit resolution. 0x00000001 6BIT 6-bit resolution. 0x00000002 OVS Oversampling enabled. Oversampling rate is set in OVSRSEL. 0x00000003 SINGLECTRLX Single Channel Control Register Continued 0x14 32 read-write n 0x0 0x0 CONVSTARTDELAY Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set 22 5 read-write CONVSTARTDELAYEN Enable Delaying Next Conversion Start 27 1 read-write DVL Single Channel DV Level Select 12 2 read-write FIFOOFACT Single Channel FIFO Overflow Action 14 1 read-write PRSMODE Single Channel PRS Trigger Mode 16 1 read-write PRSSEL Single Channel PRS Trigger Select 17 5 read-write PRSCH0 PRS ch 0 triggers single channel 0x00000000 PRSCH1 PRS ch 1 triggers single channel 0x00000001 PRSCH2 PRS ch 2 triggers single channel 0x00000002 PRSCH3 PRS ch 3 triggers single channel 0x00000003 PRSCH4 PRS ch 4 triggers single channel 0x00000004 PRSCH5 PRS ch 5 triggers single channel 0x00000005 PRSCH6 PRS ch 6 triggers single channel 0x00000006 PRSCH7 PRS ch 7 triggers single channel 0x00000007 PRSCH8 PRS ch 8 triggers single channel 0x00000008 PRSCH9 PRS ch 9 triggers single channel 0x00000009 PRSCH10 PRS ch 10 triggers single channel 0x0000000A PRSCH11 PRS ch 11 triggers single channel 0x0000000B PRSCH12 PRS ch 12 triggers single channel 0x0000000C PRSCH13 PRS ch 13 triggers single channel 0x0000000D PRSCH14 PRS ch 14 triggers single channel 0x0000000E PRSCH15 PRS ch 15 triggers single channel 0x0000000F PRSCH16 PRS ch 16 triggers single channel 0x00000010 PRSCH17 PRS ch 17 triggers single channel 0x00000011 PRSCH18 PRS ch 18 triggers single channel 0x00000012 PRSCH19 PRS ch 19 triggers single channel 0x00000013 PRSCH20 PRS ch 20 triggers single channel 0x00000014 PRSCH21 PRS ch 21 triggers single channel 0x00000015 PRSCH22 PRS ch 22 triggers single channel 0x00000016 PRSCH23 PRS ch 23 triggers single channel 0x00000017 REPDELAY REPDELAY Select for SINGLE REP Mode 29 3 read-write NODELAY No delay 0x00000000 4CYCLES 4 conversion clock cycles 0x00000001 8CYCLES 8 conversion clock cycles 0x00000002 16CYCLES 16 conversion clock cycles 0x00000003 32CYCLES 32 conversion clock cycles 0x00000004 64CYCLES 64 conversion clock cycles 0x00000005 128CYCLES 128 conversion clock cycles 0x00000006 256CYCLES 256 conversion clock cycles 0x00000007 VINATT Code for VIN Attenuation Factor 8 4 read-write VREFATT Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5 4 4 read-write VREFATTFIX Enable Fixed Scaling on VREF 3 1 read-write VREFSEL Single Channel Reference Selection 0 3 read-write VBGR Internal 0.83V Bandgap reference 0x00000000 VDDXWATT Scaled AVDD: AVDD*(the VREF attenuation factor) 0x00000001 VREFPWATT Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor) 0x00000002 VREFP Raw single ended external Vref: ADCn_EXTP 0x00000003 VENTROPY Special mode used to generate ENTROPY. 0x00000004 VREFPNWATT Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor) 0x00000005 VREFPN Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN) 0x00000006 VBGRLOW Internal Bandgap reference at low setting 0.78V 0x00000007 SINGLEDATA Single Conversion Result Data 0x48 32 read-only n 0x0 0x0 modifyExternal DATA Single Conversion Result Data 0 32 read-only SINGLEDATAP Single Conversion Result Data Peek Register 0x50 32 read-only n 0x0 0x0 DATAP Single Conversion Result Data Peek 0 32 read-only SINGLEFIFOCLEAR Single FIFO Clear Register 0x8C 32 write-only n 0x0 0x0 SINGLEFIFOCLEAR Clear Single FIFO Content 0 1 write-only SINGLEFIFOCOUNT Single FIFO Count Register 0x84 32 read-only n 0x0 0x0 SINGLEDC Single Data Count 0 3 read-only STATUS Status Register 0xC 32 read-only n 0x0 0x0 PROGERR Programming Error Status 10 2 read-only BUSCONF None 0x00000001 NEGSELCONF None 0x00000002 SCANACT Scan Conversion Active 1 1 read-only SCANDV Scan Data Valid 17 1 read-only SCANPENDING Scan Conversion Pending 2 1 read-only SCANREFWARM Scan Reference Warmed Up 9 1 read-only SINGLEACT Single Channel Conversion Active 0 1 read-only SINGLEDV Single Channel Data Valid 16 1 read-only SINGLEREFWARM Single Channel Reference Warmed Up 8 1 read-only WARM ADC Warmed Up 12 1 read-only ADC1 ADC1 ADC1 0x0 0x0 0x400 registers n ADC1 56 APORTCONFLICT APORT Conflict Status Register 0x80 32 read-only n 0x0 0x0 APORT0XCONFLICT 1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral 0 1 read-only APORT0YCONFLICT 1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral 1 1 read-only APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only APORTMASTERDIS APORT Bus Master Disable Register 0x94 32 read-write n 0x0 0x0 APORT1XMASTERDIS APORT1X Master Disable 2 1 read-write APORT1YMASTERDIS APORT1Y Master Disable 3 1 read-write APORT2XMASTERDIS APORT2X Master Disable 4 1 read-write APORT2YMASTERDIS APORT2Y Master Disable 5 1 read-write APORT3XMASTERDIS APORT3X Master Disable 6 1 read-write APORT3YMASTERDIS APORT3Y Master Disable 7 1 read-write APORT4XMASTERDIS APORT4X Master Disable 8 1 read-write APORT4YMASTERDIS APORT4Y Master Disable 9 1 read-write APORTREQ APORT Request Status Register 0x7C 32 read-only n 0x0 0x0 APORT0XREQ 1 If the Bus Connected to APORT0X is Requested 0 1 read-only APORT0YREQ 1 If the Bus Connected to APORT0Y is Requested 1 1 read-only APORT1XREQ 1 If the Bus Connected to APORT1X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1Y is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only BIASPROG Bias Programming Register for Various Analog Blocks Used in ADC Operation 0x30 32 read-write n 0x0 0x0 ADCBIASPROG Bias Programming Value of Analog ADC Block 0 4 read-write NORMAL Normal power (use for 1Msps operation) 0x00000000 SCALE2 Scaling bias to 1/2 0x00000004 SCALE4 Scaling bias to 1/4 0x00000008 SCALE8 Scaling bias to 1/8 0x0000000C SCALE16 Scaling bias to 1/16 0x0000000E SCALE32 Scaling bias to 1/32 0x0000000F GPBIASACC Accuracy Setting for the System Bias During ADC Operation 16 1 read-write VFAULTCLR Clear VREFOF Flag 12 1 read-write CAL Calibration Register 0x34 32 read-write n 0x0 0x0 CALEN Calibration Mode is Enabled 31 1 read-write OFFSETINVMODE Negative Single-ended Offset Calibration is Enabled 15 1 read-write SCANGAIN Scan Mode Gain Calibration Value 24 7 read-write SCANOFFSET Scan Mode Offset Calibration Value for Differential or Positive Single-ended Mode 16 4 read-write SCANOFFSETINV Scan Mode Offset Calibration Value for Negative Single-ended Mode 20 4 read-write SINGLEGAIN Single Mode Gain Calibration Value 8 7 read-write SINGLEOFFSET Single Mode Offset Calibration Value for Differential or Positive Single-ended Mode 0 4 read-write SINGLEOFFSETINV Single Mode Offset Calibration Value for Negative Single-ended Mode 4 4 read-write CMD Command Register 0x8 32 write-only n 0x0 0x0 SCANSTART Scan Sequence Start 2 1 write-only SCANSTOP Scan Sequence Stop 3 1 write-only SINGLESTART Single Channel Conversion Start 0 1 write-only SINGLESTOP Single Channel Conversion Stop 1 1 write-only CMPTHR Compare Threshold Register 0x2C 32 read-write n 0x0 0x0 ADGT Greater Than Compare Threshold 16 16 read-write ADLT Less Than Compare Threshold 0 16 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ADCCLKMODE ADC Clock Mode 7 1 read-write ASYNCCLKEN Selects ASYNC CLK Enable Mode When ADCCLKMODE=1 6 1 read-write CHCONMODE Channel Connect 29 1 read-write CHCONREFWARMIDLE Channel Connect and Reference Warm Sel When ADC is IDLE 30 2 read-write PREFSCAN Keep scan reference warm and APORT switches for first scan channel closed if WARMUPMODE is not NORMAL 0x00000000 PREFSINGLE Keep single reference warm and keep APORT switches for single channel closed if WARMUPMODE is not NORMAL 0x00000001 KEEPPREV Keep last used reference warm and keep APORT switches for corresponding channel closed if WARMUPMODE is not NORMAL 0x00000002 DBGHALT Debug Mode Halt Enable 28 1 read-write OVSRSEL Oversample Rate Select 24 4 read-write X2 2 samples for each conversion result 0x00000000 X4 4 samples for each conversion result 0x00000001 X8 8 samples for each conversion result 0x00000002 X16 16 samples for each conversion result 0x00000003 X32 32 samples for each conversion result 0x00000004 X64 64 samples for each conversion result 0x00000005 X128 128 samples for each conversion result 0x00000006 X256 256 samples for each conversion result 0x00000007 X512 512 samples for each conversion result 0x00000008 X1024 1024 samples for each conversion result 0x00000009 X2048 2048 samples for each conversion result 0x0000000A X4096 4096 samples for each conversion result 0x0000000B PRESC Prescalar Setting for ADC Sample and Conversion Clock 8 7 read-write NODIVISION None 0x00000000 SCANDMAWU SCANFIFO DMA Wakeup 3 1 read-write SINGLEDMAWU SINGLEFIFO DMA Wakeup 2 1 read-write TAILGATE Conversion Tailgating 4 1 read-write TIMEBASE 1us Time Base 16 7 read-write WARMUPMODE Warm-up Mode 0 2 read-write NORMAL ADC is shut down after each conversion. 5us warmup time is used before each conversion. 0x00000000 KEEPINSTANDBY ADC is kept in standby mode between conversions. 1us warmup time is used before each conversion. 0x00000001 KEEPINSLOWACC ADC is kept in slow acquisition mode between conversions. 1us warmup time is used before each conversion. 0x00000002 KEEPADCWARM ADC is kept on after conversions, allowing for continuous conversion. 0x00000003 IEN Interrupt Enable Register 0x44 32 read-write n 0x0 0x0 EM23ERR EM23ERR Interrupt Enable 29 1 read-write PROGERR PROGERR Interrupt Enable 25 1 read-write PRSTIMEDERR PRSTIMEDERR Interrupt Enable 28 1 read-write SCAN SCAN Interrupt Enable 1 1 read-write SCANCMP SCANCMP Interrupt Enable 17 1 read-write SCANEXTPEND SCANEXTPEND Interrupt Enable 26 1 read-write SCANOF SCANOF Interrupt Enable 9 1 read-write SCANPEND SCANPEND Interrupt Enable 27 1 read-write SCANUF SCANUF Interrupt Enable 11 1 read-write SINGLE SINGLE Interrupt Enable 0 1 read-write SINGLECMP SINGLECMP Interrupt Enable 16 1 read-write SINGLEOF SINGLEOF Interrupt Enable 8 1 read-write SINGLEUF SINGLEUF Interrupt Enable 10 1 read-write VREFOV VREFOV Interrupt Enable 24 1 read-write IF Interrupt Flag Register 0x38 32 read-only n 0x0 0x0 EM23ERR EM23 Entry Error Flag 29 1 read-only PROGERR Programming Error Interrupt Flag 25 1 read-only PRSTIMEDERR PRS Timed Mode Error Flag 28 1 read-only SCAN Scan Conversion Complete Interrupt Flag 1 1 read-only SCANCMP Scan Result Compare Match Interrupt Flag 17 1 read-only SCANEXTPEND External Scan Trigger Pending Flag 26 1 read-only SCANOF Scan FIFO Overflow Interrupt Flag 9 1 read-only SCANPEND Scan Trigger Pending Flag 27 1 read-only SCANUF Scan FIFO Underflow Interrupt Flag 11 1 read-only SINGLE Single Conversion Complete Interrupt Flag 0 1 read-only SINGLECMP Single Result Compare Match Interrupt Flag 16 1 read-only SINGLEOF Single FIFO Overflow Interrupt Flag 8 1 read-only SINGLEUF Single FIFO Underflow Interrupt Flag 10 1 read-only VREFOV VREF Over Voltage Interrupt Flag 24 1 read-only IFC Interrupt Flag Clear Register 0x40 32 write-only n 0x0 0x0 EM23ERR Clear EM23ERR Interrupt Flag 29 1 write-only PROGERR Clear PROGERR Interrupt Flag 25 1 write-only PRSTIMEDERR Clear PRSTIMEDERR Interrupt Flag 28 1 write-only SCANCMP Clear SCANCMP Interrupt Flag 17 1 write-only SCANEXTPEND Clear SCANEXTPEND Interrupt Flag 26 1 write-only SCANOF Clear SCANOF Interrupt Flag 9 1 write-only SCANPEND Clear SCANPEND Interrupt Flag 27 1 write-only SCANUF Clear SCANUF Interrupt Flag 11 1 write-only SINGLECMP Clear SINGLECMP Interrupt Flag 16 1 write-only SINGLEOF Clear SINGLEOF Interrupt Flag 8 1 write-only SINGLEUF Clear SINGLEUF Interrupt Flag 10 1 write-only VREFOV Clear VREFOV Interrupt Flag 24 1 write-only IFS Interrupt Flag Set Register 0x3C 32 write-only n 0x0 0x0 EM23ERR Set EM23ERR Interrupt Flag 29 1 write-only PROGERR Set PROGERR Interrupt Flag 25 1 write-only PRSTIMEDERR Set PRSTIMEDERR Interrupt Flag 28 1 write-only SCANCMP Set SCANCMP Interrupt Flag 17 1 write-only SCANEXTPEND Set SCANEXTPEND Interrupt Flag 26 1 write-only SCANOF Set SCANOF Interrupt Flag 9 1 write-only SCANPEND Set SCANPEND Interrupt Flag 27 1 write-only SCANUF Set SCANUF Interrupt Flag 11 1 write-only SINGLECMP Set SINGLECMP Interrupt Flag 16 1 write-only SINGLEOF Set SINGLEOF Interrupt Flag 8 1 write-only SINGLEUF Set SINGLEUF Interrupt Flag 10 1 write-only VREFOV Set VREFOV Interrupt Flag 24 1 write-only SCANCTRL Scan Control Register 0x18 32 read-write n 0x0 0x0 ADJ Scan Sequence Result Adjustment 2 1 read-write AT Scan Acquisition Time 24 4 read-write 1CYCLE 1 conversion clock cycle acquisition time for scan 0x00000000 2CYCLES 2 conversion clock cycles acquisition time for scan 0x00000001 3CYCLES 3 conversion clock cycles acquisition time for scan 0x00000002 4CYCLES 4 conversion clock cycles acquisition time for scan 0x00000003 8CYCLES 8 conversion clock cycles acquisition time for scan 0x00000004 16CYCLES 16 conversion clock cycles acquisition time for scan 0x00000005 32CYCLES 32 conversion clock cycles acquisition time for scan 0x00000006 64CYCLES 64 conversion clock cycles acquisition time for scan 0x00000007 128CYCLES 128 conversion clock cycles acquisition time for scan 0x00000008 256CYCLES 256 conversion clock cycles acquisition time for scan 0x00000009 CMPEN Compare Logic Enable for Scan 31 1 read-write DIFF Scan Sequence Differential Mode 1 1 read-write PRSEN Scan Sequence PRS Trigger Enable 29 1 read-write REF Scan Sequence Reference Selection 5 3 read-write 1V25 VFS = 1.25V with internal VBGR reference 0x00000000 2V5 VFS = 2.5V with internal VBGR reference 0x00000001 VDD VFS = AVDD with AVDD as reference source 0x00000002 5V VFS = 5V with internal VBGR reference 0x00000003 EXTSINGLE Single ended external reference 0x00000004 2XEXTDIFF Differential external reference, 2x 0x00000005 2XVDD VFS=2xAVDD with AVDD as the reference source 0x00000006 CONF Use SCANCTRLX to configure reference 0x00000007 REP Scan Sequence Repetitive Mode 0 1 read-write RES Scan Sequence Resolution Select 3 2 read-write 12BIT 12-bit resolution 0x00000000 8BIT 8-bit resolution 0x00000001 6BIT 6-bit resolution 0x00000002 OVS Oversampling enabled. Oversampling rate is set in OVSRSEL 0x00000003 SCANCTRLX Scan Control Register Continued 0x1C 32 read-write n 0x0 0x0 CONVSTARTDELAY Delay Next Conversion Start If CONVSTARTDELAYEN is Set 22 5 read-write CONVSTARTDELAYEN Enable Delaying Next Conversion Start 27 1 read-write DVL Scan DV Level Select 12 2 read-write FIFOOFACT Scan FIFO Overflow Action 14 1 read-write PRSMODE Scan PRS Trigger Mode 16 1 read-write PRSSEL Scan Sequence PRS Trigger Select 17 5 read-write PRSCH0 PRS ch 0 triggers scan sequence 0x00000000 PRSCH1 PRS ch 1 triggers scan sequence 0x00000001 PRSCH2 PRS ch 2 triggers scan sequence 0x00000002 PRSCH3 PRS ch 3 triggers scan sequence 0x00000003 PRSCH4 PRS ch 4 triggers scan sequence 0x00000004 PRSCH5 PRS ch 5 triggers scan sequence 0x00000005 PRSCH6 PRS ch 6 triggers scan sequence 0x00000006 PRSCH7 PRS ch 7 triggers scan sequence 0x00000007 PRSCH8 PRS ch 8 triggers scan sequence 0x00000008 PRSCH9 PRS ch 9 triggers scan sequence 0x00000009 PRSCH10 PRS ch 10 triggers scan sequence 0x0000000A PRSCH11 PRS ch 11 triggers scan sequence 0x0000000B PRSCH12 PRS ch 12 triggers scan sequence 0x0000000C PRSCH13 PRS ch 13 triggers scan sequence 0x0000000D PRSCH14 PRS ch 14 triggers scan sequence 0x0000000E PRSCH15 PRS ch 15 triggers scan sequence 0x0000000F PRSCH16 PRS ch 16 triggers scan sequence 0x00000010 PRSCH17 PRS ch 17 triggers scan sequence 0x00000011 PRSCH18 PRS ch 18 triggers scan sequence 0x00000012 PRSCH19 PRS ch 19 triggers scan sequence 0x00000013 PRSCH20 PRS ch 20 triggers scan sequence 0x00000014 PRSCH21 PRS ch 21 triggers scan sequence 0x00000015 PRSCH22 PRS ch 22 triggers scan sequence 0x00000016 PRSCH23 PRS ch 23 triggers scan sequence 0x00000017 REPDELAY REPDELAY Select for SCAN REP Mode 29 3 read-write NODELAY No delay 0x00000000 4CYCLES 4 conversion clock cycles 0x00000001 8CYCLES 8 conversion clock cycles 0x00000002 16CYCLES 16 conversion clock cycles 0x00000003 32CYCLES 32 conversion clock cycles 0x00000004 64CYCLES 64 conversion clock cycles 0x00000005 128CYCLES 128 conversion clock cycles 0x00000006 256CYCLES 256 conversion clock cycles 0x00000007 VINATT Code for VIN Attenuation Factor 8 4 read-write VREFATT Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5 4 4 read-write VREFATTFIX Enable Fixed Scaling on VREF 3 1 read-write VREFSEL Scan Channel Reference Selection 0 3 read-write VBGR Internal 0.83V Bandgap reference 0x00000000 VDDXWATT Scaled AVDD: AVDD*(the VREF attenuation factor) 0x00000001 VREFPWATT Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor) 0x00000002 VREFP Raw single ended external Vref: ADCn_EXTP 0x00000003 VREFPNWATT Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor) 0x00000005 VREFPN Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN) 0x00000006 VBGRLOW Internal Bandgap reference at low setting 0.78V 0x00000007 SCANDATA Scan Conversion Result Data 0x4C 32 read-only n 0x0 0x0 modifyExternal DATA Scan Conversion Result Data 0 32 read-only SCANDATAP Scan Sequence Result Data Peek Register 0x54 32 read-only n 0x0 0x0 DATAP Scan Conversion Result Data Peek 0 32 read-only SCANDATAX Scan Sequence Result Data + Data Source Register 0x68 32 read-only n 0x0 0x0 modifyExternal DATA Scan Conversion Result Data 0 16 read-only SCANINPUTID Scan Conversion Input ID 16 5 read-only SCANDATAXP Scan Sequence Result Data + Data Source Peek Register 0x6C 32 read-only n 0x0 0x0 DATAP Scan Conversion Result Data Peek 0 16 read-only SCANINPUTIDPEEK Scan Conversion Data Source Peek 16 5 read-only SCANFIFOCLEAR Scan FIFO Clear Register 0x90 32 write-only n 0x0 0x0 SCANFIFOCLEAR Clear Scan FIFO Content 0 1 write-only SCANFIFOCOUNT Scan FIFO Count Register 0x88 32 read-only n 0x0 0x0 SCANDC Scan Data Count 0 3 read-only SCANINPUTSEL Input Selection Register for Scan Mode 0x24 32 read-write n 0x0 0x0 INPUT0TO7SEL Inputs Chosen for ADCn_INPUT7-ADCn_INPUT0 as Referred in SCANMASK 0 5 read-write APORT0CH0TO7 None 0x00000000 APORT0CH8TO15 None 0x00000001 APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT2CH0TO7 None 0x00000008 APORT2CH8TO15 None 0x00000009 APORT2CH16TO23 None 0x0000000A APORT2CH24TO31 None 0x0000000B APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F APORT4CH0TO7 None 0x00000010 APORT4CH8TO15 None 0x00000011 APORT4CH16TO23 None 0x00000012 APORT4CH24TO31 None 0x00000013 INPUT16TO23SEL Inputs Chosen for ADCn_INPUT16-ADCn_INPUT23 as Referred in SCANMASK 16 5 read-write APORT0CH0TO7 None 0x00000000 APORT0CH8TO15 None 0x00000001 APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT2CH0TO7 None 0x00000008 APORT2CH8TO15 None 0x00000009 APORT2CH16TO23 None 0x0000000A APORT2CH24TO31 None 0x0000000B APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F APORT4CH0TO7 None 0x00000010 APORT4CH8TO15 None 0x00000011 APORT4CH16TO23 None 0x00000012 APORT4CH24TO31 None 0x00000013 INPUT24TO31SEL Inputs Chosen for ADCn_INPUT24-ADCn_INPUT31 as Referred in SCANMASK 24 5 read-write APORT0CH0TO7 None 0x00000000 APORT0CH8TO15 None 0x00000001 APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT2CH0TO7 None 0x00000008 APORT2CH8TO15 None 0x00000009 APORT2CH16TO23 None 0x0000000A APORT2CH24TO31 None 0x0000000B APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F APORT4CH0TO7 None 0x00000010 APORT4CH8TO15 None 0x00000011 APORT4CH16TO23 None 0x00000012 APORT4CH24TO31 None 0x00000013 INPUT8TO15SEL Inputs Chosen for ADCn_INPUT8-ADCn_INPUT15 as Referred in SCANMASK 8 5 read-write APORT0CH0TO7 None 0x00000000 APORT0CH8TO15 None 0x00000001 APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT2CH0TO7 None 0x00000008 APORT2CH8TO15 None 0x00000009 APORT2CH16TO23 None 0x0000000A APORT2CH24TO31 None 0x0000000B APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F APORT4CH0TO7 None 0x00000010 APORT4CH8TO15 None 0x00000011 APORT4CH16TO23 None 0x00000012 APORT4CH24TO31 None 0x00000013 SCANMASK Scan Sequence Input Mask Register 0x20 32 read-write n 0x0 0x0 SCANINPUTEN Scan Sequence Input Mask 0 32 read-write SCANNEGSEL Negative Input Select Register for Scan 0x28 32 read-write n 0x0 0x0 INPUT0NEGSEL Negative Input Select Register for ADCn_INPUT0 in Differential Scan Mode 0 2 read-write INPUT1 Selects ADCn_INPUT1 as negative channel input 0x00000000 INPUT3 Selects ADCn_INPUT3 as negative channel input 0x00000001 INPUT5 Selects ADCn_INPUT5 as negative channel input 0x00000002 INPUT7 Selects ADCn_INPUT7 as negative channel input 0x00000003 INPUT11NEGSEL Negative Input Select Register for ADCn_INPUT11 in Differential Scan Mode 10 2 read-write INPUT8 Selects ADCn_INPUT8 as negative channel input 0x00000000 INPUT10 Selects ADCn_INPUT10 as negative channel input 0x00000001 INPUT12 Selects ADCn_INPUT12 as negative channel input 0x00000002 INPUT14 Selects ADCn_INPUT14 as negative channel input 0x00000003 INPUT13NEGSEL Negative Input Select Register for ADCn_INPUT13 in Differential Scan Mode 12 2 read-write INPUT8 Selects ADCn_INPUT8 as negative channel input 0x00000000 INPUT10 Selects ADCn_INPUT10 as negative channel input 0x00000001 INPUT12 Selects ADCn_INPUT12 as negative channel input 0x00000002 INPUT14 Selects ADCn_INPUT14 as negative channel input 0x00000003 INPUT15NEGSEL Negative Input Select Register for ADCn_INPUT15 in Differential Scan Mode 14 2 read-write INPUT8 Selects ADCn_INPUT8 as negative channel input 0x00000000 INPUT10 Selects ADCn_INPUT10 as negative channel input 0x00000001 INPUT12 Selects ADCn_INPUT12 as negative channel input 0x00000002 INPUT14 Selects ADCn_INPUT14 as negative channel input 0x00000003 INPUT2NEGSEL Negative Input Select Register for ADCn_INPUT2 in Differential Scan Mode 2 2 read-write INPUT1 Selects ADCn_INPUT1 as negative channel input 0x00000000 INPUT3 Selects ADCn_INPUT3 as negative channel input 0x00000001 INPUT5 Selects ADCn_INPUT5 as negative channel input 0x00000002 INPUT7 Selects ADCn_INPUT7 as negative channel input 0x00000003 INPUT4NEGSEL Negative Input Select Register for ADCn_INPUT4 in Differential Scan Mode 4 2 read-write INPUT1 Selects ADCn_INPUT1 as negative channel input 0x00000000 INPUT3 Selects ADCn_INPUT3 as negative channel input 0x00000001 INPUT5 Selects ADCn_INPUT5 as negative channel input 0x00000002 INPUT7 Selects ADCn_INPUT7 as negative channel input 0x00000003 INPUT6NEGSEL Negative Input Select Register for ADCn_INPUT1 in Differential Scan Mode 6 2 read-write INPUT1 Selects ADCn_INPUT1 as negative channel input 0x00000000 INPUT3 Selects ADCn_INPUT3 as negative channel input 0x00000001 INPUT5 Selects ADCn_INPUT5 as negative channel input 0x00000002 INPUT7 Selects ADCn_INPUT7 as negative channel input 0x00000003 INPUT9NEGSEL Negative Input Select Register for ADCn_INPUT9 in Differential Scan Mode 8 2 read-write INPUT8 Selects ADCn_INPUT8 as negative channel input 0x00000000 INPUT10 Selects ADCn_INPUT10 as negative channel input 0x00000001 INPUT12 Selects ADCn_INPUT12 as negative channel input 0x00000002 INPUT14 Selects ADCn_INPUT14 as negative channel input 0x00000003 SINGLECTRL Single Channel Control Register 0x10 32 read-write n 0x0 0x0 ADJ Single Channel Result Adjustment 2 1 read-write AT Single Channel Acquisition Time 24 4 read-write 1CYCLE 1 conversion clock cycle acquisition time for single channel 0x00000000 2CYCLES 2 conversion clock cycles acquisition time for single channel 0x00000001 3CYCLES 3 conversion clock cycles acquisition time for single channel 0x00000002 4CYCLES 4 conversion clock cycles acquisition time for single channel 0x00000003 8CYCLES 8 conversion clock cycles acquisition time for single channel 0x00000004 16CYCLES 16 conversion clock cycles acquisition time for single channel 0x00000005 32CYCLES 32 conversion clock cycles acquisition time for single channel 0x00000006 64CYCLES 64 conversion clock cycles acquisition time for single channel 0x00000007 128CYCLES 128 conversion clock cycles acquisition time for single channel 0x00000008 256CYCLES 256 conversion clock cycles acquisition time for single channel 0x00000009 CMPEN Compare Logic Enable for Single Channel 31 1 read-write DIFF Single Channel Differential Mode 1 1 read-write NEGSEL Single Channel Negative Input Selection 16 8 read-write POSSEL Single Channel Positive Input Selection 8 8 read-write PRSEN Single Channel PRS Trigger Enable 29 1 read-write REF Single Channel Reference Selection 5 3 read-write 1V25 VFS = 1.25V with internal VBGR reference 0x00000000 2V5 VFS = 2.5V with internal VBGR reference 0x00000001 VDD VFS = AVDD with AVDD as reference source 0x00000002 5V VFS = 5V with internal VBGR reference 0x00000003 EXTSINGLE Single ended external reference 0x00000004 2XEXTDIFF Differential external reference, 2x 0x00000005 2XVDD VFS = 2xAVDD with AVDD as the reference source 0x00000006 CONF Use SINGLECTRLX to configure reference 0x00000007 REP Single Channel Repetitive Mode 0 1 read-write RES Single Channel Resolution Select 3 2 read-write 12BIT 12-bit resolution. 0x00000000 8BIT 8-bit resolution. 0x00000001 6BIT 6-bit resolution. 0x00000002 OVS Oversampling enabled. Oversampling rate is set in OVSRSEL. 0x00000003 SINGLECTRLX Single Channel Control Register Continued 0x14 32 read-write n 0x0 0x0 CONVSTARTDELAY Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set 22 5 read-write CONVSTARTDELAYEN Enable Delaying Next Conversion Start 27 1 read-write DVL Single Channel DV Level Select 12 2 read-write FIFOOFACT Single Channel FIFO Overflow Action 14 1 read-write PRSMODE Single Channel PRS Trigger Mode 16 1 read-write PRSSEL Single Channel PRS Trigger Select 17 5 read-write PRSCH0 PRS ch 0 triggers single channel 0x00000000 PRSCH1 PRS ch 1 triggers single channel 0x00000001 PRSCH2 PRS ch 2 triggers single channel 0x00000002 PRSCH3 PRS ch 3 triggers single channel 0x00000003 PRSCH4 PRS ch 4 triggers single channel 0x00000004 PRSCH5 PRS ch 5 triggers single channel 0x00000005 PRSCH6 PRS ch 6 triggers single channel 0x00000006 PRSCH7 PRS ch 7 triggers single channel 0x00000007 PRSCH8 PRS ch 8 triggers single channel 0x00000008 PRSCH9 PRS ch 9 triggers single channel 0x00000009 PRSCH10 PRS ch 10 triggers single channel 0x0000000A PRSCH11 PRS ch 11 triggers single channel 0x0000000B PRSCH12 PRS ch 12 triggers single channel 0x0000000C PRSCH13 PRS ch 13 triggers single channel 0x0000000D PRSCH14 PRS ch 14 triggers single channel 0x0000000E PRSCH15 PRS ch 15 triggers single channel 0x0000000F PRSCH16 PRS ch 16 triggers single channel 0x00000010 PRSCH17 PRS ch 17 triggers single channel 0x00000011 PRSCH18 PRS ch 18 triggers single channel 0x00000012 PRSCH19 PRS ch 19 triggers single channel 0x00000013 PRSCH20 PRS ch 20 triggers single channel 0x00000014 PRSCH21 PRS ch 21 triggers single channel 0x00000015 PRSCH22 PRS ch 22 triggers single channel 0x00000016 PRSCH23 PRS ch 23 triggers single channel 0x00000017 REPDELAY REPDELAY Select for SINGLE REP Mode 29 3 read-write NODELAY No delay 0x00000000 4CYCLES 4 conversion clock cycles 0x00000001 8CYCLES 8 conversion clock cycles 0x00000002 16CYCLES 16 conversion clock cycles 0x00000003 32CYCLES 32 conversion clock cycles 0x00000004 64CYCLES 64 conversion clock cycles 0x00000005 128CYCLES 128 conversion clock cycles 0x00000006 256CYCLES 256 conversion clock cycles 0x00000007 VINATT Code for VIN Attenuation Factor 8 4 read-write VREFATT Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5 4 4 read-write VREFATTFIX Enable Fixed Scaling on VREF 3 1 read-write VREFSEL Single Channel Reference Selection 0 3 read-write VBGR Internal 0.83V Bandgap reference 0x00000000 VDDXWATT Scaled AVDD: AVDD*(the VREF attenuation factor) 0x00000001 VREFPWATT Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor) 0x00000002 VREFP Raw single ended external Vref: ADCn_EXTP 0x00000003 VENTROPY Special mode used to generate ENTROPY. 0x00000004 VREFPNWATT Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor) 0x00000005 VREFPN Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN) 0x00000006 VBGRLOW Internal Bandgap reference at low setting 0.78V 0x00000007 SINGLEDATA Single Conversion Result Data 0x48 32 read-only n 0x0 0x0 modifyExternal DATA Single Conversion Result Data 0 32 read-only SINGLEDATAP Single Conversion Result Data Peek Register 0x50 32 read-only n 0x0 0x0 DATAP Single Conversion Result Data Peek 0 32 read-only SINGLEFIFOCLEAR Single FIFO Clear Register 0x8C 32 write-only n 0x0 0x0 SINGLEFIFOCLEAR Clear Single FIFO Content 0 1 write-only SINGLEFIFOCOUNT Single FIFO Count Register 0x84 32 read-only n 0x0 0x0 SINGLEDC Single Data Count 0 3 read-only STATUS Status Register 0xC 32 read-only n 0x0 0x0 PROGERR Programming Error Status 10 2 read-only BUSCONF None 0x00000001 NEGSELCONF None 0x00000002 SCANACT Scan Conversion Active 1 1 read-only SCANDV Scan Data Valid 17 1 read-only SCANPENDING Scan Conversion Pending 2 1 read-only SCANREFWARM Scan Reference Warmed Up 9 1 read-only SINGLEACT Single Channel Conversion Active 0 1 read-only SINGLEDV Single Channel Data Valid 16 1 read-only SINGLEREFWARM Single Channel Reference Warmed Up 8 1 read-only WARM ADC Warmed Up 12 1 read-only CAN0 CAN0 CAN0 0x0 0x0 0x400 registers n CAN0 60 BITTIMING Bit Timing Register 0xC 32 read-write n 0x0 0x0 BRP Baud Rate Prescaler 0 6 read-write SJW Synchronization Jump Width 6 2 read-write TSEG1 Time Segment Before the Sample Point 8 4 read-write TSEG2 Time Segment After the Sample Point 12 3 read-write BRPE BRP Extension Register 0x18 32 read-write n 0x0 0x0 BRPE Baud Rate Prescaler Extension 0 4 read-write CONFIG Configuration Register 0x2C 32 read-write n 0x0 0x0 DBGHALT Debug Halt 15 1 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 CCE Configuration Change Enable 6 1 read-write DAR Disable Automatic Retransmission 5 1 read-write EIE Error Interrupt Enable 3 1 read-write IE Module Interrupt Enable 1 1 read-write INIT Initialize 0 1 read-write SIE Status Change Interrupt Enable 2 1 read-write TEST Test Mode Enable Write 7 1 read-write ERRCNT Error Count Register 0x8 32 read-only n 0x0 0x0 REC Receive Error Counter 8 7 read-only RECERRP Receive Error Passive 15 1 read-only TEC Transmit Error Counter 0 8 read-only IF0IEN Message Object Interrupt Enable Register 0x3C 32 read-write n 0x0 0x0 MESSAGE MESSAGE Interrupt Enable 0 32 read-write IF0IF Message Object Interrupt Flag Register 0x30 32 read-only n 0x0 0x0 MESSAGE Message Object Interrupt Flag 0 32 read-only IF0IFC Message Object Interrupt Flag Clear Register 0x38 32 write-only n 0x0 0x0 MESSAGE Clear MESSAGE Interrupt Flag 0 32 write-only IF0IFS Message Object Interrupt Flag Set Register 0x34 32 write-only n 0x0 0x0 MESSAGE Set MESSAGE Interrupt Flag 0 32 write-only IF1IEN Status Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 STATUS STATUS Interrupt Enable 0 1 read-write IF1IF Status Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 STATUS Status Interrupt Flag 0 1 read-only IF1IFC Message Object Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 STATUS Clear STATUS Interrupt Flag 0 1 write-only IF1IFS Message Object Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 STATUS Set STATUS Interrupt Flag 0 1 write-only INTID Interrupt Identification Register 0x10 32 read-only n 0x0 0x0 INTID Interrupt Identifier 0 6 read-only INTSTAT Status Interupt 15 1 read-only MESSAGEDATA New Data Register 0x20 32 read-only n 0x0 0x0 VALID DATAVALID Bits (of All Message Objects) 0 32 read-only MESSAGESTATE Message Valid Register 0x28 32 read-only n 0x0 0x0 VALID Message Valid Bits (of All Message Objects) 0 32 read-only MIR0_ARB Interface Arbitration Register 0x68 32 read-write n 0x0 0x0 DIR Message Direction 29 1 read-write ID Message Identifier 0 29 read-write MSGVAL Message Valid 31 1 read-write XTD Extended Identifier 30 1 read-write MIR0_CMDMASK Interface Command Mask Register 0x60 32 read-write n 0x0 0x0 ARBACC Access Arbitration Bits 5 1 read-write CLRINTPND Clear Interrupt Pending Bit 3 1 read-write CONTROL Access Control Bits 4 1 read-write DATAA Access Data Bytes 0-3 1 1 read-write DATAB CC Channel Mode 0 1 read-write MASKACC Access Mask Bits 6 1 read-write TXRQSTNEWDAT Transmission Request Bit/ New Data Bit 2 1 read-write WRRD Write/Read RAM 7 1 read-write MIR0_CMDREQ Interface Command Request Register 0x78 32 read-write n 0x0 0x0 BUSY Busy Flag 15 1 read-only MSGNUM Message Number 0 6 read-write MIR0_CTRL Interface Message Control Register 0x6C 32 read-write n 0x0 0x0 DATAVALID New Data 15 1 read-write DLC Data Length Code 0 4 read-write EOB End of Buffer 7 1 read-write INTPND Interrupt Pending 13 1 read-write MESSAGEOF Message Lost (only Valid for Message Objects With Direction = Receive) 14 1 read-write RMTEN Remote Enable 9 1 read-write RXIE Receive Interrupt Enable 10 1 read-write TXIE Transmit Interrupt Enable 11 1 read-write TXRQST Transmit Request 8 1 read-write UMASK Use Acceptance Mask 12 1 read-write MIR0_DATAH Interface Data B Register 0x74 32 read-write n 0x0 0x0 DATA4 Fifth Byte of CAN Data Frame 0 8 read-write DATA5 Sixth Byte of CAN Data Frame 8 8 read-write DATA6 Seventh Byte of CAN Data Frame 16 8 read-write DATA7 Eight Byte of CAN Data Frame 24 8 read-write MIR0_DATAL Interface Data a Register 0x70 32 read-write n 0x0 0x0 DATA0 First Byte of CAN Data Frame 0 8 read-write DATA1 Second Byte of CAN Data Frame 8 8 read-write DATA2 Third Byte of CAN Data Frame 16 8 read-write DATA3 Fourth Byte of CAN Data Frame 24 8 read-write MIR0_MASK Interface Mask Register 0x64 32 read-write n 0x0 0x0 MASK Identifier Mask 0 29 read-write MDIR Mask Message Direction 30 1 read-write MXTD Mask Extended Identifier 31 1 read-write MIR1_ARB Interface Arbitration Register 0x88 32 read-write n 0x0 0x0 DIR Message Direction 29 1 read-write ID Message Identifier 0 29 read-write MSGVAL Message Valid 31 1 read-write XTD Extended Identifier 30 1 read-write MIR1_CMDMASK Interface Command Mask Register 0x80 32 read-write n 0x0 0x0 ARBACC Access Arbitration Bits 5 1 read-write CLRINTPND Clear Interrupt Pending Bit 3 1 read-write CONTROL Access Control Bits 4 1 read-write DATAA Access Data Bytes 0-3 1 1 read-write DATAB CC Channel Mode 0 1 read-write MASKACC Access Mask Bits 6 1 read-write TXRQSTNEWDAT Transmission Request Bit/ New Data Bit 2 1 read-write WRRD Write/Read RAM 7 1 read-write MIR1_CMDREQ Interface Command Request Register 0x98 32 read-write n 0x0 0x0 BUSY Busy Flag 15 1 read-only MSGNUM Message Number 0 6 read-write MIR1_CTRL Interface Message Control Register 0x8C 32 read-write n 0x0 0x0 DATAVALID New Data 15 1 read-write DLC Data Length Code 0 4 read-write EOB End of Buffer 7 1 read-write INTPND Interrupt Pending 13 1 read-write MESSAGEOF Message Lost (only Valid for Message Objects With Direction = Receive) 14 1 read-write RMTEN Remote Enable 9 1 read-write RXIE Receive Interrupt Enable 10 1 read-write TXIE Transmit Interrupt Enable 11 1 read-write TXRQST Transmit Request 8 1 read-write UMASK Use Acceptance Mask 12 1 read-write MIR1_DATAH Interface Data B Register 0x94 32 read-write n 0x0 0x0 DATA4 Fifth Byte of CAN Data Frame 0 8 read-write DATA5 Sixth Byte of CAN Data Frame 8 8 read-write DATA6 Seventh Byte of CAN Data Frame 16 8 read-write DATA7 Eight Byte of CAN Data Frame 24 8 read-write MIR1_DATAL Interface Data a Register 0x90 32 read-write n 0x0 0x0 DATA0 First Byte of CAN Data Frame 0 8 read-write DATA1 Second Byte of CAN Data Frame 8 8 read-write DATA2 Third Byte of CAN Data Frame 16 8 read-write DATA3 Fourth Byte of CAN Data Frame 24 8 read-write MIR1_MASK Interface Mask Register 0x84 32 read-write n 0x0 0x0 MASK Identifier Mask 0 29 read-write MDIR Mask Message Direction 30 1 read-write MXTD Mask Extended Identifier 31 1 read-write ROUTE I/O Routing Register 0x50 32 read-write n 0x0 0x0 RXLOC RX Pin Location 2 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 TXLOC TX Pin Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 TXPEN TX Pin Enable 0 1 read-write STATUS Status Register 0x4 32 read-write n 0x0 0x0 BOFF Bus Off Status 7 1 read-only EPASS Error Passive 5 1 read-only EWARN Warning Status 6 1 read-only LEC Last Error Code 0 3 read-write NONE No error occurred during last CAN bus event. 0x00000000 STUFF More than 5 equal bits in a sequence have occurred in a part of a received message where this is not allowed. 0x00000001 FORM A fixed format part of a received frame has the wrong format. 0x00000002 ACK The message this CAN Core transmitted was not acknowledged by another node. 0x00000003 BIT1 During the transmission of a message (with the exception of the arbitration field), the device wanted to send a recessive level (bit of logical value 1), but the monitored bus value was dominant. 0x00000004 BIT0 During the transmission of a message (or acknowledge bit, or active error flag, or overload flag), the device wanted to send a dominant level (data or identifier bit logical value 0), but the monitored Bus value was recessive. During Bus Off recovery this status is set each time a sequence of 11 recessive bits has been monitored. This enables the CPU to monitor the proceeding of the Bus Off recovery sequence (indicating the bus is not stuck at dominant or continuously disturbed). 0x00000005 CRC The CRC check sum was incorrect in the message received the CRC received for an incoming message does not match with the calculated CRC for the received data. 0x00000006 UNUSED When the LEC shows the value '7', no CAN bus event was detected since the CPU wrote this value to the LEC. 0x00000007 RXOK Received a Message Successfully 4 1 read-write TXOK Transmitted a Message Successfully 3 1 read-write TEST Test Register 0x14 32 read-write n 0x0 0x0 BASIC Basic Mode 2 1 read-write LBACK Loopback Mode 4 1 read-write RX Monitors the Actual Value of CAN_RX Pin 7 1 read-only SILENT Silent Mode 3 1 read-write TX Control of CAN_TX Pin 5 2 read-write CORE Reset value, CAN_TX is controlled by the CAN Core. 0x00000000 SAMPT Sample Point can be monitored at CAN_TX pin. 0x00000001 LOW CAN_TX pin drives a dominant bit (0) value. 0x00000002 HIGH CAN_TX pin drives a recessive bit (1) value. 0x00000003 TRANSREQ Transmission Request Register 0x1C 32 read-only n 0x0 0x0 TXRQSTOUT Transmission Request Bits (Of All Message Objects) 0 32 read-only FALSE This Message Object is not waiting for transmission. 0x00000000 TRUE The transmission of this Message Object is requested and is not yet done. 0x00000001 CAN1 CAN1 CAN1 0x0 0x0 0x400 registers n CAN1 61 BITTIMING Bit Timing Register 0xC 32 read-write n 0x0 0x0 BRP Baud Rate Prescaler 0 6 read-write SJW Synchronization Jump Width 6 2 read-write TSEG1 Time Segment Before the Sample Point 8 4 read-write TSEG2 Time Segment After the Sample Point 12 3 read-write BRPE BRP Extension Register 0x18 32 read-write n 0x0 0x0 BRPE Baud Rate Prescaler Extension 0 4 read-write CONFIG Configuration Register 0x2C 32 read-write n 0x0 0x0 DBGHALT Debug Halt 15 1 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 CCE Configuration Change Enable 6 1 read-write DAR Disable Automatic Retransmission 5 1 read-write EIE Error Interrupt Enable 3 1 read-write IE Module Interrupt Enable 1 1 read-write INIT Initialize 0 1 read-write SIE Status Change Interrupt Enable 2 1 read-write TEST Test Mode Enable Write 7 1 read-write ERRCNT Error Count Register 0x8 32 read-only n 0x0 0x0 REC Receive Error Counter 8 7 read-only RECERRP Receive Error Passive 15 1 read-only TEC Transmit Error Counter 0 8 read-only IF0IEN Message Object Interrupt Enable Register 0x3C 32 read-write n 0x0 0x0 MESSAGE MESSAGE Interrupt Enable 0 32 read-write IF0IF Message Object Interrupt Flag Register 0x30 32 read-only n 0x0 0x0 MESSAGE Message Object Interrupt Flag 0 32 read-only IF0IFC Message Object Interrupt Flag Clear Register 0x38 32 write-only n 0x0 0x0 MESSAGE Clear MESSAGE Interrupt Flag 0 32 write-only IF0IFS Message Object Interrupt Flag Set Register 0x34 32 write-only n 0x0 0x0 MESSAGE Set MESSAGE Interrupt Flag 0 32 write-only IF1IEN Status Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 STATUS STATUS Interrupt Enable 0 1 read-write IF1IF Status Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 STATUS Status Interrupt Flag 0 1 read-only IF1IFC Message Object Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 STATUS Clear STATUS Interrupt Flag 0 1 write-only IF1IFS Message Object Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 STATUS Set STATUS Interrupt Flag 0 1 write-only INTID Interrupt Identification Register 0x10 32 read-only n 0x0 0x0 INTID Interrupt Identifier 0 6 read-only INTSTAT Status Interupt 15 1 read-only MESSAGEDATA New Data Register 0x20 32 read-only n 0x0 0x0 VALID DATAVALID Bits (of All Message Objects) 0 32 read-only MESSAGESTATE Message Valid Register 0x28 32 read-only n 0x0 0x0 VALID Message Valid Bits (of All Message Objects) 0 32 read-only MIR0_ARB Interface Arbitration Register 0x68 32 read-write n 0x0 0x0 DIR Message Direction 29 1 read-write ID Message Identifier 0 29 read-write MSGVAL Message Valid 31 1 read-write XTD Extended Identifier 30 1 read-write MIR0_CMDMASK Interface Command Mask Register 0x60 32 read-write n 0x0 0x0 ARBACC Access Arbitration Bits 5 1 read-write CLRINTPND Clear Interrupt Pending Bit 3 1 read-write CONTROL Access Control Bits 4 1 read-write DATAA Access Data Bytes 0-3 1 1 read-write DATAB CC Channel Mode 0 1 read-write MASKACC Access Mask Bits 6 1 read-write TXRQSTNEWDAT Transmission Request Bit/ New Data Bit 2 1 read-write WRRD Write/Read RAM 7 1 read-write MIR0_CMDREQ Interface Command Request Register 0x78 32 read-write n 0x0 0x0 BUSY Busy Flag 15 1 read-only MSGNUM Message Number 0 6 read-write MIR0_CTRL Interface Message Control Register 0x6C 32 read-write n 0x0 0x0 DATAVALID New Data 15 1 read-write DLC Data Length Code 0 4 read-write EOB End of Buffer 7 1 read-write INTPND Interrupt Pending 13 1 read-write MESSAGEOF Message Lost (only Valid for Message Objects With Direction = Receive) 14 1 read-write RMTEN Remote Enable 9 1 read-write RXIE Receive Interrupt Enable 10 1 read-write TXIE Transmit Interrupt Enable 11 1 read-write TXRQST Transmit Request 8 1 read-write UMASK Use Acceptance Mask 12 1 read-write MIR0_DATAH Interface Data B Register 0x74 32 read-write n 0x0 0x0 DATA4 Fifth Byte of CAN Data Frame 0 8 read-write DATA5 Sixth Byte of CAN Data Frame 8 8 read-write DATA6 Seventh Byte of CAN Data Frame 16 8 read-write DATA7 Eight Byte of CAN Data Frame 24 8 read-write MIR0_DATAL Interface Data a Register 0x70 32 read-write n 0x0 0x0 DATA0 First Byte of CAN Data Frame 0 8 read-write DATA1 Second Byte of CAN Data Frame 8 8 read-write DATA2 Third Byte of CAN Data Frame 16 8 read-write DATA3 Fourth Byte of CAN Data Frame 24 8 read-write MIR0_MASK Interface Mask Register 0x64 32 read-write n 0x0 0x0 MASK Identifier Mask 0 29 read-write MDIR Mask Message Direction 30 1 read-write MXTD Mask Extended Identifier 31 1 read-write MIR1_ARB Interface Arbitration Register 0x88 32 read-write n 0x0 0x0 DIR Message Direction 29 1 read-write ID Message Identifier 0 29 read-write MSGVAL Message Valid 31 1 read-write XTD Extended Identifier 30 1 read-write MIR1_CMDMASK Interface Command Mask Register 0x80 32 read-write n 0x0 0x0 ARBACC Access Arbitration Bits 5 1 read-write CLRINTPND Clear Interrupt Pending Bit 3 1 read-write CONTROL Access Control Bits 4 1 read-write DATAA Access Data Bytes 0-3 1 1 read-write DATAB CC Channel Mode 0 1 read-write MASKACC Access Mask Bits 6 1 read-write TXRQSTNEWDAT Transmission Request Bit/ New Data Bit 2 1 read-write WRRD Write/Read RAM 7 1 read-write MIR1_CMDREQ Interface Command Request Register 0x98 32 read-write n 0x0 0x0 BUSY Busy Flag 15 1 read-only MSGNUM Message Number 0 6 read-write MIR1_CTRL Interface Message Control Register 0x8C 32 read-write n 0x0 0x0 DATAVALID New Data 15 1 read-write DLC Data Length Code 0 4 read-write EOB End of Buffer 7 1 read-write INTPND Interrupt Pending 13 1 read-write MESSAGEOF Message Lost (only Valid for Message Objects With Direction = Receive) 14 1 read-write RMTEN Remote Enable 9 1 read-write RXIE Receive Interrupt Enable 10 1 read-write TXIE Transmit Interrupt Enable 11 1 read-write TXRQST Transmit Request 8 1 read-write UMASK Use Acceptance Mask 12 1 read-write MIR1_DATAH Interface Data B Register 0x94 32 read-write n 0x0 0x0 DATA4 Fifth Byte of CAN Data Frame 0 8 read-write DATA5 Sixth Byte of CAN Data Frame 8 8 read-write DATA6 Seventh Byte of CAN Data Frame 16 8 read-write DATA7 Eight Byte of CAN Data Frame 24 8 read-write MIR1_DATAL Interface Data a Register 0x90 32 read-write n 0x0 0x0 DATA0 First Byte of CAN Data Frame 0 8 read-write DATA1 Second Byte of CAN Data Frame 8 8 read-write DATA2 Third Byte of CAN Data Frame 16 8 read-write DATA3 Fourth Byte of CAN Data Frame 24 8 read-write MIR1_MASK Interface Mask Register 0x84 32 read-write n 0x0 0x0 MASK Identifier Mask 0 29 read-write MDIR Mask Message Direction 30 1 read-write MXTD Mask Extended Identifier 31 1 read-write ROUTE I/O Routing Register 0x50 32 read-write n 0x0 0x0 RXLOC RX Pin Location 2 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 TXLOC TX Pin Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 TXPEN TX Pin Enable 0 1 read-write STATUS Status Register 0x4 32 read-write n 0x0 0x0 BOFF Bus Off Status 7 1 read-only EPASS Error Passive 5 1 read-only EWARN Warning Status 6 1 read-only LEC Last Error Code 0 3 read-write NONE No error occurred during last CAN bus event. 0x00000000 STUFF More than 5 equal bits in a sequence have occurred in a part of a received message where this is not allowed. 0x00000001 FORM A fixed format part of a received frame has the wrong format. 0x00000002 ACK The message this CAN Core transmitted was not acknowledged by another node. 0x00000003 BIT1 During the transmission of a message (with the exception of the arbitration field), the device wanted to send a recessive level (bit of logical value 1), but the monitored bus value was dominant. 0x00000004 BIT0 During the transmission of a message (or acknowledge bit, or active error flag, or overload flag), the device wanted to send a dominant level (data or identifier bit logical value 0), but the monitored Bus value was recessive. During Bus Off recovery this status is set each time a sequence of 11 recessive bits has been monitored. This enables the CPU to monitor the proceeding of the Bus Off recovery sequence (indicating the bus is not stuck at dominant or continuously disturbed). 0x00000005 CRC The CRC check sum was incorrect in the message received the CRC received for an incoming message does not match with the calculated CRC for the received data. 0x00000006 UNUSED When the LEC shows the value '7', no CAN bus event was detected since the CPU wrote this value to the LEC. 0x00000007 RXOK Received a Message Successfully 4 1 read-write TXOK Transmitted a Message Successfully 3 1 read-write TEST Test Register 0x14 32 read-write n 0x0 0x0 BASIC Basic Mode 2 1 read-write LBACK Loopback Mode 4 1 read-write RX Monitors the Actual Value of CAN_RX Pin 7 1 read-only SILENT Silent Mode 3 1 read-write TX Control of CAN_TX Pin 5 2 read-write CORE Reset value, CAN_TX is controlled by the CAN Core. 0x00000000 SAMPT Sample Point can be monitored at CAN_TX pin. 0x00000001 LOW CAN_TX pin drives a dominant bit (0) value. 0x00000002 HIGH CAN_TX pin drives a recessive bit (1) value. 0x00000003 TRANSREQ Transmission Request Register 0x1C 32 read-only n 0x0 0x0 TXRQSTOUT Transmission Request Bits (Of All Message Objects) 0 32 read-only FALSE This Message Object is not waiting for transmission. 0x00000000 TRUE The transmission of this Message Object is requested and is not yet done. 0x00000001 CMU CMU CMU 0x0 0x0 0x400 registers n CMU 32 ADCCTRL ADC Control Register 0x15C 32 read-write n 0x0 0x0 ADC0CLKDIV ADC0 Clock Prescaler 0 2 read-write NODIVISION None 0x00000000 ADC0CLKINV Invert Clock Selected By ADC0CLKSEL 8 1 read-write ADC0CLKSEL ADC0 Clock Select 4 2 read-write DISABLED ADC0 is not clocked 0x00000000 AUXHFRCO AUXHFRCO is clocking ADC0 0x00000001 HFXO HFXO is clocking ADC0 0x00000002 HFSRCCLK HFSRCCLK is clocking ADC0 0x00000003 ADC1CLKDIV ADC1 Clock Prescaler 16 2 read-write NODIVISION None 0x00000000 ADC1CLKINV Invert Clock Selected By ADC1CLKSEL 24 1 read-write ADC1CLKSEL ADC1 Clock Select 20 2 read-write DISABLED ADC1 is not clocked 0x00000000 AUXHFRCO AUXHFRCO is clocking ADC1 0x00000001 HFXO HFXO is clocking ADC1 0x00000002 HFSRCCLK HFSRCCLK is clocking ADC1 0x00000003 AUXHFRCOCTRL AUXHFRCO Control Register 0x18 32 read-write n 0x0 0x0 CLKDIV Locally Divide AUXHFRCO Clock Output 25 2 read-write DIV1 Divide by 1. 0x00000000 DIV2 Divide by 2. 0x00000001 DIV4 Divide by 4. 0x00000002 CMPBIAS AUXHFRCO Comparator Bias Current 21 3 read-write FINETUNING AUXHFRCO Fine Tuning Value 8 6 read-write FINETUNINGEN Enable Reference for Fine Tuning 27 1 read-write FREQRANGE AUXHFRCO Frequency Range 16 5 read-write LDOHP AUXHFRCO LDO High Power Mode 24 1 read-write TUNING AUXHFRCO Tuning Value 0 7 read-write VREFTC AUXHFRCO Temperature Coefficient Trim on Comparator Reference 28 4 read-write CALCNT Calibration Counter Register 0x54 32 read-write n 0x0 0x0 CALCNT Calibration Counter 0 20 read-write CALCTRL Calibration Control Register 0x50 32 read-write n 0x0 0x0 CONT Continuous Calibration 8 1 read-write DOWNSEL Calibration Down-counter Select 4 4 read-write HFCLK Select HFCLK for down-counter 0x00000000 HFXO Select HFXO for down-counter 0x00000001 LFXO Select LFXO for down-counter 0x00000002 HFRCO Select HFRCO for down-counter 0x00000003 LFRCO Select LFRCO for down-counter 0x00000004 AUXHFRCO Select AUXHFRCO for down-counter 0x00000005 PRS Select PRS input selected by PRSDOWNSEL as down-counter 0x00000006 USHFRCO Select USHFRCO for down-counter 0x00000008 PRSDOWNSEL PRS Select for PRS Input When Selected in DOWNSEL 24 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 PRSUPSEL PRS Select for PRS Input When Selected in UPSEL 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 UPSEL Calibration Up-counter Select 0 3 read-write HFXO Select HFXO as up-counter 0x00000000 LFXO Select LFXO as up-counter 0x00000001 HFRCO Select HFRCO as up-counter 0x00000002 LFRCO Select LFRCO as up-counter 0x00000003 AUXHFRCO Select AUXHFRCO as up-counter 0x00000004 PRS Select PRS input selected by PRSUPSEL as up-counter 0x00000005 USHFRCO Select USHFRCO as up-counter 0x00000007 CMD Command Register 0x64 32 write-only n 0x0 0x0 CALSTART Calibration Start 0 1 write-only CALSTOP Calibration Stop 1 1 write-only HFXOPEAKDETSTART HFXO Peak Detection Start 4 1 write-only CTRL CMU Control Register 0x0 32 read-write n 0x0 0x0 CLKOUTSEL0 Clock Output Select 0 0 5 read-write DISABLED Disabled 0x00000000 ULFRCO ULFRCO (directly from oscillator) 0x00000001 LFRCO LFRCO (directly from oscillator) 0x00000002 LFXO LFXO (directly from oscillator) 0x00000003 HFXO HFXO (directly from oscillator) 0x00000006 HFEXPCLK HFEXPCLK 0x00000007 ULFRCOQ ULFRCO (qualified) 0x00000009 LFRCOQ LFRCO (qualified) 0x0000000A LFXOQ LFXO (qualified) 0x0000000B HFRCOQ HFRCO (qualified) 0x0000000C AUXHFRCOQ AUXHFRCO (qualified) 0x0000000D HFXOQ HFXO (qualified) 0x0000000E HFSRCCLK HFSRCCLK 0x0000000F USHFRCOQ USHFRCO (qualified) 0x00000012 CLKOUTSEL1 Clock Output Select 1 5 5 read-write DISABLED Disabled 0x00000000 ULFRCO ULFRCO (directly from oscillator) 0x00000001 LFRCO LFRCO (directly from oscillator) 0x00000002 LFXO LFXO (directly from oscillator) 0x00000003 HFXO HFXO (directly from oscillator) 0x00000006 HFEXPCLK HFEXPCLK 0x00000007 ULFRCOQ ULFRCO (qualified) 0x00000009 LFRCOQ LFRCO (qualified) 0x0000000A LFXOQ LFXO (qualified) 0x0000000B HFRCOQ HFRCO (qualified) 0x0000000C AUXHFRCOQ AUXHFRCO (qualified) 0x0000000D HFXOQ HFXO (qualified) 0x0000000E HFSRCCLK HFSRCCLK 0x0000000F USHFRCOQ USHFRCO (qualified) 0x00000012 CLKOUTSEL2 Clock Output Select 2 10 5 read-write DISABLED Disabled 0x00000000 ULFRCO ULFRCO (directly from oscillator) 0x00000001 LFRCO LFRCO (directly from oscillator) 0x00000002 LFXO LFXO (directly from oscillator) 0x00000003 HFXODIV2Q HFXO divided by two (qualified) 0x00000005 HFXO HFXO (directly from oscillator) 0x00000006 HFEXPCLK HFEXPCLK 0x00000007 HFXOX2Q HFXO doubler (qualified) (doubling activated by HFXOX2EN=1) 0x00000008 ULFRCOQ ULFRCO (qualified) 0x00000009 LFRCOQ LFRCO (qualified) 0x0000000A LFXOQ LFXO (qualified) 0x0000000B HFRCOQ HFRCO (qualified) 0x0000000C AUXHFRCOQ AUXHFRCO (qualified) 0x0000000D HFXOQ HFXO (qualified) 0x0000000E HFSRCCLK HFSRCCLK 0x0000000F USHFRCOQ USHFRCO (qualified) 0x00000012 HFPERCLKEN HFPERCLK Enable 20 1 read-write WSHFLE Wait State for High-Frequency LE Interface 16 1 read-write DBGCLKSEL Debug Trace Clock Select 0x70 32 read-write n 0x0 0x0 DBG Debug Trace Clock 0 2 read-write AUXHFRCO AUXHFRCO is the debug trace clock 0x00000000 HFCLK HFCLK is the debug trace clock 0x00000001 HFRCODIV2 HFRCO divided by 2 is the debug trace clock 0x00000002 DPLLCTRL DPLL Control Register 0x40 32 read-write n 0x0 0x0 AUTORECOVER Automatic Recovery Ctrl 2 1 read-write DITHEN Dither Enable Control 6 1 read-write EDGESEL Reference Edge Select 1 1 read-write MODE Operating Mode Control 0 1 read-write REFSEL Reference Clock Selection Control 3 2 read-write HFXO HFXO selected 0x00000000 LFXO LFXO selected 0x00000001 USHFRCO USHFRCO selected 0x00000002 CLKIN0 CLKIN0 selected 0x00000003 DPLLCTRL1 DPLL Control Register 0x44 32 read-write n 0x0 0x0 M Factor M 0 12 read-write N Factor N 16 12 read-write FREEZE Freeze Register 0x144 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write HFBUSCLKEN0 High Frequency Bus Clock Enable Register 0 0xB0 32 read-write n 0x0 0x0 CRYPTO0 Advanced Encryption Standard Accelerator Clock Enable 1 1 read-write EBI External Bus Interface Clock Enable 2 1 read-write ETH Ethernet Controller Clock Enable 3 1 read-write GPCRC General Purpose CRC Clock Enable 8 1 read-write GPIO General purpose Input/Output Clock Enable 5 1 read-write LDMA Linked Direct Memory Access Controller Clock Enable 7 1 read-write LE Low Energy Peripheral Interface Clock Enable 0 1 read-write PRS Peripheral Reflex System Clock Enable 6 1 read-write QSPI0 Quad-SPI Clock Enable 9 1 read-write SDIO SDIO Controller Clock Enable 4 1 read-write USB Universal Serial Bus Interface Clock Enable 10 1 read-write HFBUSPRESC High Frequency Bus Clock Prescaler Register 0x104 32 read-write n 0x0 0x0 PRESC HFBUSCLK Prescaler 8 9 read-write NODIVISION None 0x00000000 HFCLKSEL High Frequency Clock Select Command Register 0x74 32 write-only n 0x0 0x0 HF HFCLK Select 0 3 write-only HFRCO Select HFRCO as HFCLK 0x00000001 HFXO Select HFXO as HFCLK 0x00000002 LFRCO Select LFRCO as HFCLK 0x00000003 LFXO Select LFXO as HFCLK 0x00000004 HFRCODIV2 Select HFRCO divided by 2 as HFCLK 0x00000005 USHFRCO Select USHFRCO as HFCLK 0x00000006 CLKIN0 Select CLKIN0 as HFCLK 0x00000007 HFCLKSTATUS HFCLK Status Register 0x94 32 read-only n 0x0 0x0 SELECTED HFCLK Selected 0 3 read-only HFRCO HFRCO is selected as HFCLK clock source 0x00000001 HFXO HFXO is selected as HFCLK clock source 0x00000002 LFRCO LFRCO is selected as HFCLK clock source 0x00000003 LFXO LFXO is selected as HFCLK clock source 0x00000004 HFRCODIV2 HFRCO divided by 2 is selected as HFCLK clock source 0x00000005 USHFRCO USHFRCO is selected as HFCLK clock source 0x00000006 CLKIN0 CLKIN0 is selected as HFCLK clock source 0x00000007 HFCOREPRESC High Frequency Core Clock Prescaler Register 0x108 32 read-write n 0x0 0x0 PRESC HFCORECLK Prescaler 8 9 read-write NODIVISION None 0x00000000 HFEXPPRESC High Frequency Export Clock Prescaler Register 0x114 32 read-write n 0x0 0x0 PRESC HFEXPCLK Prescaler 8 5 read-write NODIVISION None 0x00000000 HFPERCLKEN0 High Frequency Peripheral Clock Enable Register 0 0xC0 32 read-write n 0x0 0x0 ACMP0 Analog Comparator 0 Clock Enable 13 1 read-write ACMP1 Analog Comparator 1 Clock Enable 14 1 read-write ACMP2 Analog Comparator 1 Clock Enable 15 1 read-write ACMP3 Analog Comparator 3 Clock Enable 16 1 read-write ADC0 Analog to Digital Converter 0 Clock Enable 20 1 read-write ADC1 Analog to Digital Converter 0 Clock Enable 21 1 read-write CRYOTIMER CRYOTIMER Clock Enable 22 1 read-write I2C0 I2C 0 Clock Enable 17 1 read-write I2C1 I2C 1 Clock Enable 18 1 read-write I2C2 I2C 2 Clock Enable 19 1 read-write IDAC0 Current Digital to Analog Converter 0 Clock Enable 23 1 read-write TIMER0 Timer 0 Clock Enable 0 1 read-write TIMER1 Timer 1 Clock Enable 1 1 read-write TIMER2 Timer 2 Clock Enable 2 1 read-write TIMER3 Timer 3 Clock Enable 3 1 read-write TIMER4 Timer 4 Clock Enable 4 1 read-write TIMER5 Timer 5 Clock Enable 5 1 read-write TIMER6 Timer 6 Clock Enable 6 1 read-write TRNG0 True Random Number Generator 0 Clock Enable 24 1 read-write USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 Clock Enable 7 1 read-write USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 Clock Enable 8 1 read-write USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 Clock Enable 9 1 read-write USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 Clock Enable 10 1 read-write USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 Clock Enable 11 1 read-write USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 Clock Enable 12 1 read-write HFPERCLKEN1 High Frequency Peripheral Clock Enable Register 1 0xC4 32 read-write n 0x0 0x0 CAN0 CAN 0 Clock Enable 6 1 read-write CAN1 CAN 1 Clock Enable 7 1 read-write CSEN Capacitive touch sense module Clock Enable 9 1 read-write UART0 Universal Asynchronous Receiver/Transmitter 0 Clock Enable 4 1 read-write UART1 Universal Asynchronous Receiver/Transmitter 1 Clock Enable 5 1 read-write VDAC0 Digital to Analog Converter 0 Clock Enable 8 1 read-write WTIMER0 Wide Timer 0 Clock Enable 0 1 read-write WTIMER1 Wide Timer 0 Clock Enable 1 1 read-write WTIMER2 Wide Timer 2 Clock Enable 2 1 read-write WTIMER3 Wide Timer 3 Clock Enable 3 1 read-write HFPERPRESC High Frequency Peripheral Clock Prescaler Register 0x10C 32 read-write n 0x0 0x0 PRESC HFPERCLK Prescaler 8 9 read-write NODIVISION None 0x00000000 HFPERPRESCB High Frequency Peripheral Clock Prescaler B Register 0x118 32 read-write n 0x0 0x0 PRESC HFPERCLK Prescaler 8 9 read-write NODIVISION None 0x00000000 HFPERPRESCC High Frequency Peripheral Clock Prescaler C Register 0x11C 32 read-write n 0x0 0x0 PRESC HFPERCLK Prescaler 8 9 read-write NODIVISION None 0x00000000 HFPRESC High Frequency Clock Prescaler Register 0x100 32 read-write n 0x0 0x0 HFCLKLEPRESC HFCLKLE Prescaler 24 2 read-write DIV2 HFCLKLE is HFBUSCLKLE divided by 2. 0x00000000 DIV4 HFCLKLE is HFBUSCLKLE divided by 4. 0x00000001 DIV8 HFCLKLE is HFBUSCLKLE divided by 8. 0x00000002 PRESC HFCLK Prescaler 8 5 read-write NODIVISION None 0x00000000 HFRCOCTRL HFRCO Control Register 0x10 32 read-write n 0x0 0x0 CLKDIV Locally Divide HFRCO Clock Output 25 2 read-write DIV1 Divide by 1. 0x00000000 DIV2 Divide by 2. 0x00000001 DIV4 Divide by 4. 0x00000002 CMPBIAS HFRCO Comparator Bias Current 21 3 read-write FINETUNING HFRCO Fine Tuning Value 8 6 read-write FINETUNINGEN Enable Reference for Fine Tuning 27 1 read-write FREQRANGE HFRCO Frequency Range 16 5 read-write LDOHP HFRCO LDO High Power Mode 24 1 read-write TUNING HFRCO Tuning Value 0 7 read-write VREFTC HFRCO Temperature Coefficient Trim on Comparator Reference 28 4 read-write HFRCOSS HFRCO Spread Spectrum Register 0x184 32 read-write n 0x0 0x0 SSAMP Spread Spectrum Amplitude 0 3 read-write SSINV Spread Spectrum Update Interval 8 5 read-write HFXOCTRL HFXO Control Register 0x24 32 read-write n 0x0 0x0 AUTOSTARTEM0EM1 Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3 28 1 read-write AUTOSTARTSELEM0EM1 Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3 29 1 read-write HFXOX2EN Enable Double Frequency on HFXOX2 Clock (compared to HFXO Clock) 3 1 read-write LFTIMEOUT HFXO Low Frequency Timeout 24 3 read-write 0CYCLES Timeout period of 0 cycles (disabled) 0x00000000 2CYCLES Timeout period of 2 cycles 0x00000001 4CYCLES Timeout period of 4 cycles 0x00000002 16CYCLES Timeout period of 16 cycles 0x00000003 32CYCLES Timeout period of 32 cycles 0x00000004 64CYCLES Timeout period of 64 cycles 0x00000005 1KCYCLES Timeout period of 1024 cycles 0x00000006 4KCYCLES Timeout period of 4096 cycles 0x00000007 MODE HFXO Mode 0 2 read-write XTAL 4 MHz - 50 MHz crystal oscillator 0x00000000 ACBUFEXTCLK An AC coupled buffer is coupled in series with HFXTAL_N pin, suitable for external sinus wave. 0x00000001 DCBUFEXTCLK A DC coupled buffer is coupled in series with HFXTAL_N pin, suitable for external sinus wave. 0x00000002 DIGEXTCLK Digital external clock can be supplied on HFXTAL_N pin. 0x00000003 PEAKDETMODE HFXO Automatic Peak Detection Mode 4 2 read-write ONCECMD Automatic control of HFXO peak detection sequence. Only performs peak detection on initial HFXO startup. CMU_CMD HFXOPEAKDETSTART allowed to be used after HFXORDY=1. 0x00000000 AUTOCMD Automatic control of HFXO peak detection sequence. CMU_CMD HFXOPEAKDETSTART allowed to be used after HFXORDY=1. 0x00000001 CMD CMU_CMD HFXOPEAKDETSTART can be used to trigger the peak detection sequence after HFXORDY=1. 0x00000002 MANUAL CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready. 0x00000003 HFXOCTRL1 HFXO Control 1 0x28 32 read-write n 0x0 0x0 PEAKDETTHR Sets the Amplitude Detection Level (mV) 12 3 read-write THR0 50mV amplitude detection level 0x00000000 THR1 75mV amplitude detection level 0x00000001 THR2 115mV amplitude detection level 0x00000002 THR3 160mV amplitude detection level 0x00000003 THR4 220mV amplitude detection level 0x00000004 THR5 260mV amplitude detection level 0x00000005 THR6 320mV amplitude detection level 0x00000006 THR7 Same as THR6 0x00000007 HFXOSTARTUPCTRL HFXO Startup Control 0x2C 32 read-write n 0x0 0x0 CTUNE Sets Oscillator Tuning Capacitance 11 9 read-write IBTRIMXOCORE Sets the Startup Oscillator Core Bias Current 0 11 read-write HFXOSTEADYSTATECTRL HFXO Steady State Control 0x30 32 read-write n 0x0 0x0 CTUNE Sets Oscillator Tuning Capacitance 11 9 read-write IBTRIMXOCORE Sets the Steady State Oscillator Core Bias Current. 0 11 read-write PEAKDETEN Enables Oscillator Peak Detectors 26 1 read-write PEAKMONEN Automatically Perform Peak Monitoring Algorithm on Every Rising Edge of ULFRCO 27 1 read-write HFXOTIMEOUTCTRL HFXO Timeout Control 0x34 32 read-write n 0x0 0x0 PEAKDETTIMEOUT Wait Duration in HFXO Peak Detection Wait State 12 4 read-write 2CYCLES Timeout period of 2 cycles 0x00000000 4CYCLES Timeout period of 4 cycles 0x00000001 16CYCLES Timeout period of 16 cycles 0x00000002 32CYCLES Timeout period of 32 cycles 0x00000003 64CYCLES Timeout period of 64 cycles 0x00000004 128CYCLES Timeout period of 128 cycles 0x00000005 256CYCLES Timeout period of 256 cycles 0x00000006 1KCYCLES Timeout period of 1024 cycles 0x00000007 2KCYCLES Timeout period of 2048 cycles 0x00000008 4KCYCLES Timeout period of 4096 cycles 0x00000009 8KCYCLES Timeout period of 8192 cycles 0x0000000A 16KCYCLES Timeout period of 16384 cycles 0x0000000B 32KCYCLES Timeout period of 32768 cycles 0x0000000C 64KCYCLES Timeout period of 65536 cycles 0x0000000D 128KCYCLES Timeout period of 131072 cycles 0x0000000E STARTUPTIMEOUT Wait Duration in HFXO Startup Enable Wait State 0 4 read-write 2CYCLES Timeout period of 2 cycles 0x00000000 4CYCLES Timeout period of 4 cycles 0x00000001 16CYCLES Timeout period of 16 cycles 0x00000002 32CYCLES Timeout period of 32 cycles 0x00000003 64CYCLES Timeout period of 64 cycles 0x00000004 128CYCLES Timeout period of 128 cycles 0x00000005 256CYCLES Timeout period of 256 cycles 0x00000006 1KCYCLES Timeout period of 1024 cycles 0x00000007 2KCYCLES Timeout period of 2048 cycles 0x00000008 4KCYCLES Timeout period of 4096 cycles 0x00000009 8KCYCLES Timeout period of 8192 cycles 0x0000000A 16KCYCLES Timeout period of 16384 cycles 0x0000000B 32KCYCLES Timeout period of 32768 cycles 0x0000000C 64KCYCLES Timeout period of 65536 cycles 0x0000000D 128KCYCLES Timeout period of 131072 cycles 0x0000000E STEADYTIMEOUT Wait Duration in HFXO Startup Steady Wait State 4 4 read-write 2CYCLES Timeout period of 2 cycles 0x00000000 4CYCLES Timeout period of 4 cycles 0x00000001 16CYCLES Timeout period of 16 cycles 0x00000002 32CYCLES Timeout period of 32 cycles 0x00000003 64CYCLES Timeout period of 64 cycles 0x00000004 128CYCLES Timeout period of 128 cycles 0x00000005 256CYCLES Timeout period of 256 cycles 0x00000006 1KCYCLES Timeout period of 1024 cycles 0x00000007 2KCYCLES Timeout period of 2048 cycles 0x00000008 4KCYCLES Timeout period of 4096 cycles 0x00000009 8KCYCLES Timeout period of 8192 cycles 0x0000000A 16KCYCLES Timeout period of 16384 cycles 0x0000000B 32KCYCLES Timeout period of 32768 cycles 0x0000000C 64KCYCLES Timeout period of 65536 cycles 0x0000000D 128KCYCLES Timeout period of 131072 cycles 0x0000000E HFXOTRIMSTATUS HFXO Trim Status 0x9C 32 read-only n 0x0 0x0 IBTRIMXOCORE Value of IBTRIMXOCORE Found By Automatic HFXO Peak Detection Algorithm 0 11 read-only IBTRIMXOCOREMON Value of IBTRIMXOCORE Found By Automatic HFXO Peak Detection Algorithm or Peak Monitoring Algorithm (completion of Either Algorithm Will Cause an Update of IBTRIMXOCOREMON) 16 11 read-only MONVALID Peak Detection Algorithm or Peak Monitoring Algorithm Found a Value for IBTRIMXOCOREMON 31 1 read-only VALID Peak Detection Algorithm Found a Value for IBTRIMXOCORE 30 1 read-only IEN Interrupt Enable Register 0xAC 32 read-write n 0x0 0x0 AUXHFRCORDY AUXHFRCORDY Interrupt Enable 4 1 read-write CALOF CALOF Interrupt Enable 6 1 read-write CALRDY CALRDY Interrupt Enable 5 1 read-write CMUERR CMUERR Interrupt Enable 31 1 read-write DPLLLOCKFAILHIGH DPLLLOCKFAILHIGH Interrupt Enable 17 1 read-write DPLLLOCKFAILLOW DPLLLOCKFAILLOW Interrupt Enable 16 1 read-write DPLLRDY DPLLRDY Interrupt Enable 15 1 read-write HFRCODIS HFRCODIS Interrupt Enable 13 1 read-write HFRCORDY HFRCORDY Interrupt Enable 0 1 read-write HFXOAUTOSW HFXOAUTOSW Interrupt Enable 9 1 read-write HFXODISERR HFXODISERR Interrupt Enable 8 1 read-write HFXOPEAKDETRDY HFXOPEAKDETRDY Interrupt Enable 11 1 read-write HFXORDY HFXORDY Interrupt Enable 1 1 read-write LFRCOEDGE LFRCOEDGE Interrupt Enable 28 1 read-write LFRCORDY LFRCORDY Interrupt Enable 2 1 read-write LFTIMEOUTERR LFTIMEOUTERR Interrupt Enable 14 1 read-write LFXOEDGE LFXOEDGE Interrupt Enable 27 1 read-write LFXORDY LFXORDY Interrupt Enable 3 1 read-write ULFRCOEDGE ULFRCOEDGE Interrupt Enable 29 1 read-write USHFRCORDY USHFRCORDY Interrupt Enable 7 1 read-write IF Interrupt Flag Register 0xA0 32 read-only n 0x0 0x0 AUXHFRCORDY AUXHFRCO Ready Interrupt Flag 4 1 read-only CALOF Calibration Overflow Interrupt Flag 6 1 read-only CALRDY Calibration Ready Interrupt Flag 5 1 read-only CMUERR CMU Error Interrupt Flag 31 1 read-only DPLLLOCKFAILHIGH DPLL Lock Failure Low Interrupt Flag 17 1 read-only DPLLLOCKFAILLOW DPLL Lock Failure Low Interrupt Flag 16 1 read-only DPLLRDY DPLL Lock Interrupt Flag 15 1 read-only HFRCODIS HFRCO Disable Interrupt Flag 13 1 read-only HFRCORDY HFRCO Ready Interrupt Flag 0 1 read-only HFXOAUTOSW HFXO Automatic Switch Interrupt Flag 9 1 read-only HFXODISERR HFXO Disable Error Interrupt Flag 8 1 read-only HFXOPEAKDETRDY HFXO Automatic Peak Detection Ready Interrupt Flag 11 1 read-only HFXORDY HFXO Ready Interrupt Flag 1 1 read-only LFRCOEDGE LFRCO Clock Edge Detected Interrupt Flag 28 1 read-only LFRCORDY LFRCO Ready Interrupt Flag 2 1 read-only LFTIMEOUTERR Low Frequency Timeout Error Interrupt Flag 14 1 read-only LFXOEDGE LFXO Clock Edge Detected Interrupt Flag 27 1 read-only LFXORDY LFXO Ready Interrupt Flag 3 1 read-only ULFRCOEDGE ULFRCO Clock Edge Detected Interrupt Flag 29 1 read-only USHFRCORDY USHFRCO Ready Interrupt Flag 7 1 read-only IFC Interrupt Flag Clear Register 0xA8 32 write-only n 0x0 0x0 AUXHFRCORDY Clear AUXHFRCORDY Interrupt Flag 4 1 write-only CALOF Clear CALOF Interrupt Flag 6 1 write-only CALRDY Clear CALRDY Interrupt Flag 5 1 write-only CMUERR Clear CMUERR Interrupt Flag 31 1 write-only DPLLLOCKFAILHIGH Clear DPLLLOCKFAILHIGH Interrupt Flag 17 1 write-only DPLLLOCKFAILLOW Clear DPLLLOCKFAILLOW Interrupt Flag 16 1 write-only DPLLRDY Clear DPLLRDY Interrupt Flag 15 1 write-only HFRCODIS Clear HFRCODIS Interrupt Flag 13 1 write-only HFRCORDY Clear HFRCORDY Interrupt Flag 0 1 write-only HFXOAUTOSW Clear HFXOAUTOSW Interrupt Flag 9 1 write-only HFXODISERR Clear HFXODISERR Interrupt Flag 8 1 write-only HFXOPEAKDETRDY Clear HFXOPEAKDETRDY Interrupt Flag 11 1 write-only HFXORDY Clear HFXORDY Interrupt Flag 1 1 write-only LFRCOEDGE Clear LFRCOEDGE Interrupt Flag 28 1 write-only LFRCORDY Clear LFRCORDY Interrupt Flag 2 1 write-only LFTIMEOUTERR Clear LFTIMEOUTERR Interrupt Flag 14 1 write-only LFXOEDGE Clear LFXOEDGE Interrupt Flag 27 1 write-only LFXORDY Clear LFXORDY Interrupt Flag 3 1 write-only ULFRCOEDGE Clear ULFRCOEDGE Interrupt Flag 29 1 write-only USHFRCORDY Clear USHFRCORDY Interrupt Flag 7 1 write-only IFS Interrupt Flag Set Register 0xA4 32 write-only n 0x0 0x0 AUXHFRCORDY Set AUXHFRCORDY Interrupt Flag 4 1 write-only CALOF Set CALOF Interrupt Flag 6 1 write-only CALRDY Set CALRDY Interrupt Flag 5 1 write-only CMUERR Set CMUERR Interrupt Flag 31 1 write-only DPLLLOCKFAILHIGH Set DPLLLOCKFAILHIGH Interrupt Flag 17 1 write-only DPLLLOCKFAILLOW Set DPLLLOCKFAILLOW Interrupt Flag 16 1 write-only DPLLRDY Set DPLLRDY Interrupt Flag 15 1 write-only HFRCODIS Set HFRCODIS Interrupt Flag 13 1 write-only HFRCORDY Set HFRCORDY Interrupt Flag 0 1 write-only HFXOAUTOSW Set HFXOAUTOSW Interrupt Flag 9 1 write-only HFXODISERR Set HFXODISERR Interrupt Flag 8 1 write-only HFXOPEAKDETRDY Set HFXOPEAKDETRDY Interrupt Flag 11 1 write-only HFXORDY Set HFXORDY Interrupt Flag 1 1 write-only LFRCOEDGE Set LFRCOEDGE Interrupt Flag 28 1 write-only LFRCORDY Set LFRCORDY Interrupt Flag 2 1 write-only LFTIMEOUTERR Set LFTIMEOUTERR Interrupt Flag 14 1 write-only LFXOEDGE Set LFXOEDGE Interrupt Flag 27 1 write-only LFXORDY Set LFXORDY Interrupt Flag 3 1 write-only ULFRCOEDGE Set ULFRCOEDGE Interrupt Flag 29 1 write-only USHFRCORDY Set USHFRCORDY Interrupt Flag 7 1 write-only LFACLKEN0 Low Frequency a Clock Enable Register 0 (Async Reg) 0xE0 32 read-write n 0x0 0x0 LCD Liquid Crystal Display Controller Clock Enable 3 1 read-write LESENSE Low Energy Sensor Interface Clock Enable 2 1 read-write LETIMER0 Low Energy Timer 0 Clock Enable 0 1 read-write LETIMER1 Low Energy Timer 1 Clock Enable 1 1 read-write RTC Real-Time Counter Clock Enable 4 1 read-write LFACLKSEL Low Frequency A Clock Select Register 0x80 32 read-write n 0x0 0x0 LFA Clock Select for LFA 0 3 read-write DISABLED LFACLK is disabled 0x00000000 LFRCO LFRCO selected as LFACLK 0x00000001 LFXO LFXO selected as LFACLK 0x00000002 ULFRCO ULFRCO selected as LFACLK 0x00000004 LFAPRESC0 Low Frequency a Prescaler Register 0 (Async Reg) 0x120 32 read-write n 0x0 0x0 LCD Liquid Crystal Display Controller Prescaler 12 3 read-write DIV1 LFACLKLCD = LFACLK 0x00000000 DIV2 LFACLKLCD = LFACLK/2 0x00000001 DIV4 LFACLKLCD = LFACLK/4 0x00000002 DIV8 LFACLKLCD = LFACLK/8 0x00000003 DIV16 LFACLKLCD = LFACLK/16 0x00000004 DIV32 LFACLKLCD = LFACLK/32 0x00000005 DIV64 LFACLKLCD = LFACLK/64 0x00000006 DIV128 LFACLKLCD = LFACLK/128 0x00000007 LESENSE Low Energy Sensor Interface Prescaler 8 2 read-write DIV1 LFACLKLESENSE = LFACLK 0x00000000 DIV2 LFACLKLESENSE = LFACLK/2 0x00000001 DIV4 LFACLKLESENSE = LFACLK/4 0x00000002 DIV8 LFACLKLESENSE = LFACLK/8 0x00000003 LETIMER0 Low Energy Timer 0 Prescaler 0 4 read-write DIV1 LFACLKLETIMER0 = LFACLK 0x00000000 DIV2 LFACLKLETIMER0 = LFACLK/2 0x00000001 DIV4 LFACLKLETIMER0 = LFACLK/4 0x00000002 DIV8 LFACLKLETIMER0 = LFACLK/8 0x00000003 DIV16 LFACLKLETIMER0 = LFACLK/16 0x00000004 DIV32 LFACLKLETIMER0 = LFACLK/32 0x00000005 DIV64 LFACLKLETIMER0 = LFACLK/64 0x00000006 DIV128 LFACLKLETIMER0 = LFACLK/128 0x00000007 DIV256 LFACLKLETIMER0 = LFACLK/256 0x00000008 DIV512 LFACLKLETIMER0 = LFACLK/512 0x00000009 DIV1024 LFACLKLETIMER0 = LFACLK/1024 0x0000000A DIV2048 LFACLKLETIMER0 = LFACLK/2048 0x0000000B DIV4096 LFACLKLETIMER0 = LFACLK/4096 0x0000000C DIV8192 LFACLKLETIMER0 = LFACLK/8192 0x0000000D DIV16384 LFACLKLETIMER0 = LFACLK/16384 0x0000000E DIV32768 LFACLKLETIMER0 = LFACLK/32768 0x0000000F LETIMER1 Low Energy Timer 1 Prescaler 4 4 read-write DIV1 LFACLKLETIMER1 = LFACLK 0x00000000 DIV2 LFACLKLETIMER1 = LFACLK/2 0x00000001 DIV4 LFACLKLETIMER1 = LFACLK/4 0x00000002 DIV8 LFACLKLETIMER1 = LFACLK/8 0x00000003 DIV16 LFACLKLETIMER1 = LFACLK/16 0x00000004 DIV32 LFACLKLETIMER1 = LFACLK/32 0x00000005 DIV64 LFACLKLETIMER1 = LFACLK/64 0x00000006 DIV128 LFACLKLETIMER1 = LFACLK/128 0x00000007 DIV256 LFACLKLETIMER1 = LFACLK/256 0x00000008 DIV512 LFACLKLETIMER1 = LFACLK/512 0x00000009 DIV1024 LFACLKLETIMER1 = LFACLK/1024 0x0000000A DIV2048 LFACLKLETIMER1 = LFACLK/2048 0x0000000B DIV4096 LFACLKLETIMER1 = LFACLK/4096 0x0000000C DIV8192 LFACLKLETIMER1 = LFACLK/8192 0x0000000D DIV16384 LFACLKLETIMER1 = LFACLK/16384 0x0000000E DIV32768 LFACLKLETIMER1 = LFACLK/32768 0x0000000F RTC Real-Time Counter Prescaler 16 4 read-write DIV1 LFACLKRTC = LFACLK 0x00000000 DIV2 LFACLKRTC = LFACLK/2 0x00000001 DIV4 LFACLKRTC = LFACLK/4 0x00000002 DIV8 LFACLKRTC = LFACLK/8 0x00000003 DIV16 LFACLKRTC = LFACLK/16 0x00000004 DIV32 LFACLKRTC = LFACLK/32 0x00000005 DIV64 LFACLKRTC = LFACLK/64 0x00000006 DIV128 LFACLKRTC = LFACLK/128 0x00000007 DIV256 LFACLKRTC = LFACLK/256 0x00000008 DIV512 LFACLKRTC = LFACLK/512 0x00000009 DIV1024 LFACLKRTC = LFACLK/1024 0x0000000A DIV2048 LFACLKRTC = LFACLK/2048 0x0000000B DIV4096 LFACLKRTC = LFACLK/4096 0x0000000C DIV8192 LFACLKRTC = LFACLK/8192 0x0000000D DIV16384 LFACLKRTC = LFACLK/16384 0x0000000E DIV32768 LFACLKRTC = LFACLK/32768 0x0000000F LFBCLKEN0 Low Frequency B Clock Enable Register 0 (Async Reg) 0xE8 32 read-write n 0x0 0x0 CSEN Capacitive touch sense module Clock Enable 3 1 read-write LEUART0 Low Energy UART 0 Clock Enable 0 1 read-write LEUART1 Low Energy UART 1 Clock Enable 1 1 read-write SYSTICK Clock Enable 2 1 read-write LFBCLKSEL Low Frequency B Clock Select Register 0x84 32 read-write n 0x0 0x0 LFB Clock Select for LFB 0 3 read-write DISABLED LFBCLK is disabled 0x00000000 LFRCO LFRCO selected as LFBCLK 0x00000001 LFXO LFXO selected as LFBCLK 0x00000002 HFCLKLE HFCLK divided by two/four is selected as LFBCLK 0x00000003 ULFRCO ULFRCO selected as LFBCLK 0x00000004 LFBPRESC0 Low Frequency B Prescaler Register 0 (Async Reg) 0x128 32 read-write n 0x0 0x0 CSEN Capacitive touch sense module Prescaler 12 2 read-write DIV16 LFBCLKCSEN = LFBCLK/16 0x00000000 DIV32 LFBCLKCSEN = LFBCLK/32 0x00000001 DIV64 LFBCLKCSEN = LFBCLK/64 0x00000002 DIV128 LFBCLKCSEN = LFBCLK/128 0x00000003 LEUART0 Low Energy UART 0 Prescaler 0 2 read-write DIV1 LFBCLKLEUART0 = LFBCLK 0x00000000 DIV2 LFBCLKLEUART0 = LFBCLK/2 0x00000001 DIV4 LFBCLKLEUART0 = LFBCLK/4 0x00000002 DIV8 LFBCLKLEUART0 = LFBCLK/8 0x00000003 LEUART1 Low Energy UART 1 Prescaler 4 2 read-write DIV1 LFBCLKLEUART1 = LFBCLK 0x00000000 DIV2 LFBCLKLEUART1 = LFBCLK/2 0x00000001 DIV4 LFBCLKLEUART1 = LFBCLK/4 0x00000002 DIV8 LFBCLKLEUART1 = LFBCLK/8 0x00000003 SYSTICK Prescaler 8 4 read-only DIV1 LFBCLKSYSTICK = LFBCLK 0x00000000 LFCCLKEN0 Low Frequency C Clock Enable Register 0 (Async Reg) 0xEC 32 read-write n 0x0 0x0 USB Universal Serial Bus Interface Clock Enable 0 1 read-write LFCCLKSEL Low Frequency C Clock Select Register 0x8C 32 read-write n 0x0 0x0 LFC Clock Select for LFC 0 3 read-write DISABLED LFCCLK is disabled 0x00000000 LFRCO LFRCO selected as LFCCLK 0x00000001 LFXO LFXO selected as LFCCLK 0x00000002 ULFRCO ULFRCO selected as LFCCLK 0x00000004 LFECLKEN0 Low Frequency E Clock Enable Register 0 (Async Reg) 0xF0 32 read-write n 0x0 0x0 RTCC Real-Time Counter and Calendar Clock Enable 0 1 read-write LFECLKSEL Low Frequency E Clock Select Register 0x88 32 read-write n 0x0 0x0 LFE Clock Select for LFE 0 3 read-write DISABLED LFECLK is disabled 0x00000000 LFRCO LFRCO selected as LFECLK 0x00000001 LFXO LFXO selected as LFECLK 0x00000002 ULFRCO ULFRCO selected as LFECLK 0x00000004 LFEPRESC0 Low Frequency E Prescaler Register 0 (Async Reg) 0x130 32 read-write n 0x0 0x0 RTCC Real-Time Counter and Calendar Prescaler 0 2 read-write DIV1 LFECLKRTCC = LFECLK 0x00000000 DIV2 LFECLKRTCC = LFECLK/2 0x00000001 DIV4 LFECLKRTCC = LFECLK/4 0x00000002 LFRCOCTRL LFRCO Control Register 0x20 32 read-write n 0x0 0x0 ENCHOP Enable Comparator Chopping 17 1 read-write ENDEM Enable Dynamic Element Matching 18 1 read-write ENVREF Enable Duty Cycling of Vref 16 1 read-write GMCCURTUNE Tuning of Gmc Current 28 4 read-write TIMEOUT LFRCO Timeout 24 2 read-write 2CYCLES Timeout period of 2 cycles 0x00000000 16CYCLES Timeout period of 16 cycles 0x00000001 32CYCLES Timeout period of 32 cycles 0x00000002 TUNING LFRCO Tuning Value 0 9 read-write VREFUPDATE Control Vref Update Rate 20 2 read-write 32CYCLES 32 clocks. 0x00000000 64CYCLES 64 clocks. 0x00000001 128CYCLES 128 clocks. 0x00000002 256CYCLES 256 clocks. 0x00000003 LFXOCTRL LFXO Control Register 0x38 32 read-write n 0x0 0x0 AGC LFXO AGC Enable 15 1 read-write BUFCUR LFXO Buffer Bias Current 20 1 read-write CUR LFXO Current Trim 16 2 read-write GAIN LFXO Startup Gain 11 2 read-write HIGHAMPL LFXO High XTAL Oscillation Amplitude Enable 14 1 read-write MODE LFXO Mode 8 2 read-write XTAL 32768 Hz crystal oscillator 0x00000000 BUFEXTCLK An AC coupled buffer is coupled in series with LFXTAL_N pin, suitable for external sinus wave (32768 Hz). 0x00000001 DIGEXTCLK Digital external clock on LFXTAL_N pin. Oscillator is effectively bypassed. 0x00000002 TIMEOUT LFXO Timeout 24 3 read-write 2CYCLES Timeout period of 2 cycles 0x00000000 256CYCLES Timeout period of 256 cycles 0x00000001 1KCYCLES Timeout period of 1024 cycles 0x00000002 2KCYCLES Timeout period of 2048 cycles 0x00000003 4KCYCLES Timeout period of 4096 cycles 0x00000004 8KCYCLES Timeout period of 8192 cycles 0x00000005 16KCYCLES Timeout period of 16384 cycles 0x00000006 32KCYCLES Timeout period of 32768 cycles 0x00000007 TUNING LFXO Internal Capacitor Array Tuning Value 0 7 read-write LOCK Configuration Lock Register 0x180 32 read-write n 0x0 0x0 LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 OSCENCMD Oscillator Enable/Disable Command Register 0x60 32 write-only n 0x0 0x0 AUXHFRCODIS AUXHFRCO Disable 5 1 write-only AUXHFRCOEN AUXHFRCO Enable 4 1 write-only DPLLDIS DPLL Disable 13 1 write-only DPLLEN DPLL Enable 12 1 write-only HFRCODIS HFRCO Disable 1 1 write-only HFRCOEN HFRCO Enable 0 1 write-only HFXODIS HFXO Disable 3 1 write-only HFXOEN HFXO Enable 2 1 write-only LFRCODIS LFRCO Disable 7 1 write-only LFRCOEN LFRCO Enable 6 1 write-only LFXODIS LFXO Disable 9 1 write-only LFXOEN LFXO Enable 8 1 write-only USHFRCODIS USHFRCO Disable 11 1 write-only USHFRCOEN USHFRCO Enable 10 1 write-only PCNTCTRL PCNT Control Register 0x150 32 read-write n 0x0 0x0 PCNT0CLKEN PCNT0 Clock Enable 0 1 read-write PCNT0CLKSEL PCNT0 Clock Select 1 1 read-write PCNT1CLKEN PCNT1 Clock Enable 2 1 read-write PCNT1CLKSEL PCNT1 Clock Select 3 1 read-write PCNT2CLKEN PCNT2 Clock Enable 4 1 read-write PCNT2CLKSEL PCNT2 Clock Select 5 1 read-write QSPICTRL QSPI Control Register 0x164 32 read-write n 0x0 0x0 QSPI0CLKDIS QSPI0 Reference Clock Disable 7 1 read-write QSPI0CLKSEL QSPI0 Reference Clock Select 0 2 read-write HFRCO HFRCO clock is used to clock QSPI0 0x00000000 HFXO HFXO clock is used to clock QSPI0 0x00000001 AUXHFRCO AUXHFRCO is used to clock QSPI0 0x00000002 USHFRCO USHFRCO is used to clock QSPI0 0x00000003 ROUTELOC0 I/O Routing Location Register 0x174 32 read-write n 0x0 0x0 CLKOUT0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 CLKOUT1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 CLKOUT2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 ROUTELOC1 I/O Routing Location Register 0x178 32 read-write n 0x0 0x0 CLKIN0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTEPEN I/O Routing Pin Enable Register 0x170 32 read-write n 0x0 0x0 CLKIN0PEN CLKIN0 Pin Enable 28 1 read-write CLKOUT0PEN CLKOUT0 Pin Enable 0 1 read-write CLKOUT1PEN CLKOUT1 Pin Enable 1 1 read-write CLKOUT2PEN CLKOUT2 Pin Enable 2 1 read-write SDIOCTRL SDIO Control Register 0x160 32 read-write n 0x0 0x0 SDIOCLKDIS SDIO Reference Clock Disable 7 1 read-write SDIOCLKSEL SDIO Reference Clock Select 0 2 read-write HFRCO HFRCO clock is used to clock SDIO 0x00000000 HFXO HFXO clock is used to clock SDIO 0x00000001 AUXHFRCO AUXHFRCO is used to clock SDIO 0x00000002 USHFRCO USHFRCO is used to clock SDIO 0x00000003 STATUS Status Register 0x90 32 read-only n 0x0 0x0 AUXHFRCOENS AUXHFRCO Enable Status 4 1 read-only AUXHFRCORDY AUXHFRCO Ready 5 1 read-only CALRDY Calibration Ready 16 1 read-only DPLLENS DPLL Enable Status 12 1 read-only DPLLRDY DPLL Ready 13 1 read-only HFRCOENS HFRCO Enable Status 0 1 read-only HFRCORDY HFRCO Ready 1 1 read-only HFXOAMPLOW HFXO Amplitude Tuning Value Too Low 25 1 read-only HFXOENS HFXO Enable Status 2 1 read-only HFXOPEAKDETRDY HFXO Peak Detection Ready 22 1 read-only HFXORDY HFXO Ready 3 1 read-only LFRCOENS LFRCO Enable Status 6 1 read-only LFRCOPHASE LFRCO Clock Phase 28 1 read-only LFRCORDY LFRCO Ready 7 1 read-only LFXOENS LFXO Enable Status 8 1 read-only LFXOPHASE LFXO Clock Phase 27 1 read-only LFXORDY LFXO Ready 9 1 read-only QSPI0CLKENS QSPI0 Clock Enabled Status 18 1 read-only SDIOCLKENS SDIO Clock Enabled Status 17 1 read-only ULFRCOPHASE ULFRCO Clock Phase 29 1 read-only USHFRCOENS USHFRCO Enable Status 10 1 read-only USHFRCORDY USHFRCO Ready 11 1 read-only SYNCBUSY Synchronization Busy Register 0x140 32 read-only n 0x0 0x0 AUXHFRCOBSY AUXHFRCO Busy 25 1 read-only HFRCOBSY HFRCO Busy 24 1 read-only HFXOBSY HFXO Busy 28 1 read-only LFACLKEN0 Low Frequency a Clock Enable 0 Busy 0 1 read-only LFAPRESC0 Low Frequency a Prescaler 0 Busy 2 1 read-only LFBCLKEN0 Low Frequency B Clock Enable 0 Busy 4 1 read-only LFBPRESC0 Low Frequency B Prescaler 0 Busy 6 1 read-only LFCCLKEN0 Low Frequency C Clock Enable 0 Busy 8 1 read-only LFECLKEN0 Low Frequency E Clock Enable 0 Busy 16 1 read-only LFEPRESC0 Low Frequency E Prescaler 0 Busy 18 1 read-only LFRCOBSY LFRCO Busy 26 1 read-only LFRCOVREFBSY LFRCO VREF Busy 27 1 read-only LFXOBSY LFXO Busy 29 1 read-only USHFRCOBSY USHFRCO Busy 30 1 read-only USBCRCTRL USB Clock Recovery Control 0x1F4 32 read-write n 0x0 0x0 USBCREN Clock Recovery Enable 0 1 read-write USBLSCRMD Low Speed Clock Recovery Mode 1 1 read-write USBCTRL USB Control Register 0x1F0 32 read-write n 0x0 0x0 USBCLKEN USB Rate Clock Enable 7 1 read-write USBCLKSEL USB Rate Clock Select 0 3 read-write USHFRCO USHFRCO (clock recovery) is clocking USB 0x00000000 HFXO HFXO clock is used to clock USB 0x00000001 HFXOX2 HFXO clock doubler is used to clock USB 0x00000002 HFRCO HFRCO clock is used to clock USB 0x00000003 LFXO LFXO clock is used to clock USB 0x00000004 LFRCO LFRCO clock is used to clock USB 0x00000005 USHFRCOCTRL USHFRCO Control Register 0x8 32 read-write n 0x0 0x0 CLKDIV Locally Divide USHFRCO Clock Output 25 2 read-write DIV1 Divide by 1. 0x00000000 DIV2 Divide by 2. 0x00000001 DIV4 Divide by 4. 0x00000002 CMPBIAS USHFRCO Comparator Bias Current 21 3 read-write FINETUNING USHFRCO Fine Tuning Value 8 6 read-write FINETUNINGEN Enable Reference for Fine Tuning 27 1 read-write FREQRANGE USHFRCO Frequency Range 16 5 read-write LDOHP USHFRCO LDO High Power Mode 24 1 read-write TUNING USHFRCO Tuning Value 0 7 read-write VREFTC USHFRCO Temperature Coefficient Trim on Comparator Reference 28 4 read-write CRYOTIMER CRYOTIMER CRYOTIMER 0x0 0x0 0x400 registers n CRYOTIMER 35 CNT Counter Value 0x8 32 read-only n 0x0 0x0 CNT Counter Value 0 32 read-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 DEBUGRUN Debug Mode Run Enable 1 1 read-write EN Enable CRYOTIMER 0 1 read-write OSCSEL Select Low Frequency Oscillator 2 2 read-write DISABLED Output is driven low 0x00000000 LFRCO Select Low Frequency RC Oscillator 0x00000001 LFXO Select Low Frequency Crystal Oscillator 0x00000002 ULFRCO Select Ultra Low Frequency RC Oscillator 0x00000003 PRESC Prescaler Setting 5 3 read-write DIV1 LF Oscillator frequency undivided 0x00000000 DIV2 LF Oscillator frequency divided by 2 0x00000001 DIV4 LF Oscillator frequency divided by 4 0x00000002 DIV8 LF Oscillator frequency divided by 8 0x00000003 DIV16 LF Oscillator frequency divided by 16 0x00000004 DIV32 LF Oscillator frequency divided by 32 0x00000005 DIV64 LF Oscillator frequency divided by 64 0x00000006 DIV128 LF Oscillator frequency divided by 128 0x00000007 EM4WUEN Wake Up Enable 0xC 32 read-write n 0x0 0x0 EM4WU EM4 Wake-up Enable 0 1 read-write IEN Interrupt Enable Register 0x1C 32 read-write n 0x0 0x0 PERIOD PERIOD Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0x10 32 read-only n 0x0 0x0 PERIOD Wakeup Event/Interrupt 0 1 read-only IFC Interrupt Flag Clear Register 0x18 32 write-only n 0x0 0x0 PERIOD Clear PERIOD Interrupt Flag 0 1 write-only IFS Interrupt Flag Set Register 0x14 32 write-only n 0x0 0x0 PERIOD Set PERIOD Interrupt Flag 0 1 write-only PERIODSEL Interrupt Duration 0x4 32 read-write n 0x0 0x0 PERIODSEL Interrupts/Wakeup Events Period Setting 0 6 read-write CRYPTO0 CRYPTO0 CRYPTO0 0x0 0x0 0x400 registers n CRYPTO0 34 CMD Command Register 0x8 32 read-write n 0x0 0x0 INSTR Execute Instruction 0 8 read-write SEQSTART Encryption/Decryption SEQUENCE Start 9 1 write-only SEQSTEP Sequence Step 11 1 write-only SEQSTOP Sequence Stop 10 1 write-only CSTATUS Control Status Register 0x18 32 read-only n 0x0 0x0 SEQIP Sequence Next Instruction Pointer 20 5 read-only SEQPART Sequence Part 16 1 read-only SEQSKIP Sequence Skip Next Instruction 17 1 read-only V0 Selected ALU Operand 0 0 3 read-only DDATA0 None 0x00000000 DDATA1 None 0x00000001 DDATA2 None 0x00000002 DDATA3 None 0x00000003 DDATA4 None 0x00000004 DATA0 None 0x00000005 DATA1 None 0x00000006 DATA2 None 0x00000007 V1 Selected ALU Operand 1 8 3 read-only DDATA0 None 0x00000000 DDATA1 None 0x00000001 DDATA2 None 0x00000002 DDATA3 None 0x00000003 DDATA4 None 0x00000004 DATA0 None 0x00000005 DATA1 None 0x00000006 DATA2 None 0x00000007 CTRL Control Register 0x0 32 read-write n 0x0 0x0 AES AES Mode 0 1 read-write COMBDMA0WEREQ Combined Data0 Write DMA Request 31 1 read-write DMA0MODE DMA0 Read Mode 16 2 read-write FULL Target register is fully read/written during every DMA transaction 0x00000000 LENLIMIT Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + necessary zero padding is read. Zero padding is automatically added when writing. 0x00000001 FULLBYTE Target register is fully read/written during every DMA transaction. Bytewise DMA. 0x00000002 LENLIMITBYTE Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + necessary zero padding is read. Bytewise DMA. Zero padding is automatically added when writing. 0x00000003 DMA0RSEL DMA0 Read Register Select 20 2 read-write DATA0 None 0x00000000 DDATA0 None 0x00000001 DDATA0BIG None 0x00000002 QDATA0 None 0x00000003 DMA1MODE DMA1 Read Mode 24 2 read-write FULL Target register is fully read/written during every DMA transaction 0x00000000 LENLIMIT Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + 1 bytes + necessary zero padding is read. Zero padding is automatically added when writing. 0x00000001 FULLBYTE Target register is fully read/written during every DMA transaction. Bytewise DMA. 0x00000002 LENLIMITBYTE Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + 1 bytes + necessary zero padding is read. Bytewise DMA. Zero padding is automatically added when writing. 0x00000003 DMA1RSEL DATA0 DMA Unaligned Read Register Select 28 2 read-write DATA1 None 0x00000000 DDATA1 None 0x00000001 QDATA1 None 0x00000002 QDATA1BIG None 0x00000003 INCWIDTH Increment Width 14 2 read-write INCWIDTH1 Byte 15 in DATA1 is used for the increment function. 0x00000000 INCWIDTH2 Bytes 14 and 15 in DATA1 are used for the increment function. 0x00000001 INCWIDTH3 Bytes 13 to 15 in DATA1 are used for the increment function. 0x00000002 INCWIDTH4 Bytes 12 to 15 in DATA1 are used for the increment function. 0x00000003 KEYBUFDIS Key Buffer Disable 1 1 read-write NOBUSYSTALL No Stalling of Bus When Busy 10 1 read-write SHA SHA Mode 2 1 read-write DATA0 DATA0 Register Access 0x80 32 read-write n 0x0 0x0 modifyExternal DATA0 Data 0 Access 0 32 read-write DATA0BYTE DATA0 Register Byte Access 0xB0 32 read-write n 0x0 0x0 modifyExternal DATA0BYTE Data 0 Byte Access 0 8 read-write DATA0BYTE12 DATA0 Register Byte 12 Access 0xC0 32 read-write n 0x0 0x0 DATA0BYTE12 Data 0 Byte 12 Access 0 8 read-write DATA0BYTE13 DATA0 Register Byte 13 Access 0xC4 32 read-write n 0x0 0x0 DATA0BYTE13 Data 0 Byte 13 Access 0 8 read-write DATA0BYTE14 DATA0 Register Byte 14 Access 0xC8 32 read-write n 0x0 0x0 DATA0BYTE14 Data 0 Byte 14 Access 0 8 read-write DATA0BYTE15 DATA0 Register Byte 15 Access 0xCC 32 read-write n 0x0 0x0 DATA0BYTE15 Data 0 Byte 15 Access 0 8 read-write DATA0XOR DATA0XOR Register Access 0xA0 32 read-write n 0x0 0x0 modifyExternal DATA0XOR XOR Data 0 Access 0 32 read-write DATA0XORBYTE DATA0 Register Byte XOR Access 0xBC 32 read-write n 0x0 0x0 modifyExternal DATA0XORBYTE Data 0 XOR Byte Access 0 8 read-write DATA1 DATA1 Register Access 0x84 32 read-write n 0x0 0x0 modifyExternal DATA1 Data 1 Access 0 32 read-write DATA1BYTE DATA1 Register Byte Access 0xB4 32 read-write n 0x0 0x0 modifyExternal DATA1BYTE Data 1 Byte Access 0 8 read-write DATA2 DATA2 Register Access 0x88 32 read-write n 0x0 0x0 modifyExternal DATA2 Data 2 Access 0 32 read-write DATA3 DATA3 Register Access 0x8C 32 read-write n 0x0 0x0 modifyExternal DATA3 Data 3 Access 0 32 read-write DDATA0 DDATA0 Register Access 0x100 32 read-write n 0x0 0x0 modifyExternal DDATA0 Double Data 0 Access 0 32 read-write DDATA0BIG DDATA0 Register Big Endian Access 0x130 32 read-write n 0x0 0x0 modifyExternal DDATA0BIG Double Data 0 Big Endian Access 0 32 read-write DDATA0BYTE DDATA0 Register Byte Access 0x140 32 read-write n 0x0 0x0 modifyExternal DDATA0BYTE Ddata 0 Byte Access 0 8 read-write DDATA0BYTE32 DDATA0 Register Byte 32 Access 0x148 32 read-write n 0x0 0x0 DDATA0BYTE32 Ddata 0 Byte 32 Access 0 4 read-write DDATA1 DDATA1 Register Access 0x104 32 read-write n 0x0 0x0 modifyExternal DDATA1 Double Data 0 Access 0 32 read-write DDATA1BYTE DDATA1 Register Byte Access 0x144 32 read-write n 0x0 0x0 modifyExternal DDATA1BYTE Ddata 1 Byte Access 0 8 read-write DDATA2 DDATA2 Register Access 0x108 32 read-write n 0x0 0x0 modifyExternal DDATA2 Double Data 0 Access 0 32 read-write DDATA3 DDATA3 Register Access 0x10C 32 read-write n 0x0 0x0 modifyExternal DDATA3 Double Data 0 Access 0 32 read-write DDATA4 DDATA4 Register Access 0x110 32 read-write n 0x0 0x0 modifyExternal DDATA4 Double Data 0 Access 0 32 read-write DSTATUS Data Status Register 0x14 32 read-only n 0x0 0x0 CARRY Carry From Arithmetic Operation 24 1 read-only DATA0ZERO Data 0 Zero 0 4 read-only ZERO0TO31 In DATA0 bits 0 to 31 are all zero. 0x00000001 ZERO32TO63 In DATA0 bits 32 to 63 are all zero. 0x00000002 ZERO64TO95 In DATA0 bits 64 to 95 are all zero. 0x00000004 ZERO96TO127 In DATA0 bits 96 to 127 are all zero. 0x00000008 DDATA0LSBS LSBs in DDATA0 8 4 read-only DDATA0MSBS MSB in DDATA0 16 4 read-only DDATA1MSB MSB in DDATA1 20 1 read-only IEN Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 INSTRDONE INSTRDONE Interrupt Enable 0 1 read-write SEQDONE SEQDONE Interrupt Enable 1 1 read-write IF AES Interrupt Flags 0x40 32 read-only n 0x0 0x0 INSTRDONE Instruction Done 0 1 read-only SEQDONE Sequence Done 1 1 read-only IFC Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 INSTRDONE Clear INSTRDONE Interrupt Flag 0 1 write-only SEQDONE Clear SEQDONE Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 INSTRDONE Set INSTRDONE Interrupt Flag 0 1 write-only SEQDONE Set SEQDONE Interrupt Flag 1 1 write-only KEY KEY Register Access 0x20 32 read-write n 0x0 0x0 modifyExternal KEY Key Access 0 32 read-write KEYBUF KEY Buffer Register Access 0x24 32 read-write n 0x0 0x0 modifyExternal KEYBUF Key Buffer Access 0 32 read-write QDATA0 QDATA0 Register Access 0x180 32 read-write n 0x0 0x0 modifyExternal QDATA0 Quad Data 0 Access 0 32 read-write QDATA0BYTE QDATA0 Register Byte Access 0x1C0 32 read-write n 0x0 0x0 modifyExternal QDATA0BYTE Qdata 0 Byte Access 0 8 read-write QDATA1 QDATA1 Register Access 0x184 32 read-write n 0x0 0x0 modifyExternal QDATA1 Quad Data 1 Access 0 32 read-write QDATA1BIG QDATA1 Register Big Endian Access 0x1A4 32 read-write n 0x0 0x0 modifyExternal QDATA1BIG Quad Data 1 Big Endian Access 0 32 read-write QDATA1BYTE QDATA1 Register Byte Access 0x1C4 32 read-write n 0x0 0x0 modifyExternal QDATA1BYTE Qdata 1 Byte Access 0 8 read-write SEQ0 Sequence Register 0 0x50 32 read-write n 0x0 0x0 INSTR0 Sequence Instruction 0 0 8 read-write INSTR1 Sequence Instruction 1 8 8 read-write INSTR2 Sequence Instruction 2 16 8 read-write INSTR3 Sequence Instruction 3 24 8 read-write SEQ1 Sequence Register 1 0x54 32 read-write n 0x0 0x0 INSTR4 Sequence Instruction 4 0 8 read-write INSTR5 Sequence Instruction 5 8 8 read-write INSTR6 Sequence Instruction 6 16 8 read-write INSTR7 Sequence Instruction 7 24 8 read-write SEQ2 Sequence Register 2 0x58 32 read-write n 0x0 0x0 INSTR10 Sequence Instruction 10 16 8 read-write INSTR11 Sequence Instruction 11 24 8 read-write INSTR8 Sequence Instruction 8 0 8 read-write INSTR9 Sequence Instruction 9 8 8 read-write SEQ3 Sequence Register 3 0x5C 32 read-write n 0x0 0x0 INSTR12 Sequence Instruction 12 0 8 read-write INSTR13 Sequence Instruction 13 8 8 read-write INSTR14 Sequence Instruction 14 16 8 read-write INSTR15 Sequence Instruction 15 24 8 read-write SEQ4 Sequence Register 4 0x60 32 read-write n 0x0 0x0 INSTR16 Sequence Instruction 16 0 8 read-write INSTR17 Sequence Instruction 17 8 8 read-write INSTR18 Sequence Instruction 18 16 8 read-write INSTR19 Sequence Instruction 19 24 8 read-write SEQCTRL Sequence Control 0x30 32 read-write n 0x0 0x0 BLOCKSIZE Size of Data Blocks 20 2 read-write 16BYTES A block is 16 bytes long 0x00000000 32BYTES A block is 32 bytes long 0x00000001 64BYTES A block is 64 bytes long 0x00000002 DMA0PRESA DMA0 Preserve a 28 1 read-write DMA0SKIP DMA0 Skip 24 2 read-write DMA1PRESA DMA1 Preserve a 29 1 read-write DMA1SKIP DMA1 Skip 26 2 read-write HALT Halt Sequence 31 1 read-write LENGTHA Buffer Length a in Bytes 0 14 read-write SEQCTRLB Sequence Control B 0x34 32 read-write n 0x0 0x0 DMA0PRESB DMA0 Preserve B 28 1 read-write DMA1PRESB DMA1 Preserve B 29 1 read-write LENGTHB Buffer Length B in Bytes 0 14 read-write STATUS Status Register 0x10 32 read-only n 0x0 0x0 DMAACTIVE DMA Action is Active 2 1 read-only INSTRRUNNING Action is Active 1 1 read-only SEQRUNNING AES SEQUENCE Running 0 1 read-only WAC Wide Arithmetic Configuration 0x4 32 read-write n 0x0 0x0 MODOP Modular Operation Field Type 4 1 read-write MODULUS Modular Operation Modulus 0 4 read-write BIN256 Generic modulus. p = 2^256 0x00000000 BIN128 Generic modulus. p = 2^128 0x00000001 ECCBIN233P Modulus for B-233 and K-233 ECC curves. p(t) = t^233 + t^74 + 1 0x00000002 ECCBIN163P Modulus for B-163 and K-163 ECC curves. p(t) = t^163 + t^7 + t^6 + t^3 + 1 0x00000003 GCMBIN128 Modulus for GCM. P(t) = t^128 + t^7 + t^2 + t + 1 0x00000004 ECCPRIME256P Modulus for P-256 ECC curve. p = 2^256 - 2^224 + 2^192 + 2^96 - 1 0x00000005 ECCPRIME224P Modulus for P-224 ECC curve. p = 2^224 - 2^96 - 1 0x00000006 ECCPRIME192P Modulus for P-192 ECC curve. p = 2^192 - 2^64 - 1 0x00000007 ECCBIN233N P modulus for B-233 ECC curve 0x00000008 ECCBIN233KN P modulus for K-233 ECC curve 0x00000009 ECCBIN163N P modulus for B-163 ECC curve 0x0000000A ECCBIN163KN P modulus for K-163 ECC curve 0x0000000B ECCPRIME256N P modulus for P-256 ECC curve 0x0000000C ECCPRIME224N P modulus for P-224 ECC curve 0x0000000D ECCPRIME192N P modulus for P-192 ECC curve 0x0000000E MULWIDTH Multiply Width 8 2 read-write MUL256 Multiply 256 bits 0x00000000 MUL128 Multiply 128 bits 0x00000001 MULMOD Same number of bits as specified by MODULUS 0x00000002 RESULTWIDTH Result Width 10 2 read-write 256BIT Results have 256 bits 0x00000000 128BIT Results have 128 bits 0x00000001 260BIT Results have 260 bits. Upper bits of result can be read through DDATA0MSBS in CRYPTO_STATUS 0x00000002 CSEN CSEN CSEN 0x0 0x0 0x400 registers n CSEN 52 ANACTRL Analog Control 0x48 32 read-write n 0x0 0x0 IDACIREFS Current DAC and Reference Current Scale 8 3 read-write IREFPROG Reference Current Control. 4 3 read-write TRSTPROG Reset Timing 20 3 read-write APORTCONFLICT APORT Request Conflict 0x2C 32 read-only n 0x0 0x0 APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only APORTREQ APORT Request Status 0x28 32 read-only n 0x0 0x0 APORT1XREQ 1 If the Bus Connected to APORT2X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1X is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only CMD Command 0x8 32 write-only n 0x0 0x0 START Start Software-Triggered Conversions 0 1 write-only CMPTHR Comparator Threshold 0x30 32 read-write n 0x0 0x0 CMPTHR Comparator Threshold. 0 16 read-write CTRL Control 0x0 32 read-write n 0x0 0x0 ACU CSEN Accumulator Mode Select 12 3 read-write ACC1 Accumulate 1 sample. 0x00000000 ACC2 Accumulate 2 sample. 0x00000001 ACC4 Accumulate 4 sample. 0x00000002 ACC8 Accumulate 8 sample. 0x00000003 ACC16 Accumulate 16 sample. 0x00000004 ACC32 Accumulate 32 sample. 0x00000005 ACC64 Accumulate 64 sample. 0x00000006 AUTOGND CSEN Automatic Ground Enable 23 1 read-write CHOPEN CSEN Chop Enable 22 1 read-write CM CSEN Conversion Mode Select 4 2 read-write SGL Single Channel Mode: One conversion of a single channel (when MCE = 0) or set of bonded channels (when MCE = 1) per conversion trigger. 0x00000000 SCAN Scan Mode: Scans multiple selected channels once per conversion trigger. 0x00000001 CONTSGL Continuous Single Channel: Continuous conversion of a single channel (when MCE = 0) or set of bonded channels (when MCE = 1). 0x00000002 CONTSCAN Continuous Scan Mode: Continuously scans multiple selected channels. 0x00000003 CMPEN CSEN Digital Comparator Enable 18 1 read-write CMPPOL CSEN Digital Comparator Polarity Select 2 1 read-write CONVSEL CSEN Converter Select 21 1 read-write CPACCURACY Charge Pump Accuracy 28 1 read-write DMAEN CSEN DMA Enable Bit 20 1 read-write DRSF CSEN Disable Right-Shift 19 1 read-write EMACMPEN Greater and Less Than Comparison Using the Exponential Moving Average (EMA) is Enabled 25 1 read-write EN CSEN Enable 1 1 read-write LOCALSENS Local Sensing Enable 27 1 read-write MCEN CSEN Multiple Channel Enable 15 1 read-write MXUC CSEN Mux Disconnect 24 1 read-write SARCR SAR Conversion Resolution. 8 2 read-write CLK10 Conversions last 10 internal CSEN clocks and are 10-bits in length. 0x00000000 CLK12 Conversions last 12 internal CSEN clocks and are 12-bits in length. 0x00000001 CLK14 Conversions last 14 internal CSEN clocks and are 14-bits in length. 0x00000002 CLK16 Conversions last 16 internal CSEN clocks and are 16-bits in length. 0x00000003 STM Start Trigger Select 16 2 read-write PRS PRS Triggering. Conversions are triggered by the PRS channel selected in PRSSEL. 0x00000000 TIMER Timer Triggering. Conversions are triggered by a local CSEN timer reload. 0x00000001 START Software Triggering. Conversions are triggered by writing a 1 to the START field of the CMD register. 0x00000002 WARMUPMODE Select Warmup Mode for CSEN 26 1 read-write DATA Output Data 0x14 32 read-write n 0x0 0x0 DATA Output Data 0 32 read-write DMBASELINE Delta Modulation Baseline 0x40 32 read-write n 0x0 0x0 BASELINEDN Delta Modulator Integrator Initial Value 16 16 read-write BASELINEUP Delta Modulator Integrator Initial Value 0 16 read-write DMCFG Delta Modulation Configuration 0x44 32 read-write n 0x0 0x0 CRMODE Delta Modulator Conversion Resolution. 20 2 read-write DM10 10-bit delta modulator 0x00000000 DM12 12-bit delta modulator 0x00000001 DM14 14-bit delta modulator 0x00000002 DM16 16-bit delta modulator 0x00000003 DMCR Delta Modulator Conversion Rate 16 4 read-write DMG Delta Modulator Gain Step 0 8 read-write DMGRDIS Delta Modulation Gain Step Reduction Disable 28 1 read-write DMR Delta Modulator Gain Reduction Interval 8 4 read-write EMA Exponential Moving Average 0x34 32 read-write n 0x0 0x0 EMA Calculated Exponential Moving Average 0 22 read-write EMACTRL Exponential Moving Average Control 0x38 32 read-write n 0x0 0x0 EMASAMPLE EMA Sample Weight 0 3 read-write W1 EMA weight (N) is 1. 0x00000000 W2 EMA weight (N) is 2. 0x00000001 W4 EMA weight (N) is 4. 0x00000002 W8 EMA weight (N) is 8. 0x00000003 W16 EMA weight (N) is 16. 0x00000004 W32 EMA weight (N) is 32. 0x00000005 W64 EMA weight (N) is 64. 0x00000006 IEN Interrupt Enable 0x60 32 read-write n 0x0 0x0 APORTCONFLICT APORTCONFLICT Interrupt Enable 4 1 read-write CMP CMP Interrupt Enable 0 1 read-write CONV CONV Interrupt Enable 1 1 read-write DMAOF DMAOF Interrupt Enable 3 1 read-write EOS EOS Interrupt Enable 2 1 read-write IF Interrupt Flag 0x54 32 read-only n 0x0 0x0 APORTCONFLICT APORT Conflict Interrupt Flag 4 1 read-only CMP Digital Comparator Interrupt Flag 0 1 read-only CONV Conversion Done Interrupt Flag 1 1 read-only DMAOF DMA Overflow Interrupt Flag. 3 1 read-only EOS End of Scan Interrupt Flag. 2 1 read-only IFC Interrupt Flag Clear 0x5C 32 write-only n 0x0 0x0 APORTCONFLICT Clear APORTCONFLICT Interrupt Flag 4 1 write-only CMP Clear CMP Interrupt Flag 0 1 write-only CONV Clear CONV Interrupt Flag 1 1 write-only DMAOF Clear DMAOF Interrupt Flag 3 1 write-only EOS Clear EOS Interrupt Flag 2 1 write-only IFS Interrupt Flag Set 0x58 32 write-only n 0x0 0x0 APORTCONFLICT Set APORTCONFLICT Interrupt Flag 4 1 write-only CMP Set CMP Interrupt Flag 0 1 write-only CONV Set CONV Interrupt Flag 1 1 write-only DMAOF Set DMAOF Interrupt Flag 3 1 write-only EOS Set EOS Interrupt Flag 2 1 write-only PRSSEL PRS Select 0x10 32 read-write n 0x0 0x0 PRSSEL PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected as the start trigger 0x00000000 PRSCH1 PRS Channel 1 selected as the start trigger 0x00000001 PRSCH2 PRS Channel 2 selected as the start trigger 0x00000002 PRSCH3 PRS Channel 3 selected as the start trigger 0x00000003 PRSCH4 PRS Channel 4 selected as the start trigger 0x00000004 PRSCH5 PRS Channel 5 selected as the start trigger 0x00000005 PRSCH6 PRS Channel 6 selected as the start trigger 0x00000006 PRSCH7 PRS Channel 7 selected as the start trigger 0x00000007 PRSCH8 PRS Channel 8 selected as the start trigger 0x00000008 PRSCH9 PRS Channel 9 selected as the start trigger 0x00000009 PRSCH10 PRS Channel 10 selected as the start trigger 0x0000000A PRSCH11 PRS Channel 11 selected as the start trigger 0x0000000B PRSCH12 PRS Channel 12 selected as the start trigger 0x0000000C PRSCH13 PRS Channel 13 selected as the start trigger 0x0000000D PRSCH14 PRS Channel 14 selected as the start trigger 0x0000000E PRSCH15 PRS Channel 15 selected as the start trigger 0x0000000F PRSCH16 PRS Channel 16 selected as the start trigger 0x00000010 PRSCH17 PRS Channel 17 selected as the start trigger 0x00000011 PRSCH18 PRS Channel 18 selected as the start trigger 0x00000012 PRSCH19 PRS Channel 19 selected as the start trigger 0x00000013 PRSCH20 PRS Channel 20 selected as the start trigger 0x00000014 PRSCH21 PRS Channel 21 selected as the start trigger 0x00000015 PRSCH22 PRS Channel 22 selected as the start trigger 0x00000016 PRSCH23 PRS Channel 23 selected as the start trigger 0x00000017 SCANINPUTSEL0 Scan Input Selection 0 0x1C 32 read-write n 0x0 0x0 INPUT0TO7SEL CSEN_INPUT0-7 Select 0 4 read-write APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F INPUT16TO23SEL CSEN_INPUT16-23 Select 16 4 read-write APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F INPUT24TO31SEL CSEN_INPUT24-31 Select 24 4 read-write APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F INPUT8TO15SEL CSEN_INPUT8-15 Select 8 4 read-write APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F SCANINPUTSEL1 Scan Input Selection 1 0x24 32 read-write n 0x0 0x0 INPUT32TO39SEL CSEN_INPUT32-39 Select 0 4 read-write APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F INPUT40TO47SEL CSEN_INPUT40-47 Select 8 4 read-write APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F INPUT48TO55SEL CSEN_INPUT48-55 Select 16 4 read-write APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F INPUT56TO63SEL CSEN_INPUT56-63 Select 24 4 read-write APORT1CH0TO7 None 0x00000004 APORT1CH8TO15 None 0x00000005 APORT1CH16TO23 None 0x00000006 APORT1CH24TO31 None 0x00000007 APORT3CH0TO7 None 0x0000000C APORT3CH8TO15 None 0x0000000D APORT3CH16TO23 None 0x0000000E APORT3CH24TO31 None 0x0000000F SCANMASK0 Scan Channel Mask 0 0x18 32 read-write n 0x0 0x0 SCANINPUTEN Scan Channel Mask 0 32 read-write SCANMASK1 Scan Channel Mask 1 0x20 32 read-write n 0x0 0x0 SCANINPUTEN Scan Channel Mask. 0 32 read-write SINGLECTRL Single Conversion Control 0x3C 32 read-write n 0x0 0x0 SINGLESEL Single Channel Input Select 4 7 read-write APORT1XCH0 None 0x00000020 APORT1YCH1 None 0x00000021 APORT1XCH2 None 0x00000022 APORT1YCH3 None 0x00000023 APORT1XCH4 None 0x00000024 APORT1YCH5 None 0x00000025 APORT1XCH6 None 0x00000026 APORT1YCH7 None 0x00000027 APORT1XCH8 None 0x00000028 APORT1YCH9 None 0x00000029 APORT1XCH10 None 0x0000002A APORT1YCH11 None 0x0000002B APORT1XCH12 None 0x0000002C APORT1YCH13 None 0x0000002D APORT1XCH14 None 0x0000002E APORT1YCH15 None 0x0000002F APORT1XCH16 None 0x00000030 APORT1YCH17 None 0x00000031 APORT1XCH18 None 0x00000032 APORT1YCH19 None 0x00000033 APORT1XCH20 None 0x00000034 APORT1YCH21 None 0x00000035 APORT1XCH22 None 0x00000036 APORT1YCH23 None 0x00000037 APORT1XCH24 None 0x00000038 APORT1YCH25 None 0x00000039 APORT1XCH26 None 0x0000003A APORT1YCH27 None 0x0000003B APORT1XCH28 None 0x0000003C APORT1YCH29 None 0x0000003D APORT1XCH30 None 0x0000003E APORT1YCH31 None 0x0000003F APORT3XCH0 None 0x00000060 APORT3YCH1 None 0x00000061 APORT3XCH2 None 0x00000062 APORT3YCH3 None 0x00000063 APORT3XCH4 None 0x00000064 APORT3YCH5 None 0x00000065 APORT3XCH6 None 0x00000066 APORT3YCH7 None 0x00000067 APORT3XCH8 None 0x00000068 APORT3YCH9 None 0x00000069 APORT3XCH10 None 0x0000006A APORT3YCH11 None 0x0000006B APORT3XCH12 None 0x0000006C APORT3YCH13 None 0x0000006D APORT3XCH14 None 0x0000006E APORT3YCH15 None 0x0000006F APORT3XCH16 None 0x00000070 APORT3YCH17 None 0x00000071 APORT3XCH18 None 0x00000072 APORT3YCH19 None 0x00000073 APORT3XCH20 None 0x00000074 APORT3YCH21 None 0x00000075 APORT3XCH22 None 0x00000076 APORT3YCH23 None 0x00000077 APORT3XCH24 None 0x00000078 APORT3YCH25 None 0x00000079 APORT3XCH26 None 0x0000007A APORT3YCH27 None 0x0000007B APORT3XCH28 None 0x0000007C APORT3YCH29 None 0x0000007D APORT3XCH30 None 0x0000007E APORT3YCH31 None 0x0000007F STATUS Status 0xC 32 read-only n 0x0 0x0 CSENBUSY Busy Flag 0 1 read-only TIMCTRL Timing Control 0x4 32 read-write n 0x0 0x0 PCPRESC Period Counter Prescaler 0 3 read-write DIV1 The period counter clock frequency is LFBCLKCSEN/1 0x00000000 DIV2 The period counter clock frequency is LFBCLKCSEN/2 0x00000001 DIV4 The period counter clock frequency is LFBCLKCSEN/4 0x00000002 DIV8 The period counter clock frequency is LFBCLKCSEN/8 0x00000003 DIV16 The period counter clock frequency is LFBCLKCSEN/16 0x00000004 DIV32 The period counter clock frequency is LFBCLKCSEN/32 0x00000005 DIV64 The period counter clock frequency is LFBCLKCSEN/64 0x00000006 DIV128 The period counter clock frequency is LFBCLKCSEN/128 0x00000007 PCTOP Period Counter Top Value 8 8 read-write WARMUPCNT Warmup Period Counter 16 2 read-write EBI EBI EBI 0x0 0x0 0x400 registers n EBI 54 ADDRTIMING Address Timing Register 0x4 32 read-write n 0x0 0x0 ADDRHOLD Address Hold Time 8 3 read-write ADDRSETUP Address Setup Time 0 3 read-write HALFALE Half Cycle ALE Strobe Duration Enable 28 1 read-write ADDRTIMING1 Address Timing Register 1 0x18 32 read-write n 0x0 0x0 ADDRHOLD Address Hold Time 8 3 read-write ADDRSETUP Address Setup Time 0 3 read-write HALFALE Half Cycle ALE Strobe Duration Enable 28 1 read-write ADDRTIMING2 Address Timing Register 2 0x28 32 read-write n 0x0 0x0 ADDRHOLD Address Hold Time 8 3 read-write ADDRSETUP Address Setup Time 0 3 read-write HALFALE Half Cycle ALE Strobe Duration Enable 28 1 read-write ADDRTIMING3 Address Timing Register 3 0x38 32 read-write n 0x0 0x0 ADDRHOLD Address Hold Time 8 3 read-write ADDRSETUP Address Setup Time 0 3 read-write HALFALE Half Cycle ALE Strobe Duration Enable 28 1 read-write CMD Command Register 0x50 32 write-only n 0x0 0x0 ECCCLEAR Error Correction Code Clear 2 1 write-only ECCSTART Error Correction Code Generation Start 0 1 write-only ECCSTOP Error Correction Code Generation Stop 1 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 ALTMAP Alternative Address Map Enable 31 1 read-write ARDY1EN ARDY Enable for Bank 1 18 1 read-write ARDY2EN ARDY Enable for Bank 2 20 1 read-write ARDY3EN ARDY Enable for Bank 3 22 1 read-write ARDYEN ARDY Enable 16 1 read-write ARDYTO1DIS ARDY Timeout Disable for Bank 1 19 1 read-write ARDYTO2DIS ARDY Timeout Disable for Bank 2 21 1 read-write ARDYTO3DIS ARDY Timeout Disable for Bank 3 23 1 read-write ARDYTODIS ARDY Timeout Disable 17 1 read-write BANK0EN Bank 0 Enable 8 1 read-write BANK1EN Bank 1 Enable 9 1 read-write BANK2EN Bank 2 Enable 10 1 read-write BANK3EN Bank 3 Enable 11 1 read-write BL Byte Lane Enable for Bank 0 24 1 read-write BL1 Byte Lane Enable for Bank 1 25 1 read-write BL2 Byte Lane Enable for Bank 2 26 1 read-write BL3 Byte Lane Enable for Bank 3 27 1 read-write ITS Individual Timing Set, Line Polarity and Mode Definition Enable 30 1 read-write MODE Mode 0 2 read-write D8A8 EBI_AD drives 8 bit data, 8 bit address, ALE not used. Extended address bits can be enabled. 0x00000000 D16A16ALE EBI_AD drives 16 bit data, 16 bit address, ALE is used for address latching. Extended address bits can be enabled. 0x00000001 D8A24ALE EBI_AD drives 8 bit data, 24 bit address, ALE is used for address latching. Extended address bits can be enabled. 0x00000002 D16 EBI_AD drives 16 bit data, ALE not used. Extended address bits can be enabled. 0x00000003 MODE1 Mode 1 2 2 read-write D8A8 EBI_AD drives 8 bit data, 8 bit address, ALE not used. Extended address bits can be enabled. 0x00000000 D16A16ALE EBI_AD drives 16 bit data, 16 bit address, ALE is used for address latching. Extended address bits can be enabled. 0x00000001 D8A24ALE EBI_AD drives 8 bit data, 24 bit address, ALE is used for address latching. Extended address bits can be enabled. 0x00000002 D16 EBI_AD drives 16 bit data, ALE not used. Extended address bits can be enabled. 0x00000003 MODE2 Mode 2 4 2 read-write D8A8 EBI_AD drives 8 bit data, 8 bit address, ALE not used. Extended address bits can be enabled. 0x00000000 D16A16ALE EBI_AD drives 16 bit data, 16 bit address, ALE is used for address latching. Extended address bits can be enabled. 0x00000001 D8A24ALE EBI_AD drives 8 bit data, 24 bit address, ALE is used for address latching. Extended address bits can be enabled. 0x00000002 D16 EBI_AD drives 16 bit data, ALE not used. Extended address bits can be enabled. 0x00000003 MODE3 Mode 3 6 2 read-write D8A8 EBI_AD drives 8 bit data, 8 bit address, ALE not used. Extended address bits can be enabled. 0x00000000 D16A16ALE EBI_AD drives 16 bit data, 16 bit address, ALE is used for address latching. Extended address bits can be enabled. 0x00000001 D8A24ALE EBI_AD drives 8 bit data, 24 bit address, ALE is used for address latching. Extended address bits can be enabled. 0x00000002 D16 EBI_AD drives 16 bit data, ALE not used. Extended address bits can be enabled. 0x00000003 NOIDLE No Idle Cycle Insertion on Bank 0 12 1 read-write NOIDLE1 No Idle Cycle Insertion on Bank 1 13 1 read-write NOIDLE2 No Idle Cycle Insertion on Bank 2 14 1 read-write NOIDLE3 No Idle Cycle Insertion on Bank 3 15 1 read-write ECCPARITY ECC Parity Register 0x58 32 read-only n 0x0 0x0 ECCPARITY ECC Parity Data 0 32 read-only IEN Interrupt Enable Register 0xAC 32 read-write n 0x0 0x0 DDEMPTY Direct Drive Data Empty Interrupt Enable 4 1 read-write DDJIT Direct Drive Jitter Interrupt Enable 5 1 read-write HSYNC Horizontal Sync Interrupt Enable 1 1 read-write TFTPIXEL0EMPTY EBI_TFTPIXEL0 Empty Interrupt Enable 6 1 read-write TFTPIXEL1EMPTY EBI_TFTPIXEL1 Empty Interrupt Enable 7 1 read-write TFTPIXELFULL EBI_TFTPIXEL Full Interrupt Enable 8 1 read-write TFTPIXELOF EBI_TFTPIXEL Overflow Interrupt Enable 9 1 read-write VBPORCH Vertical Back Porch Interrupt Enable 2 1 read-write VFPORCH Vertical Front Porch Interrupt Enable 3 1 read-write VSYNC Vertical Sync Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0xA0 32 read-only n 0x0 0x0 DDEMPTY Direct Drive Data Empty Interrupt Flag 4 1 read-only DDJIT Direct Drive Jitter Interrupt Flag 5 1 read-only HSYNC Horizontal Sync Interrupt Flag 1 1 read-only TFTPIXEL0EMPTY EBI_TFTPIXEL0 is Empty Interrupt Flag 6 1 read-only TFTPIXEL1EMPTY EBI_TFTPIXEL1 is Empty Interrupt Flag 7 1 read-only TFTPIXELFULL EBI_TFTPIXEL is Full Interrupt Flag 8 1 read-only TFTPIXELOF EBI_TFTPIXEL Register Overflow Interrupt Flag 9 1 read-only VBPORCH Vertical Back Porch Interrupt Flag 2 1 read-only VFPORCH Vertical Front Porch Interrupt Flag 3 1 read-only VSYNC Vertical Sync Interrupt Flag 0 1 read-only IFC Interrupt Flag Clear Register 0xA8 32 write-only n 0x0 0x0 DDEMPTY Direct Drive Data Empty Interrupt Flag Clear 4 1 write-only DDJIT Direct Drive Jitter Interrupt Flag Clear 5 1 write-only HSYNC Horizontal Sync Interrupt Flag Clear 1 1 write-only TFTPIXEL0EMPTY EBI_TFTPIXEL0 Empty Interrupt Flag Clear 6 1 write-only TFTPIXEL1EMPTY EBI_TFTPIXEL1 Empty Interrupt Flag Clear 7 1 write-only TFTPIXELFULL EBI_TFTPIXEL Full Interrupt Flag Clear 8 1 write-only TFTPIXELOF EBI_TFTPIXEL Overflow Interrupt Flag Clear 9 1 write-only VBPORCH Vertical Back Porch Interrupt Flag Clear 2 1 write-only VFPORCH Vertical Front Porch Interrupt Flag Clear 3 1 write-only VSYNC Vertical Sync Interrupt Flag Clear 0 1 write-only IFS Interrupt Flag Set Register 0xA4 32 write-only n 0x0 0x0 DDEMPTY Direct Drive Data Empty Interrupt Flag Set 4 1 write-only DDJIT Direct Drive Jitter Interrupt Flag Set 5 1 write-only HSYNC Horizontal Sync Interrupt Flag Set 1 1 write-only TFTPIXEL0EMPTY EBI_TFTPIXEL0 Empty Interrupt Flag Set 6 1 write-only TFTPIXEL1EMPTY EBI_TFTPIXEL1 Empty Interrupt Flag Set 7 1 write-only TFTPIXELFULL EBI_TFTPIXEL Full Interrupt Flag Set 8 1 write-only TFTPIXELOF EBI_TFTPIXEL Overflow Interrupt Flag Set 9 1 write-only VBPORCH Vertical Back Porch Interrupt Flag Set 2 1 write-only VFPORCH Vertical Front Porch Interrupt Flag Set 3 1 write-only VSYNC Vertical Sync Interrupt Flag Set 0 1 write-only NANDCTRL NAND Control Register 0x4C 32 read-write n 0x0 0x0 BANKSEL NAND Flash Bank 4 2 read-write BANK0 Memory bank 0 is connected to a NAND Flash device. 0x00000000 BANK1 Memory bank 1 is connected to a NAND Flash device. 0x00000001 BANK2 Memory bank 2 is connected to a NAND Flash device. 0x00000002 BANK3 Memory bank 3 is connected to a NAND Flash device. 0x00000003 EN NAND Flash Control Enable 0 1 read-write PAGECTRL Page Control Register 0x48 32 read-write n 0x0 0x0 INCHIT Intrapage Hit Only on Incremental Addresses 4 1 read-write KEEPOPEN Maximum Page Open Time 20 7 read-write PAGELEN Page Length 0 2 read-write MEMBER4 4 members in a page. 0x00000000 MEMBER8 8 members in a page. 0x00000001 MEMBER16 16 members in a page. 0x00000002 MEMBER32 32 members in a page. 0x00000003 RDPA Page Read Access Time 8 4 read-write POLARITY Polarity Register 0x10 32 read-write n 0x0 0x0 ALEPOL Address Latch Polarity 3 1 read-write ARDYPOL ARDY Polarity 4 1 read-write BLPOL BL Polarity 5 1 read-write CSPOL Chip Select Polarity 0 1 read-write REPOL Read Enable Polarity 1 1 read-write WEPOL Write Enable Polarity 2 1 read-write POLARITY1 Polarity Register 1 0x24 32 read-write n 0x0 0x0 ALEPOL Address Latch Polarity 3 1 read-write ARDYPOL ARDY Polarity 4 1 read-write BLPOL BL Polarity 5 1 read-write CSPOL Chip Select Polarity 0 1 read-write REPOL Read Enable Polarity 1 1 read-write WEPOL Write Enable Polarity 2 1 read-write POLARITY2 Polarity Register 2 0x34 32 read-write n 0x0 0x0 ALEPOL Address Latch Polarity 3 1 read-write ARDYPOL ARDY Polarity 4 1 read-write BLPOL BL Polarity 5 1 read-write CSPOL Chip Select Polarity 0 1 read-write REPOL Read Enable Polarity 1 1 read-write WEPOL Write Enable Polarity 2 1 read-write POLARITY3 Polarity Register 3 0x44 32 read-write n 0x0 0x0 ALEPOL Address Latch Polarity 3 1 read-write ARDYPOL ARDY Polarity 4 1 read-write BLPOL BL Polarity 5 1 read-write CSPOL Chip Select Polarity 0 1 read-write REPOL Read Enable Polarity 1 1 read-write WEPOL Write Enable Polarity 2 1 read-write RDTIMING Read Timing Register 0x8 32 read-write n 0x0 0x0 HALFRE Half Cycle REn Strobe Duration Enable 28 1 read-write PAGEMODE Page Mode Access Enable 30 1 read-write PREFETCH Prefetch Enable 29 1 read-write RDHOLD Read Hold Time 16 3 read-write RDSETUP Read Setup Time 0 3 read-write RDSTRB Read Strobe Time 8 7 read-write RDTIMING1 Read Timing Register 1 0x1C 32 read-write n 0x0 0x0 HALFRE Half Cycle REn Strobe Duration Enable 28 1 read-write PAGEMODE Page Mode Access Enable 30 1 read-write PREFETCH Prefetch Enable 29 1 read-write RDHOLD Read Hold Time 16 3 read-write RDSETUP Read Setup Time 0 3 read-write RDSTRB Read Strobe Time 8 7 read-write RDTIMING2 Read Timing Register 2 0x2C 32 read-write n 0x0 0x0 HALFRE Half Cycle REn Strobe Duration Enable 28 1 read-write PAGEMODE Page Mode Access Enable 30 1 read-write PREFETCH Prefetch Enable 29 1 read-write RDHOLD Read Hold Time 16 3 read-write RDSETUP Read Setup Time 0 3 read-write RDSTRB Read Strobe Time 8 7 read-write RDTIMING3 Read Timing Register 3 0x3C 32 read-write n 0x0 0x0 HALFRE Half Cycle REn Strobe Duration Enable 28 1 read-write PAGEMODE Page Mode Access Enable 30 1 read-write PREFETCH Prefetch Enable 29 1 read-write RDHOLD Read Hold Time 16 3 read-write RDSETUP Read Setup Time 0 3 read-write RDSTRB Read Strobe Time 8 7 read-write ROUTELOC0 I/O Routing Location Register 0xB4 32 read-write n 0x0 0x0 CSLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 EBILOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 NANDLOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 TFTLOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 ROUTELOC1 I/O Routing Location Register 0xB8 32 read-write n 0x0 0x0 ADLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 ALOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 RDYLOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 ROUTEPEN I/O Routing Register 0xB0 32 read-write n 0x0 0x0 ALB Sets the Lower Bound for EBI_A Enabling 16 2 read-write A0 Address lines from EBI_A[0] and upwards can be enabled via APEN. 0x00000000 A8 Address lines from EBI_A[8] and upwards can be enabled via APEN. 0x00000001 A16 Address lines from EBI_A[16] and upwards can be enabled via APEN. 0x00000002 A24 Address lines from EBI_A[24] and upwards can be enabled via APEN. 0x00000003 ALEPEN EBI_ALE Pin Enable 5 1 read-write APEN EBI_A Pin Enable 18 5 read-write A0 All EBI_A pins are disabled. 0x00000000 A5 EBI_A[4:L] pins enabled. 0x00000005 A6 EBI_A[5:L] pins enabled. 0x00000006 A7 EBI_A[6:L] pins enabled. 0x00000007 A8 EBI_A[7:L] pins enabled. 0x00000008 A9 EBI_A[8:L] pins enabled. 0x00000009 A10 EBI_A[9:L] pins enabled. 0x0000000A A11 EBI_A[10:L] pins enabled. 0x0000000B A12 EBI_A[11:L] pins enabled. 0x0000000C A13 EBI_A[12:L] pins enabled. 0x0000000D A14 EBI_A[13:L] pins enabled. 0x0000000E A15 EBI_A[14:L] pins enabled. 0x0000000F A16 EBI_A[15:L] pins enabled. 0x00000010 A17 EBI_A[16:L] pins enabled. 0x00000011 A18 EBI_A[17:L] pins enabled. 0x00000012 A19 EBI_A[18:L] pins enabled. 0x00000013 A20 EBI_A[19:L] pins enabled. 0x00000014 A21 EBI_A[20:L] pins enabled. 0x00000015 A22 EBI_A[21:L] pins enabled. 0x00000016 A23 EBI_A[22:L] pins enabled. 0x00000017 A24 EBI_A[23:L] pins enabled. 0x00000018 A25 EBI_A[24:L] pins enabled. 0x00000019 A26 EBI_A[25:L] pins enabled. 0x0000001A A27 EBI_A[26:L] pins enabled. 0x0000001B A28 EBI_A[27:L] pins enabled. 0x0000001C ARDYPEN EBI_ARDY Pin Enable 6 1 read-write BLPEN EBI_BL[1:0] Pin Enable 7 1 read-write CS0PEN EBI_CS0 Pin Enable 1 1 read-write CS1PEN EBI_CS1 Pin Enable 2 1 read-write CS2PEN EBI_CS2 Pin Enable 3 1 read-write CS3PEN EBI_CS3 Pin Enable 4 1 read-write CSTFTPEN EBI_CSTFT Pin Enable 26 1 read-write DATAENPEN EBI_DATA Pin Enable 25 1 read-write EBIPEN EBI Pin Enable 0 1 read-write NANDPEN NANDRE and NANDWE Pin Enable 12 1 read-write TFTPEN EBI_TFT Pin Enable 24 1 read-write STATUS Status Register 0x54 32 read-only n 0x0 0x0 AHBACT EBI Busy With AHB Transaction 0 1 read-only DDACT EBI Busy With Direct Drive Transactions 12 1 read-only ECCACT EBI ECC Generation Active 4 1 read-only TFTDDEMPTY EBI_TFTDD Register is Empty 13 1 read-only TFTPIXEL0EMPTY EBI_TFTPIXEL0 is Empty 8 1 read-only TFTPIXEL1EMPTY EBI_TFTPIXEL1 is Empty 9 1 read-only TFTPIXELFULL EBI_TFTPIXEL0 is Full 10 1 read-only TFTALPHA TFT Alpha Blending Register 0x8C 32 read-write n 0x0 0x0 ALPHA TFT Alpha Blending Factor 0 9 read-write TFTCOLORFORMAT Color Format Register 0x64 32 read-write n 0x0 0x0 PIXEL0FORMAT Sprite Pixel Color Format 0 3 read-write ARGB0555 ARGB data is 0555 0x00000000 ARGB0565 ARGB data is 0565 0x00000001 ARGB0666 ARGB data is 0666 0x00000002 ARGB0888 ARGB data is 0888 0x00000003 ARGB5555 ARGB data is 5555 0x00000004 ARGB6565 ARGB data is 6565 0x00000005 ARGB6666 ARGB data is 6666 0x00000006 ARGB8888 ARGB data is 8888 0x00000007 PIXEL1FORMAT Source and Destination Pixel Color Format 8 2 read-write RGB555 RGB data is 555 0x00000000 RGB565 RGB data is 565 0x00000001 RGB666 RGB data is 666 0x00000002 RGB888 RGB data is 888 0x00000003 TFTCTRL TFT Control Register 0x5C 32 read-write n 0x0 0x0 ALIASBANK Graphic Bank Select Aliasing 22 2 read-write ALIASBANK0 Graphic Bank Select is alias to Bank Select 0 0x00000000 ALIASBANK1 Graphic Bank Select is alias to Bank Select 1 0x00000001 ALIASBANK2 Graphic Bank Select is alias to Bank Select 2 0x00000002 ALIASBANK3 Graphic Bank Select is alias to Bank Select 3 0x00000003 ALIASBANKEN Alias to Graphics Bank Enable 19 1 read-write BANKSEL Graphics Bank 20 2 read-write BANK0 Memory bank 0 is used for Direct Drive, Masking, and Alpha Blending. 0x00000000 BANK1 Memory bank 1 is used for Direct Drive, Masking, and Alpha Blending. 0x00000001 BANK2 Memory bank 2 is used for Direct Drive, Masking, and Alpha Blending. 0x00000002 BANK3 Memory bank 3 is used for Direct Drive, Masking, and Alpha Blending. 0x00000003 COLOR1SRC Masking/Alpha Blending Color1 Source 12 1 read-write DD TFT Direct Drive Mode 0 2 read-write DISABLED Direct Drive is disabled. 0x00000000 INTERNAL Direct Drive from internal memory enabled and started. 0x00000001 EXTERNAL Direct Drive from external memory enabled and started. 0x00000002 FBCTRIG TFT Frame Base Copy Trigger 9 1 read-write INTERLEAVE Interleave Mode 10 2 read-write UNLIMITED Allow unlimited interleaved EBI accesses per EBI_DCLK period. This can cause jitter on the EBI_DCLK 0x00000000 ONEPERDCLK Allow 1 interleaved EBI access per EBI_DCLK period. 0x00000001 PORCH Only allow EBI accesses during TFT porches. 0x00000002 MASKBLEND TFT Mask and Blend Mode 2 4 read-write DISABLED Masking and Blending are disabled. 0x00000000 IMASK Internal Masking is enabled. 0x00000001 IALPHA Internal Alpha Blending is enabled. 0x00000002 IMASKALPHA Internal Masking and Alpha Blending are enabled. 0x00000003 EFBMASK External Frame Buffer Masking is enabled. 0x00000004 EFBALPHA External Frame Buffer Alpha Blending is enabled. 0x00000005 EFBMASKALPHA External Frame Buffer Masking and Alpha Blending are enabled. 0x00000006 IFBMASK Internal Frame Buffer Masking is enabled. 0x00000007 IFBALPHA Internal Frame Buffer Alpha Blending is enabled. 0x00000008 IFBMASKALPHA Internal Frame Buffer Masking and Alpha Blending are enabled. 0x00000009 SHIFTDCLKEN TFT EBI_DCLK Shift Enable 8 1 read-write WIDTH TFT Transaction Width 16 2 read-write BYTE TFT Data is 8 bit wide. 0x00000000 HALFWORD TFT Data is 16 bit wide. 0x00000001 TFTDD TFT Direct Drive Data Register 0x88 32 read-write n 0x0 0x0 DATA TFT Direct Drive Data From Internal Memory 0 24 read-write TFTFRAMEBASE TFT Frame Base Register 0x68 32 read-write n 0x0 0x0 FRAMEBASE Frame Base Address 0 28 read-write TFTHPORCH TFT Horizontal Porch Register 0x78 32 read-write n 0x0 0x0 HBPORCH Horizontal Back Porch Size 18 8 read-write HFPORCH Horizontal Front Porch Size 8 8 read-write HSYNC Horizontal Synchronization Pulse Width 0 7 read-write HSYNCSTART HSYNC Start Delay 28 2 read-write TFTMASK TFT Masking Register 0x9C 32 read-write n 0x0 0x0 TFTMASK TFT Mask Value 0 24 read-write TFTPIXEL TFT Alpha Blending Result Pixel Register 0x98 32 read-only n 0x0 0x0 DATA Alpha Blending Result 0 24 read-only TFTPIXEL0 TFT Pixel 0 Register 0x90 32 read-write n 0x0 0x0 DATA RGB Data 0 24 read-write TFTPIXEL1 TFT Pixel 1 Register 0x94 32 read-write n 0x0 0x0 DATA RGB Data 0 24 read-write TFTPOLARITY TFT Polarity Register 0x84 32 read-write n 0x0 0x0 CSPOL TFT Chip Select Polarity 0 1 read-write DATAENPOL TFT DATAEN Polarity 2 1 read-write DCLKPOL TFT DCLK Polarity 1 1 read-write HSYNCPOL Address Latch Polarity 3 1 read-write VSYNCPOL VSYNC Polarity 4 1 read-write TFTSIZE TFT Size Register 0x74 32 read-write n 0x0 0x0 HSZ Horizontal Size (excluding Porches) 0 10 read-write VSZ Vertical Size (excluding Porches) 16 10 read-write TFTSTATUS TFT Status Register 0x60 32 read-only n 0x0 0x0 HCNT Horizontal Count 0 11 read-only VCNT Vertical Count 16 15 read-only TFTSTRIDE TFT Stride Register 0x70 32 read-write n 0x0 0x0 HSTRIDE Horizontal Stride 0 12 read-write TFTTIMING TFT Timing Register 0x80 32 read-write n 0x0 0x0 DCLKPERIOD TFT Direct Drive Transaction (EBI_DCLK) Period 0 12 read-write TFTHOLD TFT Hold Time 28 3 read-write TFTSETUP TFT Setup Time 24 3 read-write TFTSTART TFT Direct Drive Transaction Start 12 12 read-write TFTVPORCH TFT Vertical Porch Register 0x7C 32 read-write n 0x0 0x0 VBPORCH Vertical Back Porch Size 20 12 read-write VFPORCH Vertical Front Porch Size 8 12 read-write VSYNC Vertical Synchronization Pulse Width 0 7 read-write WRTIMING Write Timing Register 0xC 32 read-write n 0x0 0x0 HALFWE Half Cycle WEn Strobe Duration Enable 28 1 read-write WBUFDIS Write Buffer Disable 29 1 read-write WRHOLD Write Hold Time 16 3 read-write WRSETUP Write Setup Time 0 3 read-write WRSTRB Write Strobe Time 8 7 read-write WRTIMING1 Write Timing Register 1 0x20 32 read-write n 0x0 0x0 HALFWE Half Cycle WEn Strobe Duration Enable 28 1 read-write WBUFDIS Write Buffer Disable 29 1 read-write WRHOLD Write Hold Time 16 3 read-write WRSETUP Write Setup Time 0 3 read-write WRSTRB Write Strobe Time 8 7 read-write WRTIMING2 Write Timing Register 2 0x30 32 read-write n 0x0 0x0 HALFWE Half Cycle WEn Strobe Duration Enable 28 1 read-write WBUFDIS Write Buffer Disable 29 1 read-write WRHOLD Write Hold Time 16 3 read-write WRSETUP Write Setup Time 0 3 read-write WRSTRB Write Strobe Time 8 7 read-write WRTIMING3 Write Timing Register 3 0x40 32 read-write n 0x0 0x0 HALFWE Half Cycle WEn Strobe Duration Enable 28 1 read-write WBUFDIS Write Buffer Disable 29 1 read-write WRHOLD Write Hold Time 16 3 read-write WRSETUP Write Setup Time 0 3 read-write WRSTRB Write Strobe Time 8 7 read-write EMU EMU EMU 0x0 0x0 0x400 registers n EMU 0 BUCTRL Backup Power Configuration Register 0xBC 32 read-write n 0x0 0x0 BUACTPWRCON Power Connection Configuration in Backup Mode 16 2 read-write NONE No connection. 0x00000000 MAINBU Main power and backup power are connected through a diode, allowing current to flow from backup power source to main power source, but not the other way. 0x00000001 BUMAIN Main power and backup power are connected through a diode, allowing current to flow from main power source to backup power source, but not the other way. 0x00000002 NODIODE Main power and backup power are connected without diode. 0x00000003 BUINACTPWRCON Power Connection Configuration When Not in Backup Mode 20 2 read-write NONE No connection. 0x00000000 MAINBU Main power and backup power are connected through a diode, allowing current to flow from main power source to backup power source, but not the other way. 0x00000001 BUMAIN Main power and backup power are connected through a diode, allowing current to flow from backup power source to main power source, but not the other way. 0x00000002 NODIODE Main power and backup power are connected without diode. 0x00000003 BUVINPROBEEN Enable BU_VIN Probing 2 1 read-write DISMAXCOMP Disable MAIN-BU Comparator 31 1 read-write EN Enable Backup Mode 0 1 read-write PWRRES Power Domain Resistor Select 12 2 read-write RES0 Main power and backup power connected with RES0 series resistance. 0x00000000 RES1 Main power and backup power connected with RES1 series resistance. 0x00000001 RES2 Main power and backup power connected with RES2 series resistance. 0x00000002 RES3 Main power and backup power connected with RES3 series resistance. 0x00000003 STATEN Enable Backup Mode Status Export 1 1 read-write VOUTRES BU_VOUT Resistor Select 8 2 read-write DIS BU_VOUT is not connected 0x00000000 WEAK Enable weak switch between BU_VOUT and backup domain power supply. 0x00000001 MED Enable medium switch between BU_VOUT and backup domain power supply. 0x00000002 STRONG Enable strong switch between BU_VOUT and backup domain power supply. 0x00000003 CMD Command Register 0x10 32 write-only n 0x0 0x0 EM01VSCALE0 EM01 Voltage Scale Command to Scale to Voltage Scale Level 0 4 1 write-only EM01VSCALE2 EM01 Voltage Scale Command to Scale to Voltage Scale Level 2 6 1 write-only EM4UNLATCH EM4 Unlatch 0 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 EM01LD Reserved for internal use. Do not change. 3 1 read-write EM23VSCALE EM23 Voltage Scale 8 2 read-write VSCALE2 Voltage Scale Level 2 0x00000000 VSCALE0 Voltage Scale Level 0 0x00000002 RESV RESV 0x00000003 EM23VSCALEAUTOWSEN Automatically Configures Flash and Frequency to Wakeup From EM2 or EM3 at Low Voltage 4 1 read-write EM2BLOCK Energy Mode 2 Block 1 1 read-write EM2BODDIS Disable BOD in EM2 2 1 read-write EM4HVSCALE EM4H Voltage Scale 16 2 read-write VSCALE2 Voltage Scale Level 2 0x00000000 VSCALE0 Voltage Scale Level 0 0x00000002 RESV RESV 0x00000003 DCDCCLIMCTRL DCDC Power Train PFET Current Limiter Control Register 0x54 32 read-write n 0x0 0x0 BYPLIMEN Bypass Current Limit Enable 13 1 read-write CLIMBLANKDLY Reserved for internal use. Do not change. 8 2 read-write DCDCCTRL DCDC Control 0x40 32 read-write n 0x0 0x0 DCDCMODE Regulator Mode 0 2 read-write BYPASS DCDC regulator is operating in bypass mode. Prior to configuring DCDCMODE=BYPASS, software must set EMU_DCDCCLIMCTRL.BYPLIMEN=1 to prevent excessive current between VREGVDD and DVDD supplies. 0x00000000 LOWNOISE DCDC regulator is operating in low noise mode. 0x00000001 LOWPOWER DCDC regulator is operating in low power mode. 0x00000002 OFF DCDC regulator is off and the bypass switch is off. Note: DVDD must be supplied externally 0x00000003 DCDCMODEEM23 DCDC Mode EM23 4 1 read-write DCDCMODEEM4 DCDC Mode EM4H 5 1 read-write DCDCLNCOMPCTRL DCDC Low Noise Compensator Control Register 0x58 32 read-write n 0x0 0x0 COMPENC1 Low Noise Mode Compensator C1 Trim Value 20 2 read-write COMPENC2 Low Noise Mode Compensator C2 Trim Value 24 3 read-write COMPENC3 Low Noise Mode Compensator C3 Trim Value 28 4 read-write COMPENR1 Low Noise Mode Compensator R1 Trim Value 0 3 read-write COMPENR2 Low Noise Mode Compensator R2 Trim Value 4 5 read-write COMPENR3 Low Noise Mode Compensator R3 Trim Value 12 4 read-write DCDCLNFREQCTRL DCDC Low Noise Controller Frequency Control 0x70 32 read-write n 0x0 0x0 RCOBAND LN Mode RCO Frequency Band Selection 0 3 read-write RCOTRIM Reserved for internal use. Do not change. 24 5 read-write DCDCLNVCTRL DCDC Low Noise Voltage Register 0x5C 32 read-write n 0x0 0x0 LNATT Low Noise Mode Feedback Attenuation 1 1 read-write LNVREF Low Noise Mode VREF Trim 8 7 read-write DCDCLPCTRL DCDC Low Power Control Register 0x6C 32 read-write n 0x0 0x0 LPBLANK Reserved for internal use. Do not change. 25 2 read-write LPCMPHYSSELEM234H LP Mode Hysteresis Selection for EM23 and EM4H 12 4 read-write LPVREFDUTYEN LP Mode Duty Cycling Enable 24 1 read-write DCDCLPEM01CFG Configuration Bits for Low Power Mode to Be Applied During EM01, This Field is Only Relevant If LP Mode is Used in EM01 0xEC 32 read-write n 0x0 0x0 LPCMPBIASEM01 LP Mode Comparator Bias Selection for EM01 8 2 read-write BIAS0 Maximum load current less than 75uA. 0x00000000 BIAS1 Maximum load current less than 500uA. 0x00000001 BIAS2 Maximum load current less than 2.5mA. 0x00000002 BIAS3 Maximum load current less than 10mA. 0x00000003 LPCMPHYSSELEM01 LP Mode Hysteresis Selection for EM01 12 4 read-write DCDCLPVCTRL DCDC Low Power Voltage Register 0x64 32 read-write n 0x0 0x0 LPATT Low Power Feedback Attenuation 0 1 read-write LPVREF LP Mode Reference Selection for EM23 and EM4H 1 8 read-write DCDCMISCCTRL DCDC Miscellaneous Control Register 0x4C 32 read-write n 0x0 0x0 BYPLIMSEL Current Limit in Bypass Mode 16 4 read-write LNCLIMILIMSEL Current Limit Level Selection for Current Limiter in LN Mode 24 3 read-write LNFORCECCM Force DCDC Into CCM Mode in Low Noise Operation 0 1 read-write LNFORCECCMIMM Force DCDC Into CCM Mode Immediately, Based on LNFORCECCM 5 1 read-write LPCLIMILIMSEL Current Limit Level Selection for Current Limiter in LP Mode 20 3 read-write LPCMPBIASEM234H LP Mode Comparator Bias Selection for EM23 or EM4H 28 2 read-write BIAS0 Maximum load current less than 75uA. 0x00000000 BIAS1 Maximum load current less than 500uA. 0x00000001 BIAS2 Maximum load current less than 2.5mA. 0x00000002 BIAS3 Maximum load current less than 10mA. 0x00000003 LPCMPHYSDIS Disable LP Mode Hysteresis in the State Machine Control 1 1 read-write LPCMPHYSHI Comparator Threshold on the High Side 2 1 read-write NFETCNT NFET Switch Number Selection 12 4 read-write PFETCNT PFET Switch Number Selection 8 4 read-write DCDCSYNC DCDC Read Status Register 0x78 32 read-only n 0x0 0x0 DCDCCTRLBUSY DCDC CTRL Register Transfer Busy 0 1 read-only DCDCZDETCTRL DCDC Power Train NFET Zero Current Detector Control Register 0x50 32 read-write n 0x0 0x0 ZDETBLANKDLY Reserved for internal use. Do not change. 8 2 read-write ZDETILIMSEL Reverse Current Limit Level Selection for Zero Detector 4 3 read-write EM23PERNORETAINCMD Clears Corresponding Bits in EM23PERNORETAINSTATUS Unlocking Access to Peripheral 0x100 32 write-only n 0x0 0x0 ACMP0UNLOCK Clears Status Bit of ACMP0 and Unlocks Access to It 0 1 write-only ACMP1UNLOCK Clears Status Bit of ACMP1 and Unlocks Access to It 1 1 write-only ACMP2UNLOCK Clears Status Bit of ACMP2 and Unlocks Access to It 21 1 write-only ACMP3UNLOCK Clears Status Bit of ACMP3 and Unlocks Access to It 22 1 write-only ADC0UNLOCK Clears Status Bit of ADC0 and Unlocks Access to It 9 1 write-only ADC1UNLOCK Clears Status Bit of ADC1 and Unlocks Access to It 20 1 write-only CSENUNLOCK Clears Status Bit of CSEN and Unlocks Access to It 14 1 write-only DAC0UNLOCK Clears Status Bit of DAC0 and Unlocks Access to It 7 1 write-only I2C0UNLOCK Clears Status Bit of I2C0 and Unlocks Access to It 5 1 write-only I2C1UNLOCK Clears Status Bit of I2C1 and Unlocks Access to It 6 1 write-only I2C2UNLOCK Clears Status Bit of I2C2 and Unlocks Access to It 19 1 write-only IDAC0UNLOCK Clears Status Bit of IDAC0 and Unlocks Access to It 8 1 write-only LCDUNLOCK Clears Status Bit of LCD and Unlocks Access to It 17 1 write-only LESENSE0UNLOCK Clears Status Bit of LESENSE0 and Unlocks Access to It 13 1 write-only LETIMER0UNLOCK Clears Status Bit of LETIMER0 and Unlocks Access to It 10 1 write-only LETIMER1UNLOCK Clears Status Bit of LETIMER1 and Unlocks Access to It 18 1 write-only LEUART0UNLOCK Clears Status Bit of LEUART0 and Unlocks Access to It 15 1 write-only LEUART1UNLOCK Clears Status Bit of LEUART1 and Unlocks Access to It 16 1 write-only PCNT0UNLOCK Clears Status Bit of PCNT0 and Unlocks Access to It 2 1 write-only PCNT1UNLOCK Clears Status Bit of PCNT1 and Unlocks Access to It 3 1 write-only PCNT2UNLOCK Clears Status Bit of PCNT2 and Unlocks Access to It 4 1 write-only RTCUNLOCK Clears Status Bit of RTC and Unlocks Access to It 23 1 write-only USBUNLOCK Clears Status Bit of USB and Unlocks Access to It 24 1 write-only WDOG0UNLOCK Clears Status Bit of WDOG0 and Unlocks Access to It 11 1 write-only WDOG1UNLOCK Clears Status Bit of WDOG1 and Unlocks Access to It 12 1 write-only EM23PERNORETAINCTRL When Set Corresponding Peripherals May Get Powered Down in EM23 0x108 32 read-write n 0x0 0x0 ACMP0DIS Allow Power Down of ACMP0 During EM23 0 1 read-write ACMP1DIS Allow Power Down of ACMP1 During EM23 1 1 read-write ACMP2DIS Allow Power Down of ACMP2 During EM23 21 1 read-write ACMP3DIS Allow Power Down of ACMP3 During EM23 22 1 read-write ADC0DIS Allow Power Down of ADC0 During EM23 9 1 read-write ADC1DIS Allow Power Down of ADC1 During EM23 20 1 read-write CSENDIS Allow Power Down of CSEN During EM23 14 1 read-write I2C0DIS Allow Power Down of I2C0 During EM23 5 1 read-write I2C1DIS Allow Power Down of I2C1 During EM23 6 1 read-write I2C2DIS Allow Power Down of I2C2 During EM23 19 1 read-write IDAC0DIS Allow Power Down of IDAC0 During EM23 8 1 read-write LCDDIS Allow Power Down of LCD During EM23 17 1 read-write LESENSE0DIS Allow Power Down of LESENSE0 During EM23 13 1 read-write LETIMER0DIS Allow Power Down of LETIMER0 During EM23 10 1 read-write LETIMER1DIS Allow Power Down of LETIMER1 During EM23 18 1 read-write LEUART0DIS Allow Power Down of LEUART0 During EM23 15 1 read-write LEUART1DIS Allow Power Down of LEUART1 During EM23 16 1 read-write PCNT0DIS Allow Power Down of PCNT0 During EM23 2 1 read-write PCNT1DIS Allow Power Down of PCNT1 During EM23 3 1 read-write PCNT2DIS Allow Power Down of PCNT2 During EM23 4 1 read-write RTCDIS Allow Power Down of RTC During EM23 23 1 read-write USBDIS Allow Power Down of USB During EM23 24 1 read-write VDAC0DIS Allow Power Down of DAC0 During EM23 7 1 read-write WDOG0DIS Allow Power Down of WDOG0 During EM23 11 1 read-write WDOG1DIS Allow Power Down of WDOG1 During EM23 12 1 read-write EM23PERNORETAINSTATUS Status Indicating If Peripherals Were Powered Down in EM23, Subsequently Locking Access to It 0x104 32 read-only n 0x0 0x0 ACMP0LOCKED Indicates If ACMP0 Powered Down During EM23 0 1 read-only ACMP1LOCKED Indicates If ACMP1 Powered Down During EM23 1 1 read-only ACMP2LOCKED Indicates If ACMP2 Powered Down During EM23 21 1 read-only ACMP3LOCKED Indicates If ACMP3 Powered Down During EM23 22 1 read-only ADC0LOCKED Indicates If ADC0 Powered Down During EM23 9 1 read-only ADC1LOCKED Indicates If ADC1 Powered Down During EM23 20 1 read-only CSENLOCKED Indicates If CSEN Powered Down During EM23 14 1 read-only DAC0LOCKED Indicates If DAC0 Powered Down During EM23 7 1 read-only I2C0LOCKED Indicates If I2C0 Powered Down During EM23 5 1 read-only I2C1LOCKED Indicates If I2C1 Powered Down During EM23 6 1 read-only I2C2LOCKED Indicates If I2C2 Powered Down During EM23 19 1 read-only IDAC0LOCKED Indicates If IDAC0 Powered Down During EM23 8 1 read-only LCDLOCKED Indicates If LCD Powered Down During EM23 17 1 read-only LESENSE0LOCKED Indicates If LESENSE0 Powered Down During EM23 13 1 read-only LETIMER0LOCKED Indicates If LETIMER0 Powered Down During EM23 10 1 read-only LETIMER1LOCKED Indicates If LETIMER1 Powered Down During EM23 18 1 read-only LEUART0LOCKED Indicates If LEUART0 Powered Down During EM23 15 1 read-only LEUART1LOCKED Indicates If LEUART1 Powered Down During EM23 16 1 read-only PCNT0LOCKED Indicates If PCNT0 Powered Down During EM23 2 1 read-only PCNT1LOCKED Indicates If PCNT1 Powered Down During EM23 3 1 read-only PCNT2LOCKED Indicates If PCNT2 Powered Down During EM23 4 1 read-only RTCLOCKED Indicates If RTC Powered Down During EM23 23 1 read-only USBLOCKED Indicates If USB Powered Down During EM23 24 1 read-only WDOG0LOCKED Indicates If WDOG0 Powered Down During EM23 11 1 read-only WDOG1LOCKED Indicates If WDOG1 Powered Down During EM23 12 1 read-only EM4CTRL EM4 Control Register 0x18 32 read-write n 0x0 0x0 EM4ENTRY Energy Mode 4 Entry 16 2 write-only EM4IORETMODE EM4 IO Retention Disable 4 2 read-write DISABLE No Retention: Pads enter reset state when entering EM4 0x00000000 EM4EXIT Retention through EM4: Pads enter reset state when exiting EM4 0x00000001 SWUNLATCH Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention 0x00000002 EM4STATE Energy Mode 4 State 0 1 read-write RETAINLFRCO LFRCO Retain During EM4 1 1 read-write RETAINLFXO LFXO Retain During EM4 2 1 read-write RETAINULFRCO ULFRCO Retain During EM4S 3 1 read-write IEN Interrupt Enable Register 0x30 32 read-write n 0x0 0x0 BURDY BURDY Interrupt Enable 22 1 read-write DCDCINBYPASS DCDCINBYPASS Interrupt Enable 20 1 read-write DCDCLNRUNNING DCDCLNRUNNING Interrupt Enable 19 1 read-write DCDCLPRUNNING DCDCLPRUNNING Interrupt Enable 18 1 read-write EM23WAKEUP EM23WAKEUP Interrupt Enable 24 1 read-write NFETOVERCURRENTLIMIT NFETOVERCURRENTLIMIT Interrupt Enable 17 1 read-write PFETOVERCURRENTLIMIT PFETOVERCURRENTLIMIT Interrupt Enable 16 1 read-write R5VREADY R5VREADY Interrupt Enable 10 1 read-write R5VVSINT R5VVSINT Interrupt Enable 23 1 read-write TEMP TEMP Interrupt Enable 29 1 read-write TEMPHIGH TEMPHIGH Interrupt Enable 31 1 read-write TEMPLOW TEMPLOW Interrupt Enable 30 1 read-write VMONALTAVDDFALL VMONALTAVDDFALL Interrupt Enable 2 1 read-write VMONALTAVDDRISE VMONALTAVDDRISE Interrupt Enable 3 1 read-write VMONAVDDFALL VMONAVDDFALL Interrupt Enable 0 1 read-write VMONAVDDRISE VMONAVDDRISE Interrupt Enable 1 1 read-write VMONBUVDDFALL VMONBUVDDFALL Interrupt Enable 12 1 read-write VMONBUVDDRISE VMONBUVDDRISE Interrupt Enable 13 1 read-write VMONDVDDFALL VMONDVDDFALL Interrupt Enable 4 1 read-write VMONDVDDRISE VMONDVDDRISE Interrupt Enable 5 1 read-write VMONIO0FALL VMONIO0FALL Interrupt Enable 6 1 read-write VMONIO0RISE VMONIO0RISE Interrupt Enable 7 1 read-write VMONIO1FALL VMONIO1FALL Interrupt Enable 8 1 read-write VMONIO1RISE VMONIO1RISE Interrupt Enable 9 1 read-write VSCALEDONE VSCALEDONE Interrupt Enable 25 1 read-write IF Interrupt Flag Register 0x24 32 read-only n 0x0 0x0 BURDY Backup Functionality Ready Interrupt Flag 22 1 read-only DCDCINBYPASS DCDC is in Bypass 20 1 read-only DCDCLNRUNNING LN Mode is Running 19 1 read-only DCDCLPRUNNING LP Mode is Running 18 1 read-only EM23WAKEUP Wakeup IRQ From EM2 and EM3 24 1 read-only NFETOVERCURRENTLIMIT NFET Current Limit Hit 17 1 read-only PFETOVERCURRENTLIMIT PFET Current Limit Hit 16 1 read-only R5VREADY 5V Regulator is Ready to Use 10 1 read-only R5VVSINT 5V Regulator Voltage Update Done 23 1 read-only TEMP New Temperature Measurement Valid 29 1 read-only TEMPHIGH Temperature High Limit Reached 31 1 read-only TEMPLOW Temperature Low Limit Reached 30 1 read-only VMONALTAVDDFALL Alternate VMON AVDD Channel Fall 2 1 read-only VMONALTAVDDRISE Alternate VMON AVDD Channel Rise 3 1 read-only VMONAVDDFALL VMON AVDD Channel Fall 0 1 read-only VMONAVDDRISE VMON AVDD Channel Rise 1 1 read-only VMONBUVDDFALL VMON BACKUP Channel Fall 12 1 read-only VMONBUVDDRISE VMON BUVDD Channel Rise 13 1 read-only VMONDVDDFALL VMON DVDD Channel Fall 4 1 read-only VMONDVDDRISE VMON DVDD Channel Rise 5 1 read-only VMONIO0FALL VMON IOVDD0 Channel Fall 6 1 read-only VMONIO0RISE VMON IOVDD0 Channel Rise 7 1 read-only VMONIO1FALL VMON IOVDD1 Channel Fall 8 1 read-only VMONIO1RISE VMON IOVDD1 Channel Rise 9 1 read-only VSCALEDONE Voltage Scale Steps Done IRQ 25 1 read-only IFC Interrupt Flag Clear Register 0x2C 32 write-only n 0x0 0x0 BURDY Clear BURDY Interrupt Flag 22 1 write-only DCDCINBYPASS Clear DCDCINBYPASS Interrupt Flag 20 1 write-only DCDCLNRUNNING Clear DCDCLNRUNNING Interrupt Flag 19 1 write-only DCDCLPRUNNING Clear DCDCLPRUNNING Interrupt Flag 18 1 write-only EM23WAKEUP Clear EM23WAKEUP Interrupt Flag 24 1 write-only NFETOVERCURRENTLIMIT Clear NFETOVERCURRENTLIMIT Interrupt Flag 17 1 write-only PFETOVERCURRENTLIMIT Clear PFETOVERCURRENTLIMIT Interrupt Flag 16 1 write-only R5VREADY Clear R5VREADY Interrupt Flag 10 1 write-only R5VVSINT Clear R5VVSINT Interrupt Flag 23 1 write-only TEMP Clear TEMP Interrupt Flag 29 1 write-only TEMPHIGH Clear TEMPHIGH Interrupt Flag 31 1 write-only TEMPLOW Clear TEMPLOW Interrupt Flag 30 1 write-only VMONALTAVDDFALL Clear VMONALTAVDDFALL Interrupt Flag 2 1 write-only VMONALTAVDDRISE Clear VMONALTAVDDRISE Interrupt Flag 3 1 write-only VMONAVDDFALL Clear VMONAVDDFALL Interrupt Flag 0 1 write-only VMONAVDDRISE Clear VMONAVDDRISE Interrupt Flag 1 1 write-only VMONBUVDDFALL Clear VMONBUVDDFALL Interrupt Flag 12 1 write-only VMONBUVDDRISE Clear VMONBUVDDRISE Interrupt Flag 13 1 write-only VMONDVDDFALL Clear VMONDVDDFALL Interrupt Flag 4 1 write-only VMONDVDDRISE Clear VMONDVDDRISE Interrupt Flag 5 1 write-only VMONIO0FALL Clear VMONIO0FALL Interrupt Flag 6 1 write-only VMONIO0RISE Clear VMONIO0RISE Interrupt Flag 7 1 write-only VMONIO1FALL Clear VMONIO1FALL Interrupt Flag 8 1 write-only VMONIO1RISE Clear VMONIO1RISE Interrupt Flag 9 1 write-only VSCALEDONE Clear VSCALEDONE Interrupt Flag 25 1 write-only IFS Interrupt Flag Set Register 0x28 32 write-only n 0x0 0x0 BURDY Set BURDY Interrupt Flag 22 1 write-only DCDCINBYPASS Set DCDCINBYPASS Interrupt Flag 20 1 write-only DCDCLNRUNNING Set DCDCLNRUNNING Interrupt Flag 19 1 write-only DCDCLPRUNNING Set DCDCLPRUNNING Interrupt Flag 18 1 write-only EM23WAKEUP Set EM23WAKEUP Interrupt Flag 24 1 write-only NFETOVERCURRENTLIMIT Set NFETOVERCURRENTLIMIT Interrupt Flag 17 1 write-only PFETOVERCURRENTLIMIT Set PFETOVERCURRENTLIMIT Interrupt Flag 16 1 write-only R5VREADY Set R5VREADY Interrupt Flag 10 1 write-only R5VVSINT Set R5VVSINT Interrupt Flag 23 1 write-only TEMP Set TEMP Interrupt Flag 29 1 write-only TEMPHIGH Set TEMPHIGH Interrupt Flag 31 1 write-only TEMPLOW Set TEMPLOW Interrupt Flag 30 1 write-only VMONALTAVDDFALL Set VMONALTAVDDFALL Interrupt Flag 2 1 write-only VMONALTAVDDRISE Set VMONALTAVDDRISE Interrupt Flag 3 1 write-only VMONAVDDFALL Set VMONAVDDFALL Interrupt Flag 0 1 write-only VMONAVDDRISE Set VMONAVDDRISE Interrupt Flag 1 1 write-only VMONBUVDDFALL Set VMONBUVDDFALL Interrupt Flag 12 1 write-only VMONBUVDDRISE Set VMONBUVDDRISE Interrupt Flag 13 1 write-only VMONDVDDFALL Set VMONDVDDFALL Interrupt Flag 4 1 write-only VMONDVDDRISE Set VMONDVDDRISE Interrupt Flag 5 1 write-only VMONIO0FALL Set VMONIO0FALL Interrupt Flag 6 1 write-only VMONIO0RISE Set VMONIO0RISE Interrupt Flag 7 1 write-only VMONIO1FALL Set VMONIO1FALL Interrupt Flag 8 1 write-only VMONIO1RISE Set VMONIO1RISE Interrupt Flag 9 1 write-only VSCALEDONE Set VSCALEDONE Interrupt Flag 25 1 write-only LOCK Configuration Lock Register 0x8 32 read-write n 0x0 0x0 LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 PWRCTRL Power Control Register 0x3C 32 read-write n 0x0 0x0 ANASW Analog Switch Selection 5 1 read-write IMMEDIATEPWRSWITCH Allows Immediate Switching of ANASW and REGPWRSEL Bitfields 13 1 read-write REGPWRSEL This Field Selects the Input Supply Pin for the Digital LDO 10 1 read-write PWRLOCK Regulator and Supply Lock Register 0x34 32 read-write n 0x0 0x0 LOCKKEY Regulator and Supply Configuration Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 R5VADCCTRL 5V Regulator Control 0xCC 32 read-write n 0x0 0x0 AMUXSEL ADC Mux Selection 12 4 read-write VBUSDIV10 VBUS divided by 10 0x00000000 VREGIDIV10 VREGI divided by 10 0x00000001 VREGODIV6 VREGO divided by 6 0x00000002 VREGIIMON VREGI current monitor 0x00000003 VBUSIMON VBUS current monitor 0x00000004 ENAMUX Enable the 5V Subsystem ADC MUX 0 1 read-write R5VCTRL 5V Regulator Control 0xC8 32 read-write n 0x0 0x0 BYPASS 5V Regulator Bypass 0 1 read-write EM4WUEN Enable EM4 Wakeup Due to VBUS Detection 1 1 read-write IMONEN Enable the Regulator Current Monitor for Selected Current Path to Either VREGI or VBUS 2 1 read-write INPUTMODE 5V Input Mode 8 2 read-write AUTO Regulator input supply switched automatically to the highest voltage of either VBUS or VREGI 0x00000000 VBUS Force VBUS pin as the regulator input 0x00000001 VREGI Force VREGI pin as the regulator input 0x00000002 R5VDETCTRL 5V Detector Enables 0xDC 32 read-write n 0x0 0x0 VBUSDETDIS VBUS Detector Disable 1 1 read-write VREGIDETDIS VREGI Detector Disable 0 1 read-write VREGODETDIS VREGO Detector Disable 2 1 read-write R5VOUTLEVEL 5V Regulator Voltage Select 0xD0 32 read-write n 0x0 0x0 OUTLEVEL 5V Regulator Voltage 0 4 read-write R5VSTATUS 5V Detector Status Register 0xF0 32 read-only n 0x0 0x0 COLDSTART Indicates If the Regulator is Going Through a Cold Start 5 1 read-only LDODROPOUTDET Regulator Dropout Detection 4 1 read-only VBUSDET USB VBUS Detected 1 1 read-only VBUSGTVREGI Output of the Supply Comparator Between VBUS and VREGI 3 1 read-only VREGIDET VREGI Detected 0 1 read-only VREGODET VREGO Detected 2 1 read-only R5VSYNC 5V Read Status Register 0xF8 32 read-only n 0x0 0x0 OUTLEVELBUSY 5V Regulator Voltage Register Transfer Busy 0 1 read-only RAM0CTRL Memory Control Register 0xC 32 read-write n 0x0 0x0 RAMPOWERDOWN RAM0 Blockset Power-down 0 7 read-write NONE None of the RAM blocks powered down 0x00000000 BLK7 Power down RAM block 7 and above 0x00000040 BLK6TO7 Power down RAM block 6 and above 0x00000060 BLK5TO7 Power down RAM block 5 and above 0x00000070 BLK4TO7 Power down RAM blocks 4 and above 0x00000078 BLK3TO7 Power down RAM blocks 3 and above 0x0000007C BLK2TO7 Power down RAM blocks 2 and above 0x0000007E BLK1TO7 Power down RAM blocks 1 and above 0x0000007F RAM1CTRL Memory Control Register 0xB4 32 read-write n 0x0 0x0 RAMPOWERDOWN RAM1 Blockset Power-down 0 8 read-write NONE None of the RAM blocks powered down 0x00000000 BLK7 Power down RAM block 7 (address range 0x2003C000-0x2003FFFF) 0x00000080 BLK6TO7 Power down RAM blocks 6-7 (address range 0x20038000-0x2003FFFF) 0x000000C0 BLK5TO7 Power down RAM blocks 5-7 (address range 0x20034000-0x2003FFFF) 0x000000E0 BLK4TO7 Power down RAM blocks 4-7 (address range 0x20030000-0x2003FFFF) 0x000000F0 BLK3TO7 Power down RAM blocks 3-7 (address range 0x2002C000-0x2003FFFF) 0x000000F8 BLK2TO7 Power down RAM blocks 2-7 (address range 0x20028000-0x2003FFFF) 0x000000FC BLK1TO7 Power down RAM blocks 1-7 (address range 0x20024000-0x2003FFFF) 0x000000FE BLK0TO7 Power down RAM blocks 0-7 (address range 0x20020000-0x2003FFFF) 0x000000FF RAM2CTRL Memory Control Register 0xB8 32 read-write n 0x0 0x0 RAMPOWERDOWN RAM2 Blockset Power-down 0 4 read-write NONE None of the RAM blocks powered down 0x00000000 BLK3 Power down RAM block 3 0x00000008 BLK2TO3 Power down RAM blocks 2-3 0x0000000C BLK1TO3 Power down RAM blocks 1-3 0x0000000E BLK0TO3 Power down RAM blocks 0-3 0x0000000F STATUS Status Register 0x4 32 read-only n 0x0 0x0 BURDY Backup Mode Ready 12 1 read-only EM4IORET IO Retention Status 20 1 read-only TEMPACTIVE Temperature Measurement Active 26 1 read-only VMONALTAVDD Alternate VMON AVDD Channel 2 1 read-only VMONAVDD VMON AVDD Channel 1 1 read-only VMONBUVDD VMON BUVDD Channel 7 1 read-only VMONDVDD VMON DVDD Channel 3 1 read-only VMONIO0 VMON IOVDD0 Channel 4 1 read-only VMONIO1 VMON IOVDD1 Channel 5 1 read-only VMONRDY VMON Ready 0 1 read-only VSCALE Current Voltage Scale Value 16 2 read-only VSCALE2 Voltage Scale Level 2 0x00000000 VSCALE0 Voltage Scale Level 0 0x00000002 RESV RESV 0x00000003 VSCALEBUSY System is Busy Scaling Voltage 18 1 read-only TEMP Value of Last Temperature Measurement 0x20 32 read-only n 0x0 0x0 TEMP Temperature Measurement 0 8 read-only TEMPLIMITS Temperature Limits for Interrupt Generation 0x1C 32 read-write n 0x0 0x0 EM4WUEN Enable EM4 Wakeup Due to Low/high Temperature 16 1 read-write TEMPHIGH Temperature High Limit 8 8 read-write TEMPLOW Temperature Low Limit 0 8 read-write VMONALTAVDDCTRL Alternate VMON AVDD Channel Control 0x94 32 read-write n 0x0 0x0 EN Enable 0 1 read-write FALLWU Fall Wakeup 3 1 read-write RISEWU Rise Wakeup 2 1 read-write THRESCOARSE Threshold Coarse Adjust 12 4 read-write THRESFINE Threshold Fine Adjust 8 4 read-write VMONAVDDCTRL VMON AVDD Channel Control 0x90 32 read-write n 0x0 0x0 EN Enable 0 1 read-write FALLTHRESCOARSE Falling Threshold Coarse Adjust 12 4 read-write FALLTHRESFINE Falling Threshold Fine Adjust 8 4 read-write FALLWU Fall Wakeup 3 1 read-write RISETHRESCOARSE Rising Threshold Coarse Adjust 20 4 read-write RISETHRESFINE Rising Threshold Fine Adjust 16 4 read-write RISEWU Rise Wakeup 2 1 read-write VMONBUVDDCTRL VMON BUVDD Channel Control 0xA4 32 read-write n 0x0 0x0 EN Enable 0 1 read-write FALLWU Fall Wakeup 3 1 read-write RISEWU Rise Wakeup 2 1 read-write THRESCOARSE Threshold Coarse Adjust 12 4 read-write THRESFINE Threshold Fine Adjust 8 4 read-write VMONDVDDCTRL VMON DVDD Channel Control 0x98 32 read-write n 0x0 0x0 EN Enable 0 1 read-write FALLWU Fall Wakeup 3 1 read-write RISEWU Rise Wakeup 2 1 read-write THRESCOARSE Threshold Coarse Adjust 12 4 read-write THRESFINE Threshold Fine Adjust 8 4 read-write VMONIO0CTRL VMON IOVDD0 Channel Control 0x9C 32 read-write n 0x0 0x0 EN Enable 0 1 read-write FALLWU Fall Wakeup 3 1 read-write RETDIS EM4 IO0 Retention Disable 4 1 read-write RISEWU Rise Wakeup 2 1 read-write THRESCOARSE Threshold Coarse Adjust 12 4 read-write THRESFINE Threshold Fine Adjust 8 4 read-write VMONIO1CTRL VMON IOVDD1 Channel Control 0xA0 32 read-write n 0x0 0x0 EN Enable 0 1 read-write FALLWU Fall Wakeup 3 1 read-write RETDIS EM4 IO1 Retention Disable 4 1 read-write RISEWU Rise Wakeup 2 1 read-write THRESCOARSE Threshold Coarse Adjust 12 4 read-write THRESFINE Threshold Fine Adjust 8 4 read-write ETH ETH ETH 0x0 0x0 0x1000 registers n ETH 59 ALIGNERRS Alignment Errors 0x19C 32 read-write n 0x0 0x0 COUNT Alignment errors 0 10 read-write AUTOFLUSHEDPKTS Receive DMA Flushed Packets 0x1B4 32 read-write n 0x0 0x0 COUNT Flushed RX pkts counter 0 16 read-write BROADCASTRXED Broadcast Frames Received 0x15C 32 read-write n 0x0 0x0 COUNT Broadcast frames received without error 0 32 read-write BROADCASTTXED Broadcast Frames Transmitted 0x10C 32 read-write n 0x0 0x0 COUNT Broadcast frames transmitted without error 0 32 read-write CRSERRS Carrier Sense Errors 0x14C 32 read-write n 0x0 0x0 COUNT Carrier sense errors 0 10 read-write CTRL Ethernet control register 0xC10 32 read-write n 0x0 0x0 GBLCLKEN Global Clock Enable signal for Ethernet clocks tsu_clk, tx_clk, rx_clk and ref_clk 9 1 read-write MIISEL MII select signal 8 1 read-write TSUCLKSEL TSU Clock selection value 0 3 read-write NOCLOCK No TSU clock source selected 0x00000000 PLL Select system clock as TSU Clock 0x00000001 RXCLK Select ethernet RX Clock as TSU Clock 0x00000002 REFCLK Select ref clock as TSU Clock 0x00000003 TSUEXTCLK Select tsu external pin as TSU Clock 0x00000004 TSUPRESC Clock division factor of TSUPRESC+1 4 4 read-write TXREFCLKSEL REFCLK source select for RMII_TXD and RMII_TX_EN 10 1 read-write DEFERREDFRAMES Deferred Transmission Frames 0x148 32 read-write n 0x0 0x0 COUNT Deferred transmission frames 0 18 read-write DMACFG DMA Configuration Register 0x10 32 read-write n 0x0 0x0 AMBABRSTLEN Selects the burst length to use on the AMBA (AHB) when transferring frame data. 0 5 read-write FRCDISCARDONERR Auto Discard RX pkts during lack of resource. 24 1 read-write FRCMAXAMBABRSTRX Force max length bursts on RX. 25 1 read-write FRCMAXAMBABRSTTX Force max length bursts on TX. 26 1 read-write HDRDATASPLITEN Enable header data Splitting. 5 1 read-write INFLASTDBUFSIZEEN Forces the DMA 12 1 read-write RXBDEXTNDMODEEN Enable RX extended BD mode. 28 1 read-write RXBUFSIZE DMA receive buffer size in external AMBA (AHB) system memory. 16 8 read-write RXPBUFSIZE Receiver packet buffer memory size select. 8 2 read-write SIZE0 Do not use top three address bits (0.5 Kb) 0x00000000 SIZE1 Do not use top two address bits (1 Kb) 0x00000001 SIZE2 Do not use top address bit (2 Kb) 0x00000002 SIZE3 Use full configured addressable space (4 Kb) 0x00000003 TXBDEXTENDMODEEN Enable TX extended BD mode. 29 1 read-write TXPBUFSIZE Transmitter packet buffer memory size select. 10 1 read-write TXPBUFTCPEN Transmitter IP, TCP and UDP checksum generation offload enable 11 1 read-write EXCESSCOLS Excessive Collisions 0x140 32 read-write n 0x0 0x0 COUNT Excessive collisions 0 10 read-write EXCESSIVERXLEN Oversize Frames Received 0x188 32 read-write n 0x0 0x0 COUNT Oversize frames received 0 10 read-write FCSERRS Frame Check Sequence Errors 0x190 32 read-write n 0x0 0x0 COUNT Frame check sequence errors 0 10 read-write FRAMESRXED1024 1024 to 1518 Byte Frames Received 0x17C 32 read-write n 0x0 0x0 COUNT 1024 to 1518 byte frames received without error 0 32 read-write FRAMESRXED128 128 to 255 Byte Frames Received 0x170 32 read-write n 0x0 0x0 COUNT 128 to 255 byte frames received without error 0 32 read-write FRAMESRXED1519 1519 to maximum Byte Frames Received 0x180 32 read-write n 0x0 0x0 COUNT 1519 to maximum byte frames received without error 0 32 read-write FRAMESRXED256 256 to 511 Byte Frames Received 0x174 32 read-write n 0x0 0x0 COUNT 256 to 511 byte frames received without error 0 32 read-write FRAMESRXED512 512 to 1023 Byte Frames Received 0x178 32 read-write n 0x0 0x0 COUNT 512 to 1023 byte frames received without error 0 32 read-write FRAMESRXED64 64 Byte Frames Received 0x168 32 read-write n 0x0 0x0 COUNT 64 byte frames received without error 0 32 read-write FRAMESRXED65 65 to 127 Byte Frames Received 0x16C 32 read-write n 0x0 0x0 COUNT 65 to 127 byte frames received without error 0 32 read-write FRAMESRXEDOK Frames Received 0x158 32 read-write n 0x0 0x0 COUNT Frames received without error 0 32 read-write FRAMESTXED1024 1024 to 1518 Byte Frames Transmitted 0x12C 32 read-write n 0x0 0x0 COUNT 1024 to 1518 byte frames transmitted without error 0 32 read-write FRAMESTXED128 128 to 255 Byte Frames Transmitted 0x120 32 read-write n 0x0 0x0 COUNT 128 to 255 byte frames transmitted without error 0 32 read-write FRAMESTXED1519 Greater Than 1518 Byte Frames Transmitted 0x130 32 read-write n 0x0 0x0 COUNT Greater than 1518 byte frames transmitted without error 0 32 read-write FRAMESTXED256 256 to 511 Byte Frames Transmitted 0x124 32 read-write n 0x0 0x0 COUNT 256 to 511 byte frames transmitted without error 0 32 read-write FRAMESTXED512 512 to 1023 Byte Frames Transmitted 0x128 32 read-write n 0x0 0x0 COUNT 512 to 1023 byte frames transmitted without error 0 32 read-write FRAMESTXED64 64 Byte Frames Transmitted 0x118 32 read-write n 0x0 0x0 COUNT 64 byte frames transmitted without error 0 32 read-write FRAMESTXED65 65 to 127 Byte Frames Transmitted 0x11C 32 read-write n 0x0 0x0 COUNT 65 to127 byte frames transmitted without error 0 32 read-write FRAMESTXEDOK Frames Transmitted 0x108 32 read-write n 0x0 0x0 COUNT Frames transmitted without error 0 32 read-write HASHBOTTOM Hash Register Bottom [31:0] 0x80 32 read-write n 0x0 0x0 ADDR The first 32 bits of the hash address register. 0 32 read-write HASHTOP Hash Register Top [63:32] 0x84 32 read-write n 0x0 0x0 ADDR The remaining 32 bits of the hash address register. 0 32 read-write IENC Interrupt Disable Register 0x2C 32 write-only n 0x0 0x0 AMBAERR Disable transmit frame corruption due to AMBA (AHB) error interrupt 6 1 write-only MNGMNTDONE Disable management done interrupt 0 1 write-only NONZEROPFRMQUANT Disable pause frame with non-zero pause quantum interrupt 12 1 write-only PAUSETIMEZERO Disable pause time zero interrupt 13 1 write-only PFRMTX Disable pause frame transmitted interrupt 14 1 write-only PTPDLYREQFRMRX Disable PTP delay_req frame received interrupt 18 1 write-only PTPDLYREQFRMTX Disable PTP delay_req frame transmitted interrupt 20 1 write-only PTPPDLYREQFRMRX Disable PTP pdelay_req frame received interrupt 22 1 write-only PTPPDLYREQFRMTX Disable PTP pdelay_req frame transmitted interrupt 24 1 write-only PTPPDLYRESPFRMRX Disable PTP pdelay_resp frame received interrupt 23 1 write-only PTPPDLYRESPFRMTX Disable PTP pdelay_resp frame transmitted interrupt 25 1 write-only PTPSYNCFRMRX Disable PTP sync frame received interrupt 19 1 write-only PTPSYNCFRMTX Disable PTP sync frame transmitted interrupt 21 1 write-only RESPNOTOK Disable bresp/hresp not OK interrupt 11 1 write-only RTRYLMTORLATECOL Disable retry limit exceeded or late collision interrupt 5 1 write-only RXCMPLT Disable receive complete interrupt 1 1 write-only RXLPIINDC Disable RX LPI indication interrupt 27 1 write-only RXOVERRUN Disable receive overrun interrupt 10 1 write-only RXUSEDBITREAD Disable receive used bit read interrupt 2 1 write-only TSUSECREGINCR Disable TSU seconds register increment interrupt 26 1 write-only TSUTIMERCOMP Disable TSU timer comparison interrupt. 29 1 write-only TXCMPLT Disable transmit complete interrupt 7 1 write-only TXUNDERRUN Disable transmit buffer under run interrupt 4 1 write-only TXUSEDBITREAD Disable transmit used bit read interrupt 3 1 write-only WOLEVNTRX Disable WOL event received interrupt 28 1 write-only IENRO Interrupt mask register 0x30 32 read-write n 0x0 0x0 AMBAERR Transmit frame corruption due to AMBA (AHB) error interrupt mask 6 1 read-write MNGMNTDONE management done interrupt mask 0 1 read-write NONZEROPFRMQUANT Pause frame with non-zero pause quantum interrupt mask 12 1 read-write PAUSETIMEZERO pause time zero interrupt mask 13 1 read-write PFRMTX pause frame transmitted interrupt mask 14 1 read-write PTPDLYREQFRMRX PTP delay_req frame received mask 18 1 read-write PTPDLYREQFRMTX PTP delay_req frame transmitted mask 20 1 read-write PTPPDLYREQFRMRX PTP pdelay_req frame received mask 22 1 read-write PTPPDLYREQFRMTX PTP pdelay_req frame transmitted mask 24 1 read-write PTPPDLYRESPFRMRX PTP pdelay_resp frame received mask 23 1 read-write PTPPDLYRESPFRMTX PTP pdelay_resp frame transmitted mask 25 1 read-write PTPSYNCFRMRX PTP sync frame received mask 19 1 read-write PTPSYNCFRMTX PTP sync frame transmitted mask 21 1 read-write RESPNOTOK bresp/hresp not OK interrupt mask 11 1 read-write RTRYLMTORLATECOL Retry limit exceeded or late collision (gigabit mode only) interrupt mask 5 1 read-write RXCMPLT receive complete interrupt mask 1 1 read-write RXLPIINDC RX LPI indication mask 27 1 read-write RXOVERRUN Receive overrun interrupt mask 10 1 read-write RXUSEDBITREAD receive used bit read interrupt mask 2 1 read-write TSUSECREGINCR TSU seconds register increment mask 26 1 read-write TSUTIMERCOMP TSU timer comparison interrupt mask. 29 1 read-write TXCMPLT Transmit complete interrupt mask 7 1 read-write TXUNDERRUN transmit buffer under run interrupt mask 4 1 read-write TXUSEDBITREAD transmit used bit read interrupt mask 3 1 read-write UNUSED Unused 8 1 read-write WOLEVNTRX WOL event received mask 28 1 read-write IENS Interrupt Enable Register 0x28 32 write-only n 0x0 0x0 AMBAERR Enable transmit frame corruption due to AMBA (AHB) error interrupt 6 1 write-only MNGMNTDONE Enable management done interrupt 0 1 write-only NONZEROPFRMQUANT Enable pause frame with non-zero pause quantum interrupt 12 1 write-only PAUSETIMEZERO Enable pause time zero interrupt 13 1 write-only PFRMTX Enable pause frame transmitted interrupt 14 1 write-only PTPDLYREQFRMRX Enable PTP delay_req frame received interrupt 18 1 write-only PTPDLYREQFRMTX Enable PTP delay_req frame transmitted interrupt 20 1 write-only PTPPDLYREQFRMRX Enable PTP pdelay_req frame received interrupt 22 1 write-only PTPPDLYREQFRMTX Enable PTP pdelay_req frame transmitted interrupt 24 1 write-only PTPPDLYRESPFRMRX Enable PTP pdelay_resp frame received interrupt 23 1 write-only PTPPDLYRESPFRMTX Enable PTP pdelay_resp frame transmitted interrupt 25 1 write-only PTPSYNCFRMRX Enable PTP sync frame received interrupt 19 1 write-only PTPSYNCFRMTX Enable PTP sync frame transmitted interrupt 21 1 write-only RESPNOTOK Enable bresp/hresp not OK interrupt 11 1 write-only RTRYLMTORLATECOL Enable retry limit exceeded or late collision interrupt 5 1 write-only RXCMPLT Enable receive complete interrupt 1 1 write-only RXLPIINDC Enable RX LPI indication interrupt 27 1 write-only RXOVERRUN Enable receive overrun interrupt 10 1 write-only RXUSEDBITREAD Enable receive used bit read interrupt 2 1 write-only TSUSECREGINCR Enable TSU seconds register increment interrupt 26 1 write-only TSUTIMERCOMP Enable TSU timer comparison interrupt. 29 1 write-only TXCMPLT Enable transmit complete interrupt 7 1 write-only TXUNDERRUN Enable transmit buffer under run interrupt 4 1 write-only TXUSEDBITREAD Enable transmit used bit read interrupt 3 1 write-only WOLEVNTRX Enable WOL event received interrupt 28 1 write-only IFCR Interrupt status register 0x24 32 read-write n 0x0 0x0 AMBAERR Transmit frame corruption due to AMBA (AHB) error. 6 1 read-write MNGMNTDONE Management frame sent 0 1 read-write NONZEROPFRMQUANT Pause frame with non-zero pause quantum received 12 1 read-write PAUSETIMEZERO Pause Time zero 13 1 read-write PFRMTX Pause frame transmitted 14 1 read-write PTPDLYREQFRMRX PTP delay_req frame received 18 1 read-write PTPDLYREQFRMTX PTP delay_req frame transmitted 20 1 read-write PTPPDLYREQFRMRX PTP pdelay_req frame received 22 1 read-write PTPPDLYREQFRMTX PTP pdelay_req frame transmitted 24 1 read-write PTPPDLYRESPFRMRX PTP pdelay_resp frame received 23 1 read-write PTPPDLYRESPFRMTX PTP pdelay_resp frame transmitted 25 1 read-write PTPSYNCFRMRX PTP sync frame received 19 1 read-write PTPSYNCFRMTX PTP sync frame transmitted 21 1 read-write RESPNOTOK Hresp not OK 11 1 read-write RTRYLMTORLATECOL Retry limit exceeded or late collision 5 1 read-write RXCMPLT Receive complete 1 1 read-write RXLPIINDC Receive LPI indication status bit change 27 1 read-write RXOVERRUN Receive overrun 10 1 read-write RXUSEDBITREAD RX used bit read 2 1 read-write TSUSECREGINCR TSU seconds register increment 26 1 read-write TSUTIMERCOMP TSU timer comparison interrupt. 29 1 read-write TXCMPLT Transmit complete 7 1 read-write TXUNDERRUN Transmit under run 4 1 read-write TXUSEDBITREAD TX used bit read 3 1 read-write WOLEVNTRX WOL event received interrupt. 28 1 read-write IMOD Interrupt moderation register 0x5C 32 read-write n 0x0 0x0 RXINTMOD Count of 800ns periods before bit 1 is set in the interrupt status register after a frame is received 0 8 read-write TXINTMOD Count of 800ns periods before bit 7 is set in the interrupt status register after a frame is transmitted 16 8 read-write JUMBOMAXLEN Maximum Jumbo Frame Size. 0x48 32 read-write n 0x0 0x0 JUMBOMAXLEN Maximum Jumbo Frame Size - resets to the gem_jumbo_max_length define value. 0 14 read-write LATECOLS Late Collisions 0x144 32 read-write n 0x0 0x0 COUNT Late collisions 0 10 read-write MASKADD1BOTTOM Specific Address Mask 1 Bottom 31:0 0xC8 32 read-write n 0x0 0x0 ADDRMASK Specific Address Mask 0 32 read-write MASKADD1TOP Specific Address Mask 1 Top 47:32 0xCC 32 read-write n 0x0 0x0 ADDRMASK Specific Address Mask 0 16 read-write MULTICASTRXED Multicast Frames Received 0x160 32 read-write n 0x0 0x0 COUNT Multicast frames received without error 0 32 read-write MULTICASTTXED Multicast Frames Transmitted 0x110 32 read-write n 0x0 0x0 COUNT Multicast frames transmitted without error 0 32 read-write MULTICOLS Multiple Collision Frames 0x13C 32 read-write n 0x0 0x0 COUNT Multiple collision frames 0 18 read-write NETWORKCFG Network configuration register 0x4 32 read-write n 0x0 0x0 COPYALLFRAMES Copy all frames 4 1 read-write DISCOPYOFPFRAMES Disable copy of pause frames 23 1 read-write DISCRDNONVLANFRAMES Discard non-VLAN frames 2 1 read-write ENHALFDUPLEXRX Enable frames to be received in half-duplex mode while transmitting. 25 1 read-write FCSREMOVE FCS remove 17 1 read-write FULLDUPLEX Full duplex 1 1 read-write IGNOREIPGRXER Ignore IPG rx_er. 30 1 read-write IGNORERXFCS Ignore RX FCS 26 1 read-write IPGSTRTCHEN IPG stretch enable 28 1 read-write JUMBOFRAMES Jumbo frames enable 3 1 read-write LENFIELDERRFRMDISCRD Length field error frame discard 16 1 read-write MDCCLKDIV MDC clock division 18 3 read-write DIVBY8 divide HFBUSCLKETH by 8 (HFBUSCLKETH up to 20 MHz) 0x00000000 DIVBY16 divide HFBUSCLKETH by 16 (HFBUSCLKETH up to 40 MHz) 0x00000001 DIVBY32 divide HFBUSCLKETH by 32 (HFBUSCLKETH up to 80 MHz) 0x00000002 DIVBY48 divide HFBUSCLKETH by 48 (HFBUSCLKETH up to 120 MHz) 0x00000003 DIVBY64 divide HFBUSCLKETH by 64 (HFBUSCLKETH up to 160 MHz) 0x00000004 DIVBY96 divide HFBUSCLKETH by 96 (HFBUSCLKETH up to 240 MHz) 0x00000005 DIVBY128 divide HFBUSCLKETH by 128 (HFBUSCLKETH up to 320 MHz) 0x00000006 DIVBY224 divide HFBUSCLKETH by 224 (HFBUSCLKETH up to 540 MHz) 0x00000007 MULTICASTHASHEN Multicast hash enable 6 1 read-write NOBROADCAST No broadcast 5 1 read-write NSPCHANGE Receive bad preamble. 29 1 read-write PAUSEEN Pause enable 13 1 read-write RETRYTEST Retry test 12 1 read-write RX1536BYTEFRAMES Receive 1536 byte frames 8 1 read-write RXBUFFOFFSET Receive buffer offset 14 2 read-write RXCHKSUMOFFLOADEN Receive checksum offload enable 24 1 read-write SPEED Speed 0 1 read-write UNICASTHASHEN Unicast hash enable 7 1 read-write NETWORKCTRL Network control register 0x0 32 read-write n 0x0 0x0 BACKPRESSURE Back pressure will force collisions on all received frames 8 1 read-write CLRALLSTATSREGS Clear statistics registers 5 1 read-write ENBRX Receive enable 2 1 read-write ENBTX Transmit enable 3 1 read-write FLUSHRXPKT Flush the next packet from the external RX DPRAM. 18 1 read-write INCALLSTATSREGS Incremental statistics registers 6 1 read-write LOOPBACKLOCAL Loopback local 1 1 read-write MANPORTEN Management port enable 4 1 read-write ONESTEPSYNCMODE 1588 One Step Sync Mode. 24 1 read-write PFCCTRL Enable multiple PFC pause quantums, one per pause priority 25 1 read-write PFCENB Enable PFC Priority Based Pause Reception capabilities. 16 1 read-write PTPUNICASTEN Enable detection of unicast PTP unicast frames. 20 1 read-write STATSWREN Write enable for statistics registers 7 1 read-write STORERXTS Store receive time stamp to memory. 15 1 read-write STOREUDPOFFSET Store UDP / TCP offset to memory. 22 1 read-write TXHALT Transmit halt 10 1 read-write TXLPIEN Enable LPI transmission when set LPI (low power idle) is immediately transmitted. 19 1 read-write TXPFCPRIORPFRM Write a one to transmit PFC priority based pause frame. 17 1 read-write TXPFRMREQ Transmit pause frame 11 1 read-write TXPFRMZERO Transmit zero quantum pause frame 12 1 read-write TXSTRT Start transmission 9 1 read-write NETWORKSTATUS Network status register 0x8 32 read-only n 0x0 0x0 LPIINDICATE LPI Indication 7 1 read-only MANDONE The PHY management logic is idle (i.e. has completed). 2 1 read-only MDIOIN Returns status of the mdio_in pin. 1 1 read-only PFCNEGOTIATE Set when PFC Priority Based Pause has been negotiated. 6 1 read-only OCTETSRXEDBOTTOM Octets Received 31:0 0x150 32 read-write n 0x0 0x0 COUNT Received octets in frame without errors 0 32 read-write OCTETSRXEDTOP Octets Received 47:32 0x154 32 read-write n 0x0 0x0 COUNT Received octets in frame without errors 0 16 read-write OCTETSTXEDBOTTOM Octets transmitted 31:0 0x100 32 read-write n 0x0 0x0 COUNT Transmitted octets in frame without errors [31:0] 0 32 read-write OCTETSTXEDTOP Octets Transmitted 47:32 0x104 32 read-write n 0x0 0x0 COUNT Transmitted octets in frame without errors [47:32] 0 16 read-write PBUFRXCUTTHRU RX Partial Store and Forward 0x44 32 read-write n 0x0 0x0 DMARXCUTTHRU Enable RX partial store and forward operation 31 1 read-write DMARXCUTTHRUTHR Watermark value 0 10 read-write PBUFTXCUTTHRU TX Partial Store and Forward 0x40 32 read-write n 0x0 0x0 DMATXCUTTHRU Enable TX partial store and forward operation 31 1 read-write DMATXCUTTHRUTHR Watermark value 0 10 read-write PFRAMESRXED Pause Frames Received 0x164 32 read-write n 0x0 0x0 COUNT Received pause frames 0 16 read-write PFRAMESTXED Pause Frames Transmitted 0x114 32 read-write n 0x0 0x0 COUNT Transmitted pause frames 0 16 read-write PHYMNGMNT PHY management register 0x34 32 read-write n 0x0 0x0 OPERATION Operation. For a Clause 45 frame: 00 is an addr, 01 is a write, 10 is a post read increment, 11 is a read frame. For a Clause 22 frame: 10 is a read, 01 is a write. 28 2 read-write PHYADDR PHY address. 23 5 read-write PHYRWDATA PHY read write data 0 16 read-write REGADDR Register address - specifies the register in the PHY to access. 18 5 read-write WRITE0 Must be written with 0. 31 1 read-write WRITE1 Must be written to 1 for a valid Clause 22 frame and to 0 for a valid Clause 45 frame. 30 1 read-write WRITE10 Must be written with 10. 16 2 read-write ROUTELOC0 I/O Route Location Register 0 0xC04 32 read-write n 0x0 0x0 MIICOLLOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 MIICRSLOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 MIIRXLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 MIITXLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 ROUTELOC1 I/O Route Location Register 1 0xC0C 32 read-write n 0x0 0x0 MDIOLOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 RMIILOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 TSUEXTCLKLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 TSUTMRTOGLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 ROUTEPEN I/O Route Enable Register 0xC00 32 read-write n 0x0 0x0 MDIOPEN MDIO I/O Enable 0 1 read-write MIIPEN MII I/O Enable 3 1 read-write MIIRXERPEN MII TX ER I/O Enable 2 1 read-write MIITXERPEN MII TX ER I/O Enable 1 1 read-write RMIIPEN RMII I/O Enable 4 1 read-write TSUTMRTOGPEN TSU_TMR_CNT_SEC Output Enable 5 1 read-write RXBDCTRL RX BD control register 0x4D0 32 read-write n 0x0 0x0 RXBDTSMODE RX Descriptor Timestamp Insertion mode, 00: TS insertion disable, 01: TS inserted for PTP Event Frames only, 10: TS inserted for All PTP Frames only, 11: TS insertion for All Frames 4 2 read-write RXIPCKERRS IP Header Checksum Errors 0x1A8 32 read-write n 0x0 0x0 COUNT IP header checksum errors 0 8 read-write RXJABBERS Jabbers Received 0x18C 32 read-write n 0x0 0x0 COUNT Jabbers received 0 10 read-write RXLENERRS Length Field Frame Errors 0x194 32 read-write n 0x0 0x0 COUNT Length field frame errors 0 10 read-write RXLPI Received LPI transitions 0x270 32 read-write n 0x0 0x0 COUNT Count of RX LPI transitions 0 16 read-write RXLPITIME Received LPI time 0x274 32 read-write n 0x0 0x0 LPITIME Time in LPI 0 24 read-write RXOVERRUNS Receive Overruns 0x1A4 32 read-write n 0x0 0x0 COUNT Receive overruns 0 10 read-write RXPAUSEQUANT Received Pause Quantum Register 0x38 32 read-only n 0x0 0x0 QUANT Received pause quantum 0 16 read-only RXPTPUNICAST PTP RX unicast IP destination address 0xD4 32 read-write n 0x0 0x0 ADDR Unicast IP destination address 0 32 read-write RXQPTR Start address of the receive buffer queue 0x18 32 read-write n 0x0 0x0 DMARXQPTR Receive buffer queue base address 2 30 read-write RXRESOURCEERRS Receive Resource Errors 0x1A0 32 read-write n 0x0 0x0 COUNT Receive resource errors 0 18 read-write RXSTATUS Receive status register 0x20 32 read-write n 0x0 0x0 BUFFNOTAVAIL Buffer not available 0 1 read-write FRMRX Frame received 1 1 read-write RESPNOTOK bresp/hresp not OK 3 1 read-write RXOVERRUN Receive overrun 2 1 read-write RXSYMBOLERRS Receive Symbol Errors 0x198 32 read-write n 0x0 0x0 COUNT Receive symbol errors 0 10 read-write RXTCPCKERRS TCP Checksum Errors 0x1AC 32 read-write n 0x0 0x0 COUNT TCP checksum errors 0 8 read-write RXUDPCKERRS UDP Checksum Errors 0x1B0 32 read-write n 0x0 0x0 COUNT UDP checksum errors 0 8 read-write SINGLECOLS Single Collision Frames 0x138 32 read-write n 0x0 0x0 COUNT Single collision frames 0 18 read-write SPECADDR1BOTTOM Specific Address 1 Bottom 0x88 32 read-write n 0x0 0x0 ADDR Least significant 32 bits of the destination address 0 32 read-write SPECADDR1TOP Specific Address 1 Top 0x8C 32 read-write n 0x0 0x0 ADDR Specific address 1 MSB 0 16 read-write FILTERTYPE MAC SA or DA selection 16 1 read-write SPECADDR2BOTTOM Specific Address 2 Bottom 0x90 32 read-write n 0x0 0x0 ADDR Least significant 32 bits of the destination address 0 32 read-write SPECADDR2TOP Specific Address 2 Top 0x94 32 read-write n 0x0 0x0 ADDR Specific address 2 MSB 0 16 read-write FILTERBYTEMASK Filter byte Mask 24 6 read-write FILTERTYPE MAC SA or DA selection 16 1 read-write SPECADDR3BOTTOM Specific Address 3 Bottom 0x98 32 read-write n 0x0 0x0 ADDR Least significant 32 bits of the destination address 0 32 read-write SPECADDR3TOP Specific Address 3 Top 0x9C 32 read-write n 0x0 0x0 ADDR Specific address 3 MSB 0 16 read-write FILTERBYTEMASK Filter byte Mask 24 6 read-write FILTERTYPE MAC SA or DA selection 16 1 read-write SPECADDR4BOTTOM Specific Address 4 Bottom 0xA0 32 read-write n 0x0 0x0 ADDR Least significant 32 bits of the destination address 0 32 read-write SPECADDR4TOP Specific Address 4 Top 0xA4 32 read-write n 0x0 0x0 ADDR Specific address 4 MSB 0 16 read-write FILTERBYTEMASK Filter byte Mask 24 6 read-write FILTERTYPE MAC SA or DA selection 16 1 read-write SPECTYPE1 Type ID Match 1 0xA8 32 read-write n 0x0 0x0 ENBCOPY Enable copying of type ID match 1 matched frames. 31 1 read-write MATCH Type ID match 1 0 16 read-write SPECTYPE2 Type ID Match 2 0xAC 32 read-write n 0x0 0x0 ENBCOPY Enable copying of type ID match 2 matched frames. 31 1 read-write MATCH Type ID match 2 0 16 read-write SPECTYPE3 Type ID Match 3 0xB0 32 read-write n 0x0 0x0 ENBCOPY Enable copying of type ID match 3 matched frames. 31 1 read-write MATCH Type ID match 3 0 16 read-write SPECTYPE4 Type ID Match 4 0xB4 32 read-write n 0x0 0x0 ENBCOPY Enable copying of type ID match 4 matched frames. 31 1 read-write MATCH Type ID match 4 0 16 read-write STACKEDVLAN Stacked VLAN Register 0xC0 32 read-write n 0x0 0x0 ENBPROCESSING Enable stacked VLAN processing mode 31 1 read-write MATCH User defined VLAN_TYPE field 0 16 read-write STRETCHRATIO IPG stretch register 0xBC 32 read-write n 0x0 0x0 IPGSTRETCH IPG Stretch 0 16 read-write SYSWAKETIME System wake time 0x60 32 read-write n 0x0 0x0 SYSWAKETIME Count of 64ns, 320ns or 3200ns intervals before transmission starts after deassertion of tx_lpi_en 0 16 read-write TSUMSBSECCMP TSU timer comparison value seconds [47:32] 0xE4 32 read-write n 0x0 0x0 COMPVAL TSU timer comparison value (s) 0 16 read-write TSUNSECCMP TSU timer comparison value nanoseconds 0xDC 32 read-write n 0x0 0x0 COMPVAL TSU timer comparison value (ns) 0 22 read-write TSUPEERRXMSBSEC PTP Peer Event Frame Received Seconds Register 47:32 0xF4 32 read-only n 0x0 0x0 TIMERSEC PTP Peer Event Frame RX Seconds 0 16 read-only TSUPEERRXNSEC PTP Peer Event Frame Received Nanoseconds Register 0x1FC 32 read-only n 0x0 0x0 TIMER PTP Peer Event Frame Received Nanoseconds 0 30 read-only TSUPEERRXSEC PTP Peer Event Frame Received Seconds Register 31:0 0x1F8 32 read-only n 0x0 0x0 TIMER PTP Peer Event Frame Received Seconds 0 32 read-only TSUPEERTXMSBSEC PTP Peer Event Frame Transmitted Seconds Register 47:32 0xF0 32 read-only n 0x0 0x0 TIMERSEC PTP Peer Event Frame TX Seconds 0 16 read-only TSUPEERTXNSEC PTP Peer Event Frame Transmitted Nanoseconds Register 0x1F4 32 read-only n 0x0 0x0 TIMER PTP Peer Event Frame Transmitted Nanoseconds 0 30 read-only TSUPEERTXSEC PTP Peer Event Frame Transmitted Seconds Register 31:0 0x1F0 32 read-only n 0x0 0x0 TIMER PTP Peer Event Frame Received Seconds 0 32 read-only TSUPTPRXMSBSEC PTP Event Frame Received Seconds Register 47:32 0xEC 32 read-only n 0x0 0x0 TIMERSEC PTP Event Frame TX Seconds 0 16 read-only TSUPTPRXNSEC PTP Event Frame Received Nanoseconds Register 0x1EC 32 read-only n 0x0 0x0 TIMER PTP Event Frame Received Nanoseconds 0 30 read-only TSUPTPRXSEC PTP Event Frame Received Seconds Register 31:0 0x1E8 32 read-only n 0x0 0x0 TIMER PTP Event Frame Received Seconds 0 32 read-only TSUPTPTXMSBSEC PTP Event Frame Transmitted Seconds Register 47:32 0xE8 32 read-only n 0x0 0x0 TIMERSEC PTP Event Frame TX Seconds 0 16 read-only TSUPTPTXNSEC PTP Event Frame Transmitted Nanoseconds Register 0x1E4 32 read-only n 0x0 0x0 TIMER PTP Event Frame Transmitted Nanoseconds 0 30 read-only TSUPTPTXSEC PTP Event Frame Transmitted Seconds Register 31:0 0x1E0 32 read-only n 0x0 0x0 TIMER PTP Event Frame Transmitted Seconds 0 32 read-only TSUSECCMP TSU timer comparison value seconds [31:0] 0xE0 32 read-write n 0x0 0x0 COMPVAL TSU timer comparison value (s) 0 32 read-write TSUTIMERADJUST This register returns all zeroes when read. 0x1D8 32 read-write n 0x0 0x0 ADDSUBTRACT Write as one to subtract from the 1588 timer 31 1 read-write INCREMENTVAL Timer increment value 0 30 read-write TSUTIMERINCR 1588 Timer Increment Register 0x1DC 32 read-write n 0x0 0x0 ALTNSINCR Alternative nanoseconds count 8 8 read-write NSINCREMENT A count of nanoseconds by which the 1588 timer nanoseconds register will be incremented each clock cycle 0 8 read-write NUMINCS Number of incs before alt inc 16 8 read-write TSUTIMERINCRSUBNSEC 1588 Timer Increment Register subscript nsec 0x1BC 32 read-write n 0x0 0x0 SUBNSINCR MSB [23:8] of the subscript-ns value 0 16 read-write SUBNSINCRLSB LSB [7:0] of the subscript-ns value 24 8 read-write TSUTIMERMSBSEC 1588 Timer Seconds Register 47:32 0x1C0 32 read-write n 0x0 0x0 TIMER MSB 16 bits of seconds timer count. 0 16 read-write TSUTIMERNSEC 1588 Timer Nanoseconds Register 0x1D4 32 read-write n 0x0 0x0 TIMER Timer count in nanoseconds 0 30 read-write TSUTIMERSEC 1588 Timer Seconds Register 31:0 0x1D0 32 read-write n 0x0 0x0 TIMER 1588 Timer Seconds Register 0 32 read-write TXBDCTRL TX BD control register 0x4CC 32 read-write n 0x0 0x0 TXBDTSMODE TX Descriptor Timestamp Insertion mode, 00: TS insertion disable, 01: TS inserted for PTP Event Frames only, 10: TS inserted for All PTP Frames only, 11: TS insertion for All Frames 4 2 read-write TXLPI Transmit LPI transitions 0x278 32 read-write n 0x0 0x0 COUNT Count of LPI transmitions 0 16 read-write TXLPITIME Transmit LPI time 0x27C 32 read-write n 0x0 0x0 LPITIME Time in LPI 0 24 read-write TXPAUSEQUANT Transmit Pause Quantum Register 0x3C 32 read-write n 0x0 0x0 QUANT Transmit pause quantum 0 16 read-write QUANTP1 Transmit pause quantum - written with the pause quantum value for pause frame transmission of priority 1. 16 16 read-write TXPAUSEQUANT1 Transmit Pause Quantum Register 1 0x260 32 read-write n 0x0 0x0 QUANTP2 Transmit pause quantum - written with the pause quantum value for pause frame transmission of priority 2. 0 16 read-write QUANTP3 Transmit pause quantum - written with the pause quantum value for pause frame transmission of priority 3. 16 16 read-write TXPAUSEQUANT2 Transmit Pause Quantum Register 2 0x264 32 read-write n 0x0 0x0 QUANTP4 Transmit pause quantum - written with the pause quantum value for pause frame transmission of priority 4. 0 16 read-write QUANTP5 Transmit pause quantum - written with the pause quantum value for pause frame transmission of priority 5. 16 16 read-write TXPAUSEQUANT3 Transmit Pause Quantum Register 3 0x268 32 read-write n 0x0 0x0 QUANTP6 Transmit pause quantum - written with the pause quantum value for pause frame transmission of priority 6. 0 16 read-write QUANTP7 Transmit pause quantum - written with the pause quantum value for pause frame transmission of priority 7. 16 16 read-write TXPFCPAUSE Transmit PFC Pause Register 0xC4 32 read-write n 0x0 0x0 VECTOR Priority Vector Pause Size. If bit 17 of the network control register is written with a one then for each entry equal to zero in the Transmit PFC Pause Register[15:8], the PFC pause frame's pause quantum field associated with that entry will be taken from the transmit pause quantum register. For each entry equal to one in the Transmit PFC Pause Register [15:8], the pause quantum associated with that entry will be zero. 8 8 read-write VECTORENB Priority Vector Enable. If bit 17 of the network control register is written with a one then the priority enable vector of the PFC priority based pause frame will be set equal to the value stored in this register [7:0]. 0 8 read-write TXPTPUNICAST PTP TX unicast IP destination address 0xD8 32 read-write n 0x0 0x0 ADDR Unicast IP destination address 0 32 read-write TXQPTR Start address of the transmit buffer queue 0x1C 32 read-write n 0x0 0x0 DMATXQPTR Transmit buffer queue base address 2 30 read-write TXSTATUS Transmit status register 0x14 32 read-write n 0x0 0x0 AMBAERR Transmit frame corruption due to AMBA (AHB) errors. 4 1 read-write COLOCCRD Collision occurred 1 1 read-write LATECOLOCCRD Late collision occurred 7 1 read-write RESPNOTOK bresp/hresp not OK 8 1 read-write RETRYLMTEXCD Retry limit exceeded 2 1 read-write TXCMPLT Transmit complete 5 1 read-write TXGO Transmit go 3 1 read-only TXUNDERRUN Transmit under run 6 1 read-write USEDBITREAD Used bit read 0 1 read-write TXUNDERRUNS Transmit Under Runs 0x134 32 read-write n 0x0 0x0 COUNT Transmit under runs 0 10 read-write UNDERSIZEFRAMES Undersized Frames Received 0x184 32 read-write n 0x0 0x0 COUNT Undersize frames received 0 10 read-write WOLREG Wake on LAN Register 0xB8 32 read-write n 0x0 0x0 ADDR Wake on LAN ARP request IP address. Written to define the least significant 16 bits of the target IP address that is matched to generate a Wake on LAN event. A value of zero will not generate an event, even if this is matched by the received frame. 0 16 read-write WOLMASK0 Wake on LAN magic packet event enable 16 1 read-write WOLMASK1 Wake on LAN ARP request event enable 17 1 read-write WOLMASK2 Wake on LAN specific address register 1 event enable 18 1 read-write WOLMASK3 Wake on LAN multicast hash event enable 19 1 read-write ETM ETM ETM 0x0 0x0 0x40000 registers n ETMAUTHSTATUS ETM Authentication Status Register 0xFB8 32 read-only n 0x0 0x0 NONSECINVDBG Non-secure invasive Debug Status 0 2 read-only NONSECNONINVDBG Non-secure non-invasive Debug Status 2 2 read-only DISABLE Non-secure non-invasive debug disable 0x00000002 ENABLE Non-secure non-invasive debug enable 0x00000003 SECINVDBG Secure invasive Debug Status 4 2 read-only SECNONINVDBG Secure non-invasive Debug Status 6 2 read-only ETMCCER Configuration Code Extension Register 0x1E8 32 read-only n 0x0 0x0 DADDRCMP Data Address comparisons 12 1 read-only EICEIMP EmbeddedICE Behavior control Implemented 21 1 read-only EICEWPNT EmbeddedICE watchpoint inputs 16 4 read-only EXTINPBUS Extended External Input Bus 3 8 read-only EXTINPSEL Extended External Input Selectors 0 2 read-only INSTRES Instrumentation Resources 13 3 read-only READREGS Readable Registers 11 1 read-only RFCNT Reduced Function Counter 27 1 read-only TEICEWPNT Trace Sart/Stop Block Uses EmbeddedICE watchpoint inputs 20 1 read-only TENC Timestamp Encoding 28 1 read-only TIMP Timestamping Implemented 22 1 read-only TSIZE Timestamp Size 29 1 read-only ETMCCR Configuration Code Register 0x4 32 read-only n 0x0 0x0 ADRCMPPAIR Number of Address Comparator Pairs 0 4 read-only COUNTNUM Number of Counters 13 3 read-only DATACMPNUM Number of Data Value Comparators 4 4 read-only ETMID ETM ID Register Present 31 1 read-only EXTINPNUM Number of External Inputs 17 3 read-only ZERO Zero inputs presents 0x00000000 ONE One inputs presents 0x00000001 TWO Two inputs presents 0x00000002 EXTOUTNUM Number of External Output 20 3 read-only FIFOFULLPRES FIFIO FULL present 23 1 read-only IDCOMPNUM Number of context ID Comparators 24 2 read-only MMACCESS Coprocessor and Memeory Access 27 1 read-only MMDECCNT Number of Memeory Map Decoders 8 5 read-only SEQPRES Sequencer Present 16 1 read-only TRACESS Trace Start/Stop Block Present 26 1 read-only ETMCIDR0 Component ID0 Register 0xFF0 32 read-only n 0x0 0x0 PREAMB CoreSight Preamble 0 8 read-only ETMCIDR1 Component ID1 Register 0xFF4 32 read-only n 0x0 0x0 PREAMB CoreSight Preamble 0 8 read-only ETMCIDR2 Component ID2 Register 0xFF8 32 read-only n 0x0 0x0 PREAMB CoreSight Preamble 0 8 read-only ETMCIDR3 Component ID3 Register 0xFFC 32 read-only n 0x0 0x0 PREAMB CoreSight Preamble 0 8 read-only ETMCLAIMCLR ETM Claim Tag Clear Register 0xFA4 32 read-write n 0x0 0x0 CLRTAG Tag Bits 0 1 read-write ETMCLAIMSET ETM Claim Tag Set Register 0xFA0 32 read-write n 0x0 0x0 SETTAG Tag Bits 0 8 read-write ETMCNTRLDVR1 Counter Reload Value 0x140 32 read-write n 0x0 0x0 COUNT Free running counter reload value 0 16 read-write ETMCR Main Control Register 0x0 32 read-write n 0x0 0x0 BRANCHOUTPUT Branch Output 8 1 read-write DBGREQCTRL Debug Request Control 9 1 read-write EPORTSIZE Port Size[3] 21 2 read-write ETMPORTSEL ETM Port Selection 11 1 read-write ETMPROG ETM Programming 10 1 read-write PORTMODE Port Mode Control 16 2 read-write PORTMODE2 Port Mode[2] 13 1 read-write PORTSIZE ETM Port Size 4 3 read-write POWERDWN ETM Control in low power mode 0 1 read-write STALL Stall Processor 7 1 read-write TSTAMPEN Time Stamp Enable 28 1 read-write ETMDEVTYPE CoreSight Device Type Register 0xFCC 32 read-only n 0x0 0x0 PROCTRACE Processor Trace 4 4 read-only TRACESRC Trace Source 0 4 read-only ETMFFLR ETM Fifo Full Level Register 0x2C 32 read-write n 0x0 0x0 BYTENUM Bytes left in FIFO 0 8 read-write ETMIDR ID Register 0x1E4 32 read-only n 0x0 0x0 BPE Branch Packet Encoding 20 1 read-only ETMMAJVER Major ETM Architecture Version 8 4 read-only ETMMINVER Minor ETM Architecture Version 4 4 read-only IMPCODE Implementer Code 24 8 read-only IMPVER Implementation Revision 0 4 read-only LPCF Load PC First 16 1 read-only PROCFAM Implementer Code 12 4 read-only SECEXT Security Extension Support 19 1 read-only THUMBT 32-bit Thumb Instruction Tracing 18 1 read-only ETMIDR2 ETM ID Register 2 0x208 32 read-only n 0x0 0x0 RFE RFE Transfer Order 0 1 read-only SWP SWP Transfer Order 1 1 read-only ETMISCIN Integration Test Miscellaneous Inputs Register 0xEE0 32 read-write n 0x0 0x0 COREHALT Core Halt 4 1 read-write EXTIN EXTIN Value 0 2 read-write ETMITATBCTR0 ETM Integration Test ATB Control 0 Register 0xEF8 32 read-write n 0x0 0x0 ATVALID ATVALID Output Value 0 1 read-write ETMITATBCTR2 ETM Integration Test ATB Control 2 Register 0xEF0 32 read-only n 0x0 0x0 ATREADY ATREADY Input Value 0 1 read-only ETMITCTRL ETM Integration Control Register 0xF00 32 read-write n 0x0 0x0 ITEN Integration Mode Enable 0 1 read-write ETMLAR ETM Lock Access Register 0xFB0 32 read-write n 0x0 0x0 KEY Key Value 0 1 read-write ETMLSR Lock Status Register 0xFB4 32 read-only n 0x0 0x0 LOCKED ETM locked 1 1 read-only LOCKIMP ETM Locking Implemented 0 1 read-only ETMPDSR Device Power-down Status Register 0x314 32 read-only n 0x0 0x0 ETMUP ETM Powered Up 0 1 read-only ETMPIDR0 Peripheral ID0 Register 0xFE0 32 read-only n 0x0 0x0 PARTNUM Part Number 0 8 read-only ETMPIDR1 Peripheral ID1 Register 0xFE4 32 read-only n 0x0 0x0 IDCODE JEP106 Identity Code 4 4 read-only PARTNUM Part Number 0 4 read-only ETMPIDR2 Peripheral ID2 Register 0xFE8 32 read-only n 0x0 0x0 ALWAYS1 Always 1 3 1 read-only IDCODE JEP106 Identity Code 0 3 read-only REV Revision 4 4 read-only ETMPIDR3 Peripheral ID3 Register 0xFEC 32 read-only n 0x0 0x0 CUSTMOD Customer Modified 0 4 read-only REVAND RevAnd 4 4 read-only ETMPIDR4 Peripheral ID4 Register 0xFD0 32 read-only n 0x0 0x0 CONTCODE JEP106 Continuation Code 0 4 read-only COUNT 4KB Count 4 4 read-only ETMPIDR5 Peripheral ID5 Register 0xFD4 32 write-only n 0x0 0x0 ETMPIDR6 Peripheral ID6 Register 0xFD8 32 write-only n 0x0 0x0 ETMPIDR7 Peripheral ID7 Register 0xFDC 32 write-only n 0x0 0x0 ETMSCR ETM System Configuration Register 0x14 32 read-only n 0x0 0x0 FIFOFULL FIFO FULL Supported 8 1 read-only MAXPORTSIZE Maximum Port Size 0 3 read-only MAXPORTSIZE3 Max Port Size[3] 9 1 read-only NOFETCHCOMP No Fetch Comparison 17 1 read-only PORTMODE Port Mode Supported 11 1 read-only PORTSIZE Port Size Supported 10 1 read-only PROCNUM Number of Supported Processros 12 3 read-only ETMSR ETM Status Register 0x10 32 read-write n 0x0 0x0 ETHOF ETM Overflow 0 1 read-only ETMPROGBIT ETM Programming Bit Status 1 1 read-only TRACESTAT Trace Start/Stop Status 2 1 read-write TRIGBIT Trigger Bit 3 1 read-write ETMSYNCFR Synchronisation Frequency Register 0x1E0 32 read-write n 0x0 0x0 FREQ Synchronisation Frequency Value 0 12 read-write ETMTECR1 ETM Trace control Register 0x24 32 read-write n 0x0 0x0 ADRCMP Address Comparator 0 8 read-write INCEXCTL Trace Include/Exclude Flag 24 1 read-write MEMMAP Memmap 8 16 read-write TCE Trace Control Enable 25 1 read-write ETMTEEVR ETM TraceEnable Event Register 0x20 32 read-write n 0x0 0x0 ETMFCNEN ETM Function Trace Enable 14 3 read-write RESA ETM Resource A Trace Enable 0 7 read-write RESB ETM Resource B Trace Enable 7 7 read-write ETMTESSEICR TraceEnable Start/Stop EmbeddedICE Control Register 0x1F0 32 read-write n 0x0 0x0 STARTRSEL Stop Resource Selection 0 4 read-write STOPRSEL Stop Resource Selection 16 4 read-write ETMTRACEIDR CoreSight Trace ID Register 0x200 32 read-write n 0x0 0x0 TRACEID Trace ID 0 7 read-write ETMTRIGGER ETM Trigger Event Register 0x8 32 read-write n 0x0 0x0 ETMFCN ETM Function 14 3 read-write RESA ETM Resource A 0 7 read-write RESB ETM Resource B 7 7 read-write ETMTSEVR Timestamp Event Register 0x1F8 32 read-write n 0x0 0x0 ETMFCNEVT ETM Function Event 14 3 read-write RESAEVT ETM Resource A Event 0 7 read-write RESBEVT ETM Resource B Event 7 7 read-write ITTRIGOUT Integration Test Trigger Out Register 0xEE8 32 read-write n 0x0 0x0 TRIGGEROUT Trigger output value 0 1 read-write FPUEH FPUEH FPUEH 0x0 0x0 0x400 registers n FPUEH 36 IEN Interrupt Enable Register 0xC 32 read-write n 0x0 0x0 FPDZC FPDZC Interrupt Enable 1 1 read-write FPIDC FPIDC Interrupt Enable 4 1 read-write FPIOC FPIOC Interrupt Enable 0 1 read-write FPIXC FPIXC Interrupt Enable 5 1 read-write FPOFC FPOFC Interrupt Enable 3 1 read-write FPUFC FPUFC Interrupt Enable 2 1 read-write IF Interrupt Flag Register 0x0 32 read-only n 0x0 0x0 FPDZC FPU divide-by-zero exception 1 1 read-only FPIDC FPU input denormal exception 4 1 read-only FPIOC FPU invalid operation 0 1 read-only FPIXC FPU inexact exception 5 1 read-only FPOFC FPU overflow exception 3 1 read-only FPUFC FPU underflow exception 2 1 read-only IFC Interrupt Flag Clear Register 0x8 32 write-only n 0x0 0x0 FPDZC Clear FPDZC Interrupt Flag 1 1 write-only FPIDC Clear FPIDC Interrupt Flag 4 1 write-only FPIOC Clear FPIOC Interrupt Flag 0 1 write-only FPIXC Clear FPIXC Interrupt Flag 5 1 write-only FPOFC Clear FPOFC Interrupt Flag 3 1 write-only FPUFC Clear FPUFC Interrupt Flag 2 1 write-only IFS Interrupt Flag Set Register 0x4 32 write-only n 0x0 0x0 FPDZC Set FPDZC Interrupt Flag 1 1 write-only FPIDC Set FPIDC Interrupt Flag 4 1 write-only FPIOC Set FPIOC Interrupt Flag 0 1 write-only FPIXC Set FPIXC Interrupt Flag 5 1 write-only FPOFC Set FPOFC Interrupt Flag 3 1 write-only FPUFC Set FPUFC Interrupt Flag 2 1 write-only GPCRC GPCRC GPCRC 0x0 0x0 0x400 registers n CMD Command Register 0x4 32 write-only n 0x0 0x0 INIT Initialization Enable 0 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOINIT Auto Init Enable 13 1 read-write BITREVERSE Byte-level Bit Reverse Enable 9 1 read-write BYTEMODE Byte Mode Enable 8 1 read-write BYTEREVERSE Byte Reverse Mode 10 1 read-write EN CRC Functionality Enable 0 1 read-write POLYSEL Polynomial Select 4 1 read-write DATA CRC Data Register 0x1C 32 read-only n 0x0 0x0 DATA CRC Data Register 0 32 read-only DATABYTEREV CRC Data Byte Reverse Register 0x24 32 read-only n 0x0 0x0 DATABYTEREV Data Byte Reverse Value 0 32 read-only DATAREV CRC Data Reverse Register 0x20 32 read-only n 0x0 0x0 DATAREV Data Reverse Value 0 32 read-only INIT CRC Init Value 0x8 32 read-write n 0x0 0x0 INIT CRC Initialization Value 0 32 read-write INPUTDATA Input 32-bit Data Register 0x10 32 read-write n 0x0 0x0 INPUTDATA Input Data for 32-bit 0 32 read-write INPUTDATABYTE Input 8-bit Data Register 0x18 32 read-write n 0x0 0x0 INPUTDATABYTE Input Data for 8-bit 0 8 read-write INPUTDATAHWORD Input 16-bit Data Register 0x14 32 read-write n 0x0 0x0 INPUTDATAHWORD Input Data for 16-bit 0 16 read-write POLY CRC Polynomial Value 0xC 32 read-write n 0x0 0x0 POLY CRC Polynomial Value 0 16 read-write GPIO GPIO GPIO 0x0 0x0 0x1000 registers n GPIO_EVEN 3 GPIO_ODD 13 EM4WUEN EM4 Wake Up Enable Register 0x42C 32 read-write n 0x0 0x0 EM4WUEN EM4 Wake Up Enable 16 16 read-write EXTIFALL External Interrupt Falling Edge Trigger Register 0x414 32 read-write n 0x0 0x0 EXTIFALL External Interrupt N Falling Edge Trigger Enable 0 16 read-write EXTILEVEL External Interrupt Level Register 0x418 32 read-write n 0x0 0x0 EM4WU0 EM4 Wake Up Level for EM4WU0 Pin 16 1 read-write EM4WU1 EM4 Wake Up Level for EM4WU1 Pin 17 1 read-write EM4WU2 EM4 Wake Up Level for EM4WU2 Pin 18 1 read-write EM4WU3 EM4 Wake Up Level for EM4WU3 Pin 19 1 read-write EM4WU4 EM4 Wake Up Level for EM4WU4 Pin 20 1 read-write EM4WU5 EM4 Wake Up Level for EM4WU5 Pin 21 1 read-write EM4WU6 EM4 Wake Up Level for EM4WU6 Pin 22 1 read-write EM4WU7 EM4 Wake Up Level for EM4WU7 Pin 23 1 read-write EM4WU8 EM4 Wake Up Level for EM4WU8 Pin 24 1 read-write EM4WU9 EM4 Wake Up Level for EM4WU9 Pin 25 1 read-write EXTIPINSELH External Interrupt Pin Select High Register 0x40C 32 read-write n 0x0 0x0 EXTIPINSEL10 External Interrupt 10 Pin Select 8 2 read-write PIN8 Pin 8 0x00000000 PIN9 Pin 9 0x00000001 PIN10 Pin 10 0x00000002 PIN11 Pin 11 0x00000003 EXTIPINSEL11 External Interrupt 11 Pin Select 12 2 read-write PIN8 Pin 8 0x00000000 PIN9 Pin 9 0x00000001 PIN10 Pin 10 0x00000002 PIN11 Pin 11 0x00000003 EXTIPINSEL12 External Interrupt 12 Pin Select 16 2 read-write PIN12 Pin 12 0x00000000 PIN13 Pin 13 0x00000001 PIN14 Pin 14 0x00000002 PIN15 Pin 15 0x00000003 EXTIPINSEL13 External Interrupt 13 Pin Select 20 2 read-write PIN12 Pin 12 0x00000000 PIN13 Pin 13 0x00000001 PIN14 Pin 14 0x00000002 PIN15 Pin 15 0x00000003 EXTIPINSEL14 External Interrupt 14 Pin Select 24 2 read-write PIN12 Pin 12 0x00000000 PIN13 Pin 13 0x00000001 PIN14 Pin 14 0x00000002 PIN15 Pin 15 0x00000003 EXTIPINSEL15 External Interrupt 15 Pin Select 28 2 read-write PIN12 Pin 12 0x00000000 PIN13 Pin 13 0x00000001 PIN14 Pin 14 0x00000002 PIN15 Pin 15 0x00000003 EXTIPINSEL8 External Interrupt 8 Pin Select 0 2 read-write PIN8 Pin 8 0x00000000 PIN9 Pin 9 0x00000001 PIN10 Pin 10 0x00000002 PIN11 Pin 11 0x00000003 EXTIPINSEL9 External Interrupt 9 Pin Select 4 2 read-write PIN8 Pin 8 0x00000000 PIN9 Pin 9 0x00000001 PIN10 Pin 10 0x00000002 PIN11 Pin 11 0x00000003 EXTIPINSELL External Interrupt Pin Select Low Register 0x408 32 read-write n 0x0 0x0 EXTIPINSEL0 External Interrupt 0 Pin Select 0 2 read-write PIN0 Pin 0 0x00000000 PIN1 Pin 1 0x00000001 PIN2 Pin 2 0x00000002 PIN3 Pin 3 0x00000003 EXTIPINSEL1 External Interrupt 1 Pin Select 4 2 read-write PIN0 Pin 0 0x00000000 PIN1 Pin 1 0x00000001 PIN2 Pin 2 0x00000002 PIN3 Pin 3 0x00000003 EXTIPINSEL2 External Interrupt 2 Pin Select 8 2 read-write PIN0 Pin 0 0x00000000 PIN1 Pin 1 0x00000001 PIN2 Pin 2 0x00000002 PIN3 Pin 3 0x00000003 EXTIPINSEL3 External Interrupt 3 Pin Select 12 2 read-write PIN0 Pin 0 0x00000000 PIN1 Pin 1 0x00000001 PIN2 Pin 2 0x00000002 PIN3 Pin 3 0x00000003 EXTIPINSEL4 External Interrupt 4 Pin Select 16 2 read-write PIN4 Pin 4 0x00000000 PIN5 Pin 5 0x00000001 PIN6 Pin 6 0x00000002 PIN7 Pin 7 0x00000003 EXTIPINSEL5 External Interrupt 5 Pin Select 20 2 read-write PIN4 Pin 4 0x00000000 PIN5 Pin 5 0x00000001 PIN6 Pin 6 0x00000002 PIN7 Pin 7 0x00000003 EXTIPINSEL6 External Interrupt 6 Pin Select 24 2 read-write PIN4 Pin 4 0x00000000 PIN5 Pin 5 0x00000001 PIN6 Pin 6 0x00000002 PIN7 Pin 7 0x00000003 EXTIPINSEL7 External Interrupt 7 Pin Select 28 2 read-write PIN4 Pin 4 0x00000000 PIN5 Pin 5 0x00000001 PIN6 Pin 6 0x00000002 PIN7 Pin 7 0x00000003 EXTIPSELH External Interrupt Port Select High Register 0x404 32 read-write n 0x0 0x0 EXTIPSEL10 External Interrupt 10 Port Select 8 4 read-write PORTA Port A group selected for external interrupt 10 0x00000000 PORTB Port B group selected for external interrupt 10 0x00000001 PORTC Port C group selected for external interrupt 10 0x00000002 PORTD Port D group selected for external interrupt 10 0x00000003 PORTE Port E group selected for external interrupt 10 0x00000004 PORTF Port F group selected for external interrupt 10 0x00000005 PORTG Port G group selected for external interrupt 10 0x00000006 PORTH Port H group selected for external interrupt 10 0x00000007 PORTI Port I group selected for external interrupt 10 0x00000008 EXTIPSEL11 External Interrupt 11 Port Select 12 4 read-write PORTA Port A group selected for external interrupt 11 0x00000000 PORTB Port B group selected for external interrupt 11 0x00000001 PORTC Port C group selected for external interrupt 11 0x00000002 PORTD Port D group selected for external interrupt 11 0x00000003 PORTE Port E group selected for external interrupt 11 0x00000004 PORTF Port F group selected for external interrupt 11 0x00000005 PORTG Port G group selected for external interrupt 11 0x00000006 PORTH Port H group selected for external interrupt 11 0x00000007 PORTI Port I group selected for external interrupt 11 0x00000008 EXTIPSEL12 External Interrupt 12 Port Select 16 4 read-write PORTA Port A group selected for external interrupt 12 0x00000000 PORTB Port B group selected for external interrupt 12 0x00000001 PORTC Port C group selected for external interrupt 12 0x00000002 PORTD Port D group selected for external interrupt 12 0x00000003 PORTE Port E group selected for external interrupt 12 0x00000004 PORTF Port F group selected for external interrupt 12 0x00000005 PORTG Port G group selected for external interrupt 12 0x00000006 PORTH Port H group selected for external interrupt 12 0x00000007 PORTI Port I group selected for external interrupt 12 0x00000008 EXTIPSEL13 External Interrupt 13 Port Select 20 4 read-write PORTA Port A group selected for external interrupt 13 0x00000000 PORTB Port B group selected for external interrupt 13 0x00000001 PORTC Port C group selected for external interrupt 13 0x00000002 PORTD Port D group selected for external interrupt 13 0x00000003 PORTE Port E group selected for external interrupt 13 0x00000004 PORTF Port F group selected for external interrupt 13 0x00000005 PORTG Port G group selected for external interrupt 13 0x00000006 PORTH Port H group selected for external interrupt 13 0x00000007 PORTI Port I group selected for external interrupt 13 0x00000008 EXTIPSEL14 External Interrupt 14 Port Select 24 4 read-write PORTA Port A group selected for external interrupt 14 0x00000000 PORTB Port B group selected for external interrupt 14 0x00000001 PORTC Port C group selected for external interrupt 14 0x00000002 PORTD Port D group selected for external interrupt 14 0x00000003 PORTE Port E group selected for external interrupt 14 0x00000004 PORTF Port F group selected for external interrupt 14 0x00000005 PORTG Port G group selected for external interrupt 14 0x00000006 PORTH Port H group selected for external interrupt 14 0x00000007 PORTI Port I group selected for external interrupt 14 0x00000008 EXTIPSEL15 External Interrupt 15 Port Select 28 4 read-write PORTA Port A group selected for external interrupt 15 0x00000000 PORTB Port B group selected for external interrupt 15 0x00000001 PORTC Port C group selected for external interrupt 15 0x00000002 PORTD Port D group selected for external interrupt 15 0x00000003 PORTE Port E group selected for external interrupt 15 0x00000004 PORTF Port F group selected for external interrupt 15 0x00000005 PORTG Port G group selected for external interrupt 15 0x00000006 PORTH Port H group selected for external interrupt 15 0x00000007 PORTI Port I group selected for external interrupt 15 0x00000008 EXTIPSEL8 External Interrupt 8 Port Select 0 4 read-write PORTA Port A group selected for external interrupt 8 0x00000000 PORTB Port B group selected for external interrupt 8 0x00000001 PORTC Port C group selected for external interrupt 8 0x00000002 PORTD Port D group selected for external interrupt 8 0x00000003 PORTE Port E group selected for external interrupt 8 0x00000004 PORTF Port F group selected for external interrupt 8 0x00000005 PORTG Port G group selected for external interrupt 8 0x00000006 PORTH Port H group selected for external interrupt 8 0x00000007 PORTI Port I group selected for external interrupt 8 0x00000008 EXTIPSEL9 External Interrupt 9 Port Select 4 4 read-write PORTA Port A group selected for external interrupt 9 0x00000000 PORTB Port B group selected for external interrupt 9 0x00000001 PORTC Port C group selected for external interrupt 9 0x00000002 PORTD Port D group selected for external interrupt 9 0x00000003 PORTE Port E group selected for external interrupt 9 0x00000004 PORTF Port F group selected for external interrupt 9 0x00000005 PORTG Port G group selected for external interrupt 9 0x00000006 PORTH Port H group selected for external interrupt 9 0x00000007 PORTI Port I group selected for external interrupt 9 0x00000008 EXTIPSELL External Interrupt Port Select Low Register 0x400 32 read-write n 0x0 0x0 EXTIPSEL0 External Interrupt 0 Port Select 0 4 read-write PORTA Port A group selected for external interrupt 0 0x00000000 PORTB Port B group selected for external interrupt 0 0x00000001 PORTC Port C group selected for external interrupt 0 0x00000002 PORTD Port D group selected for external interrupt 0 0x00000003 PORTE Port E group selected for external interrupt 0 0x00000004 PORTF Port F group selected for external interrupt 0 0x00000005 PORTG Port G group selected for external interrupt 0 0x00000006 PORTH Port H group selected for external interrupt 0 0x00000007 PORTI Port I group selected for external interrupt 0 0x00000008 EXTIPSEL1 External Interrupt 1 Port Select 4 4 read-write PORTA Port A group selected for external interrupt 1 0x00000000 PORTB Port B group selected for external interrupt 1 0x00000001 PORTC Port C group selected for external interrupt 1 0x00000002 PORTD Port D group selected for external interrupt 1 0x00000003 PORTE Port E group selected for external interrupt 1 0x00000004 PORTF Port F group selected for external interrupt 1 0x00000005 PORTG Port G group selected for external interrupt 1 0x00000006 PORTH Port H group selected for external interrupt 1 0x00000007 PORTI Port I group selected for external interrupt 1 0x00000008 EXTIPSEL2 External Interrupt 2 Port Select 8 4 read-write PORTA Port A group selected for external interrupt 2 0x00000000 PORTB Port B group selected for external interrupt 2 0x00000001 PORTC Port C group selected for external interrupt 2 0x00000002 PORTD Port D group selected for external interrupt 2 0x00000003 PORTE Port E group selected for external interrupt 2 0x00000004 PORTF Port F group selected for external interrupt 2 0x00000005 PORTG Port G group selected for external interrupt 2 0x00000006 PORTH Port H group selected for external interrupt 2 0x00000007 PORTI Port I group selected for external interrupt 2 0x00000008 EXTIPSEL3 External Interrupt 3 Port Select 12 4 read-write PORTA Port A group selected for external interrupt 3 0x00000000 PORTB Port B group selected for external interrupt 3 0x00000001 PORTC Port C group selected for external interrupt 3 0x00000002 PORTD Port D group selected for external interrupt 3 0x00000003 PORTE Port E group selected for external interrupt 3 0x00000004 PORTF Port F group selected for external interrupt 3 0x00000005 PORTG Port G group selected for external interrupt 3 0x00000006 PORTH Port H group selected for external interrupt 3 0x00000007 PORTI Port I group selected for external interrupt 3 0x00000008 EXTIPSEL4 External Interrupt 4 Port Select 16 4 read-write PORTA Port A group selected for external interrupt 4 0x00000000 PORTB Port B group selected for external interrupt 4 0x00000001 PORTC Port C group selected for external interrupt 4 0x00000002 PORTD Port D group selected for external interrupt 4 0x00000003 PORTE Port E group selected for external interrupt 4 0x00000004 PORTF Port F group selected for external interrupt 4 0x00000005 PORTG Port G group selected for external interrupt 4 0x00000006 PORTH Port H group selected for external interrupt 4 0x00000007 PORTI Port I group selected for external interrupt 4 0x00000008 EXTIPSEL5 External Interrupt 5 Port Select 20 4 read-write PORTA Port A group selected for external interrupt 5 0x00000000 PORTB Port B group selected for external interrupt 5 0x00000001 PORTC Port C group selected for external interrupt 5 0x00000002 PORTD Port D group selected for external interrupt 5 0x00000003 PORTE Port E group selected for external interrupt 5 0x00000004 PORTF Port F group selected for external interrupt 5 0x00000005 PORTG Port G group selected for external interrupt 5 0x00000006 PORTH Port H group selected for external interrupt 5 0x00000007 PORTI Port I group selected for external interrupt 5 0x00000008 EXTIPSEL6 External Interrupt 6 Port Select 24 4 read-write PORTA Port A group selected for external interrupt 6 0x00000000 PORTB Port B group selected for external interrupt 6 0x00000001 PORTC Port C group selected for external interrupt 6 0x00000002 PORTD Port D group selected for external interrupt 6 0x00000003 PORTE Port E group selected for external interrupt 6 0x00000004 PORTF Port F group selected for external interrupt 6 0x00000005 PORTG Port G group selected for external interrupt 6 0x00000006 PORTH Port H group selected for external interrupt 6 0x00000007 PORTI Port I group selected for external interrupt 6 0x00000008 EXTIPSEL7 External Interrupt 7 Port Select 28 4 read-write PORTA Port A group selected for external interrupt 7 0x00000000 PORTB Port B group selected for external interrupt 7 0x00000001 PORTC Port C group selected for external interrupt 7 0x00000002 PORTD Port D group selected for external interrupt 7 0x00000003 PORTE Port E group selected for external interrupt 7 0x00000004 PORTF Port F group selected for external interrupt 7 0x00000005 PORTG Port G group selected for external interrupt 7 0x00000006 PORTH Port H group selected for external interrupt 7 0x00000007 PORTI Port I group selected for external interrupt 7 0x00000008 EXTIRISE External Interrupt Rising Edge Trigger Register 0x410 32 read-write n 0x0 0x0 EXTIRISE External Interrupt N Rising Edge Trigger Enable 0 16 read-write IEN Interrupt Enable Register 0x428 32 read-write n 0x0 0x0 EM4WU EM4WU Interrupt Enable 16 16 read-write EXT EXT Interrupt Enable 0 16 read-write IF Interrupt Flag Register 0x41C 32 read-only n 0x0 0x0 EM4WU EM4 Wake Up Pin Interrupt Flag 16 16 read-only EXT External Pin Interrupt Flag 0 16 read-only IFC Interrupt Flag Clear Register 0x424 32 write-only n 0x0 0x0 EM4WU Clear EM4WU Interrupt Flag 16 16 write-only EXT Clear EXT Interrupt Flag 0 16 write-only IFS Interrupt Flag Set Register 0x420 32 write-only n 0x0 0x0 EM4WU Set EM4WU Interrupt Flag 16 16 write-only EXT Set EXT Interrupt Flag 0 16 write-only INSENSE Input Sense Register 0x450 32 read-write n 0x0 0x0 EM4WU EM4WU Interrupt Sense Enable 1 1 read-write INT Interrupt Sense Enable 0 1 read-write LOCK Configuration Lock Register 0x454 32 read-write n 0x0 0x0 LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 PA_CTRL Port Control Register 0x0 32 read-write n 0x0 0x0 DINDIS Data in Disable 12 1 read-write DINDISALT Alternate Data in Disable 28 1 read-write DRIVESTRENGTH Drive Strength for Port 0 1 read-write DRIVESTRENGTHALT Alternate Drive Strength for Port 16 1 read-write SLEWRATE Slewrate Limit for Port 4 3 read-write SLEWRATEALT Alternate Slewrate Limit for Port 20 3 read-write PA_DIN Port Data in Register 0x1C 32 read-only n 0x0 0x0 DIN Data in 0 16 read-only PA_DOUT Port Data Out Register 0xC 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PA_DOUTTGL Port Data Out Toggle Register 0x18 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PA_MODEH Port Pin Mode High Register 0x8 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PA_MODEL Port Pin Mode Low Register 0x4 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PA_OVTDIS Over Voltage Disable for All Modes 0x28 32 read-write n 0x0 0x0 OVTDIS Disable Over Voltage Capability 0 16 read-write PA_PINLOCKN Port Unlocked Pins Register 0x20 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PB_CTRL Port Control Register 0x30 32 read-write n 0x0 0x0 DINDIS Data in Disable 12 1 read-write DINDISALT Alternate Data in Disable 28 1 read-write DRIVESTRENGTH Drive Strength for Port 0 1 read-write DRIVESTRENGTHALT Alternate Drive Strength for Port 16 1 read-write SLEWRATE Slewrate Limit for Port 4 3 read-write SLEWRATEALT Alternate Slewrate Limit for Port 20 3 read-write PB_DIN Port Data in Register 0x4C 32 read-only n 0x0 0x0 DIN Data in 0 16 read-only PB_DOUT Port Data Out Register 0x3C 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PB_DOUTTGL Port Data Out Toggle Register 0x48 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PB_MODEH Port Pin Mode High Register 0x38 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PB_MODEL Port Pin Mode Low Register 0x34 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PB_OVTDIS Over Voltage Disable for All Modes 0x58 32 read-write n 0x0 0x0 OVTDIS Disable Over Voltage Capability 0 16 read-write PB_PINLOCKN Port Unlocked Pins Register 0x50 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PC_CTRL Port Control Register 0x60 32 read-write n 0x0 0x0 DINDIS Data in Disable 12 1 read-write DINDISALT Alternate Data in Disable 28 1 read-write DRIVESTRENGTH Drive Strength for Port 0 1 read-write DRIVESTRENGTHALT Alternate Drive Strength for Port 16 1 read-write SLEWRATE Slewrate Limit for Port 4 3 read-write SLEWRATEALT Alternate Slewrate Limit for Port 20 3 read-write PC_DIN Port Data in Register 0x7C 32 read-only n 0x0 0x0 DIN Data in 0 16 read-only PC_DOUT Port Data Out Register 0x6C 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PC_DOUTTGL Port Data Out Toggle Register 0x78 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PC_MODEH Port Pin Mode High Register 0x68 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PC_MODEL Port Pin Mode Low Register 0x64 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PC_OVTDIS Over Voltage Disable for All Modes 0x88 32 read-write n 0x0 0x0 OVTDIS Disable Over Voltage Capability 0 16 read-write PC_PINLOCKN Port Unlocked Pins Register 0x80 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PD_CTRL Port Control Register 0x90 32 read-write n 0x0 0x0 DINDIS Data in Disable 12 1 read-write DINDISALT Alternate Data in Disable 28 1 read-write DRIVESTRENGTH Drive Strength for Port 0 1 read-write DRIVESTRENGTHALT Alternate Drive Strength for Port 16 1 read-write SLEWRATE Slewrate Limit for Port 4 3 read-write SLEWRATEALT Alternate Slewrate Limit for Port 20 3 read-write PD_DIN Port Data in Register 0xAC 32 read-only n 0x0 0x0 DIN Data in 0 16 read-only PD_DOUT Port Data Out Register 0x9C 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PD_DOUTTGL Port Data Out Toggle Register 0xA8 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PD_MODEH Port Pin Mode High Register 0x98 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PD_MODEL Port Pin Mode Low Register 0x94 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PD_OVTDIS Over Voltage Disable for All Modes 0xB8 32 read-write n 0x0 0x0 OVTDIS Disable Over Voltage Capability 0 16 read-write PD_PINLOCKN Port Unlocked Pins Register 0xB0 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PE_CTRL Port Control Register 0xC0 32 read-write n 0x0 0x0 DINDIS Data in Disable 12 1 read-write DINDISALT Alternate Data in Disable 28 1 read-write DRIVESTRENGTH Drive Strength for Port 0 1 read-write DRIVESTRENGTHALT Alternate Drive Strength for Port 16 1 read-write SLEWRATE Slewrate Limit for Port 4 3 read-write SLEWRATEALT Alternate Slewrate Limit for Port 20 3 read-write PE_DIN Port Data in Register 0xDC 32 read-only n 0x0 0x0 DIN Data in 0 16 read-only PE_DOUT Port Data Out Register 0xCC 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PE_DOUTTGL Port Data Out Toggle Register 0xD8 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PE_MODEH Port Pin Mode High Register 0xC8 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PE_MODEL Port Pin Mode Low Register 0xC4 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PE_OVTDIS Over Voltage Disable for All Modes 0xE8 32 read-write n 0x0 0x0 OVTDIS Disable Over Voltage Capability 0 16 read-write PE_PINLOCKN Port Unlocked Pins Register 0xE0 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PF_CTRL Port Control Register 0xF0 32 read-write n 0x0 0x0 DINDIS Data in Disable 12 1 read-write DINDISALT Alternate Data in Disable 28 1 read-write DRIVESTRENGTH Drive Strength for Port 0 1 read-write DRIVESTRENGTHALT Alternate Drive Strength for Port 16 1 read-write SLEWRATE Slewrate Limit for Port 4 3 read-write SLEWRATEALT Alternate Slewrate Limit for Port 20 3 read-write PF_DIN Port Data in Register 0x10C 32 read-only n 0x0 0x0 DIN Data in 0 16 read-only PF_DOUT Port Data Out Register 0xFC 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PF_DOUTTGL Port Data Out Toggle Register 0x108 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PF_MODEH Port Pin Mode High Register 0xF8 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PF_MODEL Port Pin Mode Low Register 0xF4 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PF_OVTDIS Over Voltage Disable for All Modes 0x118 32 read-write n 0x0 0x0 OVTDIS Disable Over Voltage Capability 0 16 read-write PF_PINLOCKN Port Unlocked Pins Register 0x110 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PG_CTRL Port Control Register 0x120 32 read-write n 0x0 0x0 DINDIS Data in Disable 12 1 read-write DINDISALT Alternate Data in Disable 28 1 read-write DRIVESTRENGTH Drive Strength for Port 0 1 read-write DRIVESTRENGTHALT Alternate Drive Strength for Port 16 1 read-write SLEWRATE Slewrate Limit for Port 4 3 read-write SLEWRATEALT Alternate Slewrate Limit for Port 20 3 read-write PG_DIN Port Data in Register 0x13C 32 read-only n 0x0 0x0 DIN Data in 0 16 read-only PG_DOUT Port Data Out Register 0x12C 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PG_DOUTTGL Port Data Out Toggle Register 0x138 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PG_MODEH Port Pin Mode High Register 0x128 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PG_MODEL Port Pin Mode Low Register 0x124 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PG_OVTDIS Over Voltage Disable for All Modes 0x148 32 read-write n 0x0 0x0 OVTDIS Disable Over Voltage Capability 0 16 read-write PG_PINLOCKN Port Unlocked Pins Register 0x140 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PH_CTRL Port Control Register 0x150 32 read-write n 0x0 0x0 DINDIS Data in Disable 12 1 read-write DINDISALT Alternate Data in Disable 28 1 read-write DRIVESTRENGTH Drive Strength for Port 0 1 read-write DRIVESTRENGTHALT Alternate Drive Strength for Port 16 1 read-write SLEWRATE Slewrate Limit for Port 4 3 read-write SLEWRATEALT Alternate Slewrate Limit for Port 20 3 read-write PH_DIN Port Data in Register 0x16C 32 read-only n 0x0 0x0 DIN Data in 0 16 read-only PH_DOUT Port Data Out Register 0x15C 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PH_DOUTTGL Port Data Out Toggle Register 0x168 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PH_MODEH Port Pin Mode High Register 0x158 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PH_MODEL Port Pin Mode Low Register 0x154 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PH_OVTDIS Over Voltage Disable for All Modes 0x178 32 read-write n 0x0 0x0 OVTDIS Disable Over Voltage Capability 0 16 read-write PH_PINLOCKN Port Unlocked Pins Register 0x170 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PI_CTRL Port Control Register 0x180 32 read-write n 0x0 0x0 DINDIS Data in Disable 12 1 read-write DINDISALT Alternate Data in Disable 28 1 read-write DRIVESTRENGTH Drive Strength for Port 0 1 read-write DRIVESTRENGTHALT Alternate Drive Strength for Port 16 1 read-write SLEWRATE Slewrate Limit for Port 4 3 read-write SLEWRATEALT Alternate Slewrate Limit for Port 20 3 read-write PI_DIN Port Data in Register 0x19C 32 read-only n 0x0 0x0 DIN Data in 0 16 read-only PI_DOUT Port Data Out Register 0x18C 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PI_DOUTTGL Port Data Out Toggle Register 0x198 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PI_MODEH Port Pin Mode High Register 0x188 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PI_MODEL Port Pin Mode Low Register 0x184 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PI_OVTDIS Over Voltage Disable for All Modes 0x1A8 32 read-write n 0x0 0x0 OVTDIS Disable Over Voltage Capability 0 16 read-write PI_PINLOCKN Port Unlocked Pins Register 0x1A0 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PJ_CTRL Port Control Register 0x1B0 32 read-write n 0x0 0x0 DINDIS Data in Disable 12 1 read-write DINDISALT Alternate Data in Disable 28 1 read-write DRIVESTRENGTH Drive Strength for Port 0 1 read-write DRIVESTRENGTHALT Alternate Drive Strength for Port 16 1 read-write SLEWRATE Slewrate Limit for Port 4 3 read-write SLEWRATEALT Alternate Slewrate Limit for Port 20 3 read-write PJ_DIN Port Data in Register 0x1CC 32 read-only n 0x0 0x0 DIN Data in 0 16 read-only PJ_DOUT Port Data Out Register 0x1BC 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PJ_DOUTTGL Port Data Out Toggle Register 0x1C8 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PJ_MODEH Port Pin Mode High Register 0x1B8 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PJ_MODEL Port Pin Mode Low Register 0x1B4 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PJ_OVTDIS Over Voltage Disable for All Modes 0x1D8 32 read-write n 0x0 0x0 OVTDIS Disable Over Voltage Capability 0 16 read-write PJ_PINLOCKN Port Unlocked Pins Register 0x1D0 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PK_CTRL Port Control Register 0x1E0 32 read-write n 0x0 0x0 DINDIS Data in Disable 12 1 read-write DINDISALT Alternate Data in Disable 28 1 read-write DRIVESTRENGTH Drive Strength for Port 0 1 read-write DRIVESTRENGTHALT Alternate Drive Strength for Port 16 1 read-write SLEWRATE Slewrate Limit for Port 4 3 read-write SLEWRATEALT Alternate Slewrate Limit for Port 20 3 read-write PK_DIN Port Data in Register 0x1FC 32 read-only n 0x0 0x0 DIN Data in 0 16 read-only PK_DOUT Port Data Out Register 0x1EC 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PK_DOUTTGL Port Data Out Toggle Register 0x1F8 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PK_MODEH Port Pin Mode High Register 0x1E8 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PK_MODEL Port Pin Mode Low Register 0x1E4 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PK_OVTDIS Over Voltage Disable for All Modes 0x208 32 read-write n 0x0 0x0 OVTDIS Disable Over Voltage Capability 0 16 read-write PK_PINLOCKN Port Unlocked Pins Register 0x200 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write PL_CTRL Port Control Register 0x210 32 read-write n 0x0 0x0 DINDIS Data in Disable 12 1 read-write DINDISALT Alternate Data in Disable 28 1 read-write DRIVESTRENGTH Drive Strength for Port 0 1 read-write DRIVESTRENGTHALT Alternate Drive Strength for Port 16 1 read-write SLEWRATE Slewrate Limit for Port 4 3 read-write SLEWRATEALT Alternate Slewrate Limit for Port 20 3 read-write PL_DIN Port Data in Register 0x22C 32 read-only n 0x0 0x0 DIN Data in 0 16 read-only PL_DOUT Port Data Out Register 0x21C 32 read-write n 0x0 0x0 DOUT Data Out 0 16 read-write PL_DOUTTGL Port Data Out Toggle Register 0x228 32 write-only n 0x0 0x0 DOUTTGL Data Out Toggle 0 16 write-only PL_MODEH Port Pin Mode High Register 0x218 32 read-write n 0x0 0x0 MODE10 Pin 10 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE11 Pin 11 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE12 Pin 12 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE13 Pin 13 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE14 Pin 14 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE15 Pin 15 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE8 Pin 8 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE9 Pin 9 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PL_MODEL Port Pin Mode Low Register 0x214 32 read-write n 0x0 0x0 MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE1 Pin 1 Mode 4 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE2 Pin 2 Mode 8 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE3 Pin 3 Mode 12 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE4 Pin 4 Mode 16 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE5 Pin 5 Mode 20 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE6 Pin 6 Mode 24 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE7 Pin 7 Mode 28 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F PL_OVTDIS Over Voltage Disable for All Modes 0x238 32 read-write n 0x0 0x0 OVTDIS Disable Over Voltage Capability 0 16 read-write PL_PINLOCKN Port Unlocked Pins Register 0x230 32 read-write n 0x0 0x0 PINLOCKN Unlocked Pins 0 16 read-write ROUTELOC0 I/O Routing Location Register 0x444 32 read-write n 0x0 0x0 ETMLOC I/O Location 6 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 SWVLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 ROUTEPEN I/O Routing Pin Enable Register 0x440 32 read-write n 0x0 0x0 ETMTCLKPEN ETM Trace Clock Pin Enable 16 1 read-write ETMTD0PEN ETM Trace Data Pin Enable 17 1 read-write ETMTD1PEN ETM Trace Data Pin Enable 18 1 read-write ETMTD2PEN ETM Trace Data Pin Enable 19 1 read-write ETMTD3PEN ETM Trace Data Pin Enable 20 1 read-write SWCLKTCKPEN Serial Wire Clock and JTAG Test Clock Pin Enable 0 1 read-write SWDIOTMSPEN Serial Wire Data and JTAG Test Mode Select Pin Enable 1 1 read-write SWVPEN Serial Wire Viewer Output Pin Enable 4 1 read-write TDIPEN JTAG Test Debug Input Pin Enable 3 1 read-write TDOPEN JTAG Test Debug Output Pin Enable 2 1 read-write I2C0 I2C0 I2C0 0x0 0x0 0x400 registers n I2C0 11 CLKDIV Clock Division Register 0x10 32 read-write n 0x0 0x0 DIV Clock Divider 0 9 read-write CMD Command Register 0x4 32 write-only n 0x0 0x0 ABORT Abort Transmission 5 1 write-only ACK Send ACK 2 1 write-only CLEARPC Clear Pending Commands 7 1 write-only CLEARTX Clear TX 6 1 write-only CONT Continue Transmission 4 1 write-only NACK Send NACK 3 1 write-only START Send Start Condition 0 1 write-only STOP Send Stop Condition 1 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 ARBDIS Arbitration Disable 5 1 read-write AUTOACK Automatic Acknowledge 2 1 read-write AUTOSE Automatic STOP When Empty 3 1 read-write AUTOSN Automatic STOP on NACK 4 1 read-write BITO Bus Idle Timeout 12 2 read-write OFF Timeout disabled 0x00000000 40PCC Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. 0x00000001 80PCC Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. 0x00000002 160PCC Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. 0x00000003 CLHR Clock Low High Ratio 8 2 read-write STANDARD The ratio between low period and high period counters (Nlow:Nhigh) is 4:4 0x00000000 ASYMMETRIC The ratio between low period and high period counters (Nlow:Nhigh) is 6:3 0x00000001 FAST The ratio between low period and high period counters (Nlow:Nhigh) is 11:6 0x00000002 CLTO Clock Low Timeout 16 3 read-write OFF Timeout disabled 0x00000000 40PCC Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. 0x00000001 80PCC Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. 0x00000002 160PCC Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. 0x00000003 320PCC Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout. 0x00000004 1024PCC Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout. 0x00000005 EN I2C Enable 0 1 read-write GCAMEN General Call Address Match Enable 6 1 read-write GIBITO Go Idle on Bus Idle Timeout 15 1 read-write SLAVE Addressable as Slave 1 1 read-write TXBIL TX Buffer Interrupt Level 7 1 read-write IEN Interrupt Enable Register 0x40 32 read-write n 0x0 0x0 ACK ACK Interrupt Enable 6 1 read-write ADDR ADDR Interrupt Enable 2 1 read-write ARBLOST ARBLOST Interrupt Enable 9 1 read-write BITO BITO Interrupt Enable 14 1 read-write BUSERR BUSERR Interrupt Enable 10 1 read-write BUSHOLD BUSHOLD Interrupt Enable 11 1 read-write CLERR CLERR Interrupt Enable 18 1 read-write CLTO CLTO Interrupt Enable 15 1 read-write MSTOP MSTOP Interrupt Enable 8 1 read-write NACK NACK Interrupt Enable 7 1 read-write RSTART RSTART Interrupt Enable 1 1 read-write RXDATAV RXDATAV Interrupt Enable 5 1 read-write RXFULL RXFULL Interrupt Enable 17 1 read-write RXUF RXUF Interrupt Enable 13 1 read-write SSTOP SSTOP Interrupt Enable 16 1 read-write START START Interrupt Enable 0 1 read-write TXBL TXBL Interrupt Enable 4 1 read-write TXC TXC Interrupt Enable 3 1 read-write TXOF TXOF Interrupt Enable 12 1 read-write IF Interrupt Flag Register 0x34 32 read-only n 0x0 0x0 ACK Acknowledge Received Interrupt Flag 6 1 read-only ADDR Address Interrupt Flag 2 1 read-only ARBLOST Arbitration Lost Interrupt Flag 9 1 read-only BITO Bus Idle Timeout Interrupt Flag 14 1 read-only BUSERR Bus Error Interrupt Flag 10 1 read-only BUSHOLD Bus Held Interrupt Flag 11 1 read-only CLERR Clock Low Error Interrupt Flag 18 1 read-only CLTO Clock Low Timeout Interrupt Flag 15 1 read-only MSTOP Master STOP Condition Interrupt Flag 8 1 read-only NACK Not Acknowledge Received Interrupt Flag 7 1 read-only RSTART Repeated START Condition Interrupt Flag 1 1 read-only RXDATAV Receive Data Valid Interrupt Flag 5 1 read-only RXFULL Receive Buffer Full Interrupt Flag 17 1 read-only RXUF Receive Buffer Underflow Interrupt Flag 13 1 read-only SSTOP Slave STOP Condition Interrupt Flag 16 1 read-only START START Condition Interrupt Flag 0 1 read-only TXBL Transmit Buffer Level Interrupt Flag 4 1 read-only TXC Transfer Completed Interrupt Flag 3 1 read-only TXOF Transmit Buffer Overflow Interrupt Flag 12 1 read-only IFC Interrupt Flag Clear Register 0x3C 32 write-only n 0x0 0x0 ACK Clear ACK Interrupt Flag 6 1 write-only ADDR Clear ADDR Interrupt Flag 2 1 write-only ARBLOST Clear ARBLOST Interrupt Flag 9 1 write-only BITO Clear BITO Interrupt Flag 14 1 write-only BUSERR Clear BUSERR Interrupt Flag 10 1 write-only BUSHOLD Clear BUSHOLD Interrupt Flag 11 1 write-only CLERR Clear CLERR Interrupt Flag 18 1 write-only CLTO Clear CLTO Interrupt Flag 15 1 write-only MSTOP Clear MSTOP Interrupt Flag 8 1 write-only NACK Clear NACK Interrupt Flag 7 1 write-only RSTART Clear RSTART Interrupt Flag 1 1 write-only RXFULL Clear RXFULL Interrupt Flag 17 1 write-only RXUF Clear RXUF Interrupt Flag 13 1 write-only SSTOP Clear SSTOP Interrupt Flag 16 1 write-only START Clear START Interrupt Flag 0 1 write-only TXC Clear TXC Interrupt Flag 3 1 write-only TXOF Clear TXOF Interrupt Flag 12 1 write-only IFS Interrupt Flag Set Register 0x38 32 write-only n 0x0 0x0 ACK Set ACK Interrupt Flag 6 1 write-only ADDR Set ADDR Interrupt Flag 2 1 write-only ARBLOST Set ARBLOST Interrupt Flag 9 1 write-only BITO Set BITO Interrupt Flag 14 1 write-only BUSERR Set BUSERR Interrupt Flag 10 1 write-only BUSHOLD Set BUSHOLD Interrupt Flag 11 1 write-only CLERR Set CLERR Interrupt Flag 18 1 write-only CLTO Set CLTO Interrupt Flag 15 1 write-only MSTOP Set MSTOP Interrupt Flag 8 1 write-only NACK Set NACK Interrupt Flag 7 1 write-only RSTART Set RSTART Interrupt Flag 1 1 write-only RXFULL Set RXFULL Interrupt Flag 17 1 write-only RXUF Set RXUF Interrupt Flag 13 1 write-only SSTOP Set SSTOP Interrupt Flag 16 1 write-only START Set START Interrupt Flag 0 1 write-only TXC Set TXC Interrupt Flag 3 1 write-only TXOF Set TXOF Interrupt Flag 12 1 write-only ROUTELOC0 I/O Routing Location Register 0x48 32 read-write n 0x0 0x0 SCLLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 SDALOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTEPEN I/O Routing Pin Enable Register 0x44 32 read-write n 0x0 0x0 SCLPEN SCL Pin Enable 1 1 read-write SDAPEN SDA Pin Enable 0 1 read-write RXDATA Receive Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAP Receive Buffer Data Peek Register 0x24 32 read-only n 0x0 0x0 RXDATAP RX Data Peek 0 8 read-only RXDOUBLE Receive Buffer Double Data Register 0x20 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEP Receive Buffer Double Data Peek Register 0x28 32 read-only n 0x0 0x0 RXDATAP0 RX Data 0 Peek 0 8 read-only RXDATAP1 RX Data 1 Peek 8 8 read-only SADDR Slave Address Register 0x14 32 read-write n 0x0 0x0 ADDR Slave Address 1 7 read-write SADDRMASK Slave Address Mask Register 0x18 32 read-write n 0x0 0x0 MASK Slave Address Mask 1 7 read-write STATE State Register 0x8 32 read-only n 0x0 0x0 BUSHOLD Bus Held 4 1 read-only BUSY Bus Busy 0 1 read-only MASTER Master 1 1 read-only NACKED Nack Received 3 1 read-only STATE Transmission State 5 3 read-only IDLE No transmission is being performed. 0x00000000 WAIT Waiting for idle. Will send a start condition as soon as the bus is idle. 0x00000001 START Start transmitted or received 0x00000002 ADDR Address transmitted or received 0x00000003 ADDRACK Address ack/nack transmitted or received 0x00000004 DATA Data transmitted or received 0x00000005 DATAACK Data ack/nack transmitted or received 0x00000006 TRANSMITTER Transmitter 2 1 read-only STATUS Status Register 0xC 32 read-only n 0x0 0x0 PABORT Pending Abort 5 1 read-only PACK Pending ACK 2 1 read-only PCONT Pending Continue 4 1 read-only PNACK Pending NACK 3 1 read-only PSTART Pending START 0 1 read-only PSTOP Pending STOP 1 1 read-only RXDATAV RX Data Valid 8 1 read-only RXFULL RX FIFO Full 9 1 read-only TXBL TX Buffer Level 7 1 read-only TXC TX Complete 6 1 read-only TXDATA Transmit Buffer Data Register 0x2C 32 read-write n 0x0 0x0 TXDATA TX Data 0 8 read-write TXDOUBLE Transmit Buffer Double Data Register 0x30 32 read-write n 0x0 0x0 TXDATA0 TX Data 0 8 read-write TXDATA1 TX Data 8 8 read-write I2C1 I2C1 I2C1 0x0 0x0 0x400 registers n I2C1 12 CLKDIV Clock Division Register 0x10 32 read-write n 0x0 0x0 DIV Clock Divider 0 9 read-write CMD Command Register 0x4 32 write-only n 0x0 0x0 ABORT Abort Transmission 5 1 write-only ACK Send ACK 2 1 write-only CLEARPC Clear Pending Commands 7 1 write-only CLEARTX Clear TX 6 1 write-only CONT Continue Transmission 4 1 write-only NACK Send NACK 3 1 write-only START Send Start Condition 0 1 write-only STOP Send Stop Condition 1 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 ARBDIS Arbitration Disable 5 1 read-write AUTOACK Automatic Acknowledge 2 1 read-write AUTOSE Automatic STOP When Empty 3 1 read-write AUTOSN Automatic STOP on NACK 4 1 read-write BITO Bus Idle Timeout 12 2 read-write OFF Timeout disabled 0x00000000 40PCC Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. 0x00000001 80PCC Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. 0x00000002 160PCC Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. 0x00000003 CLHR Clock Low High Ratio 8 2 read-write STANDARD The ratio between low period and high period counters (Nlow:Nhigh) is 4:4 0x00000000 ASYMMETRIC The ratio between low period and high period counters (Nlow:Nhigh) is 6:3 0x00000001 FAST The ratio between low period and high period counters (Nlow:Nhigh) is 11:6 0x00000002 CLTO Clock Low Timeout 16 3 read-write OFF Timeout disabled 0x00000000 40PCC Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. 0x00000001 80PCC Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. 0x00000002 160PCC Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. 0x00000003 320PCC Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout. 0x00000004 1024PCC Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout. 0x00000005 EN I2C Enable 0 1 read-write GCAMEN General Call Address Match Enable 6 1 read-write GIBITO Go Idle on Bus Idle Timeout 15 1 read-write SLAVE Addressable as Slave 1 1 read-write TXBIL TX Buffer Interrupt Level 7 1 read-write IEN Interrupt Enable Register 0x40 32 read-write n 0x0 0x0 ACK ACK Interrupt Enable 6 1 read-write ADDR ADDR Interrupt Enable 2 1 read-write ARBLOST ARBLOST Interrupt Enable 9 1 read-write BITO BITO Interrupt Enable 14 1 read-write BUSERR BUSERR Interrupt Enable 10 1 read-write BUSHOLD BUSHOLD Interrupt Enable 11 1 read-write CLERR CLERR Interrupt Enable 18 1 read-write CLTO CLTO Interrupt Enable 15 1 read-write MSTOP MSTOP Interrupt Enable 8 1 read-write NACK NACK Interrupt Enable 7 1 read-write RSTART RSTART Interrupt Enable 1 1 read-write RXDATAV RXDATAV Interrupt Enable 5 1 read-write RXFULL RXFULL Interrupt Enable 17 1 read-write RXUF RXUF Interrupt Enable 13 1 read-write SSTOP SSTOP Interrupt Enable 16 1 read-write START START Interrupt Enable 0 1 read-write TXBL TXBL Interrupt Enable 4 1 read-write TXC TXC Interrupt Enable 3 1 read-write TXOF TXOF Interrupt Enable 12 1 read-write IF Interrupt Flag Register 0x34 32 read-only n 0x0 0x0 ACK Acknowledge Received Interrupt Flag 6 1 read-only ADDR Address Interrupt Flag 2 1 read-only ARBLOST Arbitration Lost Interrupt Flag 9 1 read-only BITO Bus Idle Timeout Interrupt Flag 14 1 read-only BUSERR Bus Error Interrupt Flag 10 1 read-only BUSHOLD Bus Held Interrupt Flag 11 1 read-only CLERR Clock Low Error Interrupt Flag 18 1 read-only CLTO Clock Low Timeout Interrupt Flag 15 1 read-only MSTOP Master STOP Condition Interrupt Flag 8 1 read-only NACK Not Acknowledge Received Interrupt Flag 7 1 read-only RSTART Repeated START Condition Interrupt Flag 1 1 read-only RXDATAV Receive Data Valid Interrupt Flag 5 1 read-only RXFULL Receive Buffer Full Interrupt Flag 17 1 read-only RXUF Receive Buffer Underflow Interrupt Flag 13 1 read-only SSTOP Slave STOP Condition Interrupt Flag 16 1 read-only START START Condition Interrupt Flag 0 1 read-only TXBL Transmit Buffer Level Interrupt Flag 4 1 read-only TXC Transfer Completed Interrupt Flag 3 1 read-only TXOF Transmit Buffer Overflow Interrupt Flag 12 1 read-only IFC Interrupt Flag Clear Register 0x3C 32 write-only n 0x0 0x0 ACK Clear ACK Interrupt Flag 6 1 write-only ADDR Clear ADDR Interrupt Flag 2 1 write-only ARBLOST Clear ARBLOST Interrupt Flag 9 1 write-only BITO Clear BITO Interrupt Flag 14 1 write-only BUSERR Clear BUSERR Interrupt Flag 10 1 write-only BUSHOLD Clear BUSHOLD Interrupt Flag 11 1 write-only CLERR Clear CLERR Interrupt Flag 18 1 write-only CLTO Clear CLTO Interrupt Flag 15 1 write-only MSTOP Clear MSTOP Interrupt Flag 8 1 write-only NACK Clear NACK Interrupt Flag 7 1 write-only RSTART Clear RSTART Interrupt Flag 1 1 write-only RXFULL Clear RXFULL Interrupt Flag 17 1 write-only RXUF Clear RXUF Interrupt Flag 13 1 write-only SSTOP Clear SSTOP Interrupt Flag 16 1 write-only START Clear START Interrupt Flag 0 1 write-only TXC Clear TXC Interrupt Flag 3 1 write-only TXOF Clear TXOF Interrupt Flag 12 1 write-only IFS Interrupt Flag Set Register 0x38 32 write-only n 0x0 0x0 ACK Set ACK Interrupt Flag 6 1 write-only ADDR Set ADDR Interrupt Flag 2 1 write-only ARBLOST Set ARBLOST Interrupt Flag 9 1 write-only BITO Set BITO Interrupt Flag 14 1 write-only BUSERR Set BUSERR Interrupt Flag 10 1 write-only BUSHOLD Set BUSHOLD Interrupt Flag 11 1 write-only CLERR Set CLERR Interrupt Flag 18 1 write-only CLTO Set CLTO Interrupt Flag 15 1 write-only MSTOP Set MSTOP Interrupt Flag 8 1 write-only NACK Set NACK Interrupt Flag 7 1 write-only RSTART Set RSTART Interrupt Flag 1 1 write-only RXFULL Set RXFULL Interrupt Flag 17 1 write-only RXUF Set RXUF Interrupt Flag 13 1 write-only SSTOP Set SSTOP Interrupt Flag 16 1 write-only START Set START Interrupt Flag 0 1 write-only TXC Set TXC Interrupt Flag 3 1 write-only TXOF Set TXOF Interrupt Flag 12 1 write-only ROUTELOC0 I/O Routing Location Register 0x48 32 read-write n 0x0 0x0 SCLLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 SDALOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTEPEN I/O Routing Pin Enable Register 0x44 32 read-write n 0x0 0x0 SCLPEN SCL Pin Enable 1 1 read-write SDAPEN SDA Pin Enable 0 1 read-write RXDATA Receive Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAP Receive Buffer Data Peek Register 0x24 32 read-only n 0x0 0x0 RXDATAP RX Data Peek 0 8 read-only RXDOUBLE Receive Buffer Double Data Register 0x20 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEP Receive Buffer Double Data Peek Register 0x28 32 read-only n 0x0 0x0 RXDATAP0 RX Data 0 Peek 0 8 read-only RXDATAP1 RX Data 1 Peek 8 8 read-only SADDR Slave Address Register 0x14 32 read-write n 0x0 0x0 ADDR Slave Address 1 7 read-write SADDRMASK Slave Address Mask Register 0x18 32 read-write n 0x0 0x0 MASK Slave Address Mask 1 7 read-write STATE State Register 0x8 32 read-only n 0x0 0x0 BUSHOLD Bus Held 4 1 read-only BUSY Bus Busy 0 1 read-only MASTER Master 1 1 read-only NACKED Nack Received 3 1 read-only STATE Transmission State 5 3 read-only IDLE No transmission is being performed. 0x00000000 WAIT Waiting for idle. Will send a start condition as soon as the bus is idle. 0x00000001 START Start transmitted or received 0x00000002 ADDR Address transmitted or received 0x00000003 ADDRACK Address ack/nack transmitted or received 0x00000004 DATA Data transmitted or received 0x00000005 DATAACK Data ack/nack transmitted or received 0x00000006 TRANSMITTER Transmitter 2 1 read-only STATUS Status Register 0xC 32 read-only n 0x0 0x0 PABORT Pending Abort 5 1 read-only PACK Pending ACK 2 1 read-only PCONT Pending Continue 4 1 read-only PNACK Pending NACK 3 1 read-only PSTART Pending START 0 1 read-only PSTOP Pending STOP 1 1 read-only RXDATAV RX Data Valid 8 1 read-only RXFULL RX FIFO Full 9 1 read-only TXBL TX Buffer Level 7 1 read-only TXC TX Complete 6 1 read-only TXDATA Transmit Buffer Data Register 0x2C 32 read-write n 0x0 0x0 TXDATA TX Data 0 8 read-write TXDOUBLE Transmit Buffer Double Data Register 0x30 32 read-write n 0x0 0x0 TXDATA0 TX Data 0 8 read-write TXDATA1 TX Data 8 8 read-write I2C2 I2C2 I2C2 0x0 0x0 0x400 registers n I2C2 45 CLKDIV Clock Division Register 0x10 32 read-write n 0x0 0x0 DIV Clock Divider 0 9 read-write CMD Command Register 0x4 32 write-only n 0x0 0x0 ABORT Abort Transmission 5 1 write-only ACK Send ACK 2 1 write-only CLEARPC Clear Pending Commands 7 1 write-only CLEARTX Clear TX 6 1 write-only CONT Continue Transmission 4 1 write-only NACK Send NACK 3 1 write-only START Send Start Condition 0 1 write-only STOP Send Stop Condition 1 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 ARBDIS Arbitration Disable 5 1 read-write AUTOACK Automatic Acknowledge 2 1 read-write AUTOSE Automatic STOP When Empty 3 1 read-write AUTOSN Automatic STOP on NACK 4 1 read-write BITO Bus Idle Timeout 12 2 read-write OFF Timeout disabled 0x00000000 40PCC Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. 0x00000001 80PCC Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. 0x00000002 160PCC Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. 0x00000003 CLHR Clock Low High Ratio 8 2 read-write STANDARD The ratio between low period and high period counters (Nlow:Nhigh) is 4:4 0x00000000 ASYMMETRIC The ratio between low period and high period counters (Nlow:Nhigh) is 6:3 0x00000001 FAST The ratio between low period and high period counters (Nlow:Nhigh) is 11:6 0x00000002 CLTO Clock Low Timeout 16 3 read-write OFF Timeout disabled 0x00000000 40PCC Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. 0x00000001 80PCC Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. 0x00000002 160PCC Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. 0x00000003 320PCC Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout. 0x00000004 1024PCC Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout. 0x00000005 EN I2C Enable 0 1 read-write GCAMEN General Call Address Match Enable 6 1 read-write GIBITO Go Idle on Bus Idle Timeout 15 1 read-write SLAVE Addressable as Slave 1 1 read-write TXBIL TX Buffer Interrupt Level 7 1 read-write IEN Interrupt Enable Register 0x40 32 read-write n 0x0 0x0 ACK ACK Interrupt Enable 6 1 read-write ADDR ADDR Interrupt Enable 2 1 read-write ARBLOST ARBLOST Interrupt Enable 9 1 read-write BITO BITO Interrupt Enable 14 1 read-write BUSERR BUSERR Interrupt Enable 10 1 read-write BUSHOLD BUSHOLD Interrupt Enable 11 1 read-write CLERR CLERR Interrupt Enable 18 1 read-write CLTO CLTO Interrupt Enable 15 1 read-write MSTOP MSTOP Interrupt Enable 8 1 read-write NACK NACK Interrupt Enable 7 1 read-write RSTART RSTART Interrupt Enable 1 1 read-write RXDATAV RXDATAV Interrupt Enable 5 1 read-write RXFULL RXFULL Interrupt Enable 17 1 read-write RXUF RXUF Interrupt Enable 13 1 read-write SSTOP SSTOP Interrupt Enable 16 1 read-write START START Interrupt Enable 0 1 read-write TXBL TXBL Interrupt Enable 4 1 read-write TXC TXC Interrupt Enable 3 1 read-write TXOF TXOF Interrupt Enable 12 1 read-write IF Interrupt Flag Register 0x34 32 read-only n 0x0 0x0 ACK Acknowledge Received Interrupt Flag 6 1 read-only ADDR Address Interrupt Flag 2 1 read-only ARBLOST Arbitration Lost Interrupt Flag 9 1 read-only BITO Bus Idle Timeout Interrupt Flag 14 1 read-only BUSERR Bus Error Interrupt Flag 10 1 read-only BUSHOLD Bus Held Interrupt Flag 11 1 read-only CLERR Clock Low Error Interrupt Flag 18 1 read-only CLTO Clock Low Timeout Interrupt Flag 15 1 read-only MSTOP Master STOP Condition Interrupt Flag 8 1 read-only NACK Not Acknowledge Received Interrupt Flag 7 1 read-only RSTART Repeated START Condition Interrupt Flag 1 1 read-only RXDATAV Receive Data Valid Interrupt Flag 5 1 read-only RXFULL Receive Buffer Full Interrupt Flag 17 1 read-only RXUF Receive Buffer Underflow Interrupt Flag 13 1 read-only SSTOP Slave STOP Condition Interrupt Flag 16 1 read-only START START Condition Interrupt Flag 0 1 read-only TXBL Transmit Buffer Level Interrupt Flag 4 1 read-only TXC Transfer Completed Interrupt Flag 3 1 read-only TXOF Transmit Buffer Overflow Interrupt Flag 12 1 read-only IFC Interrupt Flag Clear Register 0x3C 32 write-only n 0x0 0x0 ACK Clear ACK Interrupt Flag 6 1 write-only ADDR Clear ADDR Interrupt Flag 2 1 write-only ARBLOST Clear ARBLOST Interrupt Flag 9 1 write-only BITO Clear BITO Interrupt Flag 14 1 write-only BUSERR Clear BUSERR Interrupt Flag 10 1 write-only BUSHOLD Clear BUSHOLD Interrupt Flag 11 1 write-only CLERR Clear CLERR Interrupt Flag 18 1 write-only CLTO Clear CLTO Interrupt Flag 15 1 write-only MSTOP Clear MSTOP Interrupt Flag 8 1 write-only NACK Clear NACK Interrupt Flag 7 1 write-only RSTART Clear RSTART Interrupt Flag 1 1 write-only RXFULL Clear RXFULL Interrupt Flag 17 1 write-only RXUF Clear RXUF Interrupt Flag 13 1 write-only SSTOP Clear SSTOP Interrupt Flag 16 1 write-only START Clear START Interrupt Flag 0 1 write-only TXC Clear TXC Interrupt Flag 3 1 write-only TXOF Clear TXOF Interrupt Flag 12 1 write-only IFS Interrupt Flag Set Register 0x38 32 write-only n 0x0 0x0 ACK Set ACK Interrupt Flag 6 1 write-only ADDR Set ADDR Interrupt Flag 2 1 write-only ARBLOST Set ARBLOST Interrupt Flag 9 1 write-only BITO Set BITO Interrupt Flag 14 1 write-only BUSERR Set BUSERR Interrupt Flag 10 1 write-only BUSHOLD Set BUSHOLD Interrupt Flag 11 1 write-only CLERR Set CLERR Interrupt Flag 18 1 write-only CLTO Set CLTO Interrupt Flag 15 1 write-only MSTOP Set MSTOP Interrupt Flag 8 1 write-only NACK Set NACK Interrupt Flag 7 1 write-only RSTART Set RSTART Interrupt Flag 1 1 write-only RXFULL Set RXFULL Interrupt Flag 17 1 write-only RXUF Set RXUF Interrupt Flag 13 1 write-only SSTOP Set SSTOP Interrupt Flag 16 1 write-only START Set START Interrupt Flag 0 1 write-only TXC Set TXC Interrupt Flag 3 1 write-only TXOF Set TXOF Interrupt Flag 12 1 write-only ROUTELOC0 I/O Routing Location Register 0x48 32 read-write n 0x0 0x0 SCLLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 SDALOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTEPEN I/O Routing Pin Enable Register 0x44 32 read-write n 0x0 0x0 SCLPEN SCL Pin Enable 1 1 read-write SDAPEN SDA Pin Enable 0 1 read-write RXDATA Receive Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAP Receive Buffer Data Peek Register 0x24 32 read-only n 0x0 0x0 RXDATAP RX Data Peek 0 8 read-only RXDOUBLE Receive Buffer Double Data Register 0x20 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEP Receive Buffer Double Data Peek Register 0x28 32 read-only n 0x0 0x0 RXDATAP0 RX Data 0 Peek 0 8 read-only RXDATAP1 RX Data 1 Peek 8 8 read-only SADDR Slave Address Register 0x14 32 read-write n 0x0 0x0 ADDR Slave Address 1 7 read-write SADDRMASK Slave Address Mask Register 0x18 32 read-write n 0x0 0x0 MASK Slave Address Mask 1 7 read-write STATE State Register 0x8 32 read-only n 0x0 0x0 BUSHOLD Bus Held 4 1 read-only BUSY Bus Busy 0 1 read-only MASTER Master 1 1 read-only NACKED Nack Received 3 1 read-only STATE Transmission State 5 3 read-only IDLE No transmission is being performed. 0x00000000 WAIT Waiting for idle. Will send a start condition as soon as the bus is idle. 0x00000001 START Start transmitted or received 0x00000002 ADDR Address transmitted or received 0x00000003 ADDRACK Address ack/nack transmitted or received 0x00000004 DATA Data transmitted or received 0x00000005 DATAACK Data ack/nack transmitted or received 0x00000006 TRANSMITTER Transmitter 2 1 read-only STATUS Status Register 0xC 32 read-only n 0x0 0x0 PABORT Pending Abort 5 1 read-only PACK Pending ACK 2 1 read-only PCONT Pending Continue 4 1 read-only PNACK Pending NACK 3 1 read-only PSTART Pending START 0 1 read-only PSTOP Pending STOP 1 1 read-only RXDATAV RX Data Valid 8 1 read-only RXFULL RX FIFO Full 9 1 read-only TXBL TX Buffer Level 7 1 read-only TXC TX Complete 6 1 read-only TXDATA Transmit Buffer Data Register 0x2C 32 read-write n 0x0 0x0 TXDATA TX Data 0 8 read-write TXDOUBLE Transmit Buffer Double Data Register 0x30 32 read-write n 0x0 0x0 TXDATA0 TX Data 0 8 read-write TXDATA1 TX Data 8 8 read-write IDAC0 IDAC0 IDAC0 0x0 0x0 0x400 registers n IDAC0 10 APORTCONFLICT APORT Request Status Register 0x38 32 read-only n 0x0 0x0 APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral 3 1 read-only APORTREQ APORT Request Status Register 0x34 32 read-only n 0x0 0x0 APORT1XREQ 1 If the APORT Bus Connected to APORT1X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1Y is Requested 3 1 read-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 APORTMASTERDIS APORT Bus Master Disable 14 1 read-write APORTOUTEN APORT Output Enable 3 1 read-write APORTOUTENPRS PRS Controlled APORT Output Enable 16 1 read-write APORTOUTSEL APORT Output Select 4 8 read-write APORT1XCH0 APORT1X Channel 0 0x00000020 APORT1YCH1 APORT1Y Channel 1 0x00000021 APORT1XCH2 APORT1X Channel 2 0x00000022 APORT1YCH3 APORT1Y Channel 3 0x00000023 APORT1XCH4 APORT1X Channel 4 0x00000024 APORT1YCH5 APORT1Y Channel 5 0x00000025 APORT1XCH6 APORT1X Channel 6 0x00000026 APORT1YCH7 APORT1Y Channel 7 0x00000027 APORT1XCH8 APORT1X Channel 8 0x00000028 APORT1YCH9 APORT1Y Channel 9 0x00000029 APORT1XCH10 APORT1X Channel 10 0x0000002A APORT1YCH11 APORT1Y Channel 11 0x0000002B APORT1XCH12 APORT1X Channel 12 0x0000002C APORT1YCH13 APORT1Y Channel 13 0x0000002D APORT1XCH14 APORT1X Channel 14 0x0000002E APORT1YCH15 APORT1Y Channel 15 0x0000002F APORT1XCH16 APORT1X Channel 16 0x00000030 APORT1YCH17 APORT1Y Channel 17 0x00000031 APORT1XCH18 APORT1X Channel 18 0x00000032 APORT1YCH19 APORT1Y Channel 19 0x00000033 APORT1XCH20 APORT1X Channel 20 0x00000034 APORT1YCH21 APORT1Y Channel 21 0x00000035 APORT1XCH22 APORT1X Channel 22 0x00000036 APORT1YCH23 APORT1Y Channel 23 0x00000037 APORT1XCH24 APORT1X Channel 24 0x00000038 APORT1YCH25 APORT1Y Channel 25 0x00000039 APORT1XCH26 APORT1X Channel 26 0x0000003A APORT1YCH27 APORT1Y Channel 27 0x0000003B APORT1XCH28 APORT1X Channel 28 0x0000003C APORT1YCH29 APORT1Y Channel 29 0x0000003D APORT1XCH30 APORT1X Channel 30 0x0000003E APORT1YCH31 APORT1Y Channel 31 0x0000003F CURSINK Current Sink Enable 1 1 read-write EM2DELAY EM2 Delay 13 1 read-write EN Current DAC Enable 0 1 read-write MAINOUTEN Output Enable 18 1 read-write MAINOUTENPRS PRS Controlled Main Pad Output Enable 19 1 read-write MINOUTTRANS Minimum Output Transition Enable 2 1 read-write PRSSEL IDAC Output Enable PRS Channel Select 20 5 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B PRSCH12 PRS Channel 12 selected. 0x0000000C PRSCH13 PRS Channel 13 selected. 0x0000000D PRSCH14 PRS Channel 14 selected. 0x0000000E PRSCH15 PRS Channel 15 selected. 0x0000000F PRSCH16 PRS Channel 16 selected. 0x00000010 PRSCH17 PRS Channel 17 selected. 0x00000011 PRSCH18 PRS Channel 18 selected. 0x00000012 PRSCH19 PRS Channel 19 selected. 0x00000013 PRSCH20 PRS Channel 20 selected. 0x00000014 PRSCH21 PRS Channel 21 selected. 0x00000015 PRSCH22 PRS Channel 22 selected. 0x00000016 PRSCH23 PRS Channel 23 selected. 0x00000017 PWRSEL Power Select 12 1 read-write CURPROG Current Programming Register 0x4 32 read-write n 0x0 0x0 RANGESEL Current Range Select 0 2 read-write RANGE0 Current range set to 0 - 1.6 uA. 0x00000000 RANGE1 Current range set to 1.6 - 4.7 uA. 0x00000001 RANGE2 Current range set to 0.5 - 16 uA. 0x00000002 RANGE3 Current range set to 2 - 64 uA. 0x00000003 STEPSEL Current Step Size Select 8 5 read-write TUNING Tune the Current to Given Accuracy 16 8 read-write DUTYCONFIG Duty Cycle Configuration Register 0xC 32 read-write n 0x0 0x0 EM2DUTYCYCLEDIS Duty Cycle Enable 1 1 read-write IEN Interrupt Enable Register 0x2C 32 read-write n 0x0 0x0 APORTCONFLICT APORTCONFLICT Interrupt Enable 1 1 read-write CURSTABLE CURSTABLE Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0x20 32 read-only n 0x0 0x0 APORTCONFLICT APORT Conflict Interrupt Flag 1 1 read-only CURSTABLE Edge Triggered Interrupt Flag 0 1 read-only IFC Interrupt Flag Clear Register 0x28 32 write-only n 0x0 0x0 APORTCONFLICT Clear APORTCONFLICT Interrupt Flag 1 1 write-only CURSTABLE Clear CURSTABLE Interrupt Flag 0 1 write-only IFS Interrupt Flag Set Register 0x24 32 write-only n 0x0 0x0 APORTCONFLICT Set APORTCONFLICT Interrupt Flag 1 1 write-only CURSTABLE Set CURSTABLE Interrupt Flag 0 1 write-only STATUS Status Register 0x18 32 read-only n 0x0 0x0 APORTCONFLICT APORT Conflict Output 1 1 read-only CURSTABLE IDAC Output Current Stable 0 1 read-only LCD LCD LCD 0x0 0x0 0x400 registers n LCD 57 AREGA Animation Register a 0x14 32 read-write n 0x0 0x0 AREGA Animation Register a Data 0 8 read-write AREGB Animation Register B 0x18 32 read-write n 0x0 0x0 AREGB Animation Register B Data 0 8 read-write BACTRL Blink and Animation Control Register 0xC 32 read-write n 0x0 0x0 AEN Animation Enable 2 1 read-write ALOC Animation Location 28 1 read-write ALOGSEL Animate Logic Function Select 7 1 read-write AREGASC Animate Register a Shift Control 3 2 read-write NOSHIFT No Shift operation on Animation Register A 0x00000000 SHIFTLEFT Animation Register A is shifted left 0x00000001 SHIFTRIGHT Animation Register A is shifted right 0x00000002 AREGBSC Animate Register B Shift Control 5 2 read-write NOSHIFT No Shift operation on Animation Register B 0x00000000 SHIFTLEFT Animation Register B is shifted left 0x00000001 SHIFTRIGHT Animation Register B is shifted right 0x00000002 BLANK Blank Display 1 1 read-write BLINKEN Blink Enable 0 1 read-write FCEN Frame Counter Enable 8 1 read-write FCPRESC Frame Counter Prescaler 16 2 read-write DIV1 CLKFC = CLKFRAME / 1 0x00000000 DIV2 CLKFC = CLKFRAME / 2 0x00000001 DIV4 CLKFC = CLKFRAME / 4 0x00000002 DIV8 CLKFC = CLKFRAME / 8 0x00000003 FCTOP Frame Counter Top Value 18 6 read-write BIASCTRL Analog BIAS Control 0x30 32 read-write n 0x0 0x0 BUFBIAS Buffer Bias Setting 10 3 read-write BUFDRV Buffer Drive Strength 4 4 read-write SPEED SPEED Adjustment 0 3 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 DSC Direct Segment Control 23 1 read-write EN LCD Enable 0 1 read-write UDCTRL Update Data Control 1 2 read-write REGULAR The data transfer is controlled by SW. Transfer is performed as soon as possible 0x00000000 FCEVENT The data transfer is done at the next event triggered by the Frame Counter 0x00000001 FRAMESTART The data transfer is done continuously at every LCD frame start 0x00000002 DISPCTRL Display Control Register 0x4 32 read-write n 0x0 0x0 BIAS Bias Configuration 24 2 read-write STATIC Static 0x00000000 ONEHALF 1/2 Bias 0x00000001 ONETHIRD 1/3 Bias 0x00000002 ONEFOURTH 1/4 Bias 0x00000003 CHGRDST Charge Redistribution Cycles 20 3 read-write DISABLE Disable charge redistribution. 0x00000000 ONE Use 1 prescaled low frequency clock cycle for charge redistribution. 0x00000001 TWO Use 2 prescaled low frequency clock cycles for charge redistribution. 0x00000002 THREE Use 3 prescaled low frequency clock cycles for charge redistribution. 0x00000003 FOUR Use 4 prescaled low frequency clock cycles for charge redistribution. 0x00000004 CONTRAST Contrast Control 8 6 read-write MODE Mode Setting 28 2 read-write NOEXTCAP No External Cap. Uses an internal current source to generate VLCD. Use CONTRAST[4:0] to control VLCD. 0x00000000 STEPDOWN Use step down control with VLCD less than VDD. Use CONTRAST[5:0] to control VLCD level, and use SPEED to adjust VLCD drive strength. 0x00000001 CPINTOSC Charge pump used with internal oscillator. Use CONTRAST[5:0] to control VLCD level, and use SPEED to adjust oscillator frequency. 0x00000002 MUX Mux Configuration 0 3 read-write STATIC Static 0x00000000 DUPLEX Duplex 0x00000001 TRIPLEX Triplex 0x00000002 QUADRUPLEX Quadruplex 0x00000003 SEXTAPLEX Sextaplex 0x00000005 OCTAPLEX Octaplex 0x00000007 WAVE Waveform Selection 4 1 read-write FRAMERATE Frame Rate 0xF0 32 read-write n 0x0 0x0 FRDIV Frame Rate Divider 0 9 read-write FREEZE Freeze Register 0xC0 32 read-write n 0x0 0x0 LCDGATE LCD Gate 1 1 read-write REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x28 32 read-write n 0x0 0x0 FC Frame Counter Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0x1C 32 read-only n 0x0 0x0 FC Frame Counter Interrupt Flag 0 1 read-only IFC Interrupt Flag Clear Register 0x24 32 write-only n 0x0 0x0 FC Frame Counter Interrupt Flag Clear 0 1 write-only IFS Interrupt Flag Set Register 0x20 32 write-only n 0x0 0x0 FC Frame Counter Interrupt Flag Set 0 1 write-only SEGD0H Segment Data High Register 0 0x50 32 read-write n 0x0 0x0 SEGD0H COM0 Segment Data High 0 8 read-write SEGD0L Segment Data Low Register 0 0x40 32 read-write n 0x0 0x0 SEGD0L COM0 Segment Data Low 0 32 read-write SEGD1H Segment Data High Register 1 0x54 32 read-write n 0x0 0x0 SEGD1H COM1 Segment Data High 0 8 read-write SEGD1L Segment Data Low Register 1 0x44 32 read-write n 0x0 0x0 SEGD1L COM1 Segment Data Low 0 32 read-write SEGD2H Segment Data High Register 2 0x58 32 read-write n 0x0 0x0 SEGD2H COM2 Segment Data High 0 8 read-write SEGD2L Segment Data Low Register 2 0x48 32 read-write n 0x0 0x0 SEGD2L COM2 Segment Data Low 0 32 read-write SEGD3H Segment Data High Register 3 0x5C 32 read-write n 0x0 0x0 SEGD3H COM3 Segment Data High 0 8 read-write SEGD3L Segment Data Low Register 3 0x4C 32 read-write n 0x0 0x0 SEGD3L COM3 Segment Data Low 0 32 read-write SEGD4H Segment Data High Register 4 0x70 32 read-write n 0x0 0x0 SEGD4H COM0 Segment Data High 0 8 read-write SEGD4L Segment Data Low Register 4 0x60 32 read-write n 0x0 0x0 SEGD4L COM4 Segment Data 0 32 read-write SEGD5H Segment Data High Register 5 0x74 32 read-write n 0x0 0x0 SEGD5H COM1 Segment Data High 0 8 read-write SEGD5L Segment Data Low Register 5 0x64 32 read-write n 0x0 0x0 SEGD5L COM5 Segment Data 0 32 read-write SEGD6H Segment Data High Register 6 0x78 32 read-write n 0x0 0x0 SEGD6H COM2 Segment Data High 0 8 read-write SEGD6L Segment Data Low Register 6 0x68 32 read-write n 0x0 0x0 SEGD6L COM6 Segment Data 0 32 read-write SEGD7H Segment Data High Register 7 0x7C 32 read-write n 0x0 0x0 SEGD7H COM3 Segment Data High 0 8 read-write SEGD7L Segment Data Low Register 7 0x6C 32 read-write n 0x0 0x0 SEGD7L COM7 Segment Data 0 32 read-write SEGEN Segment Enable Register 0x8 32 read-write n 0x0 0x0 SEGEN Segment Enable 0 32 read-write SEGEN2 Segment Enable (32 to 39) 0xF4 32 read-write n 0x0 0x0 SEGEN2 Segment Enable (second Group) 0 8 read-write STATUS Status Register 0x10 32 read-only n 0x0 0x0 ASTATE Current Animation State 0 4 read-only BLINK Blink State 8 1 read-only SYNCBUSY Synchronization Busy Register 0xC4 32 read-only n 0x0 0x0 AREGA AREGA Register Busy 2 1 read-only AREGB AREGB Register Busy 3 1 read-only BACTRL BACTRL Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only SEGD0H SEGD0H Register Busy 8 1 read-only SEGD0L SEGD0L Register Busy 4 1 read-only SEGD1H SEGD1H Register Busy 9 1 read-only SEGD1L SEGD1L Register Busy 5 1 read-only SEGD2H SEGD2H Register Busy 10 1 read-only SEGD2L SEGD2L Register Busy 6 1 read-only SEGD3H SEGD3H Register Busy 11 1 read-only SEGD3L SEGD3L Register Busy 7 1 read-only SEGD4H SEGD4H Register Busy 16 1 read-only SEGD4L SEGD4L Register Busy 12 1 read-only SEGD5H SEGD5H Register Busy 17 1 read-only SEGD5L SEGD5L Register Busy 13 1 read-only SEGD6H SEGD6H Register Busy 18 1 read-only SEGD6L SEGD6L Register Busy 14 1 read-only SEGD7H SEGD7H Register Busy 19 1 read-only SEGD7L SEGD7L Register Busy 15 1 read-only LDMA LDMA LDMA 0x0 0x0 0x1000 registers n LDMA 2 CH0_CFG Channel Configuration Register 0x84 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH0_CTRL Channel Descriptor Control Word Register 0x8C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH0_DST Channel Descriptor Destination Data Address Register 0x94 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH0_LINK Channel Descriptor Link Structure Address Register 0x98 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH0_LOOP Channel Loop Counter Register 0x88 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH0_REQSEL Channel Peripheral Request Select Register 0x80 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH0_SRC Channel Descriptor Source Data Address Register 0x90 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH10_CFG Channel Configuration Register 0x264 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH10_CTRL Channel Descriptor Control Word Register 0x26C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH10_DST Channel Descriptor Destination Data Address Register 0x274 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH10_LINK Channel Descriptor Link Structure Address Register 0x278 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH10_LOOP Channel Loop Counter Register 0x268 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH10_REQSEL Channel Peripheral Request Select Register 0x260 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH10_SRC Channel Descriptor Source Data Address Register 0x270 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH11_CFG Channel Configuration Register 0x294 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH11_CTRL Channel Descriptor Control Word Register 0x29C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH11_DST Channel Descriptor Destination Data Address Register 0x2A4 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH11_LINK Channel Descriptor Link Structure Address Register 0x2A8 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH11_LOOP Channel Loop Counter Register 0x298 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH11_REQSEL Channel Peripheral Request Select Register 0x290 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH11_SRC Channel Descriptor Source Data Address Register 0x2A0 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH12_CFG Channel Configuration Register 0x2C4 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH12_CTRL Channel Descriptor Control Word Register 0x2CC 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH12_DST Channel Descriptor Destination Data Address Register 0x2D4 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH12_LINK Channel Descriptor Link Structure Address Register 0x2D8 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH12_LOOP Channel Loop Counter Register 0x2C8 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH12_REQSEL Channel Peripheral Request Select Register 0x2C0 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH12_SRC Channel Descriptor Source Data Address Register 0x2D0 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH13_CFG Channel Configuration Register 0x2F4 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH13_CTRL Channel Descriptor Control Word Register 0x2FC 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH13_DST Channel Descriptor Destination Data Address Register 0x304 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH13_LINK Channel Descriptor Link Structure Address Register 0x308 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH13_LOOP Channel Loop Counter Register 0x2F8 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH13_REQSEL Channel Peripheral Request Select Register 0x2F0 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH13_SRC Channel Descriptor Source Data Address Register 0x300 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH14_CFG Channel Configuration Register 0x324 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH14_CTRL Channel Descriptor Control Word Register 0x32C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH14_DST Channel Descriptor Destination Data Address Register 0x334 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH14_LINK Channel Descriptor Link Structure Address Register 0x338 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH14_LOOP Channel Loop Counter Register 0x328 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH14_REQSEL Channel Peripheral Request Select Register 0x320 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH14_SRC Channel Descriptor Source Data Address Register 0x330 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH15_CFG Channel Configuration Register 0x354 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH15_CTRL Channel Descriptor Control Word Register 0x35C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH15_DST Channel Descriptor Destination Data Address Register 0x364 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH15_LINK Channel Descriptor Link Structure Address Register 0x368 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH15_LOOP Channel Loop Counter Register 0x358 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH15_REQSEL Channel Peripheral Request Select Register 0x350 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH15_SRC Channel Descriptor Source Data Address Register 0x360 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH16_CFG Channel Configuration Register 0x384 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH16_CTRL Channel Descriptor Control Word Register 0x38C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH16_DST Channel Descriptor Destination Data Address Register 0x394 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH16_LINK Channel Descriptor Link Structure Address Register 0x398 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH16_LOOP Channel Loop Counter Register 0x388 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH16_REQSEL Channel Peripheral Request Select Register 0x380 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH16_SRC Channel Descriptor Source Data Address Register 0x390 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH17_CFG Channel Configuration Register 0x3B4 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH17_CTRL Channel Descriptor Control Word Register 0x3BC 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH17_DST Channel Descriptor Destination Data Address Register 0x3C4 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH17_LINK Channel Descriptor Link Structure Address Register 0x3C8 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH17_LOOP Channel Loop Counter Register 0x3B8 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH17_REQSEL Channel Peripheral Request Select Register 0x3B0 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH17_SRC Channel Descriptor Source Data Address Register 0x3C0 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH18_CFG Channel Configuration Register 0x3E4 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH18_CTRL Channel Descriptor Control Word Register 0x3EC 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH18_DST Channel Descriptor Destination Data Address Register 0x3F4 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH18_LINK Channel Descriptor Link Structure Address Register 0x3F8 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH18_LOOP Channel Loop Counter Register 0x3E8 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH18_REQSEL Channel Peripheral Request Select Register 0x3E0 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH18_SRC Channel Descriptor Source Data Address Register 0x3F0 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH19_CFG Channel Configuration Register 0x414 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH19_CTRL Channel Descriptor Control Word Register 0x41C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH19_DST Channel Descriptor Destination Data Address Register 0x424 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH19_LINK Channel Descriptor Link Structure Address Register 0x428 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH19_LOOP Channel Loop Counter Register 0x418 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH19_REQSEL Channel Peripheral Request Select Register 0x410 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH19_SRC Channel Descriptor Source Data Address Register 0x420 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH1_CFG Channel Configuration Register 0xB4 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH1_CTRL Channel Descriptor Control Word Register 0xBC 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH1_DST Channel Descriptor Destination Data Address Register 0xC4 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH1_LINK Channel Descriptor Link Structure Address Register 0xC8 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH1_LOOP Channel Loop Counter Register 0xB8 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH1_REQSEL Channel Peripheral Request Select Register 0xB0 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH1_SRC Channel Descriptor Source Data Address Register 0xC0 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH20_CFG Channel Configuration Register 0x444 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH20_CTRL Channel Descriptor Control Word Register 0x44C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH20_DST Channel Descriptor Destination Data Address Register 0x454 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH20_LINK Channel Descriptor Link Structure Address Register 0x458 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH20_LOOP Channel Loop Counter Register 0x448 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH20_REQSEL Channel Peripheral Request Select Register 0x440 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH20_SRC Channel Descriptor Source Data Address Register 0x450 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH21_CFG Channel Configuration Register 0x474 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH21_CTRL Channel Descriptor Control Word Register 0x47C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH21_DST Channel Descriptor Destination Data Address Register 0x484 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH21_LINK Channel Descriptor Link Structure Address Register 0x488 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH21_LOOP Channel Loop Counter Register 0x478 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH21_REQSEL Channel Peripheral Request Select Register 0x470 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH21_SRC Channel Descriptor Source Data Address Register 0x480 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH22_CFG Channel Configuration Register 0x4A4 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH22_CTRL Channel Descriptor Control Word Register 0x4AC 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH22_DST Channel Descriptor Destination Data Address Register 0x4B4 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH22_LINK Channel Descriptor Link Structure Address Register 0x4B8 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH22_LOOP Channel Loop Counter Register 0x4A8 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH22_REQSEL Channel Peripheral Request Select Register 0x4A0 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH22_SRC Channel Descriptor Source Data Address Register 0x4B0 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH23_CFG Channel Configuration Register 0x4D4 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH23_CTRL Channel Descriptor Control Word Register 0x4DC 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH23_DST Channel Descriptor Destination Data Address Register 0x4E4 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH23_LINK Channel Descriptor Link Structure Address Register 0x4E8 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH23_LOOP Channel Loop Counter Register 0x4D8 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH23_REQSEL Channel Peripheral Request Select Register 0x4D0 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH23_SRC Channel Descriptor Source Data Address Register 0x4E0 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH2_CFG Channel Configuration Register 0xE4 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH2_CTRL Channel Descriptor Control Word Register 0xEC 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH2_DST Channel Descriptor Destination Data Address Register 0xF4 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH2_LINK Channel Descriptor Link Structure Address Register 0xF8 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH2_LOOP Channel Loop Counter Register 0xE8 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH2_REQSEL Channel Peripheral Request Select Register 0xE0 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH2_SRC Channel Descriptor Source Data Address Register 0xF0 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH3_CFG Channel Configuration Register 0x114 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH3_CTRL Channel Descriptor Control Word Register 0x11C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH3_DST Channel Descriptor Destination Data Address Register 0x124 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH3_LINK Channel Descriptor Link Structure Address Register 0x128 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH3_LOOP Channel Loop Counter Register 0x118 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH3_REQSEL Channel Peripheral Request Select Register 0x110 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH3_SRC Channel Descriptor Source Data Address Register 0x120 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH4_CFG Channel Configuration Register 0x144 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH4_CTRL Channel Descriptor Control Word Register 0x14C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH4_DST Channel Descriptor Destination Data Address Register 0x154 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH4_LINK Channel Descriptor Link Structure Address Register 0x158 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH4_LOOP Channel Loop Counter Register 0x148 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH4_REQSEL Channel Peripheral Request Select Register 0x140 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH4_SRC Channel Descriptor Source Data Address Register 0x150 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH5_CFG Channel Configuration Register 0x174 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH5_CTRL Channel Descriptor Control Word Register 0x17C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH5_DST Channel Descriptor Destination Data Address Register 0x184 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH5_LINK Channel Descriptor Link Structure Address Register 0x188 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH5_LOOP Channel Loop Counter Register 0x178 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH5_REQSEL Channel Peripheral Request Select Register 0x170 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH5_SRC Channel Descriptor Source Data Address Register 0x180 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH6_CFG Channel Configuration Register 0x1A4 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH6_CTRL Channel Descriptor Control Word Register 0x1AC 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH6_DST Channel Descriptor Destination Data Address Register 0x1B4 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH6_LINK Channel Descriptor Link Structure Address Register 0x1B8 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH6_LOOP Channel Loop Counter Register 0x1A8 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH6_REQSEL Channel Peripheral Request Select Register 0x1A0 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH6_SRC Channel Descriptor Source Data Address Register 0x1B0 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH7_CFG Channel Configuration Register 0x1D4 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH7_CTRL Channel Descriptor Control Word Register 0x1DC 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH7_DST Channel Descriptor Destination Data Address Register 0x1E4 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH7_LINK Channel Descriptor Link Structure Address Register 0x1E8 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH7_LOOP Channel Loop Counter Register 0x1D8 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH7_REQSEL Channel Peripheral Request Select Register 0x1D0 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH7_SRC Channel Descriptor Source Data Address Register 0x1E0 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH8_CFG Channel Configuration Register 0x204 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH8_CTRL Channel Descriptor Control Word Register 0x20C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH8_DST Channel Descriptor Destination Data Address Register 0x214 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH8_LINK Channel Descriptor Link Structure Address Register 0x218 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH8_LOOP Channel Loop Counter Register 0x208 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH8_REQSEL Channel Peripheral Request Select Register 0x200 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH8_SRC Channel Descriptor Source Data Address Register 0x210 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CH9_CFG Channel Configuration Register 0x234 32 read-write n 0x0 0x0 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 DSTINCSIGN Destination Address Increment Sign 21 1 read-write SRCINCSIGN Source Address Increment Sign 20 1 read-write CH9_CTRL Channel Descriptor Control Word Register 0x23C 32 read-write n 0x0 0x0 BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F BYTESWAP Endian Byte Swap 15 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 DSTMODE Destination Addressing Mode 31 1 read-only IGNORESREQ Ignore Sreq 23 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only STRUCTREQ Structure DMA Transfer Request 3 1 write-only STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 XFERCNT DMA Unit Data Transfer Count 4 11 read-write CH9_DST Channel Descriptor Destination Data Address Register 0x244 32 read-write n 0x0 0x0 DSTADDR Destination Data Address 0 32 read-write CH9_LINK Channel Descriptor Link Structure Address Register 0x248 32 read-write n 0x0 0x0 LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write LINKMODE Link Structure Addressing Mode 0 1 read-only CH9_LOOP Channel Loop Counter Register 0x238 32 read-write n 0x0 0x0 LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH9_REQSEL Channel Peripheral Request Select Register 0x230 32 read-write n 0x0 0x0 SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 ADC1 Analog to Digital Converter 0 0x00000009 VDAC0 Digital to Analog Converter 0 0x0000000A USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x0000000E USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x0000000F USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000010 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000011 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000012 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000013 LEUART0 Low Energy UART 0 0x00000014 LEUART1 Low Energy UART 1 0x00000015 I2C0 I2C 0 0x00000016 I2C1 I2C 1 0x00000017 I2C2 I2C 2 0x00000018 TIMER0 Timer 0 0x00000019 TIMER1 Timer 1 0x0000001A TIMER2 Timer 2 0x0000001B TIMER3 Timer 3 0x0000001C TIMER4 Timer 4 0x0000001D TIMER5 Timer 5 0x0000001E TIMER6 Timer 6 0x0000001F WTIMER0 Wide Timer 0 0x00000020 WTIMER1 Wide Timer 0 0x00000021 WTIMER2 Wide Timer 2 0x00000022 WTIMER3 Wide Timer 3 0x00000023 MSC Memory System Controller 0x00000030 CRYPTO0 Advanced Encryption Standard Accelerator 0x00000031 EBI External Bus Interface 0x00000032 CSEN Capacitive touch sense module 0x0000003D LESENSE Low Energy Sensor Interface 0x0000003E CH9_SRC Channel Descriptor Source Data Address Register 0x240 32 read-write n 0x0 0x0 SRCADDR Source Data Address 0 32 read-write CHBUSY DMA Channel Busy Register 0x24 32 read-only n 0x0 0x0 BUSY Channels Busy 0 24 read-only CHDONE DMA Channel Linking Done Register (Single-Cycle RMW) 0x28 32 read-write n 0x0 0x0 CHDONE DMA Channel Linking or Done 0 24 read-write CHEN DMA Channel Enable Register (Single-Cycle RMW) 0x20 32 read-write n 0x0 0x0 CHEN Channel Enables 0 24 read-write CTRL DMA Control Register 0x0 32 read-write n 0x0 0x0 NUMFIXED Number of Fixed Priority Channels 24 5 read-write SYNCPRSCLREN Synchronization PRS Clear Enable 8 8 read-write SYNCPRSSETEN Synchronization PRS Set Enable 0 8 read-write DBGHALT DMA Channel Debug Halt Register 0x2C 32 read-write n 0x0 0x0 DBGHALT DMA Debug Halt 0 24 read-write IEN Interrupt Enable Register 0x6C 32 read-write n 0x0 0x0 DONE DONE Interrupt Enable 0 24 read-write ERROR ERROR Interrupt Enable 31 1 read-write IF Interrupt Flag Register 0x60 32 read-only n 0x0 0x0 DONE DMA Structure Operation Done Interrupt Flag 0 24 read-only ERROR Transfer Error Interrupt Flag 31 1 read-only IFC Interrupt Flag Clear Register 0x68 32 write-only n 0x0 0x0 DONE Clear DONE Interrupt Flag 0 24 write-only ERROR Clear ERROR Interrupt Flag 31 1 write-only IFS Interrupt Flag Set Register 0x64 32 write-only n 0x0 0x0 DONE Set DONE Interrupt Flag 0 24 write-only ERROR Set ERROR Interrupt Flag 31 1 write-only LINKLOAD DMA Channel Link Load Register 0x3C 32 write-only n 0x0 0x0 LINKLOAD DMA Link Loads 0 24 write-only REQCLEAR DMA Channel Request Clear Register 0x40 32 write-only n 0x0 0x0 REQCLEAR DMA Request Clear 0 24 write-only REQDIS DMA Channel Request Disable Register 0x34 32 read-write n 0x0 0x0 REQDIS DMA Request Disables 0 24 read-write REQPEND DMA Channel Requests Pending Register 0x38 32 read-only n 0x0 0x0 REQPEND DMA Requests Pending 0 24 read-only STATUS DMA Status Register 0x4 32 read-only n 0x0 0x0 ANYBUSY Any DMA Channel Busy 0 1 read-only ANYREQ Any DMA Channel Request Pending 1 1 read-only CHERROR Errant Channel Number 8 5 read-only CHGRANT Granted Channel Number 3 5 read-only CHNUM Number of Channels 24 5 read-only FIFOLEVEL FIFO Level 16 5 read-only SWREQ DMA Channel Software Transfer Request Register 0x30 32 write-only n 0x0 0x0 SWREQ Software Transfer Requests 0 24 write-only SYNC DMA Synchronization Trigger Register (Single-Cycle RMW) 0x8 32 read-write n 0x0 0x0 SYNCTRIG Synchronization Trigger 0 8 read-write LESENSE LESENSE LESENSE 0x0 0x0 0x400 registers n LESENSE 53 ALTEXCONF Alternative Excite Pin Configuration 0x44 32 read-write n 0x0 0x0 AEX0 ALTEX0 Always Excite Enable 16 1 read-write AEX1 ALTEX1 Always Excite Enable 17 1 read-write AEX2 ALTEX2 Always Excite Enable 18 1 read-write AEX3 ALTEX3 Always Excite Enable 19 1 read-write AEX4 ALTEX4 Always Excite Enable 20 1 read-write AEX5 ALTEX5 Always Excite Enable 21 1 read-write AEX6 ALTEX6 Always Excite Enable 22 1 read-write AEX7 ALTEX7 Always Excite Enable 23 1 read-write IDLECONF0 ALTEX0 Idle Phase Configuration 0 2 read-write DISABLE ALTEX0 output is disabled in idle phase 0x00000000 HIGH ALTEX0 output is high in idle phase 0x00000001 LOW ALTEX0 output is low in idle phase 0x00000002 IDLECONF1 ALTEX1 Idle Phase Configuration 2 2 read-write DISABLE ALTEX1 output is disabled in idle phase 0x00000000 HIGH ALTEX1 output is high in idle phase 0x00000001 LOW ALTEX1 output is low in idle phase 0x00000002 IDLECONF2 ALTEX2 Idle Phase Configuration 4 2 read-write DISABLE ALTEX2 output is disabled in idle phase 0x00000000 HIGH ALTEX2 output is high in idle phase 0x00000001 LOW ALTEX2 output is low in idle phase 0x00000002 IDLECONF3 ALTEX3 Idle Phase Configuration 6 2 read-write DISABLE ALTEX3 output is disabled in idle phase 0x00000000 HIGH ALTEX3 output is high in idle phase 0x00000001 LOW ALTEX3 output is low in idle phase 0x00000002 IDLECONF4 ALTEX4 Idle Phase Configuration 8 2 read-write DISABLE ALTEX4 output is disabled in idle phase 0x00000000 HIGH ALTEX4 output is high in idle phase 0x00000001 LOW ALTEX4 output is low in idle phase 0x00000002 IDLECONF5 ALTEX5 Idle Phase Configuration 10 2 read-write DISABLE ALTEX5 output is disabled in idle phase 0x00000000 HIGH ALTEX5 output is high in idle phase 0x00000001 LOW ALTEX5 output is low in idle phase 0x00000002 IDLECONF6 ALTEX6 Idle Phase Configuration 12 2 read-write DISABLE ALTEX6 output is disabled in idle phase 0x00000000 HIGH ALTEX6 output is high in idle phase 0x00000001 LOW ALTEX6 output is low in idle phase 0x00000002 IDLECONF7 ALTEX7 Idle Phase Configuration 14 2 read-write DISABLE ALTEX7 output is disabled in idle phase 0x00000000 HIGH ALTEX7 output is high in idle phase 0x00000001 LOW ALTEX7 output is low in idle phase 0x00000002 BIASCTRL Bias Control Register 0x10 32 read-write n 0x0 0x0 BIASMODE Select Bias Mode 0 2 read-write DONTTOUCH Bias module is controlled by the EMU and is not affected by LESENSE 0x00000000 DUTYCYCLE Bias module duty cycled between low power and high accuracy mode 0x00000001 HIGHACC Bias module always in high accuracy mode 0x00000002 BUF0_DATA Scan Results 0x200 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF10_DATA Scan Results 0x228 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF11_DATA Scan Results 0x22C 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF12_DATA Scan Results 0x230 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF13_DATA Scan Results 0x234 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF14_DATA Scan Results 0x238 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF15_DATA Scan Results 0x23C 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF1_DATA Scan Results 0x204 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF2_DATA Scan Results 0x208 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF3_DATA Scan Results 0x20C 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF4_DATA Scan Results 0x210 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF5_DATA Scan Results 0x214 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF6_DATA Scan Results 0x218 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF7_DATA Scan Results 0x21C 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF8_DATA Scan Results 0x220 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUF9_DATA Scan Results 0x224 32 read-write n 0x0 0x0 DATA Scan Result Buffer 0 16 read-write DATASRC Result Data Source 16 4 read-only BUFDATA Result Buffer Data Register 0x30 32 read-only n 0x0 0x0 modifyExternal BUFDATA Result Data 0 16 read-only BUFDATASRC Result Data Source 16 4 read-only CH0_EVAL Scan Configuration 0x248 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH0_INTERACT Scan Configuration 0x244 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH0_TIMING Scan Configuration 0x240 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH10_EVAL Scan Configuration 0x2E8 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH10_INTERACT Scan Configuration 0x2E4 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH10_TIMING Scan Configuration 0x2E0 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH11_EVAL Scan Configuration 0x2F8 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH11_INTERACT Scan Configuration 0x2F4 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH11_TIMING Scan Configuration 0x2F0 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH12_EVAL Scan Configuration 0x308 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH12_INTERACT Scan Configuration 0x304 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH12_TIMING Scan Configuration 0x300 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH13_EVAL Scan Configuration 0x318 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH13_INTERACT Scan Configuration 0x314 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH13_TIMING Scan Configuration 0x310 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH14_EVAL Scan Configuration 0x328 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH14_INTERACT Scan Configuration 0x324 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH14_TIMING Scan Configuration 0x320 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH15_EVAL Scan Configuration 0x338 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH15_INTERACT Scan Configuration 0x334 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH15_TIMING Scan Configuration 0x330 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH1_EVAL Scan Configuration 0x258 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH1_INTERACT Scan Configuration 0x254 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH1_TIMING Scan Configuration 0x250 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH2_EVAL Scan Configuration 0x268 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH2_INTERACT Scan Configuration 0x264 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH2_TIMING Scan Configuration 0x260 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH3_EVAL Scan Configuration 0x278 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH3_INTERACT Scan Configuration 0x274 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH3_TIMING Scan Configuration 0x270 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH4_EVAL Scan Configuration 0x288 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH4_INTERACT Scan Configuration 0x284 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH4_TIMING Scan Configuration 0x280 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH5_EVAL Scan Configuration 0x298 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH5_INTERACT Scan Configuration 0x294 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH5_TIMING Scan Configuration 0x290 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH6_EVAL Scan Configuration 0x2A8 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH6_INTERACT Scan Configuration 0x2A4 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH6_TIMING Scan Configuration 0x2A0 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH7_EVAL Scan Configuration 0x2B8 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH7_INTERACT Scan Configuration 0x2B4 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH7_TIMING Scan Configuration 0x2B0 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH8_EVAL Scan Configuration 0x2C8 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH8_INTERACT Scan Configuration 0x2C4 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH8_TIMING Scan Configuration 0x2C0 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CH9_EVAL Scan Configuration 0x2D8 32 read-write n 0x0 0x0 COMP Select Mode for Threshold Comparison 16 1 read-write COMPTHRES Decision Threshold for Sensor Data 0 16 read-write DECODE Send Result to Decoder 17 1 read-write MODE Configure Evaluation Mode 21 2 read-write THRES Threshold comparison is used to evaluate sensor result 0x00000000 SLIDINGWIN Sliding window is used to evaluate sensor result 0x00000001 STEPDET Step detection is used to evaluate sensor result 0x00000002 SCANRESINV Enable Inversion of Result 20 1 read-write STRSAMPLE Enable Storing of Sensor Sample in Result Buffer 18 2 read-write DISABLE Nothing will be stored in the result buffer. 0x00000000 DATA The sensor sample data will be stored in the result buffer. 0x00000001 DATASRC The data source (i.e., the channel) will be stored alongside the sensor sample data. 0x00000002 CH9_INTERACT Scan Configuration 0x2D4 32 read-write n 0x0 0x0 ALTEX Use Alternative Excite Pin 21 1 read-write EXCLK Select Clock Used for Excitation Timing 19 1 read-write EXMODE Set GPIO Mode 17 2 read-write DISABLE Disabled 0x00000000 HIGH Push Pull, GPIO is driven high 0x00000001 LOW Push Pull, GPIO is driven low 0x00000002 DACOUT VDAC output 0x00000003 SAMPLE Select Sample Mode 12 2 read-write ACMPCOUNT Counter output will be used in evaluation 0x00000000 ACMP ACMP output will be used in evaluation 0x00000001 ADC ADC output will be used in evaluation 0x00000002 ADCDIFF Differential ADC output will be used in evaluation 0x00000003 SAMPLECLK Select Clock Used for Timing of Sample Delay 20 1 read-write SETIF Enable Interrupt Generation 14 3 read-write NONE No interrupt is generated 0x00000000 LEVEL Set interrupt flag if the sensor triggers. 0x00000001 POSEDGE Set interrupt flag on positive edge of the sensor state 0x00000002 NEGEDGE Set interrupt flag on negative edge of the sensor state 0x00000003 BOTHEDGES Set interrupt flag on both edges of the sensor state 0x00000004 THRES ACMP Threshold or VDAC Data 0 12 read-write CH9_TIMING Scan Configuration 0x2D0 32 read-write n 0x0 0x0 EXTIME Set Excitation Time 0 6 read-write MEASUREDLY Set Measure Delay 14 10 read-write SAMPLEDLY Set Sample Delay 6 8 read-write CHEN Channel Enable Register 0x20 32 read-write n 0x0 0x0 CHEN Enable Scan Channel 0 16 read-write CMD Command Register 0x1C 32 write-only n 0x0 0x0 CLEARBUF Clear Result Buffer 3 1 write-only DECODE Start Decoder 2 1 write-only START Start Scanning of Sensors 0 1 write-only STOP Stop Scanning of Sensors 1 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 ALTEXMAP Alternative Excitation Map 11 1 read-write BUFIDL Result Buffer Interrupt and DMA Trigger Level 19 1 read-write BUFOW Result Buffer Overwrite 16 1 read-write DEBUGRUN Debug Mode Run Enable 22 1 read-write DMAWU DMA Wake-up From EM2 20 2 read-write DISABLE No DMA wake-up from EM2 0x00000000 BUFDATAV DMA wake-up from EM2 when data is valid in the result buffer 0x00000001 BUFLEVEL DMA wake-up from EM2 when the result buffer is full/half-full depending on BUFIDL configuration 0x00000002 DUALSAMPLE Enable Dual Sample Mode 13 1 read-write PRSSEL Scan Start PRS Select 2 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 SCANCONF Select Scan Configuration 7 2 read-write DIRMAP The channel configuration register registers used are directly mapped to the channel number. 0x00000000 INVMAP The channel configuration register registers used are CHX+8_CONF for channels 0-7 and CHX-8_CONF for channels 8-15. 0x00000001 TOGGLE The channel configuration register registers used toggles between CHX_CONF and CHX+8_CONF when channel x triggers 0x00000002 DECDEF The decoder state defines the CONF registers to be used. 0x00000003 SCANMODE Configure Scan Mode 0 2 read-write PERIODIC A new scan is started each time the period counter overflows 0x00000000 ONESHOT A single scan is performed when START in CMD is set 0x00000001 PRS Pulse on PRS channel 0x00000002 STRSCANRES Enable Storing of SCANRES 17 1 read-write CURCH Current Channel Index 0x34 32 read-only n 0x0 0x0 CURCH Current Channel Index 0 4 read-only DECCTRL Decoder Control Register 0xC 32 read-write n 0x0 0x0 DISABLE Disable the Decoder 0 1 read-write ERRCHK Enable Check of Current State 1 1 read-write HYSTIRQ Enable Decoder Hysteresis on Interrupt Requests 6 1 read-write HYSTPRS0 Enable Decoder Hysteresis on PRS0 Output 3 1 read-write HYSTPRS1 Enable Decoder Hysteresis on PRS1 Output 4 1 read-write HYSTPRS2 Enable Decoder Hysteresis on PRS2 Output 5 1 read-write INPUT LESENSE Decoder Input Configuration 8 1 read-write INTMAP Enable Decoder to Channel Interrupt Mapping 2 1 read-write PRSCNT Enable Count Mode on Decoder PRS Channels 0 and 1 7 1 read-write PRSSEL0 LESENSE Decoder PRS Input 0 Configuration 10 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 PRSSEL1 LESENSE Decoder PRS Input 1 Configuration 15 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 PRSSEL2 LESENSE Decoder PRS Input 2 Configuration 20 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 PRSSEL3 LESENSE Decoder PRS Input 3 Configuration 25 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 DECSTATE Current Decoder State 0x38 32 read-write n 0x0 0x0 DECSTATE Current Decoder State 0 5 read-write EVALCTRL LESENSE Evaluation Control 0x14 32 read-write n 0x0 0x0 WINSIZE Sliding Window and Step Detection Size 0 16 read-write IDLECONF GPIO Idle Phase Configuration 0x40 32 read-write n 0x0 0x0 CH0 Channel 0 Idle Phase Configuration 0 2 read-write DISABLE CH0 output is disabled in idle phase 0x00000000 HIGH CH0 output is high in idle phase 0x00000001 LOW CH0 output is low in idle phase 0x00000002 DAC CH0 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH1 Channel 1 Idle Phase Configuration 2 2 read-write DISABLE CH1 output is disabled in idle phase 0x00000000 HIGH CH1 output is high in idle phase 0x00000001 LOW CH1 output is low in idle phase 0x00000002 DAC CH1 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH10 Channel 10 Idle Phase Configuration 20 2 read-write DISABLE CH10 output is disabled in idle phase 0x00000000 HIGH CH10 output is high in idle phase 0x00000001 LOW CH10 output is low in idle phase 0x00000002 DAC CH10 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH11 Channel 11 Idle Phase Configuration 22 2 read-write DISABLE CH11 output is disabled in idle phase 0x00000000 HIGH CH11 output is high in idle phase 0x00000001 LOW CH11 output is low in idle phase 0x00000002 DAC CH11 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH12 Channel 12 Idle Phase Configuration 24 2 read-write DISABLE CH12 output is disabled in idle phase 0x00000000 HIGH CH12 output is high in idle phase 0x00000001 LOW CH12 output is low in idle phase 0x00000002 DAC CH12 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH13 Channel 13 Idle Phase Configuration 26 2 read-write DISABLE CH13 output is disabled in idle phase 0x00000000 HIGH CH13 output is high in idle phase 0x00000001 LOW CH13 output is low in idle phase 0x00000002 DAC CH13 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH14 Channel 14 Idle Phase Configuration 28 2 read-write DISABLE CH14 output is disabled in idle phase 0x00000000 HIGH CH14 output is high in idle phase 0x00000001 LOW CH14 output is low in idle phase 0x00000002 DAC CH14 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH15 Channel 15 Idle Phase Configuration 30 2 read-write DISABLE CH15 output is disabled in idle phase 0x00000000 HIGH CH15 output is high in idle phase 0x00000001 LOW CH15 output is low in idle phase 0x00000002 DAC CH15 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH2 Channel 2 Idle Phase Configuration 4 2 read-write DISABLE CH2 output is disabled in idle phase 0x00000000 HIGH CH2 output is high in idle phase 0x00000001 LOW CH2 output is low in idle phase 0x00000002 DAC CH2 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH3 Channel 3 Idle Phase Configuration 6 2 read-write DISABLE CH3 output is disabled in idle phase 0x00000000 HIGH CH3 output is high in idle phase 0x00000001 LOW CH3 output is low in idle phase 0x00000002 DAC CH3 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH4 Channel 4 Idle Phase Configuration 8 2 read-write DISABLE CH4 output is disabled in idle phase 0x00000000 HIGH CH4 output is high in idle phase 0x00000001 LOW CH4 output is low in idle phase 0x00000002 DAC CH4 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH5 Channel 5 Idle Phase Configuration 10 2 read-write DISABLE CH5 output is disabled in idle phase 0x00000000 HIGH CH5 output is high in idle phase 0x00000001 LOW CH5 output is low in idle phase 0x00000002 DAC CH5 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH6 Channel 6 Idle Phase Configuration 12 2 read-write DISABLE CH6 output is disabled in idle phase 0x00000000 HIGH CH6 output is high in idle phase 0x00000001 LOW CH6 output is low in idle phase 0x00000002 DAC CH6 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH7 Channel 7 Idle Phase Configuration 14 2 read-write DISABLE CH7 output is disabled in idle phase 0x00000000 HIGH CH7 output is high in idle phase 0x00000001 LOW CH7 output is low in idle phase 0x00000002 DAC CH7 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH8 Channel 8 Idle Phase Configuration 16 2 read-write DISABLE CH8 output is disabled in idle phase 0x00000000 HIGH CH8 output is high in idle phase 0x00000001 LOW CH8 output is low in idle phase 0x00000002 DAC CH8 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 CH9 Channel 9 Idle Phase Configuration 18 2 read-write DISABLE CH9 output is disabled in idle phase 0x00000000 HIGH CH9 output is high in idle phase 0x00000001 LOW CH9 output is low in idle phase 0x00000002 DAC CH9 output is connected to VDAC output in idle phase. Note that this mode is only available on channels 0, 1, 2, 3, 12, 13, 14, 15 0x00000003 IEN Interrupt Enable Register 0x5C 32 read-write n 0x0 0x0 BUFDATAV BUFDATAV Interrupt Enable 19 1 read-write BUFLEVEL BUFLEVEL Interrupt Enable 20 1 read-write BUFOF BUFOF Interrupt Enable 21 1 read-write CH0 CH0 Interrupt Enable 0 1 read-write CH1 CH1 Interrupt Enable 1 1 read-write CH10 CH10 Interrupt Enable 10 1 read-write CH11 CH11 Interrupt Enable 11 1 read-write CH12 CH12 Interrupt Enable 12 1 read-write CH13 CH13 Interrupt Enable 13 1 read-write CH14 CH14 Interrupt Enable 14 1 read-write CH15 CH15 Interrupt Enable 15 1 read-write CH2 CH2 Interrupt Enable 2 1 read-write CH3 CH3 Interrupt Enable 3 1 read-write CH4 CH4 Interrupt Enable 4 1 read-write CH5 CH5 Interrupt Enable 5 1 read-write CH6 CH6 Interrupt Enable 6 1 read-write CH7 CH7 Interrupt Enable 7 1 read-write CH8 CH8 Interrupt Enable 8 1 read-write CH9 CH9 Interrupt Enable 9 1 read-write CNTOF CNTOF Interrupt Enable 22 1 read-write DEC DEC Interrupt Enable 17 1 read-write DECERR DECERR Interrupt Enable 18 1 read-write SCANCOMPLETE SCANCOMPLETE Interrupt Enable 16 1 read-write IF Interrupt Flag Register 0x50 32 read-only n 0x0 0x0 BUFDATAV BUFDATAV Interrupt Flag 19 1 read-only BUFLEVEL BUFLEVEL Interrupt Flag 20 1 read-only BUFOF BUFOF Interrupt Flag 21 1 read-only CH0 CH0 Interrupt Flag 0 1 read-only CH1 CH1 Interrupt Flag 1 1 read-only CH10 CH10 Interrupt Flag 10 1 read-only CH11 CH11 Interrupt Flag 11 1 read-only CH12 CH12 Interrupt Flag 12 1 read-only CH13 CH13 Interrupt Flag 13 1 read-only CH14 CH14 Interrupt Flag 14 1 read-only CH15 CH15 Interrupt Flag 15 1 read-only CH2 CH2 Interrupt Flag 2 1 read-only CH3 CH3 Interrupt Flag 3 1 read-only CH4 CH4 Interrupt Flag 4 1 read-only CH5 CH5 Interrupt Flag 5 1 read-only CH6 CH6 Interrupt Flag 6 1 read-only CH7 CH7 Interrupt Flag 7 1 read-only CH8 CH8 Interrupt Flag 8 1 read-only CH9 CH9 Interrupt Flag 9 1 read-only CNTOF CNTOF Interrupt Flag 22 1 read-only DEC DEC Interrupt Flag 17 1 read-only DECERR DECERR Interrupt Flag 18 1 read-only SCANCOMPLETE SCANCOMPLETE Interrupt Flag 16 1 read-only IFC Interrupt Flag Clear Register 0x58 32 write-only n 0x0 0x0 BUFDATAV Clear BUFDATAV Interrupt Flag 19 1 write-only BUFLEVEL Clear BUFLEVEL Interrupt Flag 20 1 write-only BUFOF Clear BUFOF Interrupt Flag 21 1 write-only CH0 Clear CH0 Interrupt Flag 0 1 write-only CH1 Clear CH1 Interrupt Flag 1 1 write-only CH10 Clear CH10 Interrupt Flag 10 1 write-only CH11 Clear CH11 Interrupt Flag 11 1 write-only CH12 Clear CH12 Interrupt Flag 12 1 write-only CH13 Clear CH13 Interrupt Flag 13 1 write-only CH14 Clear CH14 Interrupt Flag 14 1 write-only CH15 Clear CH15 Interrupt Flag 15 1 write-only CH2 Clear CH2 Interrupt Flag 2 1 write-only CH3 Clear CH3 Interrupt Flag 3 1 write-only CH4 Clear CH4 Interrupt Flag 4 1 write-only CH5 Clear CH5 Interrupt Flag 5 1 write-only CH6 Clear CH6 Interrupt Flag 6 1 write-only CH7 Clear CH7 Interrupt Flag 7 1 write-only CH8 Clear CH8 Interrupt Flag 8 1 write-only CH9 Clear CH9 Interrupt Flag 9 1 write-only CNTOF Clear CNTOF Interrupt Flag 22 1 write-only DEC Clear DEC Interrupt Flag 17 1 write-only DECERR Clear DECERR Interrupt Flag 18 1 write-only SCANCOMPLETE Clear SCANCOMPLETE Interrupt Flag 16 1 write-only IFS Interrupt Flag Set Register 0x54 32 write-only n 0x0 0x0 BUFDATAV Set BUFDATAV Interrupt Flag 19 1 write-only BUFLEVEL Set BUFLEVEL Interrupt Flag 20 1 write-only BUFOF Set BUFOF Interrupt Flag 21 1 write-only CH0 Set CH0 Interrupt Flag 0 1 write-only CH1 Set CH1 Interrupt Flag 1 1 write-only CH10 Set CH10 Interrupt Flag 10 1 write-only CH11 Set CH11 Interrupt Flag 11 1 write-only CH12 Set CH12 Interrupt Flag 12 1 write-only CH13 Set CH13 Interrupt Flag 13 1 write-only CH14 Set CH14 Interrupt Flag 14 1 write-only CH15 Set CH15 Interrupt Flag 15 1 write-only CH2 Set CH2 Interrupt Flag 2 1 write-only CH3 Set CH3 Interrupt Flag 3 1 write-only CH4 Set CH4 Interrupt Flag 4 1 write-only CH5 Set CH5 Interrupt Flag 5 1 write-only CH6 Set CH6 Interrupt Flag 6 1 write-only CH7 Set CH7 Interrupt Flag 7 1 write-only CH8 Set CH8 Interrupt Flag 8 1 write-only CH9 Set CH9 Interrupt Flag 9 1 write-only CNTOF Set CNTOF Interrupt Flag 22 1 write-only DEC Set DEC Interrupt Flag 17 1 write-only DECERR Set DECERR Interrupt Flag 18 1 write-only SCANCOMPLETE Set SCANCOMPLETE Interrupt Flag 16 1 write-only PERCTRL Peripheral Control Register 0x8 32 read-write n 0x0 0x0 ACMP0HYSTEN ACMP0 Hysteresis Enable 26 1 read-write ACMP0INV Invert Analog Comparator 0 Output 24 1 read-write ACMP0MODE ACMP0 Mode 20 2 read-write DISABLE LESENSE does not control ACMP0 0x00000000 MUX LESENSE controls the input mux (POSSEL) of ACMP0 0x00000001 MUXTHRES LESENSE controls the input mux (POSSEL) and the threshold value (VDDLEVEL) of ACMP0 0x00000002 ACMP1HYSTEN ACMP1 Hysteresis Enable 27 1 read-write ACMP1INV Invert Analog Comparator 1 Output 25 1 read-write ACMP1MODE ACMP1 Mode 22 2 read-write DISABLE LESENSE does not control ACMP1 0x00000000 MUX LESENSE controls the input mux (POSSEL) of ACMP1 0x00000001 MUXTHRES LESENSE controls the input mux and the threshold value (VDDLEVEL) of ACMP1 0x00000002 DACCH0DATA VDAC CH0 Data Selection 2 1 read-write DACCH0EN VDAC CH0 Enable 0 1 read-write DACCH1DATA VDAC CH1 Data Selection 3 1 read-write DACCH1EN VDAC CH1 Enable 1 1 read-write DACCONVTRIG VDAC Conversion Trigger Configuration 8 1 read-write DACSTARTUP VDAC Startup Configuration 6 1 read-write WARMUPMODE ACMP and VDAC Duty Cycle Mode 28 2 read-write NORMAL The analog comparators and VDAC are shut down when LESENSE is idle 0x00000000 KEEPACMPWARM The analog comparators are kept powered up when LESENSE is idle 0x00000001 KEEPDACWARM The VDAC is kept powered up when LESENSE is idle 0x00000002 KEEPACMPDACWARM The analog comparators and VDAC are kept powered up when LESENSE is idle 0x00000003 PRSCTRL PRS Control Register 0x18 32 read-write n 0x0 0x0 DECCMPEN Enable PRS Output DECCMP 16 1 read-write DECCMPMASK Decoder State Compare Value Mask 8 5 read-write DECCMPVAL Decoder State Compare Value 0 5 read-write PTR Result Buffer Pointers 0x2C 32 read-only n 0x0 0x0 RD Result Buffer Read Pointer 0 4 read-only WR Result Buffer Write Pointer 4 4 read-only ROUTEPEN I/O Routing Register 0x64 32 read-write n 0x0 0x0 ALTEX0PEN ALTEX0 Pin Enable 16 1 read-write ALTEX1PEN ALTEX1 Pin Enable 17 1 read-write ALTEX2PEN ALTEX2 Pin Enable 18 1 read-write ALTEX3PEN ALTEX3 Pin Enable 19 1 read-write ALTEX4PEN ALTEX4 Pin Enable 20 1 read-write ALTEX5PEN ALTEX5 Pin Enable 21 1 read-write ALTEX6PEN ALTEX6 Pin Enable 22 1 read-write ALTEX7PEN ALTEX7 Pin Enable 23 1 read-write CH0PEN CH0 Pin Enable 0 1 read-write CH10PEN CH10 Pin Enable 10 1 read-write CH11PEN CH11 Pin Enable 11 1 read-write CH12PEN CH12 Pin Enable 12 1 read-write CH13PEN CH13 Pin Enable 13 1 read-write CH14PEN CH14 Pin Enable 14 1 read-write CH15PEN CH15 Pin Enable 15 1 read-write CH1PEN CH1 Pin Enable 1 1 read-write CH2PEN CH2 Pin Enable 2 1 read-write CH3PEN CH3 Pin Enable 3 1 read-write CH4PEN CH4 Pin Enable 4 1 read-write CH5PEN CH5 Pin Enable 5 1 read-write CH6PEN CH6 Pin Enable 6 1 read-write CH7PEN CH7 Pin Enable 7 1 read-write CH8PEN CH8 Pin Enable 8 1 read-write CH9PEN CH9 Pin Enable 9 1 read-write SCANRES Scan Result Register 0x24 32 read-write n 0x0 0x0 SCANRES Scan Results 0 16 read-write STEPDIR Direction of Previous Step Detection 16 16 read-write SENSORSTATE Decoder Input Register 0x3C 32 read-write n 0x0 0x0 SENSORSTATE Decoder Input Register 0 4 read-write ST0_TCONFA State Transition Configuration a 0x100 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST0_TCONFB State Transition Configuration B 0x104 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST10_TCONFA State Transition Configuration a 0x150 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST10_TCONFB State Transition Configuration B 0x154 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST11_TCONFA State Transition Configuration a 0x158 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST11_TCONFB State Transition Configuration B 0x15C 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST12_TCONFA State Transition Configuration a 0x160 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST12_TCONFB State Transition Configuration B 0x164 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST13_TCONFA State Transition Configuration a 0x168 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST13_TCONFB State Transition Configuration B 0x16C 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST14_TCONFA State Transition Configuration a 0x170 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST14_TCONFB State Transition Configuration B 0x174 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST15_TCONFA State Transition Configuration a 0x178 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST15_TCONFB State Transition Configuration B 0x17C 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST16_TCONFA State Transition Configuration a 0x180 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST16_TCONFB State Transition Configuration B 0x184 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST17_TCONFA State Transition Configuration a 0x188 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST17_TCONFB State Transition Configuration B 0x18C 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST18_TCONFA State Transition Configuration a 0x190 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST18_TCONFB State Transition Configuration B 0x194 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST19_TCONFA State Transition Configuration a 0x198 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST19_TCONFB State Transition Configuration B 0x19C 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST1_TCONFA State Transition Configuration a 0x108 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST1_TCONFB State Transition Configuration B 0x10C 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST20_TCONFA State Transition Configuration a 0x1A0 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST20_TCONFB State Transition Configuration B 0x1A4 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST21_TCONFA State Transition Configuration a 0x1A8 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST21_TCONFB State Transition Configuration B 0x1AC 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST22_TCONFA State Transition Configuration a 0x1B0 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST22_TCONFB State Transition Configuration B 0x1B4 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST23_TCONFA State Transition Configuration a 0x1B8 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST23_TCONFB State Transition Configuration B 0x1BC 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST24_TCONFA State Transition Configuration a 0x1C0 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST24_TCONFB State Transition Configuration B 0x1C4 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST25_TCONFA State Transition Configuration a 0x1C8 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST25_TCONFB State Transition Configuration B 0x1CC 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST26_TCONFA State Transition Configuration a 0x1D0 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST26_TCONFB State Transition Configuration B 0x1D4 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST27_TCONFA State Transition Configuration a 0x1D8 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST27_TCONFB State Transition Configuration B 0x1DC 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST28_TCONFA State Transition Configuration a 0x1E0 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST28_TCONFB State Transition Configuration B 0x1E4 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST29_TCONFA State Transition Configuration a 0x1E8 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST29_TCONFB State Transition Configuration B 0x1EC 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST2_TCONFA State Transition Configuration a 0x110 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST2_TCONFB State Transition Configuration B 0x114 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST30_TCONFA State Transition Configuration a 0x1F0 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST30_TCONFB State Transition Configuration B 0x1F4 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST31_TCONFA State Transition Configuration a 0x1F8 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST31_TCONFB State Transition Configuration B 0x1FC 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST3_TCONFA State Transition Configuration a 0x118 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST3_TCONFB State Transition Configuration B 0x11C 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST4_TCONFA State Transition Configuration a 0x120 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST4_TCONFB State Transition Configuration B 0x124 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST5_TCONFA State Transition Configuration a 0x128 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST5_TCONFB State Transition Configuration B 0x12C 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST6_TCONFA State Transition Configuration a 0x130 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST6_TCONFB State Transition Configuration B 0x134 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST7_TCONFA State Transition Configuration a 0x138 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST7_TCONFB State Transition Configuration B 0x13C 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST8_TCONFA State Transition Configuration a 0x140 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST8_TCONFB State Transition Configuration B 0x144 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write ST9_TCONFA State Transition Configuration a 0x148 32 read-write n 0x0 0x0 CHAIN Enable State Descriptor Chaining 14 1 read-write COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag Enable 15 1 read-write ST9_TCONFB State Transition Configuration B 0x14C 32 read-write n 0x0 0x0 COMP Sensor Compare Value 0 4 read-write MASK Sensor Mask 4 4 read-write NEXTSTATE Next State Index 8 5 read-write PRSACT Configure Transition Action 16 3 read-write SETIF Set Interrupt Flag 15 1 read-write STATUS Status Register 0x28 32 read-only n 0x0 0x0 BUFDATAV Result Data Valid 0 1 read-only BUFFULL Result Buffer Full 2 1 read-only BUFHALFFULL Result Buffer Half Full 1 1 read-only DACACTIVE LESENSE VDAC Interface is Active 5 1 read-only RUNNING LESENSE Periodic Counter Running 3 1 read-only SCANACTIVE LESENSE Scan Active 4 1 read-only SYNCBUSY Synchronization Busy Register 0x60 32 read-only n 0x0 0x0 CMD CMD Register Busy 7 1 read-only TIMCTRL Timing Control Register 0x4 32 read-write n 0x0 0x0 AUXPRESC Prescaling Factor for High Frequency Timer 0 2 read-write DIV1 High frequency timer is clocked with AUXHFRCO/1 0x00000000 DIV2 High frequency timer is clocked with AUXHFRCO/2 0x00000001 DIV4 High frequency timer is clocked with AUXHFRCO/4 0x00000002 DIV8 High frequency timer is clocked with AUXHFRCO/8 0x00000003 AUXSTARTUP AUXHFRCO Startup Configuration 28 1 read-write LFPRESC Prescaling Factor for Low Frequency Timer 4 3 read-write DIV1 Low frequency timer is clocked with LFACLKLESENSE/1 0x00000000 DIV2 Low frequency timer is clocked with LFACLKLESENSE/2 0x00000001 DIV4 Low frequency timer is clocked with LFACLKLESENSE/4 0x00000002 DIV8 Low frequency timer is clocked with LFACLKLESENSE/8 0x00000003 DIV16 Low frequency timer is clocked with LFACLKLESENSE/16 0x00000004 DIV32 Low frequency timer is clocked with LFACLKLESENSE/32 0x00000005 DIV64 Low frequency timer is clocked with LFACLKLESENSE/64 0x00000006 DIV128 Low frequency timer is clocked with LFACLKLESENSE/128 0x00000007 PCPRESC Period Counter Prescaling 8 3 read-write DIV1 The period counter clock frequency is LFACLKLESENSE/1 0x00000000 DIV2 The period counter clock frequency is LFACLKLESENSE/2 0x00000001 DIV4 The period counter clock frequency is LFACLKLESENSE/4 0x00000002 DIV8 The period counter clock frequency is LFACLKLESENSE/8 0x00000003 DIV16 The period counter clock frequency is LFACLKLESENSE/16 0x00000004 DIV32 The period counter clock frequency is LFACLKLESENSE/32 0x00000005 DIV64 The period counter clock frequency is LFACLKLESENSE/64 0x00000006 DIV128 The period counter clock frequency is LFACLKLESENSE/128 0x00000007 PCTOP Period Counter Top Value 12 8 read-write STARTDLY Start Delay Configuration 22 2 read-write LETIMER0 LETIMER0 LETIMER0 0x0 0x0 0x400 registers n LETIMER0 27 CMD Command Register 0x4 32 write-only n 0x0 0x0 CLEAR Clear LETIMER 2 1 write-only CTO0 Clear Toggle Output 0 3 1 write-only CTO1 Clear Toggle Output 1 4 1 write-only START Start LETIMER 0 1 write-only STOP Stop LETIMER 1 1 write-only CNT Counter Value Register 0xC 32 read-write n 0x0 0x0 CNT Counter Value 0 16 read-write COMP0 Compare Value Register 0 0x10 32 read-write n 0x0 0x0 COMP0 Compare Value 0 0 16 read-write COMP1 Compare Value Register 1 0x14 32 read-write n 0x0 0x0 COMP1 Compare Value 1 0 16 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 BUFTOP Buffered Top 8 1 read-write COMP0TOP Compare Value 0 is Top Value 9 1 read-write DEBUGRUN Debug Mode Run Enable 12 1 read-write OPOL0 Output 0 Polarity 6 1 read-write OPOL1 Output 1 Polarity 7 1 read-write REPMODE Repeat Mode 0 2 read-write FREE When started, the LETIMER counts down until it is stopped by software 0x00000000 ONESHOT The counter counts REP0 times. When REP0 reaches zero, the counter stops 0x00000001 BUFFERED The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero, otherwise the counter stops 0x00000002 DOUBLE Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero 0x00000003 UFOA0 Underflow Output Action 0 2 2 read-write NONE LETn_O0 is held at its idle value as defined by OPOL0 0x00000000 TOGGLE LETn_O0 is toggled on CNT underflow 0x00000001 PULSE LETn_O0 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0 0x00000002 PWM LETn_O0 is set idle on CNT underflow, and active on compare match with COMP1 0x00000003 UFOA1 Underflow Output Action 1 4 2 read-write NONE LETn_O1 is held at its idle value as defined by OPOL1 0x00000000 TOGGLE LETn_O1 is toggled on CNT underflow 0x00000001 PULSE LETn_O1 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1 0x00000002 PWM LETn_O1 is set idle on CNT underflow, and active on compare match with COMP1 0x00000003 IEN Interrupt Enable Register 0x2C 32 read-write n 0x0 0x0 COMP0 COMP0 Interrupt Enable 0 1 read-write COMP1 COMP1 Interrupt Enable 1 1 read-write REP0 REP0 Interrupt Enable 3 1 read-write REP1 REP1 Interrupt Enable 4 1 read-write UF UF Interrupt Enable 2 1 read-write IF Interrupt Flag Register 0x20 32 read-only n 0x0 0x0 COMP0 Compare Match 0 Interrupt Flag 0 1 read-only COMP1 Compare Match 1 Interrupt Flag 1 1 read-only REP0 Repeat Counter 0 Interrupt Flag 3 1 read-only REP1 Repeat Counter 1 Interrupt Flag 4 1 read-only UF Underflow Interrupt Flag 2 1 read-only IFC Interrupt Flag Clear Register 0x28 32 write-only n 0x0 0x0 COMP0 Clear COMP0 Interrupt Flag 0 1 write-only COMP1 Clear COMP1 Interrupt Flag 1 1 write-only REP0 Clear REP0 Interrupt Flag 3 1 write-only REP1 Clear REP1 Interrupt Flag 4 1 write-only UF Clear UF Interrupt Flag 2 1 write-only IFS Interrupt Flag Set Register 0x24 32 write-only n 0x0 0x0 COMP0 Set COMP0 Interrupt Flag 0 1 write-only COMP1 Set COMP1 Interrupt Flag 1 1 write-only REP0 Set REP0 Interrupt Flag 3 1 write-only REP1 Set REP1 Interrupt Flag 4 1 write-only UF Set UF Interrupt Flag 2 1 write-only PRSSEL PRS Input Select Register 0x50 32 read-write n 0x0 0x0 PRSCLEARMODE PRS Clear Mode 26 2 read-write NONE PRS cannot clear the LETIMER 0x00000000 RISING Rising edge of selected PRS input can clear the LETIMER 0x00000001 FALLING Falling edge of selected PRS input can clear the LETIMER 0x00000002 BOTH Both the rising or falling edge of the selected PRS input can clear the LETIMER 0x00000003 PRSCLEARSEL PRS Clear Select 12 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 PRSSTARTMODE PRS Start Mode 18 2 read-write NONE PRS cannot start the LETIMER 0x00000000 RISING Rising edge of selected PRS input can start the LETIMER 0x00000001 FALLING Falling edge of selected PRS input can start the LETIMER 0x00000002 BOTH Both the rising or falling edge of the selected PRS input can start the LETIMER 0x00000003 PRSSTARTSEL PRS Start Select 0 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 PRSSTOPMODE PRS Stop Mode 22 2 read-write NONE PRS cannot stop the LETIMER 0x00000000 RISING Rising edge of selected PRS input can stop the LETIMER 0x00000001 FALLING Falling edge of selected PRS input can stop the LETIMER 0x00000002 BOTH Both the rising or falling edge of the selected PRS input can stop the LETIMER 0x00000003 PRSSTOPSEL PRS Stop Select 6 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 REP0 Repeat Counter Register 0 0x18 32 read-write n 0x0 0x0 REP0 Repeat Counter 0 0 8 read-write REP1 Repeat Counter Register 1 0x1C 32 read-write n 0x0 0x0 REP1 Repeat Counter 1 0 8 read-write ROUTELOC0 I/O Routing Location Register 0x44 32 read-write n 0x0 0x0 OUT0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 OUT1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTEPEN I/O Routing Pin Enable Register 0x40 32 read-write n 0x0 0x0 OUT0PEN Output 0 Pin Enable 0 1 read-write OUT1PEN Output 1 Pin Enable 1 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 RUNNING LETIMER Running 0 1 read-only SYNCBUSY Synchronization Busy Register 0x34 32 read-only n 0x0 0x0 CMD CMD Register Busy 1 1 read-only LETIMER1 LETIMER1 LETIMER1 0x0 0x0 0x400 registers n LETIMER1 65 CMD Command Register 0x4 32 write-only n 0x0 0x0 CLEAR Clear LETIMER 2 1 write-only CTO0 Clear Toggle Output 0 3 1 write-only CTO1 Clear Toggle Output 1 4 1 write-only START Start LETIMER 0 1 write-only STOP Stop LETIMER 1 1 write-only CNT Counter Value Register 0xC 32 read-write n 0x0 0x0 CNT Counter Value 0 16 read-write COMP0 Compare Value Register 0 0x10 32 read-write n 0x0 0x0 COMP0 Compare Value 0 0 16 read-write COMP1 Compare Value Register 1 0x14 32 read-write n 0x0 0x0 COMP1 Compare Value 1 0 16 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 BUFTOP Buffered Top 8 1 read-write COMP0TOP Compare Value 0 is Top Value 9 1 read-write DEBUGRUN Debug Mode Run Enable 12 1 read-write OPOL0 Output 0 Polarity 6 1 read-write OPOL1 Output 1 Polarity 7 1 read-write REPMODE Repeat Mode 0 2 read-write FREE When started, the LETIMER counts down until it is stopped by software 0x00000000 ONESHOT The counter counts REP0 times. When REP0 reaches zero, the counter stops 0x00000001 BUFFERED The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero, otherwise the counter stops 0x00000002 DOUBLE Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero 0x00000003 UFOA0 Underflow Output Action 0 2 2 read-write NONE LETn_O0 is held at its idle value as defined by OPOL0 0x00000000 TOGGLE LETn_O0 is toggled on CNT underflow 0x00000001 PULSE LETn_O0 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0 0x00000002 PWM LETn_O0 is set idle on CNT underflow, and active on compare match with COMP1 0x00000003 UFOA1 Underflow Output Action 1 4 2 read-write NONE LETn_O1 is held at its idle value as defined by OPOL1 0x00000000 TOGGLE LETn_O1 is toggled on CNT underflow 0x00000001 PULSE LETn_O1 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1 0x00000002 PWM LETn_O1 is set idle on CNT underflow, and active on compare match with COMP1 0x00000003 IEN Interrupt Enable Register 0x2C 32 read-write n 0x0 0x0 COMP0 COMP0 Interrupt Enable 0 1 read-write COMP1 COMP1 Interrupt Enable 1 1 read-write REP0 REP0 Interrupt Enable 3 1 read-write REP1 REP1 Interrupt Enable 4 1 read-write UF UF Interrupt Enable 2 1 read-write IF Interrupt Flag Register 0x20 32 read-only n 0x0 0x0 COMP0 Compare Match 0 Interrupt Flag 0 1 read-only COMP1 Compare Match 1 Interrupt Flag 1 1 read-only REP0 Repeat Counter 0 Interrupt Flag 3 1 read-only REP1 Repeat Counter 1 Interrupt Flag 4 1 read-only UF Underflow Interrupt Flag 2 1 read-only IFC Interrupt Flag Clear Register 0x28 32 write-only n 0x0 0x0 COMP0 Clear COMP0 Interrupt Flag 0 1 write-only COMP1 Clear COMP1 Interrupt Flag 1 1 write-only REP0 Clear REP0 Interrupt Flag 3 1 write-only REP1 Clear REP1 Interrupt Flag 4 1 write-only UF Clear UF Interrupt Flag 2 1 write-only IFS Interrupt Flag Set Register 0x24 32 write-only n 0x0 0x0 COMP0 Set COMP0 Interrupt Flag 0 1 write-only COMP1 Set COMP1 Interrupt Flag 1 1 write-only REP0 Set REP0 Interrupt Flag 3 1 write-only REP1 Set REP1 Interrupt Flag 4 1 write-only UF Set UF Interrupt Flag 2 1 write-only PRSSEL PRS Input Select Register 0x50 32 read-write n 0x0 0x0 PRSCLEARMODE PRS Clear Mode 26 2 read-write NONE PRS cannot clear the LETIMER 0x00000000 RISING Rising edge of selected PRS input can clear the LETIMER 0x00000001 FALLING Falling edge of selected PRS input can clear the LETIMER 0x00000002 BOTH Both the rising or falling edge of the selected PRS input can clear the LETIMER 0x00000003 PRSCLEARSEL PRS Clear Select 12 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 PRSSTARTMODE PRS Start Mode 18 2 read-write NONE PRS cannot start the LETIMER 0x00000000 RISING Rising edge of selected PRS input can start the LETIMER 0x00000001 FALLING Falling edge of selected PRS input can start the LETIMER 0x00000002 BOTH Both the rising or falling edge of the selected PRS input can start the LETIMER 0x00000003 PRSSTARTSEL PRS Start Select 0 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 PRSSTOPMODE PRS Stop Mode 22 2 read-write NONE PRS cannot stop the LETIMER 0x00000000 RISING Rising edge of selected PRS input can stop the LETIMER 0x00000001 FALLING Falling edge of selected PRS input can stop the LETIMER 0x00000002 BOTH Both the rising or falling edge of the selected PRS input can stop the LETIMER 0x00000003 PRSSTOPSEL PRS Stop Select 6 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 REP0 Repeat Counter Register 0 0x18 32 read-write n 0x0 0x0 REP0 Repeat Counter 0 0 8 read-write REP1 Repeat Counter Register 1 0x1C 32 read-write n 0x0 0x0 REP1 Repeat Counter 1 0 8 read-write ROUTELOC0 I/O Routing Location Register 0x44 32 read-write n 0x0 0x0 OUT0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 OUT1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTEPEN I/O Routing Pin Enable Register 0x40 32 read-write n 0x0 0x0 OUT0PEN Output 0 Pin Enable 0 1 read-write OUT1PEN Output 1 Pin Enable 1 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 RUNNING LETIMER Running 0 1 read-only SYNCBUSY Synchronization Busy Register 0x34 32 read-only n 0x0 0x0 CMD CMD Register Busy 1 1 read-only LEUART0 LEUART0 LEUART0 0x0 0x0 0x400 registers n LEUART0 25 CLKDIV Clock Control Register 0xC 32 read-write n 0x0 0x0 DIV Fractional Clock Divider 3 14 read-write CMD Command Register 0x4 32 write-only n 0x0 0x0 CLEARRX Clear RX 7 1 write-only CLEARTX Clear TX 6 1 write-only RXBLOCKDIS Receiver Block Disable 5 1 write-only RXBLOCKEN Receiver Block Enable 4 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOTRI Automatic Transmitter Tristate 0 1 read-write BIT8DV Bit 8 Default Value 11 1 read-write DATABITS Data-Bit Mode 1 1 read-write ERRSDMA Clear RX DMA on Error 6 1 read-write INV Invert Input and Output 5 1 read-write LOOPBK Loopback Enable 7 1 read-write MPAB Multi-Processor Address-Bit 10 1 read-write MPM Multi-Processor Mode 9 1 read-write PARITY Parity-Bit Mode 2 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 RXDMAWU RX DMA Wakeup 12 1 read-write SFUBRX Start-Frame UnBlock RX 8 1 read-write STOPBITS Stop-Bit Mode 4 1 read-write TXDELAY TX Delay Transmission 14 2 read-write NONE Frames are transmitted immediately 0x00000000 SINGLE Transmission of new frames are delayed by a single bit period 0x00000001 DOUBLE Transmission of new frames are delayed by two bit periods 0x00000002 TRIPLE Transmission of new frames are delayed by three bit periods 0x00000003 TXDMAWU TX DMA Wakeup 13 1 read-write FREEZE Freeze Register 0x40 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x38 32 read-write n 0x0 0x0 FERR FERR Interrupt Enable 7 1 read-write MPAF MPAF Interrupt Enable 8 1 read-write PERR PERR Interrupt Enable 6 1 read-write RXDATAV RXDATAV Interrupt Enable 2 1 read-write RXOF RXOF Interrupt Enable 3 1 read-write RXUF RXUF Interrupt Enable 4 1 read-write SIGF SIGF Interrupt Enable 10 1 read-write STARTF STARTF Interrupt Enable 9 1 read-write TXBL TXBL Interrupt Enable 1 1 read-write TXC TXC Interrupt Enable 0 1 read-write TXOF TXOF Interrupt Enable 5 1 read-write IF Interrupt Flag Register 0x2C 32 read-only n 0x0 0x0 FERR Framing Error Interrupt Flag 7 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 8 1 read-only PERR Parity Error Interrupt Flag 6 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXOF RX Overflow Interrupt Flag 3 1 read-only RXUF RX Underflow Interrupt Flag 4 1 read-only SIGF Signal Frame Interrupt Flag 10 1 read-only STARTF Start Frame Interrupt Flag 9 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXOF TX Overflow Interrupt Flag 5 1 read-only IFC Interrupt Flag Clear Register 0x34 32 write-only n 0x0 0x0 FERR Clear FERR Interrupt Flag 7 1 write-only MPAF Clear MPAF Interrupt Flag 8 1 write-only PERR Clear PERR Interrupt Flag 6 1 write-only RXOF Clear RXOF Interrupt Flag 3 1 write-only RXUF Clear RXUF Interrupt Flag 4 1 write-only SIGF Clear SIGF Interrupt Flag 10 1 write-only STARTF Clear STARTF Interrupt Flag 9 1 write-only TXC Clear TXC Interrupt Flag 0 1 write-only TXOF Clear TXOF Interrupt Flag 5 1 write-only IFS Interrupt Flag Set Register 0x30 32 write-only n 0x0 0x0 FERR Set FERR Interrupt Flag 7 1 write-only MPAF Set MPAF Interrupt Flag 8 1 write-only PERR Set PERR Interrupt Flag 6 1 write-only RXOF Set RXOF Interrupt Flag 3 1 write-only RXUF Set RXUF Interrupt Flag 4 1 write-only SIGF Set SIGF Interrupt Flag 10 1 write-only STARTF Set STARTF Interrupt Flag 9 1 write-only TXC Set TXC Interrupt Flag 0 1 write-only TXOF Set TXOF Interrupt Flag 5 1 write-only INPUT LEUART Input Register 0x64 32 read-write n 0x0 0x0 RXPRS PRS RX Enable 5 1 read-write RXPRSSEL RX PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 PULSECTRL Pulse Control Register 0x3C 32 read-write n 0x0 0x0 PULSEEN Pulse Generator/Extender Enable 4 1 read-write PULSEFILT Pulse Filter 5 1 read-write PULSEW Pulse Width 0 4 read-write ROUTELOC0 I/O Routing Location Register 0x58 32 read-write n 0x0 0x0 RXLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 TXLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 ROUTEPEN I/O Routing Pin Enable Register 0x54 32 read-write n 0x0 0x0 RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA Receive Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX Receive Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Receive Data Framing Error 15 1 read-only PERR Receive Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP Receive Buffer Data Extended Peek Register 0x20 32 read-only n 0x0 0x0 FERRP Receive Data Framing Error Peek 15 1 read-only PERRP Receive Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only SIGFRAME Signal Frame Register 0x14 32 read-write n 0x0 0x0 SIGFRAME Signal Frame 0 9 read-write STARTFRAME Start Frame Register 0x10 32 read-write n 0x0 0x0 STARTFRAME Start Frame 0 9 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 RXBLOCK Block Incoming Data 2 1 read-only RXDATAV RX Data Valid 5 1 read-only RXENS Receiver Enable Status 0 1 read-only TXBL TX Buffer Level 4 1 read-only TXC TX Complete 3 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXIDLE TX Idle 6 1 read-only SYNCBUSY Synchronization Busy Register 0x44 32 read-only n 0x0 0x0 CLKDIV CLKDIV Register Busy 2 1 read-only CMD CMD Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only PULSECTRL PULSECTRL Register Busy 7 1 read-only SIGFRAME SIGFRAME Register Busy 4 1 read-only STARTFRAME STARTFRAME Register Busy 3 1 read-only TXDATA TXDATA Register Busy 6 1 read-only TXDATAX TXDATAX Register Busy 5 1 read-only TXDATA Transmit Buffer Data Register 0x28 32 read-write n 0x0 0x0 TXDATA TX Data 0 8 read-write TXDATAX Transmit Buffer Data Extended Register 0x24 32 read-write n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 read-write TXBREAK Transmit Data as Break 13 1 read-write TXDATA TX Data 0 9 read-write TXDISAT Disable TX After Transmission 14 1 read-write LEUART1 LEUART1 LEUART1 0x0 0x0 0x400 registers n LEUART1 26 CLKDIV Clock Control Register 0xC 32 read-write n 0x0 0x0 DIV Fractional Clock Divider 3 14 read-write CMD Command Register 0x4 32 write-only n 0x0 0x0 CLEARRX Clear RX 7 1 write-only CLEARTX Clear TX 6 1 write-only RXBLOCKDIS Receiver Block Disable 5 1 write-only RXBLOCKEN Receiver Block Enable 4 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOTRI Automatic Transmitter Tristate 0 1 read-write BIT8DV Bit 8 Default Value 11 1 read-write DATABITS Data-Bit Mode 1 1 read-write ERRSDMA Clear RX DMA on Error 6 1 read-write INV Invert Input and Output 5 1 read-write LOOPBK Loopback Enable 7 1 read-write MPAB Multi-Processor Address-Bit 10 1 read-write MPM Multi-Processor Mode 9 1 read-write PARITY Parity-Bit Mode 2 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 RXDMAWU RX DMA Wakeup 12 1 read-write SFUBRX Start-Frame UnBlock RX 8 1 read-write STOPBITS Stop-Bit Mode 4 1 read-write TXDELAY TX Delay Transmission 14 2 read-write NONE Frames are transmitted immediately 0x00000000 SINGLE Transmission of new frames are delayed by a single bit period 0x00000001 DOUBLE Transmission of new frames are delayed by two bit periods 0x00000002 TRIPLE Transmission of new frames are delayed by three bit periods 0x00000003 TXDMAWU TX DMA Wakeup 13 1 read-write FREEZE Freeze Register 0x40 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x38 32 read-write n 0x0 0x0 FERR FERR Interrupt Enable 7 1 read-write MPAF MPAF Interrupt Enable 8 1 read-write PERR PERR Interrupt Enable 6 1 read-write RXDATAV RXDATAV Interrupt Enable 2 1 read-write RXOF RXOF Interrupt Enable 3 1 read-write RXUF RXUF Interrupt Enable 4 1 read-write SIGF SIGF Interrupt Enable 10 1 read-write STARTF STARTF Interrupt Enable 9 1 read-write TXBL TXBL Interrupt Enable 1 1 read-write TXC TXC Interrupt Enable 0 1 read-write TXOF TXOF Interrupt Enable 5 1 read-write IF Interrupt Flag Register 0x2C 32 read-only n 0x0 0x0 FERR Framing Error Interrupt Flag 7 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 8 1 read-only PERR Parity Error Interrupt Flag 6 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXOF RX Overflow Interrupt Flag 3 1 read-only RXUF RX Underflow Interrupt Flag 4 1 read-only SIGF Signal Frame Interrupt Flag 10 1 read-only STARTF Start Frame Interrupt Flag 9 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXOF TX Overflow Interrupt Flag 5 1 read-only IFC Interrupt Flag Clear Register 0x34 32 write-only n 0x0 0x0 FERR Clear FERR Interrupt Flag 7 1 write-only MPAF Clear MPAF Interrupt Flag 8 1 write-only PERR Clear PERR Interrupt Flag 6 1 write-only RXOF Clear RXOF Interrupt Flag 3 1 write-only RXUF Clear RXUF Interrupt Flag 4 1 write-only SIGF Clear SIGF Interrupt Flag 10 1 write-only STARTF Clear STARTF Interrupt Flag 9 1 write-only TXC Clear TXC Interrupt Flag 0 1 write-only TXOF Clear TXOF Interrupt Flag 5 1 write-only IFS Interrupt Flag Set Register 0x30 32 write-only n 0x0 0x0 FERR Set FERR Interrupt Flag 7 1 write-only MPAF Set MPAF Interrupt Flag 8 1 write-only PERR Set PERR Interrupt Flag 6 1 write-only RXOF Set RXOF Interrupt Flag 3 1 write-only RXUF Set RXUF Interrupt Flag 4 1 write-only SIGF Set SIGF Interrupt Flag 10 1 write-only STARTF Set STARTF Interrupt Flag 9 1 write-only TXC Set TXC Interrupt Flag 0 1 write-only TXOF Set TXOF Interrupt Flag 5 1 write-only INPUT LEUART Input Register 0x64 32 read-write n 0x0 0x0 RXPRS PRS RX Enable 5 1 read-write RXPRSSEL RX PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 PULSECTRL Pulse Control Register 0x3C 32 read-write n 0x0 0x0 PULSEEN Pulse Generator/Extender Enable 4 1 read-write PULSEFILT Pulse Filter 5 1 read-write PULSEW Pulse Width 0 4 read-write ROUTELOC0 I/O Routing Location Register 0x58 32 read-write n 0x0 0x0 RXLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 TXLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 ROUTEPEN I/O Routing Pin Enable Register 0x54 32 read-write n 0x0 0x0 RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA Receive Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX Receive Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Receive Data Framing Error 15 1 read-only PERR Receive Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP Receive Buffer Data Extended Peek Register 0x20 32 read-only n 0x0 0x0 FERRP Receive Data Framing Error Peek 15 1 read-only PERRP Receive Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only SIGFRAME Signal Frame Register 0x14 32 read-write n 0x0 0x0 SIGFRAME Signal Frame 0 9 read-write STARTFRAME Start Frame Register 0x10 32 read-write n 0x0 0x0 STARTFRAME Start Frame 0 9 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 RXBLOCK Block Incoming Data 2 1 read-only RXDATAV RX Data Valid 5 1 read-only RXENS Receiver Enable Status 0 1 read-only TXBL TX Buffer Level 4 1 read-only TXC TX Complete 3 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXIDLE TX Idle 6 1 read-only SYNCBUSY Synchronization Busy Register 0x44 32 read-only n 0x0 0x0 CLKDIV CLKDIV Register Busy 2 1 read-only CMD CMD Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only PULSECTRL PULSECTRL Register Busy 7 1 read-only SIGFRAME SIGFRAME Register Busy 4 1 read-only STARTFRAME STARTFRAME Register Busy 3 1 read-only TXDATA TXDATA Register Busy 6 1 read-only TXDATAX TXDATAX Register Busy 5 1 read-only TXDATA Transmit Buffer Data Register 0x28 32 read-write n 0x0 0x0 TXDATA TX Data 0 8 read-write TXDATAX Transmit Buffer Data Extended Register 0x24 32 read-write n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 read-write TXBREAK Transmit Data as Break 13 1 read-write TXDATA TX Data 0 9 read-write TXDISAT Disable TX After Transmission 14 1 read-write MSC MSC MSC 0x0 0x0 0x800 registers n MSC 33 AAPUNLOCKCMD Software Unlock AAP Command Register 0x94 32 write-only n 0x0 0x0 UNLOCKAAP Software Unlock AAP Command 0 1 write-only ADDRB Page Erase/Write Address Buffer 0x10 32 read-write n 0x0 0x0 ADDRB Page Erase or Write Address Buffer 0 32 read-write BANKSWITCHLOCK Bank Switching Lock Register 0x70 32 read-write n 0x0 0x0 BANKSWITCHLOCKKEY Bank Switching Lock 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 BOOTLOADERCTRL Bootloader Read and Write Enable, Write Once Register 0x90 32 read-write n 0x0 0x0 BLRDIS Flash Bootloader Read Disable 0 1 read-write BLWDIS Flash Bootloader Write/Erase Disable 1 1 read-write CACHECMD Flash Cache Command Register 0x44 32 write-only n 0x0 0x0 INVCACHE Invalidate Instruction Cache 0 1 write-only STARTPC Start Performance Counters 1 1 write-only STOPPC Stop Performance Counters 2 1 write-only CACHECONFIG0 Cache Configuration Register 0 0x98 32 read-write n 0x0 0x0 CACHELPLEVEL Instruction Cache Low-Power Level 0 2 read-write BASE Base instruction cache functionality. 0x00000000 ADVANCED Advanced buffering mode, where the cache uses the fetch pattern to predict highly accessed data and store it in low-energy memory. 0x00000001 MINACTIVITY Minimum activity mode, which allows the cache to minimize activity in logic that it predicts has a low probability being used. This mode can introduce wait-states into the instruction fetch stream when the cache exits one of its low-activity states. The number of wait-states introduced is small, but users running with 0-wait-state memory and wishing to reduce the variability that the cache might introduce with additional wait-states may wish to lower the cache low-power level. Note, this mode includes the advanced buffering mode functionality. 0x00000003 CACHEHITS Cache Hits Performance Counter 0x48 32 read-only n 0x0 0x0 CACHEHITS Cache Hits Since Last Performance Counter Start Command 0 20 read-only CACHEMISSES Cache Misses Performance Counter 0x4C 32 read-only n 0x0 0x0 CACHEMISSES Cache Misses Since Last Performance Counter Start Command 0 20 read-only CMD Command Register 0x74 32 write-only n 0x0 0x0 PWRUP Flash Power Up Command 0 1 write-only SWITCHINGBANK BANK SWITCHING COMMAND 1 1 write-only CTRL Memory System Control Register 0x0 32 read-write n 0x0 0x0 ADDRFAULTEN Invalid Address Bus Fault Response Enable 0 1 read-write CLKDISFAULTEN Clock-disabled Bus Fault Response Enable 1 1 read-write EBIFAULTEN EBI Bus Fault Response Enable 6 1 read-write IFCREADCLEAR IFC Read Clears IF 3 1 read-write PWRUPONDEMAND Power Up on Demand During Wake Up 2 1 read-write RAMECCERRFAULTEN Two Bit ECC Error Bus Fault Response Enable 5 1 read-write TIMEOUTFAULTEN Timeout Bus Fault Response Enable 4 1 read-write WAITMODE Peripheral Access Wait Mode 12 1 read-write ECCCTRL RAM ECC Control Register 0x104 32 read-write n 0x0 0x0 RAM1ECCCHKEN RAM1 ECC Check Enable 3 1 read-write RAM1ECCEWEN RAM1 ECC Write Enable 2 1 read-write RAMECCCHKEN RAM ECC Check Enable 1 1 read-write RAMECCEWEN RAM ECC Write Enable 0 1 read-write IEN Interrupt Enable Register 0x3C 32 read-write n 0x0 0x0 CHOF CHOF Interrupt Enable 2 1 read-write CMOF CMOF Interrupt Enable 3 1 read-write ERASE ERASE Interrupt Enable 0 1 read-write ICACHERR ICACHERR Interrupt Enable 5 1 read-write LVEWRITE LVEWRITE Interrupt Enable 8 1 read-write PWRUPF PWRUPF Interrupt Enable 4 1 read-write RAM1ERR1B RAM1ERR1B Interrupt Enable 18 1 read-write RAM1ERR2B RAM1ERR2B Interrupt Enable 19 1 read-write RAMERR1B RAMERR1B Interrupt Enable 16 1 read-write RAMERR2B RAMERR2B Interrupt Enable 17 1 read-write WDATAOV WDATAOV Interrupt Enable 6 1 read-write WRITE WRITE Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0x30 32 read-only n 0x0 0x0 CHOF Cache Hits Overflow Interrupt Flag 2 1 read-only CMOF Cache Misses Overflow Interrupt Flag 3 1 read-only ERASE Erase Done Interrupt Read Flag 0 1 read-only ICACHERR ICache RAM Parity Error Flag 5 1 read-only LVEWRITE Flash LVE Write Error Flag 8 1 read-only PWRUPF Flash Power Up Sequence Complete Flag 4 1 read-only RAM1ERR1B RAM1 1-bit ECC Error Interrupt Flag 18 1 read-only RAM1ERR2B RAM1 2-bit ECC Error Interrupt Flag 19 1 read-only RAMERR1B RAM 1-bit ECC Error Interrupt Flag 16 1 read-only RAMERR2B RAM 2-bit ECC Error Interrupt Flag 17 1 read-only WDATAOV Flash Controller Write Buffer Overflow 6 1 read-only WRITE Write Done Interrupt Read Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x38 32 write-only n 0x0 0x0 CHOF Clear CHOF Interrupt Flag 2 1 write-only CMOF Clear CMOF Interrupt Flag 3 1 write-only ERASE Clear ERASE Interrupt Flag 0 1 write-only ICACHERR Clear ICACHERR Interrupt Flag 5 1 write-only LVEWRITE Clear LVEWRITE Interrupt Flag 8 1 write-only PWRUPF Clear PWRUPF Interrupt Flag 4 1 write-only RAM1ERR1B Clear RAM1ERR1B Interrupt Flag 18 1 write-only RAM1ERR2B Clear RAM1ERR2B Interrupt Flag 19 1 write-only RAMERR1B Clear RAMERR1B Interrupt Flag 16 1 write-only RAMERR2B Clear RAMERR2B Interrupt Flag 17 1 write-only WDATAOV Clear WDATAOV Interrupt Flag 6 1 write-only WRITE Clear WRITE Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x34 32 write-only n 0x0 0x0 CHOF Set CHOF Interrupt Flag 2 1 write-only CMOF Set CMOF Interrupt Flag 3 1 write-only ERASE Set ERASE Interrupt Flag 0 1 write-only ICACHERR Set ICACHERR Interrupt Flag 5 1 write-only LVEWRITE Set LVEWRITE Interrupt Flag 8 1 write-only PWRUPF Set PWRUPF Interrupt Flag 4 1 write-only RAM1ERR1B Set RAM1ERR1B Interrupt Flag 18 1 write-only RAM1ERR2B Set RAM1ERR2B Interrupt Flag 19 1 write-only RAMERR1B Set RAMERR1B Interrupt Flag 16 1 write-only RAMERR2B Set RAMERR2B Interrupt Flag 17 1 write-only WDATAOV Set WDATAOV Interrupt Flag 6 1 write-only WRITE Set WRITE Interrupt Flag 1 1 write-only LOCK Configuration Lock Register 0x40 32 read-write n 0x0 0x0 LOCKKEY Configuration Lock 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 MASSLOCK Mass Erase Lock Register 0x54 32 read-write n 0x0 0x0 LOCKKEY Mass Erase Lock 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 RAM1ECCADDR RAM1 ECC Error Address Register 0x10C 32 read-only n 0x0 0x0 RAM1ECCADDR RAM1 ECC Error Address 0 32 read-only RAMCTRL RAM Control Enable Register 0x100 32 read-write n 0x0 0x0 RAM1PREFETCHEN RAM1 Prefetch Enable 10 1 read-write RAM1WSEN RAM1 WAIT STATE Enable 9 1 read-write RAM2CACHEEN RAM2 CACHE Enable 16 1 read-write RAM2PREFETCHEN RAM2 Prefetch Enable 18 1 read-write RAM2WSEN RAM2 WAIT STATE Enable 17 1 read-write RAMPREFETCHEN RAM Prefetch Enable 2 1 read-write RAMWSEN RAM WAIT STATE Enable 1 1 read-write RAMECCADDR RAM ECC Error Address Register 0x108 32 read-only n 0x0 0x0 RAMECCADDR RAM ECC Error Address 0 32 read-only READCTRL Read Control Register 0x4 32 read-write n 0x0 0x0 AIDIS Automatic Invalidate Disable 4 1 read-write EBICDIS External Bus Interface Cache Disable 6 1 read-write ICCDIS Interrupt Context Cache Disable 5 1 read-write IFCDIS Internal Flash Cache Disable 3 1 read-write MODE Read Mode 24 2 read-write WS0 Zero wait-states inserted in fetch or read transfers 0x00000000 WS1 One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details 0x00000001 WS2 Two wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details 0x00000002 WS3 Three wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details 0x00000003 PREFETCH Prefetch Mode 8 1 read-write QSPICDIS QSPI Cache Disable 10 1 read-write SCBTP Suppress Conditional Branch Target Perfetch 28 1 read-write USEHPROT AHB_HPROT Mode 9 1 read-write STARTUP Startup Control 0x5C 32 read-write n 0x0 0x0 ASTWAIT Active Startup Wait 24 1 read-write STDLY0 Startup Delay 0 0 10 read-write STDLY1 Startup Delay 0 12 10 read-write STWS Startup Waitstates 28 3 read-write STWSAEN Startup Waitstates Always Enable 26 1 read-write STWSEN Startup Waitstates Enable 25 1 read-write STATUS Status Register 0x1C 32 read-only n 0x0 0x0 BANKSWITCHED BANK SWITCHING STATUS 7 1 read-only BUSY Erase/Write Busy 0 1 read-only ERASEABORTED The Current Flash Erase Operation Aborted 5 1 read-only INVADDR Invalid Write Address or Erase Page 2 1 read-only LOCKED Access Locked 1 1 read-only PCRUNNING Performance Counters Running 6 1 read-only PWRUPCKBDFAILCOUNT Flash Power Up Checkerboard Pattern Check Fail Count 28 4 read-only WDATAREADY WDATA Write Ready 3 1 read-only WDATAVALID Write Data Buffer Valid Flag 24 4 read-only WORDTIMEOUT Flash Write Word Timeout 4 1 read-only WDATA Write Data Register 0x18 32 read-write n 0x0 0x0 WDATA Write Data 0 32 read-write WRITECMD Write Command Register 0xC 32 write-only n 0x0 0x0 CLEARWDATA Clear WDATA State 12 1 write-only ERASEABORT Abort Erase Sequence 5 1 write-only ERASEMAIN0 Mass Erase Region 0 8 1 write-only ERASEMAIN1 Mass Erase Region 1 9 1 write-only ERASEPAGE Erase Page 1 1 write-only LADDRIM Load MSC_ADDRB Into ADDR 0 1 write-only WRITEEND End Write Mode 2 1 write-only WRITEONCE Word Write-Once Trigger 3 1 write-only WRITETRIG Word Write Sequence Trigger 4 1 write-only WRITECTRL Write Control Register 0x8 32 read-write n 0x0 0x0 IRQERASEABORT Abort Page Erase on Interrupt 1 1 read-write RWWEN Read-While-Write Enable 5 1 read-write WREN Enable Write/Erase Controller 0 1 read-write PCNT0 PCNT0 PCNT0 0x0 0x0 0x400 registers n PCNT0 28 AUXCNT Auxiliary Counter Value Register 0x64 32 read-only n 0x0 0x0 AUXCNT Auxiliary Counter Value 0 16 read-only CMD Command Register 0x4 32 write-only n 0x0 0x0 LCNTIM Load CNT Immediately 0 1 write-only LTOPBIM Load TOPB Immediately 1 1 write-only CNT Counter Value Register 0xC 32 read-only n 0x0 0x0 CNT Counter Value 0 16 read-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUXCNTEV Controls When the Auxiliary Counter Counts 12 2 read-write NONE Never counts. 0x00000000 UP Counts up on up-count events. 0x00000001 DOWN Counts up on down-count events. 0x00000002 BOTH Counts up on both up-count and down-count events. 0x00000003 AUXCNTRSTEN Enable AUXCNT Reset 6 1 read-write CNTDIR Non-Quadrature Mode Counter Direction Control 14 1 read-write CNTEV Controls When the Counter Counts 10 2 read-write BOTH Counts up on up-count and down on down-count events. 0x00000000 UP Only counts up on up-count events. 0x00000001 DOWN Only counts down on down-count events. 0x00000002 NONE Never counts. 0x00000003 CNTRSTEN Enable CNT Reset 5 1 read-write DEBUGHALT Debug Mode Halt Enable 7 1 read-write EDGE Edge Select 15 1 read-write FILT Enable Digital Pulse Width Filter 3 1 read-write HYST Enable Hysteresis 8 1 read-write MODE Mode Select 0 3 read-write DISABLE The module is disabled. 0x00000000 OVSSINGLE Single input LFACLK oversampling mode (available in EM0-EM3). 0x00000001 EXTCLKSINGLE Externally clocked single input counter mode (available in EM0-EM3). 0x00000002 EXTCLKQUAD Externally clocked quadrature decoder mode (available in EM0-EM3). 0x00000003 OVSQUAD1X LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM3). 0x00000004 OVSQUAD2X LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM3). 0x00000005 OVSQUAD4X LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM3). 0x00000006 PRSGATEEN PRS Gate Enable 24 1 read-write RSTEN Enable PCNT Clock Domain Reset 4 1 read-write S1CDIR Count Direction Determined By S1 9 1 read-write TCCCOMP Triggered Compare and Clear Compare Mode 22 2 read-write LTOE Compare match if PCNT_CNT is less than, or equal to PCNT_TOP. 0x00000000 GTOE Compare match if PCNT_CNT is greater than or equal to PCNT_TOP. 0x00000001 RANGE Compare match if PCNT_CNT is less than, or equal to PCNT_TOP[15:8]], and greater than, or equal to PCNT_TOP[7:0]. 0x00000002 TCCMODE Sets the Mode for Triggered Compare and Clear 16 2 read-write DISABLED Triggered compare and clear not enabled. 0x00000000 LFA Compare and clear performed on each (optionally prescaled) LFA clock cycle. 0x00000001 PRS Compare and clear performed on positive PRS edges. 0x00000002 TCCPRESC Set the LFA Prescaler for Triggered Compare and Clear 19 2 read-write DIV1 Compare and clear event each LFA cycle. 0x00000000 DIV2 Compare and clear performed on every other LFA cycle. 0x00000001 DIV4 Compare and clear performed on every 4th LFA cycle. 0x00000002 DIV8 Compare and clear performed on every 8th LFA cycle. 0x00000003 TCCPRSPOL TCC PRS Polarity Select 25 1 read-write TCCPRSSEL TCC PRS Channel Select 26 5 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B PRSCH12 PRS Channel 12 selected. 0x0000000C PRSCH13 PRS Channel 13 selected. 0x0000000D PRSCH14 PRS Channel 14 selected. 0x0000000E PRSCH15 PRS Channel 15 selected. 0x0000000F PRSCH16 PRS Channel 16 selected. 0x00000010 PRSCH17 PRS Channel 17 selected. 0x00000011 PRSCH18 PRS Channel 18 selected. 0x00000012 PRSCH19 PRS Channel 19 selected. 0x00000013 PRSCH20 PRS Channel 20 selected. 0x00000014 PRSCH21 PRS Channel 21 selected. 0x00000015 PRSCH22 PRS Channel 22 selected. 0x00000016 PRSCH23 PRS Channel 23 selected. 0x00000017 TOPBHFSEL TOPB High Frequency Value Select 31 1 read-write FREEZE Freeze Register 0x40 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x24 32 read-write n 0x0 0x0 AUXOF AUXOF Interrupt Enable 3 1 read-write DIRCNG DIRCNG Interrupt Enable 2 1 read-write OF OF Interrupt Enable 1 1 read-write OQSTERR OQSTERR Interrupt Enable 5 1 read-write TCC TCC Interrupt Enable 4 1 read-write UF UF Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0x18 32 read-only n 0x0 0x0 AUXOF Auxiliary Overflow Interrupt Read Flag 3 1 read-only DIRCNG Direction Change Detect Interrupt Flag 2 1 read-only OF Overflow Interrupt Read Flag 1 1 read-only OQSTERR Oversampling Quadrature State Error Interrupt 5 1 read-only TCC Triggered Compare Interrupt Read Flag 4 1 read-only UF Underflow Interrupt Read Flag 0 1 read-only IFC Interrupt Flag Clear Register 0x20 32 write-only n 0x0 0x0 AUXOF Clear AUXOF Interrupt Flag 3 1 write-only DIRCNG Clear DIRCNG Interrupt Flag 2 1 write-only OF Clear OF Interrupt Flag 1 1 write-only OQSTERR Clear OQSTERR Interrupt Flag 5 1 write-only TCC Clear TCC Interrupt Flag 4 1 write-only UF Clear UF Interrupt Flag 0 1 write-only IFS Interrupt Flag Set Register 0x1C 32 write-only n 0x0 0x0 AUXOF Set AUXOF Interrupt Flag 3 1 write-only DIRCNG Set DIRCNG Interrupt Flag 2 1 write-only OF Set OF Interrupt Flag 1 1 write-only OQSTERR Set OQSTERR Interrupt Flag 5 1 write-only TCC Set TCC Interrupt Flag 4 1 write-only UF Set UF Interrupt Flag 0 1 write-only INPUT PCNT Input Register 0x68 32 read-write n 0x0 0x0 S0PRSEN S0IN PRS Enable 5 1 read-write S0PRSSEL S0IN PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B PRSCH12 PRS Channel 12 selected. 0x0000000C PRSCH13 PRS Channel 13 selected. 0x0000000D PRSCH14 PRS Channel 14 selected. 0x0000000E PRSCH15 PRS Channel 15 selected. 0x0000000F PRSCH16 PRS Channel 16 selected. 0x00000010 PRSCH17 PRS Channel 17 selected. 0x00000011 PRSCH18 PRS Channel 18 selected. 0x00000012 PRSCH19 PRS Channel 19 selected. 0x00000013 PRSCH20 PRS Channel 20 selected. 0x00000014 PRSCH21 PRS Channel 21 selected. 0x00000015 PRSCH22 PRS Channel 22 selected. 0x00000016 PRSCH23 PRS Channel 23 selected. 0x00000017 S1PRSEN S1IN PRS Enable 11 1 read-write S1PRSSEL S1IN PRS Channel Select 6 5 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B PRSCH12 PRS Channel 12 selected. 0x0000000C PRSCH13 PRS Channel 13 selected. 0x0000000D PRSCH14 PRS Channel 14 selected. 0x0000000E PRSCH15 PRS Channel 15 selected. 0x0000000F PRSCH16 PRS Channel 16 selected. 0x00000010 PRSCH17 PRS Channel 17 selected. 0x00000011 PRSCH18 PRS Channel 18 selected. 0x00000012 PRSCH19 PRS Channel 19 selected. 0x00000013 PRSCH20 PRS Channel 20 selected. 0x00000014 PRSCH21 PRS Channel 21 selected. 0x00000015 PRSCH22 PRS Channel 22 selected. 0x00000016 PRSCH23 PRS Channel 23 selected. 0x00000017 OVSCFG Oversampling Config Register 0x6C 32 read-write n 0x0 0x0 FILTLEN Configure Filter Length for Inputs S0IN and S1IN 0 8 read-write FLUTTERRM Flutter Remove 12 1 read-write ROUTELOC0 I/O Routing Location Register 0x2C 32 read-write n 0x0 0x0 S0INLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 S1INLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 STATUS Status Register 0x8 32 read-only n 0x0 0x0 DIR Current Counter Direction 0 1 read-only SYNCBUSY Synchronization Busy Register 0x44 32 read-only n 0x0 0x0 CMD CMD Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only OVSCFG OVSCFG Register Busy 3 1 read-only TOPB TOPB Register Busy 2 1 read-only TOP Top Value Register 0x10 32 read-only n 0x0 0x0 TOP Counter Top Value 0 16 read-only TOPB Top Value Buffer Register 0x14 32 read-write n 0x0 0x0 TOPB Counter Top Buffer 0 16 read-write PCNT1 PCNT1 PCNT1 0x0 0x0 0x400 registers n PCNT1 29 AUXCNT Auxiliary Counter Value Register 0x64 32 read-only n 0x0 0x0 AUXCNT Auxiliary Counter Value 0 16 read-only CMD Command Register 0x4 32 write-only n 0x0 0x0 LCNTIM Load CNT Immediately 0 1 write-only LTOPBIM Load TOPB Immediately 1 1 write-only CNT Counter Value Register 0xC 32 read-only n 0x0 0x0 CNT Counter Value 0 16 read-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUXCNTEV Controls When the Auxiliary Counter Counts 12 2 read-write NONE Never counts. 0x00000000 UP Counts up on up-count events. 0x00000001 DOWN Counts up on down-count events. 0x00000002 BOTH Counts up on both up-count and down-count events. 0x00000003 AUXCNTRSTEN Enable AUXCNT Reset 6 1 read-write CNTDIR Non-Quadrature Mode Counter Direction Control 14 1 read-write CNTEV Controls When the Counter Counts 10 2 read-write BOTH Counts up on up-count and down on down-count events. 0x00000000 UP Only counts up on up-count events. 0x00000001 DOWN Only counts down on down-count events. 0x00000002 NONE Never counts. 0x00000003 CNTRSTEN Enable CNT Reset 5 1 read-write DEBUGHALT Debug Mode Halt Enable 7 1 read-write EDGE Edge Select 15 1 read-write FILT Enable Digital Pulse Width Filter 3 1 read-write HYST Enable Hysteresis 8 1 read-write MODE Mode Select 0 3 read-write DISABLE The module is disabled. 0x00000000 OVSSINGLE Single input LFACLK oversampling mode (available in EM0-EM3). 0x00000001 EXTCLKSINGLE Externally clocked single input counter mode (available in EM0-EM3). 0x00000002 EXTCLKQUAD Externally clocked quadrature decoder mode (available in EM0-EM3). 0x00000003 OVSQUAD1X LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM3). 0x00000004 OVSQUAD2X LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM3). 0x00000005 OVSQUAD4X LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM3). 0x00000006 PRSGATEEN PRS Gate Enable 24 1 read-write RSTEN Enable PCNT Clock Domain Reset 4 1 read-write S1CDIR Count Direction Determined By S1 9 1 read-write TCCCOMP Triggered Compare and Clear Compare Mode 22 2 read-write LTOE Compare match if PCNT_CNT is less than, or equal to PCNT_TOP. 0x00000000 GTOE Compare match if PCNT_CNT is greater than or equal to PCNT_TOP. 0x00000001 RANGE Compare match if PCNT_CNT is less than, or equal to PCNT_TOP[15:8]], and greater than, or equal to PCNT_TOP[7:0]. 0x00000002 TCCMODE Sets the Mode for Triggered Compare and Clear 16 2 read-write DISABLED Triggered compare and clear not enabled. 0x00000000 LFA Compare and clear performed on each (optionally prescaled) LFA clock cycle. 0x00000001 PRS Compare and clear performed on positive PRS edges. 0x00000002 TCCPRESC Set the LFA Prescaler for Triggered Compare and Clear 19 2 read-write DIV1 Compare and clear event each LFA cycle. 0x00000000 DIV2 Compare and clear performed on every other LFA cycle. 0x00000001 DIV4 Compare and clear performed on every 4th LFA cycle. 0x00000002 DIV8 Compare and clear performed on every 8th LFA cycle. 0x00000003 TCCPRSPOL TCC PRS Polarity Select 25 1 read-write TCCPRSSEL TCC PRS Channel Select 26 5 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B PRSCH12 PRS Channel 12 selected. 0x0000000C PRSCH13 PRS Channel 13 selected. 0x0000000D PRSCH14 PRS Channel 14 selected. 0x0000000E PRSCH15 PRS Channel 15 selected. 0x0000000F PRSCH16 PRS Channel 16 selected. 0x00000010 PRSCH17 PRS Channel 17 selected. 0x00000011 PRSCH18 PRS Channel 18 selected. 0x00000012 PRSCH19 PRS Channel 19 selected. 0x00000013 PRSCH20 PRS Channel 20 selected. 0x00000014 PRSCH21 PRS Channel 21 selected. 0x00000015 PRSCH22 PRS Channel 22 selected. 0x00000016 PRSCH23 PRS Channel 23 selected. 0x00000017 TOPBHFSEL TOPB High Frequency Value Select 31 1 read-write FREEZE Freeze Register 0x40 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x24 32 read-write n 0x0 0x0 AUXOF AUXOF Interrupt Enable 3 1 read-write DIRCNG DIRCNG Interrupt Enable 2 1 read-write OF OF Interrupt Enable 1 1 read-write OQSTERR OQSTERR Interrupt Enable 5 1 read-write TCC TCC Interrupt Enable 4 1 read-write UF UF Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0x18 32 read-only n 0x0 0x0 AUXOF Auxiliary Overflow Interrupt Read Flag 3 1 read-only DIRCNG Direction Change Detect Interrupt Flag 2 1 read-only OF Overflow Interrupt Read Flag 1 1 read-only OQSTERR Oversampling Quadrature State Error Interrupt 5 1 read-only TCC Triggered Compare Interrupt Read Flag 4 1 read-only UF Underflow Interrupt Read Flag 0 1 read-only IFC Interrupt Flag Clear Register 0x20 32 write-only n 0x0 0x0 AUXOF Clear AUXOF Interrupt Flag 3 1 write-only DIRCNG Clear DIRCNG Interrupt Flag 2 1 write-only OF Clear OF Interrupt Flag 1 1 write-only OQSTERR Clear OQSTERR Interrupt Flag 5 1 write-only TCC Clear TCC Interrupt Flag 4 1 write-only UF Clear UF Interrupt Flag 0 1 write-only IFS Interrupt Flag Set Register 0x1C 32 write-only n 0x0 0x0 AUXOF Set AUXOF Interrupt Flag 3 1 write-only DIRCNG Set DIRCNG Interrupt Flag 2 1 write-only OF Set OF Interrupt Flag 1 1 write-only OQSTERR Set OQSTERR Interrupt Flag 5 1 write-only TCC Set TCC Interrupt Flag 4 1 write-only UF Set UF Interrupt Flag 0 1 write-only INPUT PCNT Input Register 0x68 32 read-write n 0x0 0x0 S0PRSEN S0IN PRS Enable 5 1 read-write S0PRSSEL S0IN PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B PRSCH12 PRS Channel 12 selected. 0x0000000C PRSCH13 PRS Channel 13 selected. 0x0000000D PRSCH14 PRS Channel 14 selected. 0x0000000E PRSCH15 PRS Channel 15 selected. 0x0000000F PRSCH16 PRS Channel 16 selected. 0x00000010 PRSCH17 PRS Channel 17 selected. 0x00000011 PRSCH18 PRS Channel 18 selected. 0x00000012 PRSCH19 PRS Channel 19 selected. 0x00000013 PRSCH20 PRS Channel 20 selected. 0x00000014 PRSCH21 PRS Channel 21 selected. 0x00000015 PRSCH22 PRS Channel 22 selected. 0x00000016 PRSCH23 PRS Channel 23 selected. 0x00000017 S1PRSEN S1IN PRS Enable 11 1 read-write S1PRSSEL S1IN PRS Channel Select 6 5 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B PRSCH12 PRS Channel 12 selected. 0x0000000C PRSCH13 PRS Channel 13 selected. 0x0000000D PRSCH14 PRS Channel 14 selected. 0x0000000E PRSCH15 PRS Channel 15 selected. 0x0000000F PRSCH16 PRS Channel 16 selected. 0x00000010 PRSCH17 PRS Channel 17 selected. 0x00000011 PRSCH18 PRS Channel 18 selected. 0x00000012 PRSCH19 PRS Channel 19 selected. 0x00000013 PRSCH20 PRS Channel 20 selected. 0x00000014 PRSCH21 PRS Channel 21 selected. 0x00000015 PRSCH22 PRS Channel 22 selected. 0x00000016 PRSCH23 PRS Channel 23 selected. 0x00000017 OVSCFG Oversampling Config Register 0x6C 32 read-write n 0x0 0x0 FILTLEN Configure Filter Length for Inputs S0IN and S1IN 0 8 read-write FLUTTERRM Flutter Remove 12 1 read-write ROUTELOC0 I/O Routing Location Register 0x2C 32 read-write n 0x0 0x0 S0INLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 S1INLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 STATUS Status Register 0x8 32 read-only n 0x0 0x0 DIR Current Counter Direction 0 1 read-only SYNCBUSY Synchronization Busy Register 0x44 32 read-only n 0x0 0x0 CMD CMD Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only OVSCFG OVSCFG Register Busy 3 1 read-only TOPB TOPB Register Busy 2 1 read-only TOP Top Value Register 0x10 32 read-only n 0x0 0x0 TOP Counter Top Value 0 16 read-only TOPB Top Value Buffer Register 0x14 32 read-write n 0x0 0x0 TOPB Counter Top Buffer 0 16 read-write PCNT2 PCNT2 PCNT2 0x0 0x0 0x400 registers n PCNT2 30 AUXCNT Auxiliary Counter Value Register 0x64 32 read-only n 0x0 0x0 AUXCNT Auxiliary Counter Value 0 16 read-only CMD Command Register 0x4 32 write-only n 0x0 0x0 LCNTIM Load CNT Immediately 0 1 write-only LTOPBIM Load TOPB Immediately 1 1 write-only CNT Counter Value Register 0xC 32 read-only n 0x0 0x0 CNT Counter Value 0 16 read-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUXCNTEV Controls When the Auxiliary Counter Counts 12 2 read-write NONE Never counts. 0x00000000 UP Counts up on up-count events. 0x00000001 DOWN Counts up on down-count events. 0x00000002 BOTH Counts up on both up-count and down-count events. 0x00000003 AUXCNTRSTEN Enable AUXCNT Reset 6 1 read-write CNTDIR Non-Quadrature Mode Counter Direction Control 14 1 read-write CNTEV Controls When the Counter Counts 10 2 read-write BOTH Counts up on up-count and down on down-count events. 0x00000000 UP Only counts up on up-count events. 0x00000001 DOWN Only counts down on down-count events. 0x00000002 NONE Never counts. 0x00000003 CNTRSTEN Enable CNT Reset 5 1 read-write DEBUGHALT Debug Mode Halt Enable 7 1 read-write EDGE Edge Select 15 1 read-write FILT Enable Digital Pulse Width Filter 3 1 read-write HYST Enable Hysteresis 8 1 read-write MODE Mode Select 0 3 read-write DISABLE The module is disabled. 0x00000000 OVSSINGLE Single input LFACLK oversampling mode (available in EM0-EM3). 0x00000001 EXTCLKSINGLE Externally clocked single input counter mode (available in EM0-EM3). 0x00000002 EXTCLKQUAD Externally clocked quadrature decoder mode (available in EM0-EM3). 0x00000003 OVSQUAD1X LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM3). 0x00000004 OVSQUAD2X LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM3). 0x00000005 OVSQUAD4X LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM3). 0x00000006 PRSGATEEN PRS Gate Enable 24 1 read-write RSTEN Enable PCNT Clock Domain Reset 4 1 read-write S1CDIR Count Direction Determined By S1 9 1 read-write TCCCOMP Triggered Compare and Clear Compare Mode 22 2 read-write LTOE Compare match if PCNT_CNT is less than, or equal to PCNT_TOP. 0x00000000 GTOE Compare match if PCNT_CNT is greater than or equal to PCNT_TOP. 0x00000001 RANGE Compare match if PCNT_CNT is less than, or equal to PCNT_TOP[15:8]], and greater than, or equal to PCNT_TOP[7:0]. 0x00000002 TCCMODE Sets the Mode for Triggered Compare and Clear 16 2 read-write DISABLED Triggered compare and clear not enabled. 0x00000000 LFA Compare and clear performed on each (optionally prescaled) LFA clock cycle. 0x00000001 PRS Compare and clear performed on positive PRS edges. 0x00000002 TCCPRESC Set the LFA Prescaler for Triggered Compare and Clear 19 2 read-write DIV1 Compare and clear event each LFA cycle. 0x00000000 DIV2 Compare and clear performed on every other LFA cycle. 0x00000001 DIV4 Compare and clear performed on every 4th LFA cycle. 0x00000002 DIV8 Compare and clear performed on every 8th LFA cycle. 0x00000003 TCCPRSPOL TCC PRS Polarity Select 25 1 read-write TCCPRSSEL TCC PRS Channel Select 26 5 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B PRSCH12 PRS Channel 12 selected. 0x0000000C PRSCH13 PRS Channel 13 selected. 0x0000000D PRSCH14 PRS Channel 14 selected. 0x0000000E PRSCH15 PRS Channel 15 selected. 0x0000000F PRSCH16 PRS Channel 16 selected. 0x00000010 PRSCH17 PRS Channel 17 selected. 0x00000011 PRSCH18 PRS Channel 18 selected. 0x00000012 PRSCH19 PRS Channel 19 selected. 0x00000013 PRSCH20 PRS Channel 20 selected. 0x00000014 PRSCH21 PRS Channel 21 selected. 0x00000015 PRSCH22 PRS Channel 22 selected. 0x00000016 PRSCH23 PRS Channel 23 selected. 0x00000017 TOPBHFSEL TOPB High Frequency Value Select 31 1 read-write FREEZE Freeze Register 0x40 32 read-write n 0x0 0x0 REGFREEZE Register Update Freeze 0 1 read-write IEN Interrupt Enable Register 0x24 32 read-write n 0x0 0x0 AUXOF AUXOF Interrupt Enable 3 1 read-write DIRCNG DIRCNG Interrupt Enable 2 1 read-write OF OF Interrupt Enable 1 1 read-write OQSTERR OQSTERR Interrupt Enable 5 1 read-write TCC TCC Interrupt Enable 4 1 read-write UF UF Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0x18 32 read-only n 0x0 0x0 AUXOF Auxiliary Overflow Interrupt Read Flag 3 1 read-only DIRCNG Direction Change Detect Interrupt Flag 2 1 read-only OF Overflow Interrupt Read Flag 1 1 read-only OQSTERR Oversampling Quadrature State Error Interrupt 5 1 read-only TCC Triggered Compare Interrupt Read Flag 4 1 read-only UF Underflow Interrupt Read Flag 0 1 read-only IFC Interrupt Flag Clear Register 0x20 32 write-only n 0x0 0x0 AUXOF Clear AUXOF Interrupt Flag 3 1 write-only DIRCNG Clear DIRCNG Interrupt Flag 2 1 write-only OF Clear OF Interrupt Flag 1 1 write-only OQSTERR Clear OQSTERR Interrupt Flag 5 1 write-only TCC Clear TCC Interrupt Flag 4 1 write-only UF Clear UF Interrupt Flag 0 1 write-only IFS Interrupt Flag Set Register 0x1C 32 write-only n 0x0 0x0 AUXOF Set AUXOF Interrupt Flag 3 1 write-only DIRCNG Set DIRCNG Interrupt Flag 2 1 write-only OF Set OF Interrupt Flag 1 1 write-only OQSTERR Set OQSTERR Interrupt Flag 5 1 write-only TCC Set TCC Interrupt Flag 4 1 write-only UF Set UF Interrupt Flag 0 1 write-only INPUT PCNT Input Register 0x68 32 read-write n 0x0 0x0 S0PRSEN S0IN PRS Enable 5 1 read-write S0PRSSEL S0IN PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B PRSCH12 PRS Channel 12 selected. 0x0000000C PRSCH13 PRS Channel 13 selected. 0x0000000D PRSCH14 PRS Channel 14 selected. 0x0000000E PRSCH15 PRS Channel 15 selected. 0x0000000F PRSCH16 PRS Channel 16 selected. 0x00000010 PRSCH17 PRS Channel 17 selected. 0x00000011 PRSCH18 PRS Channel 18 selected. 0x00000012 PRSCH19 PRS Channel 19 selected. 0x00000013 PRSCH20 PRS Channel 20 selected. 0x00000014 PRSCH21 PRS Channel 21 selected. 0x00000015 PRSCH22 PRS Channel 22 selected. 0x00000016 PRSCH23 PRS Channel 23 selected. 0x00000017 S1PRSEN S1IN PRS Enable 11 1 read-write S1PRSSEL S1IN PRS Channel Select 6 5 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B PRSCH12 PRS Channel 12 selected. 0x0000000C PRSCH13 PRS Channel 13 selected. 0x0000000D PRSCH14 PRS Channel 14 selected. 0x0000000E PRSCH15 PRS Channel 15 selected. 0x0000000F PRSCH16 PRS Channel 16 selected. 0x00000010 PRSCH17 PRS Channel 17 selected. 0x00000011 PRSCH18 PRS Channel 18 selected. 0x00000012 PRSCH19 PRS Channel 19 selected. 0x00000013 PRSCH20 PRS Channel 20 selected. 0x00000014 PRSCH21 PRS Channel 21 selected. 0x00000015 PRSCH22 PRS Channel 22 selected. 0x00000016 PRSCH23 PRS Channel 23 selected. 0x00000017 OVSCFG Oversampling Config Register 0x6C 32 read-write n 0x0 0x0 FILTLEN Configure Filter Length for Inputs S0IN and S1IN 0 8 read-write FLUTTERRM Flutter Remove 12 1 read-write ROUTELOC0 I/O Routing Location Register 0x2C 32 read-write n 0x0 0x0 S0INLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 S1INLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 STATUS Status Register 0x8 32 read-only n 0x0 0x0 DIR Current Counter Direction 0 1 read-only SYNCBUSY Synchronization Busy Register 0x44 32 read-only n 0x0 0x0 CMD CMD Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only OVSCFG OVSCFG Register Busy 3 1 read-only TOPB TOPB Register Busy 2 1 read-only TOP Top Value Register 0x10 32 read-only n 0x0 0x0 TOP Counter Top Value 0 16 read-only TOPB Top Value Buffer Register 0x14 32 read-write n 0x0 0x0 TOPB Counter Top Buffer 0 16 read-write PRS PRS PRS 0x0 0x0 0x400 registers n CH0_CTRL Channel Control Register 0x50 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH10_CTRL Channel Control Register 0x78 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH11_CTRL Channel Control Register 0x7C 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH12_CTRL Channel Control Register 0x80 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH13_CTRL Channel Control Register 0x84 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH14_CTRL Channel Control Register 0x88 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH15_CTRL Channel Control Register 0x8C 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH16_CTRL Channel Control Register 0x90 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH17_CTRL Channel Control Register 0x94 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH18_CTRL Channel Control Register 0x98 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH19_CTRL Channel Control Register 0x9C 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH1_CTRL Channel Control Register 0x54 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH20_CTRL Channel Control Register 0xA0 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH21_CTRL Channel Control Register 0xA4 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH22_CTRL Channel Control Register 0xA8 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH23_CTRL Channel Control Register 0xAC 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH2_CTRL Channel Control Register 0x58 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH3_CTRL Channel Control Register 0x5C 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH4_CTRL Channel Control Register 0x60 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH5_CTRL Channel Control Register 0x64 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH6_CTRL Channel Control Register 0x68 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH7_CTRL Channel Control Register 0x6C 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH8_CTRL Channel Control Register 0x70 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CH9_CTRL Channel Control Register 0x74 32 read-write n 0x0 0x0 ANDNEXT And Next 28 1 read-write ASYNC Asynchronous Reflex 30 1 read-write EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRS Peripheral Reflex System 0x00000002 PRSH Peripheral Reflex System 0x00000003 ACMP0 Analog Comparator 0 0x00000004 ACMP1 Analog Comparator 1 0x00000005 ADC0 Analog to Digital Converter 0 0x00000006 RTC Real-Time Counter 0x00000007 RTCC Real-Time Counter and Calendar 0x00000008 GPIOL General purpose Input/Output 0x00000009 GPIOH General purpose Input/Output 0x0000000A LETIMER0 Low Energy Timer 0 0x0000000B LETIMER1 Low Energy Timer 1 0x0000000C PCNT0 Pulse Counter 0 0x0000000D PCNT1 Pulse Counter 1 0x0000000E PCNT2 Pulse Counter 2 0x0000000F CRYOTIMER CRYOTIMER 0x00000010 CMU Clock Management Unit 0x00000011 VDAC0 Digital to Analog Converter 0 0x00000017 LESENSEL Low Energy Sensor Interface 0x00000018 LESENSEH Low Energy Sensor Interface 0x00000019 LESENSED Low Energy Sensor Interface 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B ACMP2 Analog Comparator 1 0x0000001C ACMP3 Analog Comparator 3 0x0000001D ADC1 Analog to Digital Converter 0 0x0000001E USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000030 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000031 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000032 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000033 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000034 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000035 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000036 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000037 TIMER0 Timer 0 0x0000003C TIMER1 Timer 1 0x0000003D TIMER2 Timer 2 0x0000003E USB Universal Serial Bus Interface 0x00000040 CM4 None 0x00000043 TIMER3 Timer 3 0x00000050 WTIMER0 Wide Timer 0 0x00000052 WTIMER1 Wide Timer 0 0x00000053 WTIMER2 Wide Timer 2 0x00000054 WTIMER3 Wide Timer 3 0x00000055 TIMER4 Timer 4 0x00000062 TIMER5 Timer 5 0x00000063 TIMER6 Timer 6 0x00000064 STRETCH Stretch Channel Output 25 1 read-write CTRL Control Register 0x30 32 read-write n 0x0 0x0 SEVONPRS Set Event on PRS 0 1 read-write SEVONPRSSEL SEVONPRS PRS Channel Select 1 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 DMAREQ0 DMA Request 0 Register 0x34 32 read-write n 0x0 0x0 PRSSEL DMA Request 0 PRS Channel Select 6 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 DMAREQ1 DMA Request 1 Register 0x38 32 read-write n 0x0 0x0 PRSSEL DMA Request 1 PRS Channel Select 6 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 PEEK PRS Channel Values 0x40 32 read-only n 0x0 0x0 CH0VAL Channel 0 Current Value 0 1 read-only CH10VAL Channel 10 Current Value 10 1 read-only CH11VAL Channel 11 Current Value 11 1 read-only CH12VAL Channel 12 Current Value 12 1 read-only CH13VAL Channel 13 Current Value 13 1 read-only CH14VAL Channel 14 Current Value 14 1 read-only CH15VAL Channel 15 Current Value 15 1 read-only CH16VAL Channel 16 Current Value 16 1 read-only CH17VAL Channel 17 Current Value 17 1 read-only CH18VAL Channel 18 Current Value 18 1 read-only CH19VAL Channel 19 Current Value 19 1 read-only CH1VAL Channel 1 Current Value 1 1 read-only CH20VAL Channel 20 Current Value 20 1 read-only CH21VAL Channel 21 Current Value 21 1 read-only CH22VAL Channel 22 Current Value 22 1 read-only CH23VAL Channel 23 Current Value 23 1 read-only CH2VAL Channel 2 Current Value 2 1 read-only CH3VAL Channel 3 Current Value 3 1 read-only CH4VAL Channel 4 Current Value 4 1 read-only CH5VAL Channel 5 Current Value 5 1 read-only CH6VAL Channel 6 Current Value 6 1 read-only CH7VAL Channel 7 Current Value 7 1 read-only CH8VAL Channel 8 Current Value 8 1 read-only CH9VAL Channel 9 Current Value 9 1 read-only ROUTELOC0 I/O Routing Location Register 0x10 32 read-write n 0x0 0x0 CH0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 CH1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 CH2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 CH3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 ROUTELOC1 I/O Routing Location Register 0x14 32 read-write n 0x0 0x0 CH4LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH5LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH6LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH7LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 ROUTELOC2 I/O Routing Location Register 0x18 32 read-write n 0x0 0x0 CH10LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH11LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH8LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH9LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 ROUTELOC3 I/O Routing Location Register 0x1C 32 read-write n 0x0 0x0 CH12LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH13LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH14LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH15LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 ROUTELOC4 I/O Routing Location Register 0x20 32 read-write n 0x0 0x0 CH16LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH17LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH18LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH19LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 ROUTELOC5 I/O Routing Location Register 0x24 32 read-write n 0x0 0x0 CH20LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH21LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH22LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 CH23LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 ROUTEPEN I/O Routing Pin Enable Register 0x8 32 read-write n 0x0 0x0 CH0PEN CH0 Pin Enable 0 1 read-write CH10PEN CH10 Pin Enable 10 1 read-write CH11PEN CH11 Pin Enable 11 1 read-write CH12PEN CH12 Pin Enable 12 1 read-write CH13PEN CH13 Pin Enable 13 1 read-write CH14PEN CH14 Pin Enable 14 1 read-write CH15PEN CH15 Pin Enable 15 1 read-write CH16PEN CH16 Pin Enable 16 1 read-write CH17PEN CH17 Pin Enable 17 1 read-write CH18PEN CH18 Pin Enable 18 1 read-write CH19PEN CH19 Pin Enable 19 1 read-write CH1PEN CH1 Pin Enable 1 1 read-write CH20PEN CH20 Pin Enable 20 1 read-write CH21PEN CH21 Pin Enable 21 1 read-write CH22PEN CH22 Pin Enable 22 1 read-write CH23PEN CH23 Pin Enable 23 1 read-write CH2PEN CH2 Pin Enable 2 1 read-write CH3PEN CH3 Pin Enable 3 1 read-write CH4PEN CH4 Pin Enable 4 1 read-write CH5PEN CH5 Pin Enable 5 1 read-write CH6PEN CH6 Pin Enable 6 1 read-write CH7PEN CH7 Pin Enable 7 1 read-write CH8PEN CH8 Pin Enable 8 1 read-write CH9PEN CH9 Pin Enable 9 1 read-write SWLEVEL Software Level Register 0x4 32 read-write n 0x0 0x0 CH0LEVEL Channel 0 Software Level 0 1 read-write CH10LEVEL Channel 10 Software Level 10 1 read-write CH11LEVEL Channel 11 Software Level 11 1 read-write CH12LEVEL Channel 12 Software Level 12 1 read-write CH13LEVEL Channel 13 Software Level 13 1 read-write CH14LEVEL Channel 14 Software Level 14 1 read-write CH15LEVEL Channel 15 Software Level 15 1 read-write CH16LEVEL Channel 16 Software Level 16 1 read-write CH17LEVEL Channel 17 Software Level 17 1 read-write CH18LEVEL Channel 18 Software Level 18 1 read-write CH19LEVEL Channel 19 Software Level 19 1 read-write CH1LEVEL Channel 1 Software Level 1 1 read-write CH20LEVEL Channel 20 Software Level 20 1 read-write CH21LEVEL Channel 21 Software Level 21 1 read-write CH22LEVEL Channel 22 Software Level 22 1 read-write CH23LEVEL Channel 23 Software Level 23 1 read-write CH2LEVEL Channel 2 Software Level 2 1 read-write CH3LEVEL Channel 3 Software Level 3 1 read-write CH4LEVEL Channel 4 Software Level 4 1 read-write CH5LEVEL Channel 5 Software Level 5 1 read-write CH6LEVEL Channel 6 Software Level 6 1 read-write CH7LEVEL Channel 7 Software Level 7 1 read-write CH8LEVEL Channel 8 Software Level 8 1 read-write CH9LEVEL Channel 9 Software Level 9 1 read-write SWPULSE Software Pulse Register 0x0 32 write-only n 0x0 0x0 CH0PULSE Channel 0 Pulse Generation 0 1 write-only CH10PULSE Channel 10 Pulse Generation 10 1 write-only CH11PULSE Channel 11 Pulse Generation 11 1 write-only CH12PULSE Channel 12 Pulse Generation 12 1 write-only CH13PULSE Channel 13 Pulse Generation 13 1 write-only CH14PULSE Channel 14 Pulse Generation 14 1 write-only CH15PULSE Channel 15 Pulse Generation 15 1 write-only CH16PULSE Channel 16 Pulse Generation 16 1 write-only CH17PULSE Channel 17 Pulse Generation 17 1 write-only CH18PULSE Channel 18 Pulse Generation 18 1 write-only CH19PULSE Channel 19 Pulse Generation 19 1 write-only CH1PULSE Channel 1 Pulse Generation 1 1 write-only CH20PULSE Channel 20 Pulse Generation 20 1 write-only CH21PULSE Channel 21 Pulse Generation 21 1 write-only CH22PULSE Channel 22 Pulse Generation 22 1 write-only CH23PULSE Channel 23 Pulse Generation 23 1 write-only CH2PULSE Channel 2 Pulse Generation 2 1 write-only CH3PULSE Channel 3 Pulse Generation 3 1 write-only CH4PULSE Channel 4 Pulse Generation 4 1 write-only CH5PULSE Channel 5 Pulse Generation 5 1 write-only CH6PULSE Channel 6 Pulse Generation 6 1 write-only CH7PULSE Channel 7 Pulse Generation 7 1 write-only CH8PULSE Channel 8 Pulse Generation 8 1 write-only CH9PULSE Channel 9 Pulse Generation 9 1 write-only QSPI0 QSPI0 QSPI0 0x0 0x0 0x400 registers n QSPI0 67 CONFIG Octal-SPI Configuration Register 0x0 32 read-write n 0x0 0x0 CRCENABLE CRC Enable Bit 29 1 read-write DUALBYTEOPCODEEN Dual-byte Opcode Mode Enable Bit 30 1 read-write ENABLEAHBDECODER Enable Address Decoder 23 1 read-write ENABLEDTRPROTOCOL Enable DTR Protocol 24 1 read-write ENBAHBADDRREMAP Enable Address Remapping 16 1 read-write ENBDIRACCCTLR Enable Direct Access Controller 7 1 read-write ENBLEGACYIPMODE Legacy IP Mode Enable 8 1 read-write ENBSPI QSPI Enable 0 1 read-write ENTERXIPMODE Enter XIP Mode on Next READ 17 1 read-write ENTERXIPMODEIMM Enter XIP Mode Immediately 18 1 read-write IDLE Serial Interface and Low Level SPI Pipeline is IDLE 31 1 read-only MSTRBAUDDIV Master Mode Baud Rate Divisor 19 4 read-write PERIPHCSLINES Peripheral Chip Select Lines 10 2 read-write PERIPHSELDEC Peripheral Select Decode 9 1 read-write PHYMODEENABLE PHY Mode Enable 3 1 read-write PIPELINEPHY Pipeline PHY Mode Enable 25 1 read-write SELCLKPHASE Clock Phase, CPHA 2 1 read-write SELCLKPOL Clock Polarity, CPOL 1 1 read-write WRPROTFLASH Write Protect Flash Pin 14 1 read-write DEVDELAY Device Delay Register 0xC 32 read-write n 0x0 0x0 DAFTER Clock Delay for Last Transaction Bit 8 8 read-write DBTWN Clock Delay Between Two Chip Selects 16 8 read-write DINIT Clock Delay for CS 0 8 read-write DNSS Clock Delay for Chip Select Deassert 24 8 read-write DEVINSTRRDCONFIG Device Read Instruction Configuration Register 0x4 32 read-write n 0x0 0x0 ADDRXFERTYPESTDMODE Address Transfer Type for Standard SPI Modes 12 2 read-write DATAXFERTYPEEXTMODE Data Transfer Type for Standard SPI Modes 16 2 read-write DDREN DDR Enable 10 1 read-write DUMMYRDCLKCYCLES Dummy Read Clock Cycles 24 5 read-write INSTRTYPE Instruction Type 8 2 read-write MODEBITENABLE Mode Bit Enable 20 1 read-write RDOPCODENONXIP Read Opcode in Non-XIP Mode 0 8 read-write DEVINSTRWRCONFIG Device Write Instruction Configuration Register 0x8 32 read-write n 0x0 0x0 ADDRXFERTYPESTDMODE Address Transfer Type for Standard SPI Modes 12 2 read-write DATAXFERTYPEEXTMODE Data Transfer Type for Standard SPI Modes 16 2 read-write DUMMYWRCLKCYCLES Dummy Write Clock Cycles 24 5 read-write WELDIS WEL Disable 8 1 read-write WROPCODE Write Opcode 0 8 read-write DEVSIZECONFIG Device Size Configuration Register 0x14 32 read-write n 0x0 0x0 BYTESPERDEVICEPAGE Number of Bytes Per Device Page 4 12 read-write BYTESPERSUBSECTOR Number of Bytes Per Block 16 5 read-write MEMSIZEONCS0 Size of Flash Device Connected to CS[0] Pin 21 2 read-write MEMSIZEONCS1 Size of Flash Device Connected to CS[1] Pin 23 2 read-write NUMADDRBYTES Number of Address Bytes 0 4 read-write FLASHCMDADDR Flash Command Address Register (STIG) 0x94 32 read-write n 0x0 0x0 ADDR Command Address 0 32 read-write FLASHCMDCTRL Flash Command Control Register (STIG) 0x90 32 read-write n 0x0 0x0 CMDEXEC Execute the Command 0 1 write-only CMDEXECSTATUS Command Execution in Progress 1 1 read-only CMDOPCODE Command Opcode 24 8 read-write ENBCOMDADDR Command Address Enable 19 1 read-write ENBMODEBIT Mode Bit Enable 18 1 read-write ENBREADDATA Read Data Enable 23 1 read-write ENBWRITEDATA Write Data Enable 15 1 read-write NUMADDRBYTES Number of Address Bytes 16 2 read-write NUMDUMMYCYCLES Number of Dummy Cycles 7 5 read-write NUMRDDATABYTES Number of Read Data Bytes 20 3 read-write NUMWRDATABYTES Number of Write Data Bytes 12 3 read-write STIGMEMBANKEN STIG Memory Bank Enable Bit 2 1 read-write FLASHCOMMANDCTRLMEM Flash Command Control Memory Register (STIG) 0x8C 32 read-write n 0x0 0x0 MEMBANKADDR Memory Bank Address 20 9 read-write MEMBANKREADDATA Last Requested Data From the STIG Memory Bank 8 8 read-only MEMBANKREQINPROGRESS Memory Bank Data Request in Progress 1 1 read-only NBOFSTIGREADBYTES Number of Read Bytes for the Extended STIG 16 3 read-write TRIGGERMEMBANKREQ Trigger the Memory Bank Data Request 0 1 write-only FLASHRDDATALOWER Flash Command Read Data Register (Lower) (STIG) 0xA0 32 read-only n 0x0 0x0 DATA Read Data Lower 0 32 read-only FLASHRDDATAUPPER Flash Command Read Data Register (Upper) (STIG) 0xA4 32 read-only n 0x0 0x0 DATA Read Data Upper 0 32 read-only FLASHWRDATALOWER Flash Command Write Data Register (Lower) (STIG) 0xA8 32 read-write n 0x0 0x0 DATA Command Write Data Lower Byte 0 32 read-write FLASHWRDATAUPPER Flash Command Write Data Register (Upper) (STIG) 0xAC 32 read-write n 0x0 0x0 DATA Command Write Data Upper Byte 0 32 read-write INDAHBADDRTRIGGER Indirect Address Trigger Register 0x1C 32 read-write n 0x0 0x0 ADDR Indirect Address Trigger Register 0 32 read-write INDIRECTREADXFERCTRL Indirect Read Transfer Control Register 0x60 32 read-write n 0x0 0x0 CANCEL Cancel Indirect Read 1 1 write-only INDOPSDONESTATUS Indirect Completion Status 5 1 read-write NUMINDOPSDONE Number Indirect Operations Done 6 2 read-only RDQUEUED Two Indirect Read Operations Have Been Queued 4 1 read-only RDSTATUS Indirect Read Status 2 1 read-only SRAMFULL SRAM Full 3 1 read-write START Start Indirect Read 0 1 write-only INDIRECTREADXFERNUMBYTES Indirect Read Transfer Number Bytes Register 0x6C 32 read-write n 0x0 0x0 VALUE Indirect Read Transfer Number Bytes 0 32 read-write INDIRECTREADXFERSTART Indirect Read Transfer Start Address Register 0x68 32 read-write n 0x0 0x0 ADDR Indirect Read Transfer Start Address 0 32 read-write INDIRECTREADXFERWATERMARK Indirect Read Transfer Watermark Register 0x64 32 read-write n 0x0 0x0 LEVEL Watermark Value 0 32 read-write INDIRECTTRIGGERADDRRANGE Indirect Trigger Address Range Register 0x80 32 read-write n 0x0 0x0 INDRANGEWIDTH Indirect Trigger Address Width 0 4 read-write INDIRECTWRITEXFERCTRL Indirect Write Transfer Control Register 0x70 32 read-write n 0x0 0x0 CANCEL Cancel Indirect Write 1 1 write-only INDOPSDONESTATUS Indirect Completion Status 5 1 read-write NUMINDOPSDONE Indirect Operations Done 6 2 read-only START Start Indirect Write 0 1 write-only WRQUEUED Two Indirect Write Operations Have Been Queued 4 1 read-only WRSTATUS Indirect Write Status 2 1 read-only INDIRECTWRITEXFERNUMBYTES Indirect Write Transfer Number Bytes Register 0x7C 32 read-write n 0x0 0x0 VALUE Indirect Number of Bytes 0 32 read-write INDIRECTWRITEXFERSTART Indirect Write Transfer Start Address Register 0x78 32 read-write n 0x0 0x0 ADDR Start of Indirect Access 0 32 read-write INDIRECTWRITEXFERWATERMARK Indirect Write Transfer Watermark Register 0x74 32 read-write n 0x0 0x0 LEVEL Watermark Value 0 32 read-write IRQMASK Interrupt Mask 0x44 32 read-write n 0x0 0x0 ILLEGALACCESSDETMASK Illegal Access Detected Mask 5 1 read-write INDIRECTOPDONEMASK Indirect Complete Mask 2 1 read-write INDIRECTREADREJECTMASK Indirect Read Reject Mask 3 1 read-write INDIRECTXFERLEVELBREACHMASK Transfer Watermark Breach Mask 6 1 read-write INDRDSRAMFULLMASK Indirect Read Partition Overflow Mask 12 1 read-write MODEMFAILMASK Mode M Failure Mask 0 1 read-write POLLEXPINTMASK Polling Expiration Detected Mask 13 1 read-write PROTWRATTEMPTMASK Protected Area Write Attempt Mask 4 1 read-write RECVOVERFLOWMASK Receive Overflow Mask 7 1 read-write RXCRCDATAERRMASK RX CRC Data Error Mask 16 1 read-write RXCRCDATAVALMASK RX CRC Data Valid Mask 17 1 read-write RXFIFOFULLMASK Small RX FIFO Full Mask 11 1 read-write RXFIFONOTEMPTYMASK Small RX FIFO Not Empty Mask 10 1 read-write STIGREQMASK STIG Request Completion Mask 14 1 read-write TXCRCCHUNKBRKMASK TX CRC Chunk Was Broken Mask 18 1 read-write TXFIFOFULLMASK Small TX FIFO Full Mask 9 1 read-write TXFIFONOTFULLMASK Small TX FIFO Not Full Mask 8 1 read-write UNDERFLOWDETMASK Underflow Detected Mask 1 1 read-write IRQSTATUS Interrupt Status Register 0x40 32 read-write n 0x0 0x0 ILLEGALACCESSDET Illegal Memory Access Has Been Detected 5 1 read-write INDIRECTOPDONE Indirect Operation Complete 2 1 read-write INDIRECTREADREJECT Indirect Operation Was Requested but Could Not Be Accepted 3 1 read-write INDIRECTXFERLEVELBREACH Indirect Transfer Watermark Level Breached 6 1 read-write INDRDSRAMFULL Indirect Read Partition Overflow 12 1 read-write MODEMFAIL Mode M Failure 0 1 read-write POLLEXPINT The Maximum Number of Programmed Polls Cycles is Expired 13 1 read-write PROTWRATTEMPT Write to Protected Area Was Attempted and Rejected 4 1 read-write RECVOVERFLOW Receive Overflow 7 1 read-write RXCRCDATAERR RX CRC Data Error 16 1 read-write RXCRCDATAVAL RX CRC Data Valid 17 1 read-write RXFIFOFULL Small RX FIFO Full 11 1 read-write RXFIFONOTEMPTY Small RX FIFO Not Empty 10 1 read-write STIGREQINT The Controller is Ready for Getting Another STIG Request 14 1 read-write TXCRCCHUNKBRK TX CRC Chunk Was Broken 18 1 read-write TXFIFOFULL Small TX FIFO Full 9 1 read-write TXFIFONOTFULL Small TX FIFO Not Full 8 1 read-write UNDERFLOWDET Underflow Detected 1 1 read-write LOWERWRPROT Lower Write Protection Register 0x50 32 read-write n 0x0 0x0 SUBSECTOR Lower Block Number 0 32 read-write MODEBITCONFIG Mode Bit Configuration Register 0x28 32 read-write n 0x0 0x0 CHUNKSIZE Chunk Size 8 3 read-write CRCOUTENABLE CRC# Output Enable Bit 15 1 read-write MODE Mode Bits 0 8 read-write RXCRCDATALOW RX CRC Data (lower) 24 8 read-only RXCRCDATAUP RX CRC Data (upper) 16 8 read-only MODULEID Module ID Register 0xFC 32 read-only n 0x0 0x0 CONF Configuration ID Number 0 2 read-only FIXPATCH Fix/patch Number 24 8 read-only MODULEID Module/Revision ID Number 8 16 read-only NOOFPOLLSBEFEXP Polling Expiration Register 0x3C 32 read-write n 0x0 0x0 NOOFPOLLSBEFEXP Number of Polls Cycles Before Expiration 0 32 read-write OPCODEEXTLOWER Opcode Extension Register (Lower) 0xE0 32 read-write n 0x0 0x0 EXTPOLLOPCODE Polling Opcode Extension 8 8 read-write EXTREADOPCODE Read Opcode Extension 24 8 read-write EXTSTIGOPCODE STIG Opcode Extension 0 8 read-write EXTWRITEOPCODE Write Opcode Extension 16 8 read-write OPCODEEXTUPPER Opcode Extension Register (Upper) 0xE4 32 read-write n 0x0 0x0 EXTWELOPCODE WEL Opcode Extension 16 8 read-write WELOPCODE WEL Opcode 24 8 read-write PHYCONFIGURATION PHY Configuration Register 0xB4 32 read-write n 0x0 0x0 PHYCONFIGRESYNC PHY Config Resync 31 1 write-only PHYCONFIGRXDLLDELAY RX DLL Delay 0 7 read-write PHYCONFIGTXDLLDELAY TX DLL Delay 16 7 read-write POLLINGFLASHSTATUS Polling Flash Status Register 0xB0 32 read-write n 0x0 0x0 DEVICESTATUS Device Status 0 8 read-only DEVICESTATUSNBDUMMY Auto-polling Dummy Cycles 16 4 read-write DEVICESTATUSVALID Device Status Valid 8 1 read-only RDDATACAPTURE Read Data Capture Register 0x10 32 read-write n 0x0 0x0 BYPASS Bypass the Adapted Loopback Clock Circuit 0 1 read-write DDRREADDELAY DDR Read Delay 16 4 read-write DELAY Read Delay 1 4 read-write DQSENABLE DQS Enable Bit 8 1 read-write REMAPADDR Remap Address Register 0x24 32 read-write n 0x0 0x0 VALUE Remap Address Value 0 32 read-write ROUTELOC0 I/O Route Location Register 0 0x108 32 read-write n 0x0 0x0 QSPILOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 ROUTEPEN I/O Routing Pin Enable Register 0x104 32 read-write n 0x0 0x0 CS0PEN CS0 Pin Enable 1 1 read-write CS1PEN CS1 Pin Enable 2 1 read-write DQ0PEN DQ0 Pin Enable 5 1 read-write DQ1PEN DQ1 Pin Enable 6 1 read-write DQ2PEN DQ2 Pin Enable 7 1 read-write DQ3PEN DQ3 Pin Enable 8 1 read-write DQ4PEN DQ4 Pin Enable 9 1 read-write DQ5PEN DQ5 Pin Enable 10 1 read-write DQ6PEN DQ6 Pin Enable 11 1 read-write DQ7PEN DQ7 Pin Enable 12 1 read-write DQSPEN DQS Pin Enable 13 1 read-write SCLKINPEN SCLKIN Pin Enable 14 1 read-write SCLKPEN SCLK Pin Enable 0 1 read-write RXTHRESH RX Threshold Register 0x34 32 read-write n 0x0 0x0 LEVEL Threshold Level 0 5 read-write SRAMFILL SRAM Fill Register 0x2C 32 read-only n 0x0 0x0 SRAMFILLINDACREAD SRAM Fill Level (Indirect Read Partition) 0 16 read-only SRAMFILLINDACWRITE SRAM Fill Level (Indirect Write Partition) 16 16 read-only SRAMPARTITIONCFG SRAM Partition Configuration Register 0x18 32 read-write n 0x0 0x0 ADDR Indirect Read Partition Size 0 8 read-write TXTHRESH TX Threshold Register 0x30 32 read-write n 0x0 0x0 LEVEL Threshold Level 0 5 read-write UPPERWRPROT Upper Write Protection Register 0x54 32 read-write n 0x0 0x0 SUBSECTOR Upper Block Number 0 32 read-write WRITECOMPLETIONCTRL Write Completion Control Register 0x38 32 read-write n 0x0 0x0 DISABLEPOLLING Disable Polling 14 1 read-write ENABLEPOLLINGEXP Enable Polling Expiration 15 1 read-write OPCODE Opcode 0 8 read-write POLLCOUNT Poll Count 16 8 read-write POLLINGBITINDEX Polling Bit Index 8 3 read-write POLLINGPOLARITY Polling Polarity 13 1 read-write POLLREPDELAY Poll Repetition Delay 24 8 read-write WRPROTCTRL Write Protection Control Register 0x58 32 read-write n 0x0 0x0 ENB Write Protection Enable Bit 1 1 read-write INV Write Protection Inversion Bit 0 1 read-write RMU RMU RMU 0x0 0x0 0x400 registers n CMD Command Register 0x8 32 write-only n 0x0 0x0 RCCLR Reset Cause Clear 0 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 LOCKUPRMODE Core LOCKUP Reset Mode 4 3 read-write DISABLED Reset request is blocked. 0x00000000 LIMITED The CRYOTIMER, DEBUGGER, RTCC, are not reset. 0x00000001 EXTENDED The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. 0x00000002 FULL The entire device is reset except some EMU and RMU registers. 0x00000004 PINRMODE PIN Reset Mode 12 3 read-write DISABLED Reset request is blocked. 0x00000000 LIMITED The CRYOTIMER, DEBUGGER, RTCC, are not reset. 0x00000001 EXTENDED The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. 0x00000002 FULL The entire device is reset except some EMU and RMU registers. 0x00000004 RESETSTATE System Software Reset State 24 2 read-write SYSRMODE Core Sysreset Reset Mode 8 3 read-write DISABLED Reset request is blocked. 0x00000000 LIMITED The CRYOTIMER, DEBUGGER, RTCC, are not reset. 0x00000001 EXTENDED The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. 0x00000002 FULL The entire device is reset except some EMU and RMU registers. 0x00000004 WDOGRMODE WDOG Reset Mode 0 3 read-write DISABLED Reset request is blocked. This disable bit is redundant with enable/disable bit in WDOG 0x00000000 LIMITED The CRYOTIMER, DEBUGGER, RTCC, are not reset. 0x00000001 EXTENDED The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. 0x00000002 FULL The entire device is reset except some EMU and RMU registers. 0x00000004 LOCK Configuration Lock Register 0x10 32 read-write n 0x0 0x0 LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 RST Reset Control Register 0xC 32 read-write n 0x0 0x0 RSTCAUSE Reset Cause Register 0x4 32 read-only n 0x0 0x0 AVDDBOD Brown Out Detector AVDD Reset 2 1 read-only BUMODERST Backup Mode Reset 12 1 read-only DECBOD Brown Out Detector Decouple Domain Reset 4 1 read-only DVDDBOD Brown Out Detector DVDD Reset 3 1 read-only EM4RST EM4 Reset 16 1 read-only EXTRST External Pin Reset 8 1 read-only LOCKUPRST LOCKUP Reset 9 1 read-only PORST Power on Reset 0 1 read-only SYSREQRST System Request Reset 10 1 read-only WDOGRST Watchdog Reset 11 1 read-only RTC RTC RTC 0x0 0x0 0x400 registers n RTC 63 CNT Counter Value Register 0x4 32 read-write n 0x0 0x0 CNT Counter Value 0 24 read-write COMPA_COMP Compare Value Register X 0x20 32 read-write n 0x0 0x0 COMP Compare Value 0 24 read-write COMPB_COMP Compare Value Register X 0x24 32 read-write n 0x0 0x0 COMP Compare Value 0 24 read-write COMPC_COMP Compare Value Register X 0x28 32 read-write n 0x0 0x0 COMP Compare Value 0 24 read-write COMPD_COMP Compare Value Register X 0x2C 32 read-write n 0x0 0x0 COMP Compare Value 0 24 read-write COMPE_COMP Compare Value Register X 0x30 32 read-write n 0x0 0x0 COMP Compare Value 0 24 read-write COMPF_COMP Compare Value Register X 0x34 32 read-write n 0x0 0x0 COMP Compare Value 0 24 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 COMP0TOP Compare Channel 0 is Top Value 2 1 read-write DEBUGRUN Debug Mode Run Enable 1 1 read-write EN RTC Enable 0 1 read-write IEN Interrupt Enable Register 0x14 32 read-write n 0x0 0x0 COMP COMP Interrupt Enable 1 6 read-write OF OF Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0x8 32 read-only n 0x0 0x0 COMP Compare Match X Interrupt Flag 1 6 read-only OF Overflow Interrupt Flag 0 1 read-only IFC Interrupt Flag Clear Register 0x10 32 write-only n 0x0 0x0 COMP Clear COMP Interrupt Flag 1 6 write-only OF Clear OF Interrupt Flag 0 1 write-only IFS Interrupt Flag Set Register 0xC 32 write-only n 0x0 0x0 COMP Set COMP Interrupt Flag 1 6 write-only OF Set OF Interrupt Flag 0 1 write-only RTCC RTCC RTCC 0x0 0x0 0x400 registers n RTCC 31 CC0_CCV Capture/Compare Value Register 0x44 32 read-write n 0x0 0x0 CCV Capture/Compare Value 0 32 read-write CC0_CTRL CC Channel Control Register 0x40 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 2 2 read-write PULSE A single clock cycle pulse is generated on output 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COMPBASE Capture Compare Channel Comparison Base 11 1 read-write COMPMASK Capture Compare Channel Comparison Mask 12 5 read-write DAYCC Day Capture/Compare Selection 17 1 read-write ICEDGE Input Capture Edge Select 4 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PRSSEL Compare/Capture Channel PRS Input Channel Selection 6 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC0_DATE Capture/Compare Date Register 0x4C 32 read-write n 0x0 0x0 DAYT Day of Month/week, Tens 4 2 read-write DAYU Day of Month/week, Units 0 4 read-write MONTHT Month, Tens 12 1 read-write MONTHU Month, Units 8 4 read-write CC0_TIME Capture/Compare Time Register 0x48 32 read-write n 0x0 0x0 HOURT Hours, Tens 20 2 read-write HOURU Hours, Units 16 4 read-write MINT Minutes, Tens 12 3 read-write MINU Minutes, Units 8 4 read-write SECT Seconds, Tens 4 3 read-write SECU Seconds, Units 0 4 read-write CC1_CCV Capture/Compare Value Register 0x54 32 read-write n 0x0 0x0 CCV Capture/Compare Value 0 32 read-write CC1_CTRL CC Channel Control Register 0x50 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 2 2 read-write PULSE A single clock cycle pulse is generated on output 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COMPBASE Capture Compare Channel Comparison Base 11 1 read-write COMPMASK Capture Compare Channel Comparison Mask 12 5 read-write DAYCC Day Capture/Compare Selection 17 1 read-write ICEDGE Input Capture Edge Select 4 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PRSSEL Compare/Capture Channel PRS Input Channel Selection 6 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC1_DATE Capture/Compare Date Register 0x5C 32 read-write n 0x0 0x0 DAYT Day of Month/week, Tens 4 2 read-write DAYU Day of Month/week, Units 0 4 read-write MONTHT Month, Tens 12 1 read-write MONTHU Month, Units 8 4 read-write CC1_TIME Capture/Compare Time Register 0x58 32 read-write n 0x0 0x0 HOURT Hours, Tens 20 2 read-write HOURU Hours, Units 16 4 read-write MINT Minutes, Tens 12 3 read-write MINU Minutes, Units 8 4 read-write SECT Seconds, Tens 4 3 read-write SECU Seconds, Units 0 4 read-write CC2_CCV Capture/Compare Value Register 0x64 32 read-write n 0x0 0x0 CCV Capture/Compare Value 0 32 read-write CC2_CTRL CC Channel Control Register 0x60 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 2 2 read-write PULSE A single clock cycle pulse is generated on output 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COMPBASE Capture Compare Channel Comparison Base 11 1 read-write COMPMASK Capture Compare Channel Comparison Mask 12 5 read-write DAYCC Day Capture/Compare Selection 17 1 read-write ICEDGE Input Capture Edge Select 4 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PRSSEL Compare/Capture Channel PRS Input Channel Selection 6 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC2_DATE Capture/Compare Date Register 0x6C 32 read-write n 0x0 0x0 DAYT Day of Month/week, Tens 4 2 read-write DAYU Day of Month/week, Units 0 4 read-write MONTHT Month, Tens 12 1 read-write MONTHU Month, Units 8 4 read-write CC2_TIME Capture/Compare Time Register 0x68 32 read-write n 0x0 0x0 HOURT Hours, Tens 20 2 read-write HOURU Hours, Units 16 4 read-write MINT Minutes, Tens 12 3 read-write MINU Minutes, Units 8 4 read-write SECT Seconds, Tens 4 3 read-write SECU Seconds, Units 0 4 read-write CMD Command Register 0x2C 32 write-only n 0x0 0x0 CLRSTATUS Clear RTCC_STATUS Register 0 1 write-only CNT Counter Value Register 0x8 32 read-write n 0x0 0x0 CNT Counter Value 0 32 read-write COMBCNT Combined Pre-Counter and Counter Value Register 0xC 32 read-only n 0x0 0x0 CNTLSB Counter Value 15 17 read-only PRECNT Pre-Counter Value 0 15 read-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 BUMODETSEN Backup Mode Timestamp Enable 14 1 read-write CCV1TOP CCV1 Top Value Enable 5 1 read-write CNTMODE Main Counter Mode 16 1 read-write CNTPRESC Counter Prescaler Value 8 4 read-write DIV1 CLKCNT = LFECLKRTCC/1 0x00000000 DIV2 CLKCNT = LFECLKRTCC/2 0x00000001 DIV4 CLKCNT = LFECLKRTCC/4 0x00000002 DIV8 CLKCNT = LFECLKRTCC/8 0x00000003 DIV16 CLKCNT = LFECLKRTCC/16 0x00000004 DIV32 CLKCNT = LFECLKRTCC/32 0x00000005 DIV64 CLKCNT = LFECLKRTCC/64 0x00000006 DIV128 CLKCNT = LFECLKRTCC/128 0x00000007 DIV256 CLKCNT = LFECLKRTCC/256 0x00000008 DIV512 CLKCNT = LFECLKRTCC/512 0x00000009 DIV1024 CLKCNT = LFECLKRTCC/1024 0x0000000A DIV2048 CLKCNT = LFECLKRTCC/2048 0x0000000B DIV4096 CLKCNT = LFECLKRTCC/4096 0x0000000C DIV8192 CLKCNT = LFECLKRTCC/8192 0x0000000D DIV16384 CLKCNT = LFECLKRTCC/16384 0x0000000E DIV32768 CLKCNT = LFECLKRTCC/32768 0x0000000F CNTTICK Counter Prescaler Mode 12 1 read-write DEBUGRUN Debug Mode Run Enable 2 1 read-write ENABLE RTCC Enable 0 1 read-write LYEARCORRDIS Leap Year Correction Disabled 17 1 read-write OSCFDETEN Oscillator Failure Detection Enable 15 1 read-write PRECCV0TOP Pre-counter CCV0 Top Value Enable 4 1 read-write DATE Date Register 0x14 32 read-write n 0x0 0x0 DAYOMT Day of Month, Tens 4 2 read-write DAYOMU Day of Month, Units 0 4 read-write DAYOW Day of Week 24 3 read-write MONTHT Month, Tens 12 1 read-write MONTHU Month, Units 8 4 read-write YEART Year, Tens 20 4 read-write YEARU Year, Units 16 4 read-write EM4WUEN Wake Up Enable 0x3C 32 read-write n 0x0 0x0 EM4WU EM4 Wake-up Enable 0 1 read-write IEN Interrupt Enable Register 0x24 32 read-write n 0x0 0x0 CC0 CC0 Interrupt Enable 1 1 read-write CC1 CC1 Interrupt Enable 2 1 read-write CC2 CC2 Interrupt Enable 3 1 read-write CNTTICK CNTTICK Interrupt Enable 5 1 read-write DAYOWOF DAYOWOF Interrupt Enable 9 1 read-write DAYTICK DAYTICK Interrupt Enable 8 1 read-write HOURTICK HOURTICK Interrupt Enable 7 1 read-write MINTICK MINTICK Interrupt Enable 6 1 read-write MONTHTICK MONTHTICK Interrupt Enable 10 1 read-write OF OF Interrupt Enable 0 1 read-write OSCFAIL OSCFAIL Interrupt Enable 4 1 read-write IF RTCC Interrupt Flags 0x18 32 read-only n 0x0 0x0 CC0 Channel 0 Interrupt Flag 1 1 read-only CC1 Channel 1 Interrupt Flag 2 1 read-only CC2 Channel 2 Interrupt Flag 3 1 read-only CNTTICK Main Counter Tick 5 1 read-only DAYOWOF Day of Week Overflow 9 1 read-only DAYTICK Day Tick 8 1 read-only HOURTICK Hour Tick 7 1 read-only MINTICK Minute Tick 6 1 read-only MONTHTICK Month Tick 10 1 read-only OF Overflow Interrupt Flag 0 1 read-only OSCFAIL Oscillator Failure Interrupt Flag 4 1 read-only IFC Interrupt Flag Clear Register 0x20 32 write-only n 0x0 0x0 CC0 Clear CC0 Interrupt Flag 1 1 write-only CC1 Clear CC1 Interrupt Flag 2 1 write-only CC2 Clear CC2 Interrupt Flag 3 1 write-only CNTTICK Clear CNTTICK Interrupt Flag 5 1 write-only DAYOWOF Clear DAYOWOF Interrupt Flag 9 1 write-only DAYTICK Clear DAYTICK Interrupt Flag 8 1 write-only HOURTICK Clear HOURTICK Interrupt Flag 7 1 write-only MINTICK Clear MINTICK Interrupt Flag 6 1 write-only MONTHTICK Clear MONTHTICK Interrupt Flag 10 1 write-only OF Clear OF Interrupt Flag 0 1 write-only OSCFAIL Clear OSCFAIL Interrupt Flag 4 1 write-only IFS Interrupt Flag Set Register 0x1C 32 write-only n 0x0 0x0 CC0 Set CC0 Interrupt Flag 1 1 write-only CC1 Set CC1 Interrupt Flag 2 1 write-only CC2 Set CC2 Interrupt Flag 3 1 write-only CNTTICK Set CNTTICK Interrupt Flag 5 1 write-only DAYOWOF Set DAYOWOF Interrupt Flag 9 1 write-only DAYTICK Set DAYTICK Interrupt Flag 8 1 write-only HOURTICK Set HOURTICK Interrupt Flag 7 1 write-only MINTICK Set MINTICK Interrupt Flag 6 1 write-only MONTHTICK Set MONTHTICK Interrupt Flag 10 1 write-only OF Set OF Interrupt Flag 0 1 write-only OSCFAIL Set OSCFAIL Interrupt Flag 4 1 write-only LOCK Configuration Lock Register 0x38 32 read-write n 0x0 0x0 LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 POWERDOWN Retention RAM Power-down Register 0x34 32 read-write n 0x0 0x0 RAM Retention RAM Power-down 0 1 read-write PRECNT Pre-Counter Value Register 0x4 32 read-write n 0x0 0x0 PRECNT Pre-Counter Value 0 15 read-write RET0_REG Retention Register 0x104 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET10_REG Retention Register 0x12C 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET11_REG Retention Register 0x130 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET12_REG Retention Register 0x134 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET13_REG Retention Register 0x138 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET14_REG Retention Register 0x13C 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET15_REG Retention Register 0x140 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET16_REG Retention Register 0x144 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET17_REG Retention Register 0x148 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET18_REG Retention Register 0x14C 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET19_REG Retention Register 0x150 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET1_REG Retention Register 0x108 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET20_REG Retention Register 0x154 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET21_REG Retention Register 0x158 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET22_REG Retention Register 0x15C 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET23_REG Retention Register 0x160 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET24_REG Retention Register 0x164 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET25_REG Retention Register 0x168 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET26_REG Retention Register 0x16C 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET27_REG Retention Register 0x170 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET28_REG Retention Register 0x174 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET29_REG Retention Register 0x178 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET2_REG Retention Register 0x10C 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET30_REG Retention Register 0x17C 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET31_REG Retention Register 0x180 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET3_REG Retention Register 0x110 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET4_REG Retention Register 0x114 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET5_REG Retention Register 0x118 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET6_REG Retention Register 0x11C 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET7_REG Retention Register 0x120 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET8_REG Retention Register 0x124 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write RET9_REG Retention Register 0x128 32 read-write n 0x0 0x0 REG General Purpose Retention Register 0 32 read-write STATUS Status Register 0x28 32 read-only n 0x0 0x0 BUMODETS Timestamp for Backup Mode Entry Stored 0 1 read-only SYNCBUSY Synchronization Busy Register 0x30 32 read-only n 0x0 0x0 CMD CMD Register Busy 5 1 read-only TIME Time of Day Register 0x10 32 read-write n 0x0 0x0 HOURT Hours, Tens 20 2 read-write HOURU Hours, Units 16 4 read-write MINT Minutes, Tens 12 3 read-write MINU Minutes, Units 8 4 read-write SECT Seconds, Tens 4 3 read-write SECU Seconds, Units 0 4 read-write SDIO SDIO SDIO 0x0 0x0 0x1000 registers n SDIO 58 AC12ERRSTAT AUTO CMD12 Error Status and Host Control2 Register 0x3C 32 read-write n 0x0 0x0 AC12CRCERR Auto CMD CRC Error 2 1 read-only AC12ENDBITERR Auto CMD End Bit Error 3 1 read-only AC12INDEXERR Auto CMD Index Error 4 1 read-only AC12NOTEXE Auto CMD12 Not Executed 0 1 read-only AC12TOE Auto CMD12 Timeout Error 1 1 read-only ASYNCINTEN Asynchronous Interrupt Enable 30 1 read-write CNIBAC12ERR Command Not Issued By Auto CMD12 Error 7 1 read-only DRVSTNSEL Driver Strength Select 20 2 read-write TYPEB Driver Type B is selected (Default) 0x00000000 TYPEA Driver Type A is selected 0x00000001 TYPEC Driver Type C is selected 0x00000002 TYPED Driver Type D is selected 0x00000003 EXETUNING Execute Tuning 22 1 read-write PRSTVALEN Preset Value Enable 31 1 read-write SAMPCLKSEL Sampling Clock Select 23 1 read-write SIGEN1P8V Voltage 1.8V Signal Enable 19 1 read-write UHSMODESEL UHS Mode Select 16 3 read-write SDR12 SDR12 0x00000000 SDR25 SDR25 0x00000001 SDR50 SDR50 0x00000002 SDR104 SDR104 0x00000003 DDR50 DDR50 0x00000004 ADMAES ADMA Error Status Register 0x54 32 read-only n 0x0 0x0 ADMAES ADMA Error State 0 2 read-only ADMALME ADMA Length Mismatch Error 2 1 read-only ADSADDR ADMA System Address Register 0x58 32 read-write n 0x0 0x0 ADSADDR ADMA System Address 0 32 read-write BLKSIZE Block Size and Block Count Register 0x4 32 read-write n 0x0 0x0 BLKSCNTFORCURRTFR Blocks Count for Current Transfer 16 16 read-write STOPCNT None 0x00000000 HSTSDMABUFSIZE Host SDMA Buffer Size 12 3 read-write SIZE4 4KB(Detects A11 Carry out) 0x00000000 SIZE8 8KB(Detects A12 Carry out) 0x00000001 SIZE16 16KB(Detects A13 Carry out) 0x00000002 SIZE32 32KB(Detects A14 Carry out) 0x00000003 SIZE64 64KB(Detects A15 Carry out) 0x00000004 SIZE128 128KB(Detects A16 Carry out) 0x00000005 SIZE256 256KB(Detects A17 Carry out) 0x00000006 SIZE512 512KB(Detects A18 Carry out) 0x00000007 TFRBLKSIZE Transfer Block Size, Specifies the Block Size for Block Data Transfers for CMD17, CMD18, CMD24, CMD25, and CMD53 0 12 read-write NOXFER None 0x00000000 BOOTTOCTRL Boot Timeout Control Register 0x70 32 read-write n 0x0 0x0 BOOTDATTOCNT Boot Data Timeout Counter Value 0 32 read-write BUFDATPORT Buffer Data Register 0x20 32 read-write n 0x0 0x0 BUFDAT Buffer Data 0 32 read-write CAPAB0 Capabilities Register to Hold Bits 31~0 0x40 32 read-only n 0x0 0x0 ADMA2SUP ADMA2 Support 19 1 read-only ASYNCINTSUP Asynchronous Interrupt Support 29 1 read-only BASECLKFREQSD Base Clock Frequency for SD_CLK 8 8 read-only EXTMEDIABUSSUP Extended Media Bus Support 18 1 read-only HSSUP High Speed Support 21 1 read-only IFSLOTTYPE Interface Card Slot Type 30 2 read-only REMOVABLE Removable Card Slot 0x00000000 EMBEDDED Only one non-removable device is conected to a SD bus slot 0x00000001 SHARED Can be set if Host controller supports Shared Bus CTRL register 0x00000002 MAXBLOCKLEN Maximum Block Length 16 2 read-only SDMASUP SDMA Support 22 1 read-only SUSRESSUP Suspend / Resume Support 23 1 read-only SYSBUS64BSUP System Bus 64-bit Support 28 1 read-only TMOUTCLKFREQ Timeout Clock Frequency 0 6 read-only TMOUTCLKUNIT Timeout Clock Unit 7 1 read-only VOLTSUP1P8V Voltage Support 1.8V 26 1 read-only VOLTSUP3P0V Voltage Support 3.0V 25 1 read-only VOLTSUP3P3V Voltage Support 3.3V 24 1 read-only CAPAB2 Capabilities Register to Hold Bits 63~32 0x44 32 read-only n 0x0 0x0 CLOCKKMUL Clock Multiplier 16 8 read-only DDR50SUP DDR50 Support 2 1 read-only DRVTYPASUP Driver Type a Support 4 1 read-only DRVTYPCSUP Driver Type C Support 5 1 read-only DRVTYPDSUP Driver Type D Support 6 1 read-only RETUNEMODES Re-tuning Modes 14 2 read-only SDR104SUP SDR104 Support 1 1 read-only SDR50SUP SDR50 Support 0 1 read-only SPIBLOCKMODE SPI Block Mode Support 25 1 read-only SPIMODE SPI Mode Support 24 1 read-only TIMCNTRETUN Timer Count for Re-Tuning 8 4 read-only USETUNSDR50 Use Tuning for SDR50 13 1 read-only CFG0 Core Configuration 0 0x804 32 read-write n 0x0 0x0 BASECLKFREQ Base Clock Frequency for SD_CLK 13 8 read-write C1P8VSUP 1P8V Support 30 1 read-write C3P0VSUP 3P0V Support 29 1 read-write C3P3VSUP Core 3P3V Support 28 1 read-write C8BITSUP 8-bit Interface Support 23 1 read-write CADMA2SUP ADMA2 Mode Support 24 1 read-write CHSSUP High Speed Mode Support 25 1 read-write CSDMASUP SDMA Mode Support 26 1 read-write CSUSPRESSUP Suspend/Resume Support 27 1 read-write MAXBLKLEN MAX Block Length of Transfer 21 2 read-write 512B 512 Bytes are Selected 0x00000000 1024B 1024 Bytes are Selected 0x00000001 2048B 2048 Bytes are Selected 0x00000002 TOUTCLKFREQ Timeout Clock Frequency 6 6 read-write TOUTCLKUNIT Timeout Clock Unit in kHz or MHz 12 1 read-write TUNINGCNT Tuning Counter Value 0 6 read-write CFG1 Core Configuration 1 0x808 32 read-write n 0x0 0x0 ASYNCINTRSUP Asynchronous Interrupt Support 0 1 read-write ASYNCWKUPEN Asynchronous Wakeup Enable 18 1 read-write CDDR50SUP Support DDR50 5 1 read-write CDRVASUP Support Type a Driver 6 1 read-write CDRVCSUP Support Type C Driver 7 1 read-write CDRVDSUP Support Type D Driver 8 1 read-write CSDR104SUP Support SDR104 4 1 read-write CSDR50SUP Core Support SDR50 3 1 read-write RETUNMODES Retuning Modes 14 2 read-write RETUNTMRCTL Retuning Timer Control 9 4 read-write SLOTTYPE Slot Type 1 2 read-write RMSDSLOT Removable SD Card Slot 0x00000000 EMSDSLOT Embedded SD Card Slot 0x00000001 SHBUSSLOT Shared SD Card Slot 0x00000002 SPISUP SPI Support 16 1 read-write TUNSDR50 Tuning for SDR50 13 1 read-write CFGPRESETVAL0 Core Configuration Preset Value 0 0x80C 32 read-write n 0x0 0x0 DSPCLKGENEN Default Speed Clock Gen Enable 26 1 read-write DSPDRVST Default Speed Drive Strength 27 2 read-write DSPSDCLKFREQ Preset Value for Default Speed of SD_CLK 16 10 read-write INITCLKGENEN Initial Clock Gen Enable 10 1 read-write INITDRVST Initial Drive Strength 11 2 read-write INITSDCLKFREQ Initial SD_CLK Frequency 0 10 read-write CFGPRESETVAL1 Core Configuration Preset Value 1 0x810 32 read-write n 0x0 0x0 HSPCLKGENEN High Speed SD_CLK Gen Enable 10 1 read-write HSPDRVST High Speed SD Drive Strength 11 2 read-write HSPSDCLKFREQ High Speed SD_CLK Frequency 0 10 read-write SDR12CLKGENEN SDR12 Speed Clock Gen Enable 26 1 read-write SDR12DRVST SDR12 Speed Drive Strength 27 2 read-write SDR12SDCLKFREQ Preset Value for SDR12 Speed of SD_CLK 16 10 read-write CFGPRESETVAL2 Core Configuration Preset Value 2 0x814 32 read-write n 0x0 0x0 SDR25CLKGENEN SDR25 SD_CLK Gen Enable 10 1 read-write SDR25DRVST SDR25 SD Drive Strength 11 2 read-write SDR25SDCLKFREQ SDR25 SD_CLK Frequency 0 10 read-write SDR50CLKGENEN SDR50 Speed Clock Gen Enable 26 1 read-write SDR50DRVST SDR50 Speed Drive Strength 27 2 read-write SDR50SDCLKFREQ Preset Value for SDR50 Speed of SD_CLK 16 10 read-write CFGPRESETVAL3 Core Configuration Preset Value 3 0x818 32 read-write n 0x0 0x0 DDR50CLKGENEN DDR50 Speed Clock Gen Enable 26 1 read-write DDR50DRVST DDR50 Speed Drive Strength 27 2 read-write DDR50SDCLKFREQ Preset Value for DDR50 Speed of SD_CLK 16 10 read-write SDR104CLKGENEN SDR104 SD_CLK Gen Enable 10 1 read-write SDR104DRVST SDR104 SD Drive Strength 11 2 read-write SDR104SDCLKFREQ SDR104 SD_CLK Frequency 0 10 read-write CLOCKCTRL Clock Control, Timeout Control and Software Register 0x2C 32 read-write n 0x0 0x0 CLKGENSEL Clock Generator Select 5 1 read-write DATTOUTCNTVAL Data Timeout Counter Value 16 4 read-write INTCLKEN Internal Clock Enable 0 1 read-write INTCLKSTABLE Internal Clock Stable 1 1 read-only SDCLKEN SDIO_CLK Pin Clock Enable 2 1 read-write SDCLKFREQSEL SD_CLK Frequency Select 8 8 read-write NODIVISION None 0x00000000 SFTRSTA Software Reset for All 24 1 read-write SFTRSTCMD Software Reset for CMD Line 25 1 read-write SFTRSTDAT Software Reset for DAT Line 26 1 read-write UPPSDCLKFRE Upper Bits of SD_CLK Frequency Select 6 2 read-write CMDARG1 SD Command Argument Register 0x8 32 read-write n 0x0 0x0 CMDARG1 Command Argument 1 0 32 read-write CTRL Core Control Signals 0x800 32 read-write n 0x0 0x0 ITAPCHGWIN Gating Signal for Tap Delay Change 6 1 read-write ITAPDLYEN Selective Tap Delay Line Enable on Rxclk_in 0 1 read-write ITAPDLYSEL Selects One of 32 Taps on the Rxclk_in Line 1 5 read-write OTAPDLYEN Selective Tap Delay Line Enable on SDIO_CLK Pin 7 1 read-write OTAPDLYSEL Selects One of 32 Taps on the SDIO_CLK Pin 8 4 read-write TXDLYMUXSEL TX Delay Mux Selection 16 2 read-write FEVTERRSTAT Force Event Register for Auto CMD Error Status 0x50 32 read-write n 0x0 0x0 AC12CRCE Force Event for Auto CMD CRC Error 2 1 read-write AC12E Force Event for Auto CMD Error 24 1 read-write AC12EBE Force Event for Auto CMD End Bit Error 3 1 read-write AC12INDXE Force Event for Auto CMD Index Error 4 1 read-write AC12NEX Force Event for Command Not Issued By Auto CM12 Not Executed 0 1 read-write AC12TOE Force Event for Auto CMD Timeout Error 1 1 read-write ADMAE Force Event for ADMA Error 25 1 read-write CMDCRCE Force Event for Command CRC Error 17 1 read-write CMDEBE Force Event for Command End Bit Error 18 1 read-write CMDINDXE Force Event for Command Index Error 19 1 read-write CMDTOE Force Event for Command Timeout Error 16 1 read-write CNIBAC12E Force Event for Command Not Issued By Auto CMD12 Error 7 1 read-write CURLIMITE Force Event for Current Limit Error 23 1 read-write DATCRCE Force Event for Data CRC Error 21 1 read-write DATEBE Force Event for Data End Bit Error 22 1 read-write DATTOE Force Event for Data Timeout Error 20 1 read-write TUNINGE Force Event for Tuning Errro 26 1 read-only VENSPECE Force Event for Vendox Specific Error Status 28 4 read-only HOSTCTRL1 Host Control1, Power, Block Gap and Wakeup-up Control Register 0x28 32 read-write n 0x0 0x0 ALTBOOTEN Alternate Boot Enable 22 1 read-write BOOTACKCHK Boot Ack Check 23 1 read-write BOOTEN Boot Enable 21 1 read-write CDSIGDET Card Detetct Signal Detection 7 1 read-write CDTSTLVL Card Detect Test Level 6 1 read-write CONTINUEREQ Continue Request 17 1 read-write DATTRANWD Data Transfer Width 1-bit or 4-bit Mode 1 1 read-write DMASEL DMA Select 3 2 read-write SDMA SDMA selected 0x00000000 ADMA1 32-bit ADMA1 selected 0x00000001 ADMA2 32-bit ADMA2 selected 0x00000002 64BITADMA2 64-bit ADMA2 selected 0x00000003 EXTDATTRANWD Extended Data Transfer Width 5 1 read-write HRDRST Hardware Reset Signal 12 1 read-write HSEN High Speed Enable 2 1 read-write INTATBLKGAP Interrupt at Block Gap 19 1 read-write LEDCTRL LED Control 0 1 read-write RDWAITCTRL Read Wait Control 18 1 read-write SDBUSPOWER SD Bus Power 8 1 read-write SDBUSVOLTSEL SD Bus Voltage Select 9 3 read-write 1P8V Select 1.8V 0x00000005 3P0V Select 3.0V 0x00000006 3P3V Select 3.3V 0x00000007 SPIMODE SPI Mode Enable 20 1 read-write STOPATBLKGAPREQ Stop at Block Gap Request 16 1 read-write WKUPEVNTENONCARDINT Wakeup Event Enable on Card Interrupt 24 1 read-write WKUPEVNTENONCINS Wakeup Event Enable on SD Card Insertion 25 1 read-write WKUPEVNTENONCRM Wakeup Event Enable on SD Card Removal 26 1 read-write IEN Normal and Error Interrupt Signal Enable Register 0x38 32 read-write n 0x0 0x0 ADMAERRSEN ADMA Error Signal Enable 25 1 read-write AUTOCMDERRSEN Auto CMD12 Error Signal Enable 24 1 read-write BLKGAPEVTSEN Block Gap Event Signal Enable 2 1 read-write BOOTACKRCVSEN Boot Ack Received Signal Enable 13 1 read-write BOOTTERMINATESEN Boot Terminate Interrupt Signal Enable 14 1 read-write BUFRDRDYSEN Buffer Read Ready Signal Enable 5 1 read-write BUFWRRDYSEN Buffer Write Ready Signal Enable 4 1 read-write CARDINSSEN Card Insertion Signal Enable 6 1 read-write CARDINTSEN Card Interrupt Signal Enable 8 1 read-write CARDREMSEN Card Removal Signal Enable 7 1 read-write CMDCOMSEN Command Complete Signal Enable 0 1 read-write CMDCRCERRSEN Command CRC Error Signal Enable 17 1 read-write CMDENDBITERRSEN Command End Bit Error Signal Enable 18 1 read-write CMDINDEXERRSEN Command Index Error Signal Enable 19 1 read-write CMDTOUTERRSEN Command Timeout Error Signal Enable 16 1 read-write CURRENTLIMITERRSEN Current Limit Error Signal Enable 23 1 read-write DATCRCERRSEN Data CRC Error Signal Enable 21 1 read-write DATENDBITERRSEN Data End Bit Error Signal Enable 22 1 read-write DATTOUTERRSEN Data Timeout Error Signal Enable 20 1 read-write DMAINTSEN DMA Interrupt Signal Enable 3 1 read-write RETUNINGEVTSEN Re-Tuning Event Signal Enable 12 1 read-write TARGETRESPERRSEN Target Response Error Signal Enable 28 1 read-write TRANCOMSEN Transfer Complete Signal Enable 1 1 read-write TUNINGERRSIGNALENABLE Tuning Error Signal Enable 26 1 read-write IFCR Normal and Error Interrupt Status Register 0x30 32 read-write n 0x0 0x0 ADMAERR ADMA Error 25 1 read-write AUTOCMDERR Auto CMD Error 24 1 read-write BFRRDRDY Buffer Read Ready 5 1 read-write BFRWRRDY Buffer Write Ready 4 1 read-write BLKGAPEVT Block Gap Event 2 1 read-write BOOTACKRCV Boot Ack Received 13 1 read-write BOOTTERMINATE Boot Terminate Interrupt 14 1 read-write CARDINS Card Insertion 6 1 read-write CARDINT Card Interrupt 8 1 read-only CARDRM Card Removal 7 1 read-write CMDCOM Command Complete 0 1 read-write CMDCRCERR CMD CRC Error 17 1 read-write CMDENDBITERR Command End Bit Error 18 1 read-write CMDINDEXERR Command Index Error 19 1 read-write CMDTOUTERR Command Timeout Error 16 1 read-write CURRENTLIMITERR Current Limit Error 23 1 read-write DATCRCERR Data CRC Error 21 1 read-write DATENDBITERR Data End Bit Error 22 1 read-write DATTOUTERR Data Time-out Error 20 1 read-write DMAINT DMA Interrupt 3 1 read-write ERRINT Error Interrupt 15 1 read-only RETUNINGEVT Re-Tunning Event 12 1 read-only TARGETRESP Specific Error STAT 28 1 read-write TRANCOM Transfer Complete 1 1 read-write IFENC Normal and Error Interrupt Status Enable Register 0x34 32 read-write n 0x0 0x0 ADMAERREN ADMA Error Status Enable 25 1 read-write AUTOCMDERREN Auto CMD12 Error Status Enable 24 1 read-write BLKGAPEVTEN Block Gap Event Signal Enable 2 1 read-write BOOTACKRCVEN Boot Ack Received Signal Enable 13 1 read-write BOOTTERMINATEEN Boot Terminate Interrupt Signal Enable 14 1 read-write BUFRDRDYEN Buffer Read Ready Signal Enable 5 1 read-write BUFWRRDYEN Buffer Write Ready Signal Enable 4 1 read-write CARDINSEN Card Insertion Signal Enable 6 1 read-write CARDINTEN Card Interrupt Signal Enable 8 1 read-write CARDRMEN Card Removal Signal Enable 7 1 read-write CMDCOMEN Command Complete Signal Enable 0 1 read-write CMDCRCERREN Command CRC Error Status Enable 17 1 read-write CMDENDBITERREN Command End Bit Error Status Enable 18 1 read-write CMDINDEXERREN Command Index Error Status Enable 19 1 read-write CMDTOUTERREN Command Time-out Error Status Enable 16 1 read-write CURRENTLIMITERREN Current Limit Error Status Enable 23 1 read-write DATCRCERREN Data CRC Error Status Enable 21 1 read-write DATENDBITERREN Data End Bit Error Status Enable 22 1 read-write DATTOUTERREN Data Timeout Error Status Enable 20 1 read-write DMAINTEN DMA Interrupt Signal Enable 3 1 read-write RETUNINGEVTEN Re-Tunning Event Signal Enable 12 1 read-write TARGETRESPEN Target Response/Host Error Status Enable 28 1 read-write TRANCOMEN Transfer Complete Signal Enable 1 1 read-write TUNINGERREN Tuning Error Status Enable 26 1 read-write MAXCURCAPAB Maximum Current Capabilities Register 0x48 32 read-only n 0x0 0x0 MAXCUR1P8VAL Maximum Current for 1.8V 16 8 read-only MAXCUR3P0VAL Maximum Current for 3.0V 8 8 read-only MAXCUR3P3VAL Maximum Current for 3.3V 0 8 read-only PRSSTAT Present State Register 0x24 32 read-only n 0x0 0x0 BUFFERWRITEENABLE Buffer Write Enable 10 1 read-only BUFRDEN Buffer Read Enable 11 1 read-only CARDDETPINLVL Card Detect Pin Level 18 1 read-only CARDINS Card Inserted Status 16 1 read-only CARDSTATESTABLE Card State Stable Status 17 1 read-only CMDINHIBITCMD Command Inhibit (CMD) 0 1 read-only CMDINHIBITDAT Command Inhibit (DAT) 1 1 read-only CMDSIGLVL Command Line Signal Level 24 1 read-only DAT3TO0SIGLVL DAT[3:0] Line Signal Level 20 4 read-only DAT7TO4SIGLVL DAT[7:4] Line Signal Level 25 4 read-only DATLINEACTIVE DAT Line Active 2 1 read-only RDTRANACT Read Transfer Active 9 1 read-only RETUNINGREQ Re-Tuning Request 3 1 read-only WRPROTSWPINLVL Write Protect Switch Pin Level 19 1 read-only WRTRANACT Write Transfer Active 8 1 read-only PRSTVAL0 Preset Value for Initialization and Default Speed Mode 0x60 32 read-only n 0x0 0x0 DSPCLKGENVAL Clock Generator Select Value for Default Speed 26 1 read-only DSPDRVSTVAL Driver Strength Select Value for Default Speed 30 2 read-only TYPEB Driver Type B is selected (Default) 0x00000000 TYPEA Driver Type A is selected 0x00000001 TYPEC Driver Type C is selected 0x00000002 TYPED Driver Type D is selected 0x00000003 DSPSDCLKFREQVAL SD_CLK Frequency Select Value for Default Speed 16 10 read-only INITCLCKGENVAL Clock Generator Select Value for Initialization 10 1 read-only INITDRVSTVAL Driver Strength Select Value for Initialization 14 2 read-only TYPEB Driver Type B is selected (Default) 0x00000000 TYPEA Driver Type A is selected 0x00000001 TYPEC Driver Type C is selected 0x00000002 TYPED Driver Type D is selected 0x00000003 INITSDCLKFREQVAL SD_CLK Frequency Select Value for Initialization 0 10 read-only PRSTVAL2 Preset Value for High Speed and SDR12 Modes 0x64 32 read-only n 0x0 0x0 HSPCLKGENVAL Clock Generator Select Value for High Speed 10 1 read-only HSPDRVSTVAL Driver Strength Select Value for High Speed 14 2 read-only TYPEB Driver Type B is selected (Default) 0x00000000 TYPEA Driver Type A is selected 0x00000001 TYPEC Driver Type C is selected 0x00000002 TYPED Driver Type D is selected 0x00000003 HSPSDCLKFREQVAL SD_CLK Frequency Select Value for High Speed 0 10 read-only SDR12CLKGENVAL Clock Generator Select Value for SDR12 26 1 read-only SDR12DRVSTVAL Driver Strength Select Value for SDR12 30 2 read-only TYPEB Driver Type B is selected (Default) 0x00000000 TYPEA Driver Type A is selected 0x00000001 TYPEC Driver Type C is selected 0x00000002 TYPED Driver Type D is selected 0x00000003 SDR12SDCLKFREQVAL SD_CLK Frequency Select Value for SDR12 16 10 read-only PRSTVAL4 Preset Value for SDR25 and SDR50 Modes 0x68 32 read-only n 0x0 0x0 SDR25CLKGENVAL Clock Generator Select Value for SDR25 10 1 read-only SDR25DRVSTVAL Driver Strength Select Value for SDR25 14 2 read-only TYPEB Driver Type B is selected (Default) 0x00000000 TYPEA Driver Type A is selected 0x00000001 TYPEC Driver Type C is selected 0x00000002 TYPED Driver Type D is selected 0x00000003 SDR25SDCLKFREQVAL SD_CLK Frequency Select Value for SDR25 0 10 read-only SDR50CLCKGENVAL Clock Generator Select Value for SDR50 26 1 read-only SDR50DRVSTVAL Driver Strength Select Value for SDR50 30 2 read-only TYPEB Driver Type B is selected (Default) 0x00000000 TYPEA Driver Type A is selected 0x00000001 TYPEC Driver Type C is selected 0x00000002 TYPED Driver Type D is selected 0x00000003 SDR50SDCLKFREQVAL SD_CLK Frequency Select Value for SDR50 16 10 read-only PRSTVAL6 Preset Value for SDR104 and DDR50 Modes 0x6C 32 read-only n 0x0 0x0 DDR50CLKGENVAL Clock Generator Select Value for DDR50 26 1 read-only DDR50DRVSTVAL Driver Strength Select Value for DDR50 30 2 read-only TYPEB Driver Type B is selected (Default) 0x00000000 TYPEA Driver Type A is selected 0x00000001 TYPEC Driver Type C is selected 0x00000002 TYPED Driver Type D is selected 0x00000003 DDR50SDCLKFREQVAL SD_CLK Frequency Select Value for DDR50 16 10 read-only SDR104CLKGENVAL Clock Generator Select Value for SDR104 10 1 read-only SDR104DRVSTVAL Driver Strength Select Value for SDR104 14 2 read-only TYPEB Driver Type B is selected (Default) 0x00000000 TYPEA Driver Type A is selected 0x00000001 TYPEC Driver Type C is selected 0x00000002 TYPED Driver Type D is selected 0x00000003 SDR104SDCLKFREQVAL SD_CLK Frequency Select Value for SDR104 0 10 read-only RESP0 Response0 and Response1 Register 0x10 32 read-only n 0x0 0x0 CMDRESP0 Command Response 0 0 32 read-only RESP2 Response2 and Response3 Register 0x14 32 read-only n 0x0 0x0 CMDRESP1 Command Response 1 0 32 read-only RESP4 Response4 and Response5 Register 0x18 32 read-only n 0x0 0x0 CMDRESP2 Command Response 2 0 32 read-only RESP6 Response6 and Response7 Register 0x1C 32 read-only n 0x0 0x0 CMDRESP3 Command Response 3 0 32 read-only ROUTELOC0 I/O LOCATION Register 0x81C 32 read-write n 0x0 0x0 CDLOC I/O Location for CD 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 CLKLOC I/O Location for CLK 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 DATLOC I/O Location for D0-7 Pins 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 WPLOC I/O Location for WP 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 ROUTELOC1 I/O LOCATION Register 0x820 32 read-write n 0x0 0x0 CMDLOC I/O Location for CMD Pin 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 ROUTEPEN I/O LOCATION Enable Register 0x824 32 read-write n 0x0 0x0 CLKPEN CLK I/O Enable 0 1 read-write CMDPEN CMD I/O Enable 1 1 read-write D0PEN Dat0 I/O Enable 2 1 read-write D1PEN Dat1 I/O Enable 3 1 read-write D2PEN Dat2 I/O Enable 4 1 read-write D3PEN Dat3 I/O Enable 5 1 read-write D4PEN Dat4 I/O Enable 6 1 read-write D5PEN Dat5 Enable 7 1 read-write D6PEN Dat6 Enable 8 1 read-write D7PEN Data7 I/O Enable 9 1 read-write SDMASYSADDR SDMA System Address Register 0x0 32 read-write n 0x0 0x0 SDMASYSADDRARG Physical SYS Memory ADDR Used for DMA Transfers or the Second Argument for the Auto CMD23 0 32 read-write SLOTINTSTAT Slot Interrupt Status Register 0xFC 32 read-only n 0x0 0x0 INTSLOT0 Interrupt Signal for Slot#0 0 1 read-only SPECVERNUM Host Controller Compliant Spec Version Number 16 8 read-only VENDVERNUM Vendor Version Number 24 8 read-only TFRMODE Transfer Mode and Command Register 0xC 32 read-write n 0x0 0x0 AUTOCMDEN Auto Command Enable 2 2 read-write ACMDDISABLED Auto CMD Disabled 0x00000000 ACMD12EN Auto CMD12 Enable 0x00000001 ACMD23EN Auto CMD23 Enable 0x00000002 BLKCNTEN Block Count Enable 1 1 read-write CMDCRCCHKEN Command CRC Check Enable 19 1 read-write CMDINDEX Command Index 24 6 read-write CMDINDXCHKEN Command Index Check Enable 20 1 read-write CMDTYPE Command Type 22 2 read-write NORMAL Normal Command 0x00000000 SUSPEND Suspend command 0x00000001 RESUME Resume command 0x00000002 ABORT Abort command 0x00000003 DATDIRSEL Data Transfer Direction Select 4 1 read-write DATPRESSEL Data Present Select 21 1 read-write DMAEN DMA Enable 0 1 read-write MULTSINGBLKSEL Multiple or Single Block Data Transfer Selection 5 1 read-write RESPTYPESEL Response Type Select 16 2 read-write NORESP No RESP 0x00000000 RESP136 RESP Length 136 0x00000001 RESP48 RESP Length 48 0x00000002 BUSYAFTRESP RESP Length 48 check busy after RESP 0x00000003 SMU SMU SMU 0x0 0x0 0x400 registers n SMU 4 IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 PPUPRIV PPUPRIV Interrupt Enable 0 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 PPUPRIV PPU Privilege Interrupt Flag 0 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 PPUPRIV Clear PPUPRIV Interrupt Flag 0 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 PPUPRIV Set PPUPRIV Interrupt Flag 0 1 write-only PPUCTRL PPU Control Register 0x40 32 read-write n 0x0 0x0 ENABLE 0 1 read-write PPUFS PPU Fault Status 0x90 32 read-only n 0x0 0x0 PERIPHID 0 7 read-only ACMP0 Analog Comparator 0 0x00000000 ACMP1 Analog Comparator 1 0x00000001 ACMP2 Analog Comparator 1 0x00000002 ACMP3 Analog Comparator 3 0x00000003 ADC0 Analog to Digital Converter 0 0x00000004 ADC1 Analog to Digital Converter 0 0x00000005 CAN0 CAN 0 0x00000006 CAN1 CAN 1 0x00000007 CMU Clock Management Unit 0x00000008 CRYOTIMER CRYOTIMER 0x00000009 CRYPTO0 Advanced Encryption Standard Accelerator 0x0000000A CSEN Capacitive touch sense module 0x0000000B VDAC0 Digital to Analog Converter 0 0x0000000C PRS Peripheral Reflex System 0x0000000D EBI External Bus Interface 0x0000000E EMU Energy Management Unit 0x0000000F ETH Ethernet Controller 0x00000010 FPUEH FPU Exception Handler 0x00000011 GPCRC General Purpose CRC 0x00000012 GPIO General purpose Input/Output 0x00000013 I2C0 I2C 0 0x00000014 I2C1 I2C 1 0x00000015 I2C2 I2C 2 0x00000016 IDAC0 Current Digital to Analog Converter 0 0x00000017 MSC Memory System Controller 0x00000018 LCD Liquid Crystal Display Controller 0x00000019 LDMA Linked Direct Memory Access Controller 0x0000001A LESENSE Low Energy Sensor Interface 0x0000001B LETIMER0 Low Energy Timer 0 0x0000001C LETIMER1 Low Energy Timer 1 0x0000001D LEUART0 Low Energy UART 0 0x0000001E LEUART1 Low Energy UART 1 0x0000001F PCNT0 Pulse Counter 0 0x00000020 PCNT1 Pulse Counter 1 0x00000021 PCNT2 Pulse Counter 2 0x00000022 QSPI0 Quad-SPI 0x00000023 RMU Reset Management Unit 0x00000024 RTC Real-Time Counter 0x00000025 RTCC Real-Time Counter and Calendar 0x00000026 SDIO SDIO Controller 0x00000027 SMU Security Management Unit 0x00000028 TIMER0 Timer 0 0x00000029 TIMER1 Timer 1 0x0000002A TIMER2 Timer 2 0x0000002B TIMER3 Timer 3 0x0000002C TIMER4 Timer 4 0x0000002D TIMER5 Timer 5 0x0000002E TIMER6 Timer 6 0x0000002F TRNG0 True Random Number Generator 0 0x00000030 UART0 Universal Asynchronous Receiver/Transmitter 0 0x00000031 UART1 Universal Asynchronous Receiver/Transmitter 1 0x00000032 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000033 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000034 USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 0x00000035 USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 0x00000036 USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 0x00000037 USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 0x00000038 USB Universal Serial Bus Interface 0x00000039 WDOG0 Watchdog 0x0000003A WDOG1 Watchdog 0x0000003B WTIMER0 Wide Timer 0 0x0000003C WTIMER1 Wide Timer 0 0x0000003D WTIMER2 Wide Timer 2 0x0000003E WTIMER3 Wide Timer 3 0x0000003F PPUPATD0 PPU Privilege Access Type Descriptor 0 0x50 32 read-write n 0x0 0x0 ACMP0 Analog Comparator 0 access control bit 0 1 read-write ACMP1 Analog Comparator 1 access control bit 1 1 read-write ACMP2 Analog Comparator 1 access control bit 2 1 read-write ACMP3 Analog Comparator 3 access control bit 3 1 read-write ADC0 Analog to Digital Converter 0 access control bit 4 1 read-write ADC1 Analog to Digital Converter 0 access control bit 5 1 read-write CAN0 CAN 0 access control bit 6 1 read-write CAN1 CAN 1 access control bit 7 1 read-write CMU Clock Management Unit access control bit 8 1 read-write CRYOTIMER CRYOTIMER access control bit 9 1 read-write CRYPTO0 Advanced Encryption Standard Accelerator access control bit 10 1 read-write CSEN Capacitive touch sense module access control bit 11 1 read-write EBI External Bus Interface access control bit 14 1 read-write EMU Energy Management Unit access control bit 15 1 read-write ETH Ethernet Controller access control bit 16 1 read-write FPUEH FPU Exception Handler access control bit 17 1 read-write GPCRC General Purpose CRC access control bit 18 1 read-write GPIO General purpose Input/Output access control bit 19 1 read-write I2C0 I2C 0 access control bit 20 1 read-write I2C1 I2C 1 access control bit 21 1 read-write I2C2 I2C 2 access control bit 22 1 read-write IDAC0 Current Digital to Analog Converter 0 access control bit 23 1 read-write LCD Liquid Crystal Display Controller access control bit 25 1 read-write LDMA Linked Direct Memory Access Controller access control bit 26 1 read-write LESENSE Low Energy Sensor Interface access control bit 27 1 read-write LETIMER0 Low Energy Timer 0 access control bit 28 1 read-write LETIMER1 Low Energy Timer 1 access control bit 29 1 read-write LEUART0 Low Energy UART 0 access control bit 30 1 read-write LEUART1 Low Energy UART 1 access control bit 31 1 read-write MSC Memory System Controller access control bit 24 1 read-write PRS Peripheral Reflex System access control bit 13 1 read-write VDAC0 Digital to Analog Converter 0 access control bit 12 1 read-write PPUPATD1 PPU Privilege Access Type Descriptor 1 0x54 32 read-write n 0x0 0x0 PCNT0 Pulse Counter 0 access control bit 0 1 read-write PCNT1 Pulse Counter 1 access control bit 1 1 read-write PCNT2 Pulse Counter 2 access control bit 2 1 read-write QSPI0 Quad-SPI access control bit 3 1 read-write RMU Reset Management Unit access control bit 4 1 read-write RTC Real-Time Counter access control bit 5 1 read-write RTCC Real-Time Counter and Calendar access control bit 6 1 read-write SDIO SDIO Controller access control bit 7 1 read-write SMU Security Management Unit access control bit 8 1 read-write TIMER0 Timer 0 access control bit 9 1 read-write TIMER1 Timer 1 access control bit 10 1 read-write TIMER2 Timer 2 access control bit 11 1 read-write TIMER3 Timer 3 access control bit 12 1 read-write TIMER4 Timer 4 access control bit 13 1 read-write TIMER5 Timer 5 access control bit 14 1 read-write TIMER6 Timer 6 access control bit 15 1 read-write TRNG0 True Random Number Generator 0 access control bit 16 1 read-write UART0 Universal Asynchronous Receiver/Transmitter 0 access control bit 17 1 read-write UART1 Universal Asynchronous Receiver/Transmitter 1 access control bit 18 1 read-write USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 access control bit 19 1 read-write USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 access control bit 20 1 read-write USART2 Universal Synchronous/Asynchronous Receiver/Transmitter 2 access control bit 21 1 read-write USART3 Universal Synchronous/Asynchronous Receiver/Transmitter 3 access control bit 22 1 read-write USART4 Universal Synchronous/Asynchronous Receiver/Transmitter 4 access control bit 23 1 read-write USART5 Universal Synchronous/Asynchronous Receiver/Transmitter 5 access control bit 24 1 read-write USB Universal Serial Bus Interface access control bit 25 1 read-write WDOG0 Watchdog access control bit 26 1 read-write WDOG1 Watchdog access control bit 27 1 read-write WTIMER0 Wide Timer 0 access control bit 28 1 read-write WTIMER1 Wide Timer 0 access control bit 29 1 read-write WTIMER2 Wide Timer 2 access control bit 30 1 read-write WTIMER3 Wide Timer 3 access control bit 31 1 read-write PPUPATD2 PPU Privilege Access Type Descriptor 2 0x58 32 read-write n 0x0 0x0 TIMER0 TIMER0 TIMER0 0x0 0x0 0x400 registers n TIMER0 5 CC0_CCV CC Channel Value Register 0x64 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC0_CCVB CC Channel Buffer Register 0x6C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC0_CCVP CC Channel Value Peek Register 0x68 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC0_CTRL CC Channel Control Register 0x60 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC1_CCV CC Channel Value Register 0x74 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC1_CCVB CC Channel Buffer Register 0x7C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC1_CCVP CC Channel Value Peek Register 0x78 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC1_CTRL CC Channel Control Register 0x70 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC2_CCV CC Channel Value Register 0x84 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC2_CCVB CC Channel Buffer Register 0x8C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC2_CCVP CC Channel Value Peek Register 0x88 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC2_CTRL CC Channel Control Register 0x80 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC3_CCV CC Channel Value Register 0x94 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC3_CCVB CC Channel Buffer Register 0x9C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC3_CCVP CC Channel Value Peek Register 0x98 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC3_CTRL CC Channel Control Register 0x90 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 32 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ATI Always Track Inputs 28 1 read-write CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DISSYNCOUT Disable Timer From Start/Stop/Reload Other Synchronized Timers 14 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 RSSCOIST Reload-Start Sets Compare Output Initial State 29 1 read-write SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write X2CNT 2x Count Mode 13 1 read-write DTCTRL DTI Control Register 0xA0 32 read-write n 0x0 0x0 DTAR DTI Always Run 9 1 read-write DTCINV DTI Complementary Output Invert 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTFATS DTI Fault Action on Timer Stop 10 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 DTFAULT DTI Fault Register 0xB0 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0xB4 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0xA8 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 5 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 2 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 3 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 4 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 5 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 6 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 7 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 8 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 9 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 10 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 11 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 12 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 13 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 14 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 15 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 16 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 17 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 18 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 19 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 20 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 21 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 22 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 23 0x00000017 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 5 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 1 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 1 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 1 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 1 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 1 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 1 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 1 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 1 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 1 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 1 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 1 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 1 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 1 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 1 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 1 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 1 0x00000017 DTLOCK DTI Configuration Lock Register 0xB8 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 DTOGEN DTI Output Generation Enable Register 0xAC 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0xA4 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 CC0 CC0 Interrupt Enable 4 1 read-write CC1 CC1 Interrupt Enable 5 1 read-write CC2 CC2 Interrupt Enable 6 1 read-write CC3 CC3 Interrupt Enable 7 1 read-write DIRCHG DIRCHG Interrupt Enable 2 1 read-write ICBOF0 ICBOF0 Interrupt Enable 8 1 read-write ICBOF1 ICBOF1 Interrupt Enable 9 1 read-write ICBOF2 ICBOF2 Interrupt Enable 10 1 read-write ICBOF3 ICBOF3 Interrupt Enable 11 1 read-write OF OF Interrupt Enable 0 1 read-write UF UF Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only CC3 CC Channel 3 Interrupt Flag 7 1 read-only DIRCHG Direction Change Detect Interrupt Flag 2 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only ICBOF3 CC Channel 3 Input Capture Buffer Overflow Interrupt Flag 11 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 CC0 Clear CC0 Interrupt Flag 4 1 write-only CC1 Clear CC1 Interrupt Flag 5 1 write-only CC2 Clear CC2 Interrupt Flag 6 1 write-only CC3 Clear CC3 Interrupt Flag 7 1 write-only DIRCHG Clear DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Clear ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Clear ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Clear ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Clear ICBOF3 Interrupt Flag 11 1 write-only OF Clear OF Interrupt Flag 0 1 write-only UF Clear UF Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 CC0 Set CC0 Interrupt Flag 4 1 write-only CC1 Set CC1 Interrupt Flag 5 1 write-only CC2 Set CC2 Interrupt Flag 6 1 write-only CC3 Set CC3 Interrupt Flag 7 1 write-only DIRCHG Set DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Set ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Set ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Set ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Set ICBOF3 Interrupt Flag 11 1 write-only OF Set OF Interrupt Flag 0 1 write-only UF Set UF Interrupt Flag 1 1 write-only LOCK TIMER Configuration Lock Register 0x2C 32 read-write n 0x0 0x0 TIMERLOCKKEY Timer Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 ROUTELOC0 I/O Routing Location Register 0x34 32 read-write n 0x0 0x0 CC0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTELOC2 I/O Routing Location Register 0x3C 32 read-write n 0x0 0x0 CDTI0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 ROUTEPEN I/O Routing Pin Enable Register 0x30 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CC3PEN CC Channel 3 Pin Enable 3 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCPOL3 CC3 Polarity 27 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only CCVBV3 CC3 CCVB Valid 11 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only ICV3 CC3 Input Capture Valid 19 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 32 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 32 read-write TIMER1 TIMER1 TIMER1 0x0 0x0 0x400 registers n TIMER1 14 CC0_CCV CC Channel Value Register 0x64 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC0_CCVB CC Channel Buffer Register 0x6C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC0_CCVP CC Channel Value Peek Register 0x68 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC0_CTRL CC Channel Control Register 0x60 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC1_CCV CC Channel Value Register 0x74 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC1_CCVB CC Channel Buffer Register 0x7C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC1_CCVP CC Channel Value Peek Register 0x78 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC1_CTRL CC Channel Control Register 0x70 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC2_CCV CC Channel Value Register 0x84 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC2_CCVB CC Channel Buffer Register 0x8C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC2_CCVP CC Channel Value Peek Register 0x88 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC2_CTRL CC Channel Control Register 0x80 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC3_CCV CC Channel Value Register 0x94 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC3_CCVB CC Channel Buffer Register 0x9C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC3_CCVP CC Channel Value Peek Register 0x98 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC3_CTRL CC Channel Control Register 0x90 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 32 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ATI Always Track Inputs 28 1 read-write CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DISSYNCOUT Disable Timer From Start/Stop/Reload Other Synchronized Timers 14 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 RSSCOIST Reload-Start Sets Compare Output Initial State 29 1 read-write SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write X2CNT 2x Count Mode 13 1 read-write DTCTRL DTI Control Register 0xA0 32 read-write n 0x0 0x0 DTAR DTI Always Run 9 1 read-write DTCINV DTI Complementary Output Invert 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTFATS DTI Fault Action on Timer Stop 10 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 DTFAULT DTI Fault Register 0xB0 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0xB4 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0xA8 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 5 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 2 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 3 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 4 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 5 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 6 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 7 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 8 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 9 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 10 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 11 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 12 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 13 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 14 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 15 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 16 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 17 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 18 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 19 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 20 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 21 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 22 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 23 0x00000017 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 5 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 1 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 1 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 1 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 1 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 1 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 1 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 1 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 1 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 1 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 1 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 1 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 1 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 1 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 1 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 1 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 1 0x00000017 DTLOCK DTI Configuration Lock Register 0xB8 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 DTOGEN DTI Output Generation Enable Register 0xAC 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0xA4 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 CC0 CC0 Interrupt Enable 4 1 read-write CC1 CC1 Interrupt Enable 5 1 read-write CC2 CC2 Interrupt Enable 6 1 read-write CC3 CC3 Interrupt Enable 7 1 read-write DIRCHG DIRCHG Interrupt Enable 2 1 read-write ICBOF0 ICBOF0 Interrupt Enable 8 1 read-write ICBOF1 ICBOF1 Interrupt Enable 9 1 read-write ICBOF2 ICBOF2 Interrupt Enable 10 1 read-write ICBOF3 ICBOF3 Interrupt Enable 11 1 read-write OF OF Interrupt Enable 0 1 read-write UF UF Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only CC3 CC Channel 3 Interrupt Flag 7 1 read-only DIRCHG Direction Change Detect Interrupt Flag 2 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only ICBOF3 CC Channel 3 Input Capture Buffer Overflow Interrupt Flag 11 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 CC0 Clear CC0 Interrupt Flag 4 1 write-only CC1 Clear CC1 Interrupt Flag 5 1 write-only CC2 Clear CC2 Interrupt Flag 6 1 write-only CC3 Clear CC3 Interrupt Flag 7 1 write-only DIRCHG Clear DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Clear ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Clear ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Clear ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Clear ICBOF3 Interrupt Flag 11 1 write-only OF Clear OF Interrupt Flag 0 1 write-only UF Clear UF Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 CC0 Set CC0 Interrupt Flag 4 1 write-only CC1 Set CC1 Interrupt Flag 5 1 write-only CC2 Set CC2 Interrupt Flag 6 1 write-only CC3 Set CC3 Interrupt Flag 7 1 write-only DIRCHG Set DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Set ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Set ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Set ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Set ICBOF3 Interrupt Flag 11 1 write-only OF Set OF Interrupt Flag 0 1 write-only UF Set UF Interrupt Flag 1 1 write-only LOCK TIMER Configuration Lock Register 0x2C 32 read-write n 0x0 0x0 TIMERLOCKKEY Timer Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 ROUTELOC0 I/O Routing Location Register 0x34 32 read-write n 0x0 0x0 CC0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTELOC2 I/O Routing Location Register 0x3C 32 read-write n 0x0 0x0 CDTI0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 ROUTEPEN I/O Routing Pin Enable Register 0x30 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CC3PEN CC Channel 3 Pin Enable 3 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCPOL3 CC3 Polarity 27 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only CCVBV3 CC3 CCVB Valid 11 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only ICV3 CC3 Input Capture Valid 19 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 32 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 32 read-write TIMER2 TIMER2 TIMER2 0x0 0x0 0x400 registers n TIMER2 15 CC0_CCV CC Channel Value Register 0x64 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC0_CCVB CC Channel Buffer Register 0x6C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC0_CCVP CC Channel Value Peek Register 0x68 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC0_CTRL CC Channel Control Register 0x60 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC1_CCV CC Channel Value Register 0x74 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC1_CCVB CC Channel Buffer Register 0x7C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC1_CCVP CC Channel Value Peek Register 0x78 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC1_CTRL CC Channel Control Register 0x70 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC2_CCV CC Channel Value Register 0x84 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC2_CCVB CC Channel Buffer Register 0x8C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC2_CCVP CC Channel Value Peek Register 0x88 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC2_CTRL CC Channel Control Register 0x80 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC3_CCV CC Channel Value Register 0x94 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC3_CCVB CC Channel Buffer Register 0x9C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC3_CCVP CC Channel Value Peek Register 0x98 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC3_CTRL CC Channel Control Register 0x90 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 32 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ATI Always Track Inputs 28 1 read-write CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DISSYNCOUT Disable Timer From Start/Stop/Reload Other Synchronized Timers 14 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 RSSCOIST Reload-Start Sets Compare Output Initial State 29 1 read-write SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write X2CNT 2x Count Mode 13 1 read-write DTCTRL DTI Control Register 0xA0 32 read-write n 0x0 0x0 DTAR DTI Always Run 9 1 read-write DTCINV DTI Complementary Output Invert 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTFATS DTI Fault Action on Timer Stop 10 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 DTFAULT DTI Fault Register 0xB0 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0xB4 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0xA8 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 5 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 2 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 3 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 4 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 5 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 6 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 7 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 8 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 9 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 10 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 11 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 12 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 13 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 14 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 15 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 16 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 17 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 18 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 19 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 20 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 21 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 22 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 23 0x00000017 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 5 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 1 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 1 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 1 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 1 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 1 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 1 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 1 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 1 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 1 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 1 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 1 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 1 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 1 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 1 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 1 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 1 0x00000017 DTLOCK DTI Configuration Lock Register 0xB8 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 DTOGEN DTI Output Generation Enable Register 0xAC 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0xA4 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 CC0 CC0 Interrupt Enable 4 1 read-write CC1 CC1 Interrupt Enable 5 1 read-write CC2 CC2 Interrupt Enable 6 1 read-write CC3 CC3 Interrupt Enable 7 1 read-write DIRCHG DIRCHG Interrupt Enable 2 1 read-write ICBOF0 ICBOF0 Interrupt Enable 8 1 read-write ICBOF1 ICBOF1 Interrupt Enable 9 1 read-write ICBOF2 ICBOF2 Interrupt Enable 10 1 read-write ICBOF3 ICBOF3 Interrupt Enable 11 1 read-write OF OF Interrupt Enable 0 1 read-write UF UF Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only CC3 CC Channel 3 Interrupt Flag 7 1 read-only DIRCHG Direction Change Detect Interrupt Flag 2 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only ICBOF3 CC Channel 3 Input Capture Buffer Overflow Interrupt Flag 11 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 CC0 Clear CC0 Interrupt Flag 4 1 write-only CC1 Clear CC1 Interrupt Flag 5 1 write-only CC2 Clear CC2 Interrupt Flag 6 1 write-only CC3 Clear CC3 Interrupt Flag 7 1 write-only DIRCHG Clear DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Clear ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Clear ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Clear ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Clear ICBOF3 Interrupt Flag 11 1 write-only OF Clear OF Interrupt Flag 0 1 write-only UF Clear UF Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 CC0 Set CC0 Interrupt Flag 4 1 write-only CC1 Set CC1 Interrupt Flag 5 1 write-only CC2 Set CC2 Interrupt Flag 6 1 write-only CC3 Set CC3 Interrupt Flag 7 1 write-only DIRCHG Set DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Set ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Set ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Set ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Set ICBOF3 Interrupt Flag 11 1 write-only OF Set OF Interrupt Flag 0 1 write-only UF Set UF Interrupt Flag 1 1 write-only LOCK TIMER Configuration Lock Register 0x2C 32 read-write n 0x0 0x0 TIMERLOCKKEY Timer Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 ROUTELOC0 I/O Routing Location Register 0x34 32 read-write n 0x0 0x0 CC0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTELOC2 I/O Routing Location Register 0x3C 32 read-write n 0x0 0x0 CDTI0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 ROUTEPEN I/O Routing Pin Enable Register 0x30 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CC3PEN CC Channel 3 Pin Enable 3 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCPOL3 CC3 Polarity 27 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only CCVBV3 CC3 CCVB Valid 11 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only ICV3 CC3 Input Capture Valid 19 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 32 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 32 read-write TIMER3 TIMER3 TIMER3 0x0 0x0 0x400 registers n TIMER3 16 CC0_CCV CC Channel Value Register 0x64 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC0_CCVB CC Channel Buffer Register 0x6C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC0_CCVP CC Channel Value Peek Register 0x68 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC0_CTRL CC Channel Control Register 0x60 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC1_CCV CC Channel Value Register 0x74 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC1_CCVB CC Channel Buffer Register 0x7C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC1_CCVP CC Channel Value Peek Register 0x78 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC1_CTRL CC Channel Control Register 0x70 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC2_CCV CC Channel Value Register 0x84 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC2_CCVB CC Channel Buffer Register 0x8C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC2_CCVP CC Channel Value Peek Register 0x88 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC2_CTRL CC Channel Control Register 0x80 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC3_CCV CC Channel Value Register 0x94 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC3_CCVB CC Channel Buffer Register 0x9C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC3_CCVP CC Channel Value Peek Register 0x98 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC3_CTRL CC Channel Control Register 0x90 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 32 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ATI Always Track Inputs 28 1 read-write CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DISSYNCOUT Disable Timer From Start/Stop/Reload Other Synchronized Timers 14 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 RSSCOIST Reload-Start Sets Compare Output Initial State 29 1 read-write SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write X2CNT 2x Count Mode 13 1 read-write DTCTRL DTI Control Register 0xA0 32 read-write n 0x0 0x0 DTAR DTI Always Run 9 1 read-write DTCINV DTI Complementary Output Invert 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTFATS DTI Fault Action on Timer Stop 10 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 DTFAULT DTI Fault Register 0xB0 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0xB4 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0xA8 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 5 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 2 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 3 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 4 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 5 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 6 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 7 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 8 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 9 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 10 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 11 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 12 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 13 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 14 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 15 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 16 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 17 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 18 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 19 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 20 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 21 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 22 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 23 0x00000017 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 5 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 1 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 1 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 1 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 1 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 1 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 1 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 1 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 1 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 1 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 1 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 1 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 1 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 1 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 1 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 1 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 1 0x00000017 DTLOCK DTI Configuration Lock Register 0xB8 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 DTOGEN DTI Output Generation Enable Register 0xAC 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0xA4 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 CC0 CC0 Interrupt Enable 4 1 read-write CC1 CC1 Interrupt Enable 5 1 read-write CC2 CC2 Interrupt Enable 6 1 read-write CC3 CC3 Interrupt Enable 7 1 read-write DIRCHG DIRCHG Interrupt Enable 2 1 read-write ICBOF0 ICBOF0 Interrupt Enable 8 1 read-write ICBOF1 ICBOF1 Interrupt Enable 9 1 read-write ICBOF2 ICBOF2 Interrupt Enable 10 1 read-write ICBOF3 ICBOF3 Interrupt Enable 11 1 read-write OF OF Interrupt Enable 0 1 read-write UF UF Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only CC3 CC Channel 3 Interrupt Flag 7 1 read-only DIRCHG Direction Change Detect Interrupt Flag 2 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only ICBOF3 CC Channel 3 Input Capture Buffer Overflow Interrupt Flag 11 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 CC0 Clear CC0 Interrupt Flag 4 1 write-only CC1 Clear CC1 Interrupt Flag 5 1 write-only CC2 Clear CC2 Interrupt Flag 6 1 write-only CC3 Clear CC3 Interrupt Flag 7 1 write-only DIRCHG Clear DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Clear ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Clear ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Clear ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Clear ICBOF3 Interrupt Flag 11 1 write-only OF Clear OF Interrupt Flag 0 1 write-only UF Clear UF Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 CC0 Set CC0 Interrupt Flag 4 1 write-only CC1 Set CC1 Interrupt Flag 5 1 write-only CC2 Set CC2 Interrupt Flag 6 1 write-only CC3 Set CC3 Interrupt Flag 7 1 write-only DIRCHG Set DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Set ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Set ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Set ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Set ICBOF3 Interrupt Flag 11 1 write-only OF Set OF Interrupt Flag 0 1 write-only UF Set UF Interrupt Flag 1 1 write-only LOCK TIMER Configuration Lock Register 0x2C 32 read-write n 0x0 0x0 TIMERLOCKKEY Timer Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 ROUTELOC0 I/O Routing Location Register 0x34 32 read-write n 0x0 0x0 CC0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTELOC2 I/O Routing Location Register 0x3C 32 read-write n 0x0 0x0 CDTI0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 ROUTEPEN I/O Routing Pin Enable Register 0x30 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CC3PEN CC Channel 3 Pin Enable 3 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCPOL3 CC3 Polarity 27 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only CCVBV3 CC3 CCVB Valid 11 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only ICV3 CC3 Input Capture Valid 19 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 32 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 32 read-write TIMER4 TIMER4 TIMER4 0x0 0x0 0x400 registers n TIMER4 47 CC0_CCV CC Channel Value Register 0x64 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC0_CCVB CC Channel Buffer Register 0x6C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC0_CCVP CC Channel Value Peek Register 0x68 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC0_CTRL CC Channel Control Register 0x60 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC1_CCV CC Channel Value Register 0x74 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC1_CCVB CC Channel Buffer Register 0x7C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC1_CCVP CC Channel Value Peek Register 0x78 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC1_CTRL CC Channel Control Register 0x70 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC2_CCV CC Channel Value Register 0x84 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC2_CCVB CC Channel Buffer Register 0x8C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC2_CCVP CC Channel Value Peek Register 0x88 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC2_CTRL CC Channel Control Register 0x80 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC3_CCV CC Channel Value Register 0x94 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC3_CCVB CC Channel Buffer Register 0x9C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC3_CCVP CC Channel Value Peek Register 0x98 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC3_CTRL CC Channel Control Register 0x90 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 32 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ATI Always Track Inputs 28 1 read-write CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DISSYNCOUT Disable Timer From Start/Stop/Reload Other Synchronized Timers 14 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 RSSCOIST Reload-Start Sets Compare Output Initial State 29 1 read-write SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write X2CNT 2x Count Mode 13 1 read-write DTCTRL DTI Control Register 0xA0 32 read-write n 0x0 0x0 DTAR DTI Always Run 9 1 read-write DTCINV DTI Complementary Output Invert 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTFATS DTI Fault Action on Timer Stop 10 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 DTFAULT DTI Fault Register 0xB0 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0xB4 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0xA8 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 5 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 2 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 3 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 4 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 5 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 6 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 7 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 8 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 9 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 10 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 11 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 12 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 13 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 14 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 15 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 16 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 17 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 18 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 19 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 20 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 21 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 22 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 23 0x00000017 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 5 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 1 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 1 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 1 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 1 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 1 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 1 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 1 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 1 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 1 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 1 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 1 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 1 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 1 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 1 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 1 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 1 0x00000017 DTLOCK DTI Configuration Lock Register 0xB8 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 DTOGEN DTI Output Generation Enable Register 0xAC 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0xA4 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 CC0 CC0 Interrupt Enable 4 1 read-write CC1 CC1 Interrupt Enable 5 1 read-write CC2 CC2 Interrupt Enable 6 1 read-write CC3 CC3 Interrupt Enable 7 1 read-write DIRCHG DIRCHG Interrupt Enable 2 1 read-write ICBOF0 ICBOF0 Interrupt Enable 8 1 read-write ICBOF1 ICBOF1 Interrupt Enable 9 1 read-write ICBOF2 ICBOF2 Interrupt Enable 10 1 read-write ICBOF3 ICBOF3 Interrupt Enable 11 1 read-write OF OF Interrupt Enable 0 1 read-write UF UF Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only CC3 CC Channel 3 Interrupt Flag 7 1 read-only DIRCHG Direction Change Detect Interrupt Flag 2 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only ICBOF3 CC Channel 3 Input Capture Buffer Overflow Interrupt Flag 11 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 CC0 Clear CC0 Interrupt Flag 4 1 write-only CC1 Clear CC1 Interrupt Flag 5 1 write-only CC2 Clear CC2 Interrupt Flag 6 1 write-only CC3 Clear CC3 Interrupt Flag 7 1 write-only DIRCHG Clear DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Clear ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Clear ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Clear ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Clear ICBOF3 Interrupt Flag 11 1 write-only OF Clear OF Interrupt Flag 0 1 write-only UF Clear UF Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 CC0 Set CC0 Interrupt Flag 4 1 write-only CC1 Set CC1 Interrupt Flag 5 1 write-only CC2 Set CC2 Interrupt Flag 6 1 write-only CC3 Set CC3 Interrupt Flag 7 1 write-only DIRCHG Set DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Set ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Set ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Set ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Set ICBOF3 Interrupt Flag 11 1 write-only OF Set OF Interrupt Flag 0 1 write-only UF Set UF Interrupt Flag 1 1 write-only LOCK TIMER Configuration Lock Register 0x2C 32 read-write n 0x0 0x0 TIMERLOCKKEY Timer Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 ROUTELOC0 I/O Routing Location Register 0x34 32 read-write n 0x0 0x0 CC0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTELOC2 I/O Routing Location Register 0x3C 32 read-write n 0x0 0x0 CDTI0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 ROUTEPEN I/O Routing Pin Enable Register 0x30 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CC3PEN CC Channel 3 Pin Enable 3 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCPOL3 CC3 Polarity 27 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only CCVBV3 CC3 CCVB Valid 11 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only ICV3 CC3 Input Capture Valid 19 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 32 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 32 read-write TIMER5 TIMER5 TIMER5 0x0 0x0 0x400 registers n TIMER5 48 CC0_CCV CC Channel Value Register 0x64 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC0_CCVB CC Channel Buffer Register 0x6C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC0_CCVP CC Channel Value Peek Register 0x68 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC0_CTRL CC Channel Control Register 0x60 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC1_CCV CC Channel Value Register 0x74 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC1_CCVB CC Channel Buffer Register 0x7C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC1_CCVP CC Channel Value Peek Register 0x78 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC1_CTRL CC Channel Control Register 0x70 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC2_CCV CC Channel Value Register 0x84 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC2_CCVB CC Channel Buffer Register 0x8C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC2_CCVP CC Channel Value Peek Register 0x88 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC2_CTRL CC Channel Control Register 0x80 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC3_CCV CC Channel Value Register 0x94 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC3_CCVB CC Channel Buffer Register 0x9C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC3_CCVP CC Channel Value Peek Register 0x98 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC3_CTRL CC Channel Control Register 0x90 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 32 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ATI Always Track Inputs 28 1 read-write CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DISSYNCOUT Disable Timer From Start/Stop/Reload Other Synchronized Timers 14 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 RSSCOIST Reload-Start Sets Compare Output Initial State 29 1 read-write SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write X2CNT 2x Count Mode 13 1 read-write DTCTRL DTI Control Register 0xA0 32 read-write n 0x0 0x0 DTAR DTI Always Run 9 1 read-write DTCINV DTI Complementary Output Invert 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTFATS DTI Fault Action on Timer Stop 10 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 DTFAULT DTI Fault Register 0xB0 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0xB4 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0xA8 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 5 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 2 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 3 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 4 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 5 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 6 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 7 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 8 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 9 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 10 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 11 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 12 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 13 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 14 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 15 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 16 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 17 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 18 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 19 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 20 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 21 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 22 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 23 0x00000017 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 5 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 1 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 1 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 1 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 1 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 1 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 1 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 1 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 1 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 1 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 1 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 1 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 1 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 1 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 1 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 1 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 1 0x00000017 DTLOCK DTI Configuration Lock Register 0xB8 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 DTOGEN DTI Output Generation Enable Register 0xAC 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0xA4 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 CC0 CC0 Interrupt Enable 4 1 read-write CC1 CC1 Interrupt Enable 5 1 read-write CC2 CC2 Interrupt Enable 6 1 read-write CC3 CC3 Interrupt Enable 7 1 read-write DIRCHG DIRCHG Interrupt Enable 2 1 read-write ICBOF0 ICBOF0 Interrupt Enable 8 1 read-write ICBOF1 ICBOF1 Interrupt Enable 9 1 read-write ICBOF2 ICBOF2 Interrupt Enable 10 1 read-write ICBOF3 ICBOF3 Interrupt Enable 11 1 read-write OF OF Interrupt Enable 0 1 read-write UF UF Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only CC3 CC Channel 3 Interrupt Flag 7 1 read-only DIRCHG Direction Change Detect Interrupt Flag 2 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only ICBOF3 CC Channel 3 Input Capture Buffer Overflow Interrupt Flag 11 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 CC0 Clear CC0 Interrupt Flag 4 1 write-only CC1 Clear CC1 Interrupt Flag 5 1 write-only CC2 Clear CC2 Interrupt Flag 6 1 write-only CC3 Clear CC3 Interrupt Flag 7 1 write-only DIRCHG Clear DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Clear ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Clear ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Clear ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Clear ICBOF3 Interrupt Flag 11 1 write-only OF Clear OF Interrupt Flag 0 1 write-only UF Clear UF Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 CC0 Set CC0 Interrupt Flag 4 1 write-only CC1 Set CC1 Interrupt Flag 5 1 write-only CC2 Set CC2 Interrupt Flag 6 1 write-only CC3 Set CC3 Interrupt Flag 7 1 write-only DIRCHG Set DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Set ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Set ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Set ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Set ICBOF3 Interrupt Flag 11 1 write-only OF Set OF Interrupt Flag 0 1 write-only UF Set UF Interrupt Flag 1 1 write-only LOCK TIMER Configuration Lock Register 0x2C 32 read-write n 0x0 0x0 TIMERLOCKKEY Timer Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 ROUTELOC0 I/O Routing Location Register 0x34 32 read-write n 0x0 0x0 CC0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTELOC2 I/O Routing Location Register 0x3C 32 read-write n 0x0 0x0 CDTI0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 ROUTEPEN I/O Routing Pin Enable Register 0x30 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CC3PEN CC Channel 3 Pin Enable 3 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCPOL3 CC3 Polarity 27 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only CCVBV3 CC3 CCVB Valid 11 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only ICV3 CC3 Input Capture Valid 19 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 32 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 32 read-write TIMER6 TIMER6 TIMER6 0x0 0x0 0x400 registers n TIMER6 49 CC0_CCV CC Channel Value Register 0x64 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC0_CCVB CC Channel Buffer Register 0x6C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC0_CCVP CC Channel Value Peek Register 0x68 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC0_CTRL CC Channel Control Register 0x60 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC1_CCV CC Channel Value Register 0x74 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC1_CCVB CC Channel Buffer Register 0x7C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC1_CCVP CC Channel Value Peek Register 0x78 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC1_CTRL CC Channel Control Register 0x70 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC2_CCV CC Channel Value Register 0x84 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC2_CCVB CC Channel Buffer Register 0x8C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC2_CCVP CC Channel Value Peek Register 0x88 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC2_CTRL CC Channel Control Register 0x80 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC3_CCV CC Channel Value Register 0x94 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC3_CCVB CC Channel Buffer Register 0x9C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC3_CCVP CC Channel Value Peek Register 0x98 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC3_CTRL CC Channel Control Register 0x90 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 32 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ATI Always Track Inputs 28 1 read-write CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DISSYNCOUT Disable Timer From Start/Stop/Reload Other Synchronized Timers 14 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 RSSCOIST Reload-Start Sets Compare Output Initial State 29 1 read-write SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write X2CNT 2x Count Mode 13 1 read-write DTCTRL DTI Control Register 0xA0 32 read-write n 0x0 0x0 DTAR DTI Always Run 9 1 read-write DTCINV DTI Complementary Output Invert 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTFATS DTI Fault Action on Timer Stop 10 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 DTFAULT DTI Fault Register 0xB0 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0xB4 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0xA8 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 5 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 2 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 3 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 4 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 5 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 6 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 7 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 8 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 9 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 10 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 11 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 12 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 13 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 14 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 15 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 16 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 17 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 18 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 19 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 20 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 21 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 22 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 23 0x00000017 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 5 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 1 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 1 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 1 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 1 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 1 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 1 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 1 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 1 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 1 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 1 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 1 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 1 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 1 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 1 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 1 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 1 0x00000017 DTLOCK DTI Configuration Lock Register 0xB8 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 DTOGEN DTI Output Generation Enable Register 0xAC 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0xA4 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 CC0 CC0 Interrupt Enable 4 1 read-write CC1 CC1 Interrupt Enable 5 1 read-write CC2 CC2 Interrupt Enable 6 1 read-write CC3 CC3 Interrupt Enable 7 1 read-write DIRCHG DIRCHG Interrupt Enable 2 1 read-write ICBOF0 ICBOF0 Interrupt Enable 8 1 read-write ICBOF1 ICBOF1 Interrupt Enable 9 1 read-write ICBOF2 ICBOF2 Interrupt Enable 10 1 read-write ICBOF3 ICBOF3 Interrupt Enable 11 1 read-write OF OF Interrupt Enable 0 1 read-write UF UF Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only CC3 CC Channel 3 Interrupt Flag 7 1 read-only DIRCHG Direction Change Detect Interrupt Flag 2 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only ICBOF3 CC Channel 3 Input Capture Buffer Overflow Interrupt Flag 11 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 CC0 Clear CC0 Interrupt Flag 4 1 write-only CC1 Clear CC1 Interrupt Flag 5 1 write-only CC2 Clear CC2 Interrupt Flag 6 1 write-only CC3 Clear CC3 Interrupt Flag 7 1 write-only DIRCHG Clear DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Clear ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Clear ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Clear ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Clear ICBOF3 Interrupt Flag 11 1 write-only OF Clear OF Interrupt Flag 0 1 write-only UF Clear UF Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 CC0 Set CC0 Interrupt Flag 4 1 write-only CC1 Set CC1 Interrupt Flag 5 1 write-only CC2 Set CC2 Interrupt Flag 6 1 write-only CC3 Set CC3 Interrupt Flag 7 1 write-only DIRCHG Set DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Set ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Set ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Set ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Set ICBOF3 Interrupt Flag 11 1 write-only OF Set OF Interrupt Flag 0 1 write-only UF Set UF Interrupt Flag 1 1 write-only LOCK TIMER Configuration Lock Register 0x2C 32 read-write n 0x0 0x0 TIMERLOCKKEY Timer Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 ROUTELOC0 I/O Routing Location Register 0x34 32 read-write n 0x0 0x0 CC0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTELOC2 I/O Routing Location Register 0x3C 32 read-write n 0x0 0x0 CDTI0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 ROUTEPEN I/O Routing Pin Enable Register 0x30 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CC3PEN CC Channel 3 Pin Enable 3 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCPOL3 CC3 Polarity 27 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only CCVBV3 CC3 CCVB Valid 11 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only ICV3 CC3 Input Capture Valid 19 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 32 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 32 read-write TRNG0 TRNG0 TRNG0 0x0 0x0 0x400 registers n TRNG0 66 CONTROL Main Control Register 0x0 32 read-write n 0x0 0x0 ALMIEN Interrupt enable for AIS31 noise alarm 10 1 read-write APT4096IEN Interrupt Enable for Adaptive Proportion Test Failure (4096-sample Window) 6 1 read-write APT64IEN Interrupt Enable for Adaptive Proportion Test Failure (64-sample Window) 5 1 read-write BYPAIS31 AIS31 Start-up Test Bypass. 13 1 read-write BYPNIST NIST Start-up Test Bypass. 12 1 read-write CONDBYPASS Conditioning Bypass 3 1 read-write ENABLE TRNG Module Enable 0 1 read-write FORCERUN Oscillator Force Run 11 1 read-write FULLIEN Interrupt Enable for FIFO Full 7 1 read-write PREIEN Interrupt enable for AIS31 preliminary noise alarm 9 1 read-write REPCOUNTIEN Interrupt Enable for Repetition Count Test Failure 4 1 read-write SOFTRESET Software Reset 8 1 read-write TESTEN Test Enable 2 1 read-write FIFO FIFO Data 0x100 32 read-only n 0x0 0x0 modifyExternal VALUE FIFO Read Data 0 32 read-only FIFODEPTH FIFO Depth Register 0xC 32 read-only n 0x0 0x0 VALUE FIFO Depth. 0 32 read-only FIFOLEVEL FIFO Level Register 0x4 32 read-only n 0x0 0x0 modifyExternal VALUE FIFO Level 0 32 read-only INITWAITVAL Initial Wait Counter 0x34 32 read-write n 0x0 0x0 VALUE Wait counter value 0 8 read-write KEY0 Key Register 0 0x10 32 read-write n 0x0 0x0 VALUE Key 0 0 32 read-write KEY1 Key Register 1 0x14 32 read-write n 0x0 0x0 VALUE Key 1 0 32 read-write KEY2 Key Register 2 0x18 32 read-write n 0x0 0x0 VALUE Key 2 0 32 read-write KEY3 Key Register 3 0x1C 32 read-write n 0x0 0x0 VALUE Key 3 0 32 read-write STATUS Status Register 0x30 32 read-write n 0x0 0x0 ALMIF AIS31 Noise Alarm interrupt status 9 1 read-only APT4096IF Adaptive Proportion test failure (4096-sample window) interrupt status 6 1 read-only APT64IF Adaptive Proportion test failure (64-sample window) interrupt status 5 1 read-only FULLIF FIFO Full Interrupt Status 7 1 read-only PREIF AIS31 Preliminary Noise Alarm interrupt status 8 1 read-write REPCOUNTIF Repetition Count Test Interrupt Status 4 1 read-only TESTDATABUSY Test Data Busy 0 1 read-only TESTDATA Test Data Register 0x20 32 read-write n 0x0 0x0 VALUE Test data input to conditioning function or to the continuous tests 0 32 read-write UART0 UART0 UART0 0x0 0x0 0x400 registers n UART0_RX 21 UART0_TX 22 CLKDIV Clock Control Register 0x14 32 read-write n 0x0 0x0 AUTOBAUDEN AUTOBAUD Detection Enable 31 1 read-write DIV Fractional Clock Divider 3 20 read-write CMD Command Register 0xC 32 write-only n 0x0 0x0 CLEARRX Clear RX 11 1 write-only CLEARTX Clear TX 10 1 write-only MASTERDIS Master Disable 5 1 write-only MASTEREN Master Enable 4 1 write-only RXBLOCKDIS Receiver Block Disable 7 1 write-only RXBLOCKEN Receiver Block Enable 6 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only TXTRIDIS Transmitter Tristate Disable 9 1 write-only TXTRIEN Transmitter Tristate Enable 8 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOCS Automatic Chip Select 16 1 read-write AUTOTRI Automatic TX Tristate 17 1 read-write AUTOTX Always Transmit When RX Not Full 29 1 read-write BIT8DV Bit 8 Default Value 21 1 read-write BYTESWAP Byteswap in Double Accesses 28 1 read-write CCEN Collision Check Enable 2 1 read-write CLKPHA Clock Edge for Setup/Sample 9 1 read-write CLKPOL Clock Polarity 8 1 read-write CSINV Chip Select Invert 15 1 read-write CSMA Action on Slave-Select in Master Mode 11 1 read-write ERRSDMA Halt DMA on Error 22 1 read-write ERRSRX Disable RX on Error 23 1 read-write ERRSTX Disable TX on Error 24 1 read-write LOOPBK Loopback Enable 1 1 read-write MPAB Multi-Processor Address-Bit 4 1 read-write MPM Multi-Processor Mode 3 1 read-write MSBF Most Significant Bit First 10 1 read-write MVDIS Majority Vote Disable 30 1 read-write OVS Oversampling 5 2 read-write X16 Regular UART mode with 16X oversampling in asynchronous mode 0x00000000 X8 Double speed with 8X oversampling in asynchronous mode 0x00000001 X6 6X oversampling in asynchronous mode 0x00000002 X4 Quadruple speed with 4X oversampling in asynchronous mode 0x00000003 RXINV Receiver Input Invert 13 1 read-write SCMODE SmartCard Mode 18 1 read-write SCRETRANS SmartCard Retransmit 19 1 read-write SKIPPERRF Skip Parity Error Frames 20 1 read-write SMSDELAY Synchronous Master Sample Delay 31 1 read-write SSSEARLY Synchronous Slave Setup Early 25 1 read-write SYNC USART Synchronous Mode 0 1 read-write TXBIL TX Buffer Interrupt Level 12 1 read-write TXINV Transmitter Output Invert 14 1 read-write CTRLX Control Register Extended 0x64 32 read-write n 0x0 0x0 CTSEN CTS Function Enabled 2 1 read-write CTSINV CTS Pin Inversion 1 1 read-write DBGHALT Debug Halt 0 1 read-write RTSINV RTS Pin Inversion 3 1 read-write FRAME USART Frame Format Register 0x4 32 read-write n 0x0 0x0 DATABITS Data-Bit Mode 0 4 read-write FOUR Each frame contains 4 data bits 0x00000001 FIVE Each frame contains 5 data bits 0x00000002 SIX Each frame contains 6 data bits 0x00000003 SEVEN Each frame contains 7 data bits 0x00000004 EIGHT Each frame contains 8 data bits 0x00000005 NINE Each frame contains 9 data bits 0x00000006 TEN Each frame contains 10 data bits 0x00000007 ELEVEN Each frame contains 11 data bits 0x00000008 TWELVE Each frame contains 12 data bits 0x00000009 THIRTEEN Each frame contains 13 data bits 0x0000000A FOURTEEN Each frame contains 14 data bits 0x0000000B FIFTEEN Each frame contains 15 data bits 0x0000000C SIXTEEN Each frame contains 16 data bits 0x0000000D PARITY Parity-Bit Mode 8 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 12 2 read-write HALF The transmitter generates a half stop bit. Stop-bits are not verified by receiver 0x00000000 ONE One stop bit is generated and verified 0x00000001 ONEANDAHALF The transmitter generates one and a half stop bit. The receiver verifies the first stop bit 0x00000002 TWO The transmitter generates two stop bits. The receiver checks the first stop-bit only 0x00000003 I2SCTRL I2S Control Register 0x5C 32 read-write n 0x0 0x0 DELAY Delay on I2S Data 4 1 read-write DMASPLIT Separate DMA Request for Left/Right Data 3 1 read-write EN Enable I2S Mode 0 1 read-write FORMAT I2S Word Format 8 3 read-write W32D32 32-bit word, 32-bit data 0x00000000 W32D24M 32-bit word, 32-bit data with 8 lsb masked 0x00000001 W32D24 32-bit word, 24-bit data 0x00000002 W32D16 32-bit word, 16-bit data 0x00000003 W32D8 32-bit word, 8-bit data 0x00000004 W16D16 16-bit word, 16-bit data 0x00000005 W16D8 16-bit word, 8-bit data 0x00000006 W8D8 8-bit word, 8-bit data 0x00000007 JUSTIFY Justification of I2S Data 2 1 read-write MONO Stero or Mono 1 1 read-write IEN Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 CCF CCF Interrupt Enable 12 1 read-write FERR FERR Interrupt Enable 9 1 read-write MPAF MPAF Interrupt Enable 10 1 read-write PERR PERR Interrupt Enable 8 1 read-write RXDATAV RXDATAV Interrupt Enable 2 1 read-write RXFULL RXFULL Interrupt Enable 3 1 read-write RXOF RXOF Interrupt Enable 4 1 read-write RXUF RXUF Interrupt Enable 5 1 read-write SSM SSM Interrupt Enable 11 1 read-write TCMP0 TCMP0 Interrupt Enable 14 1 read-write TCMP1 TCMP1 Interrupt Enable 15 1 read-write TCMP2 TCMP2 Interrupt Enable 16 1 read-write TXBL TXBL Interrupt Enable 1 1 read-write TXC TXC Interrupt Enable 0 1 read-write TXIDLE TXIDLE Interrupt Enable 13 1 read-write TXOF TXOF Interrupt Enable 6 1 read-write TXUF TXUF Interrupt Enable 7 1 read-write IF Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 CCF Collision Check Fail Interrupt Flag 12 1 read-only FERR Framing Error Interrupt Flag 9 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 10 1 read-only PERR Parity Error Interrupt Flag 8 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXFULL RX Buffer Full Interrupt Flag 3 1 read-only RXOF RX Overflow Interrupt Flag 4 1 read-only RXUF RX Underflow Interrupt Flag 5 1 read-only SSM Slave-Select in Master Mode Interrupt Flag 11 1 read-only TCMP0 Timer Comparator 0 Interrupt Flag 14 1 read-only TCMP1 Timer Comparator 1 Interrupt Flag 15 1 read-only TCMP2 Timer Comparator 2 Interrupt Flag 16 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXIDLE TX Idle Interrupt Flag 13 1 read-only TXOF TX Overflow Interrupt Flag 6 1 read-only TXUF TX Underflow Interrupt Flag 7 1 read-only IFC Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 CCF Clear CCF Interrupt Flag 12 1 write-only FERR Clear FERR Interrupt Flag 9 1 write-only MPAF Clear MPAF Interrupt Flag 10 1 write-only PERR Clear PERR Interrupt Flag 8 1 write-only RXFULL Clear RXFULL Interrupt Flag 3 1 write-only RXOF Clear RXOF Interrupt Flag 4 1 write-only RXUF Clear RXUF Interrupt Flag 5 1 write-only SSM Clear SSM Interrupt Flag 11 1 write-only TCMP0 Clear TCMP0 Interrupt Flag 14 1 write-only TCMP1 Clear TCMP1 Interrupt Flag 15 1 write-only TCMP2 Clear TCMP2 Interrupt Flag 16 1 write-only TXC Clear TXC Interrupt Flag 0 1 write-only TXIDLE Clear TXIDLE Interrupt Flag 13 1 write-only TXOF Clear TXOF Interrupt Flag 6 1 write-only TXUF Clear TXUF Interrupt Flag 7 1 write-only IFS Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 CCF Set CCF Interrupt Flag 12 1 write-only FERR Set FERR Interrupt Flag 9 1 write-only MPAF Set MPAF Interrupt Flag 10 1 write-only PERR Set PERR Interrupt Flag 8 1 write-only RXFULL Set RXFULL Interrupt Flag 3 1 write-only RXOF Set RXOF Interrupt Flag 4 1 write-only RXUF Set RXUF Interrupt Flag 5 1 write-only SSM Set SSM Interrupt Flag 11 1 write-only TCMP0 Set TCMP0 Interrupt Flag 14 1 write-only TCMP1 Set TCMP1 Interrupt Flag 15 1 write-only TCMP2 Set TCMP2 Interrupt Flag 16 1 write-only TXC Set TXC Interrupt Flag 0 1 write-only TXIDLE Set TXIDLE Interrupt Flag 13 1 write-only TXOF Set TXOF Interrupt Flag 6 1 write-only TXUF Set TXUF Interrupt Flag 7 1 write-only INPUT USART Input Register 0x58 32 read-write n 0x0 0x0 CLKPRS PRS CLK Enable 15 1 read-write CLKPRSSEL CLK PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 RXPRS PRS RX Enable 7 1 read-write RXPRSSEL RX PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRCTRL IrDA Control Register 0x50 32 read-write n 0x0 0x0 IREN Enable IrDA Module 0 1 read-write IRFILT IrDA RX Filter 3 1 read-write IRPRSEN IrDA PRS Channel Enable 7 1 read-write IRPRSSEL IrDA PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRPW IrDA TX Pulse Width 1 2 read-write ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 0x00000000 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 0x00000001 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 0x00000002 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 0x00000003 ROUTELOC0 I/O Routing Location Register 0x78 32 read-write n 0x0 0x0 CLKLOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 CSLOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RXLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 TXLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTELOC1 I/O Routing Location Register 0x7C 32 read-write n 0x0 0x0 CTSLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RTSLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTEPEN I/O Routing Pin Enable Register 0x74 32 read-write n 0x0 0x0 CLKPEN CLK Pin Enable 3 1 read-write CSPEN CS Pin Enable 2 1 read-write CTSPEN CTS Pin Enable 4 1 read-write RTSPEN RTS Pin Enable 5 1 read-write RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA RX Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX RX Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Data Framing Error 15 1 read-only PERR Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP RX Buffer Data Extended Peek Register 0x28 32 read-only n 0x0 0x0 FERRP Data Framing Error Peek 15 1 read-only PERRP Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only RXDOUBLE RX FIFO Double Data Register 0x24 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEX RX Buffer Double Data Extended Register 0x20 32 read-only n 0x0 0x0 modifyExternal FERR0 Data Framing Error 0 15 1 read-only FERR1 Data Framing Error 1 31 1 read-only PERR0 Data Parity Error 0 14 1 read-only PERR1 Data Parity Error 1 30 1 read-only RXDATA0 RX Data 0 0 9 read-only RXDATA1 RX Data 1 16 9 read-only RXDOUBLEXP RX Buffer Double Data Extended Peek Register 0x2C 32 read-only n 0x0 0x0 FERRP0 Data Framing Error 0 Peek 15 1 read-only FERRP1 Data Framing Error 1 Peek 31 1 read-only PERRP0 Data Parity Error 0 Peek 14 1 read-only PERRP1 Data Parity Error 1 Peek 30 1 read-only RXDATAP0 RX Data 0 Peek 0 9 read-only RXDATAP1 RX Data 1 Peek 16 9 read-only STATUS USART Status Register 0x10 32 read-only n 0x0 0x0 MASTER SPI Master Mode 2 1 read-only RXBLOCK Block Incoming Data 3 1 read-only RXDATAV RX Data Valid 7 1 read-only RXDATAVRIGHT RX Data Right 11 1 read-only RXENS Receiver Enable Status 0 1 read-only RXFULL RX FIFO Full 8 1 read-only RXFULLRIGHT RX Full of Right Data 12 1 read-only TIMERRESTARTED The USART Timer Restarted Itself 14 1 read-only TXBDRIGHT TX Buffer Expects Double Right Data 9 1 read-only TXBL TX Buffer Level 6 1 read-only TXBSRIGHT TX Buffer Expects Single Right Data 10 1 read-only TXBUFCNT TX Buffer Count 16 2 read-only TXC TX Complete 5 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXIDLE TX Idle 13 1 read-only TXTRI Transmitter Tristated 4 1 read-only TIMECMP0 Used to Generate Interrupts and Various Delays 0x68 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP0 24 1 read-write TCMPVAL Timer Comparator 0 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 0 is disabled 0x00000000 TXEOF Comparator 0 and timer are started at TX end of frame 0x00000001 TXC Comparator 0 and timer are started at TX Complete 0x00000002 RXACT Comparator 0 and timer are started at RX going Active (default: low) 0x00000003 RXEOF Comparator 0 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 0 20 3 read-write TCMP0 Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event 0x00000000 TXST Comparator 0 is disabled at the start of transmission 0x00000001 RXACT Comparator 0 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 0 is disabled on RX going Inactive 0x00000003 TIMECMP1 Used to Generate Interrupts and Various Delays 0x6C 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP1 24 1 read-write TCMPVAL Timer Comparator 1 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 1 is disabled 0x00000000 TXEOF Comparator 1 and timer are started at TX end of frame 0x00000001 TXC Comparator 1 and timer are started at TX Complete 0x00000002 RXACT Comparator 1 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 1 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 1 20 3 read-write TCMP1 Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event 0x00000000 TXST Comparator 1 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 1 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 1 is disabled on RX going Inactive 0x00000003 TIMECMP2 Used to Generate Interrupts and Various Delays 0x70 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP2 24 1 read-write TCMPVAL Timer Comparator 2 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 2 is disabled 0x00000000 TXEOF Comparator 2 and timer are started at TX end of frame 0x00000001 TXC Comparator 2 and timer are started at TX Complete 0x00000002 RXACT Comparator 2 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 2 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 2 20 3 read-write TCMP2 Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event 0x00000000 TXST Comparator 2 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 2 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 2 is disabled on RX going Inactive 0x00000003 TIMING Timing Register 0x60 32 read-write n 0x0 0x0 CSHOLD Chip Select Hold 28 3 read-write ZERO Disable CS being asserted after the end of transmission 0x00000000 ONE CS is asserted for 1 baud-times after the end of transmission 0x00000001 TWO CS is asserted for 2 baud-times after the end of transmission 0x00000002 THREE CS is asserted for 3 baud-times after the end of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times after the end of transmission 0x00000004 TCMP0 CS is asserted after the end of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted after the end of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted after the end of transmission for TCMPVAL2 baud-times 0x00000007 CSSETUP Chip Select Setup 20 3 read-write ZERO CS is not asserted before start of transmission 0x00000000 ONE CS is asserted for 1 baud-times before start of transmission 0x00000001 TWO CS is asserted for 2 baud-times before start of transmission 0x00000002 THREE CS is asserted for 3 baud-times before start of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times before start of transmission 0x00000004 TCMP0 CS is asserted before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted before the start of transmission for TCMPVAL2 baud-times 0x00000007 ICS Inter-character Spacing 24 3 read-write ZERO There is no space between charcters 0x00000000 ONE Create a space of 1 baud-times before start of transmission 0x00000001 TWO Create a space of 2 baud-times before start of transmission 0x00000002 THREE Create a space of 3 baud-times before start of transmission 0x00000003 SEVEN Create a space of 7 baud-times before start of transmission 0x00000004 TCMP0 Create a space of before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 Create a space of before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 Create a space of before the start of transmission for TCMPVAL2 baud-times 0x00000007 TXDELAY TX Frame Start Delay 16 3 read-write DISABLE Disable - TXDELAY in USARTn_CTRL can be used for legacy 0x00000000 ONE Start of transmission is delayed for 1 baud-times 0x00000001 TWO Start of transmission is delayed for 2 baud-times 0x00000002 THREE Start of transmission is delayed for 3 baud-times 0x00000003 SEVEN Start of transmission is delayed for 7 baud-times 0x00000004 TCMP0 Start of transmission is delayed for TCMPVAL0 baud-times 0x00000005 TCMP1 Start of transmission is delayed for TCMPVAL1 baud-times 0x00000006 TCMP2 Start of transmission is delayed for TCMPVAL2 baud-times 0x00000007 TRIGCTRL USART Trigger Control Register 0x8 32 read-write n 0x0 0x0 AUTOTXTEN AUTOTX Trigger Enable 6 1 read-write RXATX0EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times 10 1 read-write RXATX1EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times 11 1 read-write RXATX2EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times 12 1 read-write RXTEN Receive Trigger Enable 4 1 read-write TSEL Trigger PRS Channel Select 16 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 TXARX0EN Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL 7 1 read-write TXARX1EN Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL 8 1 read-write TXARX2EN Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL 9 1 read-write TXTEN Transmit Trigger Enable 5 1 read-write TXDATA TX Buffer Data Register 0x34 32 read-write n 0x0 0x0 TXDATA TX Data 0 8 read-write TXDATAX TX Buffer Data Extended Register 0x30 32 read-write n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 read-write TXBREAK Transmit Data as Break 13 1 read-write TXDATAX TX Data 0 9 read-write TXDISAT Clear TXEN After Transmission 14 1 read-write TXTRIAT Set TXTRI After Transmission 12 1 read-write UBRXAT Unblock RX After Transmission 11 1 read-write TXDOUBLE TX Buffer Double Data Register 0x3C 32 read-write n 0x0 0x0 TXDATA0 TX Data 0 8 read-write TXDATA1 TX Data 8 8 read-write TXDOUBLEX TX Buffer Double Data Extended Register 0x38 32 read-write n 0x0 0x0 RXENAT0 Enable RX After Transmission 15 1 read-write RXENAT1 Enable RX After Transmission 31 1 read-write TXBREAK0 Transmit Data as Break 13 1 read-write TXBREAK1 Transmit Data as Break 29 1 read-write TXDATA0 TX Data 0 9 read-write TXDATA1 TX Data 16 9 read-write TXDISAT0 Clear TXEN After Transmission 14 1 read-write TXDISAT1 Clear TXEN After Transmission 30 1 read-write TXTRIAT0 Set TXTRI After Transmission 12 1 read-write TXTRIAT1 Set TXTRI After Transmission 28 1 read-write UBRXAT0 Unblock RX After Transmission 11 1 read-write UBRXAT1 Unblock RX After Transmission 27 1 read-write UART1 UART1 UART1 0x0 0x0 0x400 registers n UART1_RX 23 UART1_TX 24 CLKDIV Clock Control Register 0x14 32 read-write n 0x0 0x0 AUTOBAUDEN AUTOBAUD Detection Enable 31 1 read-write DIV Fractional Clock Divider 3 20 read-write CMD Command Register 0xC 32 write-only n 0x0 0x0 CLEARRX Clear RX 11 1 write-only CLEARTX Clear TX 10 1 write-only MASTERDIS Master Disable 5 1 write-only MASTEREN Master Enable 4 1 write-only RXBLOCKDIS Receiver Block Disable 7 1 write-only RXBLOCKEN Receiver Block Enable 6 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only TXTRIDIS Transmitter Tristate Disable 9 1 write-only TXTRIEN Transmitter Tristate Enable 8 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOCS Automatic Chip Select 16 1 read-write AUTOTRI Automatic TX Tristate 17 1 read-write AUTOTX Always Transmit When RX Not Full 29 1 read-write BIT8DV Bit 8 Default Value 21 1 read-write BYTESWAP Byteswap in Double Accesses 28 1 read-write CCEN Collision Check Enable 2 1 read-write CLKPHA Clock Edge for Setup/Sample 9 1 read-write CLKPOL Clock Polarity 8 1 read-write CSINV Chip Select Invert 15 1 read-write CSMA Action on Slave-Select in Master Mode 11 1 read-write ERRSDMA Halt DMA on Error 22 1 read-write ERRSRX Disable RX on Error 23 1 read-write ERRSTX Disable TX on Error 24 1 read-write LOOPBK Loopback Enable 1 1 read-write MPAB Multi-Processor Address-Bit 4 1 read-write MPM Multi-Processor Mode 3 1 read-write MSBF Most Significant Bit First 10 1 read-write MVDIS Majority Vote Disable 30 1 read-write OVS Oversampling 5 2 read-write X16 Regular UART mode with 16X oversampling in asynchronous mode 0x00000000 X8 Double speed with 8X oversampling in asynchronous mode 0x00000001 X6 6X oversampling in asynchronous mode 0x00000002 X4 Quadruple speed with 4X oversampling in asynchronous mode 0x00000003 RXINV Receiver Input Invert 13 1 read-write SCMODE SmartCard Mode 18 1 read-write SCRETRANS SmartCard Retransmit 19 1 read-write SKIPPERRF Skip Parity Error Frames 20 1 read-write SMSDELAY Synchronous Master Sample Delay 31 1 read-write SSSEARLY Synchronous Slave Setup Early 25 1 read-write SYNC USART Synchronous Mode 0 1 read-write TXBIL TX Buffer Interrupt Level 12 1 read-write TXINV Transmitter Output Invert 14 1 read-write CTRLX Control Register Extended 0x64 32 read-write n 0x0 0x0 CTSEN CTS Function Enabled 2 1 read-write CTSINV CTS Pin Inversion 1 1 read-write DBGHALT Debug Halt 0 1 read-write RTSINV RTS Pin Inversion 3 1 read-write FRAME USART Frame Format Register 0x4 32 read-write n 0x0 0x0 DATABITS Data-Bit Mode 0 4 read-write FOUR Each frame contains 4 data bits 0x00000001 FIVE Each frame contains 5 data bits 0x00000002 SIX Each frame contains 6 data bits 0x00000003 SEVEN Each frame contains 7 data bits 0x00000004 EIGHT Each frame contains 8 data bits 0x00000005 NINE Each frame contains 9 data bits 0x00000006 TEN Each frame contains 10 data bits 0x00000007 ELEVEN Each frame contains 11 data bits 0x00000008 TWELVE Each frame contains 12 data bits 0x00000009 THIRTEEN Each frame contains 13 data bits 0x0000000A FOURTEEN Each frame contains 14 data bits 0x0000000B FIFTEEN Each frame contains 15 data bits 0x0000000C SIXTEEN Each frame contains 16 data bits 0x0000000D PARITY Parity-Bit Mode 8 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 12 2 read-write HALF The transmitter generates a half stop bit. Stop-bits are not verified by receiver 0x00000000 ONE One stop bit is generated and verified 0x00000001 ONEANDAHALF The transmitter generates one and a half stop bit. The receiver verifies the first stop bit 0x00000002 TWO The transmitter generates two stop bits. The receiver checks the first stop-bit only 0x00000003 I2SCTRL I2S Control Register 0x5C 32 read-write n 0x0 0x0 DELAY Delay on I2S Data 4 1 read-write DMASPLIT Separate DMA Request for Left/Right Data 3 1 read-write EN Enable I2S Mode 0 1 read-write FORMAT I2S Word Format 8 3 read-write W32D32 32-bit word, 32-bit data 0x00000000 W32D24M 32-bit word, 32-bit data with 8 lsb masked 0x00000001 W32D24 32-bit word, 24-bit data 0x00000002 W32D16 32-bit word, 16-bit data 0x00000003 W32D8 32-bit word, 8-bit data 0x00000004 W16D16 16-bit word, 16-bit data 0x00000005 W16D8 16-bit word, 8-bit data 0x00000006 W8D8 8-bit word, 8-bit data 0x00000007 JUSTIFY Justification of I2S Data 2 1 read-write MONO Stero or Mono 1 1 read-write IEN Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 CCF CCF Interrupt Enable 12 1 read-write FERR FERR Interrupt Enable 9 1 read-write MPAF MPAF Interrupt Enable 10 1 read-write PERR PERR Interrupt Enable 8 1 read-write RXDATAV RXDATAV Interrupt Enable 2 1 read-write RXFULL RXFULL Interrupt Enable 3 1 read-write RXOF RXOF Interrupt Enable 4 1 read-write RXUF RXUF Interrupt Enable 5 1 read-write SSM SSM Interrupt Enable 11 1 read-write TCMP0 TCMP0 Interrupt Enable 14 1 read-write TCMP1 TCMP1 Interrupt Enable 15 1 read-write TCMP2 TCMP2 Interrupt Enable 16 1 read-write TXBL TXBL Interrupt Enable 1 1 read-write TXC TXC Interrupt Enable 0 1 read-write TXIDLE TXIDLE Interrupt Enable 13 1 read-write TXOF TXOF Interrupt Enable 6 1 read-write TXUF TXUF Interrupt Enable 7 1 read-write IF Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 CCF Collision Check Fail Interrupt Flag 12 1 read-only FERR Framing Error Interrupt Flag 9 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 10 1 read-only PERR Parity Error Interrupt Flag 8 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXFULL RX Buffer Full Interrupt Flag 3 1 read-only RXOF RX Overflow Interrupt Flag 4 1 read-only RXUF RX Underflow Interrupt Flag 5 1 read-only SSM Slave-Select in Master Mode Interrupt Flag 11 1 read-only TCMP0 Timer Comparator 0 Interrupt Flag 14 1 read-only TCMP1 Timer Comparator 1 Interrupt Flag 15 1 read-only TCMP2 Timer Comparator 2 Interrupt Flag 16 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXIDLE TX Idle Interrupt Flag 13 1 read-only TXOF TX Overflow Interrupt Flag 6 1 read-only TXUF TX Underflow Interrupt Flag 7 1 read-only IFC Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 CCF Clear CCF Interrupt Flag 12 1 write-only FERR Clear FERR Interrupt Flag 9 1 write-only MPAF Clear MPAF Interrupt Flag 10 1 write-only PERR Clear PERR Interrupt Flag 8 1 write-only RXFULL Clear RXFULL Interrupt Flag 3 1 write-only RXOF Clear RXOF Interrupt Flag 4 1 write-only RXUF Clear RXUF Interrupt Flag 5 1 write-only SSM Clear SSM Interrupt Flag 11 1 write-only TCMP0 Clear TCMP0 Interrupt Flag 14 1 write-only TCMP1 Clear TCMP1 Interrupt Flag 15 1 write-only TCMP2 Clear TCMP2 Interrupt Flag 16 1 write-only TXC Clear TXC Interrupt Flag 0 1 write-only TXIDLE Clear TXIDLE Interrupt Flag 13 1 write-only TXOF Clear TXOF Interrupt Flag 6 1 write-only TXUF Clear TXUF Interrupt Flag 7 1 write-only IFS Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 CCF Set CCF Interrupt Flag 12 1 write-only FERR Set FERR Interrupt Flag 9 1 write-only MPAF Set MPAF Interrupt Flag 10 1 write-only PERR Set PERR Interrupt Flag 8 1 write-only RXFULL Set RXFULL Interrupt Flag 3 1 write-only RXOF Set RXOF Interrupt Flag 4 1 write-only RXUF Set RXUF Interrupt Flag 5 1 write-only SSM Set SSM Interrupt Flag 11 1 write-only TCMP0 Set TCMP0 Interrupt Flag 14 1 write-only TCMP1 Set TCMP1 Interrupt Flag 15 1 write-only TCMP2 Set TCMP2 Interrupt Flag 16 1 write-only TXC Set TXC Interrupt Flag 0 1 write-only TXIDLE Set TXIDLE Interrupt Flag 13 1 write-only TXOF Set TXOF Interrupt Flag 6 1 write-only TXUF Set TXUF Interrupt Flag 7 1 write-only INPUT USART Input Register 0x58 32 read-write n 0x0 0x0 CLKPRS PRS CLK Enable 15 1 read-write CLKPRSSEL CLK PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 RXPRS PRS RX Enable 7 1 read-write RXPRSSEL RX PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRCTRL IrDA Control Register 0x50 32 read-write n 0x0 0x0 IREN Enable IrDA Module 0 1 read-write IRFILT IrDA RX Filter 3 1 read-write IRPRSEN IrDA PRS Channel Enable 7 1 read-write IRPRSSEL IrDA PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRPW IrDA TX Pulse Width 1 2 read-write ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 0x00000000 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 0x00000001 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 0x00000002 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 0x00000003 ROUTELOC0 I/O Routing Location Register 0x78 32 read-write n 0x0 0x0 CLKLOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 CSLOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RXLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 TXLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTELOC1 I/O Routing Location Register 0x7C 32 read-write n 0x0 0x0 CTSLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RTSLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTEPEN I/O Routing Pin Enable Register 0x74 32 read-write n 0x0 0x0 CLKPEN CLK Pin Enable 3 1 read-write CSPEN CS Pin Enable 2 1 read-write CTSPEN CTS Pin Enable 4 1 read-write RTSPEN RTS Pin Enable 5 1 read-write RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA RX Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX RX Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Data Framing Error 15 1 read-only PERR Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP RX Buffer Data Extended Peek Register 0x28 32 read-only n 0x0 0x0 FERRP Data Framing Error Peek 15 1 read-only PERRP Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only RXDOUBLE RX FIFO Double Data Register 0x24 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEX RX Buffer Double Data Extended Register 0x20 32 read-only n 0x0 0x0 modifyExternal FERR0 Data Framing Error 0 15 1 read-only FERR1 Data Framing Error 1 31 1 read-only PERR0 Data Parity Error 0 14 1 read-only PERR1 Data Parity Error 1 30 1 read-only RXDATA0 RX Data 0 0 9 read-only RXDATA1 RX Data 1 16 9 read-only RXDOUBLEXP RX Buffer Double Data Extended Peek Register 0x2C 32 read-only n 0x0 0x0 FERRP0 Data Framing Error 0 Peek 15 1 read-only FERRP1 Data Framing Error 1 Peek 31 1 read-only PERRP0 Data Parity Error 0 Peek 14 1 read-only PERRP1 Data Parity Error 1 Peek 30 1 read-only RXDATAP0 RX Data 0 Peek 0 9 read-only RXDATAP1 RX Data 1 Peek 16 9 read-only STATUS USART Status Register 0x10 32 read-only n 0x0 0x0 MASTER SPI Master Mode 2 1 read-only RXBLOCK Block Incoming Data 3 1 read-only RXDATAV RX Data Valid 7 1 read-only RXDATAVRIGHT RX Data Right 11 1 read-only RXENS Receiver Enable Status 0 1 read-only RXFULL RX FIFO Full 8 1 read-only RXFULLRIGHT RX Full of Right Data 12 1 read-only TIMERRESTARTED The USART Timer Restarted Itself 14 1 read-only TXBDRIGHT TX Buffer Expects Double Right Data 9 1 read-only TXBL TX Buffer Level 6 1 read-only TXBSRIGHT TX Buffer Expects Single Right Data 10 1 read-only TXBUFCNT TX Buffer Count 16 2 read-only TXC TX Complete 5 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXIDLE TX Idle 13 1 read-only TXTRI Transmitter Tristated 4 1 read-only TIMECMP0 Used to Generate Interrupts and Various Delays 0x68 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP0 24 1 read-write TCMPVAL Timer Comparator 0 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 0 is disabled 0x00000000 TXEOF Comparator 0 and timer are started at TX end of frame 0x00000001 TXC Comparator 0 and timer are started at TX Complete 0x00000002 RXACT Comparator 0 and timer are started at RX going Active (default: low) 0x00000003 RXEOF Comparator 0 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 0 20 3 read-write TCMP0 Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event 0x00000000 TXST Comparator 0 is disabled at the start of transmission 0x00000001 RXACT Comparator 0 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 0 is disabled on RX going Inactive 0x00000003 TIMECMP1 Used to Generate Interrupts and Various Delays 0x6C 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP1 24 1 read-write TCMPVAL Timer Comparator 1 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 1 is disabled 0x00000000 TXEOF Comparator 1 and timer are started at TX end of frame 0x00000001 TXC Comparator 1 and timer are started at TX Complete 0x00000002 RXACT Comparator 1 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 1 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 1 20 3 read-write TCMP1 Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event 0x00000000 TXST Comparator 1 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 1 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 1 is disabled on RX going Inactive 0x00000003 TIMECMP2 Used to Generate Interrupts and Various Delays 0x70 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP2 24 1 read-write TCMPVAL Timer Comparator 2 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 2 is disabled 0x00000000 TXEOF Comparator 2 and timer are started at TX end of frame 0x00000001 TXC Comparator 2 and timer are started at TX Complete 0x00000002 RXACT Comparator 2 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 2 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 2 20 3 read-write TCMP2 Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event 0x00000000 TXST Comparator 2 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 2 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 2 is disabled on RX going Inactive 0x00000003 TIMING Timing Register 0x60 32 read-write n 0x0 0x0 CSHOLD Chip Select Hold 28 3 read-write ZERO Disable CS being asserted after the end of transmission 0x00000000 ONE CS is asserted for 1 baud-times after the end of transmission 0x00000001 TWO CS is asserted for 2 baud-times after the end of transmission 0x00000002 THREE CS is asserted for 3 baud-times after the end of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times after the end of transmission 0x00000004 TCMP0 CS is asserted after the end of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted after the end of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted after the end of transmission for TCMPVAL2 baud-times 0x00000007 CSSETUP Chip Select Setup 20 3 read-write ZERO CS is not asserted before start of transmission 0x00000000 ONE CS is asserted for 1 baud-times before start of transmission 0x00000001 TWO CS is asserted for 2 baud-times before start of transmission 0x00000002 THREE CS is asserted for 3 baud-times before start of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times before start of transmission 0x00000004 TCMP0 CS is asserted before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted before the start of transmission for TCMPVAL2 baud-times 0x00000007 ICS Inter-character Spacing 24 3 read-write ZERO There is no space between charcters 0x00000000 ONE Create a space of 1 baud-times before start of transmission 0x00000001 TWO Create a space of 2 baud-times before start of transmission 0x00000002 THREE Create a space of 3 baud-times before start of transmission 0x00000003 SEVEN Create a space of 7 baud-times before start of transmission 0x00000004 TCMP0 Create a space of before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 Create a space of before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 Create a space of before the start of transmission for TCMPVAL2 baud-times 0x00000007 TXDELAY TX Frame Start Delay 16 3 read-write DISABLE Disable - TXDELAY in USARTn_CTRL can be used for legacy 0x00000000 ONE Start of transmission is delayed for 1 baud-times 0x00000001 TWO Start of transmission is delayed for 2 baud-times 0x00000002 THREE Start of transmission is delayed for 3 baud-times 0x00000003 SEVEN Start of transmission is delayed for 7 baud-times 0x00000004 TCMP0 Start of transmission is delayed for TCMPVAL0 baud-times 0x00000005 TCMP1 Start of transmission is delayed for TCMPVAL1 baud-times 0x00000006 TCMP2 Start of transmission is delayed for TCMPVAL2 baud-times 0x00000007 TRIGCTRL USART Trigger Control Register 0x8 32 read-write n 0x0 0x0 AUTOTXTEN AUTOTX Trigger Enable 6 1 read-write RXATX0EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times 10 1 read-write RXATX1EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times 11 1 read-write RXATX2EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times 12 1 read-write RXTEN Receive Trigger Enable 4 1 read-write TSEL Trigger PRS Channel Select 16 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 TXARX0EN Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL 7 1 read-write TXARX1EN Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL 8 1 read-write TXARX2EN Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL 9 1 read-write TXTEN Transmit Trigger Enable 5 1 read-write TXDATA TX Buffer Data Register 0x34 32 read-write n 0x0 0x0 TXDATA TX Data 0 8 read-write TXDATAX TX Buffer Data Extended Register 0x30 32 read-write n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 read-write TXBREAK Transmit Data as Break 13 1 read-write TXDATAX TX Data 0 9 read-write TXDISAT Clear TXEN After Transmission 14 1 read-write TXTRIAT Set TXTRI After Transmission 12 1 read-write UBRXAT Unblock RX After Transmission 11 1 read-write TXDOUBLE TX Buffer Double Data Register 0x3C 32 read-write n 0x0 0x0 TXDATA0 TX Data 0 8 read-write TXDATA1 TX Data 8 8 read-write TXDOUBLEX TX Buffer Double Data Extended Register 0x38 32 read-write n 0x0 0x0 RXENAT0 Enable RX After Transmission 15 1 read-write RXENAT1 Enable RX After Transmission 31 1 read-write TXBREAK0 Transmit Data as Break 13 1 read-write TXBREAK1 Transmit Data as Break 29 1 read-write TXDATA0 TX Data 0 9 read-write TXDATA1 TX Data 16 9 read-write TXDISAT0 Clear TXEN After Transmission 14 1 read-write TXDISAT1 Clear TXEN After Transmission 30 1 read-write TXTRIAT0 Set TXTRI After Transmission 12 1 read-write TXTRIAT1 Set TXTRI After Transmission 28 1 read-write UBRXAT0 Unblock RX After Transmission 11 1 read-write UBRXAT1 Unblock RX After Transmission 27 1 read-write USART0 USART0 USART0 0x0 0x0 0x400 registers n USART0_RX 6 USART0_TX 7 CLKDIV Clock Control Register 0x14 32 read-write n 0x0 0x0 AUTOBAUDEN AUTOBAUD Detection Enable 31 1 read-write DIV Fractional Clock Divider 3 20 read-write CMD Command Register 0xC 32 write-only n 0x0 0x0 CLEARRX Clear RX 11 1 write-only CLEARTX Clear TX 10 1 write-only MASTERDIS Master Disable 5 1 write-only MASTEREN Master Enable 4 1 write-only RXBLOCKDIS Receiver Block Disable 7 1 write-only RXBLOCKEN Receiver Block Enable 6 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only TXTRIDIS Transmitter Tristate Disable 9 1 write-only TXTRIEN Transmitter Tristate Enable 8 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOCS Automatic Chip Select 16 1 read-write AUTOTRI Automatic TX Tristate 17 1 read-write AUTOTX Always Transmit When RX Not Full 29 1 read-write BIT8DV Bit 8 Default Value 21 1 read-write BYTESWAP Byteswap in Double Accesses 28 1 read-write CCEN Collision Check Enable 2 1 read-write CLKPHA Clock Edge for Setup/Sample 9 1 read-write CLKPOL Clock Polarity 8 1 read-write CSINV Chip Select Invert 15 1 read-write CSMA Action on Slave-Select in Master Mode 11 1 read-write ERRSDMA Halt DMA on Error 22 1 read-write ERRSRX Disable RX on Error 23 1 read-write ERRSTX Disable TX on Error 24 1 read-write LOOPBK Loopback Enable 1 1 read-write MPAB Multi-Processor Address-Bit 4 1 read-write MPM Multi-Processor Mode 3 1 read-write MSBF Most Significant Bit First 10 1 read-write MVDIS Majority Vote Disable 30 1 read-write OVS Oversampling 5 2 read-write X16 Regular UART mode with 16X oversampling in asynchronous mode 0x00000000 X8 Double speed with 8X oversampling in asynchronous mode 0x00000001 X6 6X oversampling in asynchronous mode 0x00000002 X4 Quadruple speed with 4X oversampling in asynchronous mode 0x00000003 RXINV Receiver Input Invert 13 1 read-write SCMODE SmartCard Mode 18 1 read-write SCRETRANS SmartCard Retransmit 19 1 read-write SKIPPERRF Skip Parity Error Frames 20 1 read-write SMSDELAY Synchronous Master Sample Delay 31 1 read-write SSSEARLY Synchronous Slave Setup Early 25 1 read-write SYNC USART Synchronous Mode 0 1 read-write TXBIL TX Buffer Interrupt Level 12 1 read-write TXINV Transmitter Output Invert 14 1 read-write CTRLX Control Register Extended 0x64 32 read-write n 0x0 0x0 CTSEN CTS Function Enabled 2 1 read-write CTSINV CTS Pin Inversion 1 1 read-write DBGHALT Debug Halt 0 1 read-write RTSINV RTS Pin Inversion 3 1 read-write FRAME USART Frame Format Register 0x4 32 read-write n 0x0 0x0 DATABITS Data-Bit Mode 0 4 read-write FOUR Each frame contains 4 data bits 0x00000001 FIVE Each frame contains 5 data bits 0x00000002 SIX Each frame contains 6 data bits 0x00000003 SEVEN Each frame contains 7 data bits 0x00000004 EIGHT Each frame contains 8 data bits 0x00000005 NINE Each frame contains 9 data bits 0x00000006 TEN Each frame contains 10 data bits 0x00000007 ELEVEN Each frame contains 11 data bits 0x00000008 TWELVE Each frame contains 12 data bits 0x00000009 THIRTEEN Each frame contains 13 data bits 0x0000000A FOURTEEN Each frame contains 14 data bits 0x0000000B FIFTEEN Each frame contains 15 data bits 0x0000000C SIXTEEN Each frame contains 16 data bits 0x0000000D PARITY Parity-Bit Mode 8 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 12 2 read-write HALF The transmitter generates a half stop bit. Stop-bits are not verified by receiver 0x00000000 ONE One stop bit is generated and verified 0x00000001 ONEANDAHALF The transmitter generates one and a half stop bit. The receiver verifies the first stop bit 0x00000002 TWO The transmitter generates two stop bits. The receiver checks the first stop-bit only 0x00000003 I2SCTRL I2S Control Register 0x5C 32 read-write n 0x0 0x0 DELAY Delay on I2S Data 4 1 read-write DMASPLIT Separate DMA Request for Left/Right Data 3 1 read-write EN Enable I2S Mode 0 1 read-write FORMAT I2S Word Format 8 3 read-write W32D32 32-bit word, 32-bit data 0x00000000 W32D24M 32-bit word, 32-bit data with 8 lsb masked 0x00000001 W32D24 32-bit word, 24-bit data 0x00000002 W32D16 32-bit word, 16-bit data 0x00000003 W32D8 32-bit word, 8-bit data 0x00000004 W16D16 16-bit word, 16-bit data 0x00000005 W16D8 16-bit word, 8-bit data 0x00000006 W8D8 8-bit word, 8-bit data 0x00000007 JUSTIFY Justification of I2S Data 2 1 read-write MONO Stero or Mono 1 1 read-write IEN Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 CCF CCF Interrupt Enable 12 1 read-write FERR FERR Interrupt Enable 9 1 read-write MPAF MPAF Interrupt Enable 10 1 read-write PERR PERR Interrupt Enable 8 1 read-write RXDATAV RXDATAV Interrupt Enable 2 1 read-write RXFULL RXFULL Interrupt Enable 3 1 read-write RXOF RXOF Interrupt Enable 4 1 read-write RXUF RXUF Interrupt Enable 5 1 read-write SSM SSM Interrupt Enable 11 1 read-write TCMP0 TCMP0 Interrupt Enable 14 1 read-write TCMP1 TCMP1 Interrupt Enable 15 1 read-write TCMP2 TCMP2 Interrupt Enable 16 1 read-write TXBL TXBL Interrupt Enable 1 1 read-write TXC TXC Interrupt Enable 0 1 read-write TXIDLE TXIDLE Interrupt Enable 13 1 read-write TXOF TXOF Interrupt Enable 6 1 read-write TXUF TXUF Interrupt Enable 7 1 read-write IF Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 CCF Collision Check Fail Interrupt Flag 12 1 read-only FERR Framing Error Interrupt Flag 9 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 10 1 read-only PERR Parity Error Interrupt Flag 8 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXFULL RX Buffer Full Interrupt Flag 3 1 read-only RXOF RX Overflow Interrupt Flag 4 1 read-only RXUF RX Underflow Interrupt Flag 5 1 read-only SSM Slave-Select in Master Mode Interrupt Flag 11 1 read-only TCMP0 Timer Comparator 0 Interrupt Flag 14 1 read-only TCMP1 Timer Comparator 1 Interrupt Flag 15 1 read-only TCMP2 Timer Comparator 2 Interrupt Flag 16 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXIDLE TX Idle Interrupt Flag 13 1 read-only TXOF TX Overflow Interrupt Flag 6 1 read-only TXUF TX Underflow Interrupt Flag 7 1 read-only IFC Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 CCF Clear CCF Interrupt Flag 12 1 write-only FERR Clear FERR Interrupt Flag 9 1 write-only MPAF Clear MPAF Interrupt Flag 10 1 write-only PERR Clear PERR Interrupt Flag 8 1 write-only RXFULL Clear RXFULL Interrupt Flag 3 1 write-only RXOF Clear RXOF Interrupt Flag 4 1 write-only RXUF Clear RXUF Interrupt Flag 5 1 write-only SSM Clear SSM Interrupt Flag 11 1 write-only TCMP0 Clear TCMP0 Interrupt Flag 14 1 write-only TCMP1 Clear TCMP1 Interrupt Flag 15 1 write-only TCMP2 Clear TCMP2 Interrupt Flag 16 1 write-only TXC Clear TXC Interrupt Flag 0 1 write-only TXIDLE Clear TXIDLE Interrupt Flag 13 1 write-only TXOF Clear TXOF Interrupt Flag 6 1 write-only TXUF Clear TXUF Interrupt Flag 7 1 write-only IFS Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 CCF Set CCF Interrupt Flag 12 1 write-only FERR Set FERR Interrupt Flag 9 1 write-only MPAF Set MPAF Interrupt Flag 10 1 write-only PERR Set PERR Interrupt Flag 8 1 write-only RXFULL Set RXFULL Interrupt Flag 3 1 write-only RXOF Set RXOF Interrupt Flag 4 1 write-only RXUF Set RXUF Interrupt Flag 5 1 write-only SSM Set SSM Interrupt Flag 11 1 write-only TCMP0 Set TCMP0 Interrupt Flag 14 1 write-only TCMP1 Set TCMP1 Interrupt Flag 15 1 write-only TCMP2 Set TCMP2 Interrupt Flag 16 1 write-only TXC Set TXC Interrupt Flag 0 1 write-only TXIDLE Set TXIDLE Interrupt Flag 13 1 write-only TXOF Set TXOF Interrupt Flag 6 1 write-only TXUF Set TXUF Interrupt Flag 7 1 write-only INPUT USART Input Register 0x58 32 read-write n 0x0 0x0 CLKPRS PRS CLK Enable 15 1 read-write CLKPRSSEL CLK PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 RXPRS PRS RX Enable 7 1 read-write RXPRSSEL RX PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRCTRL IrDA Control Register 0x50 32 read-write n 0x0 0x0 IREN Enable IrDA Module 0 1 read-write IRFILT IrDA RX Filter 3 1 read-write IRPRSEN IrDA PRS Channel Enable 7 1 read-write IRPRSSEL IrDA PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRPW IrDA TX Pulse Width 1 2 read-write ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 0x00000000 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 0x00000001 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 0x00000002 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 0x00000003 ROUTELOC0 I/O Routing Location Register 0x78 32 read-write n 0x0 0x0 CLKLOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 CSLOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RXLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 TXLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTELOC1 I/O Routing Location Register 0x7C 32 read-write n 0x0 0x0 CTSLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RTSLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTEPEN I/O Routing Pin Enable Register 0x74 32 read-write n 0x0 0x0 CLKPEN CLK Pin Enable 3 1 read-write CSPEN CS Pin Enable 2 1 read-write CTSPEN CTS Pin Enable 4 1 read-write RTSPEN RTS Pin Enable 5 1 read-write RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA RX Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX RX Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Data Framing Error 15 1 read-only PERR Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP RX Buffer Data Extended Peek Register 0x28 32 read-only n 0x0 0x0 FERRP Data Framing Error Peek 15 1 read-only PERRP Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only RXDOUBLE RX FIFO Double Data Register 0x24 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEX RX Buffer Double Data Extended Register 0x20 32 read-only n 0x0 0x0 modifyExternal FERR0 Data Framing Error 0 15 1 read-only FERR1 Data Framing Error 1 31 1 read-only PERR0 Data Parity Error 0 14 1 read-only PERR1 Data Parity Error 1 30 1 read-only RXDATA0 RX Data 0 0 9 read-only RXDATA1 RX Data 1 16 9 read-only RXDOUBLEXP RX Buffer Double Data Extended Peek Register 0x2C 32 read-only n 0x0 0x0 FERRP0 Data Framing Error 0 Peek 15 1 read-only FERRP1 Data Framing Error 1 Peek 31 1 read-only PERRP0 Data Parity Error 0 Peek 14 1 read-only PERRP1 Data Parity Error 1 Peek 30 1 read-only RXDATAP0 RX Data 0 Peek 0 9 read-only RXDATAP1 RX Data 1 Peek 16 9 read-only STATUS USART Status Register 0x10 32 read-only n 0x0 0x0 MASTER SPI Master Mode 2 1 read-only RXBLOCK Block Incoming Data 3 1 read-only RXDATAV RX Data Valid 7 1 read-only RXDATAVRIGHT RX Data Right 11 1 read-only RXENS Receiver Enable Status 0 1 read-only RXFULL RX FIFO Full 8 1 read-only RXFULLRIGHT RX Full of Right Data 12 1 read-only TIMERRESTARTED The USART Timer Restarted Itself 14 1 read-only TXBDRIGHT TX Buffer Expects Double Right Data 9 1 read-only TXBL TX Buffer Level 6 1 read-only TXBSRIGHT TX Buffer Expects Single Right Data 10 1 read-only TXBUFCNT TX Buffer Count 16 2 read-only TXC TX Complete 5 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXIDLE TX Idle 13 1 read-only TXTRI Transmitter Tristated 4 1 read-only TIMECMP0 Used to Generate Interrupts and Various Delays 0x68 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP0 24 1 read-write TCMPVAL Timer Comparator 0 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 0 is disabled 0x00000000 TXEOF Comparator 0 and timer are started at TX end of frame 0x00000001 TXC Comparator 0 and timer are started at TX Complete 0x00000002 RXACT Comparator 0 and timer are started at RX going Active (default: low) 0x00000003 RXEOF Comparator 0 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 0 20 3 read-write TCMP0 Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event 0x00000000 TXST Comparator 0 is disabled at the start of transmission 0x00000001 RXACT Comparator 0 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 0 is disabled on RX going Inactive 0x00000003 TIMECMP1 Used to Generate Interrupts and Various Delays 0x6C 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP1 24 1 read-write TCMPVAL Timer Comparator 1 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 1 is disabled 0x00000000 TXEOF Comparator 1 and timer are started at TX end of frame 0x00000001 TXC Comparator 1 and timer are started at TX Complete 0x00000002 RXACT Comparator 1 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 1 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 1 20 3 read-write TCMP1 Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event 0x00000000 TXST Comparator 1 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 1 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 1 is disabled on RX going Inactive 0x00000003 TIMECMP2 Used to Generate Interrupts and Various Delays 0x70 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP2 24 1 read-write TCMPVAL Timer Comparator 2 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 2 is disabled 0x00000000 TXEOF Comparator 2 and timer are started at TX end of frame 0x00000001 TXC Comparator 2 and timer are started at TX Complete 0x00000002 RXACT Comparator 2 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 2 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 2 20 3 read-write TCMP2 Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event 0x00000000 TXST Comparator 2 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 2 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 2 is disabled on RX going Inactive 0x00000003 TIMING Timing Register 0x60 32 read-write n 0x0 0x0 CSHOLD Chip Select Hold 28 3 read-write ZERO Disable CS being asserted after the end of transmission 0x00000000 ONE CS is asserted for 1 baud-times after the end of transmission 0x00000001 TWO CS is asserted for 2 baud-times after the end of transmission 0x00000002 THREE CS is asserted for 3 baud-times after the end of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times after the end of transmission 0x00000004 TCMP0 CS is asserted after the end of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted after the end of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted after the end of transmission for TCMPVAL2 baud-times 0x00000007 CSSETUP Chip Select Setup 20 3 read-write ZERO CS is not asserted before start of transmission 0x00000000 ONE CS is asserted for 1 baud-times before start of transmission 0x00000001 TWO CS is asserted for 2 baud-times before start of transmission 0x00000002 THREE CS is asserted for 3 baud-times before start of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times before start of transmission 0x00000004 TCMP0 CS is asserted before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted before the start of transmission for TCMPVAL2 baud-times 0x00000007 ICS Inter-character Spacing 24 3 read-write ZERO There is no space between charcters 0x00000000 ONE Create a space of 1 baud-times before start of transmission 0x00000001 TWO Create a space of 2 baud-times before start of transmission 0x00000002 THREE Create a space of 3 baud-times before start of transmission 0x00000003 SEVEN Create a space of 7 baud-times before start of transmission 0x00000004 TCMP0 Create a space of before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 Create a space of before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 Create a space of before the start of transmission for TCMPVAL2 baud-times 0x00000007 TXDELAY TX Frame Start Delay 16 3 read-write DISABLE Disable - TXDELAY in USARTn_CTRL can be used for legacy 0x00000000 ONE Start of transmission is delayed for 1 baud-times 0x00000001 TWO Start of transmission is delayed for 2 baud-times 0x00000002 THREE Start of transmission is delayed for 3 baud-times 0x00000003 SEVEN Start of transmission is delayed for 7 baud-times 0x00000004 TCMP0 Start of transmission is delayed for TCMPVAL0 baud-times 0x00000005 TCMP1 Start of transmission is delayed for TCMPVAL1 baud-times 0x00000006 TCMP2 Start of transmission is delayed for TCMPVAL2 baud-times 0x00000007 TRIGCTRL USART Trigger Control Register 0x8 32 read-write n 0x0 0x0 AUTOTXTEN AUTOTX Trigger Enable 6 1 read-write RXATX0EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times 10 1 read-write RXATX1EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times 11 1 read-write RXATX2EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times 12 1 read-write RXTEN Receive Trigger Enable 4 1 read-write TSEL Trigger PRS Channel Select 16 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 TXARX0EN Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL 7 1 read-write TXARX1EN Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL 8 1 read-write TXARX2EN Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL 9 1 read-write TXTEN Transmit Trigger Enable 5 1 read-write TXDATA TX Buffer Data Register 0x34 32 read-write n 0x0 0x0 TXDATA TX Data 0 8 read-write TXDATAX TX Buffer Data Extended Register 0x30 32 read-write n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 read-write TXBREAK Transmit Data as Break 13 1 read-write TXDATAX TX Data 0 9 read-write TXDISAT Clear TXEN After Transmission 14 1 read-write TXTRIAT Set TXTRI After Transmission 12 1 read-write UBRXAT Unblock RX After Transmission 11 1 read-write TXDOUBLE TX Buffer Double Data Register 0x3C 32 read-write n 0x0 0x0 TXDATA0 TX Data 0 8 read-write TXDATA1 TX Data 8 8 read-write TXDOUBLEX TX Buffer Double Data Extended Register 0x38 32 read-write n 0x0 0x0 RXENAT0 Enable RX After Transmission 15 1 read-write RXENAT1 Enable RX After Transmission 31 1 read-write TXBREAK0 Transmit Data as Break 13 1 read-write TXBREAK1 Transmit Data as Break 29 1 read-write TXDATA0 TX Data 0 9 read-write TXDATA1 TX Data 16 9 read-write TXDISAT0 Clear TXEN After Transmission 14 1 read-write TXDISAT1 Clear TXEN After Transmission 30 1 read-write TXTRIAT0 Set TXTRI After Transmission 12 1 read-write TXTRIAT1 Set TXTRI After Transmission 28 1 read-write UBRXAT0 Unblock RX After Transmission 11 1 read-write UBRXAT1 Unblock RX After Transmission 27 1 read-write USART1 USART1 USART1 0x0 0x0 0x400 registers n USART1_RX 17 USART1_TX 18 CLKDIV Clock Control Register 0x14 32 read-write n 0x0 0x0 AUTOBAUDEN AUTOBAUD Detection Enable 31 1 read-write DIV Fractional Clock Divider 3 20 read-write CMD Command Register 0xC 32 write-only n 0x0 0x0 CLEARRX Clear RX 11 1 write-only CLEARTX Clear TX 10 1 write-only MASTERDIS Master Disable 5 1 write-only MASTEREN Master Enable 4 1 write-only RXBLOCKDIS Receiver Block Disable 7 1 write-only RXBLOCKEN Receiver Block Enable 6 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only TXTRIDIS Transmitter Tristate Disable 9 1 write-only TXTRIEN Transmitter Tristate Enable 8 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOCS Automatic Chip Select 16 1 read-write AUTOTRI Automatic TX Tristate 17 1 read-write AUTOTX Always Transmit When RX Not Full 29 1 read-write BIT8DV Bit 8 Default Value 21 1 read-write BYTESWAP Byteswap in Double Accesses 28 1 read-write CCEN Collision Check Enable 2 1 read-write CLKPHA Clock Edge for Setup/Sample 9 1 read-write CLKPOL Clock Polarity 8 1 read-write CSINV Chip Select Invert 15 1 read-write CSMA Action on Slave-Select in Master Mode 11 1 read-write ERRSDMA Halt DMA on Error 22 1 read-write ERRSRX Disable RX on Error 23 1 read-write ERRSTX Disable TX on Error 24 1 read-write LOOPBK Loopback Enable 1 1 read-write MPAB Multi-Processor Address-Bit 4 1 read-write MPM Multi-Processor Mode 3 1 read-write MSBF Most Significant Bit First 10 1 read-write MVDIS Majority Vote Disable 30 1 read-write OVS Oversampling 5 2 read-write X16 Regular UART mode with 16X oversampling in asynchronous mode 0x00000000 X8 Double speed with 8X oversampling in asynchronous mode 0x00000001 X6 6X oversampling in asynchronous mode 0x00000002 X4 Quadruple speed with 4X oversampling in asynchronous mode 0x00000003 RXINV Receiver Input Invert 13 1 read-write SCMODE SmartCard Mode 18 1 read-write SCRETRANS SmartCard Retransmit 19 1 read-write SKIPPERRF Skip Parity Error Frames 20 1 read-write SMSDELAY Synchronous Master Sample Delay 31 1 read-write SSSEARLY Synchronous Slave Setup Early 25 1 read-write SYNC USART Synchronous Mode 0 1 read-write TXBIL TX Buffer Interrupt Level 12 1 read-write TXINV Transmitter Output Invert 14 1 read-write CTRLX Control Register Extended 0x64 32 read-write n 0x0 0x0 CTSEN CTS Function Enabled 2 1 read-write CTSINV CTS Pin Inversion 1 1 read-write DBGHALT Debug Halt 0 1 read-write RTSINV RTS Pin Inversion 3 1 read-write FRAME USART Frame Format Register 0x4 32 read-write n 0x0 0x0 DATABITS Data-Bit Mode 0 4 read-write FOUR Each frame contains 4 data bits 0x00000001 FIVE Each frame contains 5 data bits 0x00000002 SIX Each frame contains 6 data bits 0x00000003 SEVEN Each frame contains 7 data bits 0x00000004 EIGHT Each frame contains 8 data bits 0x00000005 NINE Each frame contains 9 data bits 0x00000006 TEN Each frame contains 10 data bits 0x00000007 ELEVEN Each frame contains 11 data bits 0x00000008 TWELVE Each frame contains 12 data bits 0x00000009 THIRTEEN Each frame contains 13 data bits 0x0000000A FOURTEEN Each frame contains 14 data bits 0x0000000B FIFTEEN Each frame contains 15 data bits 0x0000000C SIXTEEN Each frame contains 16 data bits 0x0000000D PARITY Parity-Bit Mode 8 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 12 2 read-write HALF The transmitter generates a half stop bit. Stop-bits are not verified by receiver 0x00000000 ONE One stop bit is generated and verified 0x00000001 ONEANDAHALF The transmitter generates one and a half stop bit. The receiver verifies the first stop bit 0x00000002 TWO The transmitter generates two stop bits. The receiver checks the first stop-bit only 0x00000003 I2SCTRL I2S Control Register 0x5C 32 read-write n 0x0 0x0 DELAY Delay on I2S Data 4 1 read-write DMASPLIT Separate DMA Request for Left/Right Data 3 1 read-write EN Enable I2S Mode 0 1 read-write FORMAT I2S Word Format 8 3 read-write W32D32 32-bit word, 32-bit data 0x00000000 W32D24M 32-bit word, 32-bit data with 8 lsb masked 0x00000001 W32D24 32-bit word, 24-bit data 0x00000002 W32D16 32-bit word, 16-bit data 0x00000003 W32D8 32-bit word, 8-bit data 0x00000004 W16D16 16-bit word, 16-bit data 0x00000005 W16D8 16-bit word, 8-bit data 0x00000006 W8D8 8-bit word, 8-bit data 0x00000007 JUSTIFY Justification of I2S Data 2 1 read-write MONO Stero or Mono 1 1 read-write IEN Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 CCF CCF Interrupt Enable 12 1 read-write FERR FERR Interrupt Enable 9 1 read-write MPAF MPAF Interrupt Enable 10 1 read-write PERR PERR Interrupt Enable 8 1 read-write RXDATAV RXDATAV Interrupt Enable 2 1 read-write RXFULL RXFULL Interrupt Enable 3 1 read-write RXOF RXOF Interrupt Enable 4 1 read-write RXUF RXUF Interrupt Enable 5 1 read-write SSM SSM Interrupt Enable 11 1 read-write TCMP0 TCMP0 Interrupt Enable 14 1 read-write TCMP1 TCMP1 Interrupt Enable 15 1 read-write TCMP2 TCMP2 Interrupt Enable 16 1 read-write TXBL TXBL Interrupt Enable 1 1 read-write TXC TXC Interrupt Enable 0 1 read-write TXIDLE TXIDLE Interrupt Enable 13 1 read-write TXOF TXOF Interrupt Enable 6 1 read-write TXUF TXUF Interrupt Enable 7 1 read-write IF Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 CCF Collision Check Fail Interrupt Flag 12 1 read-only FERR Framing Error Interrupt Flag 9 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 10 1 read-only PERR Parity Error Interrupt Flag 8 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXFULL RX Buffer Full Interrupt Flag 3 1 read-only RXOF RX Overflow Interrupt Flag 4 1 read-only RXUF RX Underflow Interrupt Flag 5 1 read-only SSM Slave-Select in Master Mode Interrupt Flag 11 1 read-only TCMP0 Timer Comparator 0 Interrupt Flag 14 1 read-only TCMP1 Timer Comparator 1 Interrupt Flag 15 1 read-only TCMP2 Timer Comparator 2 Interrupt Flag 16 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXIDLE TX Idle Interrupt Flag 13 1 read-only TXOF TX Overflow Interrupt Flag 6 1 read-only TXUF TX Underflow Interrupt Flag 7 1 read-only IFC Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 CCF Clear CCF Interrupt Flag 12 1 write-only FERR Clear FERR Interrupt Flag 9 1 write-only MPAF Clear MPAF Interrupt Flag 10 1 write-only PERR Clear PERR Interrupt Flag 8 1 write-only RXFULL Clear RXFULL Interrupt Flag 3 1 write-only RXOF Clear RXOF Interrupt Flag 4 1 write-only RXUF Clear RXUF Interrupt Flag 5 1 write-only SSM Clear SSM Interrupt Flag 11 1 write-only TCMP0 Clear TCMP0 Interrupt Flag 14 1 write-only TCMP1 Clear TCMP1 Interrupt Flag 15 1 write-only TCMP2 Clear TCMP2 Interrupt Flag 16 1 write-only TXC Clear TXC Interrupt Flag 0 1 write-only TXIDLE Clear TXIDLE Interrupt Flag 13 1 write-only TXOF Clear TXOF Interrupt Flag 6 1 write-only TXUF Clear TXUF Interrupt Flag 7 1 write-only IFS Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 CCF Set CCF Interrupt Flag 12 1 write-only FERR Set FERR Interrupt Flag 9 1 write-only MPAF Set MPAF Interrupt Flag 10 1 write-only PERR Set PERR Interrupt Flag 8 1 write-only RXFULL Set RXFULL Interrupt Flag 3 1 write-only RXOF Set RXOF Interrupt Flag 4 1 write-only RXUF Set RXUF Interrupt Flag 5 1 write-only SSM Set SSM Interrupt Flag 11 1 write-only TCMP0 Set TCMP0 Interrupt Flag 14 1 write-only TCMP1 Set TCMP1 Interrupt Flag 15 1 write-only TCMP2 Set TCMP2 Interrupt Flag 16 1 write-only TXC Set TXC Interrupt Flag 0 1 write-only TXIDLE Set TXIDLE Interrupt Flag 13 1 write-only TXOF Set TXOF Interrupt Flag 6 1 write-only TXUF Set TXUF Interrupt Flag 7 1 write-only INPUT USART Input Register 0x58 32 read-write n 0x0 0x0 CLKPRS PRS CLK Enable 15 1 read-write CLKPRSSEL CLK PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 RXPRS PRS RX Enable 7 1 read-write RXPRSSEL RX PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRCTRL IrDA Control Register 0x50 32 read-write n 0x0 0x0 IREN Enable IrDA Module 0 1 read-write IRFILT IrDA RX Filter 3 1 read-write IRPRSEN IrDA PRS Channel Enable 7 1 read-write IRPRSSEL IrDA PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRPW IrDA TX Pulse Width 1 2 read-write ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 0x00000000 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 0x00000001 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 0x00000002 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 0x00000003 ROUTELOC0 I/O Routing Location Register 0x78 32 read-write n 0x0 0x0 CLKLOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 CSLOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RXLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 TXLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTELOC1 I/O Routing Location Register 0x7C 32 read-write n 0x0 0x0 CTSLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RTSLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTEPEN I/O Routing Pin Enable Register 0x74 32 read-write n 0x0 0x0 CLKPEN CLK Pin Enable 3 1 read-write CSPEN CS Pin Enable 2 1 read-write CTSPEN CTS Pin Enable 4 1 read-write RTSPEN RTS Pin Enable 5 1 read-write RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA RX Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX RX Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Data Framing Error 15 1 read-only PERR Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP RX Buffer Data Extended Peek Register 0x28 32 read-only n 0x0 0x0 FERRP Data Framing Error Peek 15 1 read-only PERRP Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only RXDOUBLE RX FIFO Double Data Register 0x24 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEX RX Buffer Double Data Extended Register 0x20 32 read-only n 0x0 0x0 modifyExternal FERR0 Data Framing Error 0 15 1 read-only FERR1 Data Framing Error 1 31 1 read-only PERR0 Data Parity Error 0 14 1 read-only PERR1 Data Parity Error 1 30 1 read-only RXDATA0 RX Data 0 0 9 read-only RXDATA1 RX Data 1 16 9 read-only RXDOUBLEXP RX Buffer Double Data Extended Peek Register 0x2C 32 read-only n 0x0 0x0 FERRP0 Data Framing Error 0 Peek 15 1 read-only FERRP1 Data Framing Error 1 Peek 31 1 read-only PERRP0 Data Parity Error 0 Peek 14 1 read-only PERRP1 Data Parity Error 1 Peek 30 1 read-only RXDATAP0 RX Data 0 Peek 0 9 read-only RXDATAP1 RX Data 1 Peek 16 9 read-only STATUS USART Status Register 0x10 32 read-only n 0x0 0x0 MASTER SPI Master Mode 2 1 read-only RXBLOCK Block Incoming Data 3 1 read-only RXDATAV RX Data Valid 7 1 read-only RXDATAVRIGHT RX Data Right 11 1 read-only RXENS Receiver Enable Status 0 1 read-only RXFULL RX FIFO Full 8 1 read-only RXFULLRIGHT RX Full of Right Data 12 1 read-only TIMERRESTARTED The USART Timer Restarted Itself 14 1 read-only TXBDRIGHT TX Buffer Expects Double Right Data 9 1 read-only TXBL TX Buffer Level 6 1 read-only TXBSRIGHT TX Buffer Expects Single Right Data 10 1 read-only TXBUFCNT TX Buffer Count 16 2 read-only TXC TX Complete 5 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXIDLE TX Idle 13 1 read-only TXTRI Transmitter Tristated 4 1 read-only TIMECMP0 Used to Generate Interrupts and Various Delays 0x68 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP0 24 1 read-write TCMPVAL Timer Comparator 0 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 0 is disabled 0x00000000 TXEOF Comparator 0 and timer are started at TX end of frame 0x00000001 TXC Comparator 0 and timer are started at TX Complete 0x00000002 RXACT Comparator 0 and timer are started at RX going Active (default: low) 0x00000003 RXEOF Comparator 0 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 0 20 3 read-write TCMP0 Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event 0x00000000 TXST Comparator 0 is disabled at the start of transmission 0x00000001 RXACT Comparator 0 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 0 is disabled on RX going Inactive 0x00000003 TIMECMP1 Used to Generate Interrupts and Various Delays 0x6C 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP1 24 1 read-write TCMPVAL Timer Comparator 1 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 1 is disabled 0x00000000 TXEOF Comparator 1 and timer are started at TX end of frame 0x00000001 TXC Comparator 1 and timer are started at TX Complete 0x00000002 RXACT Comparator 1 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 1 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 1 20 3 read-write TCMP1 Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event 0x00000000 TXST Comparator 1 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 1 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 1 is disabled on RX going Inactive 0x00000003 TIMECMP2 Used to Generate Interrupts and Various Delays 0x70 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP2 24 1 read-write TCMPVAL Timer Comparator 2 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 2 is disabled 0x00000000 TXEOF Comparator 2 and timer are started at TX end of frame 0x00000001 TXC Comparator 2 and timer are started at TX Complete 0x00000002 RXACT Comparator 2 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 2 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 2 20 3 read-write TCMP2 Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event 0x00000000 TXST Comparator 2 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 2 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 2 is disabled on RX going Inactive 0x00000003 TIMING Timing Register 0x60 32 read-write n 0x0 0x0 CSHOLD Chip Select Hold 28 3 read-write ZERO Disable CS being asserted after the end of transmission 0x00000000 ONE CS is asserted for 1 baud-times after the end of transmission 0x00000001 TWO CS is asserted for 2 baud-times after the end of transmission 0x00000002 THREE CS is asserted for 3 baud-times after the end of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times after the end of transmission 0x00000004 TCMP0 CS is asserted after the end of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted after the end of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted after the end of transmission for TCMPVAL2 baud-times 0x00000007 CSSETUP Chip Select Setup 20 3 read-write ZERO CS is not asserted before start of transmission 0x00000000 ONE CS is asserted for 1 baud-times before start of transmission 0x00000001 TWO CS is asserted for 2 baud-times before start of transmission 0x00000002 THREE CS is asserted for 3 baud-times before start of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times before start of transmission 0x00000004 TCMP0 CS is asserted before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted before the start of transmission for TCMPVAL2 baud-times 0x00000007 ICS Inter-character Spacing 24 3 read-write ZERO There is no space between charcters 0x00000000 ONE Create a space of 1 baud-times before start of transmission 0x00000001 TWO Create a space of 2 baud-times before start of transmission 0x00000002 THREE Create a space of 3 baud-times before start of transmission 0x00000003 SEVEN Create a space of 7 baud-times before start of transmission 0x00000004 TCMP0 Create a space of before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 Create a space of before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 Create a space of before the start of transmission for TCMPVAL2 baud-times 0x00000007 TXDELAY TX Frame Start Delay 16 3 read-write DISABLE Disable - TXDELAY in USARTn_CTRL can be used for legacy 0x00000000 ONE Start of transmission is delayed for 1 baud-times 0x00000001 TWO Start of transmission is delayed for 2 baud-times 0x00000002 THREE Start of transmission is delayed for 3 baud-times 0x00000003 SEVEN Start of transmission is delayed for 7 baud-times 0x00000004 TCMP0 Start of transmission is delayed for TCMPVAL0 baud-times 0x00000005 TCMP1 Start of transmission is delayed for TCMPVAL1 baud-times 0x00000006 TCMP2 Start of transmission is delayed for TCMPVAL2 baud-times 0x00000007 TRIGCTRL USART Trigger Control Register 0x8 32 read-write n 0x0 0x0 AUTOTXTEN AUTOTX Trigger Enable 6 1 read-write RXATX0EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times 10 1 read-write RXATX1EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times 11 1 read-write RXATX2EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times 12 1 read-write RXTEN Receive Trigger Enable 4 1 read-write TSEL Trigger PRS Channel Select 16 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 TXARX0EN Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL 7 1 read-write TXARX1EN Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL 8 1 read-write TXARX2EN Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL 9 1 read-write TXTEN Transmit Trigger Enable 5 1 read-write TXDATA TX Buffer Data Register 0x34 32 read-write n 0x0 0x0 TXDATA TX Data 0 8 read-write TXDATAX TX Buffer Data Extended Register 0x30 32 read-write n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 read-write TXBREAK Transmit Data as Break 13 1 read-write TXDATAX TX Data 0 9 read-write TXDISAT Clear TXEN After Transmission 14 1 read-write TXTRIAT Set TXTRI After Transmission 12 1 read-write UBRXAT Unblock RX After Transmission 11 1 read-write TXDOUBLE TX Buffer Double Data Register 0x3C 32 read-write n 0x0 0x0 TXDATA0 TX Data 0 8 read-write TXDATA1 TX Data 8 8 read-write TXDOUBLEX TX Buffer Double Data Extended Register 0x38 32 read-write n 0x0 0x0 RXENAT0 Enable RX After Transmission 15 1 read-write RXENAT1 Enable RX After Transmission 31 1 read-write TXBREAK0 Transmit Data as Break 13 1 read-write TXBREAK1 Transmit Data as Break 29 1 read-write TXDATA0 TX Data 0 9 read-write TXDATA1 TX Data 16 9 read-write TXDISAT0 Clear TXEN After Transmission 14 1 read-write TXDISAT1 Clear TXEN After Transmission 30 1 read-write TXTRIAT0 Set TXTRI After Transmission 12 1 read-write TXTRIAT1 Set TXTRI After Transmission 28 1 read-write UBRXAT0 Unblock RX After Transmission 11 1 read-write UBRXAT1 Unblock RX After Transmission 27 1 read-write USART2 USART2 USART2 0x0 0x0 0x400 registers n USART2_RX 19 USART2_TX 20 CLKDIV Clock Control Register 0x14 32 read-write n 0x0 0x0 AUTOBAUDEN AUTOBAUD Detection Enable 31 1 read-write DIV Fractional Clock Divider 3 20 read-write CMD Command Register 0xC 32 write-only n 0x0 0x0 CLEARRX Clear RX 11 1 write-only CLEARTX Clear TX 10 1 write-only MASTERDIS Master Disable 5 1 write-only MASTEREN Master Enable 4 1 write-only RXBLOCKDIS Receiver Block Disable 7 1 write-only RXBLOCKEN Receiver Block Enable 6 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only TXTRIDIS Transmitter Tristate Disable 9 1 write-only TXTRIEN Transmitter Tristate Enable 8 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOCS Automatic Chip Select 16 1 read-write AUTOTRI Automatic TX Tristate 17 1 read-write AUTOTX Always Transmit When RX Not Full 29 1 read-write BIT8DV Bit 8 Default Value 21 1 read-write BYTESWAP Byteswap in Double Accesses 28 1 read-write CCEN Collision Check Enable 2 1 read-write CLKPHA Clock Edge for Setup/Sample 9 1 read-write CLKPOL Clock Polarity 8 1 read-write CSINV Chip Select Invert 15 1 read-write CSMA Action on Slave-Select in Master Mode 11 1 read-write ERRSDMA Halt DMA on Error 22 1 read-write ERRSRX Disable RX on Error 23 1 read-write ERRSTX Disable TX on Error 24 1 read-write LOOPBK Loopback Enable 1 1 read-write MPAB Multi-Processor Address-Bit 4 1 read-write MPM Multi-Processor Mode 3 1 read-write MSBF Most Significant Bit First 10 1 read-write MVDIS Majority Vote Disable 30 1 read-write OVS Oversampling 5 2 read-write X16 Regular UART mode with 16X oversampling in asynchronous mode 0x00000000 X8 Double speed with 8X oversampling in asynchronous mode 0x00000001 X6 6X oversampling in asynchronous mode 0x00000002 X4 Quadruple speed with 4X oversampling in asynchronous mode 0x00000003 RXINV Receiver Input Invert 13 1 read-write SCMODE SmartCard Mode 18 1 read-write SCRETRANS SmartCard Retransmit 19 1 read-write SKIPPERRF Skip Parity Error Frames 20 1 read-write SMSDELAY Synchronous Master Sample Delay 31 1 read-write SSSEARLY Synchronous Slave Setup Early 25 1 read-write SYNC USART Synchronous Mode 0 1 read-write TXBIL TX Buffer Interrupt Level 12 1 read-write TXINV Transmitter Output Invert 14 1 read-write CTRLX Control Register Extended 0x64 32 read-write n 0x0 0x0 CTSEN CTS Function Enabled 2 1 read-write CTSINV CTS Pin Inversion 1 1 read-write DBGHALT Debug Halt 0 1 read-write RTSINV RTS Pin Inversion 3 1 read-write FRAME USART Frame Format Register 0x4 32 read-write n 0x0 0x0 DATABITS Data-Bit Mode 0 4 read-write FOUR Each frame contains 4 data bits 0x00000001 FIVE Each frame contains 5 data bits 0x00000002 SIX Each frame contains 6 data bits 0x00000003 SEVEN Each frame contains 7 data bits 0x00000004 EIGHT Each frame contains 8 data bits 0x00000005 NINE Each frame contains 9 data bits 0x00000006 TEN Each frame contains 10 data bits 0x00000007 ELEVEN Each frame contains 11 data bits 0x00000008 TWELVE Each frame contains 12 data bits 0x00000009 THIRTEEN Each frame contains 13 data bits 0x0000000A FOURTEEN Each frame contains 14 data bits 0x0000000B FIFTEEN Each frame contains 15 data bits 0x0000000C SIXTEEN Each frame contains 16 data bits 0x0000000D PARITY Parity-Bit Mode 8 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 12 2 read-write HALF The transmitter generates a half stop bit. Stop-bits are not verified by receiver 0x00000000 ONE One stop bit is generated and verified 0x00000001 ONEANDAHALF The transmitter generates one and a half stop bit. The receiver verifies the first stop bit 0x00000002 TWO The transmitter generates two stop bits. The receiver checks the first stop-bit only 0x00000003 I2SCTRL I2S Control Register 0x5C 32 read-write n 0x0 0x0 DELAY Delay on I2S Data 4 1 read-write DMASPLIT Separate DMA Request for Left/Right Data 3 1 read-write EN Enable I2S Mode 0 1 read-write FORMAT I2S Word Format 8 3 read-write W32D32 32-bit word, 32-bit data 0x00000000 W32D24M 32-bit word, 32-bit data with 8 lsb masked 0x00000001 W32D24 32-bit word, 24-bit data 0x00000002 W32D16 32-bit word, 16-bit data 0x00000003 W32D8 32-bit word, 8-bit data 0x00000004 W16D16 16-bit word, 16-bit data 0x00000005 W16D8 16-bit word, 8-bit data 0x00000006 W8D8 8-bit word, 8-bit data 0x00000007 JUSTIFY Justification of I2S Data 2 1 read-write MONO Stero or Mono 1 1 read-write IEN Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 CCF CCF Interrupt Enable 12 1 read-write FERR FERR Interrupt Enable 9 1 read-write MPAF MPAF Interrupt Enable 10 1 read-write PERR PERR Interrupt Enable 8 1 read-write RXDATAV RXDATAV Interrupt Enable 2 1 read-write RXFULL RXFULL Interrupt Enable 3 1 read-write RXOF RXOF Interrupt Enable 4 1 read-write RXUF RXUF Interrupt Enable 5 1 read-write SSM SSM Interrupt Enable 11 1 read-write TCMP0 TCMP0 Interrupt Enable 14 1 read-write TCMP1 TCMP1 Interrupt Enable 15 1 read-write TCMP2 TCMP2 Interrupt Enable 16 1 read-write TXBL TXBL Interrupt Enable 1 1 read-write TXC TXC Interrupt Enable 0 1 read-write TXIDLE TXIDLE Interrupt Enable 13 1 read-write TXOF TXOF Interrupt Enable 6 1 read-write TXUF TXUF Interrupt Enable 7 1 read-write IF Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 CCF Collision Check Fail Interrupt Flag 12 1 read-only FERR Framing Error Interrupt Flag 9 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 10 1 read-only PERR Parity Error Interrupt Flag 8 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXFULL RX Buffer Full Interrupt Flag 3 1 read-only RXOF RX Overflow Interrupt Flag 4 1 read-only RXUF RX Underflow Interrupt Flag 5 1 read-only SSM Slave-Select in Master Mode Interrupt Flag 11 1 read-only TCMP0 Timer Comparator 0 Interrupt Flag 14 1 read-only TCMP1 Timer Comparator 1 Interrupt Flag 15 1 read-only TCMP2 Timer Comparator 2 Interrupt Flag 16 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXIDLE TX Idle Interrupt Flag 13 1 read-only TXOF TX Overflow Interrupt Flag 6 1 read-only TXUF TX Underflow Interrupt Flag 7 1 read-only IFC Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 CCF Clear CCF Interrupt Flag 12 1 write-only FERR Clear FERR Interrupt Flag 9 1 write-only MPAF Clear MPAF Interrupt Flag 10 1 write-only PERR Clear PERR Interrupt Flag 8 1 write-only RXFULL Clear RXFULL Interrupt Flag 3 1 write-only RXOF Clear RXOF Interrupt Flag 4 1 write-only RXUF Clear RXUF Interrupt Flag 5 1 write-only SSM Clear SSM Interrupt Flag 11 1 write-only TCMP0 Clear TCMP0 Interrupt Flag 14 1 write-only TCMP1 Clear TCMP1 Interrupt Flag 15 1 write-only TCMP2 Clear TCMP2 Interrupt Flag 16 1 write-only TXC Clear TXC Interrupt Flag 0 1 write-only TXIDLE Clear TXIDLE Interrupt Flag 13 1 write-only TXOF Clear TXOF Interrupt Flag 6 1 write-only TXUF Clear TXUF Interrupt Flag 7 1 write-only IFS Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 CCF Set CCF Interrupt Flag 12 1 write-only FERR Set FERR Interrupt Flag 9 1 write-only MPAF Set MPAF Interrupt Flag 10 1 write-only PERR Set PERR Interrupt Flag 8 1 write-only RXFULL Set RXFULL Interrupt Flag 3 1 write-only RXOF Set RXOF Interrupt Flag 4 1 write-only RXUF Set RXUF Interrupt Flag 5 1 write-only SSM Set SSM Interrupt Flag 11 1 write-only TCMP0 Set TCMP0 Interrupt Flag 14 1 write-only TCMP1 Set TCMP1 Interrupt Flag 15 1 write-only TCMP2 Set TCMP2 Interrupt Flag 16 1 write-only TXC Set TXC Interrupt Flag 0 1 write-only TXIDLE Set TXIDLE Interrupt Flag 13 1 write-only TXOF Set TXOF Interrupt Flag 6 1 write-only TXUF Set TXUF Interrupt Flag 7 1 write-only INPUT USART Input Register 0x58 32 read-write n 0x0 0x0 CLKPRS PRS CLK Enable 15 1 read-write CLKPRSSEL CLK PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 RXPRS PRS RX Enable 7 1 read-write RXPRSSEL RX PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRCTRL IrDA Control Register 0x50 32 read-write n 0x0 0x0 IREN Enable IrDA Module 0 1 read-write IRFILT IrDA RX Filter 3 1 read-write IRPRSEN IrDA PRS Channel Enable 7 1 read-write IRPRSSEL IrDA PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRPW IrDA TX Pulse Width 1 2 read-write ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 0x00000000 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 0x00000001 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 0x00000002 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 0x00000003 ROUTELOC0 I/O Routing Location Register 0x78 32 read-write n 0x0 0x0 CLKLOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 CSLOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RXLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 TXLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTELOC1 I/O Routing Location Register 0x7C 32 read-write n 0x0 0x0 CTSLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RTSLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTEPEN I/O Routing Pin Enable Register 0x74 32 read-write n 0x0 0x0 CLKPEN CLK Pin Enable 3 1 read-write CSPEN CS Pin Enable 2 1 read-write CTSPEN CTS Pin Enable 4 1 read-write RTSPEN RTS Pin Enable 5 1 read-write RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA RX Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX RX Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Data Framing Error 15 1 read-only PERR Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP RX Buffer Data Extended Peek Register 0x28 32 read-only n 0x0 0x0 FERRP Data Framing Error Peek 15 1 read-only PERRP Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only RXDOUBLE RX FIFO Double Data Register 0x24 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEX RX Buffer Double Data Extended Register 0x20 32 read-only n 0x0 0x0 modifyExternal FERR0 Data Framing Error 0 15 1 read-only FERR1 Data Framing Error 1 31 1 read-only PERR0 Data Parity Error 0 14 1 read-only PERR1 Data Parity Error 1 30 1 read-only RXDATA0 RX Data 0 0 9 read-only RXDATA1 RX Data 1 16 9 read-only RXDOUBLEXP RX Buffer Double Data Extended Peek Register 0x2C 32 read-only n 0x0 0x0 FERRP0 Data Framing Error 0 Peek 15 1 read-only FERRP1 Data Framing Error 1 Peek 31 1 read-only PERRP0 Data Parity Error 0 Peek 14 1 read-only PERRP1 Data Parity Error 1 Peek 30 1 read-only RXDATAP0 RX Data 0 Peek 0 9 read-only RXDATAP1 RX Data 1 Peek 16 9 read-only STATUS USART Status Register 0x10 32 read-only n 0x0 0x0 MASTER SPI Master Mode 2 1 read-only RXBLOCK Block Incoming Data 3 1 read-only RXDATAV RX Data Valid 7 1 read-only RXDATAVRIGHT RX Data Right 11 1 read-only RXENS Receiver Enable Status 0 1 read-only RXFULL RX FIFO Full 8 1 read-only RXFULLRIGHT RX Full of Right Data 12 1 read-only TIMERRESTARTED The USART Timer Restarted Itself 14 1 read-only TXBDRIGHT TX Buffer Expects Double Right Data 9 1 read-only TXBL TX Buffer Level 6 1 read-only TXBSRIGHT TX Buffer Expects Single Right Data 10 1 read-only TXBUFCNT TX Buffer Count 16 2 read-only TXC TX Complete 5 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXIDLE TX Idle 13 1 read-only TXTRI Transmitter Tristated 4 1 read-only TIMECMP0 Used to Generate Interrupts and Various Delays 0x68 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP0 24 1 read-write TCMPVAL Timer Comparator 0 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 0 is disabled 0x00000000 TXEOF Comparator 0 and timer are started at TX end of frame 0x00000001 TXC Comparator 0 and timer are started at TX Complete 0x00000002 RXACT Comparator 0 and timer are started at RX going Active (default: low) 0x00000003 RXEOF Comparator 0 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 0 20 3 read-write TCMP0 Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event 0x00000000 TXST Comparator 0 is disabled at the start of transmission 0x00000001 RXACT Comparator 0 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 0 is disabled on RX going Inactive 0x00000003 TIMECMP1 Used to Generate Interrupts and Various Delays 0x6C 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP1 24 1 read-write TCMPVAL Timer Comparator 1 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 1 is disabled 0x00000000 TXEOF Comparator 1 and timer are started at TX end of frame 0x00000001 TXC Comparator 1 and timer are started at TX Complete 0x00000002 RXACT Comparator 1 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 1 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 1 20 3 read-write TCMP1 Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event 0x00000000 TXST Comparator 1 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 1 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 1 is disabled on RX going Inactive 0x00000003 TIMECMP2 Used to Generate Interrupts and Various Delays 0x70 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP2 24 1 read-write TCMPVAL Timer Comparator 2 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 2 is disabled 0x00000000 TXEOF Comparator 2 and timer are started at TX end of frame 0x00000001 TXC Comparator 2 and timer are started at TX Complete 0x00000002 RXACT Comparator 2 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 2 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 2 20 3 read-write TCMP2 Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event 0x00000000 TXST Comparator 2 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 2 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 2 is disabled on RX going Inactive 0x00000003 TIMING Timing Register 0x60 32 read-write n 0x0 0x0 CSHOLD Chip Select Hold 28 3 read-write ZERO Disable CS being asserted after the end of transmission 0x00000000 ONE CS is asserted for 1 baud-times after the end of transmission 0x00000001 TWO CS is asserted for 2 baud-times after the end of transmission 0x00000002 THREE CS is asserted for 3 baud-times after the end of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times after the end of transmission 0x00000004 TCMP0 CS is asserted after the end of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted after the end of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted after the end of transmission for TCMPVAL2 baud-times 0x00000007 CSSETUP Chip Select Setup 20 3 read-write ZERO CS is not asserted before start of transmission 0x00000000 ONE CS is asserted for 1 baud-times before start of transmission 0x00000001 TWO CS is asserted for 2 baud-times before start of transmission 0x00000002 THREE CS is asserted for 3 baud-times before start of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times before start of transmission 0x00000004 TCMP0 CS is asserted before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted before the start of transmission for TCMPVAL2 baud-times 0x00000007 ICS Inter-character Spacing 24 3 read-write ZERO There is no space between charcters 0x00000000 ONE Create a space of 1 baud-times before start of transmission 0x00000001 TWO Create a space of 2 baud-times before start of transmission 0x00000002 THREE Create a space of 3 baud-times before start of transmission 0x00000003 SEVEN Create a space of 7 baud-times before start of transmission 0x00000004 TCMP0 Create a space of before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 Create a space of before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 Create a space of before the start of transmission for TCMPVAL2 baud-times 0x00000007 TXDELAY TX Frame Start Delay 16 3 read-write DISABLE Disable - TXDELAY in USARTn_CTRL can be used for legacy 0x00000000 ONE Start of transmission is delayed for 1 baud-times 0x00000001 TWO Start of transmission is delayed for 2 baud-times 0x00000002 THREE Start of transmission is delayed for 3 baud-times 0x00000003 SEVEN Start of transmission is delayed for 7 baud-times 0x00000004 TCMP0 Start of transmission is delayed for TCMPVAL0 baud-times 0x00000005 TCMP1 Start of transmission is delayed for TCMPVAL1 baud-times 0x00000006 TCMP2 Start of transmission is delayed for TCMPVAL2 baud-times 0x00000007 TRIGCTRL USART Trigger Control Register 0x8 32 read-write n 0x0 0x0 AUTOTXTEN AUTOTX Trigger Enable 6 1 read-write RXATX0EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times 10 1 read-write RXATX1EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times 11 1 read-write RXATX2EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times 12 1 read-write RXTEN Receive Trigger Enable 4 1 read-write TSEL Trigger PRS Channel Select 16 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 TXARX0EN Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL 7 1 read-write TXARX1EN Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL 8 1 read-write TXARX2EN Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL 9 1 read-write TXTEN Transmit Trigger Enable 5 1 read-write TXDATA TX Buffer Data Register 0x34 32 read-write n 0x0 0x0 TXDATA TX Data 0 8 read-write TXDATAX TX Buffer Data Extended Register 0x30 32 read-write n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 read-write TXBREAK Transmit Data as Break 13 1 read-write TXDATAX TX Data 0 9 read-write TXDISAT Clear TXEN After Transmission 14 1 read-write TXTRIAT Set TXTRI After Transmission 12 1 read-write UBRXAT Unblock RX After Transmission 11 1 read-write TXDOUBLE TX Buffer Double Data Register 0x3C 32 read-write n 0x0 0x0 TXDATA0 TX Data 0 8 read-write TXDATA1 TX Data 8 8 read-write TXDOUBLEX TX Buffer Double Data Extended Register 0x38 32 read-write n 0x0 0x0 RXENAT0 Enable RX After Transmission 15 1 read-write RXENAT1 Enable RX After Transmission 31 1 read-write TXBREAK0 Transmit Data as Break 13 1 read-write TXBREAK1 Transmit Data as Break 29 1 read-write TXDATA0 TX Data 0 9 read-write TXDATA1 TX Data 16 9 read-write TXDISAT0 Clear TXEN After Transmission 14 1 read-write TXDISAT1 Clear TXEN After Transmission 30 1 read-write TXTRIAT0 Set TXTRI After Transmission 12 1 read-write TXTRIAT1 Set TXTRI After Transmission 28 1 read-write UBRXAT0 Unblock RX After Transmission 11 1 read-write UBRXAT1 Unblock RX After Transmission 27 1 read-write USART3 USART3 USART3 0x0 0x0 0x400 registers n USART3_RX 37 USART3_TX 38 CLKDIV Clock Control Register 0x14 32 read-write n 0x0 0x0 AUTOBAUDEN AUTOBAUD Detection Enable 31 1 read-write DIV Fractional Clock Divider 3 20 read-write CMD Command Register 0xC 32 write-only n 0x0 0x0 CLEARRX Clear RX 11 1 write-only CLEARTX Clear TX 10 1 write-only MASTERDIS Master Disable 5 1 write-only MASTEREN Master Enable 4 1 write-only RXBLOCKDIS Receiver Block Disable 7 1 write-only RXBLOCKEN Receiver Block Enable 6 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only TXTRIDIS Transmitter Tristate Disable 9 1 write-only TXTRIEN Transmitter Tristate Enable 8 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOCS Automatic Chip Select 16 1 read-write AUTOTRI Automatic TX Tristate 17 1 read-write AUTOTX Always Transmit When RX Not Full 29 1 read-write BIT8DV Bit 8 Default Value 21 1 read-write BYTESWAP Byteswap in Double Accesses 28 1 read-write CCEN Collision Check Enable 2 1 read-write CLKPHA Clock Edge for Setup/Sample 9 1 read-write CLKPOL Clock Polarity 8 1 read-write CSINV Chip Select Invert 15 1 read-write CSMA Action on Slave-Select in Master Mode 11 1 read-write ERRSDMA Halt DMA on Error 22 1 read-write ERRSRX Disable RX on Error 23 1 read-write ERRSTX Disable TX on Error 24 1 read-write LOOPBK Loopback Enable 1 1 read-write MPAB Multi-Processor Address-Bit 4 1 read-write MPM Multi-Processor Mode 3 1 read-write MSBF Most Significant Bit First 10 1 read-write MVDIS Majority Vote Disable 30 1 read-write OVS Oversampling 5 2 read-write X16 Regular UART mode with 16X oversampling in asynchronous mode 0x00000000 X8 Double speed with 8X oversampling in asynchronous mode 0x00000001 X6 6X oversampling in asynchronous mode 0x00000002 X4 Quadruple speed with 4X oversampling in asynchronous mode 0x00000003 RXINV Receiver Input Invert 13 1 read-write SCMODE SmartCard Mode 18 1 read-write SCRETRANS SmartCard Retransmit 19 1 read-write SKIPPERRF Skip Parity Error Frames 20 1 read-write SMSDELAY Synchronous Master Sample Delay 31 1 read-write SSSEARLY Synchronous Slave Setup Early 25 1 read-write SYNC USART Synchronous Mode 0 1 read-write TXBIL TX Buffer Interrupt Level 12 1 read-write TXINV Transmitter Output Invert 14 1 read-write CTRLX Control Register Extended 0x64 32 read-write n 0x0 0x0 CTSEN CTS Function Enabled 2 1 read-write CTSINV CTS Pin Inversion 1 1 read-write DBGHALT Debug Halt 0 1 read-write RTSINV RTS Pin Inversion 3 1 read-write FRAME USART Frame Format Register 0x4 32 read-write n 0x0 0x0 DATABITS Data-Bit Mode 0 4 read-write FOUR Each frame contains 4 data bits 0x00000001 FIVE Each frame contains 5 data bits 0x00000002 SIX Each frame contains 6 data bits 0x00000003 SEVEN Each frame contains 7 data bits 0x00000004 EIGHT Each frame contains 8 data bits 0x00000005 NINE Each frame contains 9 data bits 0x00000006 TEN Each frame contains 10 data bits 0x00000007 ELEVEN Each frame contains 11 data bits 0x00000008 TWELVE Each frame contains 12 data bits 0x00000009 THIRTEEN Each frame contains 13 data bits 0x0000000A FOURTEEN Each frame contains 14 data bits 0x0000000B FIFTEEN Each frame contains 15 data bits 0x0000000C SIXTEEN Each frame contains 16 data bits 0x0000000D PARITY Parity-Bit Mode 8 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 12 2 read-write HALF The transmitter generates a half stop bit. Stop-bits are not verified by receiver 0x00000000 ONE One stop bit is generated and verified 0x00000001 ONEANDAHALF The transmitter generates one and a half stop bit. The receiver verifies the first stop bit 0x00000002 TWO The transmitter generates two stop bits. The receiver checks the first stop-bit only 0x00000003 I2SCTRL I2S Control Register 0x5C 32 read-write n 0x0 0x0 DELAY Delay on I2S Data 4 1 read-write DMASPLIT Separate DMA Request for Left/Right Data 3 1 read-write EN Enable I2S Mode 0 1 read-write FORMAT I2S Word Format 8 3 read-write W32D32 32-bit word, 32-bit data 0x00000000 W32D24M 32-bit word, 32-bit data with 8 lsb masked 0x00000001 W32D24 32-bit word, 24-bit data 0x00000002 W32D16 32-bit word, 16-bit data 0x00000003 W32D8 32-bit word, 8-bit data 0x00000004 W16D16 16-bit word, 16-bit data 0x00000005 W16D8 16-bit word, 8-bit data 0x00000006 W8D8 8-bit word, 8-bit data 0x00000007 JUSTIFY Justification of I2S Data 2 1 read-write MONO Stero or Mono 1 1 read-write IEN Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 CCF CCF Interrupt Enable 12 1 read-write FERR FERR Interrupt Enable 9 1 read-write MPAF MPAF Interrupt Enable 10 1 read-write PERR PERR Interrupt Enable 8 1 read-write RXDATAV RXDATAV Interrupt Enable 2 1 read-write RXFULL RXFULL Interrupt Enable 3 1 read-write RXOF RXOF Interrupt Enable 4 1 read-write RXUF RXUF Interrupt Enable 5 1 read-write SSM SSM Interrupt Enable 11 1 read-write TCMP0 TCMP0 Interrupt Enable 14 1 read-write TCMP1 TCMP1 Interrupt Enable 15 1 read-write TCMP2 TCMP2 Interrupt Enable 16 1 read-write TXBL TXBL Interrupt Enable 1 1 read-write TXC TXC Interrupt Enable 0 1 read-write TXIDLE TXIDLE Interrupt Enable 13 1 read-write TXOF TXOF Interrupt Enable 6 1 read-write TXUF TXUF Interrupt Enable 7 1 read-write IF Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 CCF Collision Check Fail Interrupt Flag 12 1 read-only FERR Framing Error Interrupt Flag 9 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 10 1 read-only PERR Parity Error Interrupt Flag 8 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXFULL RX Buffer Full Interrupt Flag 3 1 read-only RXOF RX Overflow Interrupt Flag 4 1 read-only RXUF RX Underflow Interrupt Flag 5 1 read-only SSM Slave-Select in Master Mode Interrupt Flag 11 1 read-only TCMP0 Timer Comparator 0 Interrupt Flag 14 1 read-only TCMP1 Timer Comparator 1 Interrupt Flag 15 1 read-only TCMP2 Timer Comparator 2 Interrupt Flag 16 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXIDLE TX Idle Interrupt Flag 13 1 read-only TXOF TX Overflow Interrupt Flag 6 1 read-only TXUF TX Underflow Interrupt Flag 7 1 read-only IFC Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 CCF Clear CCF Interrupt Flag 12 1 write-only FERR Clear FERR Interrupt Flag 9 1 write-only MPAF Clear MPAF Interrupt Flag 10 1 write-only PERR Clear PERR Interrupt Flag 8 1 write-only RXFULL Clear RXFULL Interrupt Flag 3 1 write-only RXOF Clear RXOF Interrupt Flag 4 1 write-only RXUF Clear RXUF Interrupt Flag 5 1 write-only SSM Clear SSM Interrupt Flag 11 1 write-only TCMP0 Clear TCMP0 Interrupt Flag 14 1 write-only TCMP1 Clear TCMP1 Interrupt Flag 15 1 write-only TCMP2 Clear TCMP2 Interrupt Flag 16 1 write-only TXC Clear TXC Interrupt Flag 0 1 write-only TXIDLE Clear TXIDLE Interrupt Flag 13 1 write-only TXOF Clear TXOF Interrupt Flag 6 1 write-only TXUF Clear TXUF Interrupt Flag 7 1 write-only IFS Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 CCF Set CCF Interrupt Flag 12 1 write-only FERR Set FERR Interrupt Flag 9 1 write-only MPAF Set MPAF Interrupt Flag 10 1 write-only PERR Set PERR Interrupt Flag 8 1 write-only RXFULL Set RXFULL Interrupt Flag 3 1 write-only RXOF Set RXOF Interrupt Flag 4 1 write-only RXUF Set RXUF Interrupt Flag 5 1 write-only SSM Set SSM Interrupt Flag 11 1 write-only TCMP0 Set TCMP0 Interrupt Flag 14 1 write-only TCMP1 Set TCMP1 Interrupt Flag 15 1 write-only TCMP2 Set TCMP2 Interrupt Flag 16 1 write-only TXC Set TXC Interrupt Flag 0 1 write-only TXIDLE Set TXIDLE Interrupt Flag 13 1 write-only TXOF Set TXOF Interrupt Flag 6 1 write-only TXUF Set TXUF Interrupt Flag 7 1 write-only INPUT USART Input Register 0x58 32 read-write n 0x0 0x0 CLKPRS PRS CLK Enable 15 1 read-write CLKPRSSEL CLK PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 RXPRS PRS RX Enable 7 1 read-write RXPRSSEL RX PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRCTRL IrDA Control Register 0x50 32 read-write n 0x0 0x0 IREN Enable IrDA Module 0 1 read-write IRFILT IrDA RX Filter 3 1 read-write IRPRSEN IrDA PRS Channel Enable 7 1 read-write IRPRSSEL IrDA PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRPW IrDA TX Pulse Width 1 2 read-write ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 0x00000000 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 0x00000001 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 0x00000002 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 0x00000003 ROUTELOC0 I/O Routing Location Register 0x78 32 read-write n 0x0 0x0 CLKLOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 CSLOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RXLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 TXLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTELOC1 I/O Routing Location Register 0x7C 32 read-write n 0x0 0x0 CTSLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RTSLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTEPEN I/O Routing Pin Enable Register 0x74 32 read-write n 0x0 0x0 CLKPEN CLK Pin Enable 3 1 read-write CSPEN CS Pin Enable 2 1 read-write CTSPEN CTS Pin Enable 4 1 read-write RTSPEN RTS Pin Enable 5 1 read-write RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA RX Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX RX Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Data Framing Error 15 1 read-only PERR Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP RX Buffer Data Extended Peek Register 0x28 32 read-only n 0x0 0x0 FERRP Data Framing Error Peek 15 1 read-only PERRP Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only RXDOUBLE RX FIFO Double Data Register 0x24 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEX RX Buffer Double Data Extended Register 0x20 32 read-only n 0x0 0x0 modifyExternal FERR0 Data Framing Error 0 15 1 read-only FERR1 Data Framing Error 1 31 1 read-only PERR0 Data Parity Error 0 14 1 read-only PERR1 Data Parity Error 1 30 1 read-only RXDATA0 RX Data 0 0 9 read-only RXDATA1 RX Data 1 16 9 read-only RXDOUBLEXP RX Buffer Double Data Extended Peek Register 0x2C 32 read-only n 0x0 0x0 FERRP0 Data Framing Error 0 Peek 15 1 read-only FERRP1 Data Framing Error 1 Peek 31 1 read-only PERRP0 Data Parity Error 0 Peek 14 1 read-only PERRP1 Data Parity Error 1 Peek 30 1 read-only RXDATAP0 RX Data 0 Peek 0 9 read-only RXDATAP1 RX Data 1 Peek 16 9 read-only STATUS USART Status Register 0x10 32 read-only n 0x0 0x0 MASTER SPI Master Mode 2 1 read-only RXBLOCK Block Incoming Data 3 1 read-only RXDATAV RX Data Valid 7 1 read-only RXDATAVRIGHT RX Data Right 11 1 read-only RXENS Receiver Enable Status 0 1 read-only RXFULL RX FIFO Full 8 1 read-only RXFULLRIGHT RX Full of Right Data 12 1 read-only TIMERRESTARTED The USART Timer Restarted Itself 14 1 read-only TXBDRIGHT TX Buffer Expects Double Right Data 9 1 read-only TXBL TX Buffer Level 6 1 read-only TXBSRIGHT TX Buffer Expects Single Right Data 10 1 read-only TXBUFCNT TX Buffer Count 16 2 read-only TXC TX Complete 5 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXIDLE TX Idle 13 1 read-only TXTRI Transmitter Tristated 4 1 read-only TIMECMP0 Used to Generate Interrupts and Various Delays 0x68 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP0 24 1 read-write TCMPVAL Timer Comparator 0 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 0 is disabled 0x00000000 TXEOF Comparator 0 and timer are started at TX end of frame 0x00000001 TXC Comparator 0 and timer are started at TX Complete 0x00000002 RXACT Comparator 0 and timer are started at RX going Active (default: low) 0x00000003 RXEOF Comparator 0 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 0 20 3 read-write TCMP0 Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event 0x00000000 TXST Comparator 0 is disabled at the start of transmission 0x00000001 RXACT Comparator 0 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 0 is disabled on RX going Inactive 0x00000003 TIMECMP1 Used to Generate Interrupts and Various Delays 0x6C 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP1 24 1 read-write TCMPVAL Timer Comparator 1 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 1 is disabled 0x00000000 TXEOF Comparator 1 and timer are started at TX end of frame 0x00000001 TXC Comparator 1 and timer are started at TX Complete 0x00000002 RXACT Comparator 1 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 1 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 1 20 3 read-write TCMP1 Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event 0x00000000 TXST Comparator 1 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 1 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 1 is disabled on RX going Inactive 0x00000003 TIMECMP2 Used to Generate Interrupts and Various Delays 0x70 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP2 24 1 read-write TCMPVAL Timer Comparator 2 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 2 is disabled 0x00000000 TXEOF Comparator 2 and timer are started at TX end of frame 0x00000001 TXC Comparator 2 and timer are started at TX Complete 0x00000002 RXACT Comparator 2 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 2 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 2 20 3 read-write TCMP2 Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event 0x00000000 TXST Comparator 2 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 2 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 2 is disabled on RX going Inactive 0x00000003 TIMING Timing Register 0x60 32 read-write n 0x0 0x0 CSHOLD Chip Select Hold 28 3 read-write ZERO Disable CS being asserted after the end of transmission 0x00000000 ONE CS is asserted for 1 baud-times after the end of transmission 0x00000001 TWO CS is asserted for 2 baud-times after the end of transmission 0x00000002 THREE CS is asserted for 3 baud-times after the end of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times after the end of transmission 0x00000004 TCMP0 CS is asserted after the end of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted after the end of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted after the end of transmission for TCMPVAL2 baud-times 0x00000007 CSSETUP Chip Select Setup 20 3 read-write ZERO CS is not asserted before start of transmission 0x00000000 ONE CS is asserted for 1 baud-times before start of transmission 0x00000001 TWO CS is asserted for 2 baud-times before start of transmission 0x00000002 THREE CS is asserted for 3 baud-times before start of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times before start of transmission 0x00000004 TCMP0 CS is asserted before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted before the start of transmission for TCMPVAL2 baud-times 0x00000007 ICS Inter-character Spacing 24 3 read-write ZERO There is no space between charcters 0x00000000 ONE Create a space of 1 baud-times before start of transmission 0x00000001 TWO Create a space of 2 baud-times before start of transmission 0x00000002 THREE Create a space of 3 baud-times before start of transmission 0x00000003 SEVEN Create a space of 7 baud-times before start of transmission 0x00000004 TCMP0 Create a space of before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 Create a space of before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 Create a space of before the start of transmission for TCMPVAL2 baud-times 0x00000007 TXDELAY TX Frame Start Delay 16 3 read-write DISABLE Disable - TXDELAY in USARTn_CTRL can be used for legacy 0x00000000 ONE Start of transmission is delayed for 1 baud-times 0x00000001 TWO Start of transmission is delayed for 2 baud-times 0x00000002 THREE Start of transmission is delayed for 3 baud-times 0x00000003 SEVEN Start of transmission is delayed for 7 baud-times 0x00000004 TCMP0 Start of transmission is delayed for TCMPVAL0 baud-times 0x00000005 TCMP1 Start of transmission is delayed for TCMPVAL1 baud-times 0x00000006 TCMP2 Start of transmission is delayed for TCMPVAL2 baud-times 0x00000007 TRIGCTRL USART Trigger Control Register 0x8 32 read-write n 0x0 0x0 AUTOTXTEN AUTOTX Trigger Enable 6 1 read-write RXATX0EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times 10 1 read-write RXATX1EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times 11 1 read-write RXATX2EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times 12 1 read-write RXTEN Receive Trigger Enable 4 1 read-write TSEL Trigger PRS Channel Select 16 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 TXARX0EN Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL 7 1 read-write TXARX1EN Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL 8 1 read-write TXARX2EN Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL 9 1 read-write TXTEN Transmit Trigger Enable 5 1 read-write TXDATA TX Buffer Data Register 0x34 32 read-write n 0x0 0x0 TXDATA TX Data 0 8 read-write TXDATAX TX Buffer Data Extended Register 0x30 32 read-write n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 read-write TXBREAK Transmit Data as Break 13 1 read-write TXDATAX TX Data 0 9 read-write TXDISAT Clear TXEN After Transmission 14 1 read-write TXTRIAT Set TXTRI After Transmission 12 1 read-write UBRXAT Unblock RX After Transmission 11 1 read-write TXDOUBLE TX Buffer Double Data Register 0x3C 32 read-write n 0x0 0x0 TXDATA0 TX Data 0 8 read-write TXDATA1 TX Data 8 8 read-write TXDOUBLEX TX Buffer Double Data Extended Register 0x38 32 read-write n 0x0 0x0 RXENAT0 Enable RX After Transmission 15 1 read-write RXENAT1 Enable RX After Transmission 31 1 read-write TXBREAK0 Transmit Data as Break 13 1 read-write TXBREAK1 Transmit Data as Break 29 1 read-write TXDATA0 TX Data 0 9 read-write TXDATA1 TX Data 16 9 read-write TXDISAT0 Clear TXEN After Transmission 14 1 read-write TXDISAT1 Clear TXEN After Transmission 30 1 read-write TXTRIAT0 Set TXTRI After Transmission 12 1 read-write TXTRIAT1 Set TXTRI After Transmission 28 1 read-write UBRXAT0 Unblock RX After Transmission 11 1 read-write UBRXAT1 Unblock RX After Transmission 27 1 read-write USART4 USART4 USART4 0x0 0x0 0x400 registers n USART4_RX 39 USART4_TX 40 CLKDIV Clock Control Register 0x14 32 read-write n 0x0 0x0 AUTOBAUDEN AUTOBAUD Detection Enable 31 1 read-write DIV Fractional Clock Divider 3 20 read-write CMD Command Register 0xC 32 write-only n 0x0 0x0 CLEARRX Clear RX 11 1 write-only CLEARTX Clear TX 10 1 write-only MASTERDIS Master Disable 5 1 write-only MASTEREN Master Enable 4 1 write-only RXBLOCKDIS Receiver Block Disable 7 1 write-only RXBLOCKEN Receiver Block Enable 6 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only TXTRIDIS Transmitter Tristate Disable 9 1 write-only TXTRIEN Transmitter Tristate Enable 8 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOCS Automatic Chip Select 16 1 read-write AUTOTRI Automatic TX Tristate 17 1 read-write AUTOTX Always Transmit When RX Not Full 29 1 read-write BIT8DV Bit 8 Default Value 21 1 read-write BYTESWAP Byteswap in Double Accesses 28 1 read-write CCEN Collision Check Enable 2 1 read-write CLKPHA Clock Edge for Setup/Sample 9 1 read-write CLKPOL Clock Polarity 8 1 read-write CSINV Chip Select Invert 15 1 read-write CSMA Action on Slave-Select in Master Mode 11 1 read-write ERRSDMA Halt DMA on Error 22 1 read-write ERRSRX Disable RX on Error 23 1 read-write ERRSTX Disable TX on Error 24 1 read-write LOOPBK Loopback Enable 1 1 read-write MPAB Multi-Processor Address-Bit 4 1 read-write MPM Multi-Processor Mode 3 1 read-write MSBF Most Significant Bit First 10 1 read-write MVDIS Majority Vote Disable 30 1 read-write OVS Oversampling 5 2 read-write X16 Regular UART mode with 16X oversampling in asynchronous mode 0x00000000 X8 Double speed with 8X oversampling in asynchronous mode 0x00000001 X6 6X oversampling in asynchronous mode 0x00000002 X4 Quadruple speed with 4X oversampling in asynchronous mode 0x00000003 RXINV Receiver Input Invert 13 1 read-write SCMODE SmartCard Mode 18 1 read-write SCRETRANS SmartCard Retransmit 19 1 read-write SKIPPERRF Skip Parity Error Frames 20 1 read-write SMSDELAY Synchronous Master Sample Delay 31 1 read-write SSSEARLY Synchronous Slave Setup Early 25 1 read-write SYNC USART Synchronous Mode 0 1 read-write TXBIL TX Buffer Interrupt Level 12 1 read-write TXINV Transmitter Output Invert 14 1 read-write CTRLX Control Register Extended 0x64 32 read-write n 0x0 0x0 CTSEN CTS Function Enabled 2 1 read-write CTSINV CTS Pin Inversion 1 1 read-write DBGHALT Debug Halt 0 1 read-write RTSINV RTS Pin Inversion 3 1 read-write FRAME USART Frame Format Register 0x4 32 read-write n 0x0 0x0 DATABITS Data-Bit Mode 0 4 read-write FOUR Each frame contains 4 data bits 0x00000001 FIVE Each frame contains 5 data bits 0x00000002 SIX Each frame contains 6 data bits 0x00000003 SEVEN Each frame contains 7 data bits 0x00000004 EIGHT Each frame contains 8 data bits 0x00000005 NINE Each frame contains 9 data bits 0x00000006 TEN Each frame contains 10 data bits 0x00000007 ELEVEN Each frame contains 11 data bits 0x00000008 TWELVE Each frame contains 12 data bits 0x00000009 THIRTEEN Each frame contains 13 data bits 0x0000000A FOURTEEN Each frame contains 14 data bits 0x0000000B FIFTEEN Each frame contains 15 data bits 0x0000000C SIXTEEN Each frame contains 16 data bits 0x0000000D PARITY Parity-Bit Mode 8 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 12 2 read-write HALF The transmitter generates a half stop bit. Stop-bits are not verified by receiver 0x00000000 ONE One stop bit is generated and verified 0x00000001 ONEANDAHALF The transmitter generates one and a half stop bit. The receiver verifies the first stop bit 0x00000002 TWO The transmitter generates two stop bits. The receiver checks the first stop-bit only 0x00000003 I2SCTRL I2S Control Register 0x5C 32 read-write n 0x0 0x0 DELAY Delay on I2S Data 4 1 read-write DMASPLIT Separate DMA Request for Left/Right Data 3 1 read-write EN Enable I2S Mode 0 1 read-write FORMAT I2S Word Format 8 3 read-write W32D32 32-bit word, 32-bit data 0x00000000 W32D24M 32-bit word, 32-bit data with 8 lsb masked 0x00000001 W32D24 32-bit word, 24-bit data 0x00000002 W32D16 32-bit word, 16-bit data 0x00000003 W32D8 32-bit word, 8-bit data 0x00000004 W16D16 16-bit word, 16-bit data 0x00000005 W16D8 16-bit word, 8-bit data 0x00000006 W8D8 8-bit word, 8-bit data 0x00000007 JUSTIFY Justification of I2S Data 2 1 read-write MONO Stero or Mono 1 1 read-write IEN Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 CCF CCF Interrupt Enable 12 1 read-write FERR FERR Interrupt Enable 9 1 read-write MPAF MPAF Interrupt Enable 10 1 read-write PERR PERR Interrupt Enable 8 1 read-write RXDATAV RXDATAV Interrupt Enable 2 1 read-write RXFULL RXFULL Interrupt Enable 3 1 read-write RXOF RXOF Interrupt Enable 4 1 read-write RXUF RXUF Interrupt Enable 5 1 read-write SSM SSM Interrupt Enable 11 1 read-write TCMP0 TCMP0 Interrupt Enable 14 1 read-write TCMP1 TCMP1 Interrupt Enable 15 1 read-write TCMP2 TCMP2 Interrupt Enable 16 1 read-write TXBL TXBL Interrupt Enable 1 1 read-write TXC TXC Interrupt Enable 0 1 read-write TXIDLE TXIDLE Interrupt Enable 13 1 read-write TXOF TXOF Interrupt Enable 6 1 read-write TXUF TXUF Interrupt Enable 7 1 read-write IF Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 CCF Collision Check Fail Interrupt Flag 12 1 read-only FERR Framing Error Interrupt Flag 9 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 10 1 read-only PERR Parity Error Interrupt Flag 8 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXFULL RX Buffer Full Interrupt Flag 3 1 read-only RXOF RX Overflow Interrupt Flag 4 1 read-only RXUF RX Underflow Interrupt Flag 5 1 read-only SSM Slave-Select in Master Mode Interrupt Flag 11 1 read-only TCMP0 Timer Comparator 0 Interrupt Flag 14 1 read-only TCMP1 Timer Comparator 1 Interrupt Flag 15 1 read-only TCMP2 Timer Comparator 2 Interrupt Flag 16 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXIDLE TX Idle Interrupt Flag 13 1 read-only TXOF TX Overflow Interrupt Flag 6 1 read-only TXUF TX Underflow Interrupt Flag 7 1 read-only IFC Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 CCF Clear CCF Interrupt Flag 12 1 write-only FERR Clear FERR Interrupt Flag 9 1 write-only MPAF Clear MPAF Interrupt Flag 10 1 write-only PERR Clear PERR Interrupt Flag 8 1 write-only RXFULL Clear RXFULL Interrupt Flag 3 1 write-only RXOF Clear RXOF Interrupt Flag 4 1 write-only RXUF Clear RXUF Interrupt Flag 5 1 write-only SSM Clear SSM Interrupt Flag 11 1 write-only TCMP0 Clear TCMP0 Interrupt Flag 14 1 write-only TCMP1 Clear TCMP1 Interrupt Flag 15 1 write-only TCMP2 Clear TCMP2 Interrupt Flag 16 1 write-only TXC Clear TXC Interrupt Flag 0 1 write-only TXIDLE Clear TXIDLE Interrupt Flag 13 1 write-only TXOF Clear TXOF Interrupt Flag 6 1 write-only TXUF Clear TXUF Interrupt Flag 7 1 write-only IFS Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 CCF Set CCF Interrupt Flag 12 1 write-only FERR Set FERR Interrupt Flag 9 1 write-only MPAF Set MPAF Interrupt Flag 10 1 write-only PERR Set PERR Interrupt Flag 8 1 write-only RXFULL Set RXFULL Interrupt Flag 3 1 write-only RXOF Set RXOF Interrupt Flag 4 1 write-only RXUF Set RXUF Interrupt Flag 5 1 write-only SSM Set SSM Interrupt Flag 11 1 write-only TCMP0 Set TCMP0 Interrupt Flag 14 1 write-only TCMP1 Set TCMP1 Interrupt Flag 15 1 write-only TCMP2 Set TCMP2 Interrupt Flag 16 1 write-only TXC Set TXC Interrupt Flag 0 1 write-only TXIDLE Set TXIDLE Interrupt Flag 13 1 write-only TXOF Set TXOF Interrupt Flag 6 1 write-only TXUF Set TXUF Interrupt Flag 7 1 write-only INPUT USART Input Register 0x58 32 read-write n 0x0 0x0 CLKPRS PRS CLK Enable 15 1 read-write CLKPRSSEL CLK PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 RXPRS PRS RX Enable 7 1 read-write RXPRSSEL RX PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRCTRL IrDA Control Register 0x50 32 read-write n 0x0 0x0 IREN Enable IrDA Module 0 1 read-write IRFILT IrDA RX Filter 3 1 read-write IRPRSEN IrDA PRS Channel Enable 7 1 read-write IRPRSSEL IrDA PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRPW IrDA TX Pulse Width 1 2 read-write ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 0x00000000 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 0x00000001 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 0x00000002 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 0x00000003 ROUTELOC0 I/O Routing Location Register 0x78 32 read-write n 0x0 0x0 CLKLOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 CSLOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RXLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 TXLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTELOC1 I/O Routing Location Register 0x7C 32 read-write n 0x0 0x0 CTSLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RTSLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTEPEN I/O Routing Pin Enable Register 0x74 32 read-write n 0x0 0x0 CLKPEN CLK Pin Enable 3 1 read-write CSPEN CS Pin Enable 2 1 read-write CTSPEN CTS Pin Enable 4 1 read-write RTSPEN RTS Pin Enable 5 1 read-write RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA RX Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX RX Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Data Framing Error 15 1 read-only PERR Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP RX Buffer Data Extended Peek Register 0x28 32 read-only n 0x0 0x0 FERRP Data Framing Error Peek 15 1 read-only PERRP Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only RXDOUBLE RX FIFO Double Data Register 0x24 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEX RX Buffer Double Data Extended Register 0x20 32 read-only n 0x0 0x0 modifyExternal FERR0 Data Framing Error 0 15 1 read-only FERR1 Data Framing Error 1 31 1 read-only PERR0 Data Parity Error 0 14 1 read-only PERR1 Data Parity Error 1 30 1 read-only RXDATA0 RX Data 0 0 9 read-only RXDATA1 RX Data 1 16 9 read-only RXDOUBLEXP RX Buffer Double Data Extended Peek Register 0x2C 32 read-only n 0x0 0x0 FERRP0 Data Framing Error 0 Peek 15 1 read-only FERRP1 Data Framing Error 1 Peek 31 1 read-only PERRP0 Data Parity Error 0 Peek 14 1 read-only PERRP1 Data Parity Error 1 Peek 30 1 read-only RXDATAP0 RX Data 0 Peek 0 9 read-only RXDATAP1 RX Data 1 Peek 16 9 read-only STATUS USART Status Register 0x10 32 read-only n 0x0 0x0 MASTER SPI Master Mode 2 1 read-only RXBLOCK Block Incoming Data 3 1 read-only RXDATAV RX Data Valid 7 1 read-only RXDATAVRIGHT RX Data Right 11 1 read-only RXENS Receiver Enable Status 0 1 read-only RXFULL RX FIFO Full 8 1 read-only RXFULLRIGHT RX Full of Right Data 12 1 read-only TIMERRESTARTED The USART Timer Restarted Itself 14 1 read-only TXBDRIGHT TX Buffer Expects Double Right Data 9 1 read-only TXBL TX Buffer Level 6 1 read-only TXBSRIGHT TX Buffer Expects Single Right Data 10 1 read-only TXBUFCNT TX Buffer Count 16 2 read-only TXC TX Complete 5 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXIDLE TX Idle 13 1 read-only TXTRI Transmitter Tristated 4 1 read-only TIMECMP0 Used to Generate Interrupts and Various Delays 0x68 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP0 24 1 read-write TCMPVAL Timer Comparator 0 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 0 is disabled 0x00000000 TXEOF Comparator 0 and timer are started at TX end of frame 0x00000001 TXC Comparator 0 and timer are started at TX Complete 0x00000002 RXACT Comparator 0 and timer are started at RX going Active (default: low) 0x00000003 RXEOF Comparator 0 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 0 20 3 read-write TCMP0 Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event 0x00000000 TXST Comparator 0 is disabled at the start of transmission 0x00000001 RXACT Comparator 0 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 0 is disabled on RX going Inactive 0x00000003 TIMECMP1 Used to Generate Interrupts and Various Delays 0x6C 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP1 24 1 read-write TCMPVAL Timer Comparator 1 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 1 is disabled 0x00000000 TXEOF Comparator 1 and timer are started at TX end of frame 0x00000001 TXC Comparator 1 and timer are started at TX Complete 0x00000002 RXACT Comparator 1 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 1 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 1 20 3 read-write TCMP1 Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event 0x00000000 TXST Comparator 1 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 1 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 1 is disabled on RX going Inactive 0x00000003 TIMECMP2 Used to Generate Interrupts and Various Delays 0x70 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP2 24 1 read-write TCMPVAL Timer Comparator 2 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 2 is disabled 0x00000000 TXEOF Comparator 2 and timer are started at TX end of frame 0x00000001 TXC Comparator 2 and timer are started at TX Complete 0x00000002 RXACT Comparator 2 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 2 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 2 20 3 read-write TCMP2 Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event 0x00000000 TXST Comparator 2 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 2 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 2 is disabled on RX going Inactive 0x00000003 TIMING Timing Register 0x60 32 read-write n 0x0 0x0 CSHOLD Chip Select Hold 28 3 read-write ZERO Disable CS being asserted after the end of transmission 0x00000000 ONE CS is asserted for 1 baud-times after the end of transmission 0x00000001 TWO CS is asserted for 2 baud-times after the end of transmission 0x00000002 THREE CS is asserted for 3 baud-times after the end of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times after the end of transmission 0x00000004 TCMP0 CS is asserted after the end of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted after the end of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted after the end of transmission for TCMPVAL2 baud-times 0x00000007 CSSETUP Chip Select Setup 20 3 read-write ZERO CS is not asserted before start of transmission 0x00000000 ONE CS is asserted for 1 baud-times before start of transmission 0x00000001 TWO CS is asserted for 2 baud-times before start of transmission 0x00000002 THREE CS is asserted for 3 baud-times before start of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times before start of transmission 0x00000004 TCMP0 CS is asserted before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted before the start of transmission for TCMPVAL2 baud-times 0x00000007 ICS Inter-character Spacing 24 3 read-write ZERO There is no space between charcters 0x00000000 ONE Create a space of 1 baud-times before start of transmission 0x00000001 TWO Create a space of 2 baud-times before start of transmission 0x00000002 THREE Create a space of 3 baud-times before start of transmission 0x00000003 SEVEN Create a space of 7 baud-times before start of transmission 0x00000004 TCMP0 Create a space of before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 Create a space of before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 Create a space of before the start of transmission for TCMPVAL2 baud-times 0x00000007 TXDELAY TX Frame Start Delay 16 3 read-write DISABLE Disable - TXDELAY in USARTn_CTRL can be used for legacy 0x00000000 ONE Start of transmission is delayed for 1 baud-times 0x00000001 TWO Start of transmission is delayed for 2 baud-times 0x00000002 THREE Start of transmission is delayed for 3 baud-times 0x00000003 SEVEN Start of transmission is delayed for 7 baud-times 0x00000004 TCMP0 Start of transmission is delayed for TCMPVAL0 baud-times 0x00000005 TCMP1 Start of transmission is delayed for TCMPVAL1 baud-times 0x00000006 TCMP2 Start of transmission is delayed for TCMPVAL2 baud-times 0x00000007 TRIGCTRL USART Trigger Control Register 0x8 32 read-write n 0x0 0x0 AUTOTXTEN AUTOTX Trigger Enable 6 1 read-write RXATX0EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times 10 1 read-write RXATX1EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times 11 1 read-write RXATX2EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times 12 1 read-write RXTEN Receive Trigger Enable 4 1 read-write TSEL Trigger PRS Channel Select 16 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 TXARX0EN Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL 7 1 read-write TXARX1EN Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL 8 1 read-write TXARX2EN Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL 9 1 read-write TXTEN Transmit Trigger Enable 5 1 read-write TXDATA TX Buffer Data Register 0x34 32 read-write n 0x0 0x0 TXDATA TX Data 0 8 read-write TXDATAX TX Buffer Data Extended Register 0x30 32 read-write n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 read-write TXBREAK Transmit Data as Break 13 1 read-write TXDATAX TX Data 0 9 read-write TXDISAT Clear TXEN After Transmission 14 1 read-write TXTRIAT Set TXTRI After Transmission 12 1 read-write UBRXAT Unblock RX After Transmission 11 1 read-write TXDOUBLE TX Buffer Double Data Register 0x3C 32 read-write n 0x0 0x0 TXDATA0 TX Data 0 8 read-write TXDATA1 TX Data 8 8 read-write TXDOUBLEX TX Buffer Double Data Extended Register 0x38 32 read-write n 0x0 0x0 RXENAT0 Enable RX After Transmission 15 1 read-write RXENAT1 Enable RX After Transmission 31 1 read-write TXBREAK0 Transmit Data as Break 13 1 read-write TXBREAK1 Transmit Data as Break 29 1 read-write TXDATA0 TX Data 0 9 read-write TXDATA1 TX Data 16 9 read-write TXDISAT0 Clear TXEN After Transmission 14 1 read-write TXDISAT1 Clear TXEN After Transmission 30 1 read-write TXTRIAT0 Set TXTRI After Transmission 12 1 read-write TXTRIAT1 Set TXTRI After Transmission 28 1 read-write UBRXAT0 Unblock RX After Transmission 11 1 read-write UBRXAT1 Unblock RX After Transmission 27 1 read-write USART5 USART5 USART5 0x0 0x0 0x400 registers n USART5_RX 50 USART5_TX 51 CLKDIV Clock Control Register 0x14 32 read-write n 0x0 0x0 AUTOBAUDEN AUTOBAUD Detection Enable 31 1 read-write DIV Fractional Clock Divider 3 20 read-write CMD Command Register 0xC 32 write-only n 0x0 0x0 CLEARRX Clear RX 11 1 write-only CLEARTX Clear TX 10 1 write-only MASTERDIS Master Disable 5 1 write-only MASTEREN Master Enable 4 1 write-only RXBLOCKDIS Receiver Block Disable 7 1 write-only RXBLOCKEN Receiver Block Enable 6 1 write-only RXDIS Receiver Disable 1 1 write-only RXEN Receiver Enable 0 1 write-only TXDIS Transmitter Disable 3 1 write-only TXEN Transmitter Enable 2 1 write-only TXTRIDIS Transmitter Tristate Disable 9 1 write-only TXTRIEN Transmitter Tristate Enable 8 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 AUTOCS Automatic Chip Select 16 1 read-write AUTOTRI Automatic TX Tristate 17 1 read-write AUTOTX Always Transmit When RX Not Full 29 1 read-write BIT8DV Bit 8 Default Value 21 1 read-write BYTESWAP Byteswap in Double Accesses 28 1 read-write CCEN Collision Check Enable 2 1 read-write CLKPHA Clock Edge for Setup/Sample 9 1 read-write CLKPOL Clock Polarity 8 1 read-write CSINV Chip Select Invert 15 1 read-write CSMA Action on Slave-Select in Master Mode 11 1 read-write ERRSDMA Halt DMA on Error 22 1 read-write ERRSRX Disable RX on Error 23 1 read-write ERRSTX Disable TX on Error 24 1 read-write LOOPBK Loopback Enable 1 1 read-write MPAB Multi-Processor Address-Bit 4 1 read-write MPM Multi-Processor Mode 3 1 read-write MSBF Most Significant Bit First 10 1 read-write MVDIS Majority Vote Disable 30 1 read-write OVS Oversampling 5 2 read-write X16 Regular UART mode with 16X oversampling in asynchronous mode 0x00000000 X8 Double speed with 8X oversampling in asynchronous mode 0x00000001 X6 6X oversampling in asynchronous mode 0x00000002 X4 Quadruple speed with 4X oversampling in asynchronous mode 0x00000003 RXINV Receiver Input Invert 13 1 read-write SCMODE SmartCard Mode 18 1 read-write SCRETRANS SmartCard Retransmit 19 1 read-write SKIPPERRF Skip Parity Error Frames 20 1 read-write SMSDELAY Synchronous Master Sample Delay 31 1 read-write SSSEARLY Synchronous Slave Setup Early 25 1 read-write SYNC USART Synchronous Mode 0 1 read-write TXBIL TX Buffer Interrupt Level 12 1 read-write TXINV Transmitter Output Invert 14 1 read-write CTRLX Control Register Extended 0x64 32 read-write n 0x0 0x0 CTSEN CTS Function Enabled 2 1 read-write CTSINV CTS Pin Inversion 1 1 read-write DBGHALT Debug Halt 0 1 read-write RTSINV RTS Pin Inversion 3 1 read-write FRAME USART Frame Format Register 0x4 32 read-write n 0x0 0x0 DATABITS Data-Bit Mode 0 4 read-write FOUR Each frame contains 4 data bits 0x00000001 FIVE Each frame contains 5 data bits 0x00000002 SIX Each frame contains 6 data bits 0x00000003 SEVEN Each frame contains 7 data bits 0x00000004 EIGHT Each frame contains 8 data bits 0x00000005 NINE Each frame contains 9 data bits 0x00000006 TEN Each frame contains 10 data bits 0x00000007 ELEVEN Each frame contains 11 data bits 0x00000008 TWELVE Each frame contains 12 data bits 0x00000009 THIRTEEN Each frame contains 13 data bits 0x0000000A FOURTEEN Each frame contains 14 data bits 0x0000000B FIFTEEN Each frame contains 15 data bits 0x0000000C SIXTEEN Each frame contains 16 data bits 0x0000000D PARITY Parity-Bit Mode 8 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 12 2 read-write HALF The transmitter generates a half stop bit. Stop-bits are not verified by receiver 0x00000000 ONE One stop bit is generated and verified 0x00000001 ONEANDAHALF The transmitter generates one and a half stop bit. The receiver verifies the first stop bit 0x00000002 TWO The transmitter generates two stop bits. The receiver checks the first stop-bit only 0x00000003 I2SCTRL I2S Control Register 0x5C 32 read-write n 0x0 0x0 DELAY Delay on I2S Data 4 1 read-write DMASPLIT Separate DMA Request for Left/Right Data 3 1 read-write EN Enable I2S Mode 0 1 read-write FORMAT I2S Word Format 8 3 read-write W32D32 32-bit word, 32-bit data 0x00000000 W32D24M 32-bit word, 32-bit data with 8 lsb masked 0x00000001 W32D24 32-bit word, 24-bit data 0x00000002 W32D16 32-bit word, 16-bit data 0x00000003 W32D8 32-bit word, 8-bit data 0x00000004 W16D16 16-bit word, 16-bit data 0x00000005 W16D8 16-bit word, 8-bit data 0x00000006 W8D8 8-bit word, 8-bit data 0x00000007 JUSTIFY Justification of I2S Data 2 1 read-write MONO Stero or Mono 1 1 read-write IEN Interrupt Enable Register 0x4C 32 read-write n 0x0 0x0 CCF CCF Interrupt Enable 12 1 read-write FERR FERR Interrupt Enable 9 1 read-write MPAF MPAF Interrupt Enable 10 1 read-write PERR PERR Interrupt Enable 8 1 read-write RXDATAV RXDATAV Interrupt Enable 2 1 read-write RXFULL RXFULL Interrupt Enable 3 1 read-write RXOF RXOF Interrupt Enable 4 1 read-write RXUF RXUF Interrupt Enable 5 1 read-write SSM SSM Interrupt Enable 11 1 read-write TCMP0 TCMP0 Interrupt Enable 14 1 read-write TCMP1 TCMP1 Interrupt Enable 15 1 read-write TCMP2 TCMP2 Interrupt Enable 16 1 read-write TXBL TXBL Interrupt Enable 1 1 read-write TXC TXC Interrupt Enable 0 1 read-write TXIDLE TXIDLE Interrupt Enable 13 1 read-write TXOF TXOF Interrupt Enable 6 1 read-write TXUF TXUF Interrupt Enable 7 1 read-write IF Interrupt Flag Register 0x40 32 read-only n 0x0 0x0 CCF Collision Check Fail Interrupt Flag 12 1 read-only FERR Framing Error Interrupt Flag 9 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 10 1 read-only PERR Parity Error Interrupt Flag 8 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXFULL RX Buffer Full Interrupt Flag 3 1 read-only RXOF RX Overflow Interrupt Flag 4 1 read-only RXUF RX Underflow Interrupt Flag 5 1 read-only SSM Slave-Select in Master Mode Interrupt Flag 11 1 read-only TCMP0 Timer Comparator 0 Interrupt Flag 14 1 read-only TCMP1 Timer Comparator 1 Interrupt Flag 15 1 read-only TCMP2 Timer Comparator 2 Interrupt Flag 16 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only TXC TX Complete Interrupt Flag 0 1 read-only TXIDLE TX Idle Interrupt Flag 13 1 read-only TXOF TX Overflow Interrupt Flag 6 1 read-only TXUF TX Underflow Interrupt Flag 7 1 read-only IFC Interrupt Flag Clear Register 0x48 32 write-only n 0x0 0x0 CCF Clear CCF Interrupt Flag 12 1 write-only FERR Clear FERR Interrupt Flag 9 1 write-only MPAF Clear MPAF Interrupt Flag 10 1 write-only PERR Clear PERR Interrupt Flag 8 1 write-only RXFULL Clear RXFULL Interrupt Flag 3 1 write-only RXOF Clear RXOF Interrupt Flag 4 1 write-only RXUF Clear RXUF Interrupt Flag 5 1 write-only SSM Clear SSM Interrupt Flag 11 1 write-only TCMP0 Clear TCMP0 Interrupt Flag 14 1 write-only TCMP1 Clear TCMP1 Interrupt Flag 15 1 write-only TCMP2 Clear TCMP2 Interrupt Flag 16 1 write-only TXC Clear TXC Interrupt Flag 0 1 write-only TXIDLE Clear TXIDLE Interrupt Flag 13 1 write-only TXOF Clear TXOF Interrupt Flag 6 1 write-only TXUF Clear TXUF Interrupt Flag 7 1 write-only IFS Interrupt Flag Set Register 0x44 32 write-only n 0x0 0x0 CCF Set CCF Interrupt Flag 12 1 write-only FERR Set FERR Interrupt Flag 9 1 write-only MPAF Set MPAF Interrupt Flag 10 1 write-only PERR Set PERR Interrupt Flag 8 1 write-only RXFULL Set RXFULL Interrupt Flag 3 1 write-only RXOF Set RXOF Interrupt Flag 4 1 write-only RXUF Set RXUF Interrupt Flag 5 1 write-only SSM Set SSM Interrupt Flag 11 1 write-only TCMP0 Set TCMP0 Interrupt Flag 14 1 write-only TCMP1 Set TCMP1 Interrupt Flag 15 1 write-only TCMP2 Set TCMP2 Interrupt Flag 16 1 write-only TXC Set TXC Interrupt Flag 0 1 write-only TXIDLE Set TXIDLE Interrupt Flag 13 1 write-only TXOF Set TXOF Interrupt Flag 6 1 write-only TXUF Set TXUF Interrupt Flag 7 1 write-only INPUT USART Input Register 0x58 32 read-write n 0x0 0x0 CLKPRS PRS CLK Enable 15 1 read-write CLKPRSSEL CLK PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 RXPRS PRS RX Enable 7 1 read-write RXPRSSEL RX PRS Channel Select 0 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRCTRL IrDA Control Register 0x50 32 read-write n 0x0 0x0 IREN Enable IrDA Module 0 1 read-write IRFILT IrDA RX Filter 3 1 read-write IRPRSEN IrDA PRS Channel Enable 7 1 read-write IRPRSSEL IrDA PRS Channel Select 8 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 IRPW IrDA TX Pulse Width 1 2 read-write ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 0x00000000 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 0x00000001 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 0x00000002 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 0x00000003 ROUTELOC0 I/O Routing Location Register 0x78 32 read-write n 0x0 0x0 CLKLOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 CSLOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RXLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 TXLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTELOC1 I/O Routing Location Register 0x7C 32 read-write n 0x0 0x0 CTSLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 RTSLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 ROUTEPEN I/O Routing Pin Enable Register 0x74 32 read-write n 0x0 0x0 CLKPEN CLK Pin Enable 3 1 read-write CSPEN CS Pin Enable 2 1 read-write CTSPEN CTS Pin Enable 4 1 read-write RTSPEN RTS Pin Enable 5 1 read-write RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write RXDATA RX Buffer Data Register 0x1C 32 read-only n 0x0 0x0 modifyExternal RXDATA RX Data 0 8 read-only RXDATAX RX Buffer Data Extended Register 0x18 32 read-only n 0x0 0x0 modifyExternal FERR Data Framing Error 15 1 read-only PERR Data Parity Error 14 1 read-only RXDATA RX Data 0 9 read-only RXDATAXP RX Buffer Data Extended Peek Register 0x28 32 read-only n 0x0 0x0 FERRP Data Framing Error Peek 15 1 read-only PERRP Data Parity Error Peek 14 1 read-only RXDATAP RX Data Peek 0 9 read-only RXDOUBLE RX FIFO Double Data Register 0x24 32 read-only n 0x0 0x0 modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDOUBLEX RX Buffer Double Data Extended Register 0x20 32 read-only n 0x0 0x0 modifyExternal FERR0 Data Framing Error 0 15 1 read-only FERR1 Data Framing Error 1 31 1 read-only PERR0 Data Parity Error 0 14 1 read-only PERR1 Data Parity Error 1 30 1 read-only RXDATA0 RX Data 0 0 9 read-only RXDATA1 RX Data 1 16 9 read-only RXDOUBLEXP RX Buffer Double Data Extended Peek Register 0x2C 32 read-only n 0x0 0x0 FERRP0 Data Framing Error 0 Peek 15 1 read-only FERRP1 Data Framing Error 1 Peek 31 1 read-only PERRP0 Data Parity Error 0 Peek 14 1 read-only PERRP1 Data Parity Error 1 Peek 30 1 read-only RXDATAP0 RX Data 0 Peek 0 9 read-only RXDATAP1 RX Data 1 Peek 16 9 read-only STATUS USART Status Register 0x10 32 read-only n 0x0 0x0 MASTER SPI Master Mode 2 1 read-only RXBLOCK Block Incoming Data 3 1 read-only RXDATAV RX Data Valid 7 1 read-only RXDATAVRIGHT RX Data Right 11 1 read-only RXENS Receiver Enable Status 0 1 read-only RXFULL RX FIFO Full 8 1 read-only RXFULLRIGHT RX Full of Right Data 12 1 read-only TIMERRESTARTED The USART Timer Restarted Itself 14 1 read-only TXBDRIGHT TX Buffer Expects Double Right Data 9 1 read-only TXBL TX Buffer Level 6 1 read-only TXBSRIGHT TX Buffer Expects Single Right Data 10 1 read-only TXBUFCNT TX Buffer Count 16 2 read-only TXC TX Complete 5 1 read-only TXENS Transmitter Enable Status 1 1 read-only TXIDLE TX Idle 13 1 read-only TXTRI Transmitter Tristated 4 1 read-only TIMECMP0 Used to Generate Interrupts and Various Delays 0x68 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP0 24 1 read-write TCMPVAL Timer Comparator 0 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 0 is disabled 0x00000000 TXEOF Comparator 0 and timer are started at TX end of frame 0x00000001 TXC Comparator 0 and timer are started at TX Complete 0x00000002 RXACT Comparator 0 and timer are started at RX going Active (default: low) 0x00000003 RXEOF Comparator 0 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 0 20 3 read-write TCMP0 Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event 0x00000000 TXST Comparator 0 is disabled at the start of transmission 0x00000001 RXACT Comparator 0 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 0 is disabled on RX going Inactive 0x00000003 TIMECMP1 Used to Generate Interrupts and Various Delays 0x6C 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP1 24 1 read-write TCMPVAL Timer Comparator 1 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 1 is disabled 0x00000000 TXEOF Comparator 1 and timer are started at TX end of frame 0x00000001 TXC Comparator 1 and timer are started at TX Complete 0x00000002 RXACT Comparator 1 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 1 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 1 20 3 read-write TCMP1 Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event 0x00000000 TXST Comparator 1 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 1 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 1 is disabled on RX going Inactive 0x00000003 TIMECMP2 Used to Generate Interrupts and Various Delays 0x70 32 read-write n 0x0 0x0 RESTARTEN Restart Timer on TCMP2 24 1 read-write TCMPVAL Timer Comparator 2 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 2 is disabled 0x00000000 TXEOF Comparator 2 and timer are started at TX end of frame 0x00000001 TXC Comparator 2 and timer are started at TX Complete 0x00000002 RXACT Comparator 2 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 2 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 2 20 3 read-write TCMP2 Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event 0x00000000 TXST Comparator 2 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 2 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 2 is disabled on RX going Inactive 0x00000003 TIMING Timing Register 0x60 32 read-write n 0x0 0x0 CSHOLD Chip Select Hold 28 3 read-write ZERO Disable CS being asserted after the end of transmission 0x00000000 ONE CS is asserted for 1 baud-times after the end of transmission 0x00000001 TWO CS is asserted for 2 baud-times after the end of transmission 0x00000002 THREE CS is asserted for 3 baud-times after the end of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times after the end of transmission 0x00000004 TCMP0 CS is asserted after the end of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted after the end of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted after the end of transmission for TCMPVAL2 baud-times 0x00000007 CSSETUP Chip Select Setup 20 3 read-write ZERO CS is not asserted before start of transmission 0x00000000 ONE CS is asserted for 1 baud-times before start of transmission 0x00000001 TWO CS is asserted for 2 baud-times before start of transmission 0x00000002 THREE CS is asserted for 3 baud-times before start of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times before start of transmission 0x00000004 TCMP0 CS is asserted before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted before the start of transmission for TCMPVAL2 baud-times 0x00000007 ICS Inter-character Spacing 24 3 read-write ZERO There is no space between charcters 0x00000000 ONE Create a space of 1 baud-times before start of transmission 0x00000001 TWO Create a space of 2 baud-times before start of transmission 0x00000002 THREE Create a space of 3 baud-times before start of transmission 0x00000003 SEVEN Create a space of 7 baud-times before start of transmission 0x00000004 TCMP0 Create a space of before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 Create a space of before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 Create a space of before the start of transmission for TCMPVAL2 baud-times 0x00000007 TXDELAY TX Frame Start Delay 16 3 read-write DISABLE Disable - TXDELAY in USARTn_CTRL can be used for legacy 0x00000000 ONE Start of transmission is delayed for 1 baud-times 0x00000001 TWO Start of transmission is delayed for 2 baud-times 0x00000002 THREE Start of transmission is delayed for 3 baud-times 0x00000003 SEVEN Start of transmission is delayed for 7 baud-times 0x00000004 TCMP0 Start of transmission is delayed for TCMPVAL0 baud-times 0x00000005 TCMP1 Start of transmission is delayed for TCMPVAL1 baud-times 0x00000006 TCMP2 Start of transmission is delayed for TCMPVAL2 baud-times 0x00000007 TRIGCTRL USART Trigger Control Register 0x8 32 read-write n 0x0 0x0 AUTOTXTEN AUTOTX Trigger Enable 6 1 read-write RXATX0EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times 10 1 read-write RXATX1EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times 11 1 read-write RXATX2EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times 12 1 read-write RXTEN Receive Trigger Enable 4 1 read-write TSEL Trigger PRS Channel Select 16 5 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PRSCH12 PRS Channel 12 selected 0x0000000C PRSCH13 PRS Channel 13 selected 0x0000000D PRSCH14 PRS Channel 14 selected 0x0000000E PRSCH15 PRS Channel 15 selected 0x0000000F PRSCH16 PRS Channel 16 selected 0x00000010 PRSCH17 PRS Channel 17 selected 0x00000011 PRSCH18 PRS Channel 18 selected 0x00000012 PRSCH19 PRS Channel 19 selected 0x00000013 PRSCH20 PRS Channel 20 selected 0x00000014 PRSCH21 PRS Channel 21 selected 0x00000015 PRSCH22 PRS Channel 22 selected 0x00000016 PRSCH23 PRS Channel 23 selected 0x00000017 TXARX0EN Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL 7 1 read-write TXARX1EN Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL 8 1 read-write TXARX2EN Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL 9 1 read-write TXTEN Transmit Trigger Enable 5 1 read-write TXDATA TX Buffer Data Register 0x34 32 read-write n 0x0 0x0 TXDATA TX Data 0 8 read-write TXDATAX TX Buffer Data Extended Register 0x30 32 read-write n 0x0 0x0 RXENAT Enable RX After Transmission 15 1 read-write TXBREAK Transmit Data as Break 13 1 read-write TXDATAX TX Data 0 9 read-write TXDISAT Clear TXEN After Transmission 14 1 read-write TXTRIAT Set TXTRI After Transmission 12 1 read-write UBRXAT Unblock RX After Transmission 11 1 read-write TXDOUBLE TX Buffer Double Data Register 0x3C 32 read-write n 0x0 0x0 TXDATA0 TX Data 0 8 read-write TXDATA1 TX Data 8 8 read-write TXDOUBLEX TX Buffer Double Data Extended Register 0x38 32 read-write n 0x0 0x0 RXENAT0 Enable RX After Transmission 15 1 read-write RXENAT1 Enable RX After Transmission 31 1 read-write TXBREAK0 Transmit Data as Break 13 1 read-write TXBREAK1 Transmit Data as Break 29 1 read-write TXDATA0 TX Data 0 9 read-write TXDATA1 TX Data 16 9 read-write TXDISAT0 Clear TXEN After Transmission 14 1 read-write TXDISAT1 Clear TXEN After Transmission 30 1 read-write TXTRIAT0 Set TXTRI After Transmission 12 1 read-write TXTRIAT1 Set TXTRI After Transmission 28 1 read-write UBRXAT0 Unblock RX After Transmission 11 1 read-write UBRXAT1 Unblock RX After Transmission 27 1 read-write USB USB USB 0x0 0x0 0x400 registers n 0xDE000 0x1000 registers n USB 62 CDCONF Charger Detect Configuration Register 0x2C 32 read-write n 0x0 0x0 DCDTOCONF DCD Timeout (TDCD_TIMEOUT) Configuration 0 10 read-write CMD Command Register 0x30 32 write-only n 0x0 0x0 STARTCD Start Charger Detection Enabled 0 1 write-only STOPCD Start Charger Detection in Progress 1 1 write-only CTRL System Control Register 0x0 32 read-write n 0x0 0x0 DCDEN Data Contact Detection Enable 28 2 read-write DISABLED DCD is disabled. 0x00000000 TIMEOUT Only DCD timeout will be initiated. 0x00000002 ENABLED Full DCD operation (physical contact and timeout) will be initiated. 0x00000003 IDCDEN ID Pull-up Enable 12 1 read-write LEMIDLEEN Low Energy Mode on Bus Idle Enable 9 1 read-write LEMOSCCTRL Low Energy Mode Oscillator Control 4 2 read-write NONE Low Energy Mode has no effect on neither USBC or USHFRCO. 0x00000000 GATE The USBC clock is gated when Low Energy Mode is active. 0x00000001 LEMPHYCTRL Low Energy Mode USB PHY Control 7 1 read-write OTGCLKCDIS OTG CLKC Disable 25 1 read-write OTGIDINDIS OTG ID Input Disable 26 1 read-write OTGPHYCTRLDIS OTG Control Signals to PHY Disable 27 1 read-write PDEN Primary Detection Enable 30 1 read-write SDEN Secondary Detection Enable 31 1 read-write SELFPOWERED PHY Power 3 1 read-write VBUSENAP VBUSEN Active Polarity 0 1 read-write DAINT Device All Endpoints Interrupt Register 0xDE818 32 read-only n 0x0 0x0 INEPINT0 IN Endpoint 0 Interrupt Bit 0 1 read-only INEPINT1 IN Endpoint 1 Interrupt Bit 1 1 read-only INEPINT2 IN Endpoint 2 Interrupt Bit 2 1 read-only INEPINT3 IN Endpoint 3 Interrupt Bit 3 1 read-only INEPINT4 IN Endpoint 4 Interrupt Bit 4 1 read-only INEPINT5 IN Endpoint 5 Interrupt Bit 5 1 read-only INEPINT6 IN Endpoint 6 Interrupt Bit 6 1 read-only OUTEPINT0 OUT Endpoint 0 Interrupt Bit 16 1 read-only OUTEPINT1 OUT Endpoint 1 Interrupt Bit 17 1 read-only OUTEPINT2 OUT Endpoint 2 Interrupt Bit 18 1 read-only OUTEPINT3 OUT Endpoint 3 Interrupt Bit 19 1 read-only OUTEPINT4 OUT Endpoint 4 Interrupt Bit 20 1 read-only OUTEPINT5 OUT Endpoint 5 Interrupt Bit 21 1 read-only OUTEPINT6 OUT Endpoint 6 Interrupt Bit 22 1 read-only DAINTMSK Device All Endpoints Interrupt Mask Register 0xDE81C 32 read-write n 0x0 0x0 INEPMSK0 IN Endpoint 0 Interrupt mask Bit 0 1 read-write INEPMSK1 IN Endpoint 1 Interrupt mask Bit 1 1 read-write INEPMSK2 IN Endpoint 2 Interrupt mask Bit 2 1 read-write INEPMSK3 IN Endpoint 3 Interrupt mask Bit 3 1 read-write INEPMSK4 IN Endpoint 4 Interrupt mask Bit 4 1 read-write INEPMSK5 IN Endpoint 5 Interrupt mask Bit 5 1 read-write INEPMSK6 IN Endpoint 6 Interrupt mask Bit 6 1 read-write OUTEPMSK0 OUT Endpoint 0 Interrupt mask Bit 16 1 read-write OUTEPMSK1 OUT Endpoint 1 Interrupt mask Bit 17 1 read-write OUTEPMSK2 OUT Endpoint 2 Interrupt mask Bit 18 1 read-write OUTEPMSK3 OUT Endpoint 3 Interrupt mask Bit 19 1 read-write OUTEPMSK4 OUT Endpoint 4 Interrupt mask Bit 20 1 read-write OUTEPMSK5 OUT Endpoint 5 Interrupt mask Bit 21 1 read-write OUTEPMSK6 OUT Endpoint 6 Interrupt mask Bit 22 1 read-write DATTRIM1 Data TRIM 1 Values for USB DP and DM 0x34 32 read-write n 0x0 0x0 DLYPULLUPFS Trim for Rising Crossover Voltage in FS 8 2 read-write ENDLYPULLUP Enables Delay of Pull in TX Mode for Both FS and LS 7 1 read-write ROUT Trim for DP and DM Output Impedance for Both FS and LS 0 6 read-write TFDMFS Trim for DM Fall Time in FS 12 2 read-write TFDPFS Trim for DP Fall Time in FS 16 2 read-write TRDMFS Trim for DM Rise Time in FS 14 2 read-write TRDPFS Trim for DP Rise Time in FS 18 2 read-write VCRSFS Trim for Falling Crossover Voltage in FS 10 2 read-write DCFG Device Configuration Register 0xDE800 32 read-write n 0x0 0x0 DEVADDR Device Address 4 7 read-write DEVSPD Device Speed 0 2 read-write LS Low speed (PHY clock is 6 MHz). If you select 6 MHz LS mode, you must do a soft reset. 0x00000002 FS Full speed (PHY clock is 48 MHz). 0x00000003 ENA32KHZSUSP Enable 32 kHz Suspend Mode 3 1 read-write ENDEVOUTNAK Enable Device OUT NAK 13 1 read-write ERRATICINTMSK 15 1 read-write NZSTSOUTHSHK Non-Zero-Length Status OUT Handshake 2 1 read-write PERFRINT Periodic Frame Interval 11 2 read-write 80PCNT 80% of the frame interval. 0x00000000 85PCNT 85% of the frame interval. 0x00000001 90PCNT 90% of the frame interval. 0x00000002 95PCNT 95% of the frame interval. 0x00000003 RESVALID Resume Validation Period 26 6 read-write XCVRDLY 14 1 read-write DCTL Device Control Register 0xDE804 32 read-write n 0x0 0x0 CGNPINNAK Clear Global Non-periodic IN NAK 8 1 write-only CGOUTNAK Clear Global OUT NAK 10 1 write-only GNPINNAKSTS Global Non-periodic IN NAK Status 2 1 read-only GOUTNAKSTS Global OUT NAK Status 3 1 read-only IGNRFRMNUM Ignore Frame number For Isochronous End points 15 1 read-write NAKONBBLE NAK on Babble Error 16 1 read-write PWRONPRGDONE Power-On Programming Done 11 1 read-write RMTWKUPSIG Remote Wakeup Signaling 0 1 read-write SFTDISCON Soft Disconnect 1 1 read-write SGNPINNAK Set Global Non-periodic IN NAK 7 1 write-only SGOUTNAK Set Global OUT NAK 9 1 write-only TSTCTL Test Control 4 3 read-write DISABLE Test mode disabled. 0x00000000 J Test_J mode. 0x00000001 K Test_K mode. 0x00000002 SE0NAK Test_SE0_NAK mode. 0x00000003 PACKET Test_Packet mode. 0x00000004 FORCE Test_Force_Enable. 0x00000005 DIEP0CTL Device Control IN Endpoint 0 Control Register 0xDE900 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only EPDIS Endpoint Disable 30 1 read-write EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-only MPS Maximum Packet Size 0 2 read-write 64B 64 bytes. 0x00000000 32B 32 bytes. 0x00000001 16B 16 bytes. 0x00000002 8B 8 bytes. 0x00000003 NAKSTS NAK Status 17 1 read-only SNAK Set NAK 27 1 write-only STALL Handshake 21 1 read-write TXFNUM TxFIFO Number 22 4 read-write USBACTEP USB Active Endpoint 15 1 read-only DIEP0DMAADDR Device IN Endpoint 0 DMA Address Register 0xDE914 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DIEP0INT Device IN Endpoint 0 Interrupt Register 0xDE908 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BBLEERR Babble Interrupt 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write INEPNAKEFF IN Endpoint NAK Effective 6 1 read-write INTKNEPMIS IN Token Received with EP Mismatch 5 1 read-write INTKNTXFEMP IN Token Received When TxFIFO is Empty 4 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write TIMEOUT Timeout Condition 3 1 read-write TXFEMP Transmit FIFO Empty 7 1 read-only TXFIFOUNDRN Fifo Underrun 8 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DIEP0TSIZ Device IN Endpoint 0 Transfer Size Register 0xDE910 32 read-write n 0x0 0x0 PKTCNT Packet Count 19 2 read-write XFERSIZE Transfer Size 0 7 read-write DIEP0TXFSTS Device IN Endpoint Transmit FIFO Status Register 0 0xDE918 32 read-only n 0x0 0x0 SPCAVAIL IN Endpoint TxFIFO Space Avail 0 16 read-only DIEP0_CTL Device Control IN Endpoint x+1 Control Register 0xDE920 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only DPIDEOF Endpoint Data PID / Even or Odd Frame 16 1 read-only EPDIS Endpoint Disable 30 1 read-write EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control Endpoint. 0x00000000 ISO Isochronous Endpoint. 0x00000001 BULK Bulk Endpoint. 0x00000002 INT Interrupt Endpoint. 0x00000003 MPS Maximum Packet Size 0 11 read-write NAKSTS NAK Status 17 1 read-only SETD0PIDEF Set DATA0 PID / Even Frame 28 1 write-only SETD1PIDOF Set DATA1 PID / Odd Frame 29 1 write-only SNAK Set NAK 27 1 write-only STALL Handshake 21 1 read-write TXFNUM TxFIFO Number 22 4 read-write USBACTEP USB Active Endpoint 15 1 read-write DIEP0_DMAADDR Device IN Endpoint x+1 DMA Address Register 0xDE934 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DIEP0_DTXFSTS Device IN Endpoint Transmit FIFO Status Register 1 0xDE938 32 read-only n 0x0 0x0 SPCAVAIL IN Endpoint TxFIFO Space Avail 0 16 read-only DIEP0_INT Device IN Endpoint x+1 Interrupt Register 0xDE928 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BBLEERR Babble Interrupt 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write INEPNAKEFF IN Endpoint NAK Effective 6 1 read-write INTKNEPMIS IN Token Received with EP Mismatch 5 1 read-write INTKNTXFEMP IN Token Received When TxFIFO is Empty 4 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write TIMEOUT Timeout Condition 3 1 read-write TXFEMP Transmit FIFO Empty 7 1 read-only TXFIFOUNDRN Fifo Underrun 8 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DIEP0_TSIZ Device IN Endpoint x+1 Transfer Size Register 0xDE930 32 read-write n 0x0 0x0 MC Multi Count 29 2 read-write PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write DIEP1_CTL Device Control IN Endpoint x+1 Control Register 0xDE940 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only DPIDEOF Endpoint Data PID / Even or Odd Frame 16 1 read-only EPDIS Endpoint Disable 30 1 read-write EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control Endpoint. 0x00000000 ISO Isochronous Endpoint. 0x00000001 BULK Bulk Endpoint. 0x00000002 INT Interrupt Endpoint. 0x00000003 MPS Maximum Packet Size 0 11 read-write NAKSTS NAK Status 17 1 read-only SETD0PIDEF Set DATA0 PID / Even Frame 28 1 write-only SETD1PIDOF Set DATA1 PID / Odd Frame 29 1 write-only SNAK Set NAK 27 1 write-only STALL Handshake 21 1 read-write TXFNUM TxFIFO Number 22 4 read-write USBACTEP USB Active Endpoint 15 1 read-write DIEP1_DMAADDR Device IN Endpoint x+1 DMA Address Register 0xDE954 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DIEP1_DTXFSTS Device IN Endpoint Transmit FIFO Status Register 1 0xDE958 32 read-only n 0x0 0x0 SPCAVAIL IN Endpoint TxFIFO Space Avail 0 16 read-only DIEP1_INT Device IN Endpoint x+1 Interrupt Register 0xDE948 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BBLEERR Babble Interrupt 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write INEPNAKEFF IN Endpoint NAK Effective 6 1 read-write INTKNEPMIS IN Token Received with EP Mismatch 5 1 read-write INTKNTXFEMP IN Token Received When TxFIFO is Empty 4 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write TIMEOUT Timeout Condition 3 1 read-write TXFEMP Transmit FIFO Empty 7 1 read-only TXFIFOUNDRN Fifo Underrun 8 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DIEP1_TSIZ Device IN Endpoint x+1 Transfer Size Register 0xDE950 32 read-write n 0x0 0x0 MC Multi Count 29 2 read-write PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write DIEP2_CTL Device Control IN Endpoint x+1 Control Register 0xDE960 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only DPIDEOF Endpoint Data PID / Even or Odd Frame 16 1 read-only EPDIS Endpoint Disable 30 1 read-write EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control Endpoint. 0x00000000 ISO Isochronous Endpoint. 0x00000001 BULK Bulk Endpoint. 0x00000002 INT Interrupt Endpoint. 0x00000003 MPS Maximum Packet Size 0 11 read-write NAKSTS NAK Status 17 1 read-only SETD0PIDEF Set DATA0 PID / Even Frame 28 1 write-only SETD1PIDOF Set DATA1 PID / Odd Frame 29 1 write-only SNAK Set NAK 27 1 write-only STALL Handshake 21 1 read-write TXFNUM TxFIFO Number 22 4 read-write USBACTEP USB Active Endpoint 15 1 read-write DIEP2_DMAADDR Device IN Endpoint x+1 DMA Address Register 0xDE974 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DIEP2_DTXFSTS Device IN Endpoint Transmit FIFO Status Register 1 0xDE978 32 read-only n 0x0 0x0 SPCAVAIL IN Endpoint TxFIFO Space Avail 0 16 read-only DIEP2_INT Device IN Endpoint x+1 Interrupt Register 0xDE968 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BBLEERR Babble Interrupt 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write INEPNAKEFF IN Endpoint NAK Effective 6 1 read-write INTKNEPMIS IN Token Received with EP Mismatch 5 1 read-write INTKNTXFEMP IN Token Received When TxFIFO is Empty 4 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write TIMEOUT Timeout Condition 3 1 read-write TXFEMP Transmit FIFO Empty 7 1 read-only TXFIFOUNDRN Fifo Underrun 8 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DIEP2_TSIZ Device IN Endpoint x+1 Transfer Size Register 0xDE970 32 read-write n 0x0 0x0 MC Multi Count 29 2 read-write PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write DIEP3_CTL Device Control IN Endpoint x+1 Control Register 0xDE980 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only DPIDEOF Endpoint Data PID / Even or Odd Frame 16 1 read-only EPDIS Endpoint Disable 30 1 read-write EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control Endpoint. 0x00000000 ISO Isochronous Endpoint. 0x00000001 BULK Bulk Endpoint. 0x00000002 INT Interrupt Endpoint. 0x00000003 MPS Maximum Packet Size 0 11 read-write NAKSTS NAK Status 17 1 read-only SETD0PIDEF Set DATA0 PID / Even Frame 28 1 write-only SETD1PIDOF Set DATA1 PID / Odd Frame 29 1 write-only SNAK Set NAK 27 1 write-only STALL Handshake 21 1 read-write TXFNUM TxFIFO Number 22 4 read-write USBACTEP USB Active Endpoint 15 1 read-write DIEP3_DMAADDR Device IN Endpoint x+1 DMA Address Register 0xDE994 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DIEP3_DTXFSTS Device IN Endpoint Transmit FIFO Status Register 1 0xDE998 32 read-only n 0x0 0x0 SPCAVAIL IN Endpoint TxFIFO Space Avail 0 16 read-only DIEP3_INT Device IN Endpoint x+1 Interrupt Register 0xDE988 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BBLEERR Babble Interrupt 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write INEPNAKEFF IN Endpoint NAK Effective 6 1 read-write INTKNEPMIS IN Token Received with EP Mismatch 5 1 read-write INTKNTXFEMP IN Token Received When TxFIFO is Empty 4 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write TIMEOUT Timeout Condition 3 1 read-write TXFEMP Transmit FIFO Empty 7 1 read-only TXFIFOUNDRN Fifo Underrun 8 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DIEP3_TSIZ Device IN Endpoint x+1 Transfer Size Register 0xDE990 32 read-write n 0x0 0x0 MC Multi Count 29 2 read-write PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write DIEP4_CTL Device Control IN Endpoint x+1 Control Register 0xDE9A0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only DPIDEOF Endpoint Data PID / Even or Odd Frame 16 1 read-only EPDIS Endpoint Disable 30 1 read-write EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control Endpoint. 0x00000000 ISO Isochronous Endpoint. 0x00000001 BULK Bulk Endpoint. 0x00000002 INT Interrupt Endpoint. 0x00000003 MPS Maximum Packet Size 0 11 read-write NAKSTS NAK Status 17 1 read-only SETD0PIDEF Set DATA0 PID / Even Frame 28 1 write-only SETD1PIDOF Set DATA1 PID / Odd Frame 29 1 write-only SNAK Set NAK 27 1 write-only STALL Handshake 21 1 read-write TXFNUM TxFIFO Number 22 4 read-write USBACTEP USB Active Endpoint 15 1 read-write DIEP4_DMAADDR Device IN Endpoint x+1 DMA Address Register 0xDE9B4 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DIEP4_DTXFSTS Device IN Endpoint Transmit FIFO Status Register 1 0xDE9B8 32 read-only n 0x0 0x0 SPCAVAIL IN Endpoint TxFIFO Space Avail 0 16 read-only DIEP4_INT Device IN Endpoint x+1 Interrupt Register 0xDE9A8 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BBLEERR Babble Interrupt 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write INEPNAKEFF IN Endpoint NAK Effective 6 1 read-write INTKNEPMIS IN Token Received with EP Mismatch 5 1 read-write INTKNTXFEMP IN Token Received When TxFIFO is Empty 4 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write TIMEOUT Timeout Condition 3 1 read-write TXFEMP Transmit FIFO Empty 7 1 read-only TXFIFOUNDRN Fifo Underrun 8 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DIEP4_TSIZ Device IN Endpoint x+1 Transfer Size Register 0xDE9B0 32 read-write n 0x0 0x0 MC Multi Count 29 2 read-write PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write DIEP5_CTL Device Control IN Endpoint x+1 Control Register 0xDE9C0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only DPIDEOF Endpoint Data PID / Even or Odd Frame 16 1 read-only EPDIS Endpoint Disable 30 1 read-write EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control Endpoint. 0x00000000 ISO Isochronous Endpoint. 0x00000001 BULK Bulk Endpoint. 0x00000002 INT Interrupt Endpoint. 0x00000003 MPS Maximum Packet Size 0 11 read-write NAKSTS NAK Status 17 1 read-only SETD0PIDEF Set DATA0 PID / Even Frame 28 1 write-only SETD1PIDOF Set DATA1 PID / Odd Frame 29 1 write-only SNAK Set NAK 27 1 write-only STALL Handshake 21 1 read-write TXFNUM TxFIFO Number 22 4 read-write USBACTEP USB Active Endpoint 15 1 read-write DIEP5_DMAADDR Device IN Endpoint x+1 DMA Address Register 0xDE9D4 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DIEP5_DTXFSTS Device IN Endpoint Transmit FIFO Status Register 1 0xDE9D8 32 read-only n 0x0 0x0 SPCAVAIL IN Endpoint TxFIFO Space Avail 0 16 read-only DIEP5_INT Device IN Endpoint x+1 Interrupt Register 0xDE9C8 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BBLEERR Babble Interrupt 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write INEPNAKEFF IN Endpoint NAK Effective 6 1 read-write INTKNEPMIS IN Token Received with EP Mismatch 5 1 read-write INTKNTXFEMP IN Token Received When TxFIFO is Empty 4 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write TIMEOUT Timeout Condition 3 1 read-write TXFEMP Transmit FIFO Empty 7 1 read-only TXFIFOUNDRN Fifo Underrun 8 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DIEP5_TSIZ Device IN Endpoint x+1 Transfer Size Register 0xDE9D0 32 read-write n 0x0 0x0 MC Multi Count 29 2 read-write PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write DIEPEMPMSK Device IN Endpoint FIFO Empty Interrupt Mask Register 0xDE834 32 read-write n 0x0 0x0 INEPTXFEMPMSK IN EP Tx FIFO Empty Interrupt Mask Bits 0 16 read-write DIEPMSK Device IN Endpoint Common Interrupt Mask Register 0xDE810 32 read-write n 0x0 0x0 AHBERRMSK AHB Error Mask 2 1 read-write EPDISBLDMSK Endpoint Disabled Interrupt Mask 1 1 read-write INEPNAKEFFMSK IN Endpoint NAK Effective Mask 6 1 read-write INTKNEPMISMSK IN Token received with EP Mismatch Mask 5 1 read-write INTKNTXFEMPMSK IN Token Received When TxFIFO Empty Mask 4 1 read-write NAKMSK NAK interrupt Mask 13 1 read-write TIMEOUTMSK Timeout Condition Mask 3 1 read-write TXFIFOUNDRNMSK Fifo Underrun Mask 8 1 read-write XFERCOMPLMSK Transfer Completed Interrupt Mask 0 1 read-write DIEPTXF1 Device IN Endpoint Transmit FIFO Size Register 1 0xDE104 32 read-write n 0x0 0x0 INEPNTXFDEP IN Endpoint TxFIFO Depth 16 10 read-write INEPNTXFSTADDR IN Endpoint FIFOn Transmit RAM Start Address 0 11 read-write DIEPTXF2 Device IN Endpoint Transmit FIFO Size Register 2 0xDE108 32 read-write n 0x0 0x0 INEPNTXFDEP IN Endpoint TxFIFO Depth 16 10 read-write INEPNTXFSTADDR IN Endpoint FIFOn Transmit RAM Start Address 0 11 read-write DIEPTXF3 Device IN Endpoint Transmit FIFO Size Register 3 0xDE10C 32 read-write n 0x0 0x0 INEPNTXFDEP IN Endpoint TxFIFO Depth 16 10 read-write INEPNTXFSTADDR IN Endpoint FIFOn Transmit RAM Start Address 0 12 read-write DIEPTXF4 Device IN Endpoint Transmit FIFO Size Register 4 0xDE110 32 read-write n 0x0 0x0 INEPNTXFDEP IN Endpoint TxFIFO Depth 16 10 read-write INEPNTXFSTADDR IN Endpoint FIFOn Transmit RAM Start Address 0 12 read-write DIEPTXF5 Device IN Endpoint Transmit FIFO Size Register 5 0xDE114 32 read-write n 0x0 0x0 INEPNTXFDEP IN Endpoint TxFIFO Depth 16 10 read-write INEPNTXFSTADDR IN Endpoint FIFOn Transmit RAM Start Address 0 12 read-write DIEPTXF6 Device IN Endpoint Transmit FIFO Size Register 6 0xDE118 32 read-write n 0x0 0x0 INEPNTXFDEP IN Endpoint TxFIFO Depth 16 10 read-write INEPNTXFSTADDR IN Endpoint FIFOn Transmit RAM Start Address 0 12 read-write DOEP0CTL Device Control OUT Endpoint 0 Control Register 0xDEB00 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only EPDIS Endpoint Disable 30 1 read-only EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-only MPS Maximum Packet Size 0 2 read-only 64B 64 bytes. 0x00000000 32B 32 bytes. 0x00000001 16B 16 bytes. 0x00000002 8B 8 bytes. 0x00000003 NAKSTS NAK Status 17 1 read-only SNAK Set NAK 27 1 write-only SNP Snoop Mode 20 1 read-write STALL Handshake 21 1 read-write USBACTEP USB Active Endpoint 15 1 read-only DOEP0DMAADDR Device OUT Endpoint 0 DMA Address Register 0xDEB14 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DOEP0INT Device OUT Endpoint 0 Interrupt Register 0xDEB08 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BACK2BACKSETUP Back-to-Back SETUP Packets Received 6 1 read-write BBLEERR NAK Interrupt 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write OUTPKTERR OUT Packet Error 8 1 read-write OUTTKNEPDIS OUT Token Received When Endpoint Disabled 4 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write SETUP Setup Phase Done 3 1 read-write STSPHSERCVD Status Phase Received For Control Write 5 1 read-write STUPPKTRCVD 15 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DOEP0TSIZ Device OUT Endpoint 0 Transfer Size Register 0xDEB10 32 read-write n 0x0 0x0 PKTCNT Packet Count 19 1 read-write SUPCNT SETUP Packet Count 29 2 read-write XFERSIZE Transfer Size 0 7 read-write DOEP0_CTL Device Control OUT Endpoint x+1 Control Register 0xDEB20 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only DPIDEOF Endpoint Data PID / Even-odd Frame 16 1 read-only EPDIS Endpoint Disable 30 1 read-write EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control Endpoint. 0x00000000 ISO Isochronous Endpoint. 0x00000001 BULK Bulk Endpoint. 0x00000002 INT Interrupt Endpoint. 0x00000003 MPS Maximum Packet Size 0 11 read-write NAKSTS NAK Status 17 1 read-only SETD0PIDEF Set DATA0 PID / Even Frame 28 1 write-only SETD1PIDOF Set DATA1 PID / Odd Frame 29 1 write-only SNAK Set NAK 27 1 write-only SNP Snoop Mode 20 1 read-write STALL STALL Handshake 21 1 read-write USBACTEP USB Active Endpoint 15 1 read-write DOEP0_DMAADDR Device OUT Endpoint x+1 DMA Address Register 0xDEB34 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DOEP0_INT Device OUT Endpoint x+1 Interrupt Register 0xDEB28 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BACK2BACKSETUP Back-to-Back SETUP Packets Received 6 1 read-write BBLEERR Babble Error 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write OUTPKTERR OUT Packet Error 8 1 read-write OUTTKNEPDIS OUT Token Received When Endpoint Disabled 4 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write SETUP Setup Phase Done 3 1 read-write STSPHSERCVD Status Phase Received For Control Write 5 1 read-write STUPPKTRCVD 15 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DOEP0_TSIZ Device OUT Endpoint x+1 Transfer Size Register 0xDEB30 32 read-write n 0x0 0x0 PKTCNT Packet Count 19 10 read-write RXDPIDSUPCNT Receive Data PID / SETUP Packet Count 29 2 read-only DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID / 1 Packet. 0x00000001 DATA1 DATA1 PID / 2 Packets. 0x00000002 MDATA MDATA PID / 3 Packets. 0x00000003 XFERSIZE Transfer Size 0 19 read-write DOEP1_CTL Device Control OUT Endpoint x+1 Control Register 0xDEB40 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only DPIDEOF Endpoint Data PID / Even-odd Frame 16 1 read-only EPDIS Endpoint Disable 30 1 read-write EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control Endpoint. 0x00000000 ISO Isochronous Endpoint. 0x00000001 BULK Bulk Endpoint. 0x00000002 INT Interrupt Endpoint. 0x00000003 MPS Maximum Packet Size 0 11 read-write NAKSTS NAK Status 17 1 read-only SETD0PIDEF Set DATA0 PID / Even Frame 28 1 write-only SETD1PIDOF Set DATA1 PID / Odd Frame 29 1 write-only SNAK Set NAK 27 1 write-only SNP Snoop Mode 20 1 read-write STALL STALL Handshake 21 1 read-write USBACTEP USB Active Endpoint 15 1 read-write DOEP1_DMAADDR Device OUT Endpoint x+1 DMA Address Register 0xDEB54 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DOEP1_INT Device OUT Endpoint x+1 Interrupt Register 0xDEB48 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BACK2BACKSETUP Back-to-Back SETUP Packets Received 6 1 read-write BBLEERR Babble Error 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write OUTPKTERR OUT Packet Error 8 1 read-write OUTTKNEPDIS OUT Token Received When Endpoint Disabled 4 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write SETUP Setup Phase Done 3 1 read-write STSPHSERCVD Status Phase Received For Control Write 5 1 read-write STUPPKTRCVD 15 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DOEP1_TSIZ Device OUT Endpoint x+1 Transfer Size Register 0xDEB50 32 read-write n 0x0 0x0 PKTCNT Packet Count 19 10 read-write RXDPIDSUPCNT Receive Data PID / SETUP Packet Count 29 2 read-only DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID / 1 Packet. 0x00000001 DATA1 DATA1 PID / 2 Packets. 0x00000002 MDATA MDATA PID / 3 Packets. 0x00000003 XFERSIZE Transfer Size 0 19 read-write DOEP2_CTL Device Control OUT Endpoint x+1 Control Register 0xDEB60 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only DPIDEOF Endpoint Data PID / Even-odd Frame 16 1 read-only EPDIS Endpoint Disable 30 1 read-write EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control Endpoint. 0x00000000 ISO Isochronous Endpoint. 0x00000001 BULK Bulk Endpoint. 0x00000002 INT Interrupt Endpoint. 0x00000003 MPS Maximum Packet Size 0 11 read-write NAKSTS NAK Status 17 1 read-only SETD0PIDEF Set DATA0 PID / Even Frame 28 1 write-only SETD1PIDOF Set DATA1 PID / Odd Frame 29 1 write-only SNAK Set NAK 27 1 write-only SNP Snoop Mode 20 1 read-write STALL STALL Handshake 21 1 read-write USBACTEP USB Active Endpoint 15 1 read-write DOEP2_DMAADDR Device OUT Endpoint x+1 DMA Address Register 0xDEB74 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DOEP2_INT Device OUT Endpoint x+1 Interrupt Register 0xDEB68 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BACK2BACKSETUP Back-to-Back SETUP Packets Received 6 1 read-write BBLEERR Babble Error 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write OUTPKTERR OUT Packet Error 8 1 read-write OUTTKNEPDIS OUT Token Received When Endpoint Disabled 4 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write SETUP Setup Phase Done 3 1 read-write STSPHSERCVD Status Phase Received For Control Write 5 1 read-write STUPPKTRCVD 15 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DOEP2_TSIZ Device OUT Endpoint x+1 Transfer Size Register 0xDEB70 32 read-write n 0x0 0x0 PKTCNT Packet Count 19 10 read-write RXDPIDSUPCNT Receive Data PID / SETUP Packet Count 29 2 read-only DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID / 1 Packet. 0x00000001 DATA1 DATA1 PID / 2 Packets. 0x00000002 MDATA MDATA PID / 3 Packets. 0x00000003 XFERSIZE Transfer Size 0 19 read-write DOEP3_CTL Device Control OUT Endpoint x+1 Control Register 0xDEB80 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only DPIDEOF Endpoint Data PID / Even-odd Frame 16 1 read-only EPDIS Endpoint Disable 30 1 read-write EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control Endpoint. 0x00000000 ISO Isochronous Endpoint. 0x00000001 BULK Bulk Endpoint. 0x00000002 INT Interrupt Endpoint. 0x00000003 MPS Maximum Packet Size 0 11 read-write NAKSTS NAK Status 17 1 read-only SETD0PIDEF Set DATA0 PID / Even Frame 28 1 write-only SETD1PIDOF Set DATA1 PID / Odd Frame 29 1 write-only SNAK Set NAK 27 1 write-only SNP Snoop Mode 20 1 read-write STALL STALL Handshake 21 1 read-write USBACTEP USB Active Endpoint 15 1 read-write DOEP3_DMAADDR Device OUT Endpoint x+1 DMA Address Register 0xDEB94 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DOEP3_INT Device OUT Endpoint x+1 Interrupt Register 0xDEB88 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BACK2BACKSETUP Back-to-Back SETUP Packets Received 6 1 read-write BBLEERR Babble Error 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write OUTPKTERR OUT Packet Error 8 1 read-write OUTTKNEPDIS OUT Token Received When Endpoint Disabled 4 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write SETUP Setup Phase Done 3 1 read-write STSPHSERCVD Status Phase Received For Control Write 5 1 read-write STUPPKTRCVD 15 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DOEP3_TSIZ Device OUT Endpoint x+1 Transfer Size Register 0xDEB90 32 read-write n 0x0 0x0 PKTCNT Packet Count 19 10 read-write RXDPIDSUPCNT Receive Data PID / SETUP Packet Count 29 2 read-only DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID / 1 Packet. 0x00000001 DATA1 DATA1 PID / 2 Packets. 0x00000002 MDATA MDATA PID / 3 Packets. 0x00000003 XFERSIZE Transfer Size 0 19 read-write DOEP4_CTL Device Control OUT Endpoint x+1 Control Register 0xDEBA0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only DPIDEOF Endpoint Data PID / Even-odd Frame 16 1 read-only EPDIS Endpoint Disable 30 1 read-write EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control Endpoint. 0x00000000 ISO Isochronous Endpoint. 0x00000001 BULK Bulk Endpoint. 0x00000002 INT Interrupt Endpoint. 0x00000003 MPS Maximum Packet Size 0 11 read-write NAKSTS NAK Status 17 1 read-only SETD0PIDEF Set DATA0 PID / Even Frame 28 1 write-only SETD1PIDOF Set DATA1 PID / Odd Frame 29 1 write-only SNAK Set NAK 27 1 write-only SNP Snoop Mode 20 1 read-write STALL STALL Handshake 21 1 read-write USBACTEP USB Active Endpoint 15 1 read-write DOEP4_DMAADDR Device OUT Endpoint x+1 DMA Address Register 0xDEBB4 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DOEP4_INT Device OUT Endpoint x+1 Interrupt Register 0xDEBA8 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BACK2BACKSETUP Back-to-Back SETUP Packets Received 6 1 read-write BBLEERR Babble Error 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write OUTPKTERR OUT Packet Error 8 1 read-write OUTTKNEPDIS OUT Token Received When Endpoint Disabled 4 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write SETUP Setup Phase Done 3 1 read-write STSPHSERCVD Status Phase Received For Control Write 5 1 read-write STUPPKTRCVD 15 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DOEP4_TSIZ Device OUT Endpoint x+1 Transfer Size Register 0xDEBB0 32 read-write n 0x0 0x0 PKTCNT Packet Count 19 10 read-write RXDPIDSUPCNT Receive Data PID / SETUP Packet Count 29 2 read-only DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID / 1 Packet. 0x00000001 DATA1 DATA1 PID / 2 Packets. 0x00000002 MDATA MDATA PID / 3 Packets. 0x00000003 XFERSIZE Transfer Size 0 19 read-write DOEP5_CTL Device Control OUT Endpoint x+1 Control Register 0xDEBC0 32 read-write n 0x0 0x0 CNAK Clear NAK 26 1 write-only DPIDEOF Endpoint Data PID / Even-odd Frame 16 1 read-only EPDIS Endpoint Disable 30 1 read-write EPENA Endpoint Enable 31 1 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control Endpoint. 0x00000000 ISO Isochronous Endpoint. 0x00000001 BULK Bulk Endpoint. 0x00000002 INT Interrupt Endpoint. 0x00000003 MPS Maximum Packet Size 0 11 read-write NAKSTS NAK Status 17 1 read-only SETD0PIDEF Set DATA0 PID / Even Frame 28 1 write-only SETD1PIDOF Set DATA1 PID / Odd Frame 29 1 write-only SNAK Set NAK 27 1 write-only SNP Snoop Mode 20 1 read-write STALL STALL Handshake 21 1 read-write USBACTEP USB Active Endpoint 15 1 read-write DOEP5_DMAADDR Device OUT Endpoint x+1 DMA Address Register 0xDEBD4 32 read-write n 0x0 0x0 DMAADDR 0 32 read-write DOEP5_INT Device OUT Endpoint x+1 Interrupt Register 0xDEBC8 32 read-write n 0x0 0x0 AHBERR AHB Error 2 1 read-write BACK2BACKSETUP Back-to-Back SETUP Packets Received 6 1 read-write BBLEERR Babble Error 12 1 read-write EPDISBLD Endpoint Disabled Interrupt 1 1 read-write NAKINTRPT NAK Interrupt 13 1 read-write OUTPKTERR OUT Packet Error 8 1 read-write OUTTKNEPDIS OUT Token Received When Endpoint Disabled 4 1 read-write PKTDRPSTS Packet Drop Status 11 1 read-write SETUP Setup Phase Done 3 1 read-write STSPHSERCVD Status Phase Received For Control Write 5 1 read-write STUPPKTRCVD 15 1 read-write XFERCOMPL Transfer Completed Interrupt 0 1 read-write DOEP5_TSIZ Device OUT Endpoint x+1 Transfer Size Register 0xDEBD0 32 read-write n 0x0 0x0 PKTCNT Packet Count 19 10 read-write RXDPIDSUPCNT Receive Data PID / SETUP Packet Count 29 2 read-only DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID / 1 Packet. 0x00000001 DATA1 DATA1 PID / 2 Packets. 0x00000002 MDATA MDATA PID / 3 Packets. 0x00000003 XFERSIZE Transfer Size 0 19 read-write DOEPMSK Device OUT Endpoint Common Interrupt Mask Register 0xDE814 32 read-write n 0x0 0x0 AHBERRMSK AHB Error 2 1 read-write BACK2BACKSETUP Back-to-Back SETUP Packets Received Mask 6 1 read-write BBLEERRMSK Babble Error interrupt Mask 12 1 read-write EPDISBLDMSK Endpoint Disabled Interrupt Mask 1 1 read-write NAKMSK NAK interrupt Mask 13 1 read-write OUTPKTERRMSK OUT Packet Error Mask 8 1 read-write OUTTKNEPDISMSK OUT Token Received when Endpoint Disabled Mask 4 1 read-write SETUPMSK SETUP Phase Done Mask 3 1 read-write STSPHSERCVDMSK Status Phase Received Mask 5 1 read-write XFERCOMPLMSK Transfer Completed Interrupt Mask 0 1 read-write DSTS Device Status Register 0xDE808 32 read-only n 0x0 0x0 DEVLNSTS Device Line Status 22 2 read-only ENUMSPD Enumerated Speed 1 2 read-only LS Low speed (PHY clock is running at 6 MHz). 0x00000002 FS Full speed (PHY clock is running at 48 MHz). 0x00000003 ERRTICERR Erratic Error 3 1 read-only SOFFN Frame Number of the Received SOF 8 14 read-only SUSPSTS Suspend Status 0 1 read-only DTHRCTL Device Threshold Control Register 0xDE830 32 read-write n 0x0 0x0 AHBTHRRATIO AHB Threshold Ratio 11 2 read-write DIV1 AHB threshold = MAC threshold. 0x00000000 DIV2 AHB threshold = MAC threshold / 2. 0x00000001 DIV4 AHB threshold = MAC threshold / 4. 0x00000002 DIV8 AHB threshold = MAC threshold / 8. 0x00000003 ARBPRKEN Arbiter Parking Enable 27 1 read-write ISOTHREN ISO IN Endpoints Threshold Enable 1 1 read-write NONISOTHREN Non-ISO IN Endpoints Threshold Enable 0 1 read-write RXTHREN Receive Threshold Enable 16 1 read-write RXTHRLEN Receive Threshold Length 17 9 read-write TXTHRLEN Transmit Threshold Length 2 9 read-write DVBUSDIS Device VBUS Discharge Time Register 0xDE828 32 read-write n 0x0 0x0 DVBUSDIS Device VBUS Discharge Time 0 16 read-write DVBUSPULSE Device VBUS Pulsing Time Register 0xDE82C 32 read-write n 0x0 0x0 DVBUSPULSE Device VBUS Pulsing Time 0 12 read-write GAHBCFG AHB Configuration Register 0xDE008 32 read-write n 0x0 0x0 AHBSINGLE AHB Single Support 23 1 read-write DMAEN DMA Enable 5 1 read-write GLBLINTRMSK Global Interrupt Mask 0 1 read-write HBSTLEN Burst Length/Type 1 4 read-write SINGLE Single transfer. 0x00000000 INCR Incrementing burst of unspecified length. 0x00000001 INCR4 4-beat incrementing burst. 0x00000003 INCR8 8-beat incrementing burst. 0x00000005 INCR16 16-beat incrementing burst. 0x00000007 NOTIALLDMAWRIT Notify All Dma Write Transactions 22 1 read-write NPTXFEMPLVL Non-Periodic TxFIFO Empty Level 7 1 read-write PTXFEMPLVL Periodic TxFIFO Empty Level 8 1 read-write REMMEMSUPP Remote Memory Support 21 1 read-write GDFIFOCFG Global DFIFO Configuration Register 0xDE05C 32 read-write n 0x0 0x0 EPINFOBASEADDR 16 16 read-write GDFIFOCFG 0 16 read-write GINTMSK Interrupt Mask Register 0xDE018 32 read-write n 0x0 0x0 CONIDSTSCHNGMSK Connector ID Status Change Mask (host and device) 28 1 read-write DISCONNINTMSK Disconnect Detected Interrupt Mask (host and device) 29 1 read-write ENUMDONEMSK Enumeration Done Mask (device only) 13 1 read-write EOPFMSK End of Periodic Frame Interrupt Mask (device only) 15 1 read-write EPMISMSK Endpoint Mismatch Interrupt Mask (device only) 17 1 read-write ERLYSUSPMSK Early Suspend Mask (device only) 10 1 read-write FETSUSPMSK Data Fetch Suspended Mask (device only) 22 1 read-write GINNAKEFFMSK Global Non-periodic IN NAK Effective Mask (device only) 6 1 read-write GOUTNAKEFFMSK Global OUT NAK Effective Mask (device only) 7 1 read-write HCHINTMSK Host Channels Interrupt Mask (host only) 25 1 read-write IEPINTMSK IN Endpoints Interrupt Mask (device only) 18 1 read-write INCOMPISOINMSK Incomplete Isochronous IN Transfer Mask (device only) 20 1 read-write INCOMPLPMSK Incomplete Periodic Transfer Mask (host only) 21 1 read-write ISOOUTDROPMSK Isochronous OUT Packet Dropped Interrupt Mask (device only) 14 1 read-write MODEMISMSK Mode Mismatch Interrupt Mask (host and device) 1 1 read-write NPTXFEMPMSK Non-Periodic TxFIFO Empty Mask (host only) 5 1 read-write OEPINTMSK OUT Endpoints Interrupt Mask (device only) 19 1 read-write OTGINTMSK OTG Interrupt Mask (host and device) 2 1 read-write PRTINTMSK Host Port Interrupt Mask (host only) 24 1 read-write PTXFEMPMSK Periodic TxFIFO Empty Mask (host only) 26 1 read-write RESETDETMSK Reset detected Interrupt Mask (device only) 23 1 read-write RXFLVLMSK Receive FIFO Non-Empty Mask (host and device) 4 1 read-write SESSREQINTMSK Session Request/New Session Detected Interrupt Mask (host and device) 30 1 read-write SOFMSK Start of Frame Mask (host and device) 3 1 read-write USBRSTMSK USB Reset Mask (device only) 12 1 read-write USBSUSPMSK USB Suspend Mask (device only) 11 1 read-write WKUPINTMSK Resume/Remote Wakeup Detected Interrupt Mask (host and device) 31 1 read-write GINTSTS Interrupt Register 0xDE014 32 read-write n 0x0 0x0 CONIDSTSCHNG Connector ID Status Change (host and device) 28 1 read-write CURMOD Current Mode of Operation (host and device) 0 1 read-only DISCONNINT Disconnect Detected Interrupt (host only) 29 1 read-write ENUMDONE Enumeration Done (device only) 13 1 read-write EOPF End of Periodic Frame Interrupt 15 1 read-write EPMIS Endpoint Mismatch Interrupt (device only) 17 1 read-write ERLYSUSP Early Suspend (device only) 10 1 read-write FETSUSP Data Fetch Suspended (device only) 22 1 read-write GINNAKEFF Global IN Non-periodic NAK Effective (device only) 6 1 read-only GOUTNAKEFF Global OUT NAK Effective (device only) 7 1 read-only HCHINT Host Channels Interrupt (host only) 25 1 read-only IEPINT IN Endpoints Interrupt (device only) 18 1 read-only INCOMPISOIN Incomplete Isochronous IN Transfer (device only) 20 1 read-write INCOMPLP Incomplete Periodic Transfer (device only) 21 1 read-write ISOOUTDROP Isochronous OUT Packet Dropped Interrupt (device only) 14 1 read-write MODEMIS Mode Mismatch Interrupt (host and device) 1 1 read-write NPTXFEMP Non-Periodic TxFIFO Empty (host only) 5 1 read-only OEPINT OUT Endpoints Interrupt (device only) 19 1 read-only OTGINT OTG Interrupt (host and device) 2 1 read-only PRTINT Host Port Interrupt (host only) 24 1 read-only PTXFEMP Periodic TxFIFO Empty (host only) 26 1 read-only RESETDET Reset detected Interrupt (device only) 23 1 read-write RXFLVL RxFIFO Non-Empty (host and device) 4 1 read-only SESSREQINT Session Request/New Session Detected Interrupt (host and device) 30 1 read-write SOF Start of Frame (host and device) 3 1 read-write USBRST USB Reset (device only) 12 1 read-write USBSUSP USB Suspend (device only) 11 1 read-write WKUPINT Resume/Remote Wakeup Detected Interrupt (host and device) 31 1 read-write GNPTXFSIZ Non-periodic Transmit FIFO Size Register 0xDE028 32 read-write n 0x0 0x0 NPTXFINEPTXF0DEP Non-periodic TxFIFO Depth (host only) / IN Endpoint TxFIFO 0 Depth (device only) 16 16 read-write NPTXFSTADDR Non-periodic Transmit RAM Start Address 0 16 read-write GNPTXSTS Non-periodic Transmit FIFO/Queue Status Register 0xDE02C 32 read-only n 0x0 0x0 NPTXFSPCAVAIL Non-periodic TxFIFO Space Avail 0 16 read-only NPTXQSPCAVAIL Non-periodic Transmit Request Queue Space Available 16 8 read-only NPTXQTOP Top of the Non-periodic Transmit Request Queue 24 7 read-only GOTGCTL OTG Control and Status Register 0xDE000 32 read-write n 0x0 0x0 ASESVLD A-Session Valid 18 1 read-only AVALIDOVEN A-Peripheral Session Valid Override Enable 4 1 read-write AVALIDOVVAL A-Peripheral Session Valid OverrideValue 5 1 read-write BSESVLD B-Session Valid 19 1 read-only BVALIDOVEN B-Peripheral Session Valid Override Enable 6 1 read-write BVALIDOVVAL B-Peripheral Session Valid OverrideValue 7 1 read-write CONIDSTS Connector ID Status 16 1 read-only CURMOD Current Mode of Operation 21 1 read-only DBNCEFLTRBYPASS Debounce Filter Bypass 15 1 read-write DBNCTIME Long/Short Debounce Time 17 1 read-only DEVHNPEN Device HNP Enabled 11 1 read-write EHEN Embedded Host Enable 12 1 read-write HNPREQ HNP Request 9 1 read-write HSTNEGSCS Host Negotiation Success 8 1 read-only HSTSETHNPEN Host Set HNP Enable 10 1 read-write OTGVER OTG Version 20 1 read-write SESREQ Session Request 1 1 read-write SESREQSCS Session Request Success 0 1 read-only VBVALIDOVEN VBUS Valid Override Enable 2 1 read-write VBVALIDOVVAL VBUS Valid OverrideValue 3 1 read-write GOTGINT OTG Interrupt Register 0xDE004 32 read-write n 0x0 0x0 ADEVTOUTCHG A-Device Timeout Change 18 1 read-write DBNCEDONE Debounce Done 19 1 read-write HSTNEGDET Host Negotiation Detected 17 1 read-write HSTNEGSUCSTSCHNG Host Negotiation Success Status Change 9 1 read-write SESENDDET Session End Detected 2 1 read-write SESREQSUCSTSCHNG Session Request Success Status Change 8 1 read-write GRSTCTL Reset Register 0xDE010 32 read-write n 0x0 0x0 AHBIDLE AHB Master Idle 31 1 read-only CSFTRST Core Soft Reset (host and device) 0 1 read-write DMAREQ DMA Request Signal 30 1 read-only FRMCNTRRST Host Frame Counter Reset 2 1 read-write PIUFSSFTRST PIU FS Dedicated Controller Soft Reset 1 1 read-write RXFFLSH RxFIFO Flush 4 1 read-write TXFFLSH TxFIFO Flush 5 1 read-write TXFNUM TxFIFO Number (host and device) 6 5 read-write F0 Host mode: Non-periodic TxFIFO flush. Device: Tx FIFO 0 flush 0x00000000 F1 Host mode: Periodic TxFIFO flush. Device: TXFIFO 1 flush. 0x00000001 F2 Device mode: TXFIFO 2 flush. 0x00000002 F3 Device mode: TXFIFO 3 flush. 0x00000003 F4 Device mode: TXFIFO 4 flush. 0x00000004 F5 Device mode: TXFIFO 5 flush. 0x00000005 F6 Device mode: TXFIFO 6 flush. 0x00000006 FALL Flush all the transmit FIFOs in device or host mode. 0x00000010 GRXFSIZ Receive FIFO Size Register 0xDE024 32 read-write n 0x0 0x0 RXFDEP RxFIFO Depth 0 10 read-write GRXSTSP Receive Status Read /Pop Register 0xDE020 32 read-only n 0x0 0x0 BCNT Byte Count 4 11 read-only CHNUM Channel Number 0 4 read-only DPID Data PID (host or device) 15 2 read-only DATA0 DATA0 PID. 0x00000000 DATA1 DATA1 PID. 0x00000001 DATA2 DATA2 PID. 0x00000002 MDATA MDATA PID. 0x00000003 FN Frame Number 21 4 read-only PKTSTS Packet Status (host or device) 17 4 read-only GOUTNAK Device mode: Global OUT NAK (triggers an interrupt). 0x00000001 PKTRCV Host mode: IN data packet received. Device mode: OUT data packet received. 0x00000002 XFERCOMPL Host mode: IN transfer completed (triggers an interrupt). Device mode: OUT transfer completed (triggers an interrupt). 0x00000003 SETUPCOMPL Device mode: SETUP transaction completed (triggers an interrupt). 0x00000004 TGLERR Host mode: Data toggle error (triggers an interrupt). 0x00000005 SETUPRCV Device mode: SETUP data packet received. 0x00000006 CHLT Host mode: Channel halted (triggers an interrupt). 0x00000007 GRXSTSR Receive Status Debug Read Register 0xDE01C 32 read-only n 0x0 0x0 BCNT Byte Count 4 11 read-only CHNUM Channel Number 0 4 read-only DPID Data PID 15 2 read-only DATA0 DATA0 PID. 0x00000000 DATA1 DATA1 PID. 0x00000001 DATA2 DATA2 PID. 0x00000002 MDATA MDATA PID. 0x00000003 FN Frame Number 21 4 read-only PKTSTS Packet Status 17 4 read-only GOUTNAK Device mode: Global OUT NAK (triggers an interrupt). 0x00000001 PKTRCV Host mode: IN data packet received. Device mode: OUT data packet received. 0x00000002 XFERCOMPL Host mode: IN transfer completed (triggers an interrupt). Device mode: OUT transfer completed (triggers an interrupt). 0x00000003 SETUPCOMPL Device mode: SETUP transaction completed (triggers an interrupt). 0x00000004 TGLERR Host mode: Data toggle error (triggers an interrupt). 0x00000005 SETUPRCV Device mode: SETUP data packet received. 0x00000006 CHLT Host mode: Channel halted (triggers an interrupt). 0x00000007 GSNPSID Synopsys ID Register 0xDE040 32 read-only n 0x0 0x0 SYNOPSYSID 0 32 read-only GUSBCFG USB Configuration Register 0xDE00C 32 read-write n 0x0 0x0 CORRUPTTXPKT Corrupt Tx packet (host and device) 31 1 write-only FORCEDEVMODE Force Device Mode 30 1 read-write FORCEHSTMODE Force Host Mode 29 1 read-write FSINTF Full-Speed Serial Interface Select 5 1 read-write HNPCAP HNP-Capable 9 1 read-write SRPCAP SRP-Capable 8 1 read-write TERMSELDLPULSE TermSel DLine Pulsing Selection 22 1 read-write TOUTCAL Timeout Calibration (host and device) 0 3 read-write TXENDDELAY Tx End Delay 28 1 read-write USBTRDTIM USB Turnaround Time 10 4 read-write HAINT Host All Channels Interrupt Register 0xDE414 32 read-only n 0x0 0x0 HAINT Channel Interrupt for channel 0 - 13. 0 14 read-only HAINTMSK Host All Channels Interrupt Mask Register 0xDE418 32 read-write n 0x0 0x0 HAINTMSK Channel Interrupt Mask for channel 0 - 13 0 14 read-write HC0_CHAR Host Channel x Characteristics Register 0xDE500 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC0_DMAADDR Host Channel x DMA Address Register 0xDE514 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC0_INT Host Channel x Interrupt Register 0xDE508 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC0_INTMSK Host Channel x Interrupt Mask Register 0xDE50C 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC0_SPLT Host Channel x Split Control Register 0xDE504 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC0_TSIZ Host Channel x Transfer Size Register 0xDE510 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HC10_CHAR Host Channel x Characteristics Register 0xDE640 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC10_DMAADDR Host Channel x DMA Address Register 0xDE654 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC10_INT Host Channel x Interrupt Register 0xDE648 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC10_INTMSK Host Channel x Interrupt Mask Register 0xDE64C 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC10_SPLT Host Channel x Split Control Register 0xDE644 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC10_TSIZ Host Channel x Transfer Size Register 0xDE650 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HC11_CHAR Host Channel x Characteristics Register 0xDE660 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC11_DMAADDR Host Channel x DMA Address Register 0xDE674 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC11_INT Host Channel x Interrupt Register 0xDE668 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC11_INTMSK Host Channel x Interrupt Mask Register 0xDE66C 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC11_SPLT Host Channel x Split Control Register 0xDE664 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC11_TSIZ Host Channel x Transfer Size Register 0xDE670 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HC12_CHAR Host Channel x Characteristics Register 0xDE680 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC12_DMAADDR Host Channel x DMA Address Register 0xDE694 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC12_INT Host Channel x Interrupt Register 0xDE688 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC12_INTMSK Host Channel x Interrupt Mask Register 0xDE68C 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC12_SPLT Host Channel x Split Control Register 0xDE684 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC12_TSIZ Host Channel x Transfer Size Register 0xDE690 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HC13_CHAR Host Channel x Characteristics Register 0xDE6A0 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC13_DMAADDR Host Channel x DMA Address Register 0xDE6B4 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC13_INT Host Channel x Interrupt Register 0xDE6A8 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC13_INTMSK Host Channel x Interrupt Mask Register 0xDE6AC 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC13_SPLT Host Channel x Split Control Register 0xDE6A4 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC13_TSIZ Host Channel x Transfer Size Register 0xDE6B0 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HC1_CHAR Host Channel x Characteristics Register 0xDE520 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC1_DMAADDR Host Channel x DMA Address Register 0xDE534 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC1_INT Host Channel x Interrupt Register 0xDE528 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC1_INTMSK Host Channel x Interrupt Mask Register 0xDE52C 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC1_SPLT Host Channel x Split Control Register 0xDE524 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC1_TSIZ Host Channel x Transfer Size Register 0xDE530 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HC2_CHAR Host Channel x Characteristics Register 0xDE540 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC2_DMAADDR Host Channel x DMA Address Register 0xDE554 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC2_INT Host Channel x Interrupt Register 0xDE548 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC2_INTMSK Host Channel x Interrupt Mask Register 0xDE54C 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC2_SPLT Host Channel x Split Control Register 0xDE544 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC2_TSIZ Host Channel x Transfer Size Register 0xDE550 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HC3_CHAR Host Channel x Characteristics Register 0xDE560 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC3_DMAADDR Host Channel x DMA Address Register 0xDE574 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC3_INT Host Channel x Interrupt Register 0xDE568 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC3_INTMSK Host Channel x Interrupt Mask Register 0xDE56C 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC3_SPLT Host Channel x Split Control Register 0xDE564 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC3_TSIZ Host Channel x Transfer Size Register 0xDE570 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HC4_CHAR Host Channel x Characteristics Register 0xDE580 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC4_DMAADDR Host Channel x DMA Address Register 0xDE594 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC4_INT Host Channel x Interrupt Register 0xDE588 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC4_INTMSK Host Channel x Interrupt Mask Register 0xDE58C 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC4_SPLT Host Channel x Split Control Register 0xDE584 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC4_TSIZ Host Channel x Transfer Size Register 0xDE590 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HC5_CHAR Host Channel x Characteristics Register 0xDE5A0 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC5_DMAADDR Host Channel x DMA Address Register 0xDE5B4 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC5_INT Host Channel x Interrupt Register 0xDE5A8 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC5_INTMSK Host Channel x Interrupt Mask Register 0xDE5AC 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC5_SPLT Host Channel x Split Control Register 0xDE5A4 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC5_TSIZ Host Channel x Transfer Size Register 0xDE5B0 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HC6_CHAR Host Channel x Characteristics Register 0xDE5C0 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC6_DMAADDR Host Channel x DMA Address Register 0xDE5D4 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC6_INT Host Channel x Interrupt Register 0xDE5C8 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC6_INTMSK Host Channel x Interrupt Mask Register 0xDE5CC 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC6_SPLT Host Channel x Split Control Register 0xDE5C4 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC6_TSIZ Host Channel x Transfer Size Register 0xDE5D0 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HC7_CHAR Host Channel x Characteristics Register 0xDE5E0 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC7_DMAADDR Host Channel x DMA Address Register 0xDE5F4 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC7_INT Host Channel x Interrupt Register 0xDE5E8 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC7_INTMSK Host Channel x Interrupt Mask Register 0xDE5EC 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC7_SPLT Host Channel x Split Control Register 0xDE5E4 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC7_TSIZ Host Channel x Transfer Size Register 0xDE5F0 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HC8_CHAR Host Channel x Characteristics Register 0xDE600 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC8_DMAADDR Host Channel x DMA Address Register 0xDE614 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC8_INT Host Channel x Interrupt Register 0xDE608 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC8_INTMSK Host Channel x Interrupt Mask Register 0xDE60C 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC8_SPLT Host Channel x Split Control Register 0xDE604 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC8_TSIZ Host Channel x Transfer Size Register 0xDE610 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HC9_CHAR Host Channel x Characteristics Register 0xDE620 32 read-write n 0x0 0x0 CHDIS Channel Disable 30 1 read-write CHENA Channel Enable 31 1 read-write DEVADDR Device Address 22 7 read-write EPDIR Endpoint Direction 15 1 read-write EPNUM Endpoint Number 11 4 read-write EPTYPE Endpoint Type 18 2 read-write CONTROL Control endpoint. 0x00000000 ISO Isochronous endpoint. 0x00000001 BULK Bulk endpoint. 0x00000002 INT Interrupt endpoint. 0x00000003 LSPDDEV Low-Speed Device 17 1 read-write MC Multi Count (MC) / Error Count 20 2 read-write MPS Maximum Packet Size 0 11 read-write ODDFRM Odd Frame 29 1 read-write HC9_DMAADDR Host Channel x DMA Address Register 0xDE634 32 read-write n 0x0 0x0 DMAADDR DMA Address 0 32 read-write HC9_INT Host Channel x Interrupt Register 0xDE628 32 read-write n 0x0 0x0 ACK ACK Response Received/Transmitted Interrupt 5 1 read-write AHBERR AHB Error 2 1 read-write BBLERR Babble Error 8 1 read-write CHHLTD Channel Halted 1 1 read-write DATATGLERR Data Toggle Error 10 1 read-write FRMOVRUN Frame Overrun 9 1 read-write NAK NAK Response Received Interrupt 4 1 read-write STALL STALL Response Received Interrupt 3 1 read-write XACTERR Transaction Error 7 1 read-write XFERCOMPL Transfer Completed 0 1 read-write HC9_INTMSK Host Channel x Interrupt Mask Register 0xDE62C 32 read-write n 0x0 0x0 ACKMSK ACK Response Received/Transmitted Interrupt Mask 5 1 read-write AHBERRMSK AHB Error Mask 2 1 read-write BBLERRMSK Babble Error Mask 8 1 read-write CHHLTDMSK Channel Halted Mask 1 1 read-write DATATGLERRMSK Data Toggle Error Mask 10 1 read-write FRMOVRUNMSK Frame Overrun Mask 9 1 read-write NAKMSK NAK Response Received Interrupt Mask 4 1 read-write STALLMSK STALL Response Received Interrupt Mask 3 1 read-write XACTERRMSK Transaction Error Mask 7 1 read-write XFERCOMPLMSK Transfer Completed Mask 0 1 read-write HC9_SPLT Host Channel x Split Control Register 0xDE624 32 read-write n 0x0 0x0 COMPSPLT Do Complete Split 16 1 read-write HUBADDR Hub Address 7 7 read-write PRTADDR Port Address 0 7 read-write SPLTENA Split Enable 31 1 read-write XACTPOS Transaction Position 14 2 read-write HC9_TSIZ Host Channel x Transfer Size Register 0xDE630 32 read-write n 0x0 0x0 PID The Application Programs This Field With the Type of 29 2 read-write DATA0 DATA0 PID. 0x00000000 DATA2 DATA2 PID. 0x00000001 DATA1 DATA1 PID. 0x00000002 MDATA MDATA (non-control) / SETUP (control) PID. 0x00000003 PKTCNT Packet Count 19 10 read-write XFERSIZE Transfer Size 0 19 read-write HCFG Host Configuration Register 0xDE400 32 read-write n 0x0 0x0 ENA32KHZS Enable 32 kHz Suspend Mode 7 1 read-write FSLSPCLKSEL FS/LS PHY Clock Select 0 2 read-write DIV1 Internal PHY clock is running at 48 MHz (undivided). 0x00000001 DIV8 Internal PHY clock is running at 6 MHz (48 MHz divided by 8). 0x00000002 FSLSSUPP FS- and LS-Only Support 2 1 read-write MODECHTIMEN Mode Change Time 31 1 read-write RESVALID Resume Validation Period 8 8 read-write HFIR Host Frame Interval Register 0xDE404 32 read-write n 0x0 0x0 FRINT Frame Interval 0 16 read-write HFIRRLDCTRL Reload Control 16 1 read-write HFNUM Host Frame Number/Frame Time Remaining Register 0xDE408 32 read-only n 0x0 0x0 FRNUM Frame Number 0 16 read-only FRREM Frame Time Remaining 16 16 read-only HPRT Host Port Control and Status Register 0xDE440 32 read-write n 0x0 0x0 PRTCONNDET Port Connect Detected 1 1 read-write PRTCONNSTS Port Connect Status 0 1 read-only PRTENA Port Enable 2 1 read-write PRTENCHNG Port Enable/Disable Change 3 1 read-write PRTLNSTS Port Line Status 10 2 read-only PRTOVRCURRACT Port Overcurrent Active 4 1 read-only PRTOVRCURRCHNG Port Overcurrent Change 5 1 read-write PRTPWR Port Power 12 1 read-write PRTRES Port Resume 6 1 read-write PRTRST Port Reset 8 1 read-write PRTSPD Port Speed 17 2 read-only FS Full speed. 0x00000001 LS Low speed. 0x00000002 PRTSUSP Port Suspend 7 1 read-write PRTTSTCTL Port Test Control 13 4 read-write DISABLE Test mode disabled. 0x00000000 J Test_J mode. 0x00000001 K Test_K mode. 0x00000002 SE0NAK Test_SE0_NAK mode. 0x00000003 PACKET Test_Packet mode. 0x00000004 FORCE Test_Force_Enable. 0x00000005 HPTXFSIZ Host Periodic Transmit FIFO Size Register 0xDE100 32 read-write n 0x0 0x0 PTXFSIZE Host Periodic TxFIFO Depth 16 10 read-write PTXFSTADDR Host Periodic TxFIFO Start Address 0 11 read-write HPTXSTS Host Periodic Transmit FIFO/Queue Status Register 0xDE410 32 read-only n 0x0 0x0 PTXFSPCAVAIL Periodic Transmit Data FIFO Space Available 0 16 read-only PTXQSPCAVAIL Periodic Transmit Request Queue Space Available 16 8 read-only PTXQTOP Top of the Periodic Transmit Request Queue 24 8 read-only IEN Interrupt Enable Register 0x14 32 read-write n 0x0 0x0 DCD DCD Interrupt Enable 9 1 read-write ERR ERR Interrupt Enable 8 1 read-write PD PD Interrupt Enable 10 1 read-write SD SD Interrupt Enable 11 1 read-write VBUSDETH VBUSDETH Interrupt Enable 0 1 read-write VBUSDETL VBUSDETL Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0x8 32 read-only n 0x0 0x0 DCD Data Contact Detection Complete Interrupt Flag 9 1 read-only ERR Detection Error Interrupt Flag 8 1 read-only PD Primary Detection Complete Interrupt Flag 10 1 read-only SD Secondary Detection Complete Interrupt Flag 11 1 read-only VBUSDETH VBUS Detect High Interrupt Flag 0 1 read-only VBUSDETL VBUS Detect Low Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x10 32 write-only n 0x0 0x0 DCD Clear DCD Interrupt Flag 9 1 write-only ERR Clear ERR Interrupt Flag 8 1 write-only PD Clear PD Interrupt Flag 10 1 write-only SD Clear SD Interrupt Flag 11 1 write-only VBUSDETH Clear VBUSDETH Interrupt Flag 0 1 write-only VBUSDETL Clear VBUSDETL Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0xC 32 write-only n 0x0 0x0 DCD Set DCD Interrupt Flag 9 1 write-only ERR Set ERR Interrupt Flag 8 1 write-only PD Set PD Interrupt Flag 10 1 write-only SD Set SD Interrupt Flag 11 1 write-only VBUSDETH Set VBUSDETH Interrupt Flag 0 1 write-only VBUSDETL Set VBUSDETL Interrupt Flag 1 1 write-only LEMCTRL USB LEM Control Register 0x3C 32 read-write n 0x0 0x0 TIMEBASE Set the Number of LFC Clk Counts to Form 3ms 0 10 read-write PCGCCTL Power and Clock Gating Control Register 0xDEE00 32 read-write n 0x0 0x0 GATEHCLK Gate HCLK 1 1 read-write PHYSLEEP PHY In Sleep 6 1 read-only PWRCLMP Power Clamp 2 1 read-write RESETAFTERSUSP Reset after suspend 8 1 read-only RSTPDWNMODULE Reset Power-Down Modules 3 1 read-write STOPPCLK Stop PHY clock 0 1 read-write ROUTE I/O Routing Register 0x18 32 read-write n 0x0 0x0 PHYPEN USB PHY Pin Enable 0 1 read-write VBUSENPEN VBUSEN Pin Enable 1 1 read-write STATUS System Status Register 0x4 32 read-only n 0x0 0x0 ACAFS ACA Full Speed TypeB Device 12 1 read-only ACALS ACA Low Speed TypeB Device 13 1 read-only CDP Charging Downstream Port Detected 10 1 read-only DCDTO Data Contact Detection Timeout 8 1 read-only DCP Dedicated Charging Port Detected 11 1 read-only LEMACTIVE Low Energy Mode Active 2 1 read-only SDP Standard Downstream Port Detected 9 1 read-only USBCDBUSY USB Charger Detect Busy 15 1 read-only VBUSDETH VBUS Detect High 0 1 read-only VDAC0 VDAC0 VDAC0 0x0 0x0 0x400 registers n VDAC0 46 CAL Calibration Register 0x30 32 read-write n 0x0 0x0 GAINERRTRIM Gain Error Trim Value 8 6 read-write GAINERRTRIMCH1 Gain Error Trim Value for CH1 16 4 read-write OFFSETTRIM Input Buffer Offset Calibration Value 0 3 read-write CH0CTRL Channel 0 Control Register 0x8 32 read-write n 0x0 0x0 CONVMODE Conversion Mode 0 1 read-write PRSASYNC Channel 0 PRS Asynchronous Enable 8 1 read-write PRSSEL Channel 0 PRS Trigger Select 12 5 read-write PRSCH0 PRS ch 0 triggers a conversion. 0x00000000 PRSCH1 PRS ch 1 triggers a conversion. 0x00000001 PRSCH2 PRS ch 2 triggers a conversion. 0x00000002 PRSCH3 PRS ch 3 triggers a conversion. 0x00000003 PRSCH4 PRS ch 4 triggers a conversion. 0x00000004 PRSCH5 PRS ch 5 triggers a conversion. 0x00000005 PRSCH6 PRS ch 6 triggers a conversion. 0x00000006 PRSCH7 PRS ch 7 triggers a conversion. 0x00000007 PRSCH8 PRS ch 8 triggers a conversion. 0x00000008 PRSCH9 PRS ch 9 triggers a conversion. 0x00000009 PRSCH10 PRS ch 10 triggers a conversion. 0x0000000A PRSCH11 PRS ch 11 triggers a conversion. 0x0000000B PRSCH12 PRS ch 12 triggers a conversion. 0x0000000C PRSCH13 PRS ch 13 triggers a conversion. 0x0000000D PRSCH14 PRS ch 14 triggers a conversion. 0x0000000E PRSCH15 PRS ch 15 triggers a conversion. 0x0000000F PRSCH16 PRS ch 16 triggers a conversion. 0x00000010 PRSCH17 PRS ch 17 triggers a conversion. 0x00000011 PRSCH18 PRS ch 18 triggers a conversion. 0x00000012 PRSCH19 PRS ch 19 triggers a conversion. 0x00000013 PRSCH20 PRS ch 20 triggers a conversion. 0x00000014 PRSCH21 PRS ch 21 triggers a conversion. 0x00000015 PRSCH22 PRS ch 22 triggers a conversion. 0x00000016 PRSCH23 PRS ch 23 triggers a conversion. 0x00000017 TRIGMODE Channel 0 Trigger Mode 4 3 read-write SW Channel 0 is triggered by CH0DATA or COMBDATA write 0x00000000 PRS Channel 0 is triggered by PRS input 0x00000001 REFRESH Channel 0 is triggered by Refresh timer 0x00000002 SWPRS Channel 0 is triggered by CH0DATA/COMBDATA write or PRS input 0x00000003 SWREFRESH Channel 0 is triggered by CH0DATA/COMBDATA write or Refresh timer 0x00000004 LESENSE Channel 0 is triggered by LESENSE 0x00000005 CH0DATA Channel 0 Data Register 0x24 32 read-write n 0x0 0x0 DATA Channel 0 Data 0 12 read-write CH1CTRL Channel 1 Control Register 0xC 32 read-write n 0x0 0x0 CONVMODE Conversion Mode 0 1 read-write PRSASYNC Channel 1 PRS Asynchronous Enable 8 1 read-write PRSSEL Channel 1 PRS Trigger Select 12 5 read-write PRSCH0 PRS ch 0 triggers a conversion. 0x00000000 PRSCH1 PRS ch 1 triggers a conversion. 0x00000001 PRSCH2 PRS ch 2 triggers a conversion. 0x00000002 PRSCH3 PRS ch 3 triggers a conversion. 0x00000003 PRSCH4 PRS ch 4 triggers a conversion. 0x00000004 PRSCH5 PRS ch 5 triggers a conversion. 0x00000005 PRSCH6 PRS ch 6 triggers a conversion. 0x00000006 PRSCH7 PRS ch 7 triggers a conversion. 0x00000007 PRSCH8 PRS ch 8 triggers a conversion. 0x00000008 PRSCH9 PRS ch 9 triggers a conversion. 0x00000009 PRSCH10 PRS ch 10 triggers a conversion. 0x0000000A PRSCH11 PRS ch 11 triggers a conversion. 0x0000000B PRSCH12 PRS ch 12 triggers a conversion. 0x0000000C PRSCH13 PRS ch 13 triggers a conversion. 0x0000000D PRSCH14 PRS ch 14 triggers a conversion. 0x0000000E PRSCH15 PRS ch 15 triggers a conversion. 0x0000000F PRSCH16 PRS ch 16 triggers a conversion. 0x00000010 PRSCH17 PRS ch 17 triggers a conversion. 0x00000011 PRSCH18 PRS ch 18 triggers a conversion. 0x00000012 PRSCH19 PRS ch 19 triggers a conversion. 0x00000013 PRSCH20 PRS ch 20 triggers a conversion. 0x00000014 PRSCH21 PRS ch 21 triggers a conversion. 0x00000015 PRSCH22 PRS ch 22 triggers a conversion. 0x00000016 PRSCH23 PRS ch 23 triggers a conversion. 0x00000017 TRIGMODE Channel 1 Trigger Mode 4 3 read-write SW Channel 1 is triggered by CH1DATA or COMBDATA write 0x00000000 PRS Channel 1 is triggered by PRS input 0x00000001 REFRESH Channel 1 is triggered by Refresh timer 0x00000002 SWPRS Channel 1 is triggered by CH1DATA/COMBDATA write or PRS input 0x00000003 SWREFRESH Channel 1 is triggered by CH1DATA/COMBDATA write or Refresh timer 0x00000004 LESENSE Channel 1 is triggered by LESENSE 0x00000005 CH1DATA Channel 1 Data Register 0x28 32 read-write n 0x0 0x0 DATA Channel 1 Data 0 12 read-write CMD Command Register 0x10 32 write-only n 0x0 0x0 CH0DIS DAC Channel 0 Disable 1 1 write-only CH0EN DAC Channel 0 Enable 0 1 write-only CH1DIS DAC Channel 1 Disable 3 1 write-only CH1EN DAC Channel 1 Enable 2 1 write-only OPA0DIS OPA0 Disable 17 1 write-only OPA0EN OPA0 Enable 16 1 write-only OPA1DIS OPA1 Disable 19 1 write-only OPA1EN OPA1 Enable 18 1 write-only OPA2DIS OPA2 Disable 21 1 write-only OPA2EN OPA2 Enable 20 1 write-only OPA3DIS OPA3 Disable 23 1 write-only OPA3EN OPA3 Enable 22 1 write-only COMBDATA Combined Data Register 0x2C 32 read-write n 0x0 0x0 CH0DATA Channel 0 Data 0 12 read-write CH1DATA Channel 1 Data 16 12 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 CH0PRESCRST Channel 0 Start Reset Prescaler 6 1 read-write DACCLKMODE Clock Mode 31 1 read-write DIFF Differential Mode 0 1 read-write OUTENPRS PRS Controlled Output Enable 5 1 read-write PRESC Prescaler Setting for DAC Clock 16 7 read-write NODIVISION None 0x00000000 REFRESHPERIOD Refresh Period 24 2 read-write 8CYCLES All channels with enabled refresh are refreshed every 8 DAC_CLK cycles 0x00000000 16CYCLES All channels with enabled refresh are refreshed every 16 DAC_CLK cycles 0x00000001 32CYCLES All channels with enabled refresh are refreshed every 32 DAC_CLK cycles 0x00000002 64CYCLES All channels with enabled refresh are refreshed every 64 DAC_CLK cycles 0x00000003 REFSEL Reference Selection 8 3 read-write 1V25LN Internal low noise 1.25 V bandgap reference 0x00000000 2V5LN Internal low noise 2.5 V bandgap reference 0x00000001 1V25 Internal 1.25 V bandgap reference 0x00000002 2V5 Internal 2.5 V bandgap reference 0x00000003 VDD AVDD reference 0x00000004 EXT External pin reference 0x00000006 SINEMODE Sine Mode 4 1 read-write WARMUPMODE Warm-up Mode 28 1 read-write IEN Interrupt Enable Register 0x20 32 read-write n 0x0 0x0 CH0BL CH0BL Interrupt Enable 6 1 read-write CH0CD CH0CD Interrupt Enable 0 1 read-write CH0OF CH0OF Interrupt Enable 2 1 read-write CH0UF CH0UF Interrupt Enable 4 1 read-write CH1BL CH1BL Interrupt Enable 7 1 read-write CH1CD CH1CD Interrupt Enable 1 1 read-write CH1OF CH1OF Interrupt Enable 3 1 read-write CH1UF CH1UF Interrupt Enable 5 1 read-write EM23ERR EM23ERR Interrupt Enable 15 1 read-write OPA0APORTCONFLICT OPA0APORTCONFLICT Interrupt Enable 16 1 read-write OPA0OUTVALID OPA0OUTVALID Interrupt Enable 28 1 read-write OPA0PRSTIMEDERR OPA0PRSTIMEDERR Interrupt Enable 20 1 read-write OPA1APORTCONFLICT OPA1APORTCONFLICT Interrupt Enable 17 1 read-write OPA1OUTVALID OPA1OUTVALID Interrupt Enable 29 1 read-write OPA1PRSTIMEDERR OPA1PRSTIMEDERR Interrupt Enable 21 1 read-write OPA2APORTCONFLICT OPA2APORTCONFLICT Interrupt Enable 18 1 read-write OPA2OUTVALID OPA2OUTVALID Interrupt Enable 30 1 read-write OPA2PRSTIMEDERR OPA2PRSTIMEDERR Interrupt Enable 22 1 read-write OPA3APORTCONFLICT OPA3APORTCONFLICT Interrupt Enable 19 1 read-write OPA3OUTVALID OPA3OUTVALID Interrupt Enable 31 1 read-write OPA3PRSTIMEDERR OPA3PRSTIMEDERR Interrupt Enable 23 1 read-write IF Interrupt Flag Register 0x14 32 read-only n 0x0 0x0 CH0BL Channel 0 Buffer Level Interrupt Flag 6 1 read-only CH0CD Channel 0 Conversion Done Interrupt Flag 0 1 read-only CH0OF Channel 0 Data Overflow Interrupt Flag 2 1 read-only CH0UF Channel 0 Data Underflow Interrupt Flag 4 1 read-only CH1BL Channel 1 Buffer Level Interrupt Flag 7 1 read-only CH1CD Channel 1 Conversion Done Interrupt Flag 1 1 read-only CH1OF Channel 1 Data Overflow Interrupt Flag 3 1 read-only CH1UF Channel 1 Data Underflow Interrupt Flag 5 1 read-only EM23ERR EM2/3 Entry Error Flag 15 1 read-only OPA0APORTCONFLICT OPA0 Bus Conflict Output Interrupt Flag 16 1 read-only OPA0OUTVALID OPA0 Output Valid Interrupt Flag 28 1 read-only OPA0PRSTIMEDERR OPA0 PRS Trigger Mode Error Interrupt Flag 20 1 read-only OPA1APORTCONFLICT OPA1 Bus Conflict Output Interrupt Flag 17 1 read-only OPA1OUTVALID OPA1 Output Valid Interrupt Flag 29 1 read-only OPA1PRSTIMEDERR OPA1 PRS Trigger Mode Error Interrupt Flag 21 1 read-only OPA2APORTCONFLICT OPA2 Bus Conflict Output Interrupt Flag 18 1 read-only OPA2OUTVALID OPA3 Output Valid Interrupt Flag 30 1 read-only OPA2PRSTIMEDERR OPA2 PRS Trigger Mode Error Interrupt Flag 22 1 read-only OPA3APORTCONFLICT OPA3 Bus Conflict Output Interrupt Flag 19 1 read-only OPA3OUTVALID OPA3 Output Valid Interrupt Flag 31 1 read-only OPA3PRSTIMEDERR OPA3 PRS Trigger Mode Error Interrupt Flag 23 1 read-only IFC Interrupt Flag Clear Register 0x1C 32 write-only n 0x0 0x0 CH0CD Clear CH0CD Interrupt Flag 0 1 write-only CH0OF Clear CH0OF Interrupt Flag 2 1 write-only CH0UF Clear CH0UF Interrupt Flag 4 1 write-only CH1CD Clear CH1CD Interrupt Flag 1 1 write-only CH1OF Clear CH1OF Interrupt Flag 3 1 write-only CH1UF Clear CH1UF Interrupt Flag 5 1 write-only EM23ERR Clear EM23ERR Interrupt Flag 15 1 write-only OPA0APORTCONFLICT Clear OPA0APORTCONFLICT Interrupt Flag 16 1 write-only OPA0OUTVALID Clear OPA0OUTVALID Interrupt Flag 28 1 write-only OPA0PRSTIMEDERR Clear OPA0PRSTIMEDERR Interrupt Flag 20 1 write-only OPA1APORTCONFLICT Clear OPA1APORTCONFLICT Interrupt Flag 17 1 write-only OPA1OUTVALID Clear OPA1OUTVALID Interrupt Flag 29 1 write-only OPA1PRSTIMEDERR Clear OPA1PRSTIMEDERR Interrupt Flag 21 1 write-only OPA2APORTCONFLICT Clear OPA2APORTCONFLICT Interrupt Flag 18 1 write-only OPA2OUTVALID Clear OPA2OUTVALID Interrupt Flag 30 1 write-only OPA2PRSTIMEDERR Clear OPA2PRSTIMEDERR Interrupt Flag 22 1 write-only OPA3APORTCONFLICT Clear OPA3APORTCONFLICT Interrupt Flag 19 1 write-only OPA3OUTVALID Clear OPA3OUTVALID Interrupt Flag 31 1 write-only OPA3PRSTIMEDERR Clear OPA3PRSTIMEDERR Interrupt Flag 23 1 write-only IFS Interrupt Flag Set Register 0x18 32 write-only n 0x0 0x0 CH0CD Set CH0CD Interrupt Flag 0 1 write-only CH0OF Set CH0OF Interrupt Flag 2 1 write-only CH0UF Set CH0UF Interrupt Flag 4 1 write-only CH1CD Set CH1CD Interrupt Flag 1 1 write-only CH1OF Set CH1OF Interrupt Flag 3 1 write-only CH1UF Set CH1UF Interrupt Flag 5 1 write-only EM23ERR Set EM23ERR Interrupt Flag 15 1 write-only OPA0APORTCONFLICT Set OPA0APORTCONFLICT Interrupt Flag 16 1 write-only OPA0OUTVALID Set OPA0OUTVALID Interrupt Flag 28 1 write-only OPA0PRSTIMEDERR Set OPA0PRSTIMEDERR Interrupt Flag 20 1 write-only OPA1APORTCONFLICT Set OPA1APORTCONFLICT Interrupt Flag 17 1 write-only OPA1OUTVALID Set OPA1OUTVALID Interrupt Flag 29 1 write-only OPA1PRSTIMEDERR Set OPA1PRSTIMEDERR Interrupt Flag 21 1 write-only OPA2APORTCONFLICT Set OPA2APORTCONFLICT Interrupt Flag 18 1 write-only OPA2OUTVALID Set OPA2OUTVALID Interrupt Flag 30 1 write-only OPA2PRSTIMEDERR Set OPA2PRSTIMEDERR Interrupt Flag 22 1 write-only OPA3APORTCONFLICT Set OPA3APORTCONFLICT Interrupt Flag 19 1 write-only OPA3OUTVALID Set OPA3OUTVALID Interrupt Flag 31 1 write-only OPA3PRSTIMEDERR Set OPA3PRSTIMEDERR Interrupt Flag 23 1 write-only OPA0_APORTCONFLICT Operational Amplifier APORT Conflict Status Register 0xA4 32 read-only n 0x0 0x0 APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only OPA0_APORTREQ Operational Amplifier APORT Request Status Register 0xA0 32 read-only n 0x0 0x0 APORT1XREQ 1 If the Bus Connected to APORT2X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1X is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only OPA0_CAL Operational Amplifier Calibration Register 0xB8 32 read-write n 0x0 0x0 CM1 Compensation Cap Cm1 Trim Value 0 4 read-write CM2 Compensation Cap Cm2 Trim Value 5 4 read-write CM3 Compensation Cap Cm3 Trim Value 10 2 read-write GM Gm Trim Value 13 3 read-write GM3 Gm3 Trim Value 17 2 read-write OFFSETN OPAx Inverting Input Offset Configuration Value 26 5 read-write OFFSETP OPAx Non-Inverting Input Offset Configuration Value 20 5 read-write OPA0_CTRL Operational Amplifier Control Register 0xA8 32 read-write n 0x0 0x0 APORTXMASTERDIS APORT Bus Master Disable 20 1 read-write APORTYMASTERDIS APORT Bus Master Disable 21 1 read-write DRIVESTRENGTH OPAx Operation Mode 0 2 read-write 0 Lower accuracy with Low drive strength. 0x00000000 1 Low accuracy with Low drive strength. 0x00000001 2 High accuracy with High drive strength. 0x00000002 3 Higher accuracy with High drive strength. 0x00000003 HCMDIS High Common Mode Disable 3 1 read-write INCBW OPAx Unity Gain Bandwidth Scale 2 1 read-write OUTSCALE Scale OPAx Output Driving Strength 4 1 read-write PRSEN OPAx PRS Trigger Enable 8 1 read-write PRSMODE OPAx PRS Trigger Mode 9 1 read-write PRSOUTMODE OPAx PRS Output Select 16 1 read-write PRSSEL OPAx PRS Trigger Select 10 5 read-write PRSCH0 PRS ch 0 triggers OPA. 0x00000000 PRSCH1 PRS ch 1 triggers OPA. 0x00000001 PRSCH2 PRS ch 2 triggers OPA. 0x00000002 PRSCH3 PRS ch 3 triggers OPA. 0x00000003 PRSCH4 PRS ch 4 triggers OPA. 0x00000004 PRSCH5 PRS ch 5 triggers OPA. 0x00000005 PRSCH6 PRS ch 6 triggers OPA. 0x00000006 PRSCH7 PRS ch 7 triggers OPA. 0x00000007 PRSCH8 PRS ch 8 triggers OPA. 0x00000008 PRSCH9 PRS ch 9 triggers OPA. 0x00000009 PRSCH10 PRS ch 10 triggers OPA. 0x0000000A PRSCH11 PRS ch 11 triggers OPA. 0x0000000B PRSCH12 PRS ch 12 triggers OPA. 0x0000000C PRSCH13 PRS ch 13 triggers OPA. 0x0000000D PRSCH14 PRS ch 14 triggers OPA. 0x0000000E PRSCH15 PRS ch 15 triggers OPA. 0x0000000F PRSCH16 PRS ch 16 triggers OPA. 0x00000010 PRSCH17 PRS ch 17 triggers OPA. 0x00000011 PRSCH18 PRS ch 18 triggers OPA. 0x00000012 PRSCH19 PRS ch 19 triggers OPA. 0x00000013 PRSCH20 PRS ch 20 triggers OPA. 0x00000014 PRSCH21 PRS ch 21 triggers OPA. 0x00000015 PRSCH22 PRS ch 22 triggers OPA. 0x00000016 PRSCH23 PRS ch 23 triggers OPA. 0x00000017 OPA0_MUX Operational Amplifier Mux Configuration Register 0xB0 32 read-write n 0x0 0x0 GAIN3X OPAx Dedicated 3x Gain Resistor Ladder 20 1 read-write NEGSEL OPAx Inverting Input Mux 8 8 read-write POSSEL OPAx Non-inverting Input Mux 0 8 read-write RESINMUX OPAx Resistor Ladder Input Mux 16 3 read-write DISABLE Set for Unity Gain 0x00000000 OPANEXT Set for NEXTOUT(x-1) input 0x00000001 NEGPAD NEG pad connected 0x00000002 POSPAD POS pad connected 0x00000003 COMPAD Neg pad of OPA0 connected. Direct input to support common reference. 0x00000004 CENTER OPA0 and OPA1 Resmux connected to form fully differential instrumentation amplifier. 0x00000005 VSS VSS connected 0x00000006 RESSEL OPAx Resistor Ladder Select 24 3 read-write RES0 Gain of 1/3 0x00000000 RES1 Gain of 1 0x00000001 RES2 Gain of 1 2/3 0x00000002 RES3 Gain of 2 1/5 0x00000003 RES4 Gain of 3 0x00000004 RES5 Gain of 4 1/3 0x00000005 RES6 Gain of 7 0x00000006 RES7 Gain of 15 0x00000007 OPA0_OUT Operational Amplifier Output Configuration Register 0xB4 32 read-write n 0x0 0x0 ALTOUTEN OPAx Alternative Output Enable 1 1 read-write ALTOUTPADEN OPAx Output Enable Value 4 5 read-write OUT0 Alternate Output 0 0x00000001 OUT1 Alternate Output 1 0x00000002 OUT2 Alternate Output 2 0x00000004 OUT3 Alternate Output 3 0x00000008 OUT4 Alternate Output 4 0x00000010 APORTOUTEN OPAx Aport Output Enable 2 1 read-write APORTOUTSEL OPAx APORT Output 16 8 read-write MAINOUTEN OPAx Main Output Enable 0 1 read-write SHORT OPAx Main and Alternative Output Short 3 1 read-write OPA0_TIMER Operational Amplifier Timer Control Register 0xAC 32 read-write n 0x0 0x0 SETTLETIME OPAx Output Settling Timeout Value 16 10 read-write STARTUPDLY OPAx Startup Delay Count Value 0 6 read-write WARMUPTIME OPAx Warmup Time Count Value 8 7 read-write OPA1_APORTCONFLICT Operational Amplifier APORT Conflict Status Register 0xC4 32 read-only n 0x0 0x0 APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only OPA1_APORTREQ Operational Amplifier APORT Request Status Register 0xC0 32 read-only n 0x0 0x0 APORT1XREQ 1 If the Bus Connected to APORT2X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1X is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only OPA1_CAL Operational Amplifier Calibration Register 0xD8 32 read-write n 0x0 0x0 CM1 Compensation Cap Cm1 Trim Value 0 4 read-write CM2 Compensation Cap Cm2 Trim Value 5 4 read-write CM3 Compensation Cap Cm3 Trim Value 10 2 read-write GM Gm Trim Value 13 3 read-write GM3 Gm3 Trim Value 17 2 read-write OFFSETN OPAx Inverting Input Offset Configuration Value 26 5 read-write OFFSETP OPAx Non-Inverting Input Offset Configuration Value 20 5 read-write OPA1_CTRL Operational Amplifier Control Register 0xC8 32 read-write n 0x0 0x0 APORTXMASTERDIS APORT Bus Master Disable 20 1 read-write APORTYMASTERDIS APORT Bus Master Disable 21 1 read-write DRIVESTRENGTH OPAx Operation Mode 0 2 read-write 0 Lower accuracy with Low drive strength. 0x00000000 1 Low accuracy with Low drive strength. 0x00000001 2 High accuracy with High drive strength. 0x00000002 3 Higher accuracy with High drive strength. 0x00000003 HCMDIS High Common Mode Disable 3 1 read-write INCBW OPAx Unity Gain Bandwidth Scale 2 1 read-write OUTSCALE Scale OPAx Output Driving Strength 4 1 read-write PRSEN OPAx PRS Trigger Enable 8 1 read-write PRSMODE OPAx PRS Trigger Mode 9 1 read-write PRSOUTMODE OPAx PRS Output Select 16 1 read-write PRSSEL OPAx PRS Trigger Select 10 5 read-write PRSCH0 PRS ch 0 triggers OPA. 0x00000000 PRSCH1 PRS ch 1 triggers OPA. 0x00000001 PRSCH2 PRS ch 2 triggers OPA. 0x00000002 PRSCH3 PRS ch 3 triggers OPA. 0x00000003 PRSCH4 PRS ch 4 triggers OPA. 0x00000004 PRSCH5 PRS ch 5 triggers OPA. 0x00000005 PRSCH6 PRS ch 6 triggers OPA. 0x00000006 PRSCH7 PRS ch 7 triggers OPA. 0x00000007 PRSCH8 PRS ch 8 triggers OPA. 0x00000008 PRSCH9 PRS ch 9 triggers OPA. 0x00000009 PRSCH10 PRS ch 10 triggers OPA. 0x0000000A PRSCH11 PRS ch 11 triggers OPA. 0x0000000B PRSCH12 PRS ch 12 triggers OPA. 0x0000000C PRSCH13 PRS ch 13 triggers OPA. 0x0000000D PRSCH14 PRS ch 14 triggers OPA. 0x0000000E PRSCH15 PRS ch 15 triggers OPA. 0x0000000F PRSCH16 PRS ch 16 triggers OPA. 0x00000010 PRSCH17 PRS ch 17 triggers OPA. 0x00000011 PRSCH18 PRS ch 18 triggers OPA. 0x00000012 PRSCH19 PRS ch 19 triggers OPA. 0x00000013 PRSCH20 PRS ch 20 triggers OPA. 0x00000014 PRSCH21 PRS ch 21 triggers OPA. 0x00000015 PRSCH22 PRS ch 22 triggers OPA. 0x00000016 PRSCH23 PRS ch 23 triggers OPA. 0x00000017 OPA1_MUX Operational Amplifier Mux Configuration Register 0xD0 32 read-write n 0x0 0x0 GAIN3X OPAx Dedicated 3x Gain Resistor Ladder 20 1 read-write NEGSEL OPAx Inverting Input Mux 8 8 read-write POSSEL OPAx Non-inverting Input Mux 0 8 read-write RESINMUX OPAx Resistor Ladder Input Mux 16 3 read-write DISABLE Set for Unity Gain 0x00000000 OPANEXT Set for NEXTOUT(x-1) input 0x00000001 NEGPAD NEG pad connected 0x00000002 POSPAD POS pad connected 0x00000003 COMPAD Neg pad of OPA0 connected. Direct input to support common reference. 0x00000004 CENTER OPA0 and OPA1 Resmux connected to form fully differential instrumentation amplifier. 0x00000005 VSS VSS connected 0x00000006 RESSEL OPAx Resistor Ladder Select 24 3 read-write RES0 Gain of 1/3 0x00000000 RES1 Gain of 1 0x00000001 RES2 Gain of 1 2/3 0x00000002 RES3 Gain of 2 1/5 0x00000003 RES4 Gain of 3 0x00000004 RES5 Gain of 4 1/3 0x00000005 RES6 Gain of 7 0x00000006 RES7 Gain of 15 0x00000007 OPA1_OUT Operational Amplifier Output Configuration Register 0xD4 32 read-write n 0x0 0x0 ALTOUTEN OPAx Alternative Output Enable 1 1 read-write ALTOUTPADEN OPAx Output Enable Value 4 5 read-write OUT0 Alternate Output 0 0x00000001 OUT1 Alternate Output 1 0x00000002 OUT2 Alternate Output 2 0x00000004 OUT3 Alternate Output 3 0x00000008 OUT4 Alternate Output 4 0x00000010 APORTOUTEN OPAx Aport Output Enable 2 1 read-write APORTOUTSEL OPAx APORT Output 16 8 read-write MAINOUTEN OPAx Main Output Enable 0 1 read-write SHORT OPAx Main and Alternative Output Short 3 1 read-write OPA1_TIMER Operational Amplifier Timer Control Register 0xCC 32 read-write n 0x0 0x0 SETTLETIME OPAx Output Settling Timeout Value 16 10 read-write STARTUPDLY OPAx Startup Delay Count Value 0 6 read-write WARMUPTIME OPAx Warmup Time Count Value 8 7 read-write OPA2_APORTCONFLICT Operational Amplifier APORT Conflict Status Register 0xE4 32 read-only n 0x0 0x0 APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only OPA2_APORTREQ Operational Amplifier APORT Request Status Register 0xE0 32 read-only n 0x0 0x0 APORT1XREQ 1 If the Bus Connected to APORT2X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1X is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only OPA2_CAL Operational Amplifier Calibration Register 0xF8 32 read-write n 0x0 0x0 CM1 Compensation Cap Cm1 Trim Value 0 4 read-write CM2 Compensation Cap Cm2 Trim Value 5 4 read-write CM3 Compensation Cap Cm3 Trim Value 10 2 read-write GM Gm Trim Value 13 3 read-write GM3 Gm3 Trim Value 17 2 read-write OFFSETN OPAx Inverting Input Offset Configuration Value 26 5 read-write OFFSETP OPAx Non-Inverting Input Offset Configuration Value 20 5 read-write OPA2_CTRL Operational Amplifier Control Register 0xE8 32 read-write n 0x0 0x0 APORTXMASTERDIS APORT Bus Master Disable 20 1 read-write APORTYMASTERDIS APORT Bus Master Disable 21 1 read-write DRIVESTRENGTH OPAx Operation Mode 0 2 read-write 0 Lower accuracy with Low drive strength. 0x00000000 1 Low accuracy with Low drive strength. 0x00000001 2 High accuracy with High drive strength. 0x00000002 3 Higher accuracy with High drive strength. 0x00000003 HCMDIS High Common Mode Disable 3 1 read-write INCBW OPAx Unity Gain Bandwidth Scale 2 1 read-write OUTSCALE Scale OPAx Output Driving Strength 4 1 read-write PRSEN OPAx PRS Trigger Enable 8 1 read-write PRSMODE OPAx PRS Trigger Mode 9 1 read-write PRSOUTMODE OPAx PRS Output Select 16 1 read-write PRSSEL OPAx PRS Trigger Select 10 5 read-write PRSCH0 PRS ch 0 triggers OPA. 0x00000000 PRSCH1 PRS ch 1 triggers OPA. 0x00000001 PRSCH2 PRS ch 2 triggers OPA. 0x00000002 PRSCH3 PRS ch 3 triggers OPA. 0x00000003 PRSCH4 PRS ch 4 triggers OPA. 0x00000004 PRSCH5 PRS ch 5 triggers OPA. 0x00000005 PRSCH6 PRS ch 6 triggers OPA. 0x00000006 PRSCH7 PRS ch 7 triggers OPA. 0x00000007 PRSCH8 PRS ch 8 triggers OPA. 0x00000008 PRSCH9 PRS ch 9 triggers OPA. 0x00000009 PRSCH10 PRS ch 10 triggers OPA. 0x0000000A PRSCH11 PRS ch 11 triggers OPA. 0x0000000B PRSCH12 PRS ch 12 triggers OPA. 0x0000000C PRSCH13 PRS ch 13 triggers OPA. 0x0000000D PRSCH14 PRS ch 14 triggers OPA. 0x0000000E PRSCH15 PRS ch 15 triggers OPA. 0x0000000F PRSCH16 PRS ch 16 triggers OPA. 0x00000010 PRSCH17 PRS ch 17 triggers OPA. 0x00000011 PRSCH18 PRS ch 18 triggers OPA. 0x00000012 PRSCH19 PRS ch 19 triggers OPA. 0x00000013 PRSCH20 PRS ch 20 triggers OPA. 0x00000014 PRSCH21 PRS ch 21 triggers OPA. 0x00000015 PRSCH22 PRS ch 22 triggers OPA. 0x00000016 PRSCH23 PRS ch 23 triggers OPA. 0x00000017 OPA2_MUX Operational Amplifier Mux Configuration Register 0xF0 32 read-write n 0x0 0x0 GAIN3X OPAx Dedicated 3x Gain Resistor Ladder 20 1 read-write NEGSEL OPAx Inverting Input Mux 8 8 read-write POSSEL OPAx Non-inverting Input Mux 0 8 read-write RESINMUX OPAx Resistor Ladder Input Mux 16 3 read-write DISABLE Set for Unity Gain 0x00000000 OPANEXT Set for NEXTOUT(x-1) input 0x00000001 NEGPAD NEG pad connected 0x00000002 POSPAD POS pad connected 0x00000003 COMPAD Neg pad of OPA0 connected. Direct input to support common reference. 0x00000004 CENTER OPA0 and OPA1 Resmux connected to form fully differential instrumentation amplifier. 0x00000005 VSS VSS connected 0x00000006 RESSEL OPAx Resistor Ladder Select 24 3 read-write RES0 Gain of 1/3 0x00000000 RES1 Gain of 1 0x00000001 RES2 Gain of 1 2/3 0x00000002 RES3 Gain of 2 1/5 0x00000003 RES4 Gain of 3 0x00000004 RES5 Gain of 4 1/3 0x00000005 RES6 Gain of 7 0x00000006 RES7 Gain of 15 0x00000007 OPA2_OUT Operational Amplifier Output Configuration Register 0xF4 32 read-write n 0x0 0x0 ALTOUTEN OPAx Alternative Output Enable 1 1 read-write ALTOUTPADEN OPAx Output Enable Value 4 5 read-write OUT0 Alternate Output 0 0x00000001 OUT1 Alternate Output 1 0x00000002 OUT2 Alternate Output 2 0x00000004 OUT3 Alternate Output 3 0x00000008 OUT4 Alternate Output 4 0x00000010 APORTOUTEN OPAx Aport Output Enable 2 1 read-write APORTOUTSEL OPAx APORT Output 16 8 read-write MAINOUTEN OPAx Main Output Enable 0 1 read-write SHORT OPAx Main and Alternative Output Short 3 1 read-write OPA2_TIMER Operational Amplifier Timer Control Register 0xEC 32 read-write n 0x0 0x0 SETTLETIME OPAx Output Settling Timeout Value 16 10 read-write STARTUPDLY OPAx Startup Delay Count Value 0 6 read-write WARMUPTIME OPAx Warmup Time Count Value 8 7 read-write OPA3_APORTCONFLICT Operational Amplifier APORT Conflict Status Register 0x104 32 read-only n 0x0 0x0 APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only OPA3_APORTREQ Operational Amplifier APORT Request Status Register 0x100 32 read-only n 0x0 0x0 APORT1XREQ 1 If the Bus Connected to APORT2X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1X is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only OPA3_CAL Operational Amplifier Calibration Register 0x118 32 read-write n 0x0 0x0 CM1 Compensation Cap Cm1 Trim Value 0 4 read-write CM2 Compensation Cap Cm2 Trim Value 5 4 read-write CM3 Compensation Cap Cm3 Trim Value 10 2 read-write GM Gm Trim Value 13 3 read-write GM3 Gm3 Trim Value 17 2 read-write OFFSETN OPAx Inverting Input Offset Configuration Value 26 5 read-write OFFSETP OPAx Non-Inverting Input Offset Configuration Value 20 5 read-write OPA3_CTRL Operational Amplifier Control Register 0x108 32 read-write n 0x0 0x0 APORTXMASTERDIS APORT Bus Master Disable 20 1 read-write APORTYMASTERDIS APORT Bus Master Disable 21 1 read-write DRIVESTRENGTH OPAx Operation Mode 0 2 read-write 0 Lower accuracy with Low drive strength. 0x00000000 1 Low accuracy with Low drive strength. 0x00000001 2 High accuracy with High drive strength. 0x00000002 3 Higher accuracy with High drive strength. 0x00000003 HCMDIS High Common Mode Disable 3 1 read-write INCBW OPAx Unity Gain Bandwidth Scale 2 1 read-write OUTSCALE Scale OPAx Output Driving Strength 4 1 read-write PRSEN OPAx PRS Trigger Enable 8 1 read-write PRSMODE OPAx PRS Trigger Mode 9 1 read-write PRSOUTMODE OPAx PRS Output Select 16 1 read-write PRSSEL OPAx PRS Trigger Select 10 5 read-write PRSCH0 PRS ch 0 triggers OPA. 0x00000000 PRSCH1 PRS ch 1 triggers OPA. 0x00000001 PRSCH2 PRS ch 2 triggers OPA. 0x00000002 PRSCH3 PRS ch 3 triggers OPA. 0x00000003 PRSCH4 PRS ch 4 triggers OPA. 0x00000004 PRSCH5 PRS ch 5 triggers OPA. 0x00000005 PRSCH6 PRS ch 6 triggers OPA. 0x00000006 PRSCH7 PRS ch 7 triggers OPA. 0x00000007 PRSCH8 PRS ch 8 triggers OPA. 0x00000008 PRSCH9 PRS ch 9 triggers OPA. 0x00000009 PRSCH10 PRS ch 10 triggers OPA. 0x0000000A PRSCH11 PRS ch 11 triggers OPA. 0x0000000B PRSCH12 PRS ch 12 triggers OPA. 0x0000000C PRSCH13 PRS ch 13 triggers OPA. 0x0000000D PRSCH14 PRS ch 14 triggers OPA. 0x0000000E PRSCH15 PRS ch 15 triggers OPA. 0x0000000F PRSCH16 PRS ch 16 triggers OPA. 0x00000010 PRSCH17 PRS ch 17 triggers OPA. 0x00000011 PRSCH18 PRS ch 18 triggers OPA. 0x00000012 PRSCH19 PRS ch 19 triggers OPA. 0x00000013 PRSCH20 PRS ch 20 triggers OPA. 0x00000014 PRSCH21 PRS ch 21 triggers OPA. 0x00000015 PRSCH22 PRS ch 22 triggers OPA. 0x00000016 PRSCH23 PRS ch 23 triggers OPA. 0x00000017 OPA3_MUX Operational Amplifier Mux Configuration Register 0x110 32 read-write n 0x0 0x0 GAIN3X OPAx Dedicated 3x Gain Resistor Ladder 20 1 read-write NEGSEL OPAx Inverting Input Mux 8 8 read-write POSSEL OPAx Non-inverting Input Mux 0 8 read-write RESINMUX OPAx Resistor Ladder Input Mux 16 3 read-write DISABLE Set for Unity Gain 0x00000000 OPANEXT Set for NEXTOUT(x-1) input 0x00000001 NEGPAD NEG pad connected 0x00000002 POSPAD POS pad connected 0x00000003 COMPAD Neg pad of OPA0 connected. Direct input to support common reference. 0x00000004 CENTER OPA0 and OPA1 Resmux connected to form fully differential instrumentation amplifier. 0x00000005 VSS VSS connected 0x00000006 RESSEL OPAx Resistor Ladder Select 24 3 read-write RES0 Gain of 1/3 0x00000000 RES1 Gain of 1 0x00000001 RES2 Gain of 1 2/3 0x00000002 RES3 Gain of 2 1/5 0x00000003 RES4 Gain of 3 0x00000004 RES5 Gain of 4 1/3 0x00000005 RES6 Gain of 7 0x00000006 RES7 Gain of 15 0x00000007 OPA3_OUT Operational Amplifier Output Configuration Register 0x114 32 read-write n 0x0 0x0 ALTOUTEN OPAx Alternative Output Enable 1 1 read-write ALTOUTPADEN OPAx Output Enable Value 4 5 read-write OUT0 Alternate Output 0 0x00000001 OUT1 Alternate Output 1 0x00000002 OUT2 Alternate Output 2 0x00000004 OUT3 Alternate Output 3 0x00000008 OUT4 Alternate Output 4 0x00000010 APORTOUTEN OPAx Aport Output Enable 2 1 read-write APORTOUTSEL OPAx APORT Output 16 8 read-write MAINOUTEN OPAx Main Output Enable 0 1 read-write SHORT OPAx Main and Alternative Output Short 3 1 read-write OPA3_TIMER Operational Amplifier Timer Control Register 0x10C 32 read-write n 0x0 0x0 SETTLETIME OPAx Output Settling Timeout Value 16 10 read-write STARTUPDLY OPAx Startup Delay Count Value 0 6 read-write WARMUPTIME OPAx Warmup Time Count Value 8 7 read-write STATUS Status Register 0x4 32 read-only n 0x0 0x0 CH0BL Channel 0 Buffer Level 2 1 read-only CH0ENS Channel 0 Enabled Status 0 1 read-only CH0WARM Channel 0 Warm 4 1 read-only CH1BL Channel 1 Buffer Level 3 1 read-only CH1ENS Channel 1 Enabled Status 1 1 read-only CH1WARM Channel 1 Warm 5 1 read-only OPA0APORTCONFLICT OPA0 Bus Conflict Output 16 1 read-only OPA0ENS OPA0 Enabled Status 20 1 read-only OPA0OUTVALID OPA0 Output Valid Status 28 1 read-only OPA0WARM OPA0 Warm Status 24 1 read-only OPA1APORTCONFLICT OPA1 Bus Conflict Output 17 1 read-only OPA1ENS OPA1 Enabled Status 21 1 read-only OPA1OUTVALID OPA1 Output Valid Status 29 1 read-only OPA1WARM OPA1 Warm Status 25 1 read-only OPA2APORTCONFLICT OPA2 Bus Conflict Output 18 1 read-only OPA2ENS OPA2 Enabled Status 22 1 read-only OPA2OUTVALID OPA2 Output Valid Status 30 1 read-only OPA2WARM OPA2 Warm Status 26 1 read-only OPA3APORTCONFLICT OPA3 Bus Conflict Output 19 1 read-only OPA3ENS OPA3 Enabled Status 23 1 read-only OPA3OUTVALID OPA3 Output Valid Status 31 1 read-only OPA3WARM OPA3 Warm Status 27 1 read-only WDOG0 WDOG0 WDOG0 0x0 0x0 0x400 registers n WDOG0 1 CMD Command Register 0x4 32 write-only n 0x0 0x0 CLEAR Watchdog Timer Clear 0 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 CLKSEL Watchdog Clock Select 12 2 read-write ULFRCO ULFRCO 0x00000000 LFRCO LFRCO 0x00000001 LFXO LFXO 0x00000002 HFCORECLK HFCORECLK 0x00000003 CLRSRC Watchdog Clear Source 30 1 read-write DEBUGRUN Debug Mode Run Enable 1 1 read-write EM2RUN Energy Mode 2 Run Enable 2 1 read-write EM3RUN Energy Mode 3 Run Enable 3 1 read-write EM4BLOCK Energy Mode 4 Block 5 1 read-write EN Watchdog Timer Enable 0 1 read-write LOCK Configuration Lock 4 1 read-write PERSEL Watchdog Timeout Period Select 8 4 read-write SWOSCBLOCK Software Oscillator Disable Block 6 1 read-write WARNSEL Watchdog Timeout Period Select 16 2 read-write WDOGRSTDIS Watchdog Reset Disable 31 1 read-write WINSEL Watchdog Illegal Window Select 24 3 read-write IEN Interrupt Enable Register 0x28 32 read-write n 0x0 0x0 PEM0 PEM0 Interrupt Enable 3 1 read-write PEM1 PEM1 Interrupt Enable 4 1 read-write TOUT TOUT Interrupt Enable 0 1 read-write WARN WARN Interrupt Enable 1 1 read-write WIN WIN Interrupt Enable 2 1 read-write IF Watchdog Interrupt Flags 0x1C 32 read-only n 0x0 0x0 PEM0 PRS Channel Zero Event Missing Interrupt Flag 3 1 read-only PEM1 PRS Channel One Event Missing Interrupt Flag 4 1 read-only TOUT WDOG Timeout Interrupt Flag 0 1 read-only WARN WDOG Warning Timeout Interrupt Flag 1 1 read-only WIN WDOG Window Interrupt Flag 2 1 read-only IFC Interrupt Flag Clear Register 0x24 32 write-only n 0x0 0x0 PEM0 Clear PEM0 Interrupt Flag 3 1 write-only PEM1 Clear PEM1 Interrupt Flag 4 1 write-only TOUT Clear TOUT Interrupt Flag 0 1 write-only WARN Clear WARN Interrupt Flag 1 1 write-only WIN Clear WIN Interrupt Flag 2 1 write-only IFS Interrupt Flag Set Register 0x20 32 write-only n 0x0 0x0 PEM0 Set PEM0 Interrupt Flag 3 1 write-only PEM1 Set PEM1 Interrupt Flag 4 1 write-only TOUT Set TOUT Interrupt Flag 0 1 write-only WARN Set WARN Interrupt Flag 1 1 write-only WIN Set WIN Interrupt Flag 2 1 write-only PCH0_PRSCTRL PRS Control Register 0xC 32 read-write n 0x0 0x0 PRSMISSRSTEN PRS Missing Event Will Trigger a Watchdog Reset 8 1 read-write PRSSEL PRS Channel PRS Select 0 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 PCH1_PRSCTRL PRS Control Register 0x10 32 read-write n 0x0 0x0 PRSMISSRSTEN PRS Missing Event Will Trigger a Watchdog Reset 8 1 read-write PRSSEL PRS Channel PRS Select 0 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 SYNCBUSY Synchronization Busy Register 0x8 32 read-only n 0x0 0x0 CMD CMD Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only PCH0_PRSCTRL PCH0_PRSCTRL Register Busy 2 1 read-only PCH1_PRSCTRL PCH1_PRSCTRL Register Busy 3 1 read-only WDOG1 WDOG1 WDOG1 0x0 0x0 0x400 registers n WDOG1 64 CMD Command Register 0x4 32 write-only n 0x0 0x0 CLEAR Watchdog Timer Clear 0 1 write-only CTRL Control Register 0x0 32 read-write n 0x0 0x0 CLKSEL Watchdog Clock Select 12 2 read-write ULFRCO ULFRCO 0x00000000 LFRCO LFRCO 0x00000001 LFXO LFXO 0x00000002 HFCORECLK HFCORECLK 0x00000003 CLRSRC Watchdog Clear Source 30 1 read-write DEBUGRUN Debug Mode Run Enable 1 1 read-write EM2RUN Energy Mode 2 Run Enable 2 1 read-write EM3RUN Energy Mode 3 Run Enable 3 1 read-write EM4BLOCK Energy Mode 4 Block 5 1 read-write EN Watchdog Timer Enable 0 1 read-write LOCK Configuration Lock 4 1 read-write PERSEL Watchdog Timeout Period Select 8 4 read-write SWOSCBLOCK Software Oscillator Disable Block 6 1 read-write WARNSEL Watchdog Timeout Period Select 16 2 read-write WDOGRSTDIS Watchdog Reset Disable 31 1 read-write WINSEL Watchdog Illegal Window Select 24 3 read-write IEN Interrupt Enable Register 0x28 32 read-write n 0x0 0x0 PEM0 PEM0 Interrupt Enable 3 1 read-write PEM1 PEM1 Interrupt Enable 4 1 read-write TOUT TOUT Interrupt Enable 0 1 read-write WARN WARN Interrupt Enable 1 1 read-write WIN WIN Interrupt Enable 2 1 read-write IF Watchdog Interrupt Flags 0x1C 32 read-only n 0x0 0x0 PEM0 PRS Channel Zero Event Missing Interrupt Flag 3 1 read-only PEM1 PRS Channel One Event Missing Interrupt Flag 4 1 read-only TOUT WDOG Timeout Interrupt Flag 0 1 read-only WARN WDOG Warning Timeout Interrupt Flag 1 1 read-only WIN WDOG Window Interrupt Flag 2 1 read-only IFC Interrupt Flag Clear Register 0x24 32 write-only n 0x0 0x0 PEM0 Clear PEM0 Interrupt Flag 3 1 write-only PEM1 Clear PEM1 Interrupt Flag 4 1 write-only TOUT Clear TOUT Interrupt Flag 0 1 write-only WARN Clear WARN Interrupt Flag 1 1 write-only WIN Clear WIN Interrupt Flag 2 1 write-only IFS Interrupt Flag Set Register 0x20 32 write-only n 0x0 0x0 PEM0 Set PEM0 Interrupt Flag 3 1 write-only PEM1 Set PEM1 Interrupt Flag 4 1 write-only TOUT Set TOUT Interrupt Flag 0 1 write-only WARN Set WARN Interrupt Flag 1 1 write-only WIN Set WIN Interrupt Flag 2 1 write-only PCH0_PRSCTRL PRS Control Register 0xC 32 read-write n 0x0 0x0 PRSMISSRSTEN PRS Missing Event Will Trigger a Watchdog Reset 8 1 read-write PRSSEL PRS Channel PRS Select 0 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 PCH1_PRSCTRL PRS Control Register 0x10 32 read-write n 0x0 0x0 PRSMISSRSTEN PRS Missing Event Will Trigger a Watchdog Reset 8 1 read-write PRSSEL PRS Channel PRS Select 0 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 SYNCBUSY Synchronization Busy Register 0x8 32 read-only n 0x0 0x0 CMD CMD Register Busy 1 1 read-only CTRL CTRL Register Busy 0 1 read-only PCH0_PRSCTRL PCH0_PRSCTRL Register Busy 2 1 read-only PCH1_PRSCTRL PCH1_PRSCTRL Register Busy 3 1 read-only WTIMER0 WTIMER0 WTIMER0 0x0 0x0 0x400 registers n WTIMER0 41 CC0_CCV CC Channel Value Register 0x64 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC0_CCVB CC Channel Buffer Register 0x6C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC0_CCVP CC Channel Value Peek Register 0x68 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC0_CTRL CC Channel Control Register 0x60 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC1_CCV CC Channel Value Register 0x74 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC1_CCVB CC Channel Buffer Register 0x7C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC1_CCVP CC Channel Value Peek Register 0x78 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC1_CTRL CC Channel Control Register 0x70 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC2_CCV CC Channel Value Register 0x84 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC2_CCVB CC Channel Buffer Register 0x8C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC2_CCVP CC Channel Value Peek Register 0x88 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC2_CTRL CC Channel Control Register 0x80 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC3_CCV CC Channel Value Register 0x94 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC3_CCVB CC Channel Buffer Register 0x9C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC3_CCVP CC Channel Value Peek Register 0x98 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC3_CTRL CC Channel Control Register 0x90 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 32 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ATI Always Track Inputs 28 1 read-write CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DISSYNCOUT Disable Timer From Start/Stop/Reload Other Synchronized Timers 14 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 RSSCOIST Reload-Start Sets Compare Output Initial State 29 1 read-write SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write X2CNT 2x Count Mode 13 1 read-write DTCTRL DTI Control Register 0xA0 32 read-write n 0x0 0x0 DTAR DTI Always Run 9 1 read-write DTCINV DTI Complementary Output Invert 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTFATS DTI Fault Action on Timer Stop 10 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 DTFAULT DTI Fault Register 0xB0 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0xB4 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0xA8 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 5 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 2 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 3 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 4 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 5 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 6 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 7 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 8 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 9 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 10 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 11 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 12 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 13 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 14 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 15 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 16 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 17 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 18 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 19 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 20 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 21 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 22 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 23 0x00000017 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 5 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 1 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 1 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 1 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 1 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 1 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 1 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 1 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 1 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 1 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 1 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 1 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 1 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 1 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 1 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 1 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 1 0x00000017 DTLOCK DTI Configuration Lock Register 0xB8 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 DTOGEN DTI Output Generation Enable Register 0xAC 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0xA4 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 CC0 CC0 Interrupt Enable 4 1 read-write CC1 CC1 Interrupt Enable 5 1 read-write CC2 CC2 Interrupt Enable 6 1 read-write CC3 CC3 Interrupt Enable 7 1 read-write DIRCHG DIRCHG Interrupt Enable 2 1 read-write ICBOF0 ICBOF0 Interrupt Enable 8 1 read-write ICBOF1 ICBOF1 Interrupt Enable 9 1 read-write ICBOF2 ICBOF2 Interrupt Enable 10 1 read-write ICBOF3 ICBOF3 Interrupt Enable 11 1 read-write OF OF Interrupt Enable 0 1 read-write UF UF Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only CC3 CC Channel 3 Interrupt Flag 7 1 read-only DIRCHG Direction Change Detect Interrupt Flag 2 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only ICBOF3 CC Channel 3 Input Capture Buffer Overflow Interrupt Flag 11 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 CC0 Clear CC0 Interrupt Flag 4 1 write-only CC1 Clear CC1 Interrupt Flag 5 1 write-only CC2 Clear CC2 Interrupt Flag 6 1 write-only CC3 Clear CC3 Interrupt Flag 7 1 write-only DIRCHG Clear DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Clear ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Clear ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Clear ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Clear ICBOF3 Interrupt Flag 11 1 write-only OF Clear OF Interrupt Flag 0 1 write-only UF Clear UF Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 CC0 Set CC0 Interrupt Flag 4 1 write-only CC1 Set CC1 Interrupt Flag 5 1 write-only CC2 Set CC2 Interrupt Flag 6 1 write-only CC3 Set CC3 Interrupt Flag 7 1 write-only DIRCHG Set DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Set ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Set ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Set ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Set ICBOF3 Interrupt Flag 11 1 write-only OF Set OF Interrupt Flag 0 1 write-only UF Set UF Interrupt Flag 1 1 write-only LOCK TIMER Configuration Lock Register 0x2C 32 read-write n 0x0 0x0 TIMERLOCKKEY Timer Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 ROUTELOC0 I/O Routing Location Register 0x34 32 read-write n 0x0 0x0 CC0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTELOC2 I/O Routing Location Register 0x3C 32 read-write n 0x0 0x0 CDTI0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 ROUTEPEN I/O Routing Pin Enable Register 0x30 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CC3PEN CC Channel 3 Pin Enable 3 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCPOL3 CC3 Polarity 27 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only CCVBV3 CC3 CCVB Valid 11 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only ICV3 CC3 Input Capture Valid 19 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 32 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 32 read-write WTIMER1 WTIMER1 WTIMER1 0x0 0x0 0x400 registers n WTIMER1 42 CC0_CCV CC Channel Value Register 0x64 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC0_CCVB CC Channel Buffer Register 0x6C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC0_CCVP CC Channel Value Peek Register 0x68 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC0_CTRL CC Channel Control Register 0x60 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC1_CCV CC Channel Value Register 0x74 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC1_CCVB CC Channel Buffer Register 0x7C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC1_CCVP CC Channel Value Peek Register 0x78 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC1_CTRL CC Channel Control Register 0x70 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC2_CCV CC Channel Value Register 0x84 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC2_CCVB CC Channel Buffer Register 0x8C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC2_CCVP CC Channel Value Peek Register 0x88 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC2_CTRL CC Channel Control Register 0x80 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC3_CCV CC Channel Value Register 0x94 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC3_CCVB CC Channel Buffer Register 0x9C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC3_CCVP CC Channel Value Peek Register 0x98 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC3_CTRL CC Channel Control Register 0x90 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 32 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ATI Always Track Inputs 28 1 read-write CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DISSYNCOUT Disable Timer From Start/Stop/Reload Other Synchronized Timers 14 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 RSSCOIST Reload-Start Sets Compare Output Initial State 29 1 read-write SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write X2CNT 2x Count Mode 13 1 read-write DTCTRL DTI Control Register 0xA0 32 read-write n 0x0 0x0 DTAR DTI Always Run 9 1 read-write DTCINV DTI Complementary Output Invert 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTFATS DTI Fault Action on Timer Stop 10 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 DTFAULT DTI Fault Register 0xB0 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0xB4 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0xA8 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 5 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 2 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 3 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 4 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 5 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 6 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 7 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 8 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 9 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 10 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 11 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 12 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 13 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 14 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 15 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 16 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 17 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 18 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 19 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 20 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 21 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 22 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 23 0x00000017 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 5 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 1 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 1 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 1 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 1 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 1 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 1 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 1 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 1 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 1 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 1 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 1 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 1 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 1 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 1 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 1 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 1 0x00000017 DTLOCK DTI Configuration Lock Register 0xB8 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 DTOGEN DTI Output Generation Enable Register 0xAC 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0xA4 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 CC0 CC0 Interrupt Enable 4 1 read-write CC1 CC1 Interrupt Enable 5 1 read-write CC2 CC2 Interrupt Enable 6 1 read-write CC3 CC3 Interrupt Enable 7 1 read-write DIRCHG DIRCHG Interrupt Enable 2 1 read-write ICBOF0 ICBOF0 Interrupt Enable 8 1 read-write ICBOF1 ICBOF1 Interrupt Enable 9 1 read-write ICBOF2 ICBOF2 Interrupt Enable 10 1 read-write ICBOF3 ICBOF3 Interrupt Enable 11 1 read-write OF OF Interrupt Enable 0 1 read-write UF UF Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only CC3 CC Channel 3 Interrupt Flag 7 1 read-only DIRCHG Direction Change Detect Interrupt Flag 2 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only ICBOF3 CC Channel 3 Input Capture Buffer Overflow Interrupt Flag 11 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 CC0 Clear CC0 Interrupt Flag 4 1 write-only CC1 Clear CC1 Interrupt Flag 5 1 write-only CC2 Clear CC2 Interrupt Flag 6 1 write-only CC3 Clear CC3 Interrupt Flag 7 1 write-only DIRCHG Clear DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Clear ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Clear ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Clear ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Clear ICBOF3 Interrupt Flag 11 1 write-only OF Clear OF Interrupt Flag 0 1 write-only UF Clear UF Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 CC0 Set CC0 Interrupt Flag 4 1 write-only CC1 Set CC1 Interrupt Flag 5 1 write-only CC2 Set CC2 Interrupt Flag 6 1 write-only CC3 Set CC3 Interrupt Flag 7 1 write-only DIRCHG Set DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Set ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Set ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Set ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Set ICBOF3 Interrupt Flag 11 1 write-only OF Set OF Interrupt Flag 0 1 write-only UF Set UF Interrupt Flag 1 1 write-only LOCK TIMER Configuration Lock Register 0x2C 32 read-write n 0x0 0x0 TIMERLOCKKEY Timer Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 ROUTELOC0 I/O Routing Location Register 0x34 32 read-write n 0x0 0x0 CC0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTELOC2 I/O Routing Location Register 0x3C 32 read-write n 0x0 0x0 CDTI0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 ROUTEPEN I/O Routing Pin Enable Register 0x30 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CC3PEN CC Channel 3 Pin Enable 3 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCPOL3 CC3 Polarity 27 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only CCVBV3 CC3 CCVB Valid 11 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only ICV3 CC3 Input Capture Valid 19 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 32 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 32 read-write WTIMER2 WTIMER2 WTIMER2 0x0 0x0 0x400 registers n WTIMER2 43 CC0_CCV CC Channel Value Register 0x64 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC0_CCVB CC Channel Buffer Register 0x6C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC0_CCVP CC Channel Value Peek Register 0x68 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC0_CTRL CC Channel Control Register 0x60 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC1_CCV CC Channel Value Register 0x74 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC1_CCVB CC Channel Buffer Register 0x7C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC1_CCVP CC Channel Value Peek Register 0x78 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC1_CTRL CC Channel Control Register 0x70 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC2_CCV CC Channel Value Register 0x84 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC2_CCVB CC Channel Buffer Register 0x8C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC2_CCVP CC Channel Value Peek Register 0x88 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC2_CTRL CC Channel Control Register 0x80 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC3_CCV CC Channel Value Register 0x94 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC3_CCVB CC Channel Buffer Register 0x9C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC3_CCVP CC Channel Value Peek Register 0x98 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC3_CTRL CC Channel Control Register 0x90 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 32 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ATI Always Track Inputs 28 1 read-write CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DISSYNCOUT Disable Timer From Start/Stop/Reload Other Synchronized Timers 14 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 RSSCOIST Reload-Start Sets Compare Output Initial State 29 1 read-write SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write X2CNT 2x Count Mode 13 1 read-write DTCTRL DTI Control Register 0xA0 32 read-write n 0x0 0x0 DTAR DTI Always Run 9 1 read-write DTCINV DTI Complementary Output Invert 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTFATS DTI Fault Action on Timer Stop 10 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 DTFAULT DTI Fault Register 0xB0 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0xB4 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0xA8 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 5 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 2 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 3 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 4 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 5 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 6 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 7 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 8 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 9 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 10 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 11 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 12 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 13 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 14 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 15 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 16 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 17 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 18 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 19 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 20 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 21 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 22 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 23 0x00000017 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 5 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 1 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 1 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 1 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 1 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 1 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 1 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 1 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 1 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 1 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 1 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 1 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 1 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 1 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 1 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 1 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 1 0x00000017 DTLOCK DTI Configuration Lock Register 0xB8 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 DTOGEN DTI Output Generation Enable Register 0xAC 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0xA4 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 CC0 CC0 Interrupt Enable 4 1 read-write CC1 CC1 Interrupt Enable 5 1 read-write CC2 CC2 Interrupt Enable 6 1 read-write CC3 CC3 Interrupt Enable 7 1 read-write DIRCHG DIRCHG Interrupt Enable 2 1 read-write ICBOF0 ICBOF0 Interrupt Enable 8 1 read-write ICBOF1 ICBOF1 Interrupt Enable 9 1 read-write ICBOF2 ICBOF2 Interrupt Enable 10 1 read-write ICBOF3 ICBOF3 Interrupt Enable 11 1 read-write OF OF Interrupt Enable 0 1 read-write UF UF Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only CC3 CC Channel 3 Interrupt Flag 7 1 read-only DIRCHG Direction Change Detect Interrupt Flag 2 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only ICBOF3 CC Channel 3 Input Capture Buffer Overflow Interrupt Flag 11 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 CC0 Clear CC0 Interrupt Flag 4 1 write-only CC1 Clear CC1 Interrupt Flag 5 1 write-only CC2 Clear CC2 Interrupt Flag 6 1 write-only CC3 Clear CC3 Interrupt Flag 7 1 write-only DIRCHG Clear DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Clear ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Clear ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Clear ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Clear ICBOF3 Interrupt Flag 11 1 write-only OF Clear OF Interrupt Flag 0 1 write-only UF Clear UF Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 CC0 Set CC0 Interrupt Flag 4 1 write-only CC1 Set CC1 Interrupt Flag 5 1 write-only CC2 Set CC2 Interrupt Flag 6 1 write-only CC3 Set CC3 Interrupt Flag 7 1 write-only DIRCHG Set DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Set ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Set ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Set ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Set ICBOF3 Interrupt Flag 11 1 write-only OF Set OF Interrupt Flag 0 1 write-only UF Set UF Interrupt Flag 1 1 write-only LOCK TIMER Configuration Lock Register 0x2C 32 read-write n 0x0 0x0 TIMERLOCKKEY Timer Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 ROUTELOC0 I/O Routing Location Register 0x34 32 read-write n 0x0 0x0 CC0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTELOC2 I/O Routing Location Register 0x3C 32 read-write n 0x0 0x0 CDTI0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 ROUTEPEN I/O Routing Pin Enable Register 0x30 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CC3PEN CC Channel 3 Pin Enable 3 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCPOL3 CC3 Polarity 27 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only CCVBV3 CC3 CCVB Valid 11 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only ICV3 CC3 Input Capture Valid 19 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 32 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 32 read-write WTIMER3 WTIMER3 WTIMER3 0x0 0x0 0x400 registers n WTIMER3 44 CC0_CCV CC Channel Value Register 0x64 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC0_CCVB CC Channel Buffer Register 0x6C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC0_CCVP CC Channel Value Peek Register 0x68 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC0_CTRL CC Channel Control Register 0x60 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC1_CCV CC Channel Value Register 0x74 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC1_CCVB CC Channel Buffer Register 0x7C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC1_CCVP CC Channel Value Peek Register 0x78 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC1_CTRL CC Channel Control Register 0x70 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC2_CCV CC Channel Value Register 0x84 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC2_CCVB CC Channel Buffer Register 0x8C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC2_CCVP CC Channel Value Peek Register 0x88 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC2_CTRL CC Channel Control Register 0x80 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CC3_CCV CC Channel Value Register 0x94 32 read-write n 0x0 0x0 modifyExternal CCV CC Channel Value 0 32 read-write CC3_CCVB CC Channel Buffer Register 0x9C 32 read-write n 0x0 0x0 CCVB CC Channel Value Buffer 0 32 read-write CC3_CCVP CC Channel Value Peek Register 0x98 32 read-only n 0x0 0x0 CCVP CC Channel Value Peek 0 32 read-only CC3_CTRL CC Channel Control Register 0x90 32 read-write n 0x0 0x0 CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 COIST Compare Output Initial State 4 1 read-write CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 FILT Digital Filter 30 1 read-write ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 INSEL Input Selection 29 1 read-write MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write PRSCONF PRS Configuration 28 1 read-write PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 CMD Command Register 0x4 32 write-only n 0x0 0x0 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only CNT Counter Value Register 0x24 32 read-write n 0x0 0x0 CNT Counter Value 0 32 read-write CTRL Control Register 0x0 32 read-write n 0x0 0x0 ATI Always Track Inputs 28 1 read-write CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 DEBUGRUN Debug Mode Run Enable 6 1 read-write DISSYNCOUT Disable Timer From Start/Stop/Reload Other Synchronized Timers 14 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 OSMEN One-shot Mode Enable 4 1 read-write PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A QDM Quadrature Decoder Mode Selection 5 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 RSSCOIST Reload-Start Sets Compare Output Initial State 29 1 read-write SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write X2CNT 2x Count Mode 13 1 read-write DTCTRL DTI Control Register 0xA0 32 read-write n 0x0 0x0 DTAR DTI Always Run 9 1 read-write DTCINV DTI Complementary Output Invert 3 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTEN DTI Enable 0 1 read-write DTFATS DTI Fault Action on Timer Stop 10 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 5 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCH12 PRS Channel 12 selected as input 0x0000000C PRSCH13 PRS Channel 13 selected as input 0x0000000D PRSCH14 PRS Channel 14 selected as input 0x0000000E PRSCH15 PRS Channel 15 selected as input 0x0000000F PRSCH16 PRS Channel 16 selected as input 0x00000010 PRSCH17 PRS Channel 17 selected as input 0x00000011 PRSCH18 PRS Channel 18 selected as input 0x00000012 PRSCH19 PRS Channel 19 selected as input 0x00000013 PRSCH20 PRS Channel 20 selected as input 0x00000014 PRSCH21 PRS Channel 21 selected as input 0x00000015 PRSCH22 PRS Channel 22 selected as input 0x00000016 PRSCH23 PRS Channel 23 selected as input 0x00000017 DTFAULT DTI Fault Register 0xB0 32 read-only n 0x0 0x0 DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTFAULTC DTI Fault Clear Register 0xB4 32 write-only n 0x0 0x0 DTDBGFC DTI Debugger Fault Clear 2 1 write-only DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTFC DTI Fault Configuration Register 0xA8 32 read-write n 0x0 0x0 DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS0FSEL DTI PRS Fault Source 0 Select 0 5 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 2 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 3 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 4 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 5 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 6 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 7 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 8 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 9 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 10 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 11 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 12 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 13 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 14 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 15 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 16 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 17 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 18 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 19 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 20 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 21 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 22 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 23 0x00000017 DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTPRS1FSEL DTI PRS Fault Source 1 Select 8 5 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 1 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 1 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 1 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 1 0x0000000B PRSCH12 PRS Channel 12 selected as fault source 1 0x0000000C PRSCH13 PRS Channel 13 selected as fault source 1 0x0000000D PRSCH14 PRS Channel 14 selected as fault source 1 0x0000000E PRSCH15 PRS Channel 15 selected as fault source 1 0x0000000F PRSCH16 PRS Channel 16 selected as fault source 1 0x00000010 PRSCH17 PRS Channel 17 selected as fault source 1 0x00000011 PRSCH18 PRS Channel 18 selected as fault source 1 0x00000012 PRSCH19 PRS Channel 19 selected as fault source 1 0x00000013 PRSCH20 PRS Channel 20 selected as fault source 1 0x00000014 PRSCH21 PRS Channel 21 selected as fault source 1 0x00000015 PRSCH22 PRS Channel 22 selected as fault source 1 0x00000016 PRSCH23 PRS Channel 23 selected as fault source 1 0x00000017 DTLOCK DTI Configuration Lock Register 0xB8 32 read-write n 0x0 0x0 LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 DTOGEN DTI Output Generation Enable Register 0xAC 32 read-write n 0x0 0x0 DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTTIME DTI Time Control Register 0xA4 32 read-write n 0x0 0x0 DTFALLT DTI Fall-time 16 6 read-write DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write IEN Interrupt Enable Register 0x18 32 read-write n 0x0 0x0 CC0 CC0 Interrupt Enable 4 1 read-write CC1 CC1 Interrupt Enable 5 1 read-write CC2 CC2 Interrupt Enable 6 1 read-write CC3 CC3 Interrupt Enable 7 1 read-write DIRCHG DIRCHG Interrupt Enable 2 1 read-write ICBOF0 ICBOF0 Interrupt Enable 8 1 read-write ICBOF1 ICBOF1 Interrupt Enable 9 1 read-write ICBOF2 ICBOF2 Interrupt Enable 10 1 read-write ICBOF3 ICBOF3 Interrupt Enable 11 1 read-write OF OF Interrupt Enable 0 1 read-write UF UF Interrupt Enable 1 1 read-write IF Interrupt Flag Register 0xC 32 read-only n 0x0 0x0 CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only CC3 CC Channel 3 Interrupt Flag 7 1 read-only DIRCHG Direction Change Detect Interrupt Flag 2 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only ICBOF3 CC Channel 3 Input Capture Buffer Overflow Interrupt Flag 11 1 read-only OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only IFC Interrupt Flag Clear Register 0x14 32 write-only n 0x0 0x0 CC0 Clear CC0 Interrupt Flag 4 1 write-only CC1 Clear CC1 Interrupt Flag 5 1 write-only CC2 Clear CC2 Interrupt Flag 6 1 write-only CC3 Clear CC3 Interrupt Flag 7 1 write-only DIRCHG Clear DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Clear ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Clear ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Clear ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Clear ICBOF3 Interrupt Flag 11 1 write-only OF Clear OF Interrupt Flag 0 1 write-only UF Clear UF Interrupt Flag 1 1 write-only IFS Interrupt Flag Set Register 0x10 32 write-only n 0x0 0x0 CC0 Set CC0 Interrupt Flag 4 1 write-only CC1 Set CC1 Interrupt Flag 5 1 write-only CC2 Set CC2 Interrupt Flag 6 1 write-only CC3 Set CC3 Interrupt Flag 7 1 write-only DIRCHG Set DIRCHG Interrupt Flag 2 1 write-only ICBOF0 Set ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Set ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Set ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Set ICBOF3 Interrupt Flag 11 1 write-only OF Set OF Interrupt Flag 0 1 write-only UF Set UF Interrupt Flag 1 1 write-only LOCK TIMER Configuration Lock Register 0x2C 32 read-write n 0x0 0x0 TIMERLOCKKEY Timer Lock Key 0 16 read-write UNLOCKED None 0x00000000 LOCKED None 0x00000001 ROUTELOC0 I/O Routing Location Register 0x34 32 read-write n 0x0 0x0 CC0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CC3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 ROUTELOC2 I/O Routing Location Register 0x3C 32 read-write n 0x0 0x0 CDTI0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 CDTI2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 ROUTEPEN I/O Routing Pin Enable Register 0x30 32 read-write n 0x0 0x0 CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CC3PEN CC Channel 3 Pin Enable 3 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write STATUS Status Register 0x8 32 read-only n 0x0 0x0 CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCPOL3 CC3 Polarity 27 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only CCVBV3 CC3 CCVB Valid 11 1 read-only DIR Direction 1 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only ICV3 CC3 Input Capture Valid 19 1 read-only RUNNING Running 0 1 read-only TOPBV TOPB Valid 2 1 read-only TOP Counter Top Value Register 0x1C 32 read-write n 0x0 0x0 TOP Counter Top Value 0 32 read-write TOPB Counter Top Value Buffer Register 0x20 32 read-write n 0x0 0x0 TOPB Counter Top Value Buffer 0 32 read-write