Toshiba M369 2024.05.02 TOSHIBA Cortex-M3 MCU 8 32 ADA Analog-to-Digital Converter (AD) ADA 0x0 0x0 0x20 registers n 0x20 0x4 reserved n 0x24 0x30 registers n 0x54 0x20 reserved n 0x74 0x4 registers n 0x78 0xE88 reserved n 0xF00 0x8 registers n CBAS0 H_W TEST Register 0 0xF00 32 read-write n 0x0 0x0 BIAS0 BIAS0 5 1 read-write BIAS1 BIAS1 6 1 read-write BIAS2 BIAS2 7 1 read-write PMODE0 PMODE0 2 1 read-write PMODE1 PMODE1 3 1 read-write PMODE2 PMODE2 4 1 read-write STOPX STOPX 1 1 read-write CBAS1 H_W TEST Register 1 0xF04 32 read-write n 0x0 0x0 CMP_TST CMP_TST 2 1 read-write REG_TST REG_TST 0 1 read-write TST_MONI TST_MONI 7 1 read-write CLK AD Conversion Clock Setting Register 0x0 32 read-write n 0x0 0x0 ADCLK ADCLK 0 3 read-write ADSH ADSH 4 4 read-write CMP0 AD Conversion Result Comparison Register 0 0x2C 32 read-write n 0x0 0x0 AD0CMP AD0CMP 0 12 read-write CMP1 AD Conversion Result Comparison Register 1 0x30 32 read-write n 0x0 0x0 AD1CMP AD1CMP 0 12 read-write CMPCR0 AD Monitoring Setting Register 0 0x24 32 read-write n 0x0 0x0 ADBIG0 ADBIG0 4 1 read-write AINS0 AINS0 0 4 read-write CMP0EN CMP0EN 7 1 read-write CMPCMT0 CMPCMT0 8 4 read-write CMPCOND0 CMPCOND0 5 1 read-write CMPCR1 AD Monitoring Setting Register 1 0x28 32 read-write n 0x0 0x0 ADBIG0 ADBIG0 4 1 read-write ADBIG1 ADBIG1 4 1 read-write AINS0 AINS0 0 4 read-write AINS1 AINS1 0 4 read-write CMP0EN CMP0EN 7 1 read-write CMP1EN CMP1EN 7 1 read-write CMPCMT0 CMPCMT0 8 4 read-write CMPCMT1 CMPCMT1 8 4 read-write CMPCOND0 CMPCOND0 5 1 read-write CMPCOND1 CMPCOND1 5 1 read-write MOD0 AD Mode Control Register 0 0x4 32 write-only n 0x0 0x0 ADS ADS 0 1 write-only HPADS HPADS 1 1 write-only MOD1 AD Mode Control Register 1 0x8 32 read-write n 0x0 0x0 ADHWE ADHWE 0 1 read-write ADHWS ADHWS 1 1 read-write DACON DACON 7 1 read-write HPADHWE HPADHWE 2 1 read-write HPADHWS HPADHWS 3 1 read-write I2AD I2AD 6 1 read-write RCUT RCUT 5 1 read-write MOD2 AD Mode Control Register 2 0xC 32 read-write n 0x0 0x0 ADCH ADCH 0 4 read-write HPADCH HPADCH 4 4 read-write MOD3 AD Mode Control Register 3 0x10 32 read-write n 0x0 0x0 ITM ITM 4 3 read-write REPEAT REPEAT 1 1 read-write SCAN SCAN 0 1 read-write MOD4 AD Mode Control Register 4 0x14 32 read-write n 0x0 0x0 SCANAREA SCANAREA 4 4 read-write SCANSTA SCANSTA 0 4 read-write MOD5 AD Mode Control Register 5 0x18 32 read-only n 0x0 0x0 ADBF ADBF 0 1 read-only EOCF EOCF 1 1 read-only HPADBF HPADBF 2 1 read-only HPEOCF HPEOCF 3 1 read-only MOD6 AD Mode Control Register 6 0x1C 32 write-only n 0x0 0x0 ADRST ADRST 0 2 write-only REG00 AD Conversion Result Register 00 0x34 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG01 AD Conversion Result Register 01 0x38 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG02 AD Conversion Result Register 02 0x3C 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG03 AD Conversion Result Register 03 0x40 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG04 AD Conversion Result Register 04 0x44 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG05 AD Conversion Result Register 05 0x48 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG06 AD Conversion Result Register 06 0x4C 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG07 AD Conversion Result Register 07 0x50 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REGSP AD Conversion Result Register SP 0x74 32 read-only n 0x0 0x0 ADOVRSPF ADOVRSPF 13 1 read-only ADOVRSPF_alias ADOVRSPF 17 1 read-only ADSPR ADSPR 0 12 read-only ADSPRF ADSPRF 12 1 read-only ADSPRF_alias ADSPRF 16 1 read-only ADSPR_alias ADSPR 20 12 read-only _ADOVRSPF _ADOVRSPF 17 1 read-only _ADSPR _ADSPR 20 12 read-only _ADSPRF _ADSPRF 16 1 read-only ADB Analog-to-Digital Converter (AD) ADB 0x0 0x0 0x20 registers n 0x20 0x4 reserved n 0x24 0x40 registers n 0x64 0x10 reserved n 0x74 0x4 registers n 0x78 0xE88 reserved n 0xF00 0x8 registers n CBAS0 H_W TEST Register 0 0xF00 32 read-write n 0x0 0x0 BIAS0 BIAS0 5 1 read-write BIAS1 BIAS1 6 1 read-write BIAS2 BIAS2 7 1 read-write PMODE0 PMODE0 2 1 read-write PMODE1 PMODE1 3 1 read-write PMODE2 PMODE2 4 1 read-write STOPX STOPX 1 1 read-write CBAS1 H_W TEST Register 1 0xF04 32 read-write n 0x0 0x0 CMP_TST CMP_TST 2 1 read-write REG_TST REG_TST 0 1 read-write TST_MONI TST_MONI 7 1 read-write CLK AD Conversion Clock Setting Register 0x0 32 read-write n 0x0 0x0 ADCLK ADCLK 0 3 read-write ADSH ADSH 4 4 read-write CMP0 AD Conversion Result Comparison Register 0 0x2C 32 read-write n 0x0 0x0 AD0CMP AD0CMP 0 12 read-write CMP1 AD Conversion Result Comparison Register 1 0x30 32 read-write n 0x0 0x0 AD1CMP AD1CMP 0 12 read-write CMPCR0 AD Monitoring Setting Register 0 0x24 32 read-write n 0x0 0x0 ADBIG0 ADBIG0 4 1 read-write AINS0 AINS0 0 4 read-write CMP0EN CMP0EN 7 1 read-write CMPCMT0 CMPCMT0 8 4 read-write CMPCOND0 CMPCOND0 5 1 read-write CMPCR1 AD Monitoring Setting Register 1 0x28 32 read-write n 0x0 0x0 ADBIG0 ADBIG0 4 1 read-write ADBIG1 ADBIG1 4 1 read-write AINS0 AINS0 0 4 read-write AINS1 AINS1 0 4 read-write CMP0EN CMP0EN 7 1 read-write CMP1EN CMP1EN 7 1 read-write CMPCMT0 CMPCMT0 8 4 read-write CMPCMT1 CMPCMT1 8 4 read-write CMPCOND0 CMPCOND0 5 1 read-write CMPCOND1 CMPCOND1 5 1 read-write MOD0 AD Mode Control Register 0 0x4 32 write-only n 0x0 0x0 ADS ADS 0 1 write-only HPADS HPADS 1 1 write-only MOD1 AD Mode Control Register 1 0x8 32 read-write n 0x0 0x0 ADHWE ADHWE 0 1 read-write ADHWS ADHWS 1 1 read-write DACON DACON 7 1 read-write HPADHWE HPADHWE 2 1 read-write HPADHWS HPADHWS 3 1 read-write I2AD I2AD 6 1 read-write RCUT RCUT 5 1 read-write MOD2 AD Mode Control Register 2 0xC 32 read-write n 0x0 0x0 ADCH ADCH 0 4 read-write HPADCH HPADCH 4 4 read-write MOD3 AD Mode Control Register 3 0x10 32 read-write n 0x0 0x0 ITM ITM 4 3 read-write REPEAT REPEAT 1 1 read-write SCAN SCAN 0 1 read-write MOD4 AD Mode Control Register 4 0x14 32 read-write n 0x0 0x0 SCANAREA SCANAREA 4 4 read-write SCANSTA SCANSTA 0 4 read-write MOD5 AD Mode Control Register 5 0x18 32 read-only n 0x0 0x0 ADBF ADBF 0 1 read-only EOCF EOCF 1 1 read-only HPADBF HPADBF 2 1 read-only HPEOCF HPEOCF 3 1 read-only MOD6 AD Mode Control Register 6 0x1C 32 write-only n 0x0 0x0 ADRST ADRST 0 2 write-only REG00 AD Conversion Result Register 00 0x34 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG01 AD Conversion Result Register 01 0x38 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG02 AD Conversion Result Register 02 0x3C 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG03 AD Conversion Result Register 03 0x40 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG04 AD Conversion Result Register 04 0x44 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG05 AD Conversion Result Register 05 0x48 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG06 AD Conversion Result Register 06 0x4C 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG07 AD Conversion Result Register 07 0x50 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG08 AD Conversion Result Register 08 0x54 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG09 AD Conversion Result Register 09 0x58 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG10 AD Conversion Result Register 10 0x5C 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REG11 AD Conversion Result Register 11 0x60 32 read-only n 0x0 0x0 ADOVRF ADOVRF 13 1 read-only ADOVRF_alias ADOVRF 17 1 read-only ADR ADR 0 12 read-only ADRF ADRF 12 1 read-only ADRF_alias ADRF 16 1 read-only ADR_alias ADR 20 12 read-only _ADOVRF _ADOVRF 17 1 read-only _ADR _ADR 20 12 read-only _ADRF _ADRF 16 1 read-only REGSP AD Conversion Result Register SP 0x74 32 read-only n 0x0 0x0 ADOVRSPF ADOVRSPF 13 1 read-only ADOVRSPF_alias ADOVRSPF 17 1 read-only ADSPR ADSPR 0 12 read-only ADSPRF ADSPRF 12 1 read-only ADSPRF_alias ADSPRF 16 1 read-only ADSPR_alias ADSPR 20 12 read-only _ADOVRSPF _ADOVRSPF 17 1 read-only _ADSPR _ADSPR 20 12 read-only _ADSPRF _ADSPRF 16 1 read-only ADCI External Bus Interface(EXB) ADCI 0x0 0x0 0xC registers n VM01 Dual Unit Mode Trigger Controller START Register 1 0x0 32 write-only n 0x0 0x0 SWATRG SWATRG 7 1 write-only VM02 Dual Unit Mode Trigger Controller START Register 2 0x4 32 read-write n 0x0 0x0 ADILV ADILV 7 1 read-only TRGAEN TRGAEN 0 1 read-write TRGASEL TRGASEL 1 3 read-write TRGASTA TRGASTA 4 1 read-only VM03 Dual Unit Mode Trigger Controller START Register 3 0x8 32 read-write n 0x0 0x0 CORCNT CORCNT 0 8 read-write ADILV Dual ADC Configuration ADILV 0x0 0x0 0xC registers n MO1 Dual Unit Mode Trigger Controller START Register 1 0x0 32 write-only n 0x0 0x0 SWATRG SWATRG 7 1 write-only MO2 Dual Unit Mode Trigger Controller START Register 2 0x4 32 read-write n 0x0 0x0 ADILV ADILV 7 1 read-write TRGAEN TRGAEN 0 1 read-write TRGASEL TRGASEL 1 3 read-write TRGASTA TRGASTA 4 1 read-only MO3 Dual Unit Mode Trigger Controller START Register 3 0x8 32 read-write n 0x0 0x0 CORCNT CORCNT 0 8 read-write CAN CAN Controller (TXCAN) CAN 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x1C 0x4 reserved n 0x20 0x4 registers n 0x24 0x4 reserved n 0x28 0x4 registers n 0x2C 0x4 reserved n 0x30 0x4 registers n 0x34 0x4 reserved n 0x38 0x4 registers n 0x3C 0x4 reserved n 0x4 0x4 reserved n 0x40 0x4 registers n 0x44 0x4 reserved n 0x48 0x4 registers n 0x4C 0x4 reserved n 0x50 0x4 registers n 0x54 0x4 reserved n 0x58 0x4 registers n 0x5C 0x4 reserved n 0x60 0x4 registers n 0x64 0x4 reserved n 0x68 0x4 registers n 0x6C 0x4 reserved n 0x70 0x4 registers n 0x74 0x4 reserved n 0x78 0x4 registers n 0x7C 0x4 reserved n 0x8 0x4 registers n 0x80 0x4 registers n 0x84 0x4 reserved n 0x88 0x4 registers n 0x8C 0x4 reserved n 0x90 0x4 registers n 0x94 0x4 reserved n 0x98 0x4 registers n 0x9C 0x4 reserved n 0xA0 0x4 registers n 0xA4 0x4 reserved n 0xA8 0x4 registers n 0xAC 0x4 reserved n 0xB0 0x4 registers n 0xB4 0x4 reserved n 0xB8 0x4 registers n 0xC 0x4 reserved n AA CAN Abort Acknowledge Register 0x28 32 read-write n 0x0 0x0 AA AA 0 31 read-write BCR1 CAN Bit Configuration Register 1 0x60 32 read-write n 0x0 0x0 BRP BRP 0 10 read-write BCR2 CAN Bit Configuration Register 2 0x68 32 read-write n 0x0 0x0 SAM SAM 7 1 read-write SJW SJW 8 2 read-write TSEG1 TSEG1 0 4 read-write TSEG2 TSEG2 4 3 read-write CDR CAN Change Data Request 0x98 32 read-write n 0x0 0x0 CDR CDR 0 31 read-write CEC CAN Error Counter Register 0xA8 32 read-write n 0x0 0x0 REC REC 0 8 read-only TEC TEC 8 8 read-only GAM CAN Global Acceptance Mask Register 0x48 32 read-write n 0x0 0x0 GAM GAM 0 29 read-write GAMI GAMI 31 1 read-write GIF CAN Global Interrupt Flag Register 0x70 32 read-write n 0x0 0x0 BOIF BOIF 2 1 read-write EPIF EPIF 1 1 read-write RFPF RFPF 7 1 read-write RMLIF RMLIF 5 1 read-write TRMABF TRMABF 4 1 read-write TSOIF TSOIF 3 1 read-write WLIF WLIF 0 1 read-write WUIF WUIF 6 1 read-write GIM CAN Global Interrupt Mask Register 0x78 32 read-write n 0x0 0x0 BOIM BOIM 2 1 read-write EPIM EPIM 1 1 read-write RFPM RFPM 7 1 read-write RMLIM RMLIM 5 1 read-write TRMABF TRMABF 4 1 read-write TSOIM TSOIM 3 1 read-write WLIM WLIM 0 1 read-write WUIM WUIM 6 1 read-write GSR CAN Global Status Register 0x58 32 read-only n 0x0 0x0 BO BO 2 1 read-only CCE CCE 7 1 read-only EP EP 1 1 read-only EW EW 0 1 read-only MIS MIS 12 5 read-only RM RM 11 1 read-only SMA SMA 6 1 read-only SUA SUA 8 1 read-only TM TM 10 1 read-only TSO TSO 3 1 read-only LAM CAN Local Acceptance Mask Register 0x40 32 read-write n 0x0 0x0 LAM LAM 0 29 read-write LAMI LAMI 31 1 read-write MBIM CAN Mailbox Interrupt Mask Register 0x90 32 read-write n 0x0 0x0 MBIM MBIM 0 32 read-write MBRIF CAN Mailbox Receive Interrupt Flag Register 0x88 32 read-write n 0x0 0x0 MBRIF MBRIF 0 32 read-write MBTIF CAN Mailbox Transmit Interrupt Flag Register 0x80 32 read-write n 0x0 0x0 MBTIF MBTIF 0 31 read-write MC CAN Mailbox Configuration Register 0x0 32 read-write n 0x0 0x0 MC MC 0 32 read-write MCR CAN Master Control Register 0x50 32 read-write n 0x0 0x0 CCR CCR 7 1 read-write MTOS MTOS 3 1 read-write SMR SMR 6 1 read-write SRES SRES 0 1 read-write SUR SUR 11 1 read-write TSCC TSCC 1 1 read-write TSTERR TSTERR 8 1 read-write TSTLB TSTLB 9 1 read-write WUBA WUBA 4 1 read-write MD CAN Mailbox Direction Register 0x8 32 read-write n 0x0 0x0 MD MD 0 32 read-write RFP CAN Remote Frame Pending Register 0xA0 32 read-write n 0x0 0x0 RFP RFP 0 32 read-write RML CAN Receive Message Lost Register 0x38 32 read-write n 0x0 0x0 RML RML 0 32 read-write RMP CAN Receive Message Pending Register 0x30 32 read-write n 0x0 0x0 RMP RMP 0 32 read-write TA CAN Transmission Acknowledge Register 0x20 32 read-write n 0x0 0x0 TA TA 0 31 read-write TRR CAN Transmit Request Reset Register 0x18 32 read-write n 0x0 0x0 TRR TRR 0 31 read-write TRS CAN Transmit Request Set Register 0x10 32 read-write n 0x0 0x0 TRS TRS 0 31 read-write TSC CAN Time Stamp Counter Register 0xB8 32 read-write n 0x0 0x0 TSC TSC 0 16 read-write TSP CAN Time Stamp Counter Prescaler Register 0xB0 32 read-write n 0x0 0x0 TSP TSP 0 4 read-write CANMB0 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB1 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB10 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB11 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB12 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB13 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB14 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB15 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB16 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB17 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB18 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB19 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB2 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB20 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB21 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB22 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB23 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB24 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB25 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB26 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB27 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB28 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB29 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB3 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB30 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB31 CAN Controller (TXCAN) Mailbox RAM CANMB31 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 ID ID 0 29 read-write IDE IDE 31 1 read-write LAME LAME 30 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB4 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB5 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB6 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB7 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB8 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CANMB9 CAN Controller (TXCAN) Mailbox RAM CANMB0 0x0 0x0 0x4 registers n 0x10 0x4 registers n 0x14 0x4 reserved n 0x18 0x4 registers n 0x4 0x4 reserved n 0x8 0x4 registers n 0xC 0x4 reserved n DH CAN Mailbox Register 0x18 32 read-write n 0x0 0x0 D4 D4 0 8 read-write D5 D5 8 8 read-write D6 D6 16 8 read-write D7 D7 24 8 read-write DL CAN Mailbox Register 0x10 32 read-write n 0x0 0x0 D0 D0 0 8 read-write D1 D1 8 8 read-write D2 D2 16 8 read-write D3 D3 24 8 read-write ID CAN Mailbox Register 0x0 32 read-write n 0x0 0x0 GAME GAME 30 1 read-write ID ID 0 29 read-write IDE IDE 31 1 read-write RFH RFH 29 1 read-write TSVMCF CAN Mailbox Register 0x8 32 read-write n 0x0 0x0 DLC DLC 0 4 read-write RTR RTR 4 1 read-write TSV TSV 16 16 read-write CG Clock Generator (CG) CG 0x0 0x0 0x10 registers n 0x10 0x8 reserved n 0x18 0x4 registers n 0x1C 0x20 reserved n 0x3C 0x14 registers n 0x50 0x10 reserved n 0x60 0xC registers n ICRCG CG Interrupt Request Clear Register 0x60 32 write-only n 0x0 0x0 ICRCG ICRCG 0 5 write-only IMCGA CG Interrupt Mode Control Register A 0x40 32 read-write n 0x0 0x0 EMCG0 EMCG0 4 3 read-write EMCG1 EMCG1 12 3 read-write EMCG2 EMCG2 20 3 read-write EMCG3 EMCG3 28 3 read-write EMST0 EMST0 2 2 read-only EMST1 EMST1 10 2 read-only EMST2 EMST2 18 2 read-only EMST3 EMST3 26 2 read-only INT0EN INT0EN 0 1 read-write INT1EN INT1EN 8 1 read-write INT2EN INT2EN 16 1 read-write INT3EN INT3EN 24 1 read-write IMCGB CG Interrupt Mode Control Register B 0x44 32 read-write n 0x0 0x0 EMCG4 EMCG4 4 3 read-write EMCG5 EMCG5 12 3 read-write EMCG6 EMCG6 20 3 read-write EMCG7 EMCG7 28 3 read-write EMST4 EMST4 2 2 read-only EMST5 EMST5 10 2 read-only EMST6 EMST6 18 2 read-only EMST7 EMST7 26 2 read-only INT4EN INT4EN 0 1 read-write INT5EN INT5EN 8 1 read-write INT6EN INT6EN 16 1 read-write INT7EN INT7EN 24 1 read-write IMCGC CG Interrupt Mode Control Register C 0x48 32 read-write n 0x0 0x0 EMCG8 EMCG8 4 3 read-write EMCG9 EMCG9 12 3 read-write EMCGA EMCGA 20 3 read-write EMCGB EMCGB 28 3 read-write EMST8 EMST8 2 2 read-only EMST9 EMST9 10 2 read-only EMSTA EMSTA 18 2 read-only EMSTB EMSTB 26 2 read-only INT8EN INT8EN 0 1 read-write INT9EN INT9EN 8 1 read-write INTAEN INTAEN 16 1 read-write INTBEN INTBEN 24 1 read-write IMCGD CG Interrupt Mode Control Register C 0x4C 32 read-write n 0x0 0x0 EMCGD EMCGD 12 3 read-write EMCGRMCRX EMCGRMCRX 28 3 read-write EMCGRTC EMCGRTC 20 3 read-write EMCGUSBWKUP EMCGUSBWKUP 4 3 read-write EMSTD EMSTD 10 2 read-only EMSTRMCRX EMSTRMCRX 26 2 read-only EMSTRTC EMSTRTC 18 2 read-only EMSTUSBWKUP EMSTUSBWKUP 2 2 read-only INTDEN INTDEN 8 1 read-write INTRMCRXEN INTRMCRXEN 24 1 read-write INTRTCEN INTRTCEN 16 1 read-write INTUSBWKUPEN INTUSBWKUPEN 0 1 read-write NMIFLG NMI Flag Register 0x68 32 read-only n 0x0 0x0 NMIFLG0 NMIFLG0 0 1 read-only NMIFLG1 NMIFLG1 1 1 read-only NMIFLG2 NMIFLG2 2 1 read-only NMIFLG3 NMIFLG3 3 1 read-only OSCCR Oscillation Control Register 0x4 32 read-write n 0x0 0x0 DRVOSCH DRVOSCH 12 1 read-write DRVOSCL DRVOSCL 13 1 read-write EHOSCSEL EHOSCSEL 18 1 read-write OSCSEL OSCSEL 17 1 read-write PLLON PLLON 2 1 read-write WUEF WUEF 1 1 read-only WUEON WUEON 0 1 write-only WUPSEL1 WUPSEL1 3 1 read-write WUPSEL2 WUPSEL2 19 1 read-write WUPT WUPT 20 12 read-write WUPTL WUPTL 14 2 read-write XEN1 XEN1 8 1 read-write XEN2 XEN2 16 1 read-write XEN3 XEN3 10 1 read-write XTEN XTEN 9 1 read-write PCKSTP Peripheral Clock Stop Register 0x18 32 read-write n 0x0 0x0 CANSTP CANSTP 2 1 read-write EMSTP EMSTP 3 1 read-write USBDSTP USBDSTP 0 1 read-write USBHSTP USBHSTP 1 1 read-write PLLSEL PLL Selection Register 0xC 32 read-write n 0x0 0x0 PLLSEL PLLSEL 0 1 read-write PLLSET PLLSET 1 15 read-write PROTECT Protect Register 0x3C 32 read-write n 0x0 0x0 CGPROTECT CGPROTECT 0 8 read-write RSTFLG Reset Flag Register 0x64 32 read-write n 0x0 0x0 DBGRSTF DBGRSTF 4 1 read-write LVDRSTF LVDRSTF 6 1 read-write OFDRSTF OFDRSTF 5 1 read-write PINRSTF PINRSTF 1 1 read-write PONRSTF PONRSTF 0 1 read-write STOP2RSTF STOP2RSTF 3 1 read-write WDTRSTF WDTRSTF 2 1 read-write STBYCR Standby Control Register 0x8 32 read-write n 0x0 0x0 DRVE DRVE 16 1 read-write PTKEEP PTKEEP 17 1 read-write STBY STBY 0 3 read-write SYSCR System Control Register 0x0 32 read-write n 0x0 0x0 FCSTOP FCSTOP 20 1 read-write FPSEL FPSEL 12 1 read-write GEAR GEAR 0 3 read-write PRCK PRCK 8 3 read-write SCOSEL SCOSEL 16 2 read-write DA0 Digital-to-Analog Converter (DA) DA0 0x0 0x0 0x14 registers n CNT DAC Control Register1 0x0 32 read-write n 0x0 0x0 OP OP 0 1 read-write REFON REFON 1 1 read-write DCTL DAC Output Register 0x8 32 read-write n 0x0 0x0 AMPSEL AMPSEL 16 2 read-write DMAEN DMAEN 7 1 read-write OFFSET OFFSET 18 3 read-write TRGEN TRGEN 8 1 read-write TRGSEL TRGSEL 9 3 read-write WAVE WAVE 0 2 read-write REG DAC Data Register 0x4 32 read-write n 0x0 0x0 DAC DAC 6 10 read-write TCTL DAC Trigger Register 0xC 32 write-only n 0x0 0x0 DACCLR DACCLR 15 1 write-only SWTRG SWTRG 0 1 write-only VCTL DAC Control Register2 0x10 32 read-write n 0x0 0x0 VHOLDCTB VHOLDCTB 4 4 read-write VHOLDCTF VHOLDCTF 0 4 read-write DA1 Digital-to-Analog Converter (DA) DA0 0x0 0x0 0x14 registers n CNT DAC Control Register1 0x0 32 read-write n 0x0 0x0 OP OP 0 1 read-write REFON REFON 1 1 read-write DCTL DAC Output Register 0x8 32 read-write n 0x0 0x0 AMPSEL AMPSEL 16 2 read-write DMAEN DMAEN 7 1 read-write OFFSET OFFSET 18 3 read-write TRGEN TRGEN 8 1 read-write TRGSEL TRGSEL 9 3 read-write WAVE WAVE 0 2 read-write REG DAC Data Register 0x4 32 read-write n 0x0 0x0 DAC DAC 6 10 read-write TCTL DAC Trigger Register 0xC 32 write-only n 0x0 0x0 DACCLR DACCLR 15 1 write-only SWTRG SWTRG 0 1 write-only VCTL DAC Control Register2 0x10 32 read-write n 0x0 0x0 VHOLDCTB VHOLDCTB 4 4 read-write VHOLDCTF VHOLDCTF 0 4 read-write DMAA DMA Controller DMAA 0x0 0x0 0x10 registers n 0x10 0x4 reserved n 0x14 0x2C registers n 0x40 0xC reserved n 0x4C 0x4 registers n ALTCTRLBASEPTR DMA Channel Alternate Control Data Base Pointer Register 0xC 32 read-only n 0x0 0x0 ALT_CTRL_BASE_PTR ALT_CTRL_BASE_PTR 0 32 read-only CFG DMA Configuration Register 0x4 32 write-only n 0x0 0x0 MASTER_ENABLE MASTER_ENABLE 0 1 write-only CHNLENABLECLR DMA Channel Enable Clear Register 0x2C 32 write-only n 0x0 0x0 CHNL_ENABLE_CLR CHNL_ENABLE_CLR 0 32 write-only CHNLENABLESET DMA Channel Enable Set Register 0x28 32 read-write n 0x0 0x0 CHNL_ENABLE_SET CHNL_ENABLE_SET 0 32 read-write CHNLPRIALTCLR DMA Channel Primary-Alternate Clear Register 0x34 32 write-only n 0x0 0x0 CHNL_PRI_ALT_CLR CHNL_PRI_ALT_CLR 0 32 write-only CHNLPRIALTSET DMA Channel Primary-Alternate Set Register 0x30 32 read-write n 0x0 0x0 CHNL_PRI_ALT_SET CHNL_PRI_ALT_SET 0 32 read-write CHNLPRIORITYCLR DMA Channel Priority Clear Register 0x3C 32 write-only n 0x0 0x0 CHNL_PRIORITY_CLR CHNL_PRIORITY_CLR 0 32 write-only CHNLPRIORITYSET DMA Channel Priority Set Register 0x38 32 read-write n 0x0 0x0 CHNL_PRIORITY_SET CHNL_PRIORITY_SET 0 32 read-write CHNLREQMASKCLR DMA Channel Request Mask Clear Register 0x24 32 write-only n 0x0 0x0 CHNL_REQ_MASK_CLR CHNL_REQ_MASK_CLR 0 32 write-only CHNLREQMASKSET DMA Channel Request Mask Set Register 0x20 32 read-write n 0x0 0x0 CHNL_REQ_MASK_SET CHNL_REQ_MASK_SET 0 32 read-write CHNLSWREQUEST DMA Channel Software Request Register 0x14 32 write-only n 0x0 0x0 CHNL_SW_REQUEST CHNL_SW_REQUEST 0 32 write-only CHNLUSEBURSTCLR DMA Channel Useburst Clear Register 0x1C 32 write-only n 0x0 0x0 CHNL_USEBURST_CLR CHNL_USEBURST_CLR 0 32 write-only CHNLUSEBURSTSET DMA Channel Useburst Set Register 0x18 32 read-write n 0x0 0x0 CHNL_USEBURST_SET CHNL_USEBURST_SET 0 32 read-write CTRLBASEPTR DMA Control Data Base Pointer Register 0x8 32 read-write n 0x0 0x0 CTRL_BASE_PTR CTRL_BASE_PTR 10 22 read-write ERRCLR DMA Bus Error Clear Register 0x4C 32 read-write n 0x0 0x0 ERR_CLR ERR_CLR 0 1 read-write STATUS DMA Status Register 0x0 32 read-only n 0x0 0x0 MASTER_ENABLE MASTER_ENABLE 0 1 read-only DMAB DMA Controller DMAA 0x0 0x0 0x10 registers n 0x10 0x4 reserved n 0x14 0x2C registers n 0x40 0xC reserved n 0x4C 0x4 registers n ALTCTRLBASEPTR DMA Channel Alternate Control Data Base Pointer Register 0xC 32 read-only n 0x0 0x0 ALT_CTRL_BASE_PTR ALT_CTRL_BASE_PTR 0 32 read-only CFG DMA Configuration Register 0x4 32 write-only n 0x0 0x0 MASTER_ENABLE MASTER_ENABLE 0 1 write-only CHNLENABLECLR DMA Channel Enable Clear Register 0x2C 32 write-only n 0x0 0x0 CHNL_ENABLE_CLR CHNL_ENABLE_CLR 0 32 write-only CHNLENABLESET DMA Channel Enable Set Register 0x28 32 read-write n 0x0 0x0 CHNL_ENABLE_SET CHNL_ENABLE_SET 0 32 read-write CHNLPRIALTCLR DMA Channel Primary-Alternate Clear Register 0x34 32 write-only n 0x0 0x0 CHNL_PRI_ALT_CLR CHNL_PRI_ALT_CLR 0 32 write-only CHNLPRIALTSET DMA Channel Primary-Alternate Set Register 0x30 32 read-write n 0x0 0x0 CHNL_PRI_ALT_SET CHNL_PRI_ALT_SET 0 32 read-write CHNLPRIORITYCLR DMA Channel Priority Clear Register 0x3C 32 write-only n 0x0 0x0 CHNL_PRIORITY_CLR CHNL_PRIORITY_CLR 0 32 write-only CHNLPRIORITYSET DMA Channel Priority Set Register 0x38 32 read-write n 0x0 0x0 CHNL_PRIORITY_SET CHNL_PRIORITY_SET 0 32 read-write CHNLREQMASKCLR DMA Channel Request Mask Clear Register 0x24 32 write-only n 0x0 0x0 CHNL_REQ_MASK_CLR CHNL_REQ_MASK_CLR 0 32 write-only CHNLREQMASKSET DMA Channel Request Mask Set Register 0x20 32 read-write n 0x0 0x0 CHNL_REQ_MASK_SET CHNL_REQ_MASK_SET 0 32 read-write CHNLSWREQUEST DMA Channel Software Request Register 0x14 32 write-only n 0x0 0x0 CHNL_SW_REQUEST CHNL_SW_REQUEST 0 32 write-only CHNLUSEBURSTCLR DMA Channel Useburst Clear Register 0x1C 32 write-only n 0x0 0x0 CHNL_USEBURST_CLR CHNL_USEBURST_CLR 0 32 write-only CHNLUSEBURSTSET DMA Channel Useburst Set Register 0x18 32 read-write n 0x0 0x0 CHNL_USEBURST_SET CHNL_USEBURST_SET 0 32 read-write CTRLBASEPTR DMA Control Data Base Pointer Register 0x8 32 read-write n 0x0 0x0 CTRL_BASE_PTR CTRL_BASE_PTR 10 22 read-write ERRCLR DMA Bus Error Clear Register 0x4C 32 read-write n 0x0 0x0 ERR_CLR ERR_CLR 0 1 read-write STATUS DMA Status Register 0x0 32 read-only n 0x0 0x0 MASTER_ENABLE MASTER_ENABLE 0 1 read-only EM UDC2 AHB Bridge EM 0x0 0x0 0x8 registers n 0x10 0x8 registers n 0x1000 0x4 registers n 0x1004 0x4 reserved n 0x1008 0x4 registers n 0x100C 0x4 reserved n 0x1010 0x4 registers n 0x1014 0x4 reserved n 0x1018 0x4 registers n 0x101C 0x4 reserved n 0x1020 0x4 registers n 0x1024 0x4 reserved n 0x1028 0x4 registers n 0x102C 0x4 reserved n 0x1030 0x4 registers n 0x1034 0x4 reserved n 0x1038 0x4 registers n 0x103C 0x4 reserved n 0x1040 0x4 registers n 0x1044 0x4 reserved n 0x1048 0x4 registers n 0x104C 0x4 reserved n 0x1050 0x4 registers n 0x1054 0x4 reserved n 0x1058 0x4 registers n 0x105C 0x4 reserved n 0x1060 0xC registers n 0x106C 0x4 reserved n 0x1070 0x4 registers n 0x1074 0x4 reserved n 0x1078 0x8 registers n 0x1080 0x48 reserved n 0x10C8 0x8 registers n 0x10D0 0x4 reserved n 0x10D4 0x8 registers n 0x10DC 0x24 reserved n 0x1100 0x4 registers n 0x1104 0x4 reserved n 0x1108 0x4 registers n 0x110C 0x4 reserved n 0x1110 0x4 registers n 0x1114 0x4 reserved n 0x1118 0x4 registers n 0x111C 0x4 reserved n 0x1120 0x4 registers n 0x1124 0x4 reserved n 0x1128 0x4 registers n 0x112C 0x24 reserved n 0x1150 0xC registers n 0x115C 0x4 reserved n 0x1160 0x10 registers n 0x1170 0x50 reserved n 0x11C0 0x4 registers n 0x11C4 0x4 reserved n 0x11C8 0x4 registers n 0x11CC 0x4 reserved n 0x11D0 0x10 registers n 0x11E0 0x4 reserved n 0x11E4 0x18 registers n 0x18 0xFE8 reserved n 0x8 0x8 reserved n CAPR Auto Pause Parameter Setting Register 0x1154 32 read-write n 0x0 0x0 APAUSE APAUSE 0 16 read-write CBRR Broadcast Frame Reception Number Of Times Setting Register 0x116C 32 read-write n 0x0 0x0 BCF BCF 0 16 read-write CCR Ether FeLic Active Mode Register 0x1100 32 read-write n 0x0 0x0 CER CER 12 1 read-write DPM DPM 1 1 read-write ILB ILB 3 1 read-write MPM MPM 9 1 read-write OLB OLB 2 1 read-write PFR PFR 18 1 read-write PRM PRM 0 1 read-write RPE RPE 6 1 read-write RXF RXF 17 1 read-write TPC TPC 20 1 read-write TPE TPE 5 1 read-write TPF TPF 19 1 read-write TXF TXF 16 1 read-write CICR IPG Counter Setting Register 0x1150 32 read-write n 0x0 0x0 IPG IPG 0 5 read-write CINTEN Interrupt mask setting Register 0x1118 32 read-write n 0x0 0x0 BRDSRCV BRDSRCV 5 1 read-write FCIDTCT FCIDTCT 0 1 read-write LINKCHNG LINKCHNG 2 1 read-write MAGICPKT MAGICPKT 1 1 read-write PSRTROV PSRTROV 4 1 read-write CINTST Status indication Register 0x1110 32 read-write n 0x0 0x0 BRDSRCV BRDSRCV 5 1 read-write FCIDTCT FCIDTCT 0 1 read-write LINKCHNG LINKCHNG 2 1 read-write MAGICPKT MAGICPKT 1 1 read-write PSRTROV PSRTROV 4 1 read-write CMAHR Mac Address Register (High Rank) 0x11C0 32 read-write n 0x0 0x0 MACADRH MACADRH 0 32 read-write CMALR Mac Address Register (Low Rank) 0x11C8 32 read-write n 0x0 0x0 MACADRL MACADRL 0 32 read-write CMIICR M Control Register 0x1120 32 read-write n 0x0 0x0 MDC MDC 0 1 read-write MDI MDI 3 1 read-write MDO MDO 2 1 read-write MMD MMD 1 1 read-write CMPR Manual Pause Parameter setting Register 0x1158 32 read-write n 0x0 0x0 MPAUSE MPAUSE 0 16 write-only CPCR PAUSE Frame Retransmission Number Of Times Counter Register 0x1168 32 read-only n 0x0 0x0 TPAUSE TPAUSE 0 16 read-only CPHYST Status Signal Register 0x1128 32 read-only n 0x0 0x0 LINK LINK 0 1 read-only CPULR PAUSE Frame Retransmission Number Of Times Setting Register 0x1164 32 read-write n 0x0 0x0 TXPAUSE TXPAUSE 0 16 read-write CRCER RINT1 Cunter Register 0x11E4 32 read-write n 0x0 0x0 RINT1CNT RINT1CNT 0 32 read-write CRFER RINT2 Cunter Register 0x11E8 32 read-write n 0x0 0x0 RINT2CNT RINT2CNT 0 32 read-write CRFLR Long Frame Length Check Level Setting Register 0x1108 32 read-write n 0x0 0x0 FLEN_ULMT FLEN_ULMT 0 12 read-write CRLOR RINT4 Cunter Register 0x11F0 32 read-write n 0x0 0x0 RINT4CNT RINT4CNT 0 32 read-write CRLSR RINT3 Cunter Register 0x11EC 32 read-write n 0x0 0x0 RINT3CNT RINT3CNT 0 32 read-write CRMFR RINT8 Cunter Register 0x11F8 32 read-write n 0x0 0x0 RINT8CNT RINT8CNT 0 32 read-write CRPCR Reception PAUSE Frame Counter Register 0x1160 32 read-only n 0x0 0x0 RPAUSE RPAUSE 0 8 read-only CRRFR RINT5 Cunter Register 0x11F4 32 read-write n 0x0 0x0 RINT5CNT RINT5CNT 0 32 read-write CTCDR TINT2 Cunter Register 0x11D4 32 read-write n 0x0 0x0 TINT2CNT TINT2CNT 0 32 read-write CTCLR TINT3 Cunter Register 0x11D8 32 read-write n 0x0 0x0 TINT3CNT TINT3CNT 0 32 read-write CTNDR TINT4 Cunter Register 0x11DC 32 read-write n 0x0 0x0 TINT4CNT TINT4CNT 0 32 read-write CTRER TINT1 Cunter Register 0x11D0 32 read-write n 0x0 0x0 TINT1CNT TINT1CNT 0 32 read-write DCR EMDMAC Movement Control Register 0x1000 32 read-write n 0x0 0x0 DE DE 6 1 read-write DL DL 4 2 read-write SWR SWR 0 1 read-write DEADR DMA Error Address Register 0x1060 32 read-write n 0x0 0x0 ERRADR ERRADR 0 32 read-write DERR Err Mask Setting Register 0x1038 32 read-write n 0x0 0x0 RINT1 RINT1 0 1 read-write RINT2 RINT2 1 1 read-write RINT3 RINT3 2 1 read-write RINT4 RINT4 3 1 read-write RINT5 RINT5 4 1 read-write RINT8 RINT8 7 1 read-write TINT1 TINT1 8 1 read-write TINT2 TINT2 9 1 read-write TINT3 TINT3 10 1 read-write TINT4 TINT4 11 1 read-write DFCDR Outside FIFO Capacity Setting Register 0x1050 32 read-write n 0x0 0x0 RA RA 0 5 read-write TA TA 8 5 read-write DINTEN EMDMAC Interrupt mask setting Register 0x1030 32 read-write n 0x0 0x0 BER BER 23 1 read-write FRC FRC 18 1 read-write FTC FTC 21 1 read-write MINT MINT 22 1 read-write RABT RABT 25 1 read-write RDE RDE 17 1 read-write RFE RFE 16 1 read-write RFRMER RFRMER 24 1 read-write RINT1 RINT1 0 1 read-write RINT2 RINT2 1 1 read-write RINT3 RINT3 2 1 read-write RINT4 RINT4 3 1 read-write RINT5 RINT5 4 1 read-write RINT8 RINT8 7 1 read-write TABT TABT 26 1 read-write TDE TDE 20 1 read-write TFE TFE 19 1 read-write TINT1 TINT1 8 1 read-write TINT2 TINT2 9 1 read-write TINT3 TINT3 10 1 read-write TINT4 TINT4 11 1 read-write TWB TWB 30 1 read-write DINTST EMSMAC Interrupt Status Indication Register 0x1028 32 read-write n 0x0 0x0 BER BER 23 1 read-write FRC FRC 18 1 read-write FTC FTC 21 1 read-write MINT MINT 22 1 read-write RABT RABT 25 1 read-write RDE RDE 17 1 read-write RFE RFE 16 1 read-write RFRMER RFRMER 24 1 read-write RINT1 RINT1 0 1 read-write RINT2 RINT2 1 1 read-write RINT3 RINT3 2 1 read-write RINT4 RINT4 3 1 read-write RINT5 RINT5 4 1 read-write RINT8 RINT8 7 1 read-write TABT TABT 26 1 read-write TDE TDE 20 1 read-write TFE TFE 19 1 read-write TINT1 TINT1 8 1 read-write TINT2 TINT2 9 1 read-write TINT3 TINT3 10 1 read-write TINT4 TINT4 11 1 read-write TWB TWB 30 1 read-write DMFCR Disposal Frame Count Register 0x1040 32 read-write n 0x0 0x0 MIS MIS 0 16 read-write DRBAR Reception Buffer Light Address For debugging Register 0x10C8 32 read-only n 0x0 0x0 RBWA RBWA 0 32 read-only DRBTR Transmission FIFO Busy Transmission Thresholding Register 0x1070 32 read-write n 0x0 0x0 RFDO RFDO 0 3 read-write RFFO RFFO 16 3 read-write DRDAR Reception Dscripter Read Address For Debugging Register 0x10CC 32 read-only n 0x0 0x0 RDRA RDRA 0 32 read-only DRDPR Reception Dscripter top address setting Register 0x1020 32 read-write n 0x0 0x0 RDPA RDPA 0 32 read-write DREN Reception instructions Register 0x1010 32 read-write n 0x0 0x0 RCV RCV 0 1 read-write DROFR Reception FIFO Underflow Count Register 0x1068 32 read-write n 0x0 0x0 OVER OVER 0 16 read-write DRPDR Reception Data Padding setting Register 0x1078 32 read-write n 0x0 0x0 PADR PADR 0 6 read-write PADS PADS 16 2 read-write DRRCR Reception Start Reset Setting Register 0x1058 32 read-write n 0x0 0x0 RNR RNR 1 1 read-write RR RR 0 1 read-write DTBAR Transmission Read Address For Debugging Register 0x10D4 32 read-only n 0x0 0x0 TBRA TBRA 0 32 read-only DTDAR Transmission Dscripter Read Address For Debugging Register 0x10D8 32 read-only n 0x0 0x0 TDRA TDRA 0 32 read-only DTDPR Transmission Dscripter top address setting Register 0x1018 32 read-write n 0x0 0x0 TDPA TDPA 0 32 read-write DTEN Transmission Instructions Register 0x1008 32 read-write n 0x0 0x0 TRNS TRNS 0 1 read-write DTFTR Transmission FIFO thresholding Register 0x1048 32 read-write n 0x0 0x0 TFTH TFTH 0 11 read-write DTIMER Transmission Interrupt Mode Setting Register 0x107C 32 read-write n 0x0 0x0 TIM TIM 4 1 read-write TIS TIS 0 1 read-write DTUFR Transmission FIFO Underflow Count Register 0x1064 32 read-write n 0x0 0x0 UNDER UNDER 0 16 read-write IFCR ADiC MODE Setting Register 0x4 32 read-write n 0x0 0x0 DMAERR DMAERR 10 1 read-write DMATOUT DMATOUT 9 1 read-write IOTOUT IOTOUT 8 1 read-write IFINTEN ADiC Interrupt Enable Register 0x14 32 read-write n 0x0 0x0 DMATOUT DMATOUT 23 1 read-write EMDMACINT EMDMACINT 0 1 read-write IOTOUT IOTOUT 15 1 read-write MASTER0 MASTER0 16 1 read-write MASTER1 MASTER1 17 1 read-write MASTER2 MASTER2 18 1 read-write SLAVE0 SLAVE0 8 1 read-write SLAVE1 SLAVE1 9 1 read-write SLAVE2 SLAVE2 10 1 read-write SLAVE3 SLAVE3 11 1 read-write IFINTST ADiC Interrupt Status Register 0x10 32 read-write n 0x0 0x0 DMATOUT DMATOUT 23 1 read-write EMDMACINT EMDMACINT 0 1 read-write IOTOUT IOTOUT 15 1 read-write MASTER0 MASTER0 16 1 read-write MASTER1 MASTER1 17 1 read-write MASTER2 MASTER2 18 1 read-write SLAVE0 SLAVE0 8 1 read-write SLAVE1 SLAVE1 9 1 read-write SLAVE2 SLAVE2 10 1 read-write SLAVE3 SLAVE3 11 1 read-write IFVRR ADiC Version_Revision Register 0x0 32 read-only n 0x0 0x0 REV REV 0 16 read-only VER VER 16 16 read-only EN0 Encoder Input (ENC) EN0 0x0 0x0 0x10 registers n CNT Encoder Counter Register 0xC 32 read-write n 0x0 0x0 CNT CNT 0 24 read-write INT Encoder Compare Register 0x8 32 read-write n 0x0 0x0 INT INT 0 24 read-write RELOAD Encoder Counter Reload Register 0x4 32 read-write n 0x0 0x0 RELOAD RELOAD 0 16 read-write TNCR Encoder Input Control Register 0x0 32 read-write n 0x0 0x0 CMP CMP 15 1 read-only CMPEN CMPEN 8 1 read-write ENCLR ENCLR 10 1 write-only ENDEV ENDEV 0 3 read-write ENRUN ENRUN 6 1 read-write INTEN INTEN 3 1 read-write MODE MODE 17 2 read-write NR NR 4 2 read-write P3EN P3EN 16 1 read-write REVERR REVERR 14 1 read-only SFTCAP SFTCAP 11 1 write-only UD UD 13 1 read-only ZDET ZDET 12 1 read-only ZEN ZEN 7 1 read-write ZESEL ZESEL 9 1 read-write EN1 Encoder Input (ENC) EN0 0x0 0x0 0x10 registers n CNT Encoder Counter Register 0xC 32 read-write n 0x0 0x0 CNT CNT 0 24 read-write INT Encoder Compare Register 0x8 32 read-write n 0x0 0x0 INT INT 0 24 read-write RELOAD Encoder Counter Reload Register 0x4 32 read-write n 0x0 0x0 RELOAD RELOAD 0 16 read-write TNCR Encoder Input Control Register 0x0 32 read-write n 0x0 0x0 CMP CMP 15 1 read-only CMPEN CMPEN 8 1 read-write ENCLR ENCLR 10 1 write-only ENDEV ENDEV 0 3 read-write ENRUN ENRUN 6 1 read-write INTEN INTEN 3 1 read-write MODE MODE 17 2 read-write NR NR 4 2 read-write P3EN P3EN 16 1 read-write REVERR REVERR 14 1 read-only SFTCAP SFTCAP 11 1 write-only UD UD 13 1 read-only ZDET ZDET 12 1 read-only ZEN ZEN 7 1 read-write ZESEL ZESEL 9 1 read-write EXB External Bus Interface(EXB) EXB 0x0 0x0 0x4 registers n 0x10 0x10 registers n 0x20 0x20 reserved n 0x4 0xC reserved n 0x40 0x10 registers n AS0 External Bus Base Address and CS Space setting Register 0 0x10 32 read-write n 0x0 0x0 EXAR EXAR 0 8 read-write SA SA 16 16 read-write AS1 External Bus Base Address and CS Space setting Register 1 0x14 32 read-write n 0x0 0x0 EXAR EXAR 0 8 read-write SA SA 16 16 read-write AS2 External Bus Base Address and CS Space setting Register 2 0x18 32 read-write n 0x0 0x0 EXAR EXAR 0 8 read-write SA SA 16 16 read-write AS3 External Bus Base Address and CS Space setting Register 3 0x1C 32 read-write n 0x0 0x0 EXAR EXAR 0 8 read-write SA SA 16 16 read-write CS0 Chip Select and Wait Controller Register 0 0x40 32 read-write n 0x0 0x0 ALEW ALEW 20 2 read-write CSIW CSIW 8 5 read-write CSR CSR 30 2 read-write CSW0 CSW0 0 1 read-write CSW1 CSW1 1 1 read-write CSW2 CSW2 2 1 read-write RDR RDR 24 3 read-write RDS RDS 16 2 read-write WRR WRR 27 3 read-write WRS WRS 18 2 read-write CS1 Chip Select and Wait Controller Register 1 0x44 32 read-write n 0x0 0x0 ALEW ALEW 20 2 read-write CSIW CSIW 8 5 read-write CSR CSR 30 2 read-write CSW0 CSW0 0 1 read-write CSW1 CSW1 1 1 read-write CSW2 CSW2 2 1 read-write RDR RDR 24 3 read-write RDS RDS 16 2 read-write WRR WRR 27 3 read-write WRS WRS 18 2 read-write CS2 Chip Select and Wait Controller Register 2 0x48 32 read-write n 0x0 0x0 ALEW ALEW 20 2 read-write CSIW CSIW 8 5 read-write CSR CSR 30 2 read-write CSW0 CSW0 0 1 read-write CSW1 CSW1 1 1 read-write CSW2 CSW2 2 1 read-write RDR RDR 24 3 read-write RDS RDS 16 2 read-write WRR WRR 27 3 read-write WRS WRS 18 2 read-write CS3 Chip Select and Wait Controller Register 3 0x4C 32 read-write n 0x0 0x0 ALEW ALEW 20 2 read-write CSIW CSIW 8 5 read-write CSR CSR 30 2 read-write CSW0 CSW0 0 1 read-write CSW1 CSW1 1 1 read-write CSW2 CSW2 2 1 read-write RDR RDR 24 3 read-write RDS RDS 16 2 read-write WRR WRR 27 3 read-write WRS WRS 18 2 read-write MOD External Bus Mode Register 0x0 32 read-write n 0x0 0x0 EXBSEL EXBSEL 0 1 read-write EXBWAIT EXBWAIT 1 2 read-write FC Flash Control (FC) FC 0x0 0x0 0x10 reserved n 0x10 0x4 registers n 0x14 0xC reserved n 0x20 0x4 registers n FLCS FC Flash Control Register 0x20 32 read-only n 0x0 0x0 BLPRO BLPRO 16 6 read-only RDY_BSY RDY_BSY 0 1 read-only SECBIT FC Security Bit Register 0x10 32 read-write n 0x0 0x0 SECBIT SECBIT 0 1 read-write HC USB Host Controller (USBHC) HC 0x0 0x0 0x58 registers n 0x58 0x28 reserved n 0x80 0x4 registers n BCR0 USB Host Controller Clock and Transceiver Control Register 0x80 32 read-write n 0x0 0x0 OVCE OVCE 29 1 read-write TRNS_SUSP TRNS_SUSP 30 1 read-write BULKCURRENTED USB Host Controller Bulk Current ED Register 0x2C 32 read-write n 0x0 0x0 BCED BCED 4 28 read-write BULKHEADED USB Host Controller Bulk Head ED Register 0x28 32 read-write n 0x0 0x0 BHED BHED 4 28 read-write COMMANDSTATUS USB Host Controller Command Status Register 0x8 32 read-write n 0x0 0x0 BLF BLF 2 1 read-write CLF CLF 1 1 read-write HCR HCR 0 1 read-write OCR OCR 3 1 read-write SOC SOC 16 2 read-only CONTROL USB Host Controller Control Register 0x4 32 read-write n 0x0 0x0 BLE BLE 5 1 read-write CBSR CBSR 0 2 read-write CLE CLE 4 1 read-write HCFS HCFS 6 2 read-write IE IE 3 1 read-write IR IR 8 1 read-write PLE PLE 2 1 read-write RWC RWC 9 1 read-write RWE RWE 10 1 read-write CONTROLCURRENTED USB Host Controller Control Current ED Register 0x24 32 read-write n 0x0 0x0 CCED CCED 4 28 read-write CONTROLHEADED USB Host Controller Control Head ED Register 0x20 32 read-write n 0x0 0x0 CHED CHED 4 28 read-write DONEHEAD USB Host Controller Done Head Register 0x30 32 read-only n 0x0 0x0 DH DH 4 28 read-only FMINTERVAL USB Host Controller Frame Interval Register 0x34 32 read-write n 0x0 0x0 FI FI 0 14 read-write FIT FIT 31 1 read-write FSMPS FSMPS 16 15 read-write FMNUMBER USB Host Controller Frame Number Register 0x3C 32 read-only n 0x0 0x0 FN FN 0 16 read-only FMREMAINING USB Host Controller Frame Remaining Register 0x38 32 read-only n 0x0 0x0 FR FR 0 14 read-only FRT FRT 31 1 read-only HCCA USB Host Controller Communication Area Register 0x18 32 read-write n 0x0 0x0 HCCA HCCA 8 24 read-write INTERRUPTDISABLE USB Host Controller Interrupt Disable Register 0x14 32 read-write n 0x0 0x0 FNO FNO 5 1 read-write MIE MIE 31 1 read-write OC OC 30 1 read-write RD RD 3 1 read-write RHSC RHSC 6 1 read-write SF SF 2 1 read-write SO SO 0 1 read-write UE UE 4 1 read-write WDH WDH 1 1 read-write INTERRUPTENABLE USB Host Controller Interrupt Enable Register 0x10 32 read-write n 0x0 0x0 FNO FNO 5 1 read-write MIE MIE 31 1 read-write OC OC 30 1 read-write RD RD 3 1 read-write RHSC RHSC 6 1 read-write SF SF 2 1 read-write SO SO 0 1 read-write UE UE 4 1 read-write WDH WDH 1 1 read-write INTERRUPTSTATUS USB Host Controller Interrupt Status Register 0xC 32 read-write n 0x0 0x0 FNO FNO 5 1 read-write OC OC 30 1 read-write RD RD 3 1 read-write RHSC RHSC 6 1 read-write SF SF 2 1 read-write SO SO 0 1 read-write UE UE 4 1 read-write WDH WDH 1 1 read-write LSTHRESHOLD USB Host Controller LS Threshold Register 0x44 32 read-write n 0x0 0x0 LST LST 0 12 read-write PERIODCURRENTED USB Host Controller Period Current ED Register 0x1C 32 read-only n 0x0 0x0 PCED PCED 4 28 read-only PERIODSTART USB Host Controller Period Start Register 0x40 32 read-write n 0x0 0x0 PS PS 0 14 read-write REVISION USB Host Controller Revision Register 0x0 32 read-only n 0x0 0x0 REV REV 0 8 read-only RHDESCRIPTORA USB Host Controller Root Hub Descriptor Register 0x48 32 read-write n 0x0 0x0 DT DT 10 1 read-only NDP NDP 0 8 read-only NOCP NOCP 12 1 read-write NPS NPS 9 1 read-write OCPM OCPM 11 1 read-write POTPGT POTPGT 24 8 read-write PSM PSM 8 1 read-write RHDESCRIPTORB USB Host Controller Root Hub Descriptor Register 0x4C 32 read-write n 0x0 0x0 DR DR 0 16 read-write PPCM PPCM 16 16 read-write RHPORTSTATUS1 USB Host Controller Root Hub Port Status Register 0x54 32 read-write n 0x0 0x0 CCS CCS 0 1 read-write CSC CSC 16 1 read-write LSDA LSDA 9 1 read-write OCIC OCIC 19 1 read-write PES PES 1 1 read-write PESC PESC 17 1 read-write POCI POCI 3 1 read-write PPS PPS 8 1 read-write PRS PRS 4 1 read-write PRSC PRSC 20 1 read-write PSS PSS 2 1 read-write PSSC PSSC 18 1 read-write RHSTATUS USB Host Controller Root Hub Status Register 0x50 32 read-write n 0x0 0x0 CRWE CRWE 31 1 write-only DRWE DRWE 15 1 read-write LPS LPS 0 1 read-write LPSC LPSC 16 1 read-write OCI OCI 1 1 read-only OCIC OCIC 17 1 read-write LVD Low Voltage detector control register LVD 0x0 0x0 0xC registers n ICR LVD-NMI Control Register 0x4 32 read-write n 0x0 0x0 INTSEL INTSEL 4 1 read-write LVDEN2 LVDEN2 0 1 read-write LVDINTEN LVDINTEN 5 1 read-write LVDLVL2 LVDLVL2 1 3 read-write RCR LVD-RESET Control Register 0x0 32 read-write n 0x0 0x0 LVDEN1 LVDEN1 0 1 read-write LVDLVL1 LVDLVL1 1 3 read-write LVDRSTEN LVDRSTEN 5 1 read-write SR LVD Status Control Register 0x8 32 read-write n 0x0 0x0 LVDST1 LVDST1 0 1 read-write LVDST2 LVDST2 1 1 read-write MT0 16-bit Multi-Purpose Timer (MPT-TMR_IGBT) MT0 0x0 0x0 0x58 registers n CP0 MPT CP0 Capture Register 0x28 32 read-only n 0x0 0x0 MTCP0 MTCP0 0 16 read-only CP1 MPT CP1 Capture Register 0x2C 32 read-only n 0x0 0x0 MTCP1 MTCP1 0 16 read-only EN MPT Enable Register 0x0 32 read-write n 0x0 0x0 MTEN MTEN 7 1 read-write MTHALT MTHALT 6 1 read-write MTMODE MTMODE 0 1 read-write IGCR IGBT Control Register 0x30 32 read-write n 0x0 0x0 IGCLK IGCLK 0 2 read-write IGIDIS IGIDIS 10 1 read-write IGPRD IGPRD 8 2 read-write IGSNGL IGSNGL 6 1 read-write IGSTA IGSTA 2 2 read-write IGSTP IGSTP 4 2 read-write IGEMGCR IGBT EMG Control Register 0x50 32 read-write n 0x0 0x0 IGEMGCNT IGEMGCNT 4 4 read-write IGEMGEN IGEMGEN 0 1 read-write IGEMGOC IGEMGOC 1 1 read-write IGEMGRS IGEMGRS 2 1 write-only IGEMGST IGBT EMG Status Register 0x54 32 read-only n 0x0 0x0 IGEMGIN IGEMGIN 1 1 read-only IGEMGST IGEMGST 0 1 read-only IGICR IGBT Input Control Register 0x3C 32 read-write n 0x0 0x0 IGNCSEL IGNCSEL 0 4 read-write IGTRGM IGTRGM 7 1 read-write IGTRGSEL IGTRGSEL 6 1 read-write IGOCR IGBT Output Control Register 0x40 32 read-write n 0x0 0x0 IGOEN0 IGOEN0 0 1 read-write IGOEN1 IGOEN1 1 1 read-write IGPOL0 IGPOL0 4 1 read-write IGPOL1 IGPOL1 5 1 read-write IGRESTA IGBT Timer Restart Register 0x34 32 write-only n 0x0 0x0 IGRESTA IGRESTA 0 1 write-only IGRG2 IGBT RG2 Timer Register 0x44 32 read-write n 0x0 0x0 IGRG2 IGRG2 0 16 read-write IGRG3 IGBT RG3 Timer Register 0x48 32 read-write n 0x0 0x0 IGRG3 IGRG3 0 16 read-write IGRG4 IGBT RG4 Timer Register 0x4C 32 read-write n 0x0 0x0 IGRG4 IGRG4 0 16 read-write IGST IGBT Timer Status Register 0x38 32 read-only n 0x0 0x0 IGST IGST 0 1 read-only RG0 MPT RG0 Timer Register 0x20 32 read-write n 0x0 0x0 MTRG0 MTRG0 0 16 read-write RG1 MPT RG1 Timer Register 0x24 32 read-write n 0x0 0x0 MTRG1 MTRG1 0 16 read-write RUN MPT RUN Register 0x4 32 read-write n 0x0 0x0 MTPRUN MTPRUN 2 1 read-write MTRUN MTRUN 0 1 read-write TBCR MPT Control Register 0x8 32 read-write n 0x0 0x0 MTI2TB MTI2TB 3 1 read-write MTTBCSSEL MTTBCSSEL 0 1 read-write MTTBTRGSEL MTTBTRGSEL 1 1 read-write MTTBWBF MTTBWBF 7 1 read-write TBFFCR MPT Flip-Flop Control Register 0x10 32 read-write n 0x0 0x0 MTTBC0T1 MTTBC0T1 4 1 read-write MTTBC1T1 MTTBC1T1 5 1 read-write MTTBE0T1 MTTBE0T1 2 1 read-write MTTBE1T1 MTTBE1T1 3 1 read-write MTTBFF0C MTTBFF0C 0 2 read-write TBIM MPT Interrupt Mask Register 0x18 32 read-write n 0x0 0x0 MTTBIM0 MTTBIM0 0 1 read-write MTTBIM1 MTTBIM1 1 1 read-write MTTBIMOF MTTBIMOF 2 1 read-write TBMOD MPT Mode Register 0xC 32 read-write n 0x0 0x0 MTTBCLE MTTBCLE 2 1 read-write MTTBCLK MTTBCLK 0 2 read-write MTTBCP MTTBCP 5 1 write-only MTTBCPM MTTBCPM 3 2 read-write MTTBRSWR MTTBRSWR 6 1 read-write TBST MPT Status Register 0x14 32 read-only n 0x0 0x0 MTTBINTTB0 MTTBINTTB0 0 1 read-only MTTBINTTB1 MTTBINTTB1 1 1 read-only MTTBINTTBOF MTTBINTTBOF 2 1 read-only TBUC MPT Read Capture Register 0x1C 32 read-only n 0x0 0x0 MTUC MTUC 0 16 read-only MT1 16-bit Multi-Purpose Timer (MPT-TMR_IGBT) MT0 0x0 0x0 0x58 registers n CP0 MPT CP0 Capture Register 0x28 32 read-only n 0x0 0x0 MTCP0 MTCP0 0 16 read-only CP1 MPT CP1 Capture Register 0x2C 32 read-only n 0x0 0x0 MTCP1 MTCP1 0 16 read-only EN MPT Enable Register 0x0 32 read-write n 0x0 0x0 MTEN MTEN 7 1 read-write MTHALT MTHALT 6 1 read-write MTMODE MTMODE 0 1 read-write IGCR IGBT Control Register 0x30 32 read-write n 0x0 0x0 IGCLK IGCLK 0 2 read-write IGIDIS IGIDIS 10 1 read-write IGPRD IGPRD 8 2 read-write IGSNGL IGSNGL 6 1 read-write IGSTA IGSTA 2 2 read-write IGSTP IGSTP 4 2 read-write IGEMGCR IGBT EMG Control Register 0x50 32 read-write n 0x0 0x0 IGEMGCNT IGEMGCNT 4 4 read-write IGEMGEN IGEMGEN 0 1 read-write IGEMGOC IGEMGOC 1 1 read-write IGEMGRS IGEMGRS 2 1 write-only IGEMGST IGBT EMG Status Register 0x54 32 read-only n 0x0 0x0 IGEMGIN IGEMGIN 1 1 read-only IGEMGST IGEMGST 0 1 read-only IGICR IGBT Input Control Register 0x3C 32 read-write n 0x0 0x0 IGNCSEL IGNCSEL 0 4 read-write IGTRGM IGTRGM 7 1 read-write IGTRGSEL IGTRGSEL 6 1 read-write IGOCR IGBT Output Control Register 0x40 32 read-write n 0x0 0x0 IGOEN0 IGOEN0 0 1 read-write IGOEN1 IGOEN1 1 1 read-write IGPOL0 IGPOL0 4 1 read-write IGPOL1 IGPOL1 5 1 read-write IGRESTA IGBT Timer Restart Register 0x34 32 write-only n 0x0 0x0 IGRESTA IGRESTA 0 1 write-only IGRG2 IGBT RG2 Timer Register 0x44 32 read-write n 0x0 0x0 IGRG2 IGRG2 0 16 read-write IGRG3 IGBT RG3 Timer Register 0x48 32 read-write n 0x0 0x0 IGRG3 IGRG3 0 16 read-write IGRG4 IGBT RG4 Timer Register 0x4C 32 read-write n 0x0 0x0 IGRG4 IGRG4 0 16 read-write IGST IGBT Timer Status Register 0x38 32 read-only n 0x0 0x0 IGST IGST 0 1 read-only RG0 MPT RG0 Timer Register 0x20 32 read-write n 0x0 0x0 MTRG0 MTRG0 0 16 read-write RG1 MPT RG1 Timer Register 0x24 32 read-write n 0x0 0x0 MTRG1 MTRG1 0 16 read-write RUN MPT RUN Register 0x4 32 read-write n 0x0 0x0 MTPRUN MTPRUN 2 1 read-write MTRUN MTRUN 0 1 read-write TBCR MPT Control Register 0x8 32 read-write n 0x0 0x0 MTI2TB MTI2TB 3 1 read-write MTTBCSSEL MTTBCSSEL 0 1 read-write MTTBTRGSEL MTTBTRGSEL 1 1 read-write MTTBWBF MTTBWBF 7 1 read-write TBFFCR MPT Flip-Flop Control Register 0x10 32 read-write n 0x0 0x0 MTTBC0T1 MTTBC0T1 4 1 read-write MTTBC1T1 MTTBC1T1 5 1 read-write MTTBE0T1 MTTBE0T1 2 1 read-write MTTBE1T1 MTTBE1T1 3 1 read-write MTTBFF0C MTTBFF0C 0 2 read-write TBIM MPT Interrupt Mask Register 0x18 32 read-write n 0x0 0x0 MTTBIM0 MTTBIM0 0 1 read-write MTTBIM1 MTTBIM1 1 1 read-write MTTBIMOF MTTBIMOF 2 1 read-write TBMOD MPT Mode Register 0xC 32 read-write n 0x0 0x0 MTTBCLE MTTBCLE 2 1 read-write MTTBCLK MTTBCLK 0 2 read-write MTTBCP MTTBCP 5 1 write-only MTTBCPM MTTBCPM 3 2 read-write MTTBRSWR MTTBRSWR 6 1 read-write TBST MPT Status Register 0x14 32 read-only n 0x0 0x0 MTTBINTTB0 MTTBINTTB0 0 1 read-only MTTBINTTB1 MTTBINTTB1 1 1 read-only MTTBINTTBOF MTTBINTTBOF 2 1 read-only TBUC MPT Read Capture Register 0x1C 32 read-only n 0x0 0x0 MTUC MTUC 0 16 read-only MT2 16-bit Multi-Purpose Timer (MPT-TMR_IGBT) MT0 0x0 0x0 0x58 registers n CP0 MPT CP0 Capture Register 0x28 32 read-only n 0x0 0x0 MTCP0 MTCP0 0 16 read-only CP1 MPT CP1 Capture Register 0x2C 32 read-only n 0x0 0x0 MTCP1 MTCP1 0 16 read-only EN MPT Enable Register 0x0 32 read-write n 0x0 0x0 MTEN MTEN 7 1 read-write MTHALT MTHALT 6 1 read-write MTMODE MTMODE 0 1 read-write IGCR IGBT Control Register 0x30 32 read-write n 0x0 0x0 IGCLK IGCLK 0 2 read-write IGIDIS IGIDIS 10 1 read-write IGPRD IGPRD 8 2 read-write IGSNGL IGSNGL 6 1 read-write IGSTA IGSTA 2 2 read-write IGSTP IGSTP 4 2 read-write IGEMGCR IGBT EMG Control Register 0x50 32 read-write n 0x0 0x0 IGEMGCNT IGEMGCNT 4 4 read-write IGEMGEN IGEMGEN 0 1 read-write IGEMGOC IGEMGOC 1 1 read-write IGEMGRS IGEMGRS 2 1 write-only IGEMGST IGBT EMG Status Register 0x54 32 read-only n 0x0 0x0 IGEMGIN IGEMGIN 1 1 read-only IGEMGST IGEMGST 0 1 read-only IGICR IGBT Input Control Register 0x3C 32 read-write n 0x0 0x0 IGNCSEL IGNCSEL 0 4 read-write IGTRGM IGTRGM 7 1 read-write IGTRGSEL IGTRGSEL 6 1 read-write IGOCR IGBT Output Control Register 0x40 32 read-write n 0x0 0x0 IGOEN0 IGOEN0 0 1 read-write IGOEN1 IGOEN1 1 1 read-write IGPOL0 IGPOL0 4 1 read-write IGPOL1 IGPOL1 5 1 read-write IGRESTA IGBT Timer Restart Register 0x34 32 write-only n 0x0 0x0 IGRESTA IGRESTA 0 1 write-only IGRG2 IGBT RG2 Timer Register 0x44 32 read-write n 0x0 0x0 IGRG2 IGRG2 0 16 read-write IGRG3 IGBT RG3 Timer Register 0x48 32 read-write n 0x0 0x0 IGRG3 IGRG3 0 16 read-write IGRG4 IGBT RG4 Timer Register 0x4C 32 read-write n 0x0 0x0 IGRG4 IGRG4 0 16 read-write IGST IGBT Timer Status Register 0x38 32 read-only n 0x0 0x0 IGST IGST 0 1 read-only RG0 MPT RG0 Timer Register 0x20 32 read-write n 0x0 0x0 MTRG0 MTRG0 0 16 read-write RG1 MPT RG1 Timer Register 0x24 32 read-write n 0x0 0x0 MTRG1 MTRG1 0 16 read-write RUN MPT RUN Register 0x4 32 read-write n 0x0 0x0 MTPRUN MTPRUN 2 1 read-write MTRUN MTRUN 0 1 read-write TBCR MPT Control Register 0x8 32 read-write n 0x0 0x0 MTI2TB MTI2TB 3 1 read-write MTTBCSSEL MTTBCSSEL 0 1 read-write MTTBTRGSEL MTTBTRGSEL 1 1 read-write MTTBWBF MTTBWBF 7 1 read-write TBFFCR MPT Flip-Flop Control Register 0x10 32 read-write n 0x0 0x0 MTTBC0T1 MTTBC0T1 4 1 read-write MTTBC1T1 MTTBC1T1 5 1 read-write MTTBE0T1 MTTBE0T1 2 1 read-write MTTBE1T1 MTTBE1T1 3 1 read-write MTTBFF0C MTTBFF0C 0 2 read-write TBIM MPT Interrupt Mask Register 0x18 32 read-write n 0x0 0x0 MTTBIM0 MTTBIM0 0 1 read-write MTTBIM1 MTTBIM1 1 1 read-write MTTBIMOF MTTBIMOF 2 1 read-write TBMOD MPT Mode Register 0xC 32 read-write n 0x0 0x0 MTTBCLE MTTBCLE 2 1 read-write MTTBCLK MTTBCLK 0 2 read-write MTTBCP MTTBCP 5 1 write-only MTTBCPM MTTBCPM 3 2 read-write MTTBRSWR MTTBRSWR 6 1 read-write TBST MPT Status Register 0x14 32 read-only n 0x0 0x0 MTTBINTTB0 MTTBINTTB0 0 1 read-only MTTBINTTB1 MTTBINTTB1 1 1 read-only MTTBINTTBOF MTTBINTTBOF 2 1 read-only TBUC MPT Read Capture Register 0x1C 32 read-only n 0x0 0x0 MTUC MTUC 0 16 read-only MT3 16-bit Multi-Purpose Timer (MPT-TMR_IGBT) MT0 0x0 0x0 0x58 registers n CP0 MPT CP0 Capture Register 0x28 32 read-only n 0x0 0x0 MTCP0 MTCP0 0 16 read-only CP1 MPT CP1 Capture Register 0x2C 32 read-only n 0x0 0x0 MTCP1 MTCP1 0 16 read-only EN MPT Enable Register 0x0 32 read-write n 0x0 0x0 MTEN MTEN 7 1 read-write MTHALT MTHALT 6 1 read-write MTMODE MTMODE 0 1 read-write IGCR IGBT Control Register 0x30 32 read-write n 0x0 0x0 IGCLK IGCLK 0 2 read-write IGIDIS IGIDIS 10 1 read-write IGPRD IGPRD 8 2 read-write IGSNGL IGSNGL 6 1 read-write IGSTA IGSTA 2 2 read-write IGSTP IGSTP 4 2 read-write IGEMGCR IGBT EMG Control Register 0x50 32 read-write n 0x0 0x0 IGEMGCNT IGEMGCNT 4 4 read-write IGEMGEN IGEMGEN 0 1 read-write IGEMGOC IGEMGOC 1 1 read-write IGEMGRS IGEMGRS 2 1 write-only IGEMGST IGBT EMG Status Register 0x54 32 read-only n 0x0 0x0 IGEMGIN IGEMGIN 1 1 read-only IGEMGST IGEMGST 0 1 read-only IGICR IGBT Input Control Register 0x3C 32 read-write n 0x0 0x0 IGNCSEL IGNCSEL 0 4 read-write IGTRGM IGTRGM 7 1 read-write IGTRGSEL IGTRGSEL 6 1 read-write IGOCR IGBT Output Control Register 0x40 32 read-write n 0x0 0x0 IGOEN0 IGOEN0 0 1 read-write IGOEN1 IGOEN1 1 1 read-write IGPOL0 IGPOL0 4 1 read-write IGPOL1 IGPOL1 5 1 read-write IGRESTA IGBT Timer Restart Register 0x34 32 write-only n 0x0 0x0 IGRESTA IGRESTA 0 1 write-only IGRG2 IGBT RG2 Timer Register 0x44 32 read-write n 0x0 0x0 IGRG2 IGRG2 0 16 read-write IGRG3 IGBT RG3 Timer Register 0x48 32 read-write n 0x0 0x0 IGRG3 IGRG3 0 16 read-write IGRG4 IGBT RG4 Timer Register 0x4C 32 read-write n 0x0 0x0 IGRG4 IGRG4 0 16 read-write IGST IGBT Timer Status Register 0x38 32 read-only n 0x0 0x0 IGST IGST 0 1 read-only RG0 MPT RG0 Timer Register 0x20 32 read-write n 0x0 0x0 MTRG0 MTRG0 0 16 read-write RG1 MPT RG1 Timer Register 0x24 32 read-write n 0x0 0x0 MTRG1 MTRG1 0 16 read-write RUN MPT RUN Register 0x4 32 read-write n 0x0 0x0 MTPRUN MTPRUN 2 1 read-write MTRUN MTRUN 0 1 read-write TBCR MPT Control Register 0x8 32 read-write n 0x0 0x0 MTI2TB MTI2TB 3 1 read-write MTTBCSSEL MTTBCSSEL 0 1 read-write MTTBTRGSEL MTTBTRGSEL 1 1 read-write MTTBWBF MTTBWBF 7 1 read-write TBFFCR MPT Flip-Flop Control Register 0x10 32 read-write n 0x0 0x0 MTTBC0T1 MTTBC0T1 4 1 read-write MTTBC1T1 MTTBC1T1 5 1 read-write MTTBE0T1 MTTBE0T1 2 1 read-write MTTBE1T1 MTTBE1T1 3 1 read-write MTTBFF0C MTTBFF0C 0 2 read-write TBIM MPT Interrupt Mask Register 0x18 32 read-write n 0x0 0x0 MTTBIM0 MTTBIM0 0 1 read-write MTTBIM1 MTTBIM1 1 1 read-write MTTBIMOF MTTBIMOF 2 1 read-write TBMOD MPT Mode Register 0xC 32 read-write n 0x0 0x0 MTTBCLE MTTBCLE 2 1 read-write MTTBCLK MTTBCLK 0 2 read-write MTTBCP MTTBCP 5 1 write-only MTTBCPM MTTBCPM 3 2 read-write MTTBRSWR MTTBRSWR 6 1 read-write TBST MPT Status Register 0x14 32 read-only n 0x0 0x0 MTTBINTTB0 MTTBINTTB0 0 1 read-only MTTBINTTB1 MTTBINTTB1 1 1 read-only MTTBINTTBOF MTTBINTTBOF 2 1 read-only TBUC MPT Read Capture Register 0x1C 32 read-only n 0x0 0x0 MTUC MTUC 0 16 read-only MTPD0 16-bit Multi-Purpose Timer (MPT-PMD) MTPD0 0x0 0x0 0x24 registers n 0x24 0x4 reserved n 0x28 0x14 registers n 0x3C 0x8 reserved n 0x44 0x4 registers n CMPU PWM Compare Register 0x18 32 read-write n 0x0 0x0 CMPU CMPU 0 16 read-write CMPV PWM Compare Register 0x1C 32 read-write n 0x0 0x0 CMPV CMPV 0 16 read-write CMPW PWM Compare Register 0x20 32 read-write n 0x0 0x0 CMPW CMPW 0 16 read-write CNTSTA PWM Counter Status Register 0xC 32 read-only n 0x0 0x0 UPDWN UPDWN 0 1 read-only DTR Dead Time Register 0x44 32 read-write n 0x0 0x0 DTR DTR 0 8 read-write EMGCR EMG Control Register 0x34 32 read-write n 0x0 0x0 EMGCNT EMGCNT 8 4 read-write EMGEN EMGEN 0 1 read-write EMGMD EMGMD 3 2 read-write EMGRS EMGRS 1 1 write-only INHEN INHEN 5 1 read-write EMGREL EMG Release Register 0x30 32 write-only n 0x0 0x0 EMGREL EMGREL 0 8 write-only EMGSTA EMG Status Register 0x38 32 read-only n 0x0 0x0 EMGI EMGI 1 1 read-only EMGST EMGST 0 1 read-only MDCNT PWM Counter Register 0x10 32 read-only n 0x0 0x0 MDCNT MDCNT 0 16 read-only MDCR PMD Control Register 0x8 32 read-write n 0x0 0x0 DTYMD DTYMD 4 1 read-write INTPRD INTPRD 1 2 read-write PINT PINT 3 1 read-write PWMCK PWMCK 6 1 read-write PWMMD PWMMD 0 1 read-write SYNTMD SYNTMD 5 1 read-write MDEN PMD Enable Register 0x0 32 read-write n 0x0 0x0 PWMEN PWMEN 0 1 read-write MDOUT PMD Output Control Register 0x28 32 read-write n 0x0 0x0 UOC UOC 0 2 read-write UPWM UPWM 8 1 read-write VOC VOC 2 2 read-write VPWM VPWM 9 1 read-write WOC WOC 4 2 read-write WPWM WPWM 10 1 read-write MDPOT PMD Output Setting Register 0x2C 32 read-write n 0x0 0x0 POLH POLH 3 1 read-write POLL POLL 2 1 read-write PSYNCS PSYNCS 0 2 read-write MDPRD PWM Period Register 0x14 32 read-write n 0x0 0x0 MDPRD MDPRD 0 16 read-write PORTMD Port Output Mode Register 0x4 32 read-write n 0x0 0x0 PORTMD PORTMD 0 1 read-write MTPD1 16-bit Multi-Purpose Timer (MPT-PMD) MTPD0 0x0 0x0 0x24 registers n 0x24 0x4 reserved n 0x28 0x14 registers n 0x3C 0x8 reserved n 0x44 0x4 registers n CMPU PWM Compare Register 0x18 32 read-write n 0x0 0x0 CMPU CMPU 0 16 read-write CMPV PWM Compare Register 0x1C 32 read-write n 0x0 0x0 CMPV CMPV 0 16 read-write CMPW PWM Compare Register 0x20 32 read-write n 0x0 0x0 CMPW CMPW 0 16 read-write CNTSTA PWM Counter Status Register 0xC 32 read-only n 0x0 0x0 UPDWN UPDWN 0 1 read-only DTR Dead Time Register 0x44 32 read-write n 0x0 0x0 DTR DTR 0 8 read-write EMGCR EMG Control Register 0x34 32 read-write n 0x0 0x0 EMGCNT EMGCNT 8 4 read-write EMGEN EMGEN 0 1 read-write EMGMD EMGMD 3 2 read-write EMGRS EMGRS 1 1 write-only INHEN INHEN 5 1 read-write EMGREL EMG Release Register 0x30 32 write-only n 0x0 0x0 EMGREL EMGREL 0 8 write-only EMGSTA EMG Status Register 0x38 32 read-only n 0x0 0x0 EMGI EMGI 1 1 read-only EMGST EMGST 0 1 read-only MDCNT PWM Counter Register 0x10 32 read-only n 0x0 0x0 MDCNT MDCNT 0 16 read-only MDCR PMD Control Register 0x8 32 read-write n 0x0 0x0 DTYMD DTYMD 4 1 read-write INTPRD INTPRD 1 2 read-write PINT PINT 3 1 read-write PWMCK PWMCK 6 1 read-write PWMMD PWMMD 0 1 read-write SYNTMD SYNTMD 5 1 read-write MDEN PMD Enable Register 0x0 32 read-write n 0x0 0x0 PWMEN PWMEN 0 1 read-write MDOUT PMD Output Control Register 0x28 32 read-write n 0x0 0x0 UOC UOC 0 2 read-write UPWM UPWM 8 1 read-write VOC VOC 2 2 read-write VPWM VPWM 9 1 read-write WOC WOC 4 2 read-write WPWM WPWM 10 1 read-write MDPOT PMD Output Setting Register 0x2C 32 read-write n 0x0 0x0 POLH POLH 3 1 read-write POLL POLL 2 1 read-write PSYNCS PSYNCS 0 2 read-write MDPRD PWM Period Register 0x14 32 read-write n 0x0 0x0 MDPRD MDPRD 0 16 read-write PORTMD Port Output Mode Register 0x4 32 read-write n 0x0 0x0 PORTMD PORTMD 0 1 read-write OFD Oscillation Frequency Detector (OFD) OFD 0x0 0x0 0x24 registers n CR1 OFD Control Register 1 0x0 32 read-write n 0x0 0x0 OFDWEN OFDWEN 0 8 read-write CR2 OFD Control Register 2 0x4 32 read-write n 0x0 0x0 OFDEN OFDEN 0 8 read-write MN0 OFD Lower Detection Frequency Setting Register 0x8 32 read-write n 0x0 0x0 OFDMN0 OFDMN0 0 9 read-write MN1 OFD Lower Detection Frequency Setting Register 0xC 32 read-write n 0x0 0x0 OFDMN1 OFDMN1 0 9 read-write MON OFD 0x20 32 read-write n 0x0 0x0 OFDMON OFDMON 0 1 read-write MX0 OFD Higher Detection Frequency Setting Register 0x10 32 read-write n 0x0 0x0 OFDMX0 OFDMX0 0 9 read-write MX1 OFD Higher Detection Frequency Setting Register 0x14 32 read-write n 0x0 0x0 OFDMX1 OFDMX1 0 9 read-write RST OFD Reset Enable Control Register 0x18 32 read-write n 0x0 0x0 OFDRSTEN OFDRSTEN 0 1 read-write STAT OFD Status Register 0x1C 32 read-only n 0x0 0x0 FRQERR FRQERR 0 1 read-only OFDBUSY OFDBUSY 1 1 read-only PA General Purpose Input_Output Port (PA) PA 0x0 0x0 0x1C registers n 0x1C 0xC reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR PA Control Register 0x4 32 read-write n 0x0 0x0 PA0C PA0C 0 1 read-write PA1C PA1C 1 1 read-write PA2C PA2C 2 1 read-write PA3C PA3C 3 1 read-write PA4C PA4C 4 1 read-write PA5C PA5C 5 1 read-write PA6C PA6C 6 1 read-write PA7C PA7C 7 1 read-write DATA PA Data Register 0x0 32 read-write n 0x0 0x0 PA0 PA0 0 1 read-write PA1 PA1 1 1 read-write PA2 PA2 2 1 read-write PA3 PA3 3 1 read-write PA4 PA4 4 1 read-write PA5 PA5 5 1 read-write PA6 PA6 6 1 read-write PA7 PA7 7 1 read-write FR1 PA Function Register 1 0x8 32 read-write n 0x0 0x0 PA0F1 PA0F1 0 1 read-write PA1F1 PA1F1 1 1 read-write PA2F1 PA2F1 2 1 read-write PA3F1 PA3F1 3 1 read-write PA4F1 PA4F1 4 1 read-write PA5F1 PA5F1 5 1 read-write PA6F1 PA6F1 6 1 read-write PA7F1 PA7F1 7 1 read-write FR2 PA Function Register 2 0xC 32 read-write n 0x0 0x0 PA0F2 PA0F2 0 1 read-write PA1F2 PA1F2 1 1 read-write PA2F2 PA2F2 2 1 read-write PA3F2 PA3F2 3 1 read-write PA4F2 PA4F2 4 1 read-write PA5F2 PA5F2 5 1 read-write PA6F2 PA6F2 6 1 read-write PA7F2 PA7F2 7 1 read-write FR3 PA Function Register 3 0x10 32 read-write n 0x0 0x0 PA3F3 PA3F3 3 1 read-write PA5F3 PA5F3 5 1 read-write PA6F3 PA6F3 6 1 read-write PA7F3 PA7F3 7 1 read-write FR4 PA Function Register 4 0x14 32 read-write n 0x0 0x0 PA7F4 PA7F4 7 1 read-write FR5 PA Function Register 5 0x18 32 read-write n 0x0 0x0 PA7F5 PA7F5 7 1 read-write IE PA Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PA0IE PA0IE 0 1 read-write PA1IE PA1IE 1 1 read-write PA2IE PA2IE 2 1 read-write PA3IE PA3IE 3 1 read-write PA4IE PA4IE 4 1 read-write PA5IE PA5IE 5 1 read-write PA6IE PA6IE 6 1 read-write PA7IE PA7IE 7 1 read-write OD PA Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PA0OD PA0OD 0 1 read-write PA1OD PA1OD 1 1 read-write PA2OD PA2OD 2 1 read-write PA3OD PA3OD 3 1 read-write PA4OD PA4OD 4 1 read-write PA5OD PA5OD 5 1 read-write PA6OD PA6OD 6 1 read-write PA7OD PA7OD 7 1 read-write PDN PA Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PA0DN PA0DN 0 1 read-write PA1DN PA1DN 1 1 read-write PA2DN PA2DN 2 1 read-write PA3DN PA3DN 3 1 read-write PA4DN PA4DN 4 1 read-write PA5DN PA5DN 5 1 read-write PA6DN PA6DN 6 1 read-write PA7DN PA7DN 7 1 read-write PUP PA Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PA0UP PA0UP 0 1 read-write PA1UP PA1UP 1 1 read-write PA2UP PA2UP 2 1 read-write PA3UP PA3UP 3 1 read-write PA4UP PA4UP 4 1 read-write PA5UP PA5UP 5 1 read-write PA6UP PA6UP 6 1 read-write PA7UP PA7UP 7 1 read-write PB General Purpose Input_Output Port (PB) PB 0x0 0x0 0x18 registers n 0x18 0x10 reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR PB Control Register 0x4 32 read-write n 0x0 0x0 PB0C PB0C 0 1 read-write PB1C PB1C 1 1 read-write PB2C PB2C 2 1 read-write PB3C PB3C 3 1 read-write PB4C PB4C 4 1 read-write PB5C PB5C 5 1 read-write PB6C PB6C 6 1 read-write DATA PB Data Register 0x0 32 read-write n 0x0 0x0 PB0 PB0 0 1 read-write PB1 PB1 1 1 read-write PB2 PB2 2 1 read-write PB3 PB3 3 1 read-write PB4 PB4 4 1 read-write PB5 PB5 5 1 read-write PB6 PB6 6 1 read-write FR1 PB Function Register 1 0x8 32 read-write n 0x0 0x0 PB0F1 PB0F1 0 1 read-write PB1F1 PB1F1 1 1 read-write PB2F1 PB2F1 2 1 read-write PB3F1 PB3F1 3 1 read-write PB4F1 PB4F1 4 1 read-write PB5F1 PB5F1 5 1 read-write PB6F1 PB6F1 6 1 read-write FR2 PB Function Register 2 0xC 32 read-write n 0x0 0x0 PB2F2 PB2F2 2 1 read-write PB3F2 PB3F2 3 1 read-write PB4F2 PB4F2 4 1 read-write PB5F2 PB5F2 5 1 read-write PB6F2 PB6F2 6 1 read-write FR3 PB Function Register 3 0x10 32 read-write n 0x0 0x0 PB0F3 PB0F3 0 1 read-write PB1F3 PB1F3 1 1 read-write PB2F3 PB2F3 2 1 read-write PB3F3 PB3F3 3 1 read-write PB4F3 PB4F3 4 1 read-write PB5F3 PB5F3 5 1 read-write FR4 PB Function Register 4 0x14 32 read-write n 0x0 0x0 PB2F4 PB2F4 2 1 read-write PB3F4 PB3F4 3 1 read-write PB4F4 PB4F4 4 1 read-write PB5F4 PB5F4 5 1 read-write PB6F4 PB6F4 6 1 read-write IE PB Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PB0IE PB0IE 0 1 read-write PB1IE PB1IE 1 1 read-write PB2IE PB2IE 2 1 read-write PB3IE PB3IE 3 1 read-write PB4IE PB4IE 4 1 read-write PB5IE PB5IE 5 1 read-write PB6IE PB6IE 6 1 read-write OD PB Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PB0OD PB0OD 0 1 read-write PB1OD PB1OD 1 1 read-write PB2OD PB2OD 2 1 read-write PB3OD PB3OD 3 1 read-write PB4OD PB4OD 4 1 read-write PB5OD PB5OD 5 1 read-write PB6OD PB6OD 6 1 read-write PDN PB Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PB0DN PB0DN 0 1 read-write PB1DN PB1DN 1 1 read-write PB2DN PB2DN 2 1 read-write PB3DN PB3DN 3 1 read-write PB4DN PB4DN 4 1 read-write PB5DN PB5DN 5 1 read-write PB6DN PB6DN 6 1 read-write PUP PB Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PB0UP PB0UP 0 1 read-write PB1UP PB1UP 1 1 read-write PB2UP PB2UP 2 1 read-write PB3UP PB3UP 3 1 read-write PB4UP PB4UP 4 1 read-write PB5UP PB5UP 5 1 read-write PB6UP PB6UP 6 1 read-write PC General Purpose Input_Output Port (PC) PC 0x0 0x0 0x10 registers n 0x10 0x18 reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR PC Control Register 0x4 32 read-write n 0x0 0x0 PC0C PC0C 0 1 read-write PC1C PC1C 1 1 read-write PC2C PC2C 2 1 read-write PC3C PC3C 3 1 read-write PC4C PC4C 4 1 read-write PC5C PC5C 5 1 read-write PC6C PC6C 6 1 read-write PC7C PC7C 7 1 read-write DATA PC Data Register 0x0 32 read-write n 0x0 0x0 PC0 PC0 0 1 read-write PC1 PC1 1 1 read-write PC2 PC2 2 1 read-write PC3 PC3 3 1 read-write PC4 PC4 4 1 read-write PC5 PC5 5 1 read-write PC6 PC6 6 1 read-write PC7 PC7 7 1 read-write FR1 PC Function Register 1 0x8 32 read-write n 0x0 0x0 PC0F1 PC0F1 0 1 read-write PC1F1 PC1F1 1 1 read-write PC2F1 PC2F1 2 1 read-write PC3F1 PC3F1 3 1 read-write PC4F1 PC4F1 4 1 read-write PC5F1 PC5F1 5 1 read-write PC6F1 PC6F1 6 1 read-write PC7F1 PC7F1 7 1 read-write FR2 PC Function Register 2 0xC 32 read-write n 0x0 0x0 PC0F2 PC0F2 0 1 read-write PC1F2 PC1F2 1 1 read-write IE PC Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PC0IE PC0IE 0 1 read-write PC1IE PC1IE 1 1 read-write PC2IE PC2IE 2 1 read-write PC3IE PC3IE 3 1 read-write PC4IE PC4IE 4 1 read-write PC5IE PC5IE 5 1 read-write PC6IE PC6IE 6 1 read-write PC7IE PC7IE 7 1 read-write OD PC Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PC0OD PC0OD 0 1 read-write PC1OD PC1OD 1 1 read-write PC2OD PC2OD 2 1 read-write PC3OD PC3OD 3 1 read-write PC4OD PC4OD 4 1 read-write PC5OD PC5OD 5 1 read-write PC6OD PC6OD 6 1 read-write PC7OD PC7OD 7 1 read-write PDN PC Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PC0DN PC0DN 0 1 read-write PC1DN PC1DN 1 1 read-write PC2DN PC2DN 2 1 read-write PC3DN PC3DN 3 1 read-write PC4DN PC4DN 4 1 read-write PC5DN PC5DN 5 1 read-write PC6DN PC6DN 6 1 read-write PC7DN PC7DN 7 1 read-write PUP PC Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PC0UP PC0UP 0 1 read-write PC1UP PC1UP 1 1 read-write PC2UP PC2UP 2 1 read-write PC3UP PC3UP 3 1 read-write PC4UP PC4UP 4 1 read-write PC5UP PC5UP 5 1 read-write PC6UP PC6UP 6 1 read-write PC7UP PC7UP 7 1 read-write PD General Purpose Input_Output Port (PD) PD 0x0 0x0 0xC registers n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n 0xC 0x1C reserved n CR PD Control Register 0x4 32 read-write n 0x0 0x0 PD0C PD0C 0 1 read-write PD1C PD1C 1 1 read-write PD2C PD2C 2 1 read-write PD3C PD3C 3 1 read-write PD4C PD4C 4 1 read-write PD5C PD5C 5 1 read-write PD6C PD6C 6 1 read-write PD7C PD7C 7 1 read-write DATA PD Data Register 0x0 32 read-write n 0x0 0x0 PD0 PD0 0 1 read-write PD1 PD1 1 1 read-write PD2 PD2 2 1 read-write PD3 PD3 3 1 read-write PD4 PD4 4 1 read-write PD5 PD5 5 1 read-write PD6 PD6 6 1 read-write PD7 PD7 7 1 read-write FR1 PD Function Register 1 0x8 32 read-write n 0x0 0x0 PD0F1 PD0F1 0 1 read-write PD1F1 PD1F1 1 1 read-write PD2F1 PD2F1 2 1 read-write PD3F1 PD3F1 3 1 read-write PD4F1 PD4F1 4 1 read-write PD5F1 PD5F1 5 1 read-write PD6F1 PD6F1 6 1 read-write PD7F1 PD7F1 7 1 read-write IE PD Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PD0IE PD0IE 0 1 read-write PD1IE PD1IE 1 1 read-write PD2IE PD2IE 2 1 read-write PD3IE PD3IE 3 1 read-write PD4IE PD4IE 4 1 read-write PD5IE PD5IE 5 1 read-write PD6IE PD6IE 6 1 read-write PD7IE PD7IE 7 1 read-write OD PD Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PD0OD PD0OD 0 1 read-write PD1OD PD1OD 1 1 read-write PD2OD PD2OD 2 1 read-write PD3OD PD3OD 3 1 read-write PD4OD PD4OD 4 1 read-write PD5OD PD5OD 5 1 read-write PD6OD PD6OD 6 1 read-write PD7OD PD7OD 7 1 read-write PDN PD Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PD0DN PD0DN 0 1 read-write PD1DN PD1DN 1 1 read-write PD2DN PD2DN 2 1 read-write PD3DN PD3DN 3 1 read-write PD4DN PD4DN 4 1 read-write PD5DN PD5DN 5 1 read-write PD6DN PD6DN 6 1 read-write PD7DN PD7DN 7 1 read-write PUP PD Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PD0UP PD0UP 0 1 read-write PD1UP PD1UP 1 1 read-write PD2UP PD2UP 2 1 read-write PD3UP PD3UP 3 1 read-write PD4UP PD4UP 4 1 read-write PD5UP PD5UP 5 1 read-write PD6UP PD6UP 6 1 read-write PD7UP PD7UP 7 1 read-write PE General Purpose Input_Output Port (PE) PE 0x0 0x0 0x1C registers n 0x1C 0xC reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR PE Control Register 0x4 32 read-write n 0x0 0x0 PE0C PE0C 0 1 read-write PE1C PE1C 1 1 read-write PE2C PE2C 2 1 read-write PE3C PE3C 3 1 read-write PE4C PE4C 4 1 read-write PE5C PE5C 5 1 read-write PE6C PE6C 6 1 read-write PE7C PE7C 7 1 read-write DATA PE Data Register 0x0 32 read-write n 0x0 0x0 PE0 PE0 0 1 read-write PE1 PE1 1 1 read-write PE2 PE2 2 1 read-write PE3 PE3 3 1 read-write PE4 PE4 4 1 read-write PE5 PE5 5 1 read-write PE6 PE6 6 1 read-write PE7 PE7 7 1 read-write FR1 PE Function Register 1 0x8 32 read-write n 0x0 0x0 PE1F1 PE1F1 1 1 read-write PE2F1 PE2F1 2 1 read-write PE3F1 PE3F1 3 1 read-write PE4F1 PE4F1 4 1 read-write PE5F1 PE5F1 5 1 read-write PE6F1 PE6F1 6 1 read-write FR2 PE Function Register 2 0xC 32 read-write n 0x0 0x0 PE0F2 PE0F2 0 1 read-write PE1F2 PE1F2 1 1 read-write PE2F2 PE2F2 2 1 read-write PE3F2 PE3F2 3 1 read-write PE4F2 PE4F2 4 1 read-write PE5F2 PE5F2 5 1 read-write PE6F2 PE6F2 6 1 read-write PE7F2 PE7F2 7 1 read-write FR3 PE Function Register 3 0x10 32 read-write n 0x0 0x0 PE0F3 PE0F3 0 1 read-write PE1F3 PE1F3 1 1 read-write PE2F3 PE2F3 2 1 read-write PE3F3 PE3F3 3 1 read-write PE4F3 PE4F3 4 1 read-write PE5F3 PE5F3 5 1 read-write PE6F3 PE6F3 6 1 read-write PE7F3 PE7F3 7 1 read-write FR4 PE Function Register 4 0x14 32 read-write n 0x0 0x0 PE0F4 PE0F4 0 1 read-write PE1F4 PE1F4 1 1 read-write PE3F4 PE3F4 3 1 read-write PE4F4 PE4F4 4 1 read-write PE7F4 PE7F4 7 1 read-write FR5 PE Function Register 5 0x18 32 read-write n 0x0 0x0 PE0F5 PE0F5 0 1 read-write PE1F5 PE1F5 1 1 read-write PE2F5 PE2F5 2 1 read-write PE3F5 PE3F5 3 1 read-write PE4F5 PE4F5 4 1 read-write PE7F5 PE7F5 7 1 read-write IE PE Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PE0IE PE0IE 0 1 read-write PE1IE PE1IE 1 1 read-write PE2IE PE2IE 2 1 read-write PE3IE PE3IE 3 1 read-write PE4IE PE4IE 4 1 read-write PE5IE PE5IE 5 1 read-write PE6IE PE6IE 6 1 read-write PE7IE PE7IE 7 1 read-write OD PE Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PE0OD PE0OD 0 1 read-write PE1OD PE1OD 1 1 read-write PE2OD PE2OD 2 1 read-write PE3OD PE3OD 3 1 read-write PE4OD PE4OD 4 1 read-write PE5OD PE5OD 5 1 read-write PE6OD PE6OD 6 1 read-write PE7OD PE7OD 7 1 read-write PDN PE Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PE0DN PE0DN 0 1 read-write PE1DN PE1DN 1 1 read-write PE2DN PE2DN 2 1 read-write PE3DN PE3DN 3 1 read-write PE4DN PE4DN 4 1 read-write PE5DN PE5DN 5 1 read-write PE6DN PE6DN 6 1 read-write PE7DN PE7DN 7 1 read-write PUP PE Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PE0UP PE0UP 0 1 read-write PE1UP PE1UP 1 1 read-write PE2UP PE2UP 2 1 read-write PE3UP PE3UP 3 1 read-write PE4UP PE4UP 4 1 read-write PE5UP PE5UP 5 1 read-write PE6UP PE6UP 6 1 read-write PE7UP PE7UP 7 1 read-write PF General Purpose Input_Output Port (PF) PF 0x0 0x0 0x18 registers n 0x18 0x10 reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR PF Control Register 0x4 32 read-write n 0x0 0x0 PF0C PF0C 0 1 read-write PF1C PF1C 1 1 read-write PF2C PF2C 2 1 read-write PF3C PF3C 3 1 read-write PF4C PF4C 4 1 read-write PF5C PF5C 5 1 read-write PF6C PF6C 6 1 read-write PF7C PF7C 7 1 read-write DATA PF Data Register 0x0 32 read-write n 0x0 0x0 PF0 PF0 0 1 read-write PF1 PF1 1 1 read-write PF2 PF2 2 1 read-write PF3 PF3 3 1 read-write PF4 PF4 4 1 read-write PF5 PF5 5 1 read-write PF6 PF6 6 1 read-write PF7 PF7 7 1 read-write FR1 PF Function Register 1 0x8 32 read-write n 0x0 0x0 PF0F1 PF0F1 0 1 read-write PF1F1 PF1F1 1 1 read-write PF2F1 PF2F1 2 1 read-write PF3F1 PF3F1 3 1 read-write PF4F1 PF4F1 4 1 read-write PF5F1 PF5F1 5 1 read-write PF6F1 PF6F1 6 1 read-write PF7F1 PF7F1 7 1 read-write FR2 PF Function Register 2 0xC 32 read-write n 0x0 0x0 PF4F2 PF4F2 4 1 read-write PF5F2 PF5F2 5 1 read-write PF6F2 PF6F2 6 1 read-write PF7F2 PF7F2 7 1 read-write FR3 PF Function Register 3 0x10 32 read-write n 0x0 0x0 PF0F3 PF0F3 0 1 read-write PF1F3 PF1F3 1 1 read-write PF2F3 PF2F3 2 1 read-write PF3F3 PF3F3 3 1 read-write PF4F4 PF4F4 4 1 read-write PF5F3 PF5F3 5 1 read-write PF6F3 PF6F3 6 1 read-write PF7F3 PF7F3 7 1 read-write FR4 PF Function Register 4 0x14 32 read-write n 0x0 0x0 PF1F4 PF1F4 1 1 read-write PF2F4 PF2F4 2 1 read-write PF5F4 PF5F4 5 1 read-write PF6F4 PF6F4 6 1 read-write PF7F4 PF7F4 7 1 read-write IE PF Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PF0IE PF0IE 0 1 read-write PF1IE PF1IE 1 1 read-write PF2IE PF2IE 2 1 read-write PF3IE PF3IE 3 1 read-write PF4IE PF4IE 4 1 read-write PF5IE PF5IE 5 1 read-write PF6IE PF6IE 6 1 read-write PF7IE PF7IE 7 1 read-write OD PF Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PF0OD PF0OD 0 1 read-write PF1OD PF1OD 1 1 read-write PF2OD PF2OD 2 1 read-write PF3OD PF3OD 3 1 read-write PF4OD PF4OD 4 1 read-write PF5OD PF5OD 5 1 read-write PF6OD PF6OD 6 1 read-write PF7OD PF7OD 7 1 read-write PDN PF Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PF0DN PF0DN 0 1 read-write PF1DN PF1DN 1 1 read-write PF2DN PF2DN 2 1 read-write PF3DN PF3DN 3 1 read-write PF4DN PF4DN 4 1 read-write PF5DN PF5DN 5 1 read-write PF6DN PF6DN 6 1 read-write PF7DN PF7DN 7 1 read-write PUP PF Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PF0UP PF0UP 0 1 read-write PF1UP PF1UP 1 1 read-write PF2UP PF2UP 2 1 read-write PF3UP PF3UP 3 1 read-write PF4UP PF4UP 4 1 read-write PF5UP PF5UP 5 1 read-write PF6UP PF6UP 6 1 read-write PF7UP PF7UP 7 1 read-write PG General Purpose Input_Output Port (PG) PG 0x0 0x0 0x18 registers n 0x18 0x10 reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR PG Control Register 0x4 32 read-write n 0x0 0x0 PG0C PG0C 0 1 read-write PG1C PG1C 1 1 read-write PG2C PG2C 2 1 read-write PG3C PG3C 3 1 read-write PG4C PG4C 4 1 read-write PG5C PG5C 5 1 read-write PG6C PG6C 6 1 read-write PG7C PG7C 7 1 read-write DATA PG Data Register 0x0 32 read-write n 0x0 0x0 PG0 PG0 0 1 read-write PG1 PG1 1 1 read-write PG2 PG2 2 1 read-write PG3 PG3 3 1 read-write PG4 PG4 4 1 read-write PG5 PG5 5 1 read-write PG6 PG6 6 1 read-write PG7 PG7 7 1 read-write FR1 PG Function Register 1 0x8 32 read-write n 0x0 0x0 PG0F1 PG0F1 0 1 read-write PG1F1 PG1F1 1 1 read-write PG2F1 PG2F1 2 1 read-write PG3F1 PG3F1 3 1 read-write PG4F1 PG4F1 4 1 read-only PG5F1 PG5F1 5 1 read-write PG6F1 PG6F1 6 1 read-only PG7F1 PG7F1 7 1 read-only FR2 PG Function Register 2 0xC 32 read-write n 0x0 0x0 PG1F2 PG1F2 1 1 read-write PG2F2 PG2F2 2 1 read-write PG3F2 PG3F2 3 1 read-write PG4F2 PG4F2 4 1 read-write PG5F2 PG5F2 5 1 read-write PG6F2 PG6F2 6 1 read-write PG7F2 PG7F2 7 1 read-write FR3 PG Function Register 3 0x10 32 read-write n 0x0 0x0 PG0F3 PG0F3 0 1 read-write PG1F3 PG1F3 1 1 read-write PG2F3 PG2F3 2 1 read-write PG3F3 PG3F3 3 1 read-write PG4F3 PG4F3 4 1 read-write PG5F3 PG5F3 5 1 read-write PG6F3 PG6F3 6 1 read-write PG7F3 PG7F3 7 1 read-write FR4 PG Function Register 4 0x14 32 read-write n 0x0 0x0 PG2F4 PG2F4 2 1 read-write PG3F4 PG3F4 3 1 read-write IE PG Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PG0IE PG0IE 0 1 read-write PG1IE PG1IE 1 1 read-write PG2IE PG2IE 2 1 read-write PG3IE PG3IE 3 1 read-write PG4IE PG4IE 4 1 read-write PG5IE PG5IE 5 1 read-write PG6IE PG6IE 6 1 read-write PG7IE PG7IE 7 1 read-write OD PG Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PG0OD PG0OD 0 1 read-write PG1OD PG1OD 1 1 read-write PG2OD PG2OD 2 1 read-write PG3OD PG3OD 3 1 read-write PG4OD PG4OD 4 1 read-write PG5OD PG5OD 5 1 read-write PG6OD PG6OD 6 1 read-write PG7OD PG7OD 7 1 read-write PDN PG Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PG0DN PG0DN 0 1 read-write PG1DN PG1DN 1 1 read-write PG2DN PG2DN 2 1 read-write PG3DN PG3DN 3 1 read-write PG4DN PG4DN 4 1 read-write PG5DN PG5DN 5 1 read-write PG6DN PG6DN 6 1 read-write PG7DN PG7DN 7 1 read-write PUP PG Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PG0UP PG0UP 0 1 read-write PG1UP PG1UP 1 1 read-write PG2UP PG2UP 2 1 read-write PG3UP PG3UP 3 1 read-write PG4UP PG4UP 4 1 read-write PG5UP PG5UP 5 1 read-write PG6UP PG6UP 6 1 read-write PG7UP PG7UP 7 1 read-write PH General Purpose Input_Output Port (PH) PH 0x0 0x0 0x1C registers n 0x1C 0xC reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR PH Control Register 0x4 32 read-write n 0x0 0x0 PH0C PH0C 0 1 read-write PH1C PH1C 1 1 read-write PH2C PH2C 2 1 read-write PH3C PH3C 3 1 read-write PH4C PH4C 4 1 read-write PH5C PH5C 5 1 read-write PH6C PH6C 6 1 read-write PH7C PH7C 7 1 read-write DATA PH Data Register 0x0 32 read-write n 0x0 0x0 PH0 PH0 0 1 read-write PH1 PH1 1 1 read-write PH2 PH2 2 1 read-write PH3 PH3 3 1 read-write PH4 PH4 4 1 read-write PH5 PH5 5 1 read-write PH6 PH6 6 1 read-write PH7 PH7 7 1 read-write FR1 PH Function Register 1 0x8 32 read-write n 0x0 0x0 PH0F1 PH0F1 0 1 read-write PH1F1 PH1F1 1 1 read-write PH2F1 PH2F1 2 1 read-write PH3F1 PH3F1 3 1 read-write PH5F1 PH5F1 5 1 read-write PH6F1 PH6F1 6 1 read-write PH7F1 PH7F1 7 1 read-write FR2 PH Function Register 2 0xC 32 read-write n 0x0 0x0 PH0F2 PH0F2 0 1 read-write PH1F2 PH1F2 1 1 read-write PH2F2 PH2F2 2 1 read-write PH3F2 PH3F2 3 1 read-write PH5F2 PH5F2 5 1 read-write PH7F2 PH7F2 7 1 read-write FR3 PH Function Register 3 0x10 32 read-write n 0x0 0x0 PH0F3 PH0F3 0 1 read-write PH1F3 PH1F3 1 1 read-write PH2F3 PH2F3 2 1 read-write PH3F3 PH3F3 3 1 read-write FR4 PH Function Register 4 0x14 32 read-write n 0x0 0x0 PH2F4 PH2F4 2 1 read-write PH3F4 PH3F4 3 1 read-write FR5 PH Function Register 5 0x18 32 read-write n 0x0 0x0 PH0F5 PH0F5 0 1 read-write PH1F5 PH1F5 1 1 read-write PH2F5 PH2F5 2 1 read-write PH3F5 PH3F5 3 1 read-write PH4F5 PH4F5 4 1 read-write IE PH Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PH0IE PH0IE 0 1 read-write PH1IE PH1IE 1 1 read-write PH2IE PH2IE 2 1 read-write PH3IE PH3IE 3 1 read-write PH4IE PH4IE 4 1 read-write PH5IE PH5IE 5 1 read-write PH6IE PH6IE 6 1 read-write PH7IE PH7IE 7 1 read-write OD PH Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PH0OD PH0OD 0 1 read-write PH1OD PH1OD 1 1 read-write PH2OD PH2OD 2 1 read-write PH3OD PH3OD 3 1 read-write PH4OD PH4OD 4 1 read-write PH5OD PH5OD 5 1 read-write PH6OD PH6OD 6 1 read-write PH7OD PH7OD 7 1 read-write PDN PH Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PN0DN PN0DN 0 1 read-write PN1DN PN1DN 1 1 read-write PN2DN PN2DN 2 1 read-write PN3DN PN3DN 3 1 read-write PN4DN PN4DN 4 1 read-write PN5DN PN5DN 5 1 read-write PN6DN PN6DN 6 1 read-write PN7DN PN7DN 7 1 read-write PUP PH Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PH0UP PH0UP 0 1 read-write PH1UP PH1UP 1 1 read-write PH2UP PH2UP 2 1 read-write PH3UP PH3UP 3 1 read-write PH4UP PH4UP 4 1 read-write PH5UP PH5UP 5 1 read-write PH6UP PH6UP 6 1 read-write PH7UP PH7UP 7 1 read-write PI General Purpose Input_Output Port (PI) PI 0x0 0x0 0x10 registers n 0x10 0x18 reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR PI Control Register 0x4 32 read-write n 0x0 0x0 PI0C PI0C 0 1 read-write PI1C PI1C 1 1 read-write PI2C PI2C 2 1 read-write PI3C PI3C 3 1 read-write PI4C PI4C 4 1 read-write PI5C PI5C 5 1 read-write PI6C PI6C 6 1 read-write PI7C PI7C 7 1 read-write DATA PI Data Register 0x0 32 read-write n 0x0 0x0 PI0 PI0 0 1 read-write PI1 PI1 1 1 read-write PI2 PI2 2 1 read-write PI3 PI3 3 1 read-write PI4 PI4 4 1 read-write PI5 PI5 5 1 read-write PI6 PI6 6 1 read-write PI7 PI7 7 1 read-write FR1 PI Function Register 1 0x8 32 read-write n 0x0 0x0 PI0F1 PI0F1 0 1 read-write PI1F1 PI1F1 1 1 read-write PI2F1 PI2F1 2 1 read-write PI3F1 PI3F1 3 1 read-write FR2 PI Function Register 2 0xC 32 read-write n 0x0 0x0 PI3F2 PI3F2 3 1 read-write IE PI Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PI0IE PI0IE 0 1 read-write PI1IE PI1IE 1 1 read-write PI2IE PI2IE 2 1 read-write PI3IE PI3IE 3 1 read-write PI4IE PI4IE 4 1 read-write PI5IE PI5IE 5 1 read-write PI6IE PI6IE 6 1 read-write PI7IE PI7IE 7 1 read-write OD PI Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PI0OD PI0OD 0 1 read-write PI1OD PI1OD 1 1 read-write PI2OD PI2OD 2 1 read-write PI3OD PI3OD 3 1 read-write PI4OD PI4OD 4 1 read-write PI5OD PI5OD 5 1 read-write PI6OD PI6OD 6 1 read-write PI7OD PI7OD 7 1 read-write PDN PI Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PI0DN PI0DN 0 1 read-write PI1DN PI1DN 1 1 read-write PI2DN PI2DN 2 1 read-write PI3DN PI3DN 3 1 read-write PI4DN PI4DN 4 1 read-write PI5DN PI5DN 5 1 read-write PI6DN PI6DN 6 1 read-write PI7DN PI7DN 7 1 read-write PUP PI Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PI0UP PI0UP 0 1 read-write PI1UP PI1UP 1 1 read-write PI2UP PI2UP 2 1 read-write PI3UP PI3UP 3 1 read-write PI4UP PI4UP 4 1 read-write PI5UP PI5UP 5 1 read-write PI6UP PI6UP 6 1 read-write PI7UP PI7UP 7 1 read-write PJ General Purpose Input_Output Port (PJ) PJ 0x0 0x0 0x8 registers n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n 0x8 0x20 reserved n CR PJ Control Register 0x4 32 read-write n 0x0 0x0 PJ0C PJ0C 0 1 read-write PJ1C PJ1C 1 1 read-write PJ2C PJ2C 2 1 read-write PJ3C PJ3C 3 1 read-write PJ4C PJ4C 4 1 read-write PJ5C PJ5C 5 1 read-write PJ6C PJ6C 6 1 read-write PJ7C PJ7C 7 1 read-write DATA PJ Data Register 0x0 32 read-write n 0x0 0x0 PJ0 PJ0 0 1 read-write PJ1 PJ1 1 1 read-write PJ2 PJ2 2 1 read-write PJ3 PJ3 3 1 read-write PJ4 PJ4 4 1 read-write PJ5 PJ5 5 1 read-write PJ6 PJ6 6 1 read-write PJ7 PJ7 7 1 read-write IE PJ Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PJ0IE PJ0IE 0 1 read-write PJ1IE PJ1IE 1 1 read-write PJ2IE PJ2IE 2 1 read-write PJ3IE PJ3IE 3 1 read-write PJ4IE PJ4IE 4 1 read-write PJ5IE PJ5IE 5 1 read-write PJ6IE PJ6IE 6 1 read-write PJ7IE PJ7IE 7 1 read-write OD PJ Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PJ0OD PJ0OD 0 1 read-write PJ1OD PJ1OD 1 1 read-write PJ2OD PJ2OD 2 1 read-write PJ3OD PJ3OD 3 1 read-write PJ4OD PJ4OD 4 1 read-write PJ5OD PJ5OD 5 1 read-write PJ6OD PJ6OD 6 1 read-write PJ7OD PJ7OD 7 1 read-write PDN PJ Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PJ0DN PJ0DN 0 1 read-write PJ1DN PJ1DN 1 1 read-write PJ2DN PJ2DN 2 1 read-write PJ3DN PJ3DN 3 1 read-write PJ4DN PJ4DN 4 1 read-write PJ5DN PJ5DN 5 1 read-write PJ6DN PJ6DN 6 1 read-write PJ7DN PJ7DN 7 1 read-write PUP PJ Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PJ0UP PJ0UP 0 1 read-write PJ1UP PJ1UP 1 1 read-write PJ2UP PJ2UP 2 1 read-write PJ3UP PJ3UP 3 1 read-write PJ4UP PJ4UP 4 1 read-write PJ5UP PJ5UP 5 1 read-write PJ6UP PJ6UP 6 1 read-write PJ7UP PJ7UP 7 1 read-write PK General Purpose Input_Output Port (PK) PK 0x0 0x0 0x18 registers n 0x18 0x10 reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR PK Control Register 0x4 32 read-write n 0x0 0x0 PK0C PK0C 0 1 read-write PK1C PK1C 1 1 read-write PK2C PK2C 2 1 read-write PK3C PK3C 3 1 read-write PK4C PK4C 4 1 read-write DATA PK Data Register 0x0 32 read-write n 0x0 0x0 PK0 PK0 0 1 read-write PK1 PK1 1 1 read-write PK2 PK2 2 1 read-write PK3 PK3 3 1 read-write PK4 PK4 4 1 read-write FR1 PK Function Register 1 0x8 32 read-write n 0x0 0x0 PK0F1 PK0F1 0 1 read-write PK1F1 PK1F1 1 1 read-write PK2F1 PK2F1 2 1 read-write PK3F1 PK3F1 3 1 read-write PK4F1 PK4F1 4 1 read-write FR2 PK Function Register 2 0xC 32 read-write n 0x0 0x0 PK1F2 PK1F2 1 1 read-write PK2F2 PK2F2 2 1 read-write PK3F2 PK3F2 3 1 read-write PK4F2 PK4F2 4 1 read-write FR3 PK Function Register 3 0x10 32 read-write n 0x0 0x0 PK1F3 PK1F3 1 1 read-write PK2F3 PK2F3 2 1 read-write PK3F3 PK3F3 3 1 read-write PK4F3 PK4F3 4 1 read-write FR4 PK Function Register 4 0x14 32 read-write n 0x0 0x0 PK1F4 PK1F4 1 1 read-write IE PK Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PK0IE PK0IE 0 1 read-write PK1IE PK1IE 1 1 read-write PK2IE PK2IE 2 1 read-write PK3IE PK3IE 3 1 read-write PK4IE PK4IE 4 1 read-write OD PK Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PK0OD PK0OD 0 1 read-write PK1OD PK1OD 1 1 read-write PK2OD PK2OD 2 1 read-write PK3OD PK3OD 3 1 read-write PK4OD PK4OD 4 1 read-write PDN PK Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PK0DN PK0DN 0 1 read-write PK1DN PK1DN 1 1 read-write PK2DN PK2DN 2 1 read-write PK3DN PK3DN 3 1 read-write PK4DN PK4DN 4 1 read-write PUP PK Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PK0UP PK0UP 0 1 read-write PK1UP PK1UP 1 1 read-write PK2UP PK2UP 2 1 read-write PK3UP PK3UP 3 1 read-write PK4UP PK4UP 4 1 read-write PL General Purpose Input_Output Port (PL) PL 0x0 0x0 0x20 registers n 0x20 0x8 reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR PL Control Register 0x4 32 read-write n 0x0 0x0 PL0C PL0C 0 1 read-write PL1C PL1C 1 1 read-write PL2C PL2C 2 1 read-write PL3C PL3C 3 1 read-write PL4C PL4C 4 1 read-write PL5C PL5C 5 1 read-write PL6C PL6C 6 1 read-write PL7C PL7C 7 1 read-write DATA PL Data Register 0x0 32 read-write n 0x0 0x0 PL0 PL0 0 1 read-write PL1 PL1 1 1 read-write PL2 PL2 2 1 read-write PL3 PL3 3 1 read-write PL4 PL4 4 1 read-write PL5 PL5 5 1 read-write PL6 PL6 6 1 read-write PL7 PL7 7 1 read-write FR1 PL Function Register 1 0x8 32 read-write n 0x0 0x0 PL0F1 PL0F1 0 1 read-write PL1F1 PL1F1 1 1 read-write PL2F1 PL2F1 2 1 read-write PL3F1 PL3F1 3 1 read-write PL4F1 PL4F1 4 1 read-write PL5F1 PL5F1 5 1 read-write PL6F1 PL6F1 6 1 read-write PL7F1 PL7F1 7 1 read-write FR2 PL Function Register 2 0xC 32 read-write n 0x0 0x0 PL0F2 PL0F2 0 1 read-write PL1F2 PL1F2 1 1 read-write PL2F2 PL2F2 2 1 read-write PL3F2 PL3F2 3 1 read-write PL4F2 PL4F2 4 1 read-write PL5F2 PL5F2 5 1 read-write PL6F2 PL6F2 6 1 read-write PL7F2 PL7F2 7 1 read-write FR3 PL Function Register 3 0x10 32 read-write n 0x0 0x0 PL0F3 PL0F3 0 1 read-write PL1F3 PL1F3 1 1 read-write PL2F3 PL2F3 2 1 read-write PL3F3 PL3F3 3 1 read-write FR4 PL Function Register 4 0x14 32 read-write n 0x0 0x0 PL0F4 PL0F4 0 1 read-write PL1F4 PL1F4 1 1 read-write PL2F4 PL2F4 2 1 read-write PL3F4 PL3F4 3 1 read-write FR5 PL Function Register 5 0x18 32 read-write n 0x0 0x0 PL1F5 PL1F5 1 1 read-write PL2F5 PL2F5 2 1 read-write PL3F5 PL3F5 3 1 read-write FR6 PL Function Register 6 0x1C 32 read-write n 0x0 0x0 PL3F6 PL3F6 3 1 read-write IE PL Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PL0IE PL0IE 0 1 read-write PL1IE PL1IE 1 1 read-write PL2IE PL2IE 2 1 read-write PL3IE PL3IE 3 1 read-write PL4IE PL4IE 4 1 read-write PL5IE PL5IE 5 1 read-write PL6IE PL6IE 6 1 read-write PL7IE PL7IE 7 1 read-write OD PL Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PL0OD PL0OD 0 1 read-write PL1OD PL1OD 1 1 read-write PL2OD PL2OD 2 1 read-write PL3OD PL3OD 3 1 read-write PL4OD PL4OD 4 1 read-write PL5OD PL5OD 5 1 read-write PL6OD PL6OD 6 1 read-write PL7OD PL7OD 7 1 read-write PDN PL Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PL0DN PL0DN 0 1 read-write PL1DN PL1DN 1 1 read-write PL2DN PL2DN 2 1 read-write PL3DN PL3DN 3 1 read-write PL4DN PL4DN 4 1 read-write PL5DN PL5DN 5 1 read-write PL6DN PL6DN 6 1 read-write PL7DN PL7DN 7 1 read-write PUP PL Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PL0UP PL0UP 0 1 read-write PL1UP PL1UP 1 1 read-write PL2UP PL2UP 2 1 read-write PL3UP PL3UP 3 1 read-write PL4UP PL4UP 4 1 read-write PL5UP PL5UP 5 1 read-write PL6UP PL6UP 6 1 read-write PL7UP PL7UP 7 1 read-write PM General Purpose Input_Output Port (PM) PM 0x0 0x0 0x10 registers n 0x10 0x18 reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR PM Control Register 0x4 32 read-write n 0x0 0x0 PM0C PM0C 0 1 read-write PM1C PM1C 1 1 read-write PM2C PM2C 2 1 read-write PM3C PM3C 3 1 read-write DATA PM Data Register 0x0 32 read-write n 0x0 0x0 PM0 PM0 0 1 read-write PM1 PM1 1 1 read-write PM2 PM2 2 1 read-write PM3 PM3 3 1 read-write FR1 PM Function Register 1 0x8 32 read-write n 0x0 0x0 PM0F1 PM0F1 0 1 read-write PM1F1 PM1F1 1 1 read-write PM2F1 PM2F1 2 1 read-write FR2 PM Function Register 2 0xC 32 read-write n 0x0 0x0 PM0F1 PM0F1 0 1 read-write PM1F1 PM1F1 1 1 read-write PM2F1 PM2F1 2 1 read-write PM3F1 PM3F1 3 1 read-write IE PM Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PM0IE PM0IE 0 1 read-write PM1IE PM1IE 1 1 read-write PM2IE PM2IE 2 1 read-write PM3IE PM3IE 3 1 read-write OD PM Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PM0OD PM0OD 0 1 read-write PM1OD PM1OD 1 1 read-write PM2OD PM2OD 2 1 read-write PM3OD PM3OD 3 1 read-write PDN PM Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PI0DN PI0DN 0 1 read-write PI1DN PI1DN 1 1 read-write PI2DN PI2DN 2 1 read-write PI3DN PI3DN 3 1 read-write PUP PM Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PM0UP PM0UP 0 1 read-write PM1UP PM1UP 1 1 read-write PM2UP PM2UP 2 1 read-write PM3UP PM3UP 3 1 read-write PN General Purpose Input_Output Port (PN) PN 0x0 0x0 0x10 registers n 0x10 0x18 reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR PN Control Register 0x4 32 read-write n 0x0 0x0 PN0C PN0C 0 1 read-write PN1C PN1C 1 1 read-write PN2C PN2C 2 1 read-write PN3C PN3C 3 1 read-write PN4C PN4C 4 1 read-write PN5C PN5C 5 1 read-write DATA PN Data Register 0x0 32 read-write n 0x0 0x0 PN0 PN0 0 1 read-write PN1 PN1 1 1 read-write PN2 PN2 2 1 read-write PN3 PN3 3 1 read-write PN4 PN4 4 1 read-write PN5 PN5 5 1 read-write FR1 PN Function Register 1 0x8 32 read-write n 0x0 0x0 PN0F1 PN0F1 0 1 read-write PN1F1 PN1F1 1 1 read-write PN2F1 PN2F1 2 1 read-write PN3F1 PN3F1 3 1 read-write PN4F1 PN4F1 4 1 read-write PN5F1 PN5F1 5 1 read-write FR2 PN Function Register 2 0xC 32 read-write n 0x0 0x0 PN4F1 PN4F1 4 1 read-write PN5F1 PN5F1 5 1 read-write IE PN Input Enable Control Register 0x38 32 read-write n 0x0 0x0 PN0IE PN0IE 0 1 read-write PN1IE PN1IE 1 1 read-write PN2IE PN2IE 2 1 read-write PN3IE PN3IE 3 1 read-write PN4IE PN4IE 4 1 read-write PN5IE PN5IE 5 1 read-write OD PN Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PN0OD PN0OD 0 1 read-write PN1OD PN1OD 1 1 read-write PN2OD PN2OD 2 1 read-write PN3OD PN3OD 3 1 read-write PN4OD PN4OD 4 1 read-write PN5OD PN5OD 5 1 read-write PDN PN Pull-Down Control Register 0x30 32 read-write n 0x0 0x0 PN0DN PN0DN 0 1 read-write PN1DN PN1DN 1 1 read-write PN2DN PN2DN 2 1 read-write PN3DN PN3DN 3 1 read-write PN4DN PN4DN 4 1 read-write PN5DN PN5DN 5 1 read-write PUP PN Pull-Up Control Register 0x2C 32 read-write n 0x0 0x0 PN0UP PN0UP 0 1 read-write PN1UP PN1UP 1 1 read-write PN2UP PN2UP 2 1 read-write PN3UP PN3UP 3 1 read-write PN4UP PN4UP 4 1 read-write PN5UP PN5UP 5 1 read-write RMC Remote Control Signal Preprocessor (RMC) RMC 0x0 0x0 0x38 registers n EN RMC Enable Register 0x0 32 read-write n 0x0 0x0 RMCEN RMCEN 0 1 read-write END1 RMC Receive End Bit Number Register 1 0x28 32 read-write n 0x0 0x0 RMCEND1 RMCEND1 0 7 read-write END2 RMC Receive End Bit Number Register 2 0x2C 32 read-write n 0x0 0x0 RMCEND2 RMCEND2 0 7 read-write END3 RMC Receive End Bit Number Register 3 0x30 32 read-write n 0x0 0x0 RMCEND3 RMCEND3 0 7 read-write FSSEL RMC Frequency Selection Register 0x34 32 read-write n 0x0 0x0 RMCCLK RMCCLK 0 1 read-write RBUF1 RMC Receive Data Buffer Register 1 0x8 32 read-only n 0x0 0x0 RMCRBUF RMCRBUF 0 32 read-only RBUF2 RMC Receive Data Buffer Register 2 0xC 32 read-only n 0x0 0x0 RMCRBUF RMCRBUF 0 32 read-only RBUF3 RMC Receive Data Buffer Register 3 0x10 32 read-only n 0x0 0x0 RMCRBUF RMCRBUF 0 8 read-only RCR1 RMC Receive Control Register 1 0x14 32 read-write n 0x0 0x0 RMCLCMAX RMCLCMAX 24 8 read-write RMCLCMIN RMCLCMIN 16 8 read-write RMCLLMAX RMCLLMAX 8 8 read-write RMCLLMIN RMCLLMIN 0 8 read-write RCR2 RMC Receive Control Register 2 0x18 32 read-write n 0x0 0x0 RMCDMAX RMCDMAX 0 8 read-write RMCEDIEN RMCEDIEN 30 1 read-write RMCLD RMCLD 25 1 read-write RMCLIEN RMCLIEN 31 1 read-write RMCLL RMCLL 8 8 read-write RMCPHM RMCPHM 24 1 read-write RCR3 RMC Receive Control Register 3 0x1C 32 read-write n 0x0 0x0 RMCDATH RMCDATH 8 7 read-write RMCDATL RMCDATL 0 7 read-write RCR4 RMC Receive Control Register 4 0x20 32 read-write n 0x0 0x0 RMCNC RMCNC 0 4 read-write RMCPO RMCPO 7 1 read-write REN RMC Receive Enable Register 0x4 32 read-write n 0x0 0x0 RMCREN RMCREN 0 1 read-write RSTAT RMC Receive Status Register 0x24 32 read-only n 0x0 0x0 RMCDMAXIF RMCDMAXIF 13 1 read-only RMCEDIF RMCEDIF 12 1 read-only RMCLOIF RMCLOIF 14 1 read-only RMCRLDR RMCRLDR 7 1 read-only RMCRLIF RMCRLIF 15 1 read-only RMCRNUM RMCRNUM 0 7 read-only RTC Real Time Clock (RTC) RTC 0x0 0x0 0x3 registers n 0x3 0x1 reserved n 0x4 0x5 registers n 0x9 0x3 reserved n 0xC 0x1 registers n DATER RTC Day Column Register 0x5 8 read-write n 0x0 0x0 DA DA 0 6 read-write DAYR RTC Day of the Week Column Register 0x4 8 read-write n 0x0 0x0 WE WE 0 3 read-write HOURR RTC Hour Column Register 0x2 8 read-write n 0x0 0x0 HO HO 0 6 read-write MINR RTC Minute Column Register 0x1 8 read-write n 0x0 0x0 MI MI 0 7 read-write MONTHR_A RTC Month Column Register 0x6 8 read-write n 0x0 0x0 MO MO 0 5 read-write MONTHR_B RTC Month Column Register RTC_MONTHR 0x6 8 read-write n 0x0 0x0 MO0 MO0 0 1 read-write PAGER RTC PAGE Register 0x8 8 read-write n 0x0 0x0 ADJUST ADJUST 4 1 read-write ENAALM ENAALM 2 1 read-write ENATMR ENATMR 3 1 read-write INTENA INTENA 7 1 read-write PAGE PAGE 0 1 read-write RESTR RTC Reset Register 0xC 8 read-write n 0x0 0x0 DIS16HZ DIS16HZ 6 1 read-write DIS1HZ DIS1HZ 7 1 read-write DIS2HZ DIS2HZ 2 1 read-write DIS4HZ DIS4HZ 1 1 read-write DIS8HZ DIS8HZ 0 1 read-write RSTALM RSTALM 4 1 read-write RSTTMR RSTTMR 5 1 read-write SECR RTC Second Column Register 0x0 8 read-write n 0x0 0x0 SE SE 0 7 read-write YEARR_A RTC Year Column Register 0x7 8 read-write n 0x0 0x0 YE YE 0 8 read-write YEARR_B RTC Year Column Register RTC_YEARR 0x7 8 read-write n 0x0 0x0 LEAP LEAP 0 2 read-write SBI0 Serial Bus Interface (SBI) SBI0 0x0 0x0 0x18 registers n BR0 SBI Baud Rate Register 0 0x14 32 read-write n 0x0 0x0 I2SBI I2SBI 6 1 read-write CR0 SBI Control Register 0 0x0 32 read-write n 0x0 0x0 SBIEN SBIEN 7 1 read-write CR1_A SBI Control Register 1 (I2C Mode) 0x4 32 read-write n 0x0 0x0 ACK ACK 4 1 read-write BC BC 5 3 read-write SCK SCK 0 3 write-only SWRMON SWRMON 0 1 read-only CR1_B SBI Control Register 1 (SIO Mode) SBI_CR1 0x4 32 read-write n 0x0 0x0 SCK SCK 0 3 read-write SIOINH SIOINH 6 1 read-write SIOM SIOM 4 2 read-write SIOS SIOS 7 1 read-write CR2 SBI Control Register 2 (I2C Mode) 0x10 32 write-only n 0x0 0x0 BB BB 5 1 write-only MST MST 7 1 write-only PIN PIN 4 1 write-only SBIM SBIM 2 2 write-only SWRST SWRST 0 2 write-only TRX TRX 6 1 write-only CR2_A SBI Control Register 2 (I2C Mode) 0x10 32 write-only n 0x0 0x0 BB BB 5 1 write-only MST MST 7 1 write-only PIN PIN 4 1 write-only SBIM SBIM 2 2 write-only SWRST SWRST 0 2 write-only TRX TRX 6 1 write-only CR2_B SBI Control Register 2 (SIO Mode) 0x10 32 write-only n 0x0 0x0 SBIM SBIM 2 2 write-only DBR SBI Data Buffer Register 0x8 32 read-write n 0x0 0x0 DB DB 0 8 read-write I2CAR SBI I2C Bus Address Register 0xC 32 read-write n 0x0 0x0 ALS ALS 0 1 read-write SA SA 1 7 read-write SR SBI Status Register (I2C Mode) 0x10 32 read-only n 0x0 0x0 AAS AAS 2 1 read-only ADO ADO 1 1 read-only AL AL 3 1 read-only BB BB 5 1 read-only LRB LRB 0 1 read-only MST MST 7 1 read-only PIN PIN 4 1 read-only TRX TRX 6 1 read-only SR_A SBI Status Register (I2C Mode) CR2_A 0x10 32 read-write n 0x0 0x0 AAS AAS 2 1 read-only ADO ADO 1 1 read-only AL AL 3 1 read-only BB BB 5 1 read-only LRB LRB 0 1 read-only MST MST 7 1 read-only PIN PIN 4 1 read-only TRX TRX 6 1 read-only SR_B SBI Status Register (SIO Mode) 0x10 32 read-only n 0x0 0x0 SEF SEF 2 1 read-only SIOF SIOF 3 1 read-only SBI1 Serial Bus Interface (SBI) SBI0 0x0 0x0 0x18 registers n BR0 SBI Baud Rate Register 0 0x14 32 read-write n 0x0 0x0 I2SBI I2SBI 6 1 read-write CR0 SBI Control Register 0 0x0 32 read-write n 0x0 0x0 SBIEN SBIEN 7 1 read-write CR1_A SBI Control Register 1 (I2C Mode) 0x4 32 read-write n 0x0 0x0 ACK ACK 4 1 read-write BC BC 5 3 read-write SCK SCK 0 3 write-only SWRMON SWRMON 0 1 read-only CR1_B SBI Control Register 1 (SIO Mode) SBI_CR1 0x4 32 read-write n 0x0 0x0 SCK SCK 0 3 read-write SIOINH SIOINH 6 1 read-write SIOM SIOM 4 2 read-write SIOS SIOS 7 1 read-write CR2 SBI Control Register 2 (I2C Mode) 0x10 32 write-only n 0x0 0x0 BB BB 5 1 write-only MST MST 7 1 write-only PIN PIN 4 1 write-only SBIM SBIM 2 2 write-only SWRST SWRST 0 2 write-only TRX TRX 6 1 write-only CR2_A SBI Control Register 2 (I2C Mode) 0x10 32 write-only n 0x0 0x0 BB BB 5 1 write-only MST MST 7 1 write-only PIN PIN 4 1 write-only SBIM SBIM 2 2 write-only SWRST SWRST 0 2 write-only TRX TRX 6 1 write-only CR2_B SBI Control Register 2 (SIO Mode) 0x10 32 write-only n 0x0 0x0 SBIM SBIM 2 2 write-only DBR SBI Data Buffer Register 0x8 32 read-write n 0x0 0x0 DB DB 0 8 read-write I2CAR SBI I2C Bus Address Register 0xC 32 read-write n 0x0 0x0 ALS ALS 0 1 read-write SA SA 1 7 read-write SR SBI Status Register (I2C Mode) 0x10 32 read-only n 0x0 0x0 AAS AAS 2 1 read-only ADO ADO 1 1 read-only AL AL 3 1 read-only BB BB 5 1 read-only LRB LRB 0 1 read-only MST MST 7 1 read-only PIN PIN 4 1 read-only TRX TRX 6 1 read-only SR_A SBI Status Register (I2C Mode) CR2_A 0x10 32 read-write n 0x0 0x0 AAS AAS 2 1 read-only ADO ADO 1 1 read-only AL AL 3 1 read-only BB BB 5 1 read-only LRB LRB 0 1 read-only MST MST 7 1 read-only PIN PIN 4 1 read-only TRX TRX 6 1 read-only SR_B SBI Status Register (SIO Mode) 0x10 32 read-only n 0x0 0x0 SEF SEF 2 1 read-only SIOF SIOF 3 1 read-only SBI2 Serial Bus Interface (SBI) SBI0 0x0 0x0 0x18 registers n BR0 SBI Baud Rate Register 0 0x14 32 read-write n 0x0 0x0 I2SBI I2SBI 6 1 read-write CR0 SBI Control Register 0 0x0 32 read-write n 0x0 0x0 SBIEN SBIEN 7 1 read-write CR1_A SBI Control Register 1 (I2C Mode) 0x4 32 read-write n 0x0 0x0 ACK ACK 4 1 read-write BC BC 5 3 read-write SCK SCK 0 3 write-only SWRMON SWRMON 0 1 read-only CR1_B SBI Control Register 1 (SIO Mode) SBI_CR1 0x4 32 read-write n 0x0 0x0 SCK SCK 0 3 read-write SIOINH SIOINH 6 1 read-write SIOM SIOM 4 2 read-write SIOS SIOS 7 1 read-write CR2 SBI Control Register 2 (I2C Mode) 0x10 32 write-only n 0x0 0x0 BB BB 5 1 write-only MST MST 7 1 write-only PIN PIN 4 1 write-only SBIM SBIM 2 2 write-only SWRST SWRST 0 2 write-only TRX TRX 6 1 write-only CR2_A SBI Control Register 2 (I2C Mode) 0x10 32 write-only n 0x0 0x0 BB BB 5 1 write-only MST MST 7 1 write-only PIN PIN 4 1 write-only SBIM SBIM 2 2 write-only SWRST SWRST 0 2 write-only TRX TRX 6 1 write-only CR2_B SBI Control Register 2 (SIO Mode) 0x10 32 write-only n 0x0 0x0 SBIM SBIM 2 2 write-only DBR SBI Data Buffer Register 0x8 32 read-write n 0x0 0x0 DB DB 0 8 read-write I2CAR SBI I2C Bus Address Register 0xC 32 read-write n 0x0 0x0 ALS ALS 0 1 read-write SA SA 1 7 read-write SR SBI Status Register (I2C Mode) 0x10 32 read-only n 0x0 0x0 AAS AAS 2 1 read-only ADO ADO 1 1 read-only AL AL 3 1 read-only BB BB 5 1 read-only LRB LRB 0 1 read-only MST MST 7 1 read-only PIN PIN 4 1 read-only TRX TRX 6 1 read-only SR_A SBI Status Register (I2C Mode) CR2_A 0x10 32 read-write n 0x0 0x0 AAS AAS 2 1 read-only ADO ADO 1 1 read-only AL AL 3 1 read-only BB BB 5 1 read-only LRB LRB 0 1 read-only MST MST 7 1 read-only PIN PIN 4 1 read-only TRX TRX 6 1 read-only SR_B SBI Status Register (SIO Mode) 0x10 32 read-only n 0x0 0x0 SEF SEF 2 1 read-only SIOF SIOF 3 1 read-only SC0 Serial Channel (SC) SC0 0x0 0x0 0x30 registers n 0x0 0x34 registers n BRADD SC Baud Rate Generator Control Register 2 0x14 32 read-write n 0x0 0x0 BRK BRK 0 4 read-write BRCR SC Baud Rate Generator Control Register 0x10 32 read-write n 0x0 0x0 BRADDE BRADDE 6 1 read-write BRCK BRCK 4 2 read-write BRS BRS 0 4 read-write BUF SC Buffer Register 0x4 32 read-write n 0x0 0x0 TB_RB TB_RB 0 8 read-write CR SC Control Register 0x8 32 read-write n 0x0 0x0 EVEN EVEN 6 1 read-write FERR FERR 2 1 read-only IOC IOC 0 1 read-write OERR OERR 4 1 read-only PE PE 5 1 read-write PERR PERR 3 1 read-only RB8 RB8 7 1 read-only SCLKS SCLKS 1 1 read-write EN SC Enable Register 0x0 32 read-write n 0x0 0x0 SIOE SIOE 0 1 read-write FCNF SC FIFO Configuration Register 0x30 32 read-write n 0x0 0x0 CNFG CNFG 0 1 read-write RFIE RFIE 2 1 read-write RFST RFST 4 1 read-write RXTXCNT RXTXCNT 1 1 read-write TFIE TFIE 3 1 read-write MOD0 SC Mode Control Register 0 0xC 32 read-write n 0x0 0x0 CTSE CTSE 6 1 read-write RXE RXE 5 1 read-write SC SC 0 2 read-write SM SM 2 2 read-write TB8 TB8 7 1 read-write WU WU 4 1 read-write MOD1 SC Mode Control Register 1 0x18 32 read-write n 0x0 0x0 FDPX FDPX 5 2 read-write I2SC I2SC 7 1 read-write SINT SINT 1 3 read-write TXE TXE 4 1 read-write MOD2 SC Mode Control Register 2 0x1C 32 read-write n 0x0 0x0 DRCHG DRCHG 3 1 read-write RBFLL RBFLL 6 1 read-only SBLEN SBLEN 4 1 read-write SWRST SWRST 0 2 read-write TBEMP TBEMP 7 1 read-only TXRUN TXRUN 5 1 read-only WBUF WBUF 2 1 read-write RFC SC RX FIFO Configuration Register 0x20 32 read-write n 0x0 0x0 RFCS RFCS 7 1 write-only RFIS RFIS 6 1 read-write RIL RIL 0 2 read-write RST SC RX FIFO Status Register 0x28 32 read-only n 0x0 0x0 RLVL RLVL 0 3 read-only ROR ROR 7 1 read-only TFC SC TX FIFO Configuration Register 0x24 32 read-write n 0x0 0x0 TFCS TFCS 7 1 write-only TFIS TFIS 6 1 read-write TIL TIL 0 2 read-write TST SC TX FIFO Status Register 0x2C 32 read-only n 0x0 0x0 TLVL TLVL 0 3 read-only TUR TUR 7 1 read-only SC1 Serial Channel (SC) SC0 0x0 0x0 0x30 registers n 0x0 0x34 registers n BRADD SC Baud Rate Generator Control Register 2 0x14 32 read-write n 0x0 0x0 BRK BRK 0 4 read-write BRCR SC Baud Rate Generator Control Register 0x10 32 read-write n 0x0 0x0 BRADDE BRADDE 6 1 read-write BRCK BRCK 4 2 read-write BRS BRS 0 4 read-write BUF SC Buffer Register 0x4 32 read-write n 0x0 0x0 TB_RB TB_RB 0 8 read-write CR SC Control Register 0x8 32 read-write n 0x0 0x0 EVEN EVEN 6 1 read-write FERR FERR 2 1 read-only IOC IOC 0 1 read-write OERR OERR 4 1 read-only PE PE 5 1 read-write PERR PERR 3 1 read-only RB8 RB8 7 1 read-only SCLKS SCLKS 1 1 read-write EN SC Enable Register 0x0 32 read-write n 0x0 0x0 SIOE SIOE 0 1 read-write FCNF SC FIFO Configuration Register 0x30 32 read-write n 0x0 0x0 CNFG CNFG 0 1 read-write RFIE RFIE 2 1 read-write RFST RFST 4 1 read-write RXTXCNT RXTXCNT 1 1 read-write TFIE TFIE 3 1 read-write MOD0 SC Mode Control Register 0 0xC 32 read-write n 0x0 0x0 CTSE CTSE 6 1 read-write RXE RXE 5 1 read-write SC SC 0 2 read-write SM SM 2 2 read-write TB8 TB8 7 1 read-write WU WU 4 1 read-write MOD1 SC Mode Control Register 1 0x18 32 read-write n 0x0 0x0 FDPX FDPX 5 2 read-write I2SC I2SC 7 1 read-write SINT SINT 1 3 read-write TXE TXE 4 1 read-write MOD2 SC Mode Control Register 2 0x1C 32 read-write n 0x0 0x0 DRCHG DRCHG 3 1 read-write RBFLL RBFLL 6 1 read-only SBLEN SBLEN 4 1 read-write SWRST SWRST 0 2 read-write TBEMP TBEMP 7 1 read-only TXRUN TXRUN 5 1 read-only WBUF WBUF 2 1 read-write RFC SC RX FIFO Configuration Register 0x20 32 read-write n 0x0 0x0 RFCS RFCS 7 1 write-only RFIS RFIS 6 1 read-write RIL RIL 0 2 read-write RST SC RX FIFO Status Register 0x28 32 read-only n 0x0 0x0 RLVL RLVL 0 3 read-only ROR ROR 7 1 read-only TFC SC TX FIFO Configuration Register 0x24 32 read-write n 0x0 0x0 TFCS TFCS 7 1 write-only TFIS TFIS 6 1 read-write TIL TIL 0 2 read-write TST SC TX FIFO Status Register 0x2C 32 read-only n 0x0 0x0 TLVL TLVL 0 3 read-only TUR TUR 7 1 read-only SC2 Serial Channel (SC) SC0 0x0 0x0 0x30 registers n 0x0 0x34 registers n BRADD SC Baud Rate Generator Control Register 2 0x14 32 read-write n 0x0 0x0 BRK BRK 0 4 read-write BRCR SC Baud Rate Generator Control Register 0x10 32 read-write n 0x0 0x0 BRADDE BRADDE 6 1 read-write BRCK BRCK 4 2 read-write BRS BRS 0 4 read-write BUF SC Buffer Register 0x4 32 read-write n 0x0 0x0 TB_RB TB_RB 0 8 read-write CR SC Control Register 0x8 32 read-write n 0x0 0x0 EVEN EVEN 6 1 read-write FERR FERR 2 1 read-only IOC IOC 0 1 read-write OERR OERR 4 1 read-only PE PE 5 1 read-write PERR PERR 3 1 read-only RB8 RB8 7 1 read-only SCLKS SCLKS 1 1 read-write EN SC Enable Register 0x0 32 read-write n 0x0 0x0 SIOE SIOE 0 1 read-write FCNF SC FIFO Configuration Register 0x30 32 read-write n 0x0 0x0 CNFG CNFG 0 1 read-write RFIE RFIE 2 1 read-write RFST RFST 4 1 read-write RXTXCNT RXTXCNT 1 1 read-write TFIE TFIE 3 1 read-write MOD0 SC Mode Control Register 0 0xC 32 read-write n 0x0 0x0 CTSE CTSE 6 1 read-write RXE RXE 5 1 read-write SC SC 0 2 read-write SM SM 2 2 read-write TB8 TB8 7 1 read-write WU WU 4 1 read-write MOD1 SC Mode Control Register 1 0x18 32 read-write n 0x0 0x0 FDPX FDPX 5 2 read-write I2SC I2SC 7 1 read-write SINT SINT 1 3 read-write TXE TXE 4 1 read-write MOD2 SC Mode Control Register 2 0x1C 32 read-write n 0x0 0x0 DRCHG DRCHG 3 1 read-write RBFLL RBFLL 6 1 read-only SBLEN SBLEN 4 1 read-write SWRST SWRST 0 2 read-write TBEMP TBEMP 7 1 read-only TXRUN TXRUN 5 1 read-only WBUF WBUF 2 1 read-write RFC SC RX FIFO Configuration Register 0x20 32 read-write n 0x0 0x0 RFCS RFCS 7 1 write-only RFIS RFIS 6 1 read-write RIL RIL 0 2 read-write RST SC RX FIFO Status Register 0x28 32 read-only n 0x0 0x0 RLVL RLVL 0 3 read-only ROR ROR 7 1 read-only TFC SC TX FIFO Configuration Register 0x24 32 read-write n 0x0 0x0 TFCS TFCS 7 1 write-only TFIS TFIS 6 1 read-write TIL TIL 0 2 read-write TST SC TX FIFO Status Register 0x2C 32 read-only n 0x0 0x0 TLVL TLVL 0 3 read-only TUR TUR 7 1 read-only SC3 Serial Channel (SC) SC0 0x0 0x0 0x30 registers n 0x0 0x34 registers n BRADD SC Baud Rate Generator Control Register 2 0x14 32 read-write n 0x0 0x0 BRK BRK 0 4 read-write BRCR SC Baud Rate Generator Control Register 0x10 32 read-write n 0x0 0x0 BRADDE BRADDE 6 1 read-write BRCK BRCK 4 2 read-write BRS BRS 0 4 read-write BUF SC Buffer Register 0x4 32 read-write n 0x0 0x0 TB_RB TB_RB 0 8 read-write CR SC Control Register 0x8 32 read-write n 0x0 0x0 EVEN EVEN 6 1 read-write FERR FERR 2 1 read-only IOC IOC 0 1 read-write OERR OERR 4 1 read-only PE PE 5 1 read-write PERR PERR 3 1 read-only RB8 RB8 7 1 read-only SCLKS SCLKS 1 1 read-write EN SC Enable Register 0x0 32 read-write n 0x0 0x0 SIOE SIOE 0 1 read-write FCNF SC FIFO Configuration Register 0x30 32 read-write n 0x0 0x0 CNFG CNFG 0 1 read-write RFIE RFIE 2 1 read-write RFST RFST 4 1 read-write RXTXCNT RXTXCNT 1 1 read-write TFIE TFIE 3 1 read-write MOD0 SC Mode Control Register 0 0xC 32 read-write n 0x0 0x0 CTSE CTSE 6 1 read-write RXE RXE 5 1 read-write SC SC 0 2 read-write SM SM 2 2 read-write TB8 TB8 7 1 read-write WU WU 4 1 read-write MOD1 SC Mode Control Register 1 0x18 32 read-write n 0x0 0x0 FDPX FDPX 5 2 read-write I2SC I2SC 7 1 read-write SINT SINT 1 3 read-write TXE TXE 4 1 read-write MOD2 SC Mode Control Register 2 0x1C 32 read-write n 0x0 0x0 DRCHG DRCHG 3 1 read-write RBFLL RBFLL 6 1 read-only SBLEN SBLEN 4 1 read-write SWRST SWRST 0 2 read-write TBEMP TBEMP 7 1 read-only TXRUN TXRUN 5 1 read-only WBUF WBUF 2 1 read-write RFC SC RX FIFO Configuration Register 0x20 32 read-write n 0x0 0x0 RFCS RFCS 7 1 write-only RFIS RFIS 6 1 read-write RIL RIL 0 2 read-write RST SC RX FIFO Status Register 0x28 32 read-only n 0x0 0x0 RLVL RLVL 0 3 read-only ROR ROR 7 1 read-only TFC SC TX FIFO Configuration Register 0x24 32 read-write n 0x0 0x0 TFCS TFCS 7 1 write-only TFIS TFIS 6 1 read-write TIL TIL 0 2 read-write TST SC TX FIFO Status Register 0x2C 32 read-only n 0x0 0x0 TLVL TLVL 0 3 read-only TUR TUR 7 1 read-only SSP0 Synchronous Serial Port SSP0 0x0 0x0 0x28 registers n CPSR SSP Clock Prescaler Register 0x10 32 read-write n 0x0 0x0 CPSDVSR CPSDVSR 0 8 read-write CR0 SSP Control Register 0 0x0 32 read-write n 0x0 0x0 DSS DSS 0 4 read-write FRF FRF 4 2 read-write SCR SCR 8 8 read-write SPH SPH 7 1 read-write SPO SPO 6 1 read-write CR1 SSP Control Register 1 0x4 32 read-write n 0x0 0x0 LBM LBM 0 1 read-write MS MS 2 1 read-write SOD SOD 3 1 read-write SSE SSE 1 1 read-write DMACR SSP DMA Control Register 0x24 32 read-write n 0x0 0x0 RXDMAE RXDMAE 0 1 read-write TXDMAE TXDMAE 1 1 read-write DR SSP Data Register 0x8 32 read-write n 0x0 0x0 DATA DATA 0 16 read-write ICR SSP Interrupt Clear Register 0x20 32 write-only n 0x0 0x0 RORIC RORIC 0 1 write-only RTIC RTIC 1 1 write-only IMSC SSP Interrupt Mask Set and Clear Register 0x14 32 read-write n 0x0 0x0 RORIM RORIM 0 1 read-write RTIM RTIM 1 1 read-write RXIM RXIM 2 1 read-write TXIM TXIM 3 1 read-write MIS SSP Masked Interrupt Status Register 0x1C 32 read-only n 0x0 0x0 RORMIS RORMIS 0 1 read-only RTMIS RTMIS 1 1 read-only RXMIS RXMIS 2 1 read-only TXMIS TXMIS 3 1 read-only RIS SSP Raw Interrupt Status Register 0x18 32 read-only n 0x0 0x0 RORRIS RORRIS 0 1 read-only RTRIS RTRIS 1 1 read-only RXRIS RXRIS 2 1 read-only TXRIS TXRIS 3 1 read-only SR SSP Status Register 0xC 32 read-only n 0x0 0x0 BSY BSY 4 1 read-only RFF RFF 3 1 read-only RNE RNE 2 1 read-only TFE TFE 0 1 read-only TNF TNF 1 1 read-only SSP1 Synchronous Serial Port SSP0 0x0 0x0 0x28 registers n CPSR SSP Clock Prescaler Register 0x10 32 read-write n 0x0 0x0 CPSDVSR CPSDVSR 0 8 read-write CR0 SSP Control Register 0 0x0 32 read-write n 0x0 0x0 DSS DSS 0 4 read-write FRF FRF 4 2 read-write SCR SCR 8 8 read-write SPH SPH 7 1 read-write SPO SPO 6 1 read-write CR1 SSP Control Register 1 0x4 32 read-write n 0x0 0x0 LBM LBM 0 1 read-write MS MS 2 1 read-write SOD SOD 3 1 read-write SSE SSE 1 1 read-write DMACR SSP DMA Control Register 0x24 32 read-write n 0x0 0x0 RXDMAE RXDMAE 0 1 read-write TXDMAE TXDMAE 1 1 read-write DR SSP Data Register 0x8 32 read-write n 0x0 0x0 DATA DATA 0 16 read-write ICR SSP Interrupt Clear Register 0x20 32 write-only n 0x0 0x0 RORIC RORIC 0 1 write-only RTIC RTIC 1 1 write-only IMSC SSP Interrupt Mask Set and Clear Register 0x14 32 read-write n 0x0 0x0 RORIM RORIM 0 1 read-write RTIM RTIM 1 1 read-write RXIM RXIM 2 1 read-write TXIM TXIM 3 1 read-write MIS SSP Masked Interrupt Status Register 0x1C 32 read-only n 0x0 0x0 RORMIS RORMIS 0 1 read-only RTMIS RTMIS 1 1 read-only RXMIS RXMIS 2 1 read-only TXMIS TXMIS 3 1 read-only RIS SSP Raw Interrupt Status Register 0x18 32 read-only n 0x0 0x0 RORRIS RORRIS 0 1 read-only RTRIS RTRIS 1 1 read-only RXRIS RXRIS 2 1 read-only TXRIS TXRIS 3 1 read-only SR SSP Status Register 0xC 32 read-only n 0x0 0x0 BSY BSY 4 1 read-only RFF RFF 3 1 read-only RNE RNE 2 1 read-only TFE TFE 0 1 read-only TNF TNF 1 1 read-only SSP2 Synchronous Serial Port SSP0 0x0 0x0 0x28 registers n CPSR SSP Clock Prescaler Register 0x10 32 read-write n 0x0 0x0 CPSDVSR CPSDVSR 0 8 read-write CR0 SSP Control Register 0 0x0 32 read-write n 0x0 0x0 DSS DSS 0 4 read-write FRF FRF 4 2 read-write SCR SCR 8 8 read-write SPH SPH 7 1 read-write SPO SPO 6 1 read-write CR1 SSP Control Register 1 0x4 32 read-write n 0x0 0x0 LBM LBM 0 1 read-write MS MS 2 1 read-write SOD SOD 3 1 read-write SSE SSE 1 1 read-write DMACR SSP DMA Control Register 0x24 32 read-write n 0x0 0x0 RXDMAE RXDMAE 0 1 read-write TXDMAE TXDMAE 1 1 read-write DR SSP Data Register 0x8 32 read-write n 0x0 0x0 DATA DATA 0 16 read-write ICR SSP Interrupt Clear Register 0x20 32 write-only n 0x0 0x0 RORIC RORIC 0 1 write-only RTIC RTIC 1 1 write-only IMSC SSP Interrupt Mask Set and Clear Register 0x14 32 read-write n 0x0 0x0 RORIM RORIM 0 1 read-write RTIM RTIM 1 1 read-write RXIM RXIM 2 1 read-write TXIM TXIM 3 1 read-write MIS SSP Masked Interrupt Status Register 0x1C 32 read-only n 0x0 0x0 RORMIS RORMIS 0 1 read-only RTMIS RTMIS 1 1 read-only RXMIS RXMIS 2 1 read-only TXMIS TXMIS 3 1 read-only RIS SSP Raw Interrupt Status Register 0x18 32 read-only n 0x0 0x0 RORRIS RORRIS 0 1 read-only RTRIS RTRIS 1 1 read-only RXRIS RXRIS 2 1 read-only TXRIS TXRIS 3 1 read-only SR SSP Status Register 0xC 32 read-only n 0x0 0x0 BSY BSY 4 1 read-only RFF RFF 3 1 read-only RNE RNE 2 1 read-only TFE TFE 0 1 read-only TNF TNF 1 1 read-only TB0 16-bit Timer_Event Counter (TB) TB0 0x0 0x0 0x30 registers n 0x0 0x30 registers n CP0 TB CP0 Capture Register 0x28 32 read-only n 0x0 0x0 TBCP0 TBCP0 0 16 read-only CP1 TB CP1 Capture Register 0x2C 32 read-only n 0x0 0x0 TBCP1 TBCP1 0 16 read-only CR TB Control Register 0x8 32 read-write n 0x0 0x0 CSSEL CSSEL 0 1 read-write I2TB I2TB 3 1 read-write TBINSEL TBINSEL 2 1 read-write TBSYNC TBSYNC 5 1 read-write TBWBF TBWBF 7 1 read-write TRGSEL TRGSEL 1 1 read-write DMA TB DMA Enable Register 0x30 32 read-write n 0x0 0x0 DMAEN0 DMAEN0 0 1 read-write DMAEN1 DMAEN1 1 1 read-write DMAEN2 DMAEN2 2 1 read-write EN TB Enable Register 0x0 32 read-write n 0x0 0x0 TBEN TBEN 7 1 read-write TBHALT TBHALT 6 1 read-write FFCR TB Flip-Flop Control Register 0x10 32 read-write n 0x0 0x0 TBC0T1 TBC0T1 4 1 read-write TBC1T1 TBC1T1 5 1 read-write TBE0T1 TBE0T1 2 1 read-write TBE1T1 TBE1T1 3 1 read-write TBFF0C TBFF0C 0 2 read-write IM TB Interrupt Mask Register 0x18 32 read-write n 0x0 0x0 TBIM0 TBIM0 0 1 read-write TBIM1 TBIM1 1 1 read-write TBIMOF TBIMOF 2 1 read-write MOD TB Mode Register 0xC 32 read-write n 0x0 0x0 TBCLE TBCLE 3 1 read-write TBCLK TBCLK 0 3 read-write TBCP TBCP 6 1 write-only TBCPM TBCPM 4 2 read-write RG0 TB RG0 Timer Register 0x20 32 read-write n 0x0 0x0 TBRG0 TBRG0 0 16 read-write RG1 TB RG1 Timer Register 0x24 32 read-write n 0x0 0x0 TBRG1 TBRG1 0 16 read-write RUN TB RUN Register 0x4 32 read-write n 0x0 0x0 TBPRUN TBPRUN 2 1 read-write TBRUN TBRUN 0 1 read-write ST TB Status Register 0x14 32 read-only n 0x0 0x0 INTTB0 INTTB0 0 1 read-only INTTB1 INTTB1 1 1 read-only INTTBOF INTTBOF 2 1 read-only UC TB Read Capture Register 0x1C 32 read-only n 0x0 0x0 TBUC TBUC 0 16 read-only UC UC 0 16 read-only TB1 16-bit Timer_Event Counter (TB) TB0 0x0 0x0 0x30 registers n 0x0 0x30 registers n CP0 TB CP0 Capture Register 0x28 32 read-only n 0x0 0x0 TBCP0 TBCP0 0 16 read-only CP1 TB CP1 Capture Register 0x2C 32 read-only n 0x0 0x0 TBCP1 TBCP1 0 16 read-only CR TB Control Register 0x8 32 read-write n 0x0 0x0 CSSEL CSSEL 0 1 read-write I2TB I2TB 3 1 read-write TBINSEL TBINSEL 2 1 read-write TBSYNC TBSYNC 5 1 read-write TBWBF TBWBF 7 1 read-write TRGSEL TRGSEL 1 1 read-write DMA TB DMA Enable Register 0x30 32 read-write n 0x0 0x0 DMAEN0 DMAEN0 0 1 read-write DMAEN1 DMAEN1 1 1 read-write DMAEN2 DMAEN2 2 1 read-write EN TB Enable Register 0x0 32 read-write n 0x0 0x0 TBEN TBEN 7 1 read-write TBHALT TBHALT 6 1 read-write FFCR TB Flip-Flop Control Register 0x10 32 read-write n 0x0 0x0 TBC0T1 TBC0T1 4 1 read-write TBC1T1 TBC1T1 5 1 read-write TBE0T1 TBE0T1 2 1 read-write TBE1T1 TBE1T1 3 1 read-write TBFF0C TBFF0C 0 2 read-write IM TB Interrupt Mask Register 0x18 32 read-write n 0x0 0x0 TBIM0 TBIM0 0 1 read-write TBIM1 TBIM1 1 1 read-write TBIMOF TBIMOF 2 1 read-write MOD TB Mode Register 0xC 32 read-write n 0x0 0x0 TBCLE TBCLE 3 1 read-write TBCLK TBCLK 0 3 read-write TBCP TBCP 6 1 write-only TBCPM TBCPM 4 2 read-write RG0 TB RG0 Timer Register 0x20 32 read-write n 0x0 0x0 TBRG0 TBRG0 0 16 read-write RG1 TB RG1 Timer Register 0x24 32 read-write n 0x0 0x0 TBRG1 TBRG1 0 16 read-write RUN TB RUN Register 0x4 32 read-write n 0x0 0x0 TBPRUN TBPRUN 2 1 read-write TBRUN TBRUN 0 1 read-write ST TB Status Register 0x14 32 read-only n 0x0 0x0 INTTB0 INTTB0 0 1 read-only INTTB1 INTTB1 1 1 read-only INTTBOF INTTBOF 2 1 read-only UC TB Read Capture Register 0x1C 32 read-only n 0x0 0x0 TBUC TBUC 0 16 read-only UC UC 0 16 read-only TB2 16-bit Timer_Event Counter (TB) TB0 0x0 0x0 0x30 registers n 0x0 0x30 registers n CP0 TB CP0 Capture Register 0x28 32 read-only n 0x0 0x0 TBCP0 TBCP0 0 16 read-only CP1 TB CP1 Capture Register 0x2C 32 read-only n 0x0 0x0 TBCP1 TBCP1 0 16 read-only CR TB Control Register 0x8 32 read-write n 0x0 0x0 CSSEL CSSEL 0 1 read-write I2TB I2TB 3 1 read-write TBINSEL TBINSEL 2 1 read-write TBSYNC TBSYNC 5 1 read-write TBWBF TBWBF 7 1 read-write TRGSEL TRGSEL 1 1 read-write DMA TB DMA Enable Register 0x30 32 read-write n 0x0 0x0 DMAEN0 DMAEN0 0 1 read-write DMAEN1 DMAEN1 1 1 read-write DMAEN2 DMAEN2 2 1 read-write EN TB Enable Register 0x0 32 read-write n 0x0 0x0 TBEN TBEN 7 1 read-write TBHALT TBHALT 6 1 read-write FFCR TB Flip-Flop Control Register 0x10 32 read-write n 0x0 0x0 TBC0T1 TBC0T1 4 1 read-write TBC1T1 TBC1T1 5 1 read-write TBE0T1 TBE0T1 2 1 read-write TBE1T1 TBE1T1 3 1 read-write TBFF0C TBFF0C 0 2 read-write IM TB Interrupt Mask Register 0x18 32 read-write n 0x0 0x0 TBIM0 TBIM0 0 1 read-write TBIM1 TBIM1 1 1 read-write TBIMOF TBIMOF 2 1 read-write MOD TB Mode Register 0xC 32 read-write n 0x0 0x0 TBCLE TBCLE 3 1 read-write TBCLK TBCLK 0 3 read-write TBCP TBCP 6 1 write-only TBCPM TBCPM 4 2 read-write RG0 TB RG0 Timer Register 0x20 32 read-write n 0x0 0x0 TBRG0 TBRG0 0 16 read-write RG1 TB RG1 Timer Register 0x24 32 read-write n 0x0 0x0 TBRG1 TBRG1 0 16 read-write RUN TB RUN Register 0x4 32 read-write n 0x0 0x0 TBPRUN TBPRUN 2 1 read-write TBRUN TBRUN 0 1 read-write ST TB Status Register 0x14 32 read-only n 0x0 0x0 INTTB0 INTTB0 0 1 read-only INTTB1 INTTB1 1 1 read-only INTTBOF INTTBOF 2 1 read-only UC TB Read Capture Register 0x1C 32 read-only n 0x0 0x0 TBUC TBUC 0 16 read-only UC UC 0 16 read-only TB3 16-bit Timer_Event Counter (TB) TB0 0x0 0x0 0x30 registers n 0x0 0x30 registers n CP0 TB CP0 Capture Register 0x28 32 read-only n 0x0 0x0 TBCP0 TBCP0 0 16 read-only CP1 TB CP1 Capture Register 0x2C 32 read-only n 0x0 0x0 TBCP1 TBCP1 0 16 read-only CR TB Control Register 0x8 32 read-write n 0x0 0x0 CSSEL CSSEL 0 1 read-write I2TB I2TB 3 1 read-write TBINSEL TBINSEL 2 1 read-write TBSYNC TBSYNC 5 1 read-write TBWBF TBWBF 7 1 read-write TRGSEL TRGSEL 1 1 read-write DMA TB DMA Enable Register 0x30 32 read-write n 0x0 0x0 DMAEN0 DMAEN0 0 1 read-write DMAEN1 DMAEN1 1 1 read-write DMAEN2 DMAEN2 2 1 read-write EN TB Enable Register 0x0 32 read-write n 0x0 0x0 TBEN TBEN 7 1 read-write TBHALT TBHALT 6 1 read-write FFCR TB Flip-Flop Control Register 0x10 32 read-write n 0x0 0x0 TBC0T1 TBC0T1 4 1 read-write TBC1T1 TBC1T1 5 1 read-write TBE0T1 TBE0T1 2 1 read-write TBE1T1 TBE1T1 3 1 read-write TBFF0C TBFF0C 0 2 read-write IM TB Interrupt Mask Register 0x18 32 read-write n 0x0 0x0 TBIM0 TBIM0 0 1 read-write TBIM1 TBIM1 1 1 read-write TBIMOF TBIMOF 2 1 read-write MOD TB Mode Register 0xC 32 read-write n 0x0 0x0 TBCLE TBCLE 3 1 read-write TBCLK TBCLK 0 3 read-write TBCP TBCP 6 1 write-only TBCPM TBCPM 4 2 read-write RG0 TB RG0 Timer Register 0x20 32 read-write n 0x0 0x0 TBRG0 TBRG0 0 16 read-write RG1 TB RG1 Timer Register 0x24 32 read-write n 0x0 0x0 TBRG1 TBRG1 0 16 read-write RUN TB RUN Register 0x4 32 read-write n 0x0 0x0 TBPRUN TBPRUN 2 1 read-write TBRUN TBRUN 0 1 read-write ST TB Status Register 0x14 32 read-only n 0x0 0x0 INTTB0 INTTB0 0 1 read-only INTTB1 INTTB1 1 1 read-only INTTBOF INTTBOF 2 1 read-only UC TB Read Capture Register 0x1C 32 read-only n 0x0 0x0 TBUC TBUC 0 16 read-only UC UC 0 16 read-only TB4 16-bit Timer_Event Counter (TB) TB0 0x0 0x0 0x30 registers n 0x0 0x30 registers n CP0 TB CP0 Capture Register 0x28 32 read-only n 0x0 0x0 TBCP0 TBCP0 0 16 read-only CP1 TB CP1 Capture Register 0x2C 32 read-only n 0x0 0x0 TBCP1 TBCP1 0 16 read-only CR TB Control Register 0x8 32 read-write n 0x0 0x0 CSSEL CSSEL 0 1 read-write I2TB I2TB 3 1 read-write TBINSEL TBINSEL 2 1 read-write TBSYNC TBSYNC 5 1 read-write TBWBF TBWBF 7 1 read-write TRGSEL TRGSEL 1 1 read-write DMA TB DMA Enable Register 0x30 32 read-write n 0x0 0x0 DMAEN0 DMAEN0 0 1 read-write DMAEN1 DMAEN1 1 1 read-write DMAEN2 DMAEN2 2 1 read-write EN TB Enable Register 0x0 32 read-write n 0x0 0x0 TBEN TBEN 7 1 read-write TBHALT TBHALT 6 1 read-write FFCR TB Flip-Flop Control Register 0x10 32 read-write n 0x0 0x0 TBC0T1 TBC0T1 4 1 read-write TBC1T1 TBC1T1 5 1 read-write TBE0T1 TBE0T1 2 1 read-write TBE1T1 TBE1T1 3 1 read-write TBFF0C TBFF0C 0 2 read-write IM TB Interrupt Mask Register 0x18 32 read-write n 0x0 0x0 TBIM0 TBIM0 0 1 read-write TBIM1 TBIM1 1 1 read-write TBIMOF TBIMOF 2 1 read-write MOD TB Mode Register 0xC 32 read-write n 0x0 0x0 TBCLE TBCLE 3 1 read-write TBCLK TBCLK 0 3 read-write TBCP TBCP 6 1 write-only TBCPM TBCPM 4 2 read-write RG0 TB RG0 Timer Register 0x20 32 read-write n 0x0 0x0 TBRG0 TBRG0 0 16 read-write RG1 TB RG1 Timer Register 0x24 32 read-write n 0x0 0x0 TBRG1 TBRG1 0 16 read-write RUN TB RUN Register 0x4 32 read-write n 0x0 0x0 TBPRUN TBPRUN 2 1 read-write TBRUN TBRUN 0 1 read-write ST TB Status Register 0x14 32 read-only n 0x0 0x0 INTTB0 INTTB0 0 1 read-only INTTB1 INTTB1 1 1 read-only INTTBOF INTTBOF 2 1 read-only UC TB Read Capture Register 0x1C 32 read-only n 0x0 0x0 TBUC TBUC 0 16 read-only UC UC 0 16 read-only TB5 16-bit Timer_Event Counter (TB) TB0 0x0 0x0 0x30 registers n 0x0 0x30 registers n CP0 TB CP0 Capture Register 0x28 32 read-only n 0x0 0x0 TBCP0 TBCP0 0 16 read-only CP1 TB CP1 Capture Register 0x2C 32 read-only n 0x0 0x0 TBCP1 TBCP1 0 16 read-only CR TB Control Register 0x8 32 read-write n 0x0 0x0 CSSEL CSSEL 0 1 read-write I2TB I2TB 3 1 read-write TBINSEL TBINSEL 2 1 read-write TBSYNC TBSYNC 5 1 read-write TBWBF TBWBF 7 1 read-write TRGSEL TRGSEL 1 1 read-write DMA TB DMA Enable Register 0x30 32 read-write n 0x0 0x0 DMAEN0 DMAEN0 0 1 read-write DMAEN1 DMAEN1 1 1 read-write DMAEN2 DMAEN2 2 1 read-write EN TB Enable Register 0x0 32 read-write n 0x0 0x0 TBEN TBEN 7 1 read-write TBHALT TBHALT 6 1 read-write FFCR TB Flip-Flop Control Register 0x10 32 read-write n 0x0 0x0 TBC0T1 TBC0T1 4 1 read-write TBC1T1 TBC1T1 5 1 read-write TBE0T1 TBE0T1 2 1 read-write TBE1T1 TBE1T1 3 1 read-write TBFF0C TBFF0C 0 2 read-write IM TB Interrupt Mask Register 0x18 32 read-write n 0x0 0x0 TBIM0 TBIM0 0 1 read-write TBIM1 TBIM1 1 1 read-write TBIMOF TBIMOF 2 1 read-write MOD TB Mode Register 0xC 32 read-write n 0x0 0x0 TBCLE TBCLE 3 1 read-write TBCLK TBCLK 0 3 read-write TBCP TBCP 6 1 write-only TBCPM TBCPM 4 2 read-write RG0 TB RG0 Timer Register 0x20 32 read-write n 0x0 0x0 TBRG0 TBRG0 0 16 read-write RG1 TB RG1 Timer Register 0x24 32 read-write n 0x0 0x0 TBRG1 TBRG1 0 16 read-write RUN TB RUN Register 0x4 32 read-write n 0x0 0x0 TBPRUN TBPRUN 2 1 read-write TBRUN TBRUN 0 1 read-write ST TB Status Register 0x14 32 read-only n 0x0 0x0 INTTB0 INTTB0 0 1 read-only INTTB1 INTTB1 1 1 read-only INTTBOF INTTBOF 2 1 read-only UC TB Read Capture Register 0x1C 32 read-only n 0x0 0x0 TBUC TBUC 0 16 read-only UC UC 0 16 read-only TB6 16-bit Timer_Event Counter (TB) TB0 0x0 0x0 0x30 registers n 0x0 0x30 registers n CP0 TB CP0 Capture Register 0x28 32 read-only n 0x0 0x0 TBCP0 TBCP0 0 16 read-only CP1 TB CP1 Capture Register 0x2C 32 read-only n 0x0 0x0 TBCP1 TBCP1 0 16 read-only CR TB Control Register 0x8 32 read-write n 0x0 0x0 CSSEL CSSEL 0 1 read-write I2TB I2TB 3 1 read-write TBINSEL TBINSEL 2 1 read-write TBSYNC TBSYNC 5 1 read-write TBWBF TBWBF 7 1 read-write TRGSEL TRGSEL 1 1 read-write DMA TB DMA Enable Register 0x30 32 read-write n 0x0 0x0 DMAEN0 DMAEN0 0 1 read-write DMAEN1 DMAEN1 1 1 read-write DMAEN2 DMAEN2 2 1 read-write EN TB Enable Register 0x0 32 read-write n 0x0 0x0 TBEN TBEN 7 1 read-write TBHALT TBHALT 6 1 read-write FFCR TB Flip-Flop Control Register 0x10 32 read-write n 0x0 0x0 TBC0T1 TBC0T1 4 1 read-write TBC1T1 TBC1T1 5 1 read-write TBE0T1 TBE0T1 2 1 read-write TBE1T1 TBE1T1 3 1 read-write TBFF0C TBFF0C 0 2 read-write IM TB Interrupt Mask Register 0x18 32 read-write n 0x0 0x0 TBIM0 TBIM0 0 1 read-write TBIM1 TBIM1 1 1 read-write TBIMOF TBIMOF 2 1 read-write MOD TB Mode Register 0xC 32 read-write n 0x0 0x0 TBCLE TBCLE 3 1 read-write TBCLK TBCLK 0 3 read-write TBCP TBCP 6 1 write-only TBCPM TBCPM 4 2 read-write RG0 TB RG0 Timer Register 0x20 32 read-write n 0x0 0x0 TBRG0 TBRG0 0 16 read-write RG1 TB RG1 Timer Register 0x24 32 read-write n 0x0 0x0 TBRG1 TBRG1 0 16 read-write RUN TB RUN Register 0x4 32 read-write n 0x0 0x0 TBPRUN TBPRUN 2 1 read-write TBRUN TBRUN 0 1 read-write ST TB Status Register 0x14 32 read-only n 0x0 0x0 INTTB0 INTTB0 0 1 read-only INTTB1 INTTB1 1 1 read-only INTTBOF INTTBOF 2 1 read-only UC TB Read Capture Register 0x1C 32 read-only n 0x0 0x0 TBUC TBUC 0 16 read-only UC UC 0 16 read-only TB7 16-bit Timer_Event Counter (TB) TB0 0x0 0x0 0x30 registers n 0x0 0x30 registers n CP0 TB CP0 Capture Register 0x28 32 read-only n 0x0 0x0 TBCP0 TBCP0 0 16 read-only CP1 TB CP1 Capture Register 0x2C 32 read-only n 0x0 0x0 TBCP1 TBCP1 0 16 read-only CR TB Control Register 0x8 32 read-write n 0x0 0x0 CSSEL CSSEL 0 1 read-write I2TB I2TB 3 1 read-write TBINSEL TBINSEL 2 1 read-write TBSYNC TBSYNC 5 1 read-write TBWBF TBWBF 7 1 read-write TRGSEL TRGSEL 1 1 read-write DMA TB DMA Enable Register 0x30 32 read-write n 0x0 0x0 DMAEN0 DMAEN0 0 1 read-write DMAEN1 DMAEN1 1 1 read-write DMAEN2 DMAEN2 2 1 read-write EN TB Enable Register 0x0 32 read-write n 0x0 0x0 TBEN TBEN 7 1 read-write TBHALT TBHALT 6 1 read-write FFCR TB Flip-Flop Control Register 0x10 32 read-write n 0x0 0x0 TBC0T1 TBC0T1 4 1 read-write TBC1T1 TBC1T1 5 1 read-write TBE0T1 TBE0T1 2 1 read-write TBE1T1 TBE1T1 3 1 read-write TBFF0C TBFF0C 0 2 read-write IM TB Interrupt Mask Register 0x18 32 read-write n 0x0 0x0 TBIM0 TBIM0 0 1 read-write TBIM1 TBIM1 1 1 read-write TBIMOF TBIMOF 2 1 read-write MOD TB Mode Register 0xC 32 read-write n 0x0 0x0 TBCLE TBCLE 3 1 read-write TBCLK TBCLK 0 3 read-write TBCP TBCP 6 1 write-only TBCPM TBCPM 4 2 read-write RG0 TB RG0 Timer Register 0x20 32 read-write n 0x0 0x0 TBRG0 TBRG0 0 16 read-write RG1 TB RG1 Timer Register 0x24 32 read-write n 0x0 0x0 TBRG1 TBRG1 0 16 read-write RUN TB RUN Register 0x4 32 read-write n 0x0 0x0 TBPRUN TBPRUN 2 1 read-write TBRUN TBRUN 0 1 read-write ST TB Status Register 0x14 32 read-only n 0x0 0x0 INTTB0 INTTB0 0 1 read-only INTTB1 INTTB1 1 1 read-only INTTBOF INTTBOF 2 1 read-only UC TB Read Capture Register 0x1C 32 read-only n 0x0 0x0 TBUC TBUC 0 16 read-only UC UC 0 16 read-only TRMOSC Low Voltage detector control register TRMOSC 0x0 0x0 0x10 registers n EN Enable Register 0x4 32 read-write n 0x0 0x0 TRIMEN TRIMEN 0 1 read-write INIT Initial Trimming Level Monitor Register 0x8 32 read-only n 0x0 0x0 TRIMINITC TRIMINITC 8 6 read-only TRIMINITF TRIMINITF 0 4 read-only PRO Protection Register 0x0 32 read-write n 0x0 0x0 PROTECT PROTECT 0 8 read-write SET Trimming Level Setting Register 0xC 32 read-write n 0x0 0x0 TRIMSETC TRIMSETC 8 6 read-write TRIMSETF TRIMSETF 0 4 read-write UART4 ARM Prime Cell PL011 UART4 0x0 0x0 0x8 registers n 0x18 0x4 registers n 0x1C 0x4 reserved n 0x20 0x2C registers n 0x8 0x10 reserved n CR Cntrol Register 0x30 32 read-write n 0x0 0x0 CTSEN CTSEN 15 1 read-write DTR DTR 10 1 read-write RTS RTS 11 1 read-write RTSEN RTSEN 14 1 read-write RXE RXE 9 1 read-write SIREN SIREN 1 1 read-write SIRLP SIRLP 2 1 read-write TXE TXE 8 1 read-write UARTEN UARTEN 0 1 read-write DMACR DMA Control Register 0x48 32 read-write n 0x0 0x0 DMAONERR DMAONERR 2 1 read-write RXDMAE RXDMAE 0 1 read-write TXDMAE TXDMAE 1 1 read-write DR Data Register 0x0 32 read-write n 0x0 0x0 BE BE 10 1 read-write DATA DATA 0 8 read-write FE FE 8 1 read-write OE OE 11 1 read-write PE PE 9 1 read-write ECR Error Clear Register RSR 0x4 32 write-only n 0x0 0x0 BE BE 2 1 write-only FE FE 0 1 write-only OE OE 3 1 write-only PE PE 1 1 write-only FBDR Fractional Baud Rate Register 0x28 32 read-write n 0x0 0x0 BAUDDIVFRAC BAUDDIVFRAC 0 6 read-write FR Flag Register 0x18 32 read-write n 0x0 0x0 BUSY BUSY 3 1 read-write CTS CTS 0 1 read-write DCD DCD 2 1 read-write DSR DSR 1 1 read-write RI RI 8 1 read-write RXFE RXFE 4 1 read-write RXFF RXFF 6 1 read-write TXFE TXFE 7 1 read-write TXFF TXFF 5 1 read-write IBDR Integer Baud Rate Register 0x24 32 read-write n 0x0 0x0 BAUDDIVINT BAUDDIVINT 0 16 read-write ICR Interrupt Clear Register 0x44 32 write-only n 0x0 0x0 BEIC BEIC 9 1 write-only CTSMIC CTSMIC 1 1 write-only DCDMIC DCDMIC 2 1 write-only DSRMIC DSRMIC 3 1 write-only FEIC FEIC 7 1 write-only OEIC OEIC 10 1 write-only PEIC PEIC 8 1 write-only RIMIC RIMIC 0 1 write-only RTIC RTIC 6 1 write-only RXIC RXIC 4 1 write-only TXIC TXIC 5 1 write-only IFLS Interrupt FIFO Level Select Register 0x34 32 read-write n 0x0 0x0 RXIFLSEL RXIFLSEL 3 3 read-write TXIFLSEL TXIFLSEL 0 3 read-write ILPR IrDA Low-power Counter register 0x20 32 read-write n 0x0 0x0 ILPDVSR ILPDVSR 0 8 read-write IMSC Interrupt Mask set_Clear Register 0x38 32 read-write n 0x0 0x0 BEIM BEIM 9 1 read-write CTSMIM CTSMIM 1 1 read-write DCDMIM DCDMIM 2 1 read-write DSRMIM DSRMIM 3 1 read-write FEIM FEIM 7 1 read-write OEIM OEIM 10 1 read-write PEIM PEIM 8 1 read-write RIMIM RIMIM 0 1 read-write RTIM RTIM 6 1 read-write RXIM RXIM 4 1 read-write TXIM TXIM 5 1 read-write LCR_H Line Control Register 0x2C 32 read-write n 0x0 0x0 BRK BRK 0 1 read-write EPS EPS 2 1 read-write FEN FEN 4 1 read-write PEN PEN 1 1 read-write SPS SPS 7 1 read-write STP2 STP2 3 1 read-write WLEN WLEN 5 2 read-write MIS Masked Interrupt Status Register 0x40 32 read-only n 0x0 0x0 BEMIS BEMIS 9 1 read-only CTSMMIS CTSMMIS 1 1 read-only DCDMMIS DCDMMIS 2 1 read-only DSRMMIS DSRMMIS 3 1 read-only FEMIS FEMIS 7 1 read-only OEMIS OEMIS 10 1 read-only PEMIS PEMIS 8 1 read-only RIMMIS RIMMIS 0 1 read-only RTMIS RTMIS 6 1 read-only RXMIS RXMIS 4 1 read-only TXMIS TXMIS 5 1 read-only RIS Raw Interrupt Status Register 0x3C 32 read-only n 0x0 0x0 BERIS BERIS 9 1 read-only CTSRMIS CTSRMIS 1 1 read-only DCDRMIS DCDRMIS 2 1 read-only DSRRMIS DSRRMIS 3 1 read-only FERIS FERIS 7 1 read-only OERIS OERIS 10 1 read-only PERIS PERIS 8 1 read-only RIRMIS RIRMIS 0 1 read-only RTRIS RTRIS 6 1 read-only RXRIS RXRIS 4 1 read-only TXRIS TXRIS 5 1 read-only RSR Receive Status Register 0x4 32 read-only n 0x0 0x0 BE BE 2 1 read-only FE FE 0 1 read-only OE OE 3 1 read-only PE PE 1 1 read-only UART5 ARM Prime Cell PL011 UART4 0x0 0x0 0x8 registers n 0x18 0x4 registers n 0x1C 0x4 reserved n 0x20 0x2C registers n 0x8 0x10 reserved n CR Cntrol Register 0x30 32 read-write n 0x0 0x0 CTSEN CTSEN 15 1 read-write DTR DTR 10 1 read-write RTS RTS 11 1 read-write RTSEN RTSEN 14 1 read-write RXE RXE 9 1 read-write SIREN SIREN 1 1 read-write SIRLP SIRLP 2 1 read-write TXE TXE 8 1 read-write UARTEN UARTEN 0 1 read-write DMACR DMA Control Register 0x48 32 read-write n 0x0 0x0 DMAONERR DMAONERR 2 1 read-write RXDMAE RXDMAE 0 1 read-write TXDMAE TXDMAE 1 1 read-write DR Data Register 0x0 32 read-write n 0x0 0x0 BE BE 10 1 read-write DATA DATA 0 8 read-write FE FE 8 1 read-write OE OE 11 1 read-write PE PE 9 1 read-write ECR Error Clear Register RSR 0x4 32 write-only n 0x0 0x0 BE BE 2 1 write-only FE FE 0 1 write-only OE OE 3 1 write-only PE PE 1 1 write-only FBDR Fractional Baud Rate Register 0x28 32 read-write n 0x0 0x0 BAUDDIVFRAC BAUDDIVFRAC 0 6 read-write FR Flag Register 0x18 32 read-write n 0x0 0x0 BUSY BUSY 3 1 read-write CTS CTS 0 1 read-write DCD DCD 2 1 read-write DSR DSR 1 1 read-write RI RI 8 1 read-write RXFE RXFE 4 1 read-write RXFF RXFF 6 1 read-write TXFE TXFE 7 1 read-write TXFF TXFF 5 1 read-write IBDR Integer Baud Rate Register 0x24 32 read-write n 0x0 0x0 BAUDDIVINT BAUDDIVINT 0 16 read-write ICR Interrupt Clear Register 0x44 32 write-only n 0x0 0x0 BEIC BEIC 9 1 write-only CTSMIC CTSMIC 1 1 write-only DCDMIC DCDMIC 2 1 write-only DSRMIC DSRMIC 3 1 write-only FEIC FEIC 7 1 write-only OEIC OEIC 10 1 write-only PEIC PEIC 8 1 write-only RIMIC RIMIC 0 1 write-only RTIC RTIC 6 1 write-only RXIC RXIC 4 1 write-only TXIC TXIC 5 1 write-only IFLS Interrupt FIFO Level Select Register 0x34 32 read-write n 0x0 0x0 RXIFLSEL RXIFLSEL 3 3 read-write TXIFLSEL TXIFLSEL 0 3 read-write ILPR IrDA Low-power Counter register 0x20 32 read-write n 0x0 0x0 ILPDVSR ILPDVSR 0 8 read-write IMSC Interrupt Mask set_Clear Register 0x38 32 read-write n 0x0 0x0 BEIM BEIM 9 1 read-write CTSMIM CTSMIM 1 1 read-write DCDMIM DCDMIM 2 1 read-write DSRMIM DSRMIM 3 1 read-write FEIM FEIM 7 1 read-write OEIM OEIM 10 1 read-write PEIM PEIM 8 1 read-write RIMIM RIMIM 0 1 read-write RTIM RTIM 6 1 read-write RXIM RXIM 4 1 read-write TXIM TXIM 5 1 read-write LCR_H Line Control Register 0x2C 32 read-write n 0x0 0x0 BRK BRK 0 1 read-write EPS EPS 2 1 read-write FEN FEN 4 1 read-write PEN PEN 1 1 read-write SPS SPS 7 1 read-write STP2 STP2 3 1 read-write WLEN WLEN 5 2 read-write MIS Masked Interrupt Status Register 0x40 32 read-only n 0x0 0x0 BEMIS BEMIS 9 1 read-only CTSMMIS CTSMMIS 1 1 read-only DCDMMIS DCDMMIS 2 1 read-only DSRMMIS DSRMMIS 3 1 read-only FEMIS FEMIS 7 1 read-only OEMIS OEMIS 10 1 read-only PEMIS PEMIS 8 1 read-only RIMMIS RIMMIS 0 1 read-only RTMIS RTMIS 6 1 read-only RXMIS RXMIS 4 1 read-only TXMIS TXMIS 5 1 read-only RIS Raw Interrupt Status Register 0x3C 32 read-only n 0x0 0x0 BERIS BERIS 9 1 read-only CTSRMIS CTSRMIS 1 1 read-only DCDRMIS DCDRMIS 2 1 read-only DSRRMIS DSRRMIS 3 1 read-only FERIS FERIS 7 1 read-only OERIS OERIS 10 1 read-only PERIS PERIS 8 1 read-only RIRMIS RIRMIS 0 1 read-only RTRIS RTRIS 6 1 read-only RXRIS RXRIS 4 1 read-only TXRIS TXRIS 5 1 read-only RSR Receive Status Register 0x4 32 read-only n 0x0 0x0 BE BE 2 1 read-only FE FE 0 1 read-only OE OE 3 1 read-only PE PE 1 1 read-only UDFS UDC2 AHB Bridge UDFS 0x0 0x0 0x24 registers n 0x24 0x18 reserved n 0x3C 0x24 registers n 0x60 0x20 reserved n 0x80 0xC registers n ARBTSET Arbiter Setting 0x3C 32 read-write n 0x0 0x0 ABTMOD ABTMOD 28 1 read-write ABTPRI_R0 ABTPRI_R0 0 2 read-write ABTPRI_R1 ABTPRI_R1 4 2 read-write ABTPRI_W0 ABTPRI_W0 8 2 read-write ABTPRI_W1 ABTPRI_W1 12 2 read-write ABT_EN ABT_EN 31 1 read-write C2STSET UDC2 setting 0xC 32 read-write n 0x0 0x0 EOPB_ENABLE EOPB_ENABLE 4 1 read-write TX0 TX0 0 1 read-write DMACRDREQ DMAC Read request 0x14 32 read-write n 0x0 0x0 DMARDADR DMARDADR 2 6 read-write DMARDCLR DMARDCLR 30 1 read-write DMARDREQ DMARDREQ 31 1 read-write DMACRDVL DMAC Read Value 0x18 32 read-only n 0x0 0x0 DMARDDATA DMARDDATA 0 32 read-only INTENB Interrupt Enable Register 0x4 32 read-write n 0x0 0x0 DMAC_REG_RD_EN DMAC_REG_RD_EN 25 1 read-write MR_AHBERR_EN MR_AHBERR_EN 23 1 read-write MR_END_ADD_EN MR_END_ADD_EN 21 1 read-write MR_EP_DSET_EN MR_EP_DSET_EN 22 1 read-write MW_AHBERR_EN MW_AHBERR_EN 20 1 read-write MW_END_ADD_EN MW_END_ADD_EN 18 1 read-write MW_RERROR_EN MW_RERROR_EN 29 1 read-write MW_SET_ADD_EN MW_SET_ADD_EN 17 1 read-write MW_TIMEOUT_EN MW_TIMEOUT_EN 19 1 read-write POWER_DETECT_EN POWER_DETECT_EN 28 1 read-write RESET_EN RESET_EN 9 1 read-write RESET_END_EN RESET_END_EN 10 1 read-write SUSPEND_RESUME_EN SUSPEND_RESUME_EN 8 1 read-write UDC2_REG_RD_EN UDC2_REG_RD_EN 24 1 read-write INTSTS Interrupt Status Register 0x0 32 read-write n 0x0 0x0 INT_DMAC_REG_RD INT_DMAC_REG_RD 25 1 read-write INT_EP INT_EP 6 1 read-only INT_EP0 INT_EP0 5 1 read-only INT_MR_AHBERR INT_MR_AHBERR 23 1 read-write INT_MR_END_ADD INT_MR_END_ADD 21 1 read-write INT_MR_EP_DSET INT_MR_EP_DSET 22 1 read-write INT_MW_AHBERR INT_MW_AHBERR 20 1 read-write INT_MW_END_ADD INT_MW_END_ADD 18 1 read-write INT_MW_RERR INT_MW_RERR 29 1 read-write INT_MW_RERROR INT_MW_RERROR 29 1 read-write INT_MW_SET_ADD INT_MW_SET_ADD 17 1 read-write INT_MW_TIMEOUT INT_MW_TIMEOUT 19 1 read-write INT_NAK INT_NAK 7 1 read-only INT_POWERDETECT INT_POWERDETECT 28 1 read-write INT_RX_ZERO INT_RX_ZERO 3 1 read-only INT_SETUP INT_SETUP 0 1 read-only INT_SOF INT_SOF 4 1 read-only INT_STATUS INT_STATUS 2 1 read-only INT_STATUS_NAK INT_STATUS_NAK 1 1 read-only INT_SUSPEND_RESUME INT_SUSPEND_RESUME 8 1 read-write INT_UDC2_REG_RD INT_UDC2_REG_RD 24 1 read-write INT_USB_RESET INT_USB_RESET 9 1 read-write INT_USB_RESET_END INT_USB_RESET_END 10 1 read-write MRAHBADR Master Read AHB Address 0x5C 32 read-only n 0x0 0x0 MRAHBADR MRAHBADR 0 32 read-only MRCADR Master Read Current Address 0x58 32 read-only n 0x0 0x0 MRCADR MRCADR 0 32 read-only MREADR Master Read End Address 0x54 32 read-write n 0x0 0x0 MREADR MREADR 0 32 read-write MRSADR Master Read Start Address 0x50 32 read-write n 0x0 0x0 MRSADR MRSADR 0 32 read-write MSTSET DMAC setting 0x10 32 read-write n 0x0 0x0 MR_ABORT MR_ABORT 5 1 write-only MR_ENABLE MR_ENABLE 4 1 read-write MR_RESET MR_RESET 6 1 read-write MW_ABORT MW_ABORT 1 1 write-only MW_ENABLE MW_ENABLE 0 1 read-write MW_RESET MW_RESET 2 1 read-write M_BURST_TYPE M_BURST_TYPE 8 1 read-write MSTSTS Master Status 0x84 32 read-only n 0x0 0x0 MRBFEMP MRBFEMP 3 1 read-only MREPDSET MREPDSET 1 1 read-only MREPEMPTY MREPEMPTY 4 1 read-only MWBFEMP MWBFEMP 2 1 read-only MWEPDSET MWEPDSET 0 1 read-only MWAHBADR Master Write AHB Address 0x4C 32 read-only n 0x0 0x0 MWAHBADR MWAHBADR 0 32 read-only MWCADR Master Write Current Address 0x48 32 read-only n 0x0 0x0 MWCADR MWCADR 0 32 read-only MWEADR Master Write End Address 0x44 32 read-write n 0x0 0x0 MWEADR MWEADR 0 32 read-write MWSADR Master Write Start Address 0x40 32 read-write n 0x0 0x0 MWSADR MWSADR 0 32 read-write MWTOUT Master Write Timeout Register 0x8 32 read-write n 0x0 0x0 TIMEOUTSET TIMEOUTSET 1 31 read-write TIMEOUT_EN TIMEOUT_EN 0 1 read-write PWCTL Power Detect Control 0x80 32 read-write n 0x0 0x0 PHY_REMOTE_WKUP PHY_REMOTE_WKUP 6 1 read-write PHY_RESETB PHY_RESETB 5 1 read-write PHY_SUSPEND PHY_SUSPEND 3 1 read-write PW_DETECT PW_DETECT 2 1 read-only PW_RESETB PW_RESETB 1 1 read-write SUSPEND_X SUSPEND_X 4 1 read-only USB_RESET USB_RESET 0 1 read-only WAKEUP_EN WAKEUP_EN 7 1 read-write TOUTCNT Timeout Count 0x88 32 read-only n 0x0 0x0 TMOUTCNT TMOUTCNT 0 32 read-only UDC2RDREQ UDC2 Read Request 0x1C 32 read-write n 0x0 0x0 UDC2RDADR UDC2RDADR 2 8 read-write UDC2RDCLR UDC2RDCLR 30 1 read-write UDC2RDREQ UDC2RDREQ 31 1 read-write UDC2RDVL UDC2 Read Value 0x20 32 read-only n 0x0 0x0 UDC2RDATA UDC2RDATA 0 16 read-only UDFS2 UDC2(USB -Spec2.0 Device contoller) UDFS2 0x0 0x0 0x8 registers n 0x330 0x8 registers n 0x8 0x4 reserved n 0xB0 0x280 reserved n 0xC 0xA4 registers n ADR UDC2 Address State 0x0 32 read-write n 0x0 0x0 ADDRESSED ADDRESSED 9 1 read-write CONFIGURED CONFIGURED 10 1 read-write CUR_SPEED CUR_SPEED 12 2 read-only DEFAULT DEFAULT 8 1 read-write DEV_ADR DEV_ADR 0 7 read-write EP_BI_MODE EP_BI_MODE 14 1 read-write STAGE_ERR STAGE_ERR 15 1 read-write SUSPEND SUSPEND 11 1 read-only BRQ UDC2 bRequest-bmRequest Type 0x10 32 read-only n 0x0 0x0 DIR DIR 7 1 read-only RECIPIENT RECIPIENT 0 5 read-only REQUESET REQUESET 8 8 read-only REQ_TYPE REQ_TYPE 5 2 read-only CMD UDC2 Command 0xC 32 read-write n 0x0 0x0 COM COM 0 4 read-write EP EP 4 4 read-write INT_TOGGLE INT_TOGGLE 15 1 read-write RX_NULLPKT_EP RX_NULLPKT_EP 8 4 read-only EP0DSZ UDC2 EP0 Data Size 0x38 32 read-only n 0x0 0x0 SIZE SIZE 0 7 read-only EP0FIFO UDC2 EP0 FIFO 0x3C 32 read-write n 0x0 0x0 DATA DATA 0 16 read-write EP0MSZ UDC2 EP0 Max Packet Size 0x30 32 read-write n 0x0 0x0 DSET DSET 12 1 read-only MAX_PKT MAX_PKT 0 7 read-write TX_0DATA TX_0DATA 15 1 read-only EP0STS UDC2 EP0 Status 0x34 32 read-only n 0x0 0x0 EP0_MASK EP0_MASK 15 1 read-only STATUS STATUS 9 3 read-only TOGGLE TOGGLE 12 2 read-only EP1DSZ UDC2 EP1 Data Size 0x48 32 read-only n 0x0 0x0 SIZE SIZE 0 11 read-only EP1FIFO UDC2 EP1 FIFO 0x4C 32 read-write n 0x0 0x0 DATA DATA 0 16 read-write EP1MSZ UDC2 EP1 Max Packet Size 0x40 32 read-write n 0x0 0x0 DSET DSET 12 1 read-only MAX_PKT MAX_PKT 0 11 read-write TX_0DATA TX_0DATA 15 1 read-only EP1STS UDC2 EP1 Status 0x44 32 read-write n 0x0 0x0 BUS_SEL BUS_SEL 14 1 read-write DIR DIR 7 1 read-write DISABLE DISABLE 8 1 read-only NUM_MF NUM_MF 0 2 read-write PKT_MODE PKT_MODE 15 1 read-write STATUS STATUS 9 3 read-only TOGGLE TOGGLE 12 2 read-only T_TYPE T_TYPE 2 2 read-write EP2DSZ UDC2 EP2 Data Size 0x58 32 read-only n 0x0 0x0 SIZE SIZE 0 11 read-only EP2FIFO UDC2 EP2 FIFO 0x5C 32 read-write n 0x0 0x0 DATA DATA 0 16 read-write EP2MSZ UDC2 EP2 Max Packet Size 0x50 32 read-write n 0x0 0x0 DSET DSET 12 1 read-only MAX_PKT MAX_PKT 0 11 read-write TX_0DATA TX_0DATA 15 1 read-only EP2STS UDC2 EP2 Status 0x54 32 read-write n 0x0 0x0 BUS_SEL BUS_SEL 14 1 read-write DIR DIR 7 1 read-write DISABLE DISABLE 8 1 read-only NUM_MF NUM_MF 0 2 read-write PKT_MODE PKT_MODE 15 1 read-write STATUS STATUS 9 3 read-only TOGGLE TOGGLE 12 2 read-only T_TYPE T_TYPE 2 2 read-write EP3DSZ UDC3 EP3 Data Size 0x68 32 read-only n 0x0 0x0 SIZE SIZE 0 11 read-only EP3FIFO UDC3 EP3 FIFO 0x6C 32 read-write n 0x0 0x0 DATA DATA 0 16 read-write EP3MSZ UDC3 EP3 Max Packet Size 0x60 32 read-write n 0x0 0x0 DSET DSET 12 1 read-only MAX_PKT MAX_PKT 0 11 read-write TX_0DATA TX_0DATA 15 1 read-only EP3STS UDC3 EP3 Status 0x64 32 read-write n 0x0 0x0 BUS_SEL BUS_SEL 14 1 read-write DIR DIR 7 1 read-write DISABLE DISABLE 8 1 read-only NUM_MF NUM_MF 0 2 read-write PKT_MODE PKT_MODE 15 1 read-write STATUS STATUS 9 3 read-only TOGGLE TOGGLE 12 2 read-only T_TYPE T_TYPE 2 2 read-write EP4DSZ UDC2 EP4 Data Size 0x78 32 read-only n 0x0 0x0 SIZE SIZE 0 11 read-only EP4FIFO UDC2 EP4 FIFO 0x7C 32 read-write n 0x0 0x0 DATA DATA 0 16 read-write EP4MSZ UDC2 EP4 Max Packet Size 0x70 32 read-write n 0x0 0x0 DSET DSET 12 1 read-only MAX_PKT MAX_PKT 0 11 read-write TX_0DATA TX_0DATA 15 1 read-only EP4STS UDC2 EP4 Status 0x74 32 read-write n 0x0 0x0 BUS_SEL BUS_SEL 14 1 read-write DIR DIR 7 1 read-write DISABLE DISABLE 8 1 read-only NUM_MF NUM_MF 0 2 read-write PKT_MODE PKT_MODE 15 1 read-write STATUS STATUS 9 3 read-only TOGGLE TOGGLE 12 2 read-only T_TYPE T_TYPE 2 2 read-write EP5DSZ UDC2 EP5 Data Size 0x88 32 read-only n 0x0 0x0 SIZE SIZE 0 11 read-only EP5FIFO UDC2 EP5 FIFO 0x8C 32 read-write n 0x0 0x0 DATA DATA 0 16 read-write EP5MSZ UDC2 EP5 Max Packet Size 0x80 32 read-write n 0x0 0x0 DSET DSET 12 1 read-only MAX_PKT MAX_PKT 0 11 read-write TX_0DATA TX_0DATA 15 1 read-only EP5STS UDC2 EP5 Status 0x84 32 read-write n 0x0 0x0 BUS_SEL BUS_SEL 14 1 read-write DIR DIR 7 1 read-write DISABLE DISABLE 8 1 read-only NUM_MF NUM_MF 0 2 read-write PKT_MODE PKT_MODE 15 1 read-write STATUS STATUS 9 3 read-only TOGGLE TOGGLE 12 2 read-only T_TYPE T_TYPE 2 2 read-write EP6DSZ UDC2 EP6 Data Size 0x98 32 read-only n 0x0 0x0 SIZE SIZE 0 11 read-only EP6FIFO UDC2 EP6 FIFO 0x9C 32 read-write n 0x0 0x0 DATA DATA 0 16 read-write EP6MSZ UDC2 EP6 Max Packet Size 0x90 32 read-write n 0x0 0x0 DSET DSET 12 1 read-only MAX_PKT MAX_PKT 0 11 read-write TX_0DATA TX_0DATA 15 1 read-only EP6STS UDC2 EP6 Status 0x94 32 read-write n 0x0 0x0 BUS_SEL BUS_SEL 14 1 read-write DIR DIR 7 1 read-write DISABLE DISABLE 8 1 read-only NUM_MF NUM_MF 0 2 read-write PKT_MODE PKT_MODE 15 1 read-write STATUS STATUS 9 3 read-only TOGGLE TOGGLE 12 2 read-only T_TYPE T_TYPE 2 2 read-write EP7DSZ UDC2 EP7 Data Size 0xA8 32 read-only n 0x0 0x0 SIZE SIZE 0 11 read-only EP7FIFO UDC2 EP7 FIFO 0xAC 32 read-write n 0x0 0x0 DATA DATA 0 16 read-write EP7MSZ UDC2 EP7 Max Packet Size 0xA0 32 read-write n 0x0 0x0 DSET DSET 12 1 read-only MAX_PKT MAX_PKT 0 11 read-write TX_0DATA TX_0DATA 15 1 read-only EP7STS UDC2 EP7 Status 0xA4 32 read-write n 0x0 0x0 BUS_SEL BUS_SEL 14 1 read-write DIR DIR 7 1 read-write DISABLE DISABLE 8 1 read-only NUM_MF NUM_MF 0 2 read-write PKT_MODE PKT_MODE 15 1 read-write STATUS STATUS 9 3 read-only TOGGLE TOGGLE 12 2 read-only T_TYPE T_TYPE 2 2 read-write FRM UDC2 Frame 0x4 32 read-write n 0x0 0x0 CREATE_SOF CREATE_SOF 15 1 read-write FRAME FRAME 0 11 read-only F_STATUS F_STATUS 12 2 read-only INT UDC2 INT 0x20 32 read-write n 0x0 0x0 I_EP I_EP 6 1 read-write I_EP0 I_EP0 5 1 read-write I_NAK I_NAK 7 1 read-write I_RX_DATA0 I_RX_DATA0 3 1 read-write I_SETUP I_SETUP 0 1 read-write I_SOF I_SOF 4 1 read-write I_STATUS I_STATUS 2 1 read-write I_STATUS_NAK I_STATUS_NAK 1 1 read-write M_EP M_EP 14 1 read-write M_EP0 M_EP0 13 1 read-write M_NAK M_NAK 15 1 read-write M_RX_DATA0 M_RX_DATA0 11 1 read-write M_SETUP M_SETUP 8 1 read-write M_SOF M_SOF 12 1 read-write M_STATUS M_STATUS 10 1 read-write M_STATUS_NAK M_STATUS_NAK 9 1 read-write INTEP UDC2 INT_EP 0x24 32 read-write n 0x0 0x0 I_EP1 I_EP1 1 1 read-write I_EP2 I_EP2 2 1 read-write I_EP3 I_EP3 3 1 read-write I_EP4 I_EP4 4 1 read-write I_EP5 I_EP5 5 1 read-write I_EP6 I_EP6 6 1 read-write I_EP7 I_EP7 7 1 read-write INTEPMSK UDC2 INT_EP_MASK 0x28 32 read-write n 0x0 0x0 M_EP M_EP 0 8 read-write INTNAK UDC2 INT NAK 0x330 32 read-write n 0x0 0x0 I_EP1 I_EP1 1 1 read-write I_EP2 I_EP2 2 1 read-write I_EP3 I_EP3 3 1 read-write I_EP4 I_EP4 4 1 read-write I_EP5 I_EP5 5 1 read-write I_EP6 I_EP6 6 1 read-write I_EP7 I_EP7 7 1 read-write INTNAKMSK UDC2 INT NAK MASK 0x334 32 read-write n 0x0 0x0 M_EP1 M_EP1 1 1 read-write M_EP2 M_EP2 2 1 read-write M_EP3 M_EP3 3 1 read-write M_EP4 M_EP4 4 1 read-write M_EP5 M_EP5 5 1 read-write M_EP6 M_EP6 6 1 read-write M_EP7 M_EP7 7 1 read-write INTRX0 UDC2 INT RX DATA0 0x2C 32 read-write n 0x0 0x0 RX_D0_EP RX_D0_EP 0 8 read-write WIDX UDC2 wIndex 0x18 32 read-only n 0x0 0x0 INDEX INDEX 0 16 read-only WLGTH UDC2 wLength 0x1C 32 read-only n 0x0 0x0 LENGTH LENGTH 0 16 read-only WVL UDC2 wValue 0x14 32 read-only n 0x0 0x0 VALUE VALUE 0 16 read-only USBPLL Low Voltage detector control register USBPLL 0x0 0x0 0xC registers n CR USB PLL Control Register 0x0 32 read-write n 0x0 0x0 USBPLLON USBPLLON 0 1 read-write EN USB PLL Enable Register 0x4 32 read-write n 0x0 0x0 USBDEN USBDEN 0 1 read-write USBHEN USBHEN 1 1 read-write SEL USB PLL Select Register 0x8 32 read-write n 0x0 0x0 USBPLLSEL USBPLLSEL 0 1 read-write USBPLLSET USBPLLSET 1 15 read-write WD Watchdog Timer (WD) WD 0x0 0x0 0x8 registers n CR WD Control Register 0x4 32 write-only n 0x0 0x0 MOD WD Mode Register 0x0 32 read-write n 0x0 0x0 I2WDT I2WDT 2 1 read-write RESCR RESCR 1 1 read-write WDTE WDTE 7 1 read-write WDTP WDTP 4 3 read-write