Toshiba M4KHA 2024.04.28 TOSHIBA Cortex-M4 MCU 8 32 ADA 12-bit Analog to Digital Converter(ADC) ADA 0x0 0x0 0x1C registers n 0x120 0x20 reserved n 0x140 0x60 registers n 0x1C 0x4 reserved n 0x20 0x14 registers n 0x34 0xC reserved n 0x40 0x54 registers n 0x94 0x8 reserved n 0x9C 0x84 registers n CLK AD Conversion Clock Setting Register 0xC 32 read-write n 0x0 0x0 EXAZ0 EXAZ0 3 4 read-write EXAZ1 EXAZ1 8 4 read-write VADCLK VADCLK 0 3 read-write CMP0 AD Conversion Result Comparison Register 0 0x2C 32 read-write n 0x0 0x0 AD0CMP0 AD0CMP0 4 12 read-write CMP1 AD Conversion Result Comparison Register 1 0x30 32 read-write n 0x0 0x0 AD0CMP1 AD0CMP1 4 12 read-write CMPCR0 AD Monitor function Setting Register 0 0x24 32 read-write n 0x0 0x0 ADBIG0 ADBIG0 5 1 read-write CMPCND0 CMPCND0 6 1 read-write CMPCNT0 CMPCNT0 8 4 read-write REGS0 REGS0 0 5 read-write CMPCR1 AD Monitor function Setting Register 1 0x28 32 read-write n 0x0 0x0 ADBIG1 ADBIG1 5 1 read-write CMPCND1 CMPCND1 6 1 read-write CMPCNT1 CMPCNT1 8 4 read-write REGS1 REGS1 0 5 read-write CMPEN AD Monitor function interrupt permission register 0x20 32 read-write n 0x0 0x0 CMP0EN CMP0EN 0 1 read-write CMP1EN CMP1EN 1 1 read-write CR0 AD Control Register 0 0x0 32 read-write n 0x0 0x0 ADEN ADEN 7 1 read-write CNT CNT 0 1 read-write SGL SGL 1 1 write-only CR1 AD Control Register 1 0x4 32 read-write n 0x0 0x0 CNTDMEN CNTDMEN 6 1 read-write SGLDMEN SGLDMEN 5 1 read-write TRGDMEN TRGDMEN 4 1 read-write TRGEN TRGEN 0 1 read-write EXAZSEL AD Sampling Time Select Register 0x9C 32 read-write n 0x0 0x0 EXAZSEL EXAZSEL 0 32 read-write MOD0 AD Mode Control Register 0 0x10 32 read-write n 0x0 0x0 DACON DACON 0 1 read-write RCUT RCUT 1 1 read-write MOD1 AD Mode Control Register 1 0x14 32 read-write n 0x0 0x0 MOD1 MOD1 0 32 read-write MOD2 AD Mode Control Register 2 0x18 32 read-write n 0x0 0x0 MOD2 MOD2 0 32 read-write PINTS0 AD PMD Trigger Interrupt Select Register 0 0x70 32 read-write n 0x0 0x0 INTSEL0 INTSEL0 0 2 read-write PINTS1 AD PMD Trigger Interrupt Select Register 1 0x74 32 read-write n 0x0 0x0 INTSEL1 INTSEL1 0 2 read-write PINTS2 AD PMD Trigger Interrupt Select Register 2 0x78 32 read-write n 0x0 0x0 INTSEL2 INTSEL2 0 2 read-write PINTS3 AD PMD Trigger Interrupt Select Register 3 0x7C 32 read-write n 0x0 0x0 INTSEL3 INTSEL3 0 2 read-write PINTS4 AD PMD Trigger Interrupt Select Register 4 0x80 32 read-write n 0x0 0x0 INTSEL4 INTSEL4 0 2 read-write PINTS5 AD PMD Trigger Interrupt Select Register 5 0x84 32 read-write n 0x0 0x0 INTSEL5 INTSEL5 0 2 read-write PINTS6 AD PMD Trigger Interrupt Select Register 6 0x88 32 read-write n 0x0 0x0 INTSEL6 INTSEL6 0 2 read-write PINTS7 AD PMD Trigger Interrupt Select Register 7 0x8C 32 read-write n 0x0 0x0 INTSEL7 INTSEL7 0 2 read-write PREGS AD PMD Trigger Conversion Result Storage Select Register 1 0x90 32 read-write n 0x0 0x0 REGSEL0 REGSEL0 0 3 read-write REGSEL1 REGSEL1 4 3 read-write REGSEL2 REGSEL2 8 3 read-write REGSEL3 REGSEL3 12 3 read-write REGSEL4 REGSEL4 16 3 read-write REGSEL5 REGSEL5 20 3 read-write REGSEL6 REGSEL6 24 3 read-write REGSEL7 REGSEL7 28 3 read-write PSEL0 AD PMD Trigger Program Number Select Register 0 0x40 32 read-write n 0x0 0x0 PENS0 PENS0 7 1 read-write PMDS0 PMDS0 0 3 read-write PSEL1 AD PMD Trigger Program Number Select Register 1 0x44 32 read-write n 0x0 0x0 PENS1 PENS1 7 1 read-write PMDS1 PMDS1 0 3 read-write PSEL10 AD PMD Trigger Program Number Select Register 10 0x68 32 read-write n 0x0 0x0 PENS10 PENS10 7 1 read-write PMDS10 PMDS10 0 3 read-write PSEL11 AD PMD Trigger Program Number Select Register 11 0x6C 32 read-write n 0x0 0x0 PENS11 PENS11 7 1 read-write PMDS11 PMDS11 0 3 read-write PSEL2 AD PMD Trigger Program Number Select Register 2 0x48 32 read-write n 0x0 0x0 PENS2 PENS2 7 1 read-write PMDS2 PMDS2 0 3 read-write PSEL3 AD PMD Trigger Program Number Select Register 3 0x4C 32 read-write n 0x0 0x0 PENS3 PENS3 7 1 read-write PMDS3 PMDS3 0 3 read-write PSEL4 AD PMD Trigger Program Number Select Register 4 0x50 32 read-write n 0x0 0x0 PENS4 PENS4 7 1 read-write PMDS4 PMDS4 0 3 read-write PSEL5 AD PMD Trigger Program Number Select Register 5 0x54 32 read-write n 0x0 0x0 PENS5 PENS5 7 1 read-write PMDS5 PMDS5 0 3 read-write PSEL6 AD PMD Trigger Program Number Select Register 6 0x58 32 read-write n 0x0 0x0 PENS6 PENS6 7 1 read-write PMDS6 PMDS6 0 3 read-write PSEL7 AD PMD Trigger Program Number Select Register 7 0x5C 32 read-write n 0x0 0x0 PENS7 PENS7 7 1 read-write PMDS7 PMDS7 0 3 read-write PSEL8 AD PMD Trigger Program Number Select Register 8 0x60 32 read-write n 0x0 0x0 PENS8 PENS8 7 1 read-write PMDS8 PMDS8 0 3 read-write PSEL9 AD PMD Trigger Program Number Select Register 9 0x64 32 read-write n 0x0 0x0 PENS9 PENS9 7 1 read-write PMDS9 PMDS9 0 3 read-write PSET0 AD PMD Trigger Program Register 0 0xA0 32 read-write n 0x0 0x0 AINSP00 AINSP00 0 5 read-write AINSP01 AINSP01 8 5 read-write AINSP02 AINSP02 16 5 read-write AINSP03 AINSP03 24 5 read-write ENSP00 ENSP00 7 1 read-write ENSP01 ENSP01 15 1 read-write ENSP02 ENSP02 23 1 read-write ENSP03 ENSP03 31 1 read-write UVWIS00 UVWIS00 5 2 read-write UVWIS01 UVWIS01 13 2 read-write UVWIS02 UVWIS02 21 2 read-write UVWIS03 UVWIS03 29 2 read-write PSET1 AD PMD Trigger Program Register 1 0xA4 32 read-write n 0x0 0x0 AINSP10 AINSP10 0 5 read-write AINSP11 AINSP11 8 5 read-write AINSP12 AINSP12 16 5 read-write AINSP13 AINSP13 24 5 read-write ENSP10 ENSP10 7 1 read-write ENSP11 ENSP11 15 1 read-write ENSP12 ENSP12 23 1 read-write ENSP13 ENSP13 31 1 read-write UVWIS10 UVWIS10 5 2 read-write UVWIS11 UVWIS11 13 2 read-write UVWIS12 UVWIS12 21 2 read-write UVWIS13 UVWIS13 29 2 read-write PSET2 AD PMD Trigger Program Register 2 0xA8 32 read-write n 0x0 0x0 AINSP20 AINSP20 0 5 read-write AINSP21 AINSP21 8 5 read-write AINSP22 AINSP22 16 5 read-write AINSP23 AINSP23 24 5 read-write ENSP20 ENSP20 7 1 read-write ENSP21 ENSP21 15 1 read-write ENSP22 ENSP22 23 1 read-write ENSP23 ENSP23 31 1 read-write UVWIS20 UVWIS20 5 2 read-write UVWIS21 UVWIS21 13 2 read-write UVWIS22 UVWIS22 21 2 read-write UVWIS23 UVWIS23 29 2 read-write PSET3 AD PMD Trigger Program Register 3 0xAC 32 read-write n 0x0 0x0 AINSP30 AINSP30 0 5 read-write AINSP31 AINSP31 8 5 read-write AINSP32 AINSP32 16 5 read-write AINSP33 AINSP33 24 5 read-write ENSP30 ENSP30 7 1 read-write ENSP31 ENSP31 15 1 read-write ENSP32 ENSP32 23 1 read-write ENSP33 ENSP33 31 1 read-write UVWIS30 UVWIS30 5 2 read-write UVWIS31 UVWIS31 13 2 read-write UVWIS32 UVWIS32 21 2 read-write UVWIS33 UVWIS33 29 2 read-write PSET4 AD PMD Trigger Program Register 4 0xB0 32 read-write n 0x0 0x0 AINSP40 AINSP40 0 5 read-write AINSP41 AINSP41 8 5 read-write AINSP42 AINSP42 16 5 read-write AINSP43 AINSP43 24 5 read-write ENSP40 ENSP40 7 1 read-write ENSP41 ENSP41 15 1 read-write ENSP42 ENSP42 23 1 read-write ENSP43 ENSP43 31 1 read-write UVWIS40 UVWIS40 5 2 read-write UVWIS41 UVWIS41 13 2 read-write UVWIS42 UVWIS42 21 2 read-write UVWIS43 UVWIS43 29 2 read-write PSET5 AD PMD Trigger Program Register 5 0xB4 32 read-write n 0x0 0x0 AINSP50 AINSP50 0 5 read-write AINSP51 AINSP51 8 5 read-write AINSP52 AINSP52 16 5 read-write AINSP53 AINSP53 24 5 read-write ENSP50 ENSP50 7 1 read-write ENSP51 ENSP51 15 1 read-write ENSP52 ENSP52 23 1 read-write ENSP53 ENSP53 31 1 read-write UVWIS50 UVWIS50 5 2 read-write UVWIS51 UVWIS51 13 2 read-write UVWIS52 UVWIS52 21 2 read-write UVWIS53 UVWIS53 29 2 read-write PSET6 AD PMD Trigger Program Register 6 0xB8 32 read-write n 0x0 0x0 AINSP60 AINSP60 0 5 read-write AINSP61 AINSP61 8 5 read-write AINSP62 AINSP62 16 5 read-write AINSP63 AINSP63 24 5 read-write ENSP60 ENSP60 7 1 read-write ENSP61 ENSP61 15 1 read-write ENSP62 ENSP62 23 1 read-write ENSP63 ENSP63 31 1 read-write UVWIS60 UVWIS60 5 2 read-write UVWIS61 UVWIS61 13 2 read-write UVWIS62 UVWIS62 21 2 read-write UVWIS63 UVWIS63 29 2 read-write PSET7 AD PMD Trigger Program Register 7 0xBC 32 read-write n 0x0 0x0 AINSP70 AINSP70 0 5 read-write AINSP71 AINSP71 8 5 read-write AINSP72 AINSP72 16 5 read-write AINSP73 AINSP73 24 5 read-write ENSP70 ENSP70 7 1 read-write ENSP71 ENSP71 15 1 read-write ENSP72 ENSP72 23 1 read-write ENSP73 ENSP73 31 1 read-write UVWIS70 UVWIS70 5 2 read-write UVWIS71 UVWIS71 13 2 read-write UVWIS72 UVWIS72 21 2 read-write UVWIS73 UVWIS73 29 2 read-write REG0 AD Conversion Result Register 0 0x140 32 read-only n 0x0 0x0 ADOVRF0 ADOVRF0 1 1 read-only ADOVRF_M0 ADOVRF_M0 29 1 read-only ADR0 ADR0 4 12 read-only ADRF0 ADRF0 0 1 read-only ADRF_M0 ADRF_M0 28 1 read-only ADR_M0 ADR_M0 16 12 read-only REG1 AD Conversion Result Register 1 0x144 32 read-only n 0x0 0x0 ADOVRF1 ADOVRF1 1 1 read-only ADOVRF_M1 ADOVRF_M1 29 1 read-only ADR1 ADR1 4 12 read-only ADRF1 ADRF1 0 1 read-only ADRF_M1 ADRF_M1 28 1 read-only ADR_M1 ADR_M1 16 12 read-only REG10 AD Conversion Result Register 10 0x168 32 read-only n 0x0 0x0 ADOVRF10 ADOVRF10 1 1 read-only ADOVRF_M10 ADOVRF_M10 29 1 read-only ADR10 ADR10 4 12 read-only ADRF10 ADRF10 0 1 read-only ADRF_M10 ADRF_M10 28 1 read-only ADR_M10 ADR_M10 16 12 read-only REG11 AD Conversion Result Register 11 0x16C 32 read-only n 0x0 0x0 ADOVRF11 ADOVRF11 1 1 read-only ADOVRF_M11 ADOVRF_M11 29 1 read-only ADR11 ADR11 4 12 read-only ADRF11 ADRF11 0 1 read-only ADRF_M11 ADRF_M11 28 1 read-only ADR_M11 ADR_M11 16 12 read-only REG12 AD Conversion Result Register 12 0x170 32 read-only n 0x0 0x0 ADOVRF12 ADOVRF12 1 1 read-only ADOVRF_M12 ADOVRF_M12 29 1 read-only ADR12 ADR12 4 12 read-only ADRF12 ADRF12 0 1 read-only ADRF_M12 ADRF_M12 28 1 read-only ADR_M12 ADR_M12 16 12 read-only REG13 AD Conversion Result Register 13 0x174 32 read-only n 0x0 0x0 ADOVRF13 ADOVRF13 1 1 read-only ADOVRF_M13 ADOVRF_M13 29 1 read-only ADR13 ADR13 4 12 read-only ADRF13 ADRF13 0 1 read-only ADRF_M13 ADRF_M13 28 1 read-only ADR_M13 ADR_M13 16 12 read-only REG14 AD Conversion Result Register 14 0x178 32 read-only n 0x0 0x0 ADOVRF14 ADOVRF14 1 1 read-only ADOVRF_M14 ADOVRF_M14 29 1 read-only ADR14 ADR14 4 12 read-only ADRF14 ADRF14 0 1 read-only ADRF_M14 ADRF_M14 28 1 read-only ADR_M14 ADR_M14 16 12 read-only REG15 AD Conversion Result Register 15 0x17C 32 read-only n 0x0 0x0 ADOVRF15 ADOVRF15 1 1 read-only ADOVRF_M15 ADOVRF_M15 29 1 read-only ADR15 ADR15 4 12 read-only ADRF15 ADRF15 0 1 read-only ADRF_M15 ADRF_M15 28 1 read-only ADR_M15 ADR_M15 16 12 read-only REG16 AD Conversion Result Register 16 0x180 32 read-only n 0x0 0x0 ADOVRF16 ADOVRF16 1 1 read-only ADOVRF_M16 ADOVRF_M16 29 1 read-only ADR16 ADR16 4 12 read-only ADRF16 ADRF16 0 1 read-only ADRF_M16 ADRF_M16 28 1 read-only ADR_M16 ADR_M16 16 12 read-only REG17 AD Conversion Result Register 17 0x184 32 read-only n 0x0 0x0 ADOVRF17 ADOVRF17 1 1 read-only ADOVRF_M17 ADOVRF_M17 29 1 read-only ADR17 ADR17 4 12 read-only ADRF17 ADRF17 0 1 read-only ADRF_M17 ADRF_M17 28 1 read-only ADR_M17 ADR_M17 16 12 read-only REG18 AD Conversion Result Register 18 0x188 32 read-only n 0x0 0x0 ADOVRF18 ADOVRF18 1 1 read-only ADOVRF_M18 ADOVRF_M18 29 1 read-only ADR18 ADR18 4 12 read-only ADRF18 ADRF18 0 1 read-only ADRF_M18 ADRF_M18 28 1 read-only ADR_M18 ADR_M18 16 12 read-only REG19 AD Conversion Result Register 19 0x18C 32 read-only n 0x0 0x0 ADOVRF19 ADOVRF19 1 1 read-only ADOVRF_M19 ADOVRF_M19 29 1 read-only ADR19 ADR19 4 12 read-only ADRF19 ADRF19 0 1 read-only ADRF_M19 ADRF_M19 28 1 read-only ADR_M19 ADR_M19 16 12 read-only REG2 AD Conversion Result Register 2 0x148 32 read-only n 0x0 0x0 ADOVRF2 ADOVRF2 1 1 read-only ADOVRF_M2 ADOVRF_M2 29 1 read-only ADR2 ADR2 4 12 read-only ADRF2 ADRF2 0 1 read-only ADRF_M2 ADRF_M2 28 1 read-only ADR_M2 ADR_M2 16 12 read-only REG20 AD Conversion Result Register 20 0x190 32 read-only n 0x0 0x0 ADOVRF20 ADOVRF20 1 1 read-only ADOVRF_M20 ADOVRF_M20 29 1 read-only ADR20 ADR20 4 12 read-only ADRF20 ADRF20 0 1 read-only ADRF_M20 ADRF_M20 28 1 read-only ADR_M20 ADR_M20 16 12 read-only REG21 AD Conversion Result Register 21 0x194 32 read-only n 0x0 0x0 ADOVRF21 ADOVRF21 1 1 read-only ADOVRF_M21 ADOVRF_M21 29 1 read-only ADR21 ADR21 4 12 read-only ADRF21 ADRF21 0 1 read-only ADRF_M21 ADRF_M21 28 1 read-only ADR_M21 ADR_M21 16 12 read-only REG22 AD Conversion Result Register 22 0x198 32 read-only n 0x0 0x0 ADOVRF22 ADOVRF22 1 1 read-only ADOVRF_M22 ADOVRF_M22 29 1 read-only ADR22 ADR22 4 12 read-only ADRF22 ADRF22 0 1 read-only ADRF_M22 ADRF_M22 28 1 read-only ADR_M22 ADR_M22 16 12 read-only REG23 AD Conversion Result Register 23 0x19C 32 read-only n 0x0 0x0 ADOVRF23 ADOVRF23 1 1 read-only ADOVRF_M23 ADOVRF_M23 29 1 read-only ADR23 ADR23 4 12 read-only ADRF23 ADRF23 0 1 read-only ADRF_M23 ADRF_M23 28 1 read-only ADR_M23 ADR_M23 16 12 read-only REG3 AD Conversion Result Register 3 0x14C 32 read-only n 0x0 0x0 ADOVRF3 ADOVRF3 1 1 read-only ADOVRF_M3 ADOVRF_M3 29 1 read-only ADR3 ADR3 4 12 read-only ADRF3 ADRF3 0 1 read-only ADRF_M3 ADRF_M3 28 1 read-only ADR_M3 ADR_M3 16 12 read-only REG4 AD Conversion Result Register 4 0x150 32 read-only n 0x0 0x0 ADOVRF4 ADOVRF4 1 1 read-only ADOVRF_M4 ADOVRF_M4 29 1 read-only ADR4 ADR4 4 12 read-only ADRF4 ADRF4 0 1 read-only ADRF_M4 ADRF_M4 28 1 read-only ADR_M4 ADR_M4 16 12 read-only REG5 AD Conversion Result Register 5 0x154 32 read-only n 0x0 0x0 ADOVRF5 ADOVRF5 1 1 read-only ADOVRF_M5 ADOVRF_M5 29 1 read-only ADR5 ADR5 4 12 read-only ADRF5 ADRF5 0 1 read-only ADRF_M5 ADRF_M5 28 1 read-only ADR_M5 ADR_M5 16 12 read-only REG6 AD Conversion Result Register 6 0x158 32 read-only n 0x0 0x0 ADOVRF6 ADOVRF6 1 1 read-only ADOVRF_M6 ADOVRF_M6 29 1 read-only ADR6 ADR6 4 12 read-only ADRF6 ADRF6 0 1 read-only ADRF_M6 ADRF_M6 28 1 read-only ADR_M6 ADR_M6 16 12 read-only REG7 AD Conversion Result Register 7 0x15C 32 read-only n 0x0 0x0 ADOVRF7 ADOVRF7 1 1 read-only ADOVRF_M7 ADOVRF_M7 29 1 read-only ADR7 ADR7 4 12 read-only ADRF7 ADRF7 0 1 read-only ADRF_M7 ADRF_M7 28 1 read-only ADR_M7 ADR_M7 16 12 read-only REG8 AD Conversion Result Register 8 0x160 32 read-only n 0x0 0x0 ADOVRF8 ADOVRF8 1 1 read-only ADOVRF_M8 ADOVRF_M8 29 1 read-only ADR8 ADR8 4 12 read-only ADRF8 ADRF8 0 1 read-only ADRF_M8 ADRF_M8 28 1 read-only ADR_M8 ADR_M8 16 12 read-only REG9 AD Conversion Result Register 9 0x164 32 read-only n 0x0 0x0 ADOVRF9 ADOVRF9 1 1 read-only ADOVRF_M9 ADOVRF_M9 29 1 read-only ADR9 ADR9 4 12 read-only ADRF9 ADRF9 0 1 read-only ADRF_M9 ADRF_M9 28 1 read-only ADR_M9 ADR_M9 16 12 read-only ST AD Status Register 0x8 32 read-only n 0x0 0x0 ADBF ADBF 7 1 read-only CNTF CNTF 3 1 read-only PMDF PMDF 0 1 read-only SNGF SNGF 2 1 read-only TRGF TRGF 1 1 read-only TSET0 AD General purpose Trigger Program Register 0 0xC0 32 read-write n 0x0 0x0 AINST0 AINST0 0 5 read-write ENINT0 ENINT0 7 1 read-write TRGS0 TRGS0 5 2 read-write TSET1 AD General purpose Trigger Program Register 1 0xC4 32 read-write n 0x0 0x0 AINST1 AINST1 0 5 read-write ENINT1 ENINT1 7 1 read-write TRGS1 TRGS1 5 2 read-write TSET10 AD General purpose Trigger Program Register 10 0xE8 32 read-write n 0x0 0x0 AINST10 AINST10 0 5 read-write ENINT10 ENINT10 7 1 read-write TRGS10 TRGS10 5 2 read-write TSET11 AD General purpose Trigger Program Register 11 0xEC 32 read-write n 0x0 0x0 AINST11 AINST11 0 5 read-write ENINT11 ENINT11 7 1 read-write TRGS11 TRGS11 5 2 read-write TSET12 AD General purpose Trigger Program Register 12 0xF0 32 read-write n 0x0 0x0 AINST12 AINST12 0 5 read-write ENINT12 ENINT12 7 1 read-write TRGS12 TRGS12 5 2 read-write TSET13 AD General purpose Trigger Program Register 13 0xF4 32 read-write n 0x0 0x0 AINST13 AINST13 0 5 read-write ENINT13 ENINT13 7 1 read-write TRGS13 TRGS13 5 2 read-write TSET14 AD General purpose Trigger Program Register 14 0xF8 32 read-write n 0x0 0x0 AINST14 AINST14 0 5 read-write ENINT14 ENINT14 7 1 read-write TRGS14 TRGS14 5 2 read-write TSET15 AD General purpose Trigger Program Register 15 0xFC 32 read-write n 0x0 0x0 AINST15 AINST15 0 5 read-write ENINT15 ENINT15 7 1 read-write TRGS15 TRGS15 5 2 read-write TSET16 AD General purpose Trigger Program Register 16 0x100 32 read-write n 0x0 0x0 AINST16 AINST16 0 5 read-write ENINT16 ENINT16 7 1 read-write TRGS16 TRGS16 5 2 read-write TSET17 AD General purpose Trigger Program Register 17 0x104 32 read-write n 0x0 0x0 AINST17 AINST17 0 5 read-write ENINT17 ENINT17 7 1 read-write TRGS17 TRGS17 5 2 read-write TSET18 AD General purpose Trigger Program Register 18 0x108 32 read-write n 0x0 0x0 AINST18 AINST18 0 5 read-write ENINT18 ENINT18 7 1 read-write TRGS18 TRGS18 5 2 read-write TSET19 AD General purpose Trigger Program Register 19 0x10C 32 read-write n 0x0 0x0 AINST19 AINST19 0 5 read-write ENINT19 ENINT19 7 1 read-write TRGS19 TRGS19 5 2 read-write TSET2 AD General purpose Trigger Program Register 2 0xC8 32 read-write n 0x0 0x0 AINST2 AINST2 0 5 read-write ENINT2 ENINT2 7 1 read-write TRGS2 TRGS2 5 2 read-write TSET20 AD General purpose Trigger Program Register 20 0x110 32 read-write n 0x0 0x0 AINST20 AINST20 0 5 read-write ENINT20 ENINT20 7 1 read-write TRGS20 TRGS20 5 2 read-write TSET21 AD General purpose Trigger Program Register 21 0x114 32 read-write n 0x0 0x0 AINST21 AINST21 0 5 read-write ENINT21 ENINT21 7 1 read-write TRGS21 TRGS21 5 2 read-write TSET22 AD General purpose Trigger Program Register 22 0x118 32 read-write n 0x0 0x0 AINST22 AINST22 0 5 read-write ENINT22 ENINT22 7 1 read-write TRGS22 TRGS22 5 2 read-write TSET23 AD General purpose Trigger Program Register 23 0x11C 32 read-write n 0x0 0x0 AINST23 AINST23 0 5 read-write ENINT23 ENINT23 7 1 read-write TRGS23 TRGS23 5 2 read-write TSET3 AD General purpose Trigger Program Register 3 0xCC 32 read-write n 0x0 0x0 AINST3 AINST3 0 5 read-write ENINT3 ENINT3 7 1 read-write TRGS3 TRGS3 5 2 read-write TSET4 AD General purpose Trigger Program Register 4 0xD0 32 read-write n 0x0 0x0 AINST4 AINST4 0 5 read-write ENINT4 ENINT4 7 1 read-write TRGS4 TRGS4 5 2 read-write TSET5 AD General purpose Trigger Program Register 5 0xD4 32 read-write n 0x0 0x0 AINST5 AINST5 0 5 read-write ENINT5 ENINT5 7 1 read-write TRGS5 TRGS5 5 2 read-write TSET6 AD General purpose Trigger Program Register 6 0xD8 32 read-write n 0x0 0x0 AINST6 AINST6 0 5 read-write ENINT6 ENINT6 7 1 read-write TRGS6 TRGS6 5 2 read-write TSET7 AD General purpose Trigger Program Register 7 0xDC 32 read-write n 0x0 0x0 AINST7 AINST7 0 5 read-write ENINT7 ENINT7 7 1 read-write TRGS7 TRGS7 5 2 read-write TSET8 AD General purpose Trigger Program Register 8 0xE0 32 read-write n 0x0 0x0 AINST8 AINST8 0 5 read-write ENINT8 ENINT8 7 1 read-write TRGS8 TRGS8 5 2 read-write TSET9 AD General purpose Trigger Program Register 9 0xE4 32 read-write n 0x0 0x0 AINST9 AINST9 0 5 read-write ENINT9 ENINT9 7 1 read-write TRGS9 TRGS9 5 2 read-write ADB 12-bit Analog to Digital Converter(ADC) ADA 0x0 0x0 0x1C registers n 0x120 0x20 reserved n 0x140 0x60 registers n 0x1C 0x4 reserved n 0x20 0x14 registers n 0x34 0xC reserved n 0x40 0x54 registers n 0x94 0x8 reserved n 0x9C 0x84 registers n CLK AD Conversion Clock Setting Register 0xC 32 read-write n 0x0 0x0 EXAZ0 EXAZ0 3 4 read-write EXAZ1 EXAZ1 8 4 read-write VADCLK VADCLK 0 3 read-write CMP0 AD Conversion Result Comparison Register 0 0x2C 32 read-write n 0x0 0x0 AD0CMP0 AD0CMP0 4 12 read-write CMP1 AD Conversion Result Comparison Register 1 0x30 32 read-write n 0x0 0x0 AD0CMP1 AD0CMP1 4 12 read-write CMPCR0 AD Monitor function Setting Register 0 0x24 32 read-write n 0x0 0x0 ADBIG0 ADBIG0 5 1 read-write CMPCND0 CMPCND0 6 1 read-write CMPCNT0 CMPCNT0 8 4 read-write REGS0 REGS0 0 5 read-write CMPCR1 AD Monitor function Setting Register 1 0x28 32 read-write n 0x0 0x0 ADBIG1 ADBIG1 5 1 read-write CMPCND1 CMPCND1 6 1 read-write CMPCNT1 CMPCNT1 8 4 read-write REGS1 REGS1 0 5 read-write CMPEN AD Monitor function interrupt permission register 0x20 32 read-write n 0x0 0x0 CMP0EN CMP0EN 0 1 read-write CMP1EN CMP1EN 1 1 read-write CR0 AD Control Register 0 0x0 32 read-write n 0x0 0x0 ADEN ADEN 7 1 read-write CNT CNT 0 1 read-write SGL SGL 1 1 write-only CR1 AD Control Register 1 0x4 32 read-write n 0x0 0x0 CNTDMEN CNTDMEN 6 1 read-write SGLDMEN SGLDMEN 5 1 read-write TRGDMEN TRGDMEN 4 1 read-write TRGEN TRGEN 0 1 read-write EXAZSEL AD Sampling Time Select Register 0x9C 32 read-write n 0x0 0x0 EXAZSEL EXAZSEL 0 32 read-write MOD0 AD Mode Control Register 0 0x10 32 read-write n 0x0 0x0 DACON DACON 0 1 read-write RCUT RCUT 1 1 read-write MOD1 AD Mode Control Register 1 0x14 32 read-write n 0x0 0x0 MOD1 MOD1 0 32 read-write MOD2 AD Mode Control Register 2 0x18 32 read-write n 0x0 0x0 MOD2 MOD2 0 32 read-write PINTS0 AD PMD Trigger Interrupt Select Register 0 0x70 32 read-write n 0x0 0x0 INTSEL0 INTSEL0 0 2 read-write PINTS1 AD PMD Trigger Interrupt Select Register 1 0x74 32 read-write n 0x0 0x0 INTSEL1 INTSEL1 0 2 read-write PINTS2 AD PMD Trigger Interrupt Select Register 2 0x78 32 read-write n 0x0 0x0 INTSEL2 INTSEL2 0 2 read-write PINTS3 AD PMD Trigger Interrupt Select Register 3 0x7C 32 read-write n 0x0 0x0 INTSEL3 INTSEL3 0 2 read-write PINTS4 AD PMD Trigger Interrupt Select Register 4 0x80 32 read-write n 0x0 0x0 INTSEL4 INTSEL4 0 2 read-write PINTS5 AD PMD Trigger Interrupt Select Register 5 0x84 32 read-write n 0x0 0x0 INTSEL5 INTSEL5 0 2 read-write PINTS6 AD PMD Trigger Interrupt Select Register 6 0x88 32 read-write n 0x0 0x0 INTSEL6 INTSEL6 0 2 read-write PINTS7 AD PMD Trigger Interrupt Select Register 7 0x8C 32 read-write n 0x0 0x0 INTSEL7 INTSEL7 0 2 read-write PREGS AD PMD Trigger Conversion Result Storage Select Register 1 0x90 32 read-write n 0x0 0x0 REGSEL0 REGSEL0 0 3 read-write REGSEL1 REGSEL1 4 3 read-write REGSEL2 REGSEL2 8 3 read-write REGSEL3 REGSEL3 12 3 read-write REGSEL4 REGSEL4 16 3 read-write REGSEL5 REGSEL5 20 3 read-write REGSEL6 REGSEL6 24 3 read-write REGSEL7 REGSEL7 28 3 read-write PSEL0 AD PMD Trigger Program Number Select Register 0 0x40 32 read-write n 0x0 0x0 PENS0 PENS0 7 1 read-write PMDS0 PMDS0 0 3 read-write PSEL1 AD PMD Trigger Program Number Select Register 1 0x44 32 read-write n 0x0 0x0 PENS1 PENS1 7 1 read-write PMDS1 PMDS1 0 3 read-write PSEL10 AD PMD Trigger Program Number Select Register 10 0x68 32 read-write n 0x0 0x0 PENS10 PENS10 7 1 read-write PMDS10 PMDS10 0 3 read-write PSEL11 AD PMD Trigger Program Number Select Register 11 0x6C 32 read-write n 0x0 0x0 PENS11 PENS11 7 1 read-write PMDS11 PMDS11 0 3 read-write PSEL2 AD PMD Trigger Program Number Select Register 2 0x48 32 read-write n 0x0 0x0 PENS2 PENS2 7 1 read-write PMDS2 PMDS2 0 3 read-write PSEL3 AD PMD Trigger Program Number Select Register 3 0x4C 32 read-write n 0x0 0x0 PENS3 PENS3 7 1 read-write PMDS3 PMDS3 0 3 read-write PSEL4 AD PMD Trigger Program Number Select Register 4 0x50 32 read-write n 0x0 0x0 PENS4 PENS4 7 1 read-write PMDS4 PMDS4 0 3 read-write PSEL5 AD PMD Trigger Program Number Select Register 5 0x54 32 read-write n 0x0 0x0 PENS5 PENS5 7 1 read-write PMDS5 PMDS5 0 3 read-write PSEL6 AD PMD Trigger Program Number Select Register 6 0x58 32 read-write n 0x0 0x0 PENS6 PENS6 7 1 read-write PMDS6 PMDS6 0 3 read-write PSEL7 AD PMD Trigger Program Number Select Register 7 0x5C 32 read-write n 0x0 0x0 PENS7 PENS7 7 1 read-write PMDS7 PMDS7 0 3 read-write PSEL8 AD PMD Trigger Program Number Select Register 8 0x60 32 read-write n 0x0 0x0 PENS8 PENS8 7 1 read-write PMDS8 PMDS8 0 3 read-write PSEL9 AD PMD Trigger Program Number Select Register 9 0x64 32 read-write n 0x0 0x0 PENS9 PENS9 7 1 read-write PMDS9 PMDS9 0 3 read-write PSET0 AD PMD Trigger Program Register 0 0xA0 32 read-write n 0x0 0x0 AINSP00 AINSP00 0 5 read-write AINSP01 AINSP01 8 5 read-write AINSP02 AINSP02 16 5 read-write AINSP03 AINSP03 24 5 read-write ENSP00 ENSP00 7 1 read-write ENSP01 ENSP01 15 1 read-write ENSP02 ENSP02 23 1 read-write ENSP03 ENSP03 31 1 read-write UVWIS00 UVWIS00 5 2 read-write UVWIS01 UVWIS01 13 2 read-write UVWIS02 UVWIS02 21 2 read-write UVWIS03 UVWIS03 29 2 read-write PSET1 AD PMD Trigger Program Register 1 0xA4 32 read-write n 0x0 0x0 AINSP10 AINSP10 0 5 read-write AINSP11 AINSP11 8 5 read-write AINSP12 AINSP12 16 5 read-write AINSP13 AINSP13 24 5 read-write ENSP10 ENSP10 7 1 read-write ENSP11 ENSP11 15 1 read-write ENSP12 ENSP12 23 1 read-write ENSP13 ENSP13 31 1 read-write UVWIS10 UVWIS10 5 2 read-write UVWIS11 UVWIS11 13 2 read-write UVWIS12 UVWIS12 21 2 read-write UVWIS13 UVWIS13 29 2 read-write PSET2 AD PMD Trigger Program Register 2 0xA8 32 read-write n 0x0 0x0 AINSP20 AINSP20 0 5 read-write AINSP21 AINSP21 8 5 read-write AINSP22 AINSP22 16 5 read-write AINSP23 AINSP23 24 5 read-write ENSP20 ENSP20 7 1 read-write ENSP21 ENSP21 15 1 read-write ENSP22 ENSP22 23 1 read-write ENSP23 ENSP23 31 1 read-write UVWIS20 UVWIS20 5 2 read-write UVWIS21 UVWIS21 13 2 read-write UVWIS22 UVWIS22 21 2 read-write UVWIS23 UVWIS23 29 2 read-write PSET3 AD PMD Trigger Program Register 3 0xAC 32 read-write n 0x0 0x0 AINSP30 AINSP30 0 5 read-write AINSP31 AINSP31 8 5 read-write AINSP32 AINSP32 16 5 read-write AINSP33 AINSP33 24 5 read-write ENSP30 ENSP30 7 1 read-write ENSP31 ENSP31 15 1 read-write ENSP32 ENSP32 23 1 read-write ENSP33 ENSP33 31 1 read-write UVWIS30 UVWIS30 5 2 read-write UVWIS31 UVWIS31 13 2 read-write UVWIS32 UVWIS32 21 2 read-write UVWIS33 UVWIS33 29 2 read-write PSET4 AD PMD Trigger Program Register 4 0xB0 32 read-write n 0x0 0x0 AINSP40 AINSP40 0 5 read-write AINSP41 AINSP41 8 5 read-write AINSP42 AINSP42 16 5 read-write AINSP43 AINSP43 24 5 read-write ENSP40 ENSP40 7 1 read-write ENSP41 ENSP41 15 1 read-write ENSP42 ENSP42 23 1 read-write ENSP43 ENSP43 31 1 read-write UVWIS40 UVWIS40 5 2 read-write UVWIS41 UVWIS41 13 2 read-write UVWIS42 UVWIS42 21 2 read-write UVWIS43 UVWIS43 29 2 read-write PSET5 AD PMD Trigger Program Register 5 0xB4 32 read-write n 0x0 0x0 AINSP50 AINSP50 0 5 read-write AINSP51 AINSP51 8 5 read-write AINSP52 AINSP52 16 5 read-write AINSP53 AINSP53 24 5 read-write ENSP50 ENSP50 7 1 read-write ENSP51 ENSP51 15 1 read-write ENSP52 ENSP52 23 1 read-write ENSP53 ENSP53 31 1 read-write UVWIS50 UVWIS50 5 2 read-write UVWIS51 UVWIS51 13 2 read-write UVWIS52 UVWIS52 21 2 read-write UVWIS53 UVWIS53 29 2 read-write PSET6 AD PMD Trigger Program Register 6 0xB8 32 read-write n 0x0 0x0 AINSP60 AINSP60 0 5 read-write AINSP61 AINSP61 8 5 read-write AINSP62 AINSP62 16 5 read-write AINSP63 AINSP63 24 5 read-write ENSP60 ENSP60 7 1 read-write ENSP61 ENSP61 15 1 read-write ENSP62 ENSP62 23 1 read-write ENSP63 ENSP63 31 1 read-write UVWIS60 UVWIS60 5 2 read-write UVWIS61 UVWIS61 13 2 read-write UVWIS62 UVWIS62 21 2 read-write UVWIS63 UVWIS63 29 2 read-write PSET7 AD PMD Trigger Program Register 7 0xBC 32 read-write n 0x0 0x0 AINSP70 AINSP70 0 5 read-write AINSP71 AINSP71 8 5 read-write AINSP72 AINSP72 16 5 read-write AINSP73 AINSP73 24 5 read-write ENSP70 ENSP70 7 1 read-write ENSP71 ENSP71 15 1 read-write ENSP72 ENSP72 23 1 read-write ENSP73 ENSP73 31 1 read-write UVWIS70 UVWIS70 5 2 read-write UVWIS71 UVWIS71 13 2 read-write UVWIS72 UVWIS72 21 2 read-write UVWIS73 UVWIS73 29 2 read-write REG0 AD Conversion Result Register 0 0x140 32 read-only n 0x0 0x0 ADOVRF0 ADOVRF0 1 1 read-only ADOVRF_M0 ADOVRF_M0 29 1 read-only ADR0 ADR0 4 12 read-only ADRF0 ADRF0 0 1 read-only ADRF_M0 ADRF_M0 28 1 read-only ADR_M0 ADR_M0 16 12 read-only REG1 AD Conversion Result Register 1 0x144 32 read-only n 0x0 0x0 ADOVRF1 ADOVRF1 1 1 read-only ADOVRF_M1 ADOVRF_M1 29 1 read-only ADR1 ADR1 4 12 read-only ADRF1 ADRF1 0 1 read-only ADRF_M1 ADRF_M1 28 1 read-only ADR_M1 ADR_M1 16 12 read-only REG10 AD Conversion Result Register 10 0x168 32 read-only n 0x0 0x0 ADOVRF10 ADOVRF10 1 1 read-only ADOVRF_M10 ADOVRF_M10 29 1 read-only ADR10 ADR10 4 12 read-only ADRF10 ADRF10 0 1 read-only ADRF_M10 ADRF_M10 28 1 read-only ADR_M10 ADR_M10 16 12 read-only REG11 AD Conversion Result Register 11 0x16C 32 read-only n 0x0 0x0 ADOVRF11 ADOVRF11 1 1 read-only ADOVRF_M11 ADOVRF_M11 29 1 read-only ADR11 ADR11 4 12 read-only ADRF11 ADRF11 0 1 read-only ADRF_M11 ADRF_M11 28 1 read-only ADR_M11 ADR_M11 16 12 read-only REG12 AD Conversion Result Register 12 0x170 32 read-only n 0x0 0x0 ADOVRF12 ADOVRF12 1 1 read-only ADOVRF_M12 ADOVRF_M12 29 1 read-only ADR12 ADR12 4 12 read-only ADRF12 ADRF12 0 1 read-only ADRF_M12 ADRF_M12 28 1 read-only ADR_M12 ADR_M12 16 12 read-only REG13 AD Conversion Result Register 13 0x174 32 read-only n 0x0 0x0 ADOVRF13 ADOVRF13 1 1 read-only ADOVRF_M13 ADOVRF_M13 29 1 read-only ADR13 ADR13 4 12 read-only ADRF13 ADRF13 0 1 read-only ADRF_M13 ADRF_M13 28 1 read-only ADR_M13 ADR_M13 16 12 read-only REG14 AD Conversion Result Register 14 0x178 32 read-only n 0x0 0x0 ADOVRF14 ADOVRF14 1 1 read-only ADOVRF_M14 ADOVRF_M14 29 1 read-only ADR14 ADR14 4 12 read-only ADRF14 ADRF14 0 1 read-only ADRF_M14 ADRF_M14 28 1 read-only ADR_M14 ADR_M14 16 12 read-only REG15 AD Conversion Result Register 15 0x17C 32 read-only n 0x0 0x0 ADOVRF15 ADOVRF15 1 1 read-only ADOVRF_M15 ADOVRF_M15 29 1 read-only ADR15 ADR15 4 12 read-only ADRF15 ADRF15 0 1 read-only ADRF_M15 ADRF_M15 28 1 read-only ADR_M15 ADR_M15 16 12 read-only REG16 AD Conversion Result Register 16 0x180 32 read-only n 0x0 0x0 ADOVRF16 ADOVRF16 1 1 read-only ADOVRF_M16 ADOVRF_M16 29 1 read-only ADR16 ADR16 4 12 read-only ADRF16 ADRF16 0 1 read-only ADRF_M16 ADRF_M16 28 1 read-only ADR_M16 ADR_M16 16 12 read-only REG17 AD Conversion Result Register 17 0x184 32 read-only n 0x0 0x0 ADOVRF17 ADOVRF17 1 1 read-only ADOVRF_M17 ADOVRF_M17 29 1 read-only ADR17 ADR17 4 12 read-only ADRF17 ADRF17 0 1 read-only ADRF_M17 ADRF_M17 28 1 read-only ADR_M17 ADR_M17 16 12 read-only REG18 AD Conversion Result Register 18 0x188 32 read-only n 0x0 0x0 ADOVRF18 ADOVRF18 1 1 read-only ADOVRF_M18 ADOVRF_M18 29 1 read-only ADR18 ADR18 4 12 read-only ADRF18 ADRF18 0 1 read-only ADRF_M18 ADRF_M18 28 1 read-only ADR_M18 ADR_M18 16 12 read-only REG19 AD Conversion Result Register 19 0x18C 32 read-only n 0x0 0x0 ADOVRF19 ADOVRF19 1 1 read-only ADOVRF_M19 ADOVRF_M19 29 1 read-only ADR19 ADR19 4 12 read-only ADRF19 ADRF19 0 1 read-only ADRF_M19 ADRF_M19 28 1 read-only ADR_M19 ADR_M19 16 12 read-only REG2 AD Conversion Result Register 2 0x148 32 read-only n 0x0 0x0 ADOVRF2 ADOVRF2 1 1 read-only ADOVRF_M2 ADOVRF_M2 29 1 read-only ADR2 ADR2 4 12 read-only ADRF2 ADRF2 0 1 read-only ADRF_M2 ADRF_M2 28 1 read-only ADR_M2 ADR_M2 16 12 read-only REG20 AD Conversion Result Register 20 0x190 32 read-only n 0x0 0x0 ADOVRF20 ADOVRF20 1 1 read-only ADOVRF_M20 ADOVRF_M20 29 1 read-only ADR20 ADR20 4 12 read-only ADRF20 ADRF20 0 1 read-only ADRF_M20 ADRF_M20 28 1 read-only ADR_M20 ADR_M20 16 12 read-only REG21 AD Conversion Result Register 21 0x194 32 read-only n 0x0 0x0 ADOVRF21 ADOVRF21 1 1 read-only ADOVRF_M21 ADOVRF_M21 29 1 read-only ADR21 ADR21 4 12 read-only ADRF21 ADRF21 0 1 read-only ADRF_M21 ADRF_M21 28 1 read-only ADR_M21 ADR_M21 16 12 read-only REG22 AD Conversion Result Register 22 0x198 32 read-only n 0x0 0x0 ADOVRF22 ADOVRF22 1 1 read-only ADOVRF_M22 ADOVRF_M22 29 1 read-only ADR22 ADR22 4 12 read-only ADRF22 ADRF22 0 1 read-only ADRF_M22 ADRF_M22 28 1 read-only ADR_M22 ADR_M22 16 12 read-only REG23 AD Conversion Result Register 23 0x19C 32 read-only n 0x0 0x0 ADOVRF23 ADOVRF23 1 1 read-only ADOVRF_M23 ADOVRF_M23 29 1 read-only ADR23 ADR23 4 12 read-only ADRF23 ADRF23 0 1 read-only ADRF_M23 ADRF_M23 28 1 read-only ADR_M23 ADR_M23 16 12 read-only REG3 AD Conversion Result Register 3 0x14C 32 read-only n 0x0 0x0 ADOVRF3 ADOVRF3 1 1 read-only ADOVRF_M3 ADOVRF_M3 29 1 read-only ADR3 ADR3 4 12 read-only ADRF3 ADRF3 0 1 read-only ADRF_M3 ADRF_M3 28 1 read-only ADR_M3 ADR_M3 16 12 read-only REG4 AD Conversion Result Register 4 0x150 32 read-only n 0x0 0x0 ADOVRF4 ADOVRF4 1 1 read-only ADOVRF_M4 ADOVRF_M4 29 1 read-only ADR4 ADR4 4 12 read-only ADRF4 ADRF4 0 1 read-only ADRF_M4 ADRF_M4 28 1 read-only ADR_M4 ADR_M4 16 12 read-only REG5 AD Conversion Result Register 5 0x154 32 read-only n 0x0 0x0 ADOVRF5 ADOVRF5 1 1 read-only ADOVRF_M5 ADOVRF_M5 29 1 read-only ADR5 ADR5 4 12 read-only ADRF5 ADRF5 0 1 read-only ADRF_M5 ADRF_M5 28 1 read-only ADR_M5 ADR_M5 16 12 read-only REG6 AD Conversion Result Register 6 0x158 32 read-only n 0x0 0x0 ADOVRF6 ADOVRF6 1 1 read-only ADOVRF_M6 ADOVRF_M6 29 1 read-only ADR6 ADR6 4 12 read-only ADRF6 ADRF6 0 1 read-only ADRF_M6 ADRF_M6 28 1 read-only ADR_M6 ADR_M6 16 12 read-only REG7 AD Conversion Result Register 7 0x15C 32 read-only n 0x0 0x0 ADOVRF7 ADOVRF7 1 1 read-only ADOVRF_M7 ADOVRF_M7 29 1 read-only ADR7 ADR7 4 12 read-only ADRF7 ADRF7 0 1 read-only ADRF_M7 ADRF_M7 28 1 read-only ADR_M7 ADR_M7 16 12 read-only REG8 AD Conversion Result Register 8 0x160 32 read-only n 0x0 0x0 ADOVRF8 ADOVRF8 1 1 read-only ADOVRF_M8 ADOVRF_M8 29 1 read-only ADR8 ADR8 4 12 read-only ADRF8 ADRF8 0 1 read-only ADRF_M8 ADRF_M8 28 1 read-only ADR_M8 ADR_M8 16 12 read-only REG9 AD Conversion Result Register 9 0x164 32 read-only n 0x0 0x0 ADOVRF9 ADOVRF9 1 1 read-only ADOVRF_M9 ADOVRF_M9 29 1 read-only ADR9 ADR9 4 12 read-only ADRF9 ADRF9 0 1 read-only ADRF_M9 ADRF_M9 28 1 read-only ADR_M9 ADR_M9 16 12 read-only ST AD Status Register 0x8 32 read-only n 0x0 0x0 ADBF ADBF 7 1 read-only CNTF CNTF 3 1 read-only PMDF PMDF 0 1 read-only SNGF SNGF 2 1 read-only TRGF TRGF 1 1 read-only TSET0 AD General purpose Trigger Program Register 0 0xC0 32 read-write n 0x0 0x0 AINST0 AINST0 0 5 read-write ENINT0 ENINT0 7 1 read-write TRGS0 TRGS0 5 2 read-write TSET1 AD General purpose Trigger Program Register 1 0xC4 32 read-write n 0x0 0x0 AINST1 AINST1 0 5 read-write ENINT1 ENINT1 7 1 read-write TRGS1 TRGS1 5 2 read-write TSET10 AD General purpose Trigger Program Register 10 0xE8 32 read-write n 0x0 0x0 AINST10 AINST10 0 5 read-write ENINT10 ENINT10 7 1 read-write TRGS10 TRGS10 5 2 read-write TSET11 AD General purpose Trigger Program Register 11 0xEC 32 read-write n 0x0 0x0 AINST11 AINST11 0 5 read-write ENINT11 ENINT11 7 1 read-write TRGS11 TRGS11 5 2 read-write TSET12 AD General purpose Trigger Program Register 12 0xF0 32 read-write n 0x0 0x0 AINST12 AINST12 0 5 read-write ENINT12 ENINT12 7 1 read-write TRGS12 TRGS12 5 2 read-write TSET13 AD General purpose Trigger Program Register 13 0xF4 32 read-write n 0x0 0x0 AINST13 AINST13 0 5 read-write ENINT13 ENINT13 7 1 read-write TRGS13 TRGS13 5 2 read-write TSET14 AD General purpose Trigger Program Register 14 0xF8 32 read-write n 0x0 0x0 AINST14 AINST14 0 5 read-write ENINT14 ENINT14 7 1 read-write TRGS14 TRGS14 5 2 read-write TSET15 AD General purpose Trigger Program Register 15 0xFC 32 read-write n 0x0 0x0 AINST15 AINST15 0 5 read-write ENINT15 ENINT15 7 1 read-write TRGS15 TRGS15 5 2 read-write TSET16 AD General purpose Trigger Program Register 16 0x100 32 read-write n 0x0 0x0 AINST16 AINST16 0 5 read-write ENINT16 ENINT16 7 1 read-write TRGS16 TRGS16 5 2 read-write TSET17 AD General purpose Trigger Program Register 17 0x104 32 read-write n 0x0 0x0 AINST17 AINST17 0 5 read-write ENINT17 ENINT17 7 1 read-write TRGS17 TRGS17 5 2 read-write TSET18 AD General purpose Trigger Program Register 18 0x108 32 read-write n 0x0 0x0 AINST18 AINST18 0 5 read-write ENINT18 ENINT18 7 1 read-write TRGS18 TRGS18 5 2 read-write TSET19 AD General purpose Trigger Program Register 19 0x10C 32 read-write n 0x0 0x0 AINST19 AINST19 0 5 read-write ENINT19 ENINT19 7 1 read-write TRGS19 TRGS19 5 2 read-write TSET2 AD General purpose Trigger Program Register 2 0xC8 32 read-write n 0x0 0x0 AINST2 AINST2 0 5 read-write ENINT2 ENINT2 7 1 read-write TRGS2 TRGS2 5 2 read-write TSET20 AD General purpose Trigger Program Register 20 0x110 32 read-write n 0x0 0x0 AINST20 AINST20 0 5 read-write ENINT20 ENINT20 7 1 read-write TRGS20 TRGS20 5 2 read-write TSET21 AD General purpose Trigger Program Register 21 0x114 32 read-write n 0x0 0x0 AINST21 AINST21 0 5 read-write ENINT21 ENINT21 7 1 read-write TRGS21 TRGS21 5 2 read-write TSET22 AD General purpose Trigger Program Register 22 0x118 32 read-write n 0x0 0x0 AINST22 AINST22 0 5 read-write ENINT22 ENINT22 7 1 read-write TRGS22 TRGS22 5 2 read-write TSET23 AD General purpose Trigger Program Register 23 0x11C 32 read-write n 0x0 0x0 AINST23 AINST23 0 5 read-write ENINT23 ENINT23 7 1 read-write TRGS23 TRGS23 5 2 read-write TSET3 AD General purpose Trigger Program Register 3 0xCC 32 read-write n 0x0 0x0 AINST3 AINST3 0 5 read-write ENINT3 ENINT3 7 1 read-write TRGS3 TRGS3 5 2 read-write TSET4 AD General purpose Trigger Program Register 4 0xD0 32 read-write n 0x0 0x0 AINST4 AINST4 0 5 read-write ENINT4 ENINT4 7 1 read-write TRGS4 TRGS4 5 2 read-write TSET5 AD General purpose Trigger Program Register 5 0xD4 32 read-write n 0x0 0x0 AINST5 AINST5 0 5 read-write ENINT5 ENINT5 7 1 read-write TRGS5 TRGS5 5 2 read-write TSET6 AD General purpose Trigger Program Register 6 0xD8 32 read-write n 0x0 0x0 AINST6 AINST6 0 5 read-write ENINT6 ENINT6 7 1 read-write TRGS6 TRGS6 5 2 read-write TSET7 AD General purpose Trigger Program Register 7 0xDC 32 read-write n 0x0 0x0 AINST7 AINST7 0 5 read-write ENINT7 ENINT7 7 1 read-write TRGS7 TRGS7 5 2 read-write TSET8 AD General purpose Trigger Program Register 8 0xE0 32 read-write n 0x0 0x0 AINST8 AINST8 0 5 read-write ENINT8 ENINT8 7 1 read-write TRGS8 TRGS8 5 2 read-write TSET9 AD General purpose Trigger Program Register 9 0xE4 32 read-write n 0x0 0x0 AINST9 AINST9 0 5 read-write ENINT9 ENINT9 7 1 read-write TRGS9 TRGS9 5 2 read-write ADC 12-bit Analog to Digital Converter(ADC) ADA 0x0 0x0 0x1C registers n 0x120 0x20 reserved n 0x140 0x60 registers n 0x1C 0x4 reserved n 0x20 0x14 registers n 0x34 0xC reserved n 0x40 0x54 registers n 0x94 0x8 reserved n 0x9C 0x84 registers n CLK AD Conversion Clock Setting Register 0xC 32 read-write n 0x0 0x0 EXAZ0 EXAZ0 3 4 read-write EXAZ1 EXAZ1 8 4 read-write VADCLK VADCLK 0 3 read-write CMP0 AD Conversion Result Comparison Register 0 0x2C 32 read-write n 0x0 0x0 AD0CMP0 AD0CMP0 4 12 read-write CMP1 AD Conversion Result Comparison Register 1 0x30 32 read-write n 0x0 0x0 AD0CMP1 AD0CMP1 4 12 read-write CMPCR0 AD Monitor function Setting Register 0 0x24 32 read-write n 0x0 0x0 ADBIG0 ADBIG0 5 1 read-write CMPCND0 CMPCND0 6 1 read-write CMPCNT0 CMPCNT0 8 4 read-write REGS0 REGS0 0 5 read-write CMPCR1 AD Monitor function Setting Register 1 0x28 32 read-write n 0x0 0x0 ADBIG1 ADBIG1 5 1 read-write CMPCND1 CMPCND1 6 1 read-write CMPCNT1 CMPCNT1 8 4 read-write REGS1 REGS1 0 5 read-write CMPEN AD Monitor function interrupt permission register 0x20 32 read-write n 0x0 0x0 CMP0EN CMP0EN 0 1 read-write CMP1EN CMP1EN 1 1 read-write CR0 AD Control Register 0 0x0 32 read-write n 0x0 0x0 ADEN ADEN 7 1 read-write CNT CNT 0 1 read-write SGL SGL 1 1 write-only CR1 AD Control Register 1 0x4 32 read-write n 0x0 0x0 CNTDMEN CNTDMEN 6 1 read-write SGLDMEN SGLDMEN 5 1 read-write TRGDMEN TRGDMEN 4 1 read-write TRGEN TRGEN 0 1 read-write EXAZSEL AD Sampling Time Select Register 0x9C 32 read-write n 0x0 0x0 EXAZSEL EXAZSEL 0 32 read-write MOD0 AD Mode Control Register 0 0x10 32 read-write n 0x0 0x0 DACON DACON 0 1 read-write RCUT RCUT 1 1 read-write MOD1 AD Mode Control Register 1 0x14 32 read-write n 0x0 0x0 MOD1 MOD1 0 32 read-write MOD2 AD Mode Control Register 2 0x18 32 read-write n 0x0 0x0 MOD2 MOD2 0 32 read-write PINTS0 AD PMD Trigger Interrupt Select Register 0 0x70 32 read-write n 0x0 0x0 INTSEL0 INTSEL0 0 2 read-write PINTS1 AD PMD Trigger Interrupt Select Register 1 0x74 32 read-write n 0x0 0x0 INTSEL1 INTSEL1 0 2 read-write PINTS2 AD PMD Trigger Interrupt Select Register 2 0x78 32 read-write n 0x0 0x0 INTSEL2 INTSEL2 0 2 read-write PINTS3 AD PMD Trigger Interrupt Select Register 3 0x7C 32 read-write n 0x0 0x0 INTSEL3 INTSEL3 0 2 read-write PINTS4 AD PMD Trigger Interrupt Select Register 4 0x80 32 read-write n 0x0 0x0 INTSEL4 INTSEL4 0 2 read-write PINTS5 AD PMD Trigger Interrupt Select Register 5 0x84 32 read-write n 0x0 0x0 INTSEL5 INTSEL5 0 2 read-write PINTS6 AD PMD Trigger Interrupt Select Register 6 0x88 32 read-write n 0x0 0x0 INTSEL6 INTSEL6 0 2 read-write PINTS7 AD PMD Trigger Interrupt Select Register 7 0x8C 32 read-write n 0x0 0x0 INTSEL7 INTSEL7 0 2 read-write PREGS AD PMD Trigger Conversion Result Storage Select Register 1 0x90 32 read-write n 0x0 0x0 REGSEL0 REGSEL0 0 3 read-write REGSEL1 REGSEL1 4 3 read-write REGSEL2 REGSEL2 8 3 read-write REGSEL3 REGSEL3 12 3 read-write REGSEL4 REGSEL4 16 3 read-write REGSEL5 REGSEL5 20 3 read-write REGSEL6 REGSEL6 24 3 read-write REGSEL7 REGSEL7 28 3 read-write PSEL0 AD PMD Trigger Program Number Select Register 0 0x40 32 read-write n 0x0 0x0 PENS0 PENS0 7 1 read-write PMDS0 PMDS0 0 3 read-write PSEL1 AD PMD Trigger Program Number Select Register 1 0x44 32 read-write n 0x0 0x0 PENS1 PENS1 7 1 read-write PMDS1 PMDS1 0 3 read-write PSEL10 AD PMD Trigger Program Number Select Register 10 0x68 32 read-write n 0x0 0x0 PENS10 PENS10 7 1 read-write PMDS10 PMDS10 0 3 read-write PSEL11 AD PMD Trigger Program Number Select Register 11 0x6C 32 read-write n 0x0 0x0 PENS11 PENS11 7 1 read-write PMDS11 PMDS11 0 3 read-write PSEL2 AD PMD Trigger Program Number Select Register 2 0x48 32 read-write n 0x0 0x0 PENS2 PENS2 7 1 read-write PMDS2 PMDS2 0 3 read-write PSEL3 AD PMD Trigger Program Number Select Register 3 0x4C 32 read-write n 0x0 0x0 PENS3 PENS3 7 1 read-write PMDS3 PMDS3 0 3 read-write PSEL4 AD PMD Trigger Program Number Select Register 4 0x50 32 read-write n 0x0 0x0 PENS4 PENS4 7 1 read-write PMDS4 PMDS4 0 3 read-write PSEL5 AD PMD Trigger Program Number Select Register 5 0x54 32 read-write n 0x0 0x0 PENS5 PENS5 7 1 read-write PMDS5 PMDS5 0 3 read-write PSEL6 AD PMD Trigger Program Number Select Register 6 0x58 32 read-write n 0x0 0x0 PENS6 PENS6 7 1 read-write PMDS6 PMDS6 0 3 read-write PSEL7 AD PMD Trigger Program Number Select Register 7 0x5C 32 read-write n 0x0 0x0 PENS7 PENS7 7 1 read-write PMDS7 PMDS7 0 3 read-write PSEL8 AD PMD Trigger Program Number Select Register 8 0x60 32 read-write n 0x0 0x0 PENS8 PENS8 7 1 read-write PMDS8 PMDS8 0 3 read-write PSEL9 AD PMD Trigger Program Number Select Register 9 0x64 32 read-write n 0x0 0x0 PENS9 PENS9 7 1 read-write PMDS9 PMDS9 0 3 read-write PSET0 AD PMD Trigger Program Register 0 0xA0 32 read-write n 0x0 0x0 AINSP00 AINSP00 0 5 read-write AINSP01 AINSP01 8 5 read-write AINSP02 AINSP02 16 5 read-write AINSP03 AINSP03 24 5 read-write ENSP00 ENSP00 7 1 read-write ENSP01 ENSP01 15 1 read-write ENSP02 ENSP02 23 1 read-write ENSP03 ENSP03 31 1 read-write UVWIS00 UVWIS00 5 2 read-write UVWIS01 UVWIS01 13 2 read-write UVWIS02 UVWIS02 21 2 read-write UVWIS03 UVWIS03 29 2 read-write PSET1 AD PMD Trigger Program Register 1 0xA4 32 read-write n 0x0 0x0 AINSP10 AINSP10 0 5 read-write AINSP11 AINSP11 8 5 read-write AINSP12 AINSP12 16 5 read-write AINSP13 AINSP13 24 5 read-write ENSP10 ENSP10 7 1 read-write ENSP11 ENSP11 15 1 read-write ENSP12 ENSP12 23 1 read-write ENSP13 ENSP13 31 1 read-write UVWIS10 UVWIS10 5 2 read-write UVWIS11 UVWIS11 13 2 read-write UVWIS12 UVWIS12 21 2 read-write UVWIS13 UVWIS13 29 2 read-write PSET2 AD PMD Trigger Program Register 2 0xA8 32 read-write n 0x0 0x0 AINSP20 AINSP20 0 5 read-write AINSP21 AINSP21 8 5 read-write AINSP22 AINSP22 16 5 read-write AINSP23 AINSP23 24 5 read-write ENSP20 ENSP20 7 1 read-write ENSP21 ENSP21 15 1 read-write ENSP22 ENSP22 23 1 read-write ENSP23 ENSP23 31 1 read-write UVWIS20 UVWIS20 5 2 read-write UVWIS21 UVWIS21 13 2 read-write UVWIS22 UVWIS22 21 2 read-write UVWIS23 UVWIS23 29 2 read-write PSET3 AD PMD Trigger Program Register 3 0xAC 32 read-write n 0x0 0x0 AINSP30 AINSP30 0 5 read-write AINSP31 AINSP31 8 5 read-write AINSP32 AINSP32 16 5 read-write AINSP33 AINSP33 24 5 read-write ENSP30 ENSP30 7 1 read-write ENSP31 ENSP31 15 1 read-write ENSP32 ENSP32 23 1 read-write ENSP33 ENSP33 31 1 read-write UVWIS30 UVWIS30 5 2 read-write UVWIS31 UVWIS31 13 2 read-write UVWIS32 UVWIS32 21 2 read-write UVWIS33 UVWIS33 29 2 read-write PSET4 AD PMD Trigger Program Register 4 0xB0 32 read-write n 0x0 0x0 AINSP40 AINSP40 0 5 read-write AINSP41 AINSP41 8 5 read-write AINSP42 AINSP42 16 5 read-write AINSP43 AINSP43 24 5 read-write ENSP40 ENSP40 7 1 read-write ENSP41 ENSP41 15 1 read-write ENSP42 ENSP42 23 1 read-write ENSP43 ENSP43 31 1 read-write UVWIS40 UVWIS40 5 2 read-write UVWIS41 UVWIS41 13 2 read-write UVWIS42 UVWIS42 21 2 read-write UVWIS43 UVWIS43 29 2 read-write PSET5 AD PMD Trigger Program Register 5 0xB4 32 read-write n 0x0 0x0 AINSP50 AINSP50 0 5 read-write AINSP51 AINSP51 8 5 read-write AINSP52 AINSP52 16 5 read-write AINSP53 AINSP53 24 5 read-write ENSP50 ENSP50 7 1 read-write ENSP51 ENSP51 15 1 read-write ENSP52 ENSP52 23 1 read-write ENSP53 ENSP53 31 1 read-write UVWIS50 UVWIS50 5 2 read-write UVWIS51 UVWIS51 13 2 read-write UVWIS52 UVWIS52 21 2 read-write UVWIS53 UVWIS53 29 2 read-write PSET6 AD PMD Trigger Program Register 6 0xB8 32 read-write n 0x0 0x0 AINSP60 AINSP60 0 5 read-write AINSP61 AINSP61 8 5 read-write AINSP62 AINSP62 16 5 read-write AINSP63 AINSP63 24 5 read-write ENSP60 ENSP60 7 1 read-write ENSP61 ENSP61 15 1 read-write ENSP62 ENSP62 23 1 read-write ENSP63 ENSP63 31 1 read-write UVWIS60 UVWIS60 5 2 read-write UVWIS61 UVWIS61 13 2 read-write UVWIS62 UVWIS62 21 2 read-write UVWIS63 UVWIS63 29 2 read-write PSET7 AD PMD Trigger Program Register 7 0xBC 32 read-write n 0x0 0x0 AINSP70 AINSP70 0 5 read-write AINSP71 AINSP71 8 5 read-write AINSP72 AINSP72 16 5 read-write AINSP73 AINSP73 24 5 read-write ENSP70 ENSP70 7 1 read-write ENSP71 ENSP71 15 1 read-write ENSP72 ENSP72 23 1 read-write ENSP73 ENSP73 31 1 read-write UVWIS70 UVWIS70 5 2 read-write UVWIS71 UVWIS71 13 2 read-write UVWIS72 UVWIS72 21 2 read-write UVWIS73 UVWIS73 29 2 read-write REG0 AD Conversion Result Register 0 0x140 32 read-only n 0x0 0x0 ADOVRF0 ADOVRF0 1 1 read-only ADOVRF_M0 ADOVRF_M0 29 1 read-only ADR0 ADR0 4 12 read-only ADRF0 ADRF0 0 1 read-only ADRF_M0 ADRF_M0 28 1 read-only ADR_M0 ADR_M0 16 12 read-only REG1 AD Conversion Result Register 1 0x144 32 read-only n 0x0 0x0 ADOVRF1 ADOVRF1 1 1 read-only ADOVRF_M1 ADOVRF_M1 29 1 read-only ADR1 ADR1 4 12 read-only ADRF1 ADRF1 0 1 read-only ADRF_M1 ADRF_M1 28 1 read-only ADR_M1 ADR_M1 16 12 read-only REG10 AD Conversion Result Register 10 0x168 32 read-only n 0x0 0x0 ADOVRF10 ADOVRF10 1 1 read-only ADOVRF_M10 ADOVRF_M10 29 1 read-only ADR10 ADR10 4 12 read-only ADRF10 ADRF10 0 1 read-only ADRF_M10 ADRF_M10 28 1 read-only ADR_M10 ADR_M10 16 12 read-only REG11 AD Conversion Result Register 11 0x16C 32 read-only n 0x0 0x0 ADOVRF11 ADOVRF11 1 1 read-only ADOVRF_M11 ADOVRF_M11 29 1 read-only ADR11 ADR11 4 12 read-only ADRF11 ADRF11 0 1 read-only ADRF_M11 ADRF_M11 28 1 read-only ADR_M11 ADR_M11 16 12 read-only REG12 AD Conversion Result Register 12 0x170 32 read-only n 0x0 0x0 ADOVRF12 ADOVRF12 1 1 read-only ADOVRF_M12 ADOVRF_M12 29 1 read-only ADR12 ADR12 4 12 read-only ADRF12 ADRF12 0 1 read-only ADRF_M12 ADRF_M12 28 1 read-only ADR_M12 ADR_M12 16 12 read-only REG13 AD Conversion Result Register 13 0x174 32 read-only n 0x0 0x0 ADOVRF13 ADOVRF13 1 1 read-only ADOVRF_M13 ADOVRF_M13 29 1 read-only ADR13 ADR13 4 12 read-only ADRF13 ADRF13 0 1 read-only ADRF_M13 ADRF_M13 28 1 read-only ADR_M13 ADR_M13 16 12 read-only REG14 AD Conversion Result Register 14 0x178 32 read-only n 0x0 0x0 ADOVRF14 ADOVRF14 1 1 read-only ADOVRF_M14 ADOVRF_M14 29 1 read-only ADR14 ADR14 4 12 read-only ADRF14 ADRF14 0 1 read-only ADRF_M14 ADRF_M14 28 1 read-only ADR_M14 ADR_M14 16 12 read-only REG15 AD Conversion Result Register 15 0x17C 32 read-only n 0x0 0x0 ADOVRF15 ADOVRF15 1 1 read-only ADOVRF_M15 ADOVRF_M15 29 1 read-only ADR15 ADR15 4 12 read-only ADRF15 ADRF15 0 1 read-only ADRF_M15 ADRF_M15 28 1 read-only ADR_M15 ADR_M15 16 12 read-only REG16 AD Conversion Result Register 16 0x180 32 read-only n 0x0 0x0 ADOVRF16 ADOVRF16 1 1 read-only ADOVRF_M16 ADOVRF_M16 29 1 read-only ADR16 ADR16 4 12 read-only ADRF16 ADRF16 0 1 read-only ADRF_M16 ADRF_M16 28 1 read-only ADR_M16 ADR_M16 16 12 read-only REG17 AD Conversion Result Register 17 0x184 32 read-only n 0x0 0x0 ADOVRF17 ADOVRF17 1 1 read-only ADOVRF_M17 ADOVRF_M17 29 1 read-only ADR17 ADR17 4 12 read-only ADRF17 ADRF17 0 1 read-only ADRF_M17 ADRF_M17 28 1 read-only ADR_M17 ADR_M17 16 12 read-only REG18 AD Conversion Result Register 18 0x188 32 read-only n 0x0 0x0 ADOVRF18 ADOVRF18 1 1 read-only ADOVRF_M18 ADOVRF_M18 29 1 read-only ADR18 ADR18 4 12 read-only ADRF18 ADRF18 0 1 read-only ADRF_M18 ADRF_M18 28 1 read-only ADR_M18 ADR_M18 16 12 read-only REG19 AD Conversion Result Register 19 0x18C 32 read-only n 0x0 0x0 ADOVRF19 ADOVRF19 1 1 read-only ADOVRF_M19 ADOVRF_M19 29 1 read-only ADR19 ADR19 4 12 read-only ADRF19 ADRF19 0 1 read-only ADRF_M19 ADRF_M19 28 1 read-only ADR_M19 ADR_M19 16 12 read-only REG2 AD Conversion Result Register 2 0x148 32 read-only n 0x0 0x0 ADOVRF2 ADOVRF2 1 1 read-only ADOVRF_M2 ADOVRF_M2 29 1 read-only ADR2 ADR2 4 12 read-only ADRF2 ADRF2 0 1 read-only ADRF_M2 ADRF_M2 28 1 read-only ADR_M2 ADR_M2 16 12 read-only REG20 AD Conversion Result Register 20 0x190 32 read-only n 0x0 0x0 ADOVRF20 ADOVRF20 1 1 read-only ADOVRF_M20 ADOVRF_M20 29 1 read-only ADR20 ADR20 4 12 read-only ADRF20 ADRF20 0 1 read-only ADRF_M20 ADRF_M20 28 1 read-only ADR_M20 ADR_M20 16 12 read-only REG21 AD Conversion Result Register 21 0x194 32 read-only n 0x0 0x0 ADOVRF21 ADOVRF21 1 1 read-only ADOVRF_M21 ADOVRF_M21 29 1 read-only ADR21 ADR21 4 12 read-only ADRF21 ADRF21 0 1 read-only ADRF_M21 ADRF_M21 28 1 read-only ADR_M21 ADR_M21 16 12 read-only REG22 AD Conversion Result Register 22 0x198 32 read-only n 0x0 0x0 ADOVRF22 ADOVRF22 1 1 read-only ADOVRF_M22 ADOVRF_M22 29 1 read-only ADR22 ADR22 4 12 read-only ADRF22 ADRF22 0 1 read-only ADRF_M22 ADRF_M22 28 1 read-only ADR_M22 ADR_M22 16 12 read-only REG23 AD Conversion Result Register 23 0x19C 32 read-only n 0x0 0x0 ADOVRF23 ADOVRF23 1 1 read-only ADOVRF_M23 ADOVRF_M23 29 1 read-only ADR23 ADR23 4 12 read-only ADRF23 ADRF23 0 1 read-only ADRF_M23 ADRF_M23 28 1 read-only ADR_M23 ADR_M23 16 12 read-only REG3 AD Conversion Result Register 3 0x14C 32 read-only n 0x0 0x0 ADOVRF3 ADOVRF3 1 1 read-only ADOVRF_M3 ADOVRF_M3 29 1 read-only ADR3 ADR3 4 12 read-only ADRF3 ADRF3 0 1 read-only ADRF_M3 ADRF_M3 28 1 read-only ADR_M3 ADR_M3 16 12 read-only REG4 AD Conversion Result Register 4 0x150 32 read-only n 0x0 0x0 ADOVRF4 ADOVRF4 1 1 read-only ADOVRF_M4 ADOVRF_M4 29 1 read-only ADR4 ADR4 4 12 read-only ADRF4 ADRF4 0 1 read-only ADRF_M4 ADRF_M4 28 1 read-only ADR_M4 ADR_M4 16 12 read-only REG5 AD Conversion Result Register 5 0x154 32 read-only n 0x0 0x0 ADOVRF5 ADOVRF5 1 1 read-only ADOVRF_M5 ADOVRF_M5 29 1 read-only ADR5 ADR5 4 12 read-only ADRF5 ADRF5 0 1 read-only ADRF_M5 ADRF_M5 28 1 read-only ADR_M5 ADR_M5 16 12 read-only REG6 AD Conversion Result Register 6 0x158 32 read-only n 0x0 0x0 ADOVRF6 ADOVRF6 1 1 read-only ADOVRF_M6 ADOVRF_M6 29 1 read-only ADR6 ADR6 4 12 read-only ADRF6 ADRF6 0 1 read-only ADRF_M6 ADRF_M6 28 1 read-only ADR_M6 ADR_M6 16 12 read-only REG7 AD Conversion Result Register 7 0x15C 32 read-only n 0x0 0x0 ADOVRF7 ADOVRF7 1 1 read-only ADOVRF_M7 ADOVRF_M7 29 1 read-only ADR7 ADR7 4 12 read-only ADRF7 ADRF7 0 1 read-only ADRF_M7 ADRF_M7 28 1 read-only ADR_M7 ADR_M7 16 12 read-only REG8 AD Conversion Result Register 8 0x160 32 read-only n 0x0 0x0 ADOVRF8 ADOVRF8 1 1 read-only ADOVRF_M8 ADOVRF_M8 29 1 read-only ADR8 ADR8 4 12 read-only ADRF8 ADRF8 0 1 read-only ADRF_M8 ADRF_M8 28 1 read-only ADR_M8 ADR_M8 16 12 read-only REG9 AD Conversion Result Register 9 0x164 32 read-only n 0x0 0x0 ADOVRF9 ADOVRF9 1 1 read-only ADOVRF_M9 ADOVRF_M9 29 1 read-only ADR9 ADR9 4 12 read-only ADRF9 ADRF9 0 1 read-only ADRF_M9 ADRF_M9 28 1 read-only ADR_M9 ADR_M9 16 12 read-only ST AD Status Register 0x8 32 read-only n 0x0 0x0 ADBF ADBF 7 1 read-only CNTF CNTF 3 1 read-only PMDF PMDF 0 1 read-only SNGF SNGF 2 1 read-only TRGF TRGF 1 1 read-only TSET0 AD General purpose Trigger Program Register 0 0xC0 32 read-write n 0x0 0x0 AINST0 AINST0 0 5 read-write ENINT0 ENINT0 7 1 read-write TRGS0 TRGS0 5 2 read-write TSET1 AD General purpose Trigger Program Register 1 0xC4 32 read-write n 0x0 0x0 AINST1 AINST1 0 5 read-write ENINT1 ENINT1 7 1 read-write TRGS1 TRGS1 5 2 read-write TSET10 AD General purpose Trigger Program Register 10 0xE8 32 read-write n 0x0 0x0 AINST10 AINST10 0 5 read-write ENINT10 ENINT10 7 1 read-write TRGS10 TRGS10 5 2 read-write TSET11 AD General purpose Trigger Program Register 11 0xEC 32 read-write n 0x0 0x0 AINST11 AINST11 0 5 read-write ENINT11 ENINT11 7 1 read-write TRGS11 TRGS11 5 2 read-write TSET12 AD General purpose Trigger Program Register 12 0xF0 32 read-write n 0x0 0x0 AINST12 AINST12 0 5 read-write ENINT12 ENINT12 7 1 read-write TRGS12 TRGS12 5 2 read-write TSET13 AD General purpose Trigger Program Register 13 0xF4 32 read-write n 0x0 0x0 AINST13 AINST13 0 5 read-write ENINT13 ENINT13 7 1 read-write TRGS13 TRGS13 5 2 read-write TSET14 AD General purpose Trigger Program Register 14 0xF8 32 read-write n 0x0 0x0 AINST14 AINST14 0 5 read-write ENINT14 ENINT14 7 1 read-write TRGS14 TRGS14 5 2 read-write TSET15 AD General purpose Trigger Program Register 15 0xFC 32 read-write n 0x0 0x0 AINST15 AINST15 0 5 read-write ENINT15 ENINT15 7 1 read-write TRGS15 TRGS15 5 2 read-write TSET16 AD General purpose Trigger Program Register 16 0x100 32 read-write n 0x0 0x0 AINST16 AINST16 0 5 read-write ENINT16 ENINT16 7 1 read-write TRGS16 TRGS16 5 2 read-write TSET17 AD General purpose Trigger Program Register 17 0x104 32 read-write n 0x0 0x0 AINST17 AINST17 0 5 read-write ENINT17 ENINT17 7 1 read-write TRGS17 TRGS17 5 2 read-write TSET18 AD General purpose Trigger Program Register 18 0x108 32 read-write n 0x0 0x0 AINST18 AINST18 0 5 read-write ENINT18 ENINT18 7 1 read-write TRGS18 TRGS18 5 2 read-write TSET19 AD General purpose Trigger Program Register 19 0x10C 32 read-write n 0x0 0x0 AINST19 AINST19 0 5 read-write ENINT19 ENINT19 7 1 read-write TRGS19 TRGS19 5 2 read-write TSET2 AD General purpose Trigger Program Register 2 0xC8 32 read-write n 0x0 0x0 AINST2 AINST2 0 5 read-write ENINT2 ENINT2 7 1 read-write TRGS2 TRGS2 5 2 read-write TSET20 AD General purpose Trigger Program Register 20 0x110 32 read-write n 0x0 0x0 AINST20 AINST20 0 5 read-write ENINT20 ENINT20 7 1 read-write TRGS20 TRGS20 5 2 read-write TSET21 AD General purpose Trigger Program Register 21 0x114 32 read-write n 0x0 0x0 AINST21 AINST21 0 5 read-write ENINT21 ENINT21 7 1 read-write TRGS21 TRGS21 5 2 read-write TSET22 AD General purpose Trigger Program Register 22 0x118 32 read-write n 0x0 0x0 AINST22 AINST22 0 5 read-write ENINT22 ENINT22 7 1 read-write TRGS22 TRGS22 5 2 read-write TSET23 AD General purpose Trigger Program Register 23 0x11C 32 read-write n 0x0 0x0 AINST23 AINST23 0 5 read-write ENINT23 ENINT23 7 1 read-write TRGS23 TRGS23 5 2 read-write TSET3 AD General purpose Trigger Program Register 3 0xCC 32 read-write n 0x0 0x0 AINST3 AINST3 0 5 read-write ENINT3 ENINT3 7 1 read-write TRGS3 TRGS3 5 2 read-write TSET4 AD General purpose Trigger Program Register 4 0xD0 32 read-write n 0x0 0x0 AINST4 AINST4 0 5 read-write ENINT4 ENINT4 7 1 read-write TRGS4 TRGS4 5 2 read-write TSET5 AD General purpose Trigger Program Register 5 0xD4 32 read-write n 0x0 0x0 AINST5 AINST5 0 5 read-write ENINT5 ENINT5 7 1 read-write TRGS5 TRGS5 5 2 read-write TSET6 AD General purpose Trigger Program Register 6 0xD8 32 read-write n 0x0 0x0 AINST6 AINST6 0 5 read-write ENINT6 ENINT6 7 1 read-write TRGS6 TRGS6 5 2 read-write TSET7 AD General purpose Trigger Program Register 7 0xDC 32 read-write n 0x0 0x0 AINST7 AINST7 0 5 read-write ENINT7 ENINT7 7 1 read-write TRGS7 TRGS7 5 2 read-write TSET8 AD General purpose Trigger Program Register 8 0xE0 32 read-write n 0x0 0x0 AINST8 AINST8 0 5 read-write ENINT8 ENINT8 7 1 read-write TRGS8 TRGS8 5 2 read-write TSET9 AD General purpose Trigger Program Register 9 0xE4 32 read-write n 0x0 0x0 AINST9 AINST9 0 5 read-write ENINT9 ENINT9 7 1 read-write TRGS9 TRGS9 5 2 read-write AMP Gain Op-AMP (AMP) AMP 0x0 0x0 0xC registers n CTLA AMP control register A 0x0 32 read-write n 0x0 0x0 AMPEN AMPEN 0 1 read-write AMPGAIN AMPGAIN 1 4 read-write CTLB AMP control register B 0x4 32 read-write n 0x0 0x0 AMPEN AMPEN 0 1 read-write AMPGAIN AMPGAIN 1 4 read-write CTLC AMP control register C 0x8 32 read-write n 0x0 0x0 AMPEN AMPEN 0 1 read-write AMPGAIN AMPGAIN 1 4 read-write CG Clock Control and Operation Mode (CG) CG 0x0 0x0 0x10 registers n 0x10 0x10 reserved n 0x20 0x4 registers n 0x24 0xC reserved n 0x30 0x4 registers n 0x34 0x14 reserved n 0x48 0xC registers n 0x54 0x4 reserved n 0x58 0x8 registers n FCEN FC Supply Stop Register 0x58 32 read-write n 0x0 0x0 FCIPEN23 FCIPEN23 23 1 read-write FCIPEN26 FCIPEN26 26 1 read-write FCIPEN27 FCIPEN27 27 1 read-write FSYSENA High fsys Supply Stop Register A 0x50 32 read-write n 0x0 0x0 IPENA00 IPENA00 0 1 read-write IPENA01 IPENA01 1 1 read-write FSYSMENA Middle fsys Supply Stop Register A 0x48 32 read-write n 0x0 0x0 IPMENA00 IPMENA00 0 1 read-write IPMENA01 IPMENA01 1 1 read-write IPMENA02 IPMENA02 2 1 read-write IPMENA04 IPMENA04 4 1 read-write IPMENA05 IPMENA05 5 1 read-write IPMENA06 IPMENA06 6 1 read-write IPMENA07 IPMENA07 7 1 read-write IPMENA09 IPMENA09 9 1 read-write IPMENA10 IPMENA10 10 1 read-write IPMENA16 IPMENA16 16 1 read-write IPMENA19 IPMENA19 19 1 read-write IPMENA21 IPMENA21 21 1 read-write IPMENA22 IPMENA22 22 1 read-write IPMENA23 IPMENA23 23 1 read-write IPMENA25 IPMENA25 25 1 read-write IPMENA28 IPMENA28 28 1 read-write IPMENA29 IPMENA29 29 1 read-write IPMENA30 IPMENA30 30 1 read-write IPMENA31 IPMENA31 31 1 read-write FSYSMENB Middle fsys Supply Stop Register B 0x4C 32 read-write n 0x0 0x0 IPMENB00 IPMENB00 0 1 read-write IPMENB01 IPMENB01 1 1 read-write IPMENB02 IPMENB02 2 1 read-write IPMENB03 IPMENB03 3 1 read-write IPMENB05 IPMENB05 5 1 read-write IPMENB09 IPMENB09 9 1 read-write IPMENB12 IPMENB12 12 1 read-write IPMENB13 IPMENB13 13 1 read-write IPMENB14 IPMENB14 14 1 read-write IPMENB15 IPMENB15 15 1 read-write IPMENB16 IPMENB16 16 1 read-write IPMENB17 IPMENB17 17 1 read-write IPMENB25 IPMENB25 25 1 read-write IPMENB29 IPMENB29 29 1 read-write IPMENB31 IPMENB31 31 1 read-write OSCCR Oscillation Control Register 0x4 32 read-write n 0x0 0x0 EOSCEN EOSCEN 1 2 read-write IHOSC1EN IHOSC1EN 0 1 read-write IHOSC1F IHOSC1F 16 1 read-only IHOSC2F IHOSC2F 19 1 read-only OSCF OSCF 9 1 read-only OSCSEL OSCSEL 8 1 read-write PLL0SEL PLL Selection Register 0 0x20 32 read-write n 0x0 0x0 PLL0ON PLL0ON 0 1 read-write PLL0SEL PLL0SEL 1 1 read-write PLL0SET PLL0SET 8 24 read-write PLL0ST PLL0ST 2 1 read-only PROTECT Protect Register 0x0 32 read-write n 0x0 0x0 PROTECT PROTECT 0 8 read-write SPCLKEN ADC_TRACE Clock Supply Stop Register 0x5C 32 read-write n 0x0 0x0 ADCKEN0 ADCKEN0 16 1 read-write ADCKEN1 ADCKEN1 17 1 read-write ADCKEN2 ADCKEN2 18 1 read-write TRCKEN TRCKEN 0 1 read-write STBYCR Standby Control Register 0xC 32 read-write n 0x0 0x0 STBY STBY 0 2 read-write SYSCR System Clock Control Register 0x8 32 read-write n 0x0 0x0 GEAR GEAR 0 3 read-write GEARST GEARST 16 3 read-only MCKSEL MCKSEL 6 2 read-write MCKSELGST MCKSELGST 22 2 read-only PRCK PRCK 8 4 read-write PRCKST PRCKST 24 4 read-only WUPHCR High speed OSC Warming-up Register 0x30 32 read-write n 0x0 0x0 WUCLK WUCLK 8 1 read-write WUEF WUEF 1 1 read-only WUON WUON 0 1 write-only WUPT WUPT 16 16 read-write CRC CRC Calculation Circuit (CRC) CRC 0x0 0x0 0x4 registers n 0x14 0x4 registers n 0x18 0x14 reserved n 0x2C 0x4 registers n 0x4 0x10 reserved n CLC CRC calculation result register 0x2C 32 read-write n 0x0 0x0 CRCCLC CRCCLC 0 32 read-write DIN CRC input data register 0x0 32 read-write n 0x0 0x0 CRCDIN CRCDIN 0 32 read-write TYP CRC data type register 0x14 32 read-write n 0x0 0x0 CFMT CFMT 2 2 read-write DBIT DBIT 0 2 read-write DMA Direct Memory Access Controller (DMAC) DMA 0x0 0x0 0x10 registers n 0x10 0x4 reserved n 0x14 0x2C registers n 0x40 0xC reserved n 0x4C 0x4 registers n ALTCTRLBASEPTR DMA Channel Alternate Control Data Base Pointer Register 0xC 32 read-only n 0x0 0x0 ALT_CTRL_BASE_PTR ALT_CTRL_BASE_PTR 0 32 read-only CFG DMA Configuration Register 0x4 32 write-only n 0x0 0x0 MASTER_ENABLE MASTER_ENABLE 0 1 write-only CHNLENABLECLR DMA Channel Enable Clear Register 0x2C 32 write-only n 0x0 0x0 CHNL_ENABLE_CLR CHNL_ENABLE_CLR 0 32 write-only CHNLENABLESET DMA Channel Enable Set Register 0x28 32 read-write n 0x0 0x0 CHNL_ENABLE_SET CHNL_ENABLE_SET 0 32 read-write CHNLPRIALTCLR DMA Channel Primary-Alternate Clear Register 0x34 32 write-only n 0x0 0x0 CHNL_PRI_ALT_CLR CHNL_PRI_ALT_CLR 0 32 write-only CHNLPRIALTSET DMA Channel Primary-Alternate Set Register 0x30 32 read-write n 0x0 0x0 CHNL_PRI_ALT_SET CHNL_PRI_ALT_SET 0 32 read-write CHNLPRIORITYCLR DMA Channel Priority Clear Register 0x3C 32 write-only n 0x0 0x0 CHNL_PRIORITY_CLR CHNL_PRIORITY_CLR 0 32 write-only CHNLPRIORITYSET DMA Channel Priority Set Register 0x38 32 read-write n 0x0 0x0 CHNL_PRIORITY_SET CHNL_PRIORITY_SET 0 32 read-write CHNLREQMASKCLR DMA Channel Request Mask Clear Register 0x24 32 write-only n 0x0 0x0 CHNL_REQ_MASK_CLR CHNL_REQ_MASK_CLR 0 32 write-only CHNLREQMASKSET DMA Channel Request Mask Set Register 0x20 32 read-write n 0x0 0x0 CHNL_REQ_MASK_SET CHNL_REQ_MASK_SET 0 32 read-write CHNLSWREQUEST DMA Channel Software Request Register 0x14 32 write-only n 0x0 0x0 CHNL_SW_REQUEST CHNL_SW_REQUEST 0 32 write-only CHNLUSEBURSTCLR DMA Channel Useburst Clear Register 0x1C 32 write-only n 0x0 0x0 CHNL_USEBURST_CLR CHNL_USEBURST_CLR 0 32 write-only CHNLUSEBURSTSET DMA Channel Useburst Set Register 0x18 32 read-write n 0x0 0x0 CHNL_USEBURST_SET CHNL_USEBURST_SET 0 32 read-write CTRLBASEPTR DMA Control Data Base Pointer Register 0x8 32 read-write n 0x0 0x0 CTRL_BASE_PTR CTRL_BASE_PTR 10 22 read-write ERRCLR DMA Bus Error Clear Register 0x4C 32 read-write n 0x0 0x0 ERR_CLR ERR_CLR 0 1 read-write STATUS DMA Status Register 0x0 32 read-only n 0x0 0x0 MASTER_ENABLE MASTER_ENABLE 0 1 read-only DNFA Digital Noise Filter (DNF) DNFA 0x0 0x0 0x8 registers n CKCR DNF clock Control register 0x0 32 read-write n 0x0 0x0 NFCKS NFCKS 0 3 read-write ENCR DNF Enable register 0x4 32 read-write n 0x0 0x0 NFEN0 NFEN0 0 1 read-write NFEN1 NFEN1 1 1 read-write NFEN10 NFEN10 10 1 read-write NFEN11 NFEN11 11 1 read-write NFEN12 NFEN12 12 1 read-write NFEN13 NFEN13 13 1 read-write NFEN14 NFEN14 14 1 read-write NFEN15 NFEN15 15 1 read-write NFEN2 NFEN2 2 1 read-write NFEN3 NFEN3 3 1 read-write NFEN4 NFEN4 4 1 read-write NFEN5 NFEN5 5 1 read-write NFEN6 NFEN6 6 1 read-write NFEN7 NFEN7 7 1 read-write NFEN8 NFEN8 8 1 read-write NFEN9 NFEN9 9 1 read-write DNFB Digital Noise Filter (DNF) DNFA 0x0 0x0 0x8 registers n CKCR DNF clock Control register 0x0 32 read-write n 0x0 0x0 NFCKS NFCKS 0 3 read-write ENCR DNF Enable register 0x4 32 read-write n 0x0 0x0 NFEN0 NFEN0 0 1 read-write NFEN1 NFEN1 1 1 read-write NFEN10 NFEN10 10 1 read-write NFEN11 NFEN11 11 1 read-write NFEN12 NFEN12 12 1 read-write NFEN13 NFEN13 13 1 read-write NFEN14 NFEN14 14 1 read-write NFEN15 NFEN15 15 1 read-write NFEN2 NFEN2 2 1 read-write NFEN3 NFEN3 3 1 read-write NFEN4 NFEN4 4 1 read-write NFEN5 NFEN5 5 1 read-write NFEN6 NFEN6 6 1 read-write NFEN7 NFEN7 7 1 read-write NFEN8 NFEN8 8 1 read-write NFEN9 NFEN9 9 1 read-write EI2C I2C Interface Version A (EI2C) EI2C 0x0 0x0 0x38 registers n AAR1 EI2C First Slave Address Register 0x28 32 read-write n 0x0 0x0 SA1 SA1 1 10 read-write SA1E SA1E 0 1 read-write SAFS1 SAFS1 15 1 read-write AAR2 EI2C Second Slave Address Register 0x2C 32 read-write n 0x0 0x0 SA2 SA2 1 10 read-write SA2E SA2E 0 1 read-write SAFS2 SAFS2 15 1 read-write ACR0 EI2C Control Register 0 0x8 32 read-write n 0x0 0x0 ALE ALE 0 1 read-write DNF DNF 12 3 read-write ESPE ESPE 4 1 read-write ESTE ESTE 3 1 read-write GCE GCE 1 1 read-write NACKE NACKE 2 1 read-write NFSEL NFSEL 11 1 read-write TOE TOE 8 1 read-write TOPER TOPER 9 2 read-write ACR1 EI2C Control Register 1 0xC 32 read-write n 0x0 0x0 ACKSEL ACKSEL 3 1 read-write ACKWAIT ACKWAIT 4 1 read-write OMC OMC 10 1 read-write RS RS 1 1 read-write SP SP 2 1 read-write ST ST 0 1 read-write ADBRR EI2C Receive Data Buffer Register 0x14 32 read-only n 0x0 0x0 DBR DBR 0 8 read-only ADBRT EI2C Transmit Data Buffer Register 0x10 32 read-write n 0x0 0x0 DBT DBT 0 8 read-write AEN EI2C Enable Register 0x4 32 read-write n 0x0 0x0 I2CM I2CM 0 1 read-write AIE EI2C Interrupt_DMA Setting Register 0x30 32 read-write n 0x0 0x0 DMARX DMARX 15 1 read-write DMATX DMATX 14 1 read-write INTALE INTALE 7 1 read-write INTASE INTASE 9 1 read-write INTESPE INTESPE 12 1 read-write INTESTE INTESTE 11 1 read-write INTGCE INTGCE 8 1 read-write INTNACKE INTNACKE 6 1 read-write INTRSE INTRSE 1 1 read-write INTSPE INTSPE 2 1 read-write INTSTE INTSTE 0 1 read-write INTTOE INTTOE 13 1 read-write APM EI2C Bus Terminal Monitor Register 0x34 32 read-only n 0x0 0x0 SCL SCL 0 1 read-only SCLOUT SCLOUT 2 1 read-only SDA SDA 1 1 read-only SDAOUT SDAOUT 3 1 read-only APRS EI2C Prescaler Clock Setting Register 0x20 32 read-write n 0x0 0x0 PRS PRS 0 6 read-write ARST EI2C Reset Register 0x0 32 read-write n 0x0 0x0 SWRES SWRES 0 2 write-only ASCL EI2C SCL Width Setting Register 0x24 32 read-write n 0x0 0x0 SCLH SCLH 0 8 read-write SCLL SCLL 8 8 read-write ASR0 EI2C Status Register 0 0x18 32 read-only n 0x0 0x0 ACKF ACKF 0 1 read-only BB BB 1 1 read-only BC BC 4 4 read-only MST MST 3 1 read-only TRX TRX 2 1 read-only ASR1 EI2C Status Register 1 0x1C 32 read-write n 0x0 0x0 AAS1 AAS1 9 1 read-write AAS2 AAS2 10 1 read-write AL AL 7 1 read-write ESP ESP 12 1 read-write EST EST 11 1 read-write GC GC 8 1 read-write NACK NACK 6 1 read-write RBF RBF 5 1 read-write RSCF RSCF 1 1 read-write SPCF SPCF 2 1 read-write STCF STCF 0 1 read-write TBE TBE 4 1 read-write TEND TEND 3 1 read-write TOERR TOERR 13 1 read-write FC Flash Memory Interface (FC) FC 0x0 0x0 0x10 reserved n 0x10 0xC registers n 0x100 0x8 registers n 0x108 0x38 reserved n 0x140 0x4 registers n 0x144 0x4 reserved n 0x148 0x14 registers n 0x1C 0x4 reserved n 0x20 0x4 registers n 0x24 0xC reserved n 0x30 0x8 registers n 0x38 0x10 reserved n 0x48 0x4 registers n 0x4C 0x4 reserved n 0x50 0x8 registers n 0x58 0x10 reserved n 0x68 0x4 registers n 0x6C 0x94 reserved n AREASEL Flash Area Selection Register 0x140 32 read-write n 0x0 0x0 AREA0 AREA0 0 3 read-write AREA4 AREA4 16 3 read-write SSF0 SSF0 26 1 read-only SSF4 SSF4 30 1 read-only BNKCR Flash Bank Change Register 0x150 32 read-write n 0x0 0x0 BANK0 BANK0 0 3 read-write BUFDISCLR Flash Buffer Disable and Clear Register 0x158 32 read-write n 0x0 0x0 BUFDISCLR BUFDISCLR 0 3 read-write CR Flash Control Register 0x148 32 read-write n 0x0 0x0 WEABORT WEABORT 0 3 read-write FCACCR Flash Access Control Register 0x154 32 read-write n 0x0 0x0 FCLC FCLC 0 3 read-write FDLC FDLC 8 3 read-write KCR Flash Key Code Register 0x18 32 write-only n 0x0 0x0 KEYCODE KEYCODE 0 32 write-only PMR0 Flash Protect Mask Register 0 0x50 32 read-write n 0x0 0x0 PM0 PM0 0 1 read-write PM1 PM1 1 1 read-write PM2 PM2 2 1 read-write PM3 PM3 3 1 read-write PM4 PM4 4 1 read-write PM5 PM5 5 1 read-write PM6 PM6 6 1 read-write PM7 PM7 7 1 read-write PMR1 Flash Protect Mask Register 1 0x54 32 read-write n 0x0 0x0 MSK1 MSK1 1 1 read-write MSK10 MSK10 10 1 read-write MSK11 MSK11 11 1 read-write MSK12 MSK12 12 1 read-write MSK13 MSK13 13 1 read-write MSK14 MSK14 14 1 read-write MSK15 MSK15 15 1 read-write MSK2 MSK2 2 1 read-write MSK3 MSK3 3 1 read-write MSK4 MSK4 4 1 read-write MSK5 MSK5 5 1 read-write MSK6 MSK6 6 1 read-write MSK7 MSK7 7 1 read-write MSK8 MSK8 8 1 read-write MSK9 MSK9 9 1 read-write PMR6 Flash Protect Mask Register 6 0x68 32 read-write n 0x0 0x0 DMSK0 DMSK0 0 1 read-write DMSK1 DMSK1 1 1 read-write DMSK2 DMSK2 2 1 read-write DMSK3 DMSK3 3 1 read-write DMSK4 DMSK4 4 1 read-write DMSK5 DMSK5 5 1 read-write DMSK6 DMSK6 6 1 read-write DMSK7 DMSK7 7 1 read-write PSR0 Flash Protect Status Register 0 0x30 32 read-only n 0x0 0x0 PG0 PG0 0 1 read-only PG1 PG1 1 1 read-only PG2 PG2 2 1 read-only PG3 PG3 3 1 read-only PG4 PG4 4 1 read-only PG5 PG5 5 1 read-only PG6 PG6 6 1 read-only PG7 PG7 7 1 read-only PSR1 Flash Protect Status Register 1 0x34 32 read-only n 0x0 0x0 BLK1 BLK1 1 1 read-only BLK10 BLK10 10 1 read-only BLK11 BLK11 11 1 read-only BLK12 BLK12 12 1 read-only BLK13 BLK13 13 1 read-only BLK14 BLK14 14 1 read-only BLK15 BLK15 15 1 read-only BLK2 BLK2 2 1 read-only BLK3 BLK3 3 1 read-only BLK4 BLK4 4 1 read-only BLK5 BLK5 5 1 read-only BLK6 BLK6 6 1 read-only BLK7 BLK7 7 1 read-only BLK8 BLK8 8 1 read-only BLK9 BLK9 9 1 read-only PSR6 Flash Protect Status Register 6 0x48 32 read-only n 0x0 0x0 DBLK0 DBLK0 0 1 read-only DBLK1 DBLK1 1 1 read-only DBLK2 DBLK2 2 1 read-only DBLK3 DBLK3 3 1 read-only DBLK4 DBLK4 4 1 read-only DBLK5 DBLK5 5 1 read-only DBLK6 DBLK6 6 1 read-only DBLK7 DBLK7 7 1 read-only SBMR Flash Security Bit Mask Register 0x10 32 read-write n 0x0 0x0 SMB SMB 0 1 read-write SR0 Flash Status Register 0 0x20 32 read-only n 0x0 0x0 RDYBSY RDYBSY 0 1 read-only RDYBSY0 RDYBSY0 8 1 read-only RDYBSY2 RDYBSY2 10 1 read-only SR1 Flash Status Register 1 0x100 32 read-only n 0x0 0x0 WEABORT WEABORT 24 1 read-only SSR Flash Security Status Register 0x14 32 read-only n 0x0 0x0 SEC SEC 0 1 read-only STSCLR Flash Status Clear Register 0x14C 32 read-write n 0x0 0x0 WEABORT WEABORT 0 3 read-write SWPSR Flash Memory SWAP Status Register 0x104 32 read-only n 0x0 0x0 SIZE SIZE 8 6 read-only SWP SWP 0 2 read-only I2C I2C Interface (I2C) I2C 0x0 0x0 0x28 registers n AR Bus address Register 0x8 32 read-write n 0x0 0x0 ALS ALS 0 1 read-write SA SA 1 7 read-write AR2 Second Slave address register 0x24 32 read-write n 0x0 0x0 SA2 SA2 1 7 read-write SA2EN SA2EN 0 1 read-write CR1 I2C Control Register 1 0x0 32 read-write n 0x0 0x0 ACK ACK 4 1 read-write BC BC 5 3 read-write NOACK NOACK 3 1 read-write SCK SCK 0 3 read-write CR2 Control Register 2 0xC 32 write-only n 0x0 0x0 BB BB 5 1 write-only I2CM I2CM 3 1 write-only MST MST 7 1 write-only PIN PIN 4 1 write-only SWRES SWRES 0 2 write-only TRX TRX 6 1 write-only DBR Data Buffer Register 0x4 32 read-write n 0x0 0x0 DB DB 0 8 read-write IE Interrupt Enable Register 0x14 32 read-write n 0x0 0x0 DMARI2CRX DMARI2CRX 4 1 read-write DMARI2CTX DMARI2CTX 5 1 read-write INTI2C INTI2C 0 1 read-write INTI2CAL INTI2CAL 1 1 read-write INTI2CBF INTI2CBF 2 1 read-write INTNACK INTNACK 3 1 read-write SELPINCD SELPINCD 6 1 read-write OP Optional Function register 0x1C 32 read-write n 0x0 0x0 DISAL DISAL 7 1 read-write GCDI GCDI 2 1 read-write MFACK MFACK 0 1 read-write NFSEL NFSEL 4 1 read-write RSTA RSTA 3 1 read-write SA2ST SA2ST 6 1 read-only SAST SAST 5 1 read-only SREN SREN 1 1 read-write PM Bus Monitor register 0x20 32 read-only n 0x0 0x0 SCL SCL 0 1 read-only SDA SDA 1 1 read-only PRS Prescaler clock setting Register 0x10 32 read-write n 0x0 0x0 PRSCK PRSCK 0 5 read-write SR Status Register 0xC 32 read-only n 0x0 0x0 AAS AAS 2 1 read-only AD0 AD0 1 1 read-only AL AL 3 1 read-only BB BB 5 1 read-only LRB LRB 0 1 read-only MST MST 7 1 read-only PIN PIN 4 1 read-only TRX TRX 6 1 read-only ST Interrupt Register 0x18 32 read-write n 0x0 0x0 I2C I2C 0 1 read-write I2CAL I2CAL 1 1 read-write I2CBF I2CBF 2 1 read-write NACK NACK 3 1 read-write IA Interrupt control A Register (IA) IA 0x0 0x0 0x1 registers n NIC00 Non Maskable Interrupt Control Register(A) 00 0x0 8 read-write n 0x0 0x0 INTNCLR INTNCLR 7 1 write-only INTNFLG INTNFLG 5 1 read-only IB Interrupt Control B Register (IB) IB 0x0 0x0 0x10 reserved n 0x10 0x1 registers n 0x11 0x4F reserved n 0x60 0x25 registers n 0x85 0x3 reserved n 0x88 0x2 registers n 0x8A 0x2 reserved n 0x8C 0x1 registers n 0x8D 0x4 reserved n 0x91 0x2 registers n 0x93 0x4 reserved n 0x97 0x1 registers n IMC000 Interrupt Mode Control Register(B) 000 0x60 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC001 Interrupt Mode Control Register(B) 001 0x61 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC002 Interrupt Mode Control Register(B) 002 0x62 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC003 Interrupt Mode Control Register(B) 003 0x63 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC004 Interrupt Mode Control Register(B) 004 0x64 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC005 Interrupt Mode Control Register(B) 005 0x65 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC006 Interrupt Mode Control Register(B) 006 0x66 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC007 Interrupt Mode Control Register(B) 007 0x67 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC008 Interrupt Mode Control Register(B) 008 0x68 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC009 Interrupt Mode Control Register(B) 009 0x69 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC010 Interrupt Mode Control Register(B) 010 0x6A 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC011 Interrupt Mode Control Register(B) 011 0x6B 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC012 Interrupt Mode Control Register(B) 012 0x6C 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC013 Interrupt Mode Control Register(B) 013 0x6D 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC014 Interrupt Mode Control Register(B) 014 0x6E 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC015 Interrupt Mode Control Register(B) 015 0x6F 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC016 Interrupt Mode Control Register(B) 016 0x70 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC017 Interrupt Mode Control Register(B) 017 0x71 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC018 Interrupt Mode Control Register(B) 018 0x72 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC019 Interrupt Mode Control Register(B) 019 0x73 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC020 Interrupt Mode Control Register(B) 020 0x74 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC021 Interrupt Mode Control Register(B) 021 0x75 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC022 Interrupt Mode Control Register(B) 022 0x76 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC023 Interrupt Mode Control Register(B) 023 0x77 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC024 Interrupt Mode Control Register(B) 024 0x78 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC025 Interrupt Mode Control Register(B) 025 0x79 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC026 Interrupt Mode Control Register(B) 026 0x7A 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC027 Interrupt Mode Control Register(B) 027 0x7B 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC028 Interrupt Mode Control Register(B) 028 0x7C 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC029 Interrupt Mode Control Register(B) 029 0x7D 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC030 Interrupt Mode Control Register(B) 030 0x7E 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC031 Interrupt Mode Control Register(B) 031 0x7F 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC032 Interrupt Mode Control Register(B) 032 0x80 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC033 Interrupt Mode Control Register(B) 033 0x81 8 read-write n 0x0 0x0 INTEN INTEN 0 1 read-write INTMODE INTMODE 1 3 read-write INTNCLR INTNCLR 7 1 write-only INTNFLG INTNFLG 5 1 read-only INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC034 Interrupt Mode Control Register(B) 034 0x82 8 read-write n 0x0 0x0 INTEN INTEN 0 1 read-write INTMODE INTMODE 1 3 read-write INTNCLR INTNCLR 7 1 write-only INTNFLG INTNFLG 5 1 read-only INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC035 Interrupt Mode Control Register(B) 035 0x83 8 read-write n 0x0 0x0 INTEN INTEN 0 1 read-write INTMODE INTMODE 1 3 read-write INTNCLR INTNCLR 7 1 write-only INTNFLG INTNFLG 5 1 read-only INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC036 Interrupt Mode Control Register(B) 036 0x84 8 read-write n 0x0 0x0 INTEN INTEN 0 1 read-write INTMODE INTMODE 1 3 read-write INTNCLR INTNCLR 7 1 write-only INTNFLG INTNFLG 5 1 read-only INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC040 Interrupt Mode Control Register(B) 040 0x88 8 read-write n 0x0 0x0 INTEN INTEN 0 1 read-write INTMODE INTMODE 1 3 read-write INTNCLR INTNCLR 7 1 write-only INTNFLG INTNFLG 5 1 read-only INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC041 Interrupt Mode Control Register(B) 041 0x89 8 read-write n 0x0 0x0 INTEN INTEN 0 1 read-write INTMODE INTMODE 1 3 read-write INTNCLR INTNCLR 7 1 write-only INTNFLG INTNFLG 5 1 read-only INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC044 Interrupt Mode Control Register(B) 044 0x8C 8 read-write n 0x0 0x0 INTEN INTEN 0 1 read-write INTMODE INTMODE 1 3 read-write INTNCLR INTNCLR 7 1 write-only INTNFLG INTNFLG 5 1 read-only INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC049 Interrupt Mode Control Register(B) 049 0x91 8 read-write n 0x0 0x0 INTEN INTEN 0 1 read-write INTMODE INTMODE 1 3 read-write INTNCLR INTNCLR 7 1 write-only INTNFLG INTNFLG 5 1 read-only INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC050 Interrupt Mode Control Register(B) 050 0x92 8 read-write n 0x0 0x0 INTEN INTEN 0 1 read-write INTMODE INTMODE 1 3 read-write INTNCLR INTNCLR 7 1 write-only INTNFLG INTNFLG 5 1 read-only INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMC055 Interrupt Mode Control Register(B) 055 0x97 8 read-write n 0x0 0x0 INTEN INTEN 0 1 read-write INTMODE INTMODE 1 3 read-write INTNCLR INTNCLR 7 1 write-only INTNFLG INTNFLG 5 1 read-only INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only NIC00 Non maskable Interrupt Control Register(B) 00 0x10 8 read-write n 0x0 0x0 INTPCLR INTPCLR 6 1 write-only INTPFLG INTPFLG 4 1 read-only IMN Interrupt Monitor Register (IMN) IMN 0x0 0x0 0x4 registers n 0x4 0x8 reserved n 0xC 0x8 registers n FLG3 Interrupt Monitor Flag 3 (096 - 127) 0xC 32 read-only n 0x0 0x0 INT096FLG INT096FLG 0 1 read-only INT097FLG INT097FLG 1 1 read-only INT098FLG INT098FLG 2 1 read-only INT099FLG INT099FLG 3 1 read-only INT100FLG INT100FLG 4 1 read-only INT101FLG INT101FLG 5 1 read-only INT102FLG INT102FLG 6 1 read-only INT103FLG INT103FLG 7 1 read-only INT104FLG INT104FLG 8 1 read-only INT105FLG INT105FLG 9 1 read-only INT106FLG INT106FLG 10 1 read-only INT107FLG INT107FLG 11 1 read-only INT108FLG INT108FLG 12 1 read-only INT109FLG INT109FLG 13 1 read-only INT110FLG INT110FLG 14 1 read-only INT111FLG INT111FLG 15 1 read-only INT112FLG INT112FLG 16 1 read-only INT113FLG INT113FLG 17 1 read-only INT114FLG INT114FLG 18 1 read-only INT115FLG INT115FLG 19 1 read-only INT116FLG INT116FLG 20 1 read-only INT117FLG INT117FLG 21 1 read-only INT118FLG INT118FLG 22 1 read-only INT119FLG INT119FLG 23 1 read-only INT120FLG INT120FLG 24 1 read-only INT121FLG INT121FLG 25 1 read-only INT122FLG INT122FLG 26 1 read-only INT123FLG INT123FLG 27 1 read-only INT124FLG INT124FLG 28 1 read-only INT125FLG INT125FLG 29 1 read-only INT126FLG INT126FLG 30 1 read-only INT127FLG INT127FLG 31 1 read-only FLG4 Interrupt Monitor Flag 4 (128 - 159) 0x10 32 read-only n 0x0 0x0 INT128FLG INT128FLG 0 1 read-only INT129FLG INT129FLG 1 1 read-only INT130FLG INT130FLG 2 1 read-only INT131FLG INT131FLG 3 1 read-only INT132FLG INT132FLG 4 1 read-only INT136FLG INT136FLG 8 1 read-only INT137FLG INT137FLG 9 1 read-only INT140FLG INT140FLG 12 1 read-only INT145FLG INT145FLG 17 1 read-only INT146FLG INT146FLG 18 1 read-only INT151FLG INT151FLG 23 1 read-only FLGNMI NMI Interrupt Monitor Flag 0x0 32 read-only n 0x0 0x0 INT000FLG INT000FLG 0 1 read-only INT016FLG INT016FLG 16 1 read-only LVD Voltage detection circuit (LVD) LVD 0x0 0x0 0x1 registers n CR LVD Control register 0x0 8 read-write n 0x0 0x0 EN EN 0 1 read-write LVL LVL 4 3 read-write OUTEN OUTEN 1 1 read-write SEL SEL 2 1 read-write ST ST 7 1 read-only OFD Oscillation Frequency Detector (OFD) OFD 0x0 0x0 0x24 registers n CR1 OFD Control Register 1 0x0 32 read-write n 0x0 0x0 OFDWEN OFDWEN 0 8 read-write CR2 OFD Control Register 2 0x4 32 read-write n 0x0 0x0 OFDEN OFDEN 0 8 read-write MN0 OFD Lower Detection Frequency Setting Register0 0x8 32 read-write n 0x0 0x0 OFDMN0 OFDMN0 0 12 read-write MN1 OFD Lower Detection Frequency Setting Register1 0xC 32 read-write n 0x0 0x0 OFDMN1 OFDMN1 0 12 read-write MON OFD External high frequency oscillation clock monitor register 0x20 32 read-write n 0x0 0x0 OFDMON OFDMON 0 1 read-write MX0 OFD Higher Detection Frequency Setting Register0 0x10 32 read-write n 0x0 0x0 OFDMX0 OFDMX0 0 12 read-write MX1 OFD Higher Detection Frequency Setting Register1 0x14 32 read-write n 0x0 0x0 OFDMX1 OFDMX1 0 12 read-write RST OFD Reset Enable Control Register 0x18 32 read-write n 0x0 0x0 OFDRSTEN OFDRSTEN 0 1 read-write STAT OFD Status Register 0x1C 32 read-only n 0x0 0x0 FRQERR FRQERR 0 1 read-only OFDBUSY OFDBUSY 1 1 read-only PA Port A PA 0x0 0x0 0xC registers n 0x14 0x8 registers n 0x1C 0x4 reserved n 0x20 0x4 registers n 0x24 0x4 reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n 0xC 0x8 reserved n CR Port A Output Control Register 0x4 32 read-write n 0x0 0x0 PA2C PA2C 2 1 read-write PA3C PA3C 3 1 read-write PA4C PA4C 4 1 read-write DATA Port A Data Register 0x0 32 read-write n 0x0 0x0 PA2 PA2 2 1 read-write PA3 PA3 3 1 read-write PA4 PA4 4 1 read-write FR1 Port A Function Register 1 0x8 32 read-write n 0x0 0x0 PA2F1 PA2F1 2 1 read-write PA3F1 PA3F1 3 1 read-write PA4F1 PA4F1 4 1 read-write FR4 Port A Function Register 4 0x14 32 read-write n 0x0 0x0 PA2F4 PA2F4 2 1 read-write PA3F4 PA3F4 3 1 read-write PA4F4 PA4F4 4 1 read-write FR5 Port A Function Register 5 0x18 32 read-write n 0x0 0x0 PA2F5 PA2F5 2 1 read-write PA3F5 PA3F5 3 1 read-write FR7 Port A Function Register 7 0x20 32 read-write n 0x0 0x0 PA2F7 PA2F7 2 1 read-write PA3F7 PA3F7 3 1 read-write PA4F7 PA4F7 4 1 read-write IE Port A Input Control Register 0x38 32 read-write n 0x0 0x0 PA2IE PA2IE 2 1 read-write PA3IE PA3IE 3 1 read-write PA4IE PA4IE 4 1 read-write OD Port A Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PA2OD PA2OD 2 1 read-write PA3OD PA3OD 3 1 read-write PA4OD PA4OD 4 1 read-write PDN Port A Pull-down Control Register 0x30 32 read-write n 0x0 0x0 PA2DN PA2DN 2 1 read-write PA3DN PA3DN 3 1 read-write PA4DN PA4DN 4 1 read-write PUP Port A Pull-up Control Register 0x2C 32 read-write n 0x0 0x0 PA2UP PA2UP 2 1 read-write PA3UP PA3UP 3 1 read-write PA4UP PA4UP 4 1 read-write PB Port B PB 0x0 0x0 0x8 registers n 0x14 0x4 registers n 0x18 0x10 reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n 0x8 0xC reserved n CR Port B Output Control Register 0x4 32 read-write n 0x0 0x0 PB0C PB0C 0 1 read-write PB1C PB1C 1 1 read-write PB2C PB2C 2 1 read-write PB3C PB3C 3 1 read-write PB4C PB4C 4 1 read-write PB5C PB5C 5 1 read-write DATA Port B Data Register 0x0 32 read-write n 0x0 0x0 PB0 PB0 0 1 read-write PB1 PB1 1 1 read-write PB2 PB2 2 1 read-write PB3 PB3 3 1 read-write PB4 PB4 4 1 read-write PB5 PB5 5 1 read-write FR4 Port B Function Register 4 0x14 32 read-write n 0x0 0x0 PB0F4 PB0F4 0 1 read-write PB1F4 PB1F4 1 1 read-write PB2F4 PB2F4 2 1 read-write PB3F4 PB3F4 3 1 read-write PB4F4 PB4F4 4 1 read-write PB5F4 PB5F4 5 1 read-write IE Port B Input Control Register 0x38 32 read-write n 0x0 0x0 PB0IE PB0IE 0 1 read-write PB1IE PB1IE 1 1 read-write PB2IE PB2IE 2 1 read-write PB3IE PB3IE 3 1 read-write PB4IE PB4IE 4 1 read-write PB5IE PB5IE 5 1 read-write OD Port B Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PB0OD PB0OD 0 1 read-write PB1OD PB1OD 1 1 read-write PB2OD PB2OD 2 1 read-write PB3OD PB3OD 3 1 read-write PB4OD PB4OD 4 1 read-write PB5OD PB5OD 5 1 read-write PDN Port B Pull-down Control Register 0x30 32 read-write n 0x0 0x0 PB0DN PB0DN 0 1 read-write PB1DN PB1DN 1 1 read-write PB2DN PB2DN 2 1 read-write PB3DN PB3DN 3 1 read-write PB4DN PB4DN 4 1 read-write PB5DN PB5DN 5 1 read-write PUP Port B Pull-up Control Register 0x2C 32 read-write n 0x0 0x0 PB0UP PB0UP 0 1 read-write PB1UP PB1UP 1 1 read-write PB2UP PB2UP 2 1 read-write PB3UP PB3UP 3 1 read-write PB4UP PB4UP 4 1 read-write PB5UP PB5UP 5 1 read-write PC Port C PC 0x0 0x0 0x20 registers n 0x20 0x8 reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR Port C Output Control Register 0x4 32 read-write n 0x0 0x0 PC0C PC0C 0 1 read-write PC1C PC1C 1 1 read-write DATA Port C Data Register 0x0 32 read-write n 0x0 0x0 PC0 PC0 0 1 read-write PC1 PC1 1 1 read-write FR1 Port C Function Register 1 0x8 32 read-write n 0x0 0x0 PC0F1 PC0F1 0 1 read-write PC1F1 PC1F1 1 1 read-write FR2 Port C Function Register 2 0xC 32 read-write n 0x0 0x0 PC0F2 PC0F2 0 1 read-write PC1F2 PC1F2 1 1 read-write FR3 Port C Function Register 3 0x10 32 read-write n 0x0 0x0 PC0F3 PC0F3 0 1 read-write PC1F3 PC1F3 1 1 read-write FR4 Port C Function Register 4 0x14 32 read-write n 0x0 0x0 PC0F4 PC0F4 0 1 read-write PC1F4 PC1F4 1 1 read-write FR5 Port C Function Register 5 0x18 32 read-write n 0x0 0x0 PC0F5 PC0F5 0 1 read-write PC1F5 PC1F5 1 1 read-write FR6 Port C Function Register 6 0x1C 32 read-write n 0x0 0x0 PC0F6 PC0F6 0 1 read-write PC1F6 PC1F6 1 1 read-write IE Port C Input Control Register 0x38 32 read-write n 0x0 0x0 PC0IE PC0IE 0 1 read-write PC1IE PC1IE 1 1 read-write OD Port C Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PC0OD PC0OD 0 1 read-write PC1OD PC1OD 1 1 read-write PDN Port C Pull-down Control Register 0x30 32 read-write n 0x0 0x0 PC0DN PC0DN 0 1 read-write PC1DN PC1DN 1 1 read-write PUP Port C Pull-up Control Register 0x2C 32 read-write n 0x0 0x0 PC0UP PC0UP 0 1 read-write PC1UP PC1UP 1 1 read-write PE Port E PE 0x0 0x0 0x8 registers n 0x14 0x8 registers n 0x1C 0xC reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n 0x8 0xC reserved n CR Port E Output Control Register 0x4 32 read-write n 0x0 0x0 PE0C PE0C 0 1 read-write PE1C PE1C 1 1 read-write PE2C PE2C 2 1 read-write PE3C PE3C 3 1 read-write DATA Port E Data Register 0x0 32 read-write n 0x0 0x0 PE0 PE0 0 1 read-write PE1 PE1 1 1 read-write PE2 PE2 2 1 read-write PE3 PE3 3 1 read-write FR4 Port E Function Register 4 0x14 32 read-write n 0x0 0x0 PE1F4 PE1F4 1 1 read-write PE2F4 PE2F4 2 1 read-write PE3F4 PE3F4 3 1 read-write FR5 Port E Function Register 5 0x18 32 read-write n 0x0 0x0 PE1F5 PE1F5 1 1 read-write PE2F5 PE2F5 2 1 read-write PE3F5 PE3F5 3 1 read-write IE Port E Input Control Register 0x38 32 read-write n 0x0 0x0 PE0IE PE0IE 0 1 read-write PE1IE PE1IE 1 1 read-write PE2IE PE2IE 2 1 read-write PE3IE PE3IE 3 1 read-write OD Port E Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PE0OD PE0OD 0 1 read-write PE1OD PE1OD 1 1 read-write PE2OD PE2OD 2 1 read-write PE3OD PE3OD 3 1 read-write PDN Port E Pull-down Control Register 0x30 32 read-write n 0x0 0x0 PE0DN PE0DN 0 1 read-write PE1DN PE1DN 1 1 read-write PE2DN PE2DN 2 1 read-write PE3DN PE3DN 3 1 read-write PUP Port E Pull-up Control Register 0x2C 32 read-write n 0x0 0x0 PE0UP PE0UP 0 1 read-write PE1UP PE1UP 1 1 read-write PE2UP PE2UP 2 1 read-write PE3UP PE3UP 3 1 read-write PF Port F PF 0x0 0x0 0x10 registers n 0x10 0x4 reserved n 0x14 0x8 registers n 0x1C 0x4 reserved n 0x20 0x4 registers n 0x24 0x4 reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR Port F Output Control Register 0x4 32 read-write n 0x0 0x0 PF0C PF0C 0 1 read-write PF1C PF1C 1 1 read-write DATA Port F Data Register 0x0 32 read-write n 0x0 0x0 PF0 PF0 0 1 read-write PF1 PF1 1 1 read-write FR1 Port F Function Register 1 0x8 32 read-write n 0x0 0x0 PF0F1 PF0F1 0 1 read-write PF1F1 PF1F1 1 1 read-write FR2 Port F Function Register 2 0xC 32 read-write n 0x0 0x0 PF0F2 PF0F2 0 1 read-write PF1F2 PF1F2 1 1 read-write FR4 Port F Function Register 4 0x14 32 read-write n 0x0 0x0 PF0F4 PF0F4 0 1 read-write PF1F4 PF1F4 1 1 read-write FR5 Port F Function Register 5 0x18 32 read-write n 0x0 0x0 PF0F5 PF0F5 0 1 read-write PF1F5 PF1F5 1 1 read-write FR7 Port F Function Register 7 0x20 32 read-write n 0x0 0x0 PF0F7 PF0F7 0 1 read-write PF1F7 PF1F7 1 1 read-write IE Port F Input Control Register 0x38 32 read-write n 0x0 0x0 PF0IE PF0IE 0 1 read-write PF1IE PF1IE 1 1 read-write OD Port F Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PF0OD PF0OD 0 1 read-write PF1OD PF1OD 1 1 read-write PDN Port F Pull-down Control Register 0x30 32 read-write n 0x0 0x0 PF0DN PF0DN 0 1 read-write PF1DN PF1DN 1 1 read-write PUP Port F Pull-up Control Register 0x2C 32 read-write n 0x0 0x0 PF0UP PF0UP 0 1 read-write PF1UP PF1UP 1 1 read-write PG Port G PG 0x0 0x0 0x8 registers n 0x14 0x8 registers n 0x1C 0xC reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n 0x8 0xC reserved n CR Port G Output Control Register 0x4 32 read-write n 0x0 0x0 PG2C PG2C 2 1 read-write DATA Port G Data Register 0x0 32 read-write n 0x0 0x0 PG2 PG2 2 1 read-write FR4 Port G Function Register 4 0x14 32 read-write n 0x0 0x0 PG2F4 PG2F4 2 1 read-write FR5 Port G Function Register 5 0x18 32 read-write n 0x0 0x0 PG2F5 PG2F5 2 1 read-write IE Port G Input Control Register 0x38 32 read-write n 0x0 0x0 PG2IE PG2IE 2 1 read-write OD Port G Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PG2OD PG2OD 2 1 read-write PDN Port G Pull-down Control Register 0x30 32 read-write n 0x0 0x0 PG2DN PG2DN 2 1 read-write PUP Port G Pull-up Control Register 0x2C 32 read-write n 0x0 0x0 PG2UP PG2UP 2 1 read-write PH Port H PH 0x0 0x0 0x4 registers n 0x30 0x4 registers n 0x34 0x4 reserved n 0x38 0x4 registers n 0x4 0x2C reserved n DATA Port H Data Register 0x0 32 read-write n 0x0 0x0 PH0 PH0 0 1 read-write PH1 PH1 1 1 read-write IE Port H Input Control Register 0x38 32 read-write n 0x0 0x0 PH0IE PH0IE 0 1 read-write PH1IE PH1IE 1 1 read-write PDN Port H Pull-down Control Register 0x30 32 read-write n 0x0 0x0 PH0DN PH0DN 0 1 read-write PH1DN PH1DN 1 1 read-write PK Port K PK 0x0 0x0 0x8 registers n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n 0x8 0x20 reserved n CR Port K Output Control Register 0x4 32 read-write n 0x0 0x0 PK0C PK0C 0 1 read-write PK1C PK1C 1 1 read-write DATA Port K Data Register 0x0 32 read-write n 0x0 0x0 PK0 PK0 0 1 read-write PK1 PK1 1 1 read-write IE Port K Input Control Register 0x38 32 read-write n 0x0 0x0 PK0IE PK0IE 0 1 read-write PK1IE PK1IE 1 1 read-write OD Port K Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PK0OD PK0OD 0 1 read-write PK1OD PK1OD 1 1 read-write PDN Port K Pull-down Control Register 0x30 32 read-write n 0x0 0x0 PK0DN PK0DN 0 1 read-write PK1DN PK1DN 1 1 read-write PUP Port K Pull-up Control Register 0x2C 32 read-write n 0x0 0x0 PK0UP PK0UP 0 1 read-write PK1UP PK1UP 1 1 read-write PL Port L PL 0x0 0x0 0x8 registers n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n 0x8 0x20 reserved n CR Port L Output Control Register 0x4 32 read-write n 0x0 0x0 PL0C PL0C 0 1 read-write PL1C PL1C 1 1 read-write PL2C PL2C 2 1 read-write PL3C PL3C 3 1 read-write PL4C PL4C 4 1 read-write PL5C PL5C 5 1 read-write DATA Port L Data Register 0x0 32 read-write n 0x0 0x0 PL0 PL0 0 1 read-write PL1 PL1 1 1 read-write PL2 PL2 2 1 read-write PL3 PL3 3 1 read-write PL4 PL4 4 1 read-write PL5 PL5 5 1 read-write IE Port L Input Control Register 0x38 32 read-write n 0x0 0x0 PL0IE PL0IE 0 1 read-write PL1IE PL1IE 1 1 read-write PL2IE PL2IE 2 1 read-write PL3IE PL3IE 3 1 read-write PL4IE PL4IE 4 1 read-write PL5IE PL5IE 5 1 read-write OD Port L Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PL0OD PL0OD 0 1 read-write PL1OD PL1OD 1 1 read-write PL2OD PL2OD 2 1 read-write PL3OD PL3OD 3 1 read-write PL4OD PL4OD 4 1 read-write PL5OD PL5OD 5 1 read-write PDN Port L Pull-down Control Register 0x30 32 read-write n 0x0 0x0 PL0DN PL0DN 0 1 read-write PL1DN PL1DN 1 1 read-write PL2DN PL2DN 2 1 read-write PL3DN PL3DN 3 1 read-write PL4DN PL4DN 4 1 read-write PL5DN PL5DN 5 1 read-write PUP Port L Pull-up Control Register 0x2C 32 read-write n 0x0 0x0 PL0UP PL0UP 0 1 read-write PL1UP PL1UP 1 1 read-write PL2UP PL2UP 2 1 read-write PL3UP PL3UP 3 1 read-write PL4UP PL4UP 4 1 read-write PL5UP PL5UP 5 1 read-write PMD Advanced Programmable Motor Control Circuit (A-PMD) PMD 0x0 0x0 0x7C registers n BCARI PWM Basic Carrier Register 0x10 32 read-only n 0x0 0x0 BCARI BCARI 0 15 read-only CARSTA PWM Carrier Status Register 0xC 32 read-only n 0x0 0x0 PWMUST PWMUST 0 1 read-only PWMVST PWMVST 1 1 read-only PWMWST PWMWST 2 1 read-only CMPU PMD PWM Compare U Register 0x18 32 read-write n 0x0 0x0 CMPU CMPU 0 16 read-write CMPV PMD PWM Compare V Register 0x1C 32 read-write n 0x0 0x0 CMPV CMPV 0 16 read-write CMPW PMD PWM Compare W Register 0x20 32 read-write n 0x0 0x0 CMPW CMPW 0 16 read-write DBGOUTCR PMD Debug output control 0x78 32 read-write n 0x0 0x0 DBGEN DBGEN 0 1 read-write DBGMD DBGMD 1 2 read-write IADAEN IADAEN 3 1 read-write IADBEN IADBEN 4 1 read-write IADCEN IADCEN 5 1 read-write IADDEN IADDEN 6 1 read-write IADEEN IADEEN 7 1 read-write IEMGEN IEMGEN 9 1 read-write IENCEN IENCEN 12 1 read-write INIFF INIFF 31 1 read-write IOVVEN IOVVEN 10 1 read-write IPMDEN IPMDEN 8 1 read-write IVEEN IVEEN 11 1 read-write TRG0EN TRG0EN 16 1 read-write TRG1EN TRG1EN 17 1 read-write TRG2EN TRG2EN 18 1 read-write TRG3EN TRG3EN 19 1 read-write TRG4EN TRG4EN 20 1 read-write TRG5EN TRG5EN 21 1 read-write DTR PMD Dead Time Register 0x44 32 read-write n 0x0 0x0 DTR DTR 0 10 read-write EMGCR PMD EMG Control Register 0x34 32 read-write n 0x0 0x0 CPAIEN CPAIEN 13 1 read-write CPBIEN CPBIEN 14 1 read-write CPCIEN CPCIEN 15 1 read-write EMGCNT EMGCNT 8 5 read-write EMGEN EMGEN 0 1 read-write EMGIPOL EMGIPOL 7 1 read-write EMGISEL EMGISEL 2 1 read-write EMGMD EMGMD 3 2 read-write EMGRS EMGRS 1 1 write-only INHEN INHEN 5 1 read-write EMGREL PMD EMG Release Register 0x30 32 write-only n 0x0 0x0 EMGREL EMGREL 0 8 write-only EMGSTA PMD EMG Status Register 0x38 32 read-only n 0x0 0x0 EMGI EMGI 1 1 read-only EMGST EMGST 0 1 read-only MBUFCR PMD Update timing of the triple buffer 0x70 32 read-write n 0x0 0x0 BUFCTR BUFCTR 0 3 read-write MDCR PMD Control Register 0x8 32 read-write n 0x0 0x0 DCMEN DCMEN 6 1 read-write DSYNCS DSYNCS 8 2 read-write DTCREN DTCREN 7 1 read-write DTYMD DTYMD 4 1 read-write INTPRD INTPRD 1 2 read-write PINT PINT 3 1 read-write SYNTMD SYNTMD 5 1 read-write UPWMMD UPWMMD 10 2 read-write VPWMMD VPWMMD 12 2 read-write WPWMMD WPWMMD 14 2 read-write MDEN PMD Enable Register 0x0 32 read-write n 0x0 0x0 PWMEN PWMEN 0 1 read-write MDOUT PMD Conduction Control Register 0x28 32 read-write n 0x0 0x0 UOC UOC 0 2 read-write UPWM UPWM 8 1 read-write VOC VOC 2 2 read-write VPWM VPWM 9 1 read-write WOC WOC 4 2 read-write WPWM WPWM 10 1 read-write MDPOT PMD Output Setting Register 0x2C 32 read-write n 0x0 0x0 POLH POLH 3 1 read-write POLL POLL 2 1 read-write PSYNCS PSYNCS 0 2 read-write SYNCS SYNCS 8 2 read-write MODESEL PMD Mode Select Register 0x24 32 read-write n 0x0 0x0 DCMPEN DCMPEN 7 1 read-write MDSEL0 MDSEL0 0 1 read-write MDSEL1 MDSEL1 1 1 read-write MDSEL2 MDSEL2 2 1 read-write MDSEL3 MDSEL3 3 1 read-write OVVCR PMD OVV Control Register 0x3C 32 read-write n 0x0 0x0 ADIN0EN ADIN0EN 5 1 read-write ADIN1EN ADIN1EN 6 1 read-write OVVCNT OVVCNT 8 5 read-write OVVEN OVVEN 0 1 read-write OVVIPOL OVVIPOL 7 1 read-write OVVISEL OVVISEL 2 1 read-write OVVMD OVVMD 3 2 read-write OVVRS OVVRS 1 1 write-only OVVRSMD OVVRSMD 15 1 read-write OVVSTA PMD OVV Status Register 0x40 32 read-only n 0x0 0x0 OVVI OVVI 1 1 read-only OVVST OVVST 0 1 read-only PORTMD PMD Port Output Mode Register 0x4 32 read-write n 0x0 0x0 PORTMD PORTMD 0 2 read-write RATE PWM Frequency Register 0x14 32 read-write n 0x0 0x0 RATE RATE 0 15 read-write SYNCCR PMD Synchronization control between the PMD channel 0x74 32 read-write n 0x0 0x0 EMGSMD EMGSMD 4 2 read-write OVVSMD OVVSMD 6 2 read-write PWMSMD PWMSMD 0 1 read-write TRGCMP0 PMD Trigger Compare Register 0 0x48 32 read-write n 0x0 0x0 TRGCMP0 TRGCMP0 0 15 read-write TRGCMP1 PMD Trigger Compare Register 1 0x4C 32 read-write n 0x0 0x0 TRGCMP1 TRGCMP1 0 15 read-write TRGCMP2 PMD Trigger Compare Register 2 0x50 32 read-write n 0x0 0x0 TRGCMP2 TRGCMP2 0 15 read-write TRGCMP3 PMD Trigger Compare Register 3 0x54 32 read-write n 0x0 0x0 TRGCMP3 TRGCMP3 0 15 read-write TRGCR PMD Trigger Control Register 0x58 32 read-write n 0x0 0x0 CARSEL CARSEL 16 1 read-write TRG0BE TRG0BE 3 1 read-write TRG0MD TRG0MD 0 3 read-write TRG1BE TRG1BE 7 1 read-write TRG1MD TRG1MD 4 3 read-write TRG2BE TRG2BE 11 1 read-write TRG2MD TRG2MD 8 3 read-write TRG3BE TRG3BE 15 1 read-write TRG3MD TRG3MD 12 3 read-write TRGMD PMD Trigger Output Mode Setting Register 0x5C 32 read-write n 0x0 0x0 EMGTGE EMGTGE 0 1 read-write TRGOUT TRGOUT 1 1 read-write TRGSEL PMD Trigger Output Select Register 0x60 32 read-write n 0x0 0x0 TRGSEL TRGSEL 0 3 read-write TRGSYNCR PMD Trigger Update Timing Setting Register 0x64 32 read-write n 0x0 0x0 TSYNCS TSYNCS 0 2 read-write VPWMPH PMD Phase difference setting of the V-phase PWM 0x68 32 read-write n 0x0 0x0 VPWMPH VPWMPH 0 15 read-write WPWMPH PMD Phase difference setting of the W-phase PWM 0x6C 32 read-write n 0x0 0x0 WPWMPH WPWMPH 0 15 read-write PU Port U PU 0x0 0x0 0x10 registers n 0x10 0x4 reserved n 0x14 0x8 registers n 0x1C 0xC reserved n 0x28 0xC registers n 0x34 0x4 reserved n 0x38 0x4 registers n CR Port U Output Control Register 0x4 32 read-write n 0x0 0x0 PU4C PU4C 4 1 read-write PU5C PU5C 5 1 read-write PU6C PU6C 6 1 read-write DATA Port U Data Register 0x0 32 read-write n 0x0 0x0 PU4 PU4 4 1 read-write PU5 PU5 5 1 read-write PU6 PU6 6 1 read-write FR1 Port U Function Register 1 0x8 32 read-write n 0x0 0x0 PU4F1 PU4F1 4 1 read-write PU5F1 PU5F1 5 1 read-write PU6F1 PU6F1 6 1 read-write FR2 Port U Function Register 2 0xC 32 read-write n 0x0 0x0 PU5F2 PU5F2 5 1 read-write PU6F2 PU6F2 6 1 read-write FR4 Port U Function Register 4 0x14 32 read-write n 0x0 0x0 PU4F4 PU4F4 4 1 read-write PU5F4 PU5F4 5 1 read-write FR5 Port U Function Register 5 0x18 32 read-write n 0x0 0x0 PU4F5 PU4F5 4 1 read-write IE Port U Input Control Register 0x38 32 read-write n 0x0 0x0 PU4IE PU4IE 4 1 read-write PU5IE PU5IE 5 1 read-write PU6IE PU6IE 6 1 read-write OD Port U Open Drain Control Register 0x28 32 read-write n 0x0 0x0 PU4OD PU4OD 4 1 read-write PU5OD PU5OD 5 1 read-write PU6OD PU6OD 6 1 read-write PDN Port U Pull-down Control Register 0x30 32 read-write n 0x0 0x0 PU4DN PU4DN 4 1 read-write PU5DN PU5DN 5 1 read-write PU6DN PU6DN 6 1 read-write PUP Port U Pull-up Control Register 0x2C 32 read-write n 0x0 0x0 PU4UP PU4UP 4 1 read-write PU5UP PU5UP 5 1 read-write PU6UP PU6UP 6 1 read-write RLM Reset Low power Management Register (RLM) RLM 0x0 0x0 0x2 reserved n 0x2 0x2 registers n RSTFLG0 Reset flag register 0 0x2 8 read-write n 0x0 0x0 LVDRSTF LVDRSTF 5 3 read-write PINRSTF PINRSTF 3 1 read-write PORSTF PORSTF 0 1 read-write RSTFLG1 Reset flag register 1 0x3 8 read-write n 0x0 0x0 LOCKRSTF LOCKRSTF 1 1 read-write OFDRSTF OFDRSTF 3 1 read-write SYSRSTF SYSRSTF 0 1 read-write WDTRSTF WDTRSTF 2 1 read-write RPAR0 RAM Parity (RAMP) RPAR0 0x0 0x0 0x14 registers n CLR RAM Parity status clear register 0x8 32 write-only n 0x0 0x0 RPARCLR0 RPARCLR0 0 1 write-only RPARCLR1 RPARCLR1 1 1 write-only CTL RAM Parity control register 0x0 32 read-write n 0x0 0x0 RPAREN RPAREN 0 1 read-write RPARF RPARF 1 1 read-write EAD0 RAM Parity Error address register 0 0xC 32 read-only n 0x0 0x0 RPAREADD0 RPAREADD0 0 32 read-only EAD1 RAM Parity Error address register 1 0x10 32 read-only n 0x0 0x0 RPAREADD1 RPAREADD1 0 32 read-only ST RAM Parity status register 0x4 32 read-only n 0x0 0x0 RPARFG0 RPARFG0 0 1 read-only RPARFG1 RPARFG1 1 1 read-only RPAR1 RAM Parity (RAMP) RPAR0 0x0 0x0 0x14 registers n CLR RAM Parity status clear register 0x8 32 write-only n 0x0 0x0 RPARCLR0 RPARCLR0 0 1 write-only RPARCLR1 RPARCLR1 1 1 write-only CTL RAM Parity control register 0x0 32 read-write n 0x0 0x0 RPAREN RPAREN 0 1 read-write RPARF RPARF 1 1 read-write EAD0 RAM Parity Error address register 0 0xC 32 read-only n 0x0 0x0 RPAREADD0 RPAREADD0 0 32 read-only EAD1 RAM Parity Error address register 1 0x10 32 read-only n 0x0 0x0 RPAREADD1 RPAREADD1 0 32 read-only ST RAM Parity status register 0x4 32 read-only n 0x0 0x0 RPARFG0 RPARFG0 0 1 read-only RPARFG1 RPARFG1 1 1 read-only SIWD Watchdog Timer (SIWD) SIWD 0x0 0x0 0x18 registers n CR SIWD Control Register 0x8 32 write-only n 0x0 0x0 WDCR WDCR 0 8 write-only EN SIWD Enable Register 0x4 32 read-write n 0x0 0x0 WDTE WDTE 0 1 read-write WDTF WDTF 1 1 read-only MOD SIWD Mode Register 0xC 32 read-write n 0x0 0x0 INTF INTF 1 1 read-write RESCR RESCR 0 1 read-write WDCLS WDCLS 12 2 read-write WDCWD WDCWD 4 2 read-write WDTP WDTP 8 3 read-write MONI SIWD Count Monitor Register 0x10 32 read-only n 0x0 0x0 MONI MONI 0 30 read-only OSCCR SIWD Oscillator Control Register 0x14 32 read-write n 0x0 0x0 OSCPRO OSCPRO 0 1 read-write PRO SIWD Protect Register 0x0 32 read-write n 0x0 0x0 PROTECT PROTECT 0 8 read-write T32A0 32-bit Timer Event Counter (T32A) T32A0 0x0 0x0 0x4 registers n 0x4 0x3C reserved n 0x40 0xC4 registers n CAPA0 T32A Capture Register A0 0x6C 32 read-only n 0x0 0x0 CAPA0 CAPA0 0 16 read-only CAPA1 T32A Capture Register A1 0x70 32 read-only n 0x0 0x0 CAPA1 CAPA1 0 16 read-only CAPB0 T32A Capture Register B0 0xAC 32 read-only n 0x0 0x0 CAPB0 CAPB0 0 16 read-only CAPB1 T32A Capture Register B1 0xB0 32 read-only n 0x0 0x0 CAPB1 CAPB1 0 16 read-only CAPC0 T32A Capture Register C0 0xEC 32 read-only n 0x0 0x0 CAPC0 CAPC0 0 32 read-only CAPC1 T32A Capture Register C1 0xF0 32 read-only n 0x0 0x0 CAPC1 CAPC1 0 32 read-only CAPCRA T32A Capture Control Register A 0x48 32 read-write n 0x0 0x0 CAPMA0 CAPMA0 0 3 read-write CAPMA1 CAPMA1 4 3 read-write CAPCRB T32A Capture Control Register B 0x88 32 read-write n 0x0 0x0 CAPMB0 CAPMB0 0 3 read-write CAPMB1 CAPMB1 4 3 read-write CAPCRC T32A Capture Control Register C 0xC8 32 read-write n 0x0 0x0 CAPMC0 CAPMC0 0 3 read-write CAPMC1 CAPMC1 4 3 read-write CPA0 T32A Compare Register A0 0x78 32 read-only n 0x0 0x0 CRGA0 CRGA0 0 16 read-only CPA1 T32A Compare Register A1 0x7C 32 read-only n 0x0 0x0 CRGA1 CRGA1 0 16 read-only CPB0 T32A Compare Register B0 0xB8 32 read-only n 0x0 0x0 CRGB0 CRGB0 0 16 read-only CPB1 T32A Compare Register B1 0xBC 32 read-only n 0x0 0x0 CRGB1 CRGB1 0 16 read-only CPC0 T32A Compare Register C0 0xFC 32 read-only n 0x0 0x0 CRGC0 CRGC0 0 32 read-only CPC1 T32A Compare Register C1 0x100 32 read-only n 0x0 0x0 CRGC1 CRGC1 0 32 read-only CRA T32A Control Register A 0x44 32 read-write n 0x0 0x0 CLKA CLKA 24 3 read-write PRSCLA PRSCLA 28 3 read-write RELDA RELDA 8 3 read-write STARTA STARTA 0 3 read-write STOPA STOPA 4 3 read-write UPDNA UPDNA 16 2 read-write WBFA WBFA 20 1 read-write CRB T32A Control Register B 0x84 32 read-write n 0x0 0x0 CLKB CLKB 24 3 read-write PRSCLB PRSCLB 28 3 read-write RELDB RELDB 8 3 read-write STARTB STARTB 0 3 read-write STOPB STOPB 4 3 read-write UPDNB UPDNB 16 2 read-write WBFB WBFB 20 1 read-write CRC T32A Control Register C 0xC4 32 read-write n 0x0 0x0 CLKC CLKC 24 3 read-write PRSCLC PRSCLC 28 3 read-write RELDC RELDC 8 3 read-write STARTC STARTC 0 3 read-write STOPC STOPC 4 3 read-write UPDNC UPDNC 16 2 read-write WBFC WBFC 20 1 read-write DMAA T32A DMA Request Enable Register A 0x74 32 read-write n 0x0 0x0 DMAENA0 DMAENA0 0 1 read-write DMAENA1 DMAENA1 1 1 read-write DMAENA2 DMAENA2 2 1 read-write DMAB T32A DMA Request Enable Register B 0xB4 32 read-write n 0x0 0x0 DMAENB0 DMAENB0 0 1 read-write DMAENB1 DMAENB1 1 1 read-write DMAENB2 DMAENB2 2 1 read-write DMAC T32A DMA Request Enable Register C 0xF4 32 read-write n 0x0 0x0 DMAENC0 DMAENC0 0 1 read-write DMAENC1 DMAENC1 1 1 read-write DMAENC2 DMAENC2 2 1 read-write IMA T32A Interrupt Mask Register A 0x58 32 read-write n 0x0 0x0 IMA0 IMA0 0 1 read-write IMA1 IMA1 1 1 read-write IMOFA IMOFA 2 1 read-write IMUFA IMUFA 3 1 read-write IMB T32A Interrupt Mask Register B 0x98 32 read-write n 0x0 0x0 IMB0 IMB0 0 1 read-write IMB1 IMB1 1 1 read-write IMOFB IMOFB 2 1 read-write IMUFB IMUFB 3 1 read-write IMC T32A Interrupt Mask Register C 0xD8 32 read-write n 0x0 0x0 IMC0 IMC0 0 1 read-write IMC1 IMC1 1 1 read-write IMOFC IMOFC 2 1 read-write IMSTERR IMSTERR 4 1 read-write IMUFC IMUFC 3 1 read-write MOD T32A Mode Register 0x0 32 read-write n 0x0 0x0 HALT HALT 1 1 read-write MODE32 MODE32 0 1 read-write OUTCRA0 T32A Output Control Register A0 0x4C 32 write-only n 0x0 0x0 OCRA OCRA 0 2 write-only OUTCRA1 T32A Output Control Register A1 0x50 32 read-write n 0x0 0x0 OCRCAPA0 OCRCAPA0 4 2 read-write OCRCAPA1 OCRCAPA1 6 2 read-write OCRCMPA0 OCRCMPA0 0 2 read-write OCRCMPA1 OCRCMPA1 2 2 read-write OUTCRB0 T32A Output Control Register B0 0x8C 32 write-only n 0x0 0x0 OCRB OCRB 0 2 write-only OUTCRB1 T32A Output Control Register B1 0x90 32 read-write n 0x0 0x0 OCRCAPB0 OCRCAPB0 4 2 read-write OCRCAPB1 OCRCAPB1 6 2 read-write OCRCMPB0 OCRCMPB0 0 2 read-write OCRCMPB1 OCRCMPB1 2 2 read-write OUTCRC0 T32A Output Control Register C0 0xCC 32 write-only n 0x0 0x0 OCRC OCRC 0 2 write-only OUTCRC1 T32A Output Control Register C1 0xD0 32 read-write n 0x0 0x0 OCRCAPC0 OCRCAPC0 4 2 read-write OCRCAPC1 OCRCAPC1 6 2 read-write OCRCMPC0 OCRCMPC0 0 2 read-write OCRCMPC1 OCRCMPC1 2 2 read-write PLSCR T32A Pulse Count Control Register 0xF8 32 read-write n 0x0 0x0 NF NF 4 2 read-write PDIR PDIR 1 1 read-write PDN PDN 12 3 read-write PMODE PMODE 0 1 read-write PUP PUP 8 3 read-write RELDA T32A Reload Register A 0x60 32 read-write n 0x0 0x0 RELDA RELDA 0 16 read-write RELDB T32A Reload Register B 0xA0 32 read-write n 0x0 0x0 RELDB RELDB 0 16 read-write RELDC T32A Reload Register C 0xE0 32 read-write n 0x0 0x0 RELDC RELDC 0 32 read-write RGA0 T32A Timer Register A0 0x64 32 read-write n 0x0 0x0 RGA0 RGA0 0 16 read-write RGA1 T32A Timer Register A1 0x68 32 read-write n 0x0 0x0 RGA1 RGA1 0 16 read-write RGB0 T32A Timer Register B0 0xA4 32 read-write n 0x0 0x0 RGB0 RGB0 0 16 read-write RGB1 T32A Timer Register B1 0xA8 32 read-write n 0x0 0x0 RGB1 RGB1 0 16 read-write RGC0 T32A Timer Register C0 0xE4 32 read-write n 0x0 0x0 RGC0 RGC0 0 32 read-write RGC1 T32A Timer Register C1 0xE8 32 read-write n 0x0 0x0 RGC1 RGC1 0 32 read-write RUNA T32A Run Register A 0x40 32 read-write n 0x0 0x0 RUNA RUNA 0 1 read-write RUNFLGA RUNFLGA 4 1 read-only SFTSTAA SFTSTAA 1 1 write-only SFTSTPA SFTSTPA 2 1 write-only RUNB T32A Run Register B 0x80 32 read-write n 0x0 0x0 RUNB RUNB 0 1 read-write RUNFLGB RUNFLGB 4 1 read-only SFTSTAB SFTSTAB 1 1 write-only SFTSTPB SFTSTPB 2 1 write-only RUNC T32A Run Register C 0xC0 32 read-write n 0x0 0x0 RUNC RUNC 0 1 read-write RUNFLGC RUNFLGC 4 1 read-only SFTSTAC SFTSTAC 1 1 write-only SFTSTPC SFTSTPC 2 1 write-only STA T32A Status Register A 0x54 32 read-write n 0x0 0x0 INTA0 INTA0 0 1 read-write INTA1 INTA1 1 1 read-write INTOFA INTOFA 2 1 read-write INTUFA INTUFA 3 1 read-write STB T32A Status Register B 0x94 32 read-write n 0x0 0x0 INTB0 INTB0 0 1 read-write INTB1 INTB1 1 1 read-write INTOFB INTOFB 2 1 read-write INTUFB INTUFB 3 1 read-write STC T32A Status Register C 0xD4 32 read-write n 0x0 0x0 INTC0 INTC0 0 1 read-write INTC1 INTC1 1 1 read-write INTOFC INTOFC 2 1 read-write INTSTERR INTSTERR 4 1 read-write INTUFC INTUFC 3 1 read-write TMRA T32A Counter Capture Register A 0x5C 32 read-only n 0x0 0x0 TMRA TMRA 0 16 read-only TMRB T32A Counter Capture Register B 0x9C 32 read-only n 0x0 0x0 TMRB TMRB 0 16 read-only TMRC T32A Counter Capture Register C 0xDC 32 read-only n 0x0 0x0 TMRC TMRC 0 32 read-only T32A1 32-bit Timer Event Counter (T32A) T32A0 0x0 0x0 0x4 registers n 0x4 0x3C reserved n 0x40 0xC4 registers n CAPA0 T32A Capture Register A0 0x6C 32 read-only n 0x0 0x0 CAPA0 CAPA0 0 16 read-only CAPA1 T32A Capture Register A1 0x70 32 read-only n 0x0 0x0 CAPA1 CAPA1 0 16 read-only CAPB0 T32A Capture Register B0 0xAC 32 read-only n 0x0 0x0 CAPB0 CAPB0 0 16 read-only CAPB1 T32A Capture Register B1 0xB0 32 read-only n 0x0 0x0 CAPB1 CAPB1 0 16 read-only CAPC0 T32A Capture Register C0 0xEC 32 read-only n 0x0 0x0 CAPC0 CAPC0 0 32 read-only CAPC1 T32A Capture Register C1 0xF0 32 read-only n 0x0 0x0 CAPC1 CAPC1 0 32 read-only CAPCRA T32A Capture Control Register A 0x48 32 read-write n 0x0 0x0 CAPMA0 CAPMA0 0 3 read-write CAPMA1 CAPMA1 4 3 read-write CAPCRB T32A Capture Control Register B 0x88 32 read-write n 0x0 0x0 CAPMB0 CAPMB0 0 3 read-write CAPMB1 CAPMB1 4 3 read-write CAPCRC T32A Capture Control Register C 0xC8 32 read-write n 0x0 0x0 CAPMC0 CAPMC0 0 3 read-write CAPMC1 CAPMC1 4 3 read-write CPA0 T32A Compare Register A0 0x78 32 read-only n 0x0 0x0 CRGA0 CRGA0 0 16 read-only CPA1 T32A Compare Register A1 0x7C 32 read-only n 0x0 0x0 CRGA1 CRGA1 0 16 read-only CPB0 T32A Compare Register B0 0xB8 32 read-only n 0x0 0x0 CRGB0 CRGB0 0 16 read-only CPB1 T32A Compare Register B1 0xBC 32 read-only n 0x0 0x0 CRGB1 CRGB1 0 16 read-only CPC0 T32A Compare Register C0 0xFC 32 read-only n 0x0 0x0 CRGC0 CRGC0 0 32 read-only CPC1 T32A Compare Register C1 0x100 32 read-only n 0x0 0x0 CRGC1 CRGC1 0 32 read-only CRA T32A Control Register A 0x44 32 read-write n 0x0 0x0 CLKA CLKA 24 3 read-write PRSCLA PRSCLA 28 3 read-write RELDA RELDA 8 3 read-write STARTA STARTA 0 3 read-write STOPA STOPA 4 3 read-write UPDNA UPDNA 16 2 read-write WBFA WBFA 20 1 read-write CRB T32A Control Register B 0x84 32 read-write n 0x0 0x0 CLKB CLKB 24 3 read-write PRSCLB PRSCLB 28 3 read-write RELDB RELDB 8 3 read-write STARTB STARTB 0 3 read-write STOPB STOPB 4 3 read-write UPDNB UPDNB 16 2 read-write WBFB WBFB 20 1 read-write CRC T32A Control Register C 0xC4 32 read-write n 0x0 0x0 CLKC CLKC 24 3 read-write PRSCLC PRSCLC 28 3 read-write RELDC RELDC 8 3 read-write STARTC STARTC 0 3 read-write STOPC STOPC 4 3 read-write UPDNC UPDNC 16 2 read-write WBFC WBFC 20 1 read-write DMAA T32A DMA Request Enable Register A 0x74 32 read-write n 0x0 0x0 DMAENA0 DMAENA0 0 1 read-write DMAENA1 DMAENA1 1 1 read-write DMAENA2 DMAENA2 2 1 read-write DMAB T32A DMA Request Enable Register B 0xB4 32 read-write n 0x0 0x0 DMAENB0 DMAENB0 0 1 read-write DMAENB1 DMAENB1 1 1 read-write DMAENB2 DMAENB2 2 1 read-write DMAC T32A DMA Request Enable Register C 0xF4 32 read-write n 0x0 0x0 DMAENC0 DMAENC0 0 1 read-write DMAENC1 DMAENC1 1 1 read-write DMAENC2 DMAENC2 2 1 read-write IMA T32A Interrupt Mask Register A 0x58 32 read-write n 0x0 0x0 IMA0 IMA0 0 1 read-write IMA1 IMA1 1 1 read-write IMOFA IMOFA 2 1 read-write IMUFA IMUFA 3 1 read-write IMB T32A Interrupt Mask Register B 0x98 32 read-write n 0x0 0x0 IMB0 IMB0 0 1 read-write IMB1 IMB1 1 1 read-write IMOFB IMOFB 2 1 read-write IMUFB IMUFB 3 1 read-write IMC T32A Interrupt Mask Register C 0xD8 32 read-write n 0x0 0x0 IMC0 IMC0 0 1 read-write IMC1 IMC1 1 1 read-write IMOFC IMOFC 2 1 read-write IMSTERR IMSTERR 4 1 read-write IMUFC IMUFC 3 1 read-write MOD T32A Mode Register 0x0 32 read-write n 0x0 0x0 HALT HALT 1 1 read-write MODE32 MODE32 0 1 read-write OUTCRA0 T32A Output Control Register A0 0x4C 32 write-only n 0x0 0x0 OCRA OCRA 0 2 write-only OUTCRA1 T32A Output Control Register A1 0x50 32 read-write n 0x0 0x0 OCRCAPA0 OCRCAPA0 4 2 read-write OCRCAPA1 OCRCAPA1 6 2 read-write OCRCMPA0 OCRCMPA0 0 2 read-write OCRCMPA1 OCRCMPA1 2 2 read-write OUTCRB0 T32A Output Control Register B0 0x8C 32 write-only n 0x0 0x0 OCRB OCRB 0 2 write-only OUTCRB1 T32A Output Control Register B1 0x90 32 read-write n 0x0 0x0 OCRCAPB0 OCRCAPB0 4 2 read-write OCRCAPB1 OCRCAPB1 6 2 read-write OCRCMPB0 OCRCMPB0 0 2 read-write OCRCMPB1 OCRCMPB1 2 2 read-write OUTCRC0 T32A Output Control Register C0 0xCC 32 write-only n 0x0 0x0 OCRC OCRC 0 2 write-only OUTCRC1 T32A Output Control Register C1 0xD0 32 read-write n 0x0 0x0 OCRCAPC0 OCRCAPC0 4 2 read-write OCRCAPC1 OCRCAPC1 6 2 read-write OCRCMPC0 OCRCMPC0 0 2 read-write OCRCMPC1 OCRCMPC1 2 2 read-write PLSCR T32A Pulse Count Control Register 0xF8 32 read-write n 0x0 0x0 NF NF 4 2 read-write PDIR PDIR 1 1 read-write PDN PDN 12 3 read-write PMODE PMODE 0 1 read-write PUP PUP 8 3 read-write RELDA T32A Reload Register A 0x60 32 read-write n 0x0 0x0 RELDA RELDA 0 16 read-write RELDB T32A Reload Register B 0xA0 32 read-write n 0x0 0x0 RELDB RELDB 0 16 read-write RELDC T32A Reload Register C 0xE0 32 read-write n 0x0 0x0 RELDC RELDC 0 32 read-write RGA0 T32A Timer Register A0 0x64 32 read-write n 0x0 0x0 RGA0 RGA0 0 16 read-write RGA1 T32A Timer Register A1 0x68 32 read-write n 0x0 0x0 RGA1 RGA1 0 16 read-write RGB0 T32A Timer Register B0 0xA4 32 read-write n 0x0 0x0 RGB0 RGB0 0 16 read-write RGB1 T32A Timer Register B1 0xA8 32 read-write n 0x0 0x0 RGB1 RGB1 0 16 read-write RGC0 T32A Timer Register C0 0xE4 32 read-write n 0x0 0x0 RGC0 RGC0 0 32 read-write RGC1 T32A Timer Register C1 0xE8 32 read-write n 0x0 0x0 RGC1 RGC1 0 32 read-write RUNA T32A Run Register A 0x40 32 read-write n 0x0 0x0 RUNA RUNA 0 1 read-write RUNFLGA RUNFLGA 4 1 read-only SFTSTAA SFTSTAA 1 1 write-only SFTSTPA SFTSTPA 2 1 write-only RUNB T32A Run Register B 0x80 32 read-write n 0x0 0x0 RUNB RUNB 0 1 read-write RUNFLGB RUNFLGB 4 1 read-only SFTSTAB SFTSTAB 1 1 write-only SFTSTPB SFTSTPB 2 1 write-only RUNC T32A Run Register C 0xC0 32 read-write n 0x0 0x0 RUNC RUNC 0 1 read-write RUNFLGC RUNFLGC 4 1 read-only SFTSTAC SFTSTAC 1 1 write-only SFTSTPC SFTSTPC 2 1 write-only STA T32A Status Register A 0x54 32 read-write n 0x0 0x0 INTA0 INTA0 0 1 read-write INTA1 INTA1 1 1 read-write INTOFA INTOFA 2 1 read-write INTUFA INTUFA 3 1 read-write STB T32A Status Register B 0x94 32 read-write n 0x0 0x0 INTB0 INTB0 0 1 read-write INTB1 INTB1 1 1 read-write INTOFB INTOFB 2 1 read-write INTUFB INTUFB 3 1 read-write STC T32A Status Register C 0xD4 32 read-write n 0x0 0x0 INTC0 INTC0 0 1 read-write INTC1 INTC1 1 1 read-write INTOFC INTOFC 2 1 read-write INTSTERR INTSTERR 4 1 read-write INTUFC INTUFC 3 1 read-write TMRA T32A Counter Capture Register A 0x5C 32 read-only n 0x0 0x0 TMRA TMRA 0 16 read-only TMRB T32A Counter Capture Register B 0x9C 32 read-only n 0x0 0x0 TMRB TMRB 0 16 read-only TMRC T32A Counter Capture Register C 0xDC 32 read-only n 0x0 0x0 TMRC TMRC 0 32 read-only T32A2 32-bit Timer Event Counter (T32A) T32A0 0x0 0x0 0x4 registers n 0x4 0x3C reserved n 0x40 0xC4 registers n CAPA0 T32A Capture Register A0 0x6C 32 read-only n 0x0 0x0 CAPA0 CAPA0 0 16 read-only CAPA1 T32A Capture Register A1 0x70 32 read-only n 0x0 0x0 CAPA1 CAPA1 0 16 read-only CAPB0 T32A Capture Register B0 0xAC 32 read-only n 0x0 0x0 CAPB0 CAPB0 0 16 read-only CAPB1 T32A Capture Register B1 0xB0 32 read-only n 0x0 0x0 CAPB1 CAPB1 0 16 read-only CAPC0 T32A Capture Register C0 0xEC 32 read-only n 0x0 0x0 CAPC0 CAPC0 0 32 read-only CAPC1 T32A Capture Register C1 0xF0 32 read-only n 0x0 0x0 CAPC1 CAPC1 0 32 read-only CAPCRA T32A Capture Control Register A 0x48 32 read-write n 0x0 0x0 CAPMA0 CAPMA0 0 3 read-write CAPMA1 CAPMA1 4 3 read-write CAPCRB T32A Capture Control Register B 0x88 32 read-write n 0x0 0x0 CAPMB0 CAPMB0 0 3 read-write CAPMB1 CAPMB1 4 3 read-write CAPCRC T32A Capture Control Register C 0xC8 32 read-write n 0x0 0x0 CAPMC0 CAPMC0 0 3 read-write CAPMC1 CAPMC1 4 3 read-write CPA0 T32A Compare Register A0 0x78 32 read-only n 0x0 0x0 CRGA0 CRGA0 0 16 read-only CPA1 T32A Compare Register A1 0x7C 32 read-only n 0x0 0x0 CRGA1 CRGA1 0 16 read-only CPB0 T32A Compare Register B0 0xB8 32 read-only n 0x0 0x0 CRGB0 CRGB0 0 16 read-only CPB1 T32A Compare Register B1 0xBC 32 read-only n 0x0 0x0 CRGB1 CRGB1 0 16 read-only CPC0 T32A Compare Register C0 0xFC 32 read-only n 0x0 0x0 CRGC0 CRGC0 0 32 read-only CPC1 T32A Compare Register C1 0x100 32 read-only n 0x0 0x0 CRGC1 CRGC1 0 32 read-only CRA T32A Control Register A 0x44 32 read-write n 0x0 0x0 CLKA CLKA 24 3 read-write PRSCLA PRSCLA 28 3 read-write RELDA RELDA 8 3 read-write STARTA STARTA 0 3 read-write STOPA STOPA 4 3 read-write UPDNA UPDNA 16 2 read-write WBFA WBFA 20 1 read-write CRB T32A Control Register B 0x84 32 read-write n 0x0 0x0 CLKB CLKB 24 3 read-write PRSCLB PRSCLB 28 3 read-write RELDB RELDB 8 3 read-write STARTB STARTB 0 3 read-write STOPB STOPB 4 3 read-write UPDNB UPDNB 16 2 read-write WBFB WBFB 20 1 read-write CRC T32A Control Register C 0xC4 32 read-write n 0x0 0x0 CLKC CLKC 24 3 read-write PRSCLC PRSCLC 28 3 read-write RELDC RELDC 8 3 read-write STARTC STARTC 0 3 read-write STOPC STOPC 4 3 read-write UPDNC UPDNC 16 2 read-write WBFC WBFC 20 1 read-write DMAA T32A DMA Request Enable Register A 0x74 32 read-write n 0x0 0x0 DMAENA0 DMAENA0 0 1 read-write DMAENA1 DMAENA1 1 1 read-write DMAENA2 DMAENA2 2 1 read-write DMAB T32A DMA Request Enable Register B 0xB4 32 read-write n 0x0 0x0 DMAENB0 DMAENB0 0 1 read-write DMAENB1 DMAENB1 1 1 read-write DMAENB2 DMAENB2 2 1 read-write DMAC T32A DMA Request Enable Register C 0xF4 32 read-write n 0x0 0x0 DMAENC0 DMAENC0 0 1 read-write DMAENC1 DMAENC1 1 1 read-write DMAENC2 DMAENC2 2 1 read-write IMA T32A Interrupt Mask Register A 0x58 32 read-write n 0x0 0x0 IMA0 IMA0 0 1 read-write IMA1 IMA1 1 1 read-write IMOFA IMOFA 2 1 read-write IMUFA IMUFA 3 1 read-write IMB T32A Interrupt Mask Register B 0x98 32 read-write n 0x0 0x0 IMB0 IMB0 0 1 read-write IMB1 IMB1 1 1 read-write IMOFB IMOFB 2 1 read-write IMUFB IMUFB 3 1 read-write IMC T32A Interrupt Mask Register C 0xD8 32 read-write n 0x0 0x0 IMC0 IMC0 0 1 read-write IMC1 IMC1 1 1 read-write IMOFC IMOFC 2 1 read-write IMSTERR IMSTERR 4 1 read-write IMUFC IMUFC 3 1 read-write MOD T32A Mode Register 0x0 32 read-write n 0x0 0x0 HALT HALT 1 1 read-write MODE32 MODE32 0 1 read-write OUTCRA0 T32A Output Control Register A0 0x4C 32 write-only n 0x0 0x0 OCRA OCRA 0 2 write-only OUTCRA1 T32A Output Control Register A1 0x50 32 read-write n 0x0 0x0 OCRCAPA0 OCRCAPA0 4 2 read-write OCRCAPA1 OCRCAPA1 6 2 read-write OCRCMPA0 OCRCMPA0 0 2 read-write OCRCMPA1 OCRCMPA1 2 2 read-write OUTCRB0 T32A Output Control Register B0 0x8C 32 write-only n 0x0 0x0 OCRB OCRB 0 2 write-only OUTCRB1 T32A Output Control Register B1 0x90 32 read-write n 0x0 0x0 OCRCAPB0 OCRCAPB0 4 2 read-write OCRCAPB1 OCRCAPB1 6 2 read-write OCRCMPB0 OCRCMPB0 0 2 read-write OCRCMPB1 OCRCMPB1 2 2 read-write OUTCRC0 T32A Output Control Register C0 0xCC 32 write-only n 0x0 0x0 OCRC OCRC 0 2 write-only OUTCRC1 T32A Output Control Register C1 0xD0 32 read-write n 0x0 0x0 OCRCAPC0 OCRCAPC0 4 2 read-write OCRCAPC1 OCRCAPC1 6 2 read-write OCRCMPC0 OCRCMPC0 0 2 read-write OCRCMPC1 OCRCMPC1 2 2 read-write PLSCR T32A Pulse Count Control Register 0xF8 32 read-write n 0x0 0x0 NF NF 4 2 read-write PDIR PDIR 1 1 read-write PDN PDN 12 3 read-write PMODE PMODE 0 1 read-write PUP PUP 8 3 read-write RELDA T32A Reload Register A 0x60 32 read-write n 0x0 0x0 RELDA RELDA 0 16 read-write RELDB T32A Reload Register B 0xA0 32 read-write n 0x0 0x0 RELDB RELDB 0 16 read-write RELDC T32A Reload Register C 0xE0 32 read-write n 0x0 0x0 RELDC RELDC 0 32 read-write RGA0 T32A Timer Register A0 0x64 32 read-write n 0x0 0x0 RGA0 RGA0 0 16 read-write RGA1 T32A Timer Register A1 0x68 32 read-write n 0x0 0x0 RGA1 RGA1 0 16 read-write RGB0 T32A Timer Register B0 0xA4 32 read-write n 0x0 0x0 RGB0 RGB0 0 16 read-write RGB1 T32A Timer Register B1 0xA8 32 read-write n 0x0 0x0 RGB1 RGB1 0 16 read-write RGC0 T32A Timer Register C0 0xE4 32 read-write n 0x0 0x0 RGC0 RGC0 0 32 read-write RGC1 T32A Timer Register C1 0xE8 32 read-write n 0x0 0x0 RGC1 RGC1 0 32 read-write RUNA T32A Run Register A 0x40 32 read-write n 0x0 0x0 RUNA RUNA 0 1 read-write RUNFLGA RUNFLGA 4 1 read-only SFTSTAA SFTSTAA 1 1 write-only SFTSTPA SFTSTPA 2 1 write-only RUNB T32A Run Register B 0x80 32 read-write n 0x0 0x0 RUNB RUNB 0 1 read-write RUNFLGB RUNFLGB 4 1 read-only SFTSTAB SFTSTAB 1 1 write-only SFTSTPB SFTSTPB 2 1 write-only RUNC T32A Run Register C 0xC0 32 read-write n 0x0 0x0 RUNC RUNC 0 1 read-write RUNFLGC RUNFLGC 4 1 read-only SFTSTAC SFTSTAC 1 1 write-only SFTSTPC SFTSTPC 2 1 write-only STA T32A Status Register A 0x54 32 read-write n 0x0 0x0 INTA0 INTA0 0 1 read-write INTA1 INTA1 1 1 read-write INTOFA INTOFA 2 1 read-write INTUFA INTUFA 3 1 read-write STB T32A Status Register B 0x94 32 read-write n 0x0 0x0 INTB0 INTB0 0 1 read-write INTB1 INTB1 1 1 read-write INTOFB INTOFB 2 1 read-write INTUFB INTUFB 3 1 read-write STC T32A Status Register C 0xD4 32 read-write n 0x0 0x0 INTC0 INTC0 0 1 read-write INTC1 INTC1 1 1 read-write INTOFC INTOFC 2 1 read-write INTSTERR INTSTERR 4 1 read-write INTUFC INTUFC 3 1 read-write TMRA T32A Counter Capture Register A 0x5C 32 read-only n 0x0 0x0 TMRA TMRA 0 16 read-only TMRB T32A Counter Capture Register B 0x9C 32 read-only n 0x0 0x0 TMRB TMRB 0 16 read-only TMRC T32A Counter Capture Register C 0xDC 32 read-only n 0x0 0x0 TMRC TMRC 0 32 read-only T32A3 32-bit Timer Event Counter (T32A) T32A0 0x0 0x0 0x4 registers n 0x4 0x3C reserved n 0x40 0xC4 registers n CAPA0 T32A Capture Register A0 0x6C 32 read-only n 0x0 0x0 CAPA0 CAPA0 0 16 read-only CAPA1 T32A Capture Register A1 0x70 32 read-only n 0x0 0x0 CAPA1 CAPA1 0 16 read-only CAPB0 T32A Capture Register B0 0xAC 32 read-only n 0x0 0x0 CAPB0 CAPB0 0 16 read-only CAPB1 T32A Capture Register B1 0xB0 32 read-only n 0x0 0x0 CAPB1 CAPB1 0 16 read-only CAPC0 T32A Capture Register C0 0xEC 32 read-only n 0x0 0x0 CAPC0 CAPC0 0 32 read-only CAPC1 T32A Capture Register C1 0xF0 32 read-only n 0x0 0x0 CAPC1 CAPC1 0 32 read-only CAPCRA T32A Capture Control Register A 0x48 32 read-write n 0x0 0x0 CAPMA0 CAPMA0 0 3 read-write CAPMA1 CAPMA1 4 3 read-write CAPCRB T32A Capture Control Register B 0x88 32 read-write n 0x0 0x0 CAPMB0 CAPMB0 0 3 read-write CAPMB1 CAPMB1 4 3 read-write CAPCRC T32A Capture Control Register C 0xC8 32 read-write n 0x0 0x0 CAPMC0 CAPMC0 0 3 read-write CAPMC1 CAPMC1 4 3 read-write CPA0 T32A Compare Register A0 0x78 32 read-only n 0x0 0x0 CRGA0 CRGA0 0 16 read-only CPA1 T32A Compare Register A1 0x7C 32 read-only n 0x0 0x0 CRGA1 CRGA1 0 16 read-only CPB0 T32A Compare Register B0 0xB8 32 read-only n 0x0 0x0 CRGB0 CRGB0 0 16 read-only CPB1 T32A Compare Register B1 0xBC 32 read-only n 0x0 0x0 CRGB1 CRGB1 0 16 read-only CPC0 T32A Compare Register C0 0xFC 32 read-only n 0x0 0x0 CRGC0 CRGC0 0 32 read-only CPC1 T32A Compare Register C1 0x100 32 read-only n 0x0 0x0 CRGC1 CRGC1 0 32 read-only CRA T32A Control Register A 0x44 32 read-write n 0x0 0x0 CLKA CLKA 24 3 read-write PRSCLA PRSCLA 28 3 read-write RELDA RELDA 8 3 read-write STARTA STARTA 0 3 read-write STOPA STOPA 4 3 read-write UPDNA UPDNA 16 2 read-write WBFA WBFA 20 1 read-write CRB T32A Control Register B 0x84 32 read-write n 0x0 0x0 CLKB CLKB 24 3 read-write PRSCLB PRSCLB 28 3 read-write RELDB RELDB 8 3 read-write STARTB STARTB 0 3 read-write STOPB STOPB 4 3 read-write UPDNB UPDNB 16 2 read-write WBFB WBFB 20 1 read-write CRC T32A Control Register C 0xC4 32 read-write n 0x0 0x0 CLKC CLKC 24 3 read-write PRSCLC PRSCLC 28 3 read-write RELDC RELDC 8 3 read-write STARTC STARTC 0 3 read-write STOPC STOPC 4 3 read-write UPDNC UPDNC 16 2 read-write WBFC WBFC 20 1 read-write DMAA T32A DMA Request Enable Register A 0x74 32 read-write n 0x0 0x0 DMAENA0 DMAENA0 0 1 read-write DMAENA1 DMAENA1 1 1 read-write DMAENA2 DMAENA2 2 1 read-write DMAB T32A DMA Request Enable Register B 0xB4 32 read-write n 0x0 0x0 DMAENB0 DMAENB0 0 1 read-write DMAENB1 DMAENB1 1 1 read-write DMAENB2 DMAENB2 2 1 read-write DMAC T32A DMA Request Enable Register C 0xF4 32 read-write n 0x0 0x0 DMAENC0 DMAENC0 0 1 read-write DMAENC1 DMAENC1 1 1 read-write DMAENC2 DMAENC2 2 1 read-write IMA T32A Interrupt Mask Register A 0x58 32 read-write n 0x0 0x0 IMA0 IMA0 0 1 read-write IMA1 IMA1 1 1 read-write IMOFA IMOFA 2 1 read-write IMUFA IMUFA 3 1 read-write IMB T32A Interrupt Mask Register B 0x98 32 read-write n 0x0 0x0 IMB0 IMB0 0 1 read-write IMB1 IMB1 1 1 read-write IMOFB IMOFB 2 1 read-write IMUFB IMUFB 3 1 read-write IMC T32A Interrupt Mask Register C 0xD8 32 read-write n 0x0 0x0 IMC0 IMC0 0 1 read-write IMC1 IMC1 1 1 read-write IMOFC IMOFC 2 1 read-write IMSTERR IMSTERR 4 1 read-write IMUFC IMUFC 3 1 read-write MOD T32A Mode Register 0x0 32 read-write n 0x0 0x0 HALT HALT 1 1 read-write MODE32 MODE32 0 1 read-write OUTCRA0 T32A Output Control Register A0 0x4C 32 write-only n 0x0 0x0 OCRA OCRA 0 2 write-only OUTCRA1 T32A Output Control Register A1 0x50 32 read-write n 0x0 0x0 OCRCAPA0 OCRCAPA0 4 2 read-write OCRCAPA1 OCRCAPA1 6 2 read-write OCRCMPA0 OCRCMPA0 0 2 read-write OCRCMPA1 OCRCMPA1 2 2 read-write OUTCRB0 T32A Output Control Register B0 0x8C 32 write-only n 0x0 0x0 OCRB OCRB 0 2 write-only OUTCRB1 T32A Output Control Register B1 0x90 32 read-write n 0x0 0x0 OCRCAPB0 OCRCAPB0 4 2 read-write OCRCAPB1 OCRCAPB1 6 2 read-write OCRCMPB0 OCRCMPB0 0 2 read-write OCRCMPB1 OCRCMPB1 2 2 read-write OUTCRC0 T32A Output Control Register C0 0xCC 32 write-only n 0x0 0x0 OCRC OCRC 0 2 write-only OUTCRC1 T32A Output Control Register C1 0xD0 32 read-write n 0x0 0x0 OCRCAPC0 OCRCAPC0 4 2 read-write OCRCAPC1 OCRCAPC1 6 2 read-write OCRCMPC0 OCRCMPC0 0 2 read-write OCRCMPC1 OCRCMPC1 2 2 read-write PLSCR T32A Pulse Count Control Register 0xF8 32 read-write n 0x0 0x0 NF NF 4 2 read-write PDIR PDIR 1 1 read-write PDN PDN 12 3 read-write PMODE PMODE 0 1 read-write PUP PUP 8 3 read-write RELDA T32A Reload Register A 0x60 32 read-write n 0x0 0x0 RELDA RELDA 0 16 read-write RELDB T32A Reload Register B 0xA0 32 read-write n 0x0 0x0 RELDB RELDB 0 16 read-write RELDC T32A Reload Register C 0xE0 32 read-write n 0x0 0x0 RELDC RELDC 0 32 read-write RGA0 T32A Timer Register A0 0x64 32 read-write n 0x0 0x0 RGA0 RGA0 0 16 read-write RGA1 T32A Timer Register A1 0x68 32 read-write n 0x0 0x0 RGA1 RGA1 0 16 read-write RGB0 T32A Timer Register B0 0xA4 32 read-write n 0x0 0x0 RGB0 RGB0 0 16 read-write RGB1 T32A Timer Register B1 0xA8 32 read-write n 0x0 0x0 RGB1 RGB1 0 16 read-write RGC0 T32A Timer Register C0 0xE4 32 read-write n 0x0 0x0 RGC0 RGC0 0 32 read-write RGC1 T32A Timer Register C1 0xE8 32 read-write n 0x0 0x0 RGC1 RGC1 0 32 read-write RUNA T32A Run Register A 0x40 32 read-write n 0x0 0x0 RUNA RUNA 0 1 read-write RUNFLGA RUNFLGA 4 1 read-only SFTSTAA SFTSTAA 1 1 write-only SFTSTPA SFTSTPA 2 1 write-only RUNB T32A Run Register B 0x80 32 read-write n 0x0 0x0 RUNB RUNB 0 1 read-write RUNFLGB RUNFLGB 4 1 read-only SFTSTAB SFTSTAB 1 1 write-only SFTSTPB SFTSTPB 2 1 write-only RUNC T32A Run Register C 0xC0 32 read-write n 0x0 0x0 RUNC RUNC 0 1 read-write RUNFLGC RUNFLGC 4 1 read-only SFTSTAC SFTSTAC 1 1 write-only SFTSTPC SFTSTPC 2 1 write-only STA T32A Status Register A 0x54 32 read-write n 0x0 0x0 INTA0 INTA0 0 1 read-write INTA1 INTA1 1 1 read-write INTOFA INTOFA 2 1 read-write INTUFA INTUFA 3 1 read-write STB T32A Status Register B 0x94 32 read-write n 0x0 0x0 INTB0 INTB0 0 1 read-write INTB1 INTB1 1 1 read-write INTOFB INTOFB 2 1 read-write INTUFB INTUFB 3 1 read-write STC T32A Status Register C 0xD4 32 read-write n 0x0 0x0 INTC0 INTC0 0 1 read-write INTC1 INTC1 1 1 read-write INTOFC INTOFC 2 1 read-write INTSTERR INTSTERR 4 1 read-write INTUFC INTUFC 3 1 read-write TMRA T32A Counter Capture Register A 0x5C 32 read-only n 0x0 0x0 TMRA TMRA 0 16 read-only TMRB T32A Counter Capture Register B 0x9C 32 read-only n 0x0 0x0 TMRB TMRB 0 16 read-only TMRC T32A Counter Capture Register C 0xDC 32 read-only n 0x0 0x0 TMRC TMRC 0 32 read-only T32A4 32-bit Timer Event Counter (T32A) T32A0 0x0 0x0 0x4 registers n 0x4 0x3C reserved n 0x40 0xC4 registers n CAPA0 T32A Capture Register A0 0x6C 32 read-only n 0x0 0x0 CAPA0 CAPA0 0 16 read-only CAPA1 T32A Capture Register A1 0x70 32 read-only n 0x0 0x0 CAPA1 CAPA1 0 16 read-only CAPB0 T32A Capture Register B0 0xAC 32 read-only n 0x0 0x0 CAPB0 CAPB0 0 16 read-only CAPB1 T32A Capture Register B1 0xB0 32 read-only n 0x0 0x0 CAPB1 CAPB1 0 16 read-only CAPC0 T32A Capture Register C0 0xEC 32 read-only n 0x0 0x0 CAPC0 CAPC0 0 32 read-only CAPC1 T32A Capture Register C1 0xF0 32 read-only n 0x0 0x0 CAPC1 CAPC1 0 32 read-only CAPCRA T32A Capture Control Register A 0x48 32 read-write n 0x0 0x0 CAPMA0 CAPMA0 0 3 read-write CAPMA1 CAPMA1 4 3 read-write CAPCRB T32A Capture Control Register B 0x88 32 read-write n 0x0 0x0 CAPMB0 CAPMB0 0 3 read-write CAPMB1 CAPMB1 4 3 read-write CAPCRC T32A Capture Control Register C 0xC8 32 read-write n 0x0 0x0 CAPMC0 CAPMC0 0 3 read-write CAPMC1 CAPMC1 4 3 read-write CPA0 T32A Compare Register A0 0x78 32 read-only n 0x0 0x0 CRGA0 CRGA0 0 16 read-only CPA1 T32A Compare Register A1 0x7C 32 read-only n 0x0 0x0 CRGA1 CRGA1 0 16 read-only CPB0 T32A Compare Register B0 0xB8 32 read-only n 0x0 0x0 CRGB0 CRGB0 0 16 read-only CPB1 T32A Compare Register B1 0xBC 32 read-only n 0x0 0x0 CRGB1 CRGB1 0 16 read-only CPC0 T32A Compare Register C0 0xFC 32 read-only n 0x0 0x0 CRGC0 CRGC0 0 32 read-only CPC1 T32A Compare Register C1 0x100 32 read-only n 0x0 0x0 CRGC1 CRGC1 0 32 read-only CRA T32A Control Register A 0x44 32 read-write n 0x0 0x0 CLKA CLKA 24 3 read-write PRSCLA PRSCLA 28 3 read-write RELDA RELDA 8 3 read-write STARTA STARTA 0 3 read-write STOPA STOPA 4 3 read-write UPDNA UPDNA 16 2 read-write WBFA WBFA 20 1 read-write CRB T32A Control Register B 0x84 32 read-write n 0x0 0x0 CLKB CLKB 24 3 read-write PRSCLB PRSCLB 28 3 read-write RELDB RELDB 8 3 read-write STARTB STARTB 0 3 read-write STOPB STOPB 4 3 read-write UPDNB UPDNB 16 2 read-write WBFB WBFB 20 1 read-write CRC T32A Control Register C 0xC4 32 read-write n 0x0 0x0 CLKC CLKC 24 3 read-write PRSCLC PRSCLC 28 3 read-write RELDC RELDC 8 3 read-write STARTC STARTC 0 3 read-write STOPC STOPC 4 3 read-write UPDNC UPDNC 16 2 read-write WBFC WBFC 20 1 read-write DMAA T32A DMA Request Enable Register A 0x74 32 read-write n 0x0 0x0 DMAENA0 DMAENA0 0 1 read-write DMAENA1 DMAENA1 1 1 read-write DMAENA2 DMAENA2 2 1 read-write DMAB T32A DMA Request Enable Register B 0xB4 32 read-write n 0x0 0x0 DMAENB0 DMAENB0 0 1 read-write DMAENB1 DMAENB1 1 1 read-write DMAENB2 DMAENB2 2 1 read-write DMAC T32A DMA Request Enable Register C 0xF4 32 read-write n 0x0 0x0 DMAENC0 DMAENC0 0 1 read-write DMAENC1 DMAENC1 1 1 read-write DMAENC2 DMAENC2 2 1 read-write IMA T32A Interrupt Mask Register A 0x58 32 read-write n 0x0 0x0 IMA0 IMA0 0 1 read-write IMA1 IMA1 1 1 read-write IMOFA IMOFA 2 1 read-write IMUFA IMUFA 3 1 read-write IMB T32A Interrupt Mask Register B 0x98 32 read-write n 0x0 0x0 IMB0 IMB0 0 1 read-write IMB1 IMB1 1 1 read-write IMOFB IMOFB 2 1 read-write IMUFB IMUFB 3 1 read-write IMC T32A Interrupt Mask Register C 0xD8 32 read-write n 0x0 0x0 IMC0 IMC0 0 1 read-write IMC1 IMC1 1 1 read-write IMOFC IMOFC 2 1 read-write IMSTERR IMSTERR 4 1 read-write IMUFC IMUFC 3 1 read-write MOD T32A Mode Register 0x0 32 read-write n 0x0 0x0 HALT HALT 1 1 read-write MODE32 MODE32 0 1 read-write OUTCRA0 T32A Output Control Register A0 0x4C 32 write-only n 0x0 0x0 OCRA OCRA 0 2 write-only OUTCRA1 T32A Output Control Register A1 0x50 32 read-write n 0x0 0x0 OCRCAPA0 OCRCAPA0 4 2 read-write OCRCAPA1 OCRCAPA1 6 2 read-write OCRCMPA0 OCRCMPA0 0 2 read-write OCRCMPA1 OCRCMPA1 2 2 read-write OUTCRB0 T32A Output Control Register B0 0x8C 32 write-only n 0x0 0x0 OCRB OCRB 0 2 write-only OUTCRB1 T32A Output Control Register B1 0x90 32 read-write n 0x0 0x0 OCRCAPB0 OCRCAPB0 4 2 read-write OCRCAPB1 OCRCAPB1 6 2 read-write OCRCMPB0 OCRCMPB0 0 2 read-write OCRCMPB1 OCRCMPB1 2 2 read-write OUTCRC0 T32A Output Control Register C0 0xCC 32 write-only n 0x0 0x0 OCRC OCRC 0 2 write-only OUTCRC1 T32A Output Control Register C1 0xD0 32 read-write n 0x0 0x0 OCRCAPC0 OCRCAPC0 4 2 read-write OCRCAPC1 OCRCAPC1 6 2 read-write OCRCMPC0 OCRCMPC0 0 2 read-write OCRCMPC1 OCRCMPC1 2 2 read-write PLSCR T32A Pulse Count Control Register 0xF8 32 read-write n 0x0 0x0 NF NF 4 2 read-write PDIR PDIR 1 1 read-write PDN PDN 12 3 read-write PMODE PMODE 0 1 read-write PUP PUP 8 3 read-write RELDA T32A Reload Register A 0x60 32 read-write n 0x0 0x0 RELDA RELDA 0 16 read-write RELDB T32A Reload Register B 0xA0 32 read-write n 0x0 0x0 RELDB RELDB 0 16 read-write RELDC T32A Reload Register C 0xE0 32 read-write n 0x0 0x0 RELDC RELDC 0 32 read-write RGA0 T32A Timer Register A0 0x64 32 read-write n 0x0 0x0 RGA0 RGA0 0 16 read-write RGA1 T32A Timer Register A1 0x68 32 read-write n 0x0 0x0 RGA1 RGA1 0 16 read-write RGB0 T32A Timer Register B0 0xA4 32 read-write n 0x0 0x0 RGB0 RGB0 0 16 read-write RGB1 T32A Timer Register B1 0xA8 32 read-write n 0x0 0x0 RGB1 RGB1 0 16 read-write RGC0 T32A Timer Register C0 0xE4 32 read-write n 0x0 0x0 RGC0 RGC0 0 32 read-write RGC1 T32A Timer Register C1 0xE8 32 read-write n 0x0 0x0 RGC1 RGC1 0 32 read-write RUNA T32A Run Register A 0x40 32 read-write n 0x0 0x0 RUNA RUNA 0 1 read-write RUNFLGA RUNFLGA 4 1 read-only SFTSTAA SFTSTAA 1 1 write-only SFTSTPA SFTSTPA 2 1 write-only RUNB T32A Run Register B 0x80 32 read-write n 0x0 0x0 RUNB RUNB 0 1 read-write RUNFLGB RUNFLGB 4 1 read-only SFTSTAB SFTSTAB 1 1 write-only SFTSTPB SFTSTPB 2 1 write-only RUNC T32A Run Register C 0xC0 32 read-write n 0x0 0x0 RUNC RUNC 0 1 read-write RUNFLGC RUNFLGC 4 1 read-only SFTSTAC SFTSTAC 1 1 write-only SFTSTPC SFTSTPC 2 1 write-only STA T32A Status Register A 0x54 32 read-write n 0x0 0x0 INTA0 INTA0 0 1 read-write INTA1 INTA1 1 1 read-write INTOFA INTOFA 2 1 read-write INTUFA INTUFA 3 1 read-write STB T32A Status Register B 0x94 32 read-write n 0x0 0x0 INTB0 INTB0 0 1 read-write INTB1 INTB1 1 1 read-write INTOFB INTOFB 2 1 read-write INTUFB INTUFB 3 1 read-write STC T32A Status Register C 0xD4 32 read-write n 0x0 0x0 INTC0 INTC0 0 1 read-write INTC1 INTC1 1 1 read-write INTOFC INTOFC 2 1 read-write INTSTERR INTSTERR 4 1 read-write INTUFC INTUFC 3 1 read-write TMRA T32A Counter Capture Register A 0x5C 32 read-only n 0x0 0x0 TMRA TMRA 0 16 read-only TMRB T32A Counter Capture Register B 0x9C 32 read-only n 0x0 0x0 TMRB TMRB 0 16 read-only TMRC T32A Counter Capture Register C 0xDC 32 read-only n 0x0 0x0 TMRC TMRC 0 32 read-only T32A5 32-bit Timer Event Counter (T32A) T32A0 0x0 0x0 0x4 registers n 0x4 0x3C reserved n 0x40 0xC4 registers n CAPA0 T32A Capture Register A0 0x6C 32 read-only n 0x0 0x0 CAPA0 CAPA0 0 16 read-only CAPA1 T32A Capture Register A1 0x70 32 read-only n 0x0 0x0 CAPA1 CAPA1 0 16 read-only CAPB0 T32A Capture Register B0 0xAC 32 read-only n 0x0 0x0 CAPB0 CAPB0 0 16 read-only CAPB1 T32A Capture Register B1 0xB0 32 read-only n 0x0 0x0 CAPB1 CAPB1 0 16 read-only CAPC0 T32A Capture Register C0 0xEC 32 read-only n 0x0 0x0 CAPC0 CAPC0 0 32 read-only CAPC1 T32A Capture Register C1 0xF0 32 read-only n 0x0 0x0 CAPC1 CAPC1 0 32 read-only CAPCRA T32A Capture Control Register A 0x48 32 read-write n 0x0 0x0 CAPMA0 CAPMA0 0 3 read-write CAPMA1 CAPMA1 4 3 read-write CAPCRB T32A Capture Control Register B 0x88 32 read-write n 0x0 0x0 CAPMB0 CAPMB0 0 3 read-write CAPMB1 CAPMB1 4 3 read-write CAPCRC T32A Capture Control Register C 0xC8 32 read-write n 0x0 0x0 CAPMC0 CAPMC0 0 3 read-write CAPMC1 CAPMC1 4 3 read-write CPA0 T32A Compare Register A0 0x78 32 read-only n 0x0 0x0 CRGA0 CRGA0 0 16 read-only CPA1 T32A Compare Register A1 0x7C 32 read-only n 0x0 0x0 CRGA1 CRGA1 0 16 read-only CPB0 T32A Compare Register B0 0xB8 32 read-only n 0x0 0x0 CRGB0 CRGB0 0 16 read-only CPB1 T32A Compare Register B1 0xBC 32 read-only n 0x0 0x0 CRGB1 CRGB1 0 16 read-only CPC0 T32A Compare Register C0 0xFC 32 read-only n 0x0 0x0 CRGC0 CRGC0 0 32 read-only CPC1 T32A Compare Register C1 0x100 32 read-only n 0x0 0x0 CRGC1 CRGC1 0 32 read-only CRA T32A Control Register A 0x44 32 read-write n 0x0 0x0 CLKA CLKA 24 3 read-write PRSCLA PRSCLA 28 3 read-write RELDA RELDA 8 3 read-write STARTA STARTA 0 3 read-write STOPA STOPA 4 3 read-write UPDNA UPDNA 16 2 read-write WBFA WBFA 20 1 read-write CRB T32A Control Register B 0x84 32 read-write n 0x0 0x0 CLKB CLKB 24 3 read-write PRSCLB PRSCLB 28 3 read-write RELDB RELDB 8 3 read-write STARTB STARTB 0 3 read-write STOPB STOPB 4 3 read-write UPDNB UPDNB 16 2 read-write WBFB WBFB 20 1 read-write CRC T32A Control Register C 0xC4 32 read-write n 0x0 0x0 CLKC CLKC 24 3 read-write PRSCLC PRSCLC 28 3 read-write RELDC RELDC 8 3 read-write STARTC STARTC 0 3 read-write STOPC STOPC 4 3 read-write UPDNC UPDNC 16 2 read-write WBFC WBFC 20 1 read-write DMAA T32A DMA Request Enable Register A 0x74 32 read-write n 0x0 0x0 DMAENA0 DMAENA0 0 1 read-write DMAENA1 DMAENA1 1 1 read-write DMAENA2 DMAENA2 2 1 read-write DMAB T32A DMA Request Enable Register B 0xB4 32 read-write n 0x0 0x0 DMAENB0 DMAENB0 0 1 read-write DMAENB1 DMAENB1 1 1 read-write DMAENB2 DMAENB2 2 1 read-write DMAC T32A DMA Request Enable Register C 0xF4 32 read-write n 0x0 0x0 DMAENC0 DMAENC0 0 1 read-write DMAENC1 DMAENC1 1 1 read-write DMAENC2 DMAENC2 2 1 read-write IMA T32A Interrupt Mask Register A 0x58 32 read-write n 0x0 0x0 IMA0 IMA0 0 1 read-write IMA1 IMA1 1 1 read-write IMOFA IMOFA 2 1 read-write IMUFA IMUFA 3 1 read-write IMB T32A Interrupt Mask Register B 0x98 32 read-write n 0x0 0x0 IMB0 IMB0 0 1 read-write IMB1 IMB1 1 1 read-write IMOFB IMOFB 2 1 read-write IMUFB IMUFB 3 1 read-write IMC T32A Interrupt Mask Register C 0xD8 32 read-write n 0x0 0x0 IMC0 IMC0 0 1 read-write IMC1 IMC1 1 1 read-write IMOFC IMOFC 2 1 read-write IMSTERR IMSTERR 4 1 read-write IMUFC IMUFC 3 1 read-write MOD T32A Mode Register 0x0 32 read-write n 0x0 0x0 HALT HALT 1 1 read-write MODE32 MODE32 0 1 read-write OUTCRA0 T32A Output Control Register A0 0x4C 32 write-only n 0x0 0x0 OCRA OCRA 0 2 write-only OUTCRA1 T32A Output Control Register A1 0x50 32 read-write n 0x0 0x0 OCRCAPA0 OCRCAPA0 4 2 read-write OCRCAPA1 OCRCAPA1 6 2 read-write OCRCMPA0 OCRCMPA0 0 2 read-write OCRCMPA1 OCRCMPA1 2 2 read-write OUTCRB0 T32A Output Control Register B0 0x8C 32 write-only n 0x0 0x0 OCRB OCRB 0 2 write-only OUTCRB1 T32A Output Control Register B1 0x90 32 read-write n 0x0 0x0 OCRCAPB0 OCRCAPB0 4 2 read-write OCRCAPB1 OCRCAPB1 6 2 read-write OCRCMPB0 OCRCMPB0 0 2 read-write OCRCMPB1 OCRCMPB1 2 2 read-write OUTCRC0 T32A Output Control Register C0 0xCC 32 write-only n 0x0 0x0 OCRC OCRC 0 2 write-only OUTCRC1 T32A Output Control Register C1 0xD0 32 read-write n 0x0 0x0 OCRCAPC0 OCRCAPC0 4 2 read-write OCRCAPC1 OCRCAPC1 6 2 read-write OCRCMPC0 OCRCMPC0 0 2 read-write OCRCMPC1 OCRCMPC1 2 2 read-write PLSCR T32A Pulse Count Control Register 0xF8 32 read-write n 0x0 0x0 NF NF 4 2 read-write PDIR PDIR 1 1 read-write PDN PDN 12 3 read-write PMODE PMODE 0 1 read-write PUP PUP 8 3 read-write RELDA T32A Reload Register A 0x60 32 read-write n 0x0 0x0 RELDA RELDA 0 16 read-write RELDB T32A Reload Register B 0xA0 32 read-write n 0x0 0x0 RELDB RELDB 0 16 read-write RELDC T32A Reload Register C 0xE0 32 read-write n 0x0 0x0 RELDC RELDC 0 32 read-write RGA0 T32A Timer Register A0 0x64 32 read-write n 0x0 0x0 RGA0 RGA0 0 16 read-write RGA1 T32A Timer Register A1 0x68 32 read-write n 0x0 0x0 RGA1 RGA1 0 16 read-write RGB0 T32A Timer Register B0 0xA4 32 read-write n 0x0 0x0 RGB0 RGB0 0 16 read-write RGB1 T32A Timer Register B1 0xA8 32 read-write n 0x0 0x0 RGB1 RGB1 0 16 read-write RGC0 T32A Timer Register C0 0xE4 32 read-write n 0x0 0x0 RGC0 RGC0 0 32 read-write RGC1 T32A Timer Register C1 0xE8 32 read-write n 0x0 0x0 RGC1 RGC1 0 32 read-write RUNA T32A Run Register A 0x40 32 read-write n 0x0 0x0 RUNA RUNA 0 1 read-write RUNFLGA RUNFLGA 4 1 read-only SFTSTAA SFTSTAA 1 1 write-only SFTSTPA SFTSTPA 2 1 write-only RUNB T32A Run Register B 0x80 32 read-write n 0x0 0x0 RUNB RUNB 0 1 read-write RUNFLGB RUNFLGB 4 1 read-only SFTSTAB SFTSTAB 1 1 write-only SFTSTPB SFTSTPB 2 1 write-only RUNC T32A Run Register C 0xC0 32 read-write n 0x0 0x0 RUNC RUNC 0 1 read-write RUNFLGC RUNFLGC 4 1 read-only SFTSTAC SFTSTAC 1 1 write-only SFTSTPC SFTSTPC 2 1 write-only STA T32A Status Register A 0x54 32 read-write n 0x0 0x0 INTA0 INTA0 0 1 read-write INTA1 INTA1 1 1 read-write INTOFA INTOFA 2 1 read-write INTUFA INTUFA 3 1 read-write STB T32A Status Register B 0x94 32 read-write n 0x0 0x0 INTB0 INTB0 0 1 read-write INTB1 INTB1 1 1 read-write INTOFB INTOFB 2 1 read-write INTUFB INTUFB 3 1 read-write STC T32A Status Register C 0xD4 32 read-write n 0x0 0x0 INTC0 INTC0 0 1 read-write INTC1 INTC1 1 1 read-write INTOFC INTOFC 2 1 read-write INTSTERR INTSTERR 4 1 read-write INTUFC INTUFC 3 1 read-write TMRA T32A Counter Capture Register A 0x5C 32 read-only n 0x0 0x0 TMRA TMRA 0 16 read-only TMRB T32A Counter Capture Register B 0x9C 32 read-only n 0x0 0x0 TMRB TMRB 0 16 read-only TMRC T32A Counter Capture Register C 0xDC 32 read-only n 0x0 0x0 TMRC TMRC 0 32 read-only TRM Trimming Circuit (TRM) TRM 0x0 0x0 0x8 registers n 0x10 0xC registers n 0x1C 0x4 reserved n 0x20 0xC registers n 0x8 0x8 reserved n OSCEN TRM Enable Register 0x4 32 read-write n 0x0 0x0 TRIMEN TRIMEN 0 1 read-write OSCINIT0 TRM Initial Trimming Value Monitor Register0 0x10 32 read-only n 0x0 0x0 TRIMINIT0 TRIMINIT0 1 8 read-only OSCINIT1 TRM Initial Trimming Value Monitor Register1 0x14 32 read-only n 0x0 0x0 TRIMINIT1 TRIMINIT1 0 32 read-only OSCINIT2 TRM Initial Trimming Value Monitor Register2 0x18 32 read-only n 0x0 0x0 TRIMINIT2 TRIMINIT2 0 32 read-only OSCPRO Protection Register 0x0 32 read-write n 0x0 0x0 PROTECT PROTECT 0 8 read-write OSCSET0 TRM User Trimming Value Setting Register0 0x20 32 read-write n 0x0 0x0 TRIMSET0 TRIMSET0 1 8 read-write OSCSET1 TRM User Trimming Value Setting Register1 0x24 32 read-write n 0x0 0x0 TRIMSET1 TRIMSET1 0 32 read-write OSCSET2 TRM User Trimming Value Setting Register2 0x28 32 read-write n 0x0 0x0 TRIMSET2 TRIMSET2 0 32 read-write TSEL Trigger Selection circuit (TSEL) TSEL 0x0 0x0 0x2C registers n CR0 TRGSEL Control register 0 0x0 32 read-write n 0x0 0x0 EN0 EN0 0 1 read-write EN1 EN1 8 1 read-write EN2 EN2 16 1 read-write EN3 EN3 24 1 read-write INSEL0 INSEL0 4 3 read-write INSEL1 INSEL1 12 3 read-write INSEL2 INSEL2 20 3 read-write INSEL3 INSEL3 28 3 read-write OUTSEL0 OUTSEL0 1 1 read-write OUTSEL1 OUTSEL1 9 1 read-write OUTSEL2 OUTSEL2 17 1 read-write OUTSEL3 OUTSEL3 25 1 read-write UPDN0 UPDN0 2 1 read-write UPDN1 UPDN1 10 1 read-write UPDN2 UPDN2 18 1 read-write UPDN3 UPDN3 26 1 read-write CR1 TRGSEL Control register 1 0x4 32 read-write n 0x0 0x0 EN4 EN4 0 1 read-write EN5 EN5 8 1 read-write EN6 EN6 16 1 read-write EN7 EN7 24 1 read-write INSEL4 INSEL4 4 3 read-write INSEL5 INSEL5 12 3 read-write INSEL6 INSEL6 20 3 read-write INSEL7 INSEL7 28 3 read-write OUTSEL4 OUTSEL4 1 1 read-write OUTSEL5 OUTSEL5 9 1 read-write OUTSEL6 OUTSEL6 17 1 read-write OUTSEL7 OUTSEL7 25 1 read-write UPDN4 UPDN4 2 1 read-write UPDN5 UPDN5 10 1 read-write UPDN6 UPDN6 18 1 read-write UPDN7 UPDN7 26 1 read-write CR10 TRGSEL Control register 10 0x28 32 read-write n 0x0 0x0 EN40 EN40 0 1 read-write EN41 EN41 8 1 read-write EN42 EN42 16 1 read-write INSEL40 INSEL40 4 3 read-write INSEL41 INSEL41 12 3 read-write INSEL42 INSEL42 20 3 read-write OUTSEL40 OUTSEL40 1 1 read-write OUTSEL41 OUTSEL41 9 1 read-write OUTSEL42 OUTSEL42 17 1 read-write UPDN40 UPDN40 2 1 read-write UPDN41 UPDN41 10 1 read-write UPDN42 UPDN42 18 1 read-write CR2 TRGSEL Control register 2 0x8 32 read-write n 0x0 0x0 EN10 EN10 16 1 read-write EN11 EN11 24 1 read-write EN8 EN8 0 1 read-write EN9 EN9 8 1 read-write INSEL10 INSEL10 20 3 read-write INSEL11 INSEL11 28 3 read-write INSEL8 INSEL8 4 3 read-write INSEL9 INSEL9 12 3 read-write OUTSEL10 OUTSEL10 17 1 read-write OUTSEL11 OUTSEL11 25 1 read-write OUTSEL8 OUTSEL8 1 1 read-write OUTSEL9 OUTSEL9 9 1 read-write UPDN10 UPDN10 18 1 read-write UPDN11 UPDN11 26 1 read-write UPDN8 UPDN8 2 1 read-write UPDN9 UPDN9 10 1 read-write CR3 TRGSEL Control register 3 0xC 32 read-write n 0x0 0x0 EN12 EN12 0 1 read-write EN13 EN13 8 1 read-write EN14 EN14 16 1 read-write EN15 EN15 24 1 read-write INSEL12 INSEL12 4 3 read-write INSEL13 INSEL13 12 3 read-write INSEL14 INSEL14 20 3 read-write INSEL15 INSEL15 28 3 read-write OUTSEL12 OUTSEL12 1 1 read-write OUTSEL13 OUTSEL13 9 1 read-write OUTSEL14 OUTSEL14 17 1 read-write OUTSEL15 OUTSEL15 25 1 read-write UPDN12 UPDN12 2 1 read-write UPDN13 UPDN13 10 1 read-write UPDN14 UPDN14 18 1 read-write UPDN15 UPDN15 26 1 read-write CR4 TRGSEL Control register 4 0x10 32 read-write n 0x0 0x0 EN16 EN16 0 1 read-write EN17 EN17 8 1 read-write EN18 EN18 16 1 read-write EN19 EN19 24 1 read-write INSEL16 INSEL16 4 3 read-write INSEL17 INSEL17 12 3 read-write INSEL18 INSEL18 20 3 read-write INSEL19 INSEL19 28 3 read-write OUTSEL16 OUTSEL16 1 1 read-write OUTSEL17 OUTSEL17 9 1 read-write OUTSEL18 OUTSEL18 17 1 read-write OUTSEL19 OUTSEL19 25 1 read-write UPDN16 UPDN16 2 1 read-write UPDN17 UPDN17 10 1 read-write UPDN18 UPDN18 18 1 read-write UPDN19 UPDN19 26 1 read-write CR5 TRGSEL Control register 5 0x14 32 read-write n 0x0 0x0 EN20 EN20 0 1 read-write EN21 EN21 8 1 read-write EN22 EN22 16 1 read-write EN23 EN23 24 1 read-write INSEL20 INSEL20 4 3 read-write INSEL21 INSEL21 12 3 read-write INSEL22 INSEL22 20 3 read-write INSEL23 INSEL23 28 3 read-write OUTSEL20 OUTSEL20 1 1 read-write OUTSEL21 OUTSEL21 9 1 read-write OUTSEL22 OUTSEL22 17 1 read-write OUTSEL23 OUTSEL23 25 1 read-write UPDN20 UPDN20 2 1 read-write UPDN21 UPDN21 10 1 read-write UPDN22 UPDN22 18 1 read-write UPDN23 UPDN23 26 1 read-write CR6 TRGSEL Control register 6 0x18 32 read-write n 0x0 0x0 EN24 EN24 0 1 read-write EN25 EN25 8 1 read-write EN26 EN26 16 1 read-write EN27 EN27 24 1 read-write INSEL24 INSEL24 4 3 read-write INSEL25 INSEL25 12 3 read-write INSEL26 INSEL26 20 3 read-write INSEL27 INSEL27 28 3 read-write OUTSEL24 OUTSEL24 1 1 read-write OUTSEL25 OUTSEL25 9 1 read-write OUTSEL26 OUTSEL26 17 1 read-write OUTSEL27 OUTSEL27 25 1 read-write UPDN24 UPDN24 2 1 read-write UPDN25 UPDN25 10 1 read-write UPDN26 UPDN26 18 1 read-write UPDN27 UPDN27 26 1 read-write CR7 TRGSEL Control register 7 0x1C 32 read-write n 0x0 0x0 EN28 EN28 0 1 read-write EN29 EN29 8 1 read-write EN30 EN30 16 1 read-write EN31 EN31 24 1 read-write INSEL28 INSEL28 4 3 read-write INSEL29 INSEL29 12 3 read-write INSEL30 INSEL30 20 3 read-write INSEL31 INSEL31 28 3 read-write OUTSEL28 OUTSEL28 1 1 read-write OUTSEL29 OUTSEL29 9 1 read-write OUTSEL30 OUTSEL30 17 1 read-write OUTSEL31 OUTSEL31 25 1 read-write UPDN28 UPDN28 2 1 read-write UPDN29 UPDN29 10 1 read-write UPDN30 UPDN30 18 1 read-write UPDN31 UPDN31 26 1 read-write CR8 TRGSEL Control register 8 0x20 32 read-write n 0x0 0x0 EN32 EN32 0 1 read-write EN33 EN33 8 1 read-write EN34 EN34 16 1 read-write EN35 EN35 24 1 read-write INSEL32 INSEL32 4 3 read-write INSEL33 INSEL33 12 3 read-write INSEL34 INSEL34 20 3 read-write INSEL35 INSEL35 28 3 read-write OUTSEL32 OUTSEL32 1 1 read-write OUTSEL33 OUTSEL33 9 1 read-write OUTSEL34 OUTSEL34 17 1 read-write OUTSEL35 OUTSEL35 25 1 read-write UPDN32 UPDN32 2 1 read-write UPDN33 UPDN33 10 1 read-write UPDN34 UPDN34 18 1 read-write UPDN35 UPDN35 26 1 read-write CR9 TRGSEL Control register 9 0x24 32 read-write n 0x0 0x0 EN36 EN36 0 1 read-write EN37 EN37 8 1 read-write EN38 EN38 16 1 read-write EN39 EN39 24 1 read-write INSEL36 INSEL36 4 3 read-write INSEL37 INSEL37 12 3 read-write INSEL38 INSEL38 20 3 read-write INSEL39 INSEL39 28 3 read-write OUTSEL36 OUTSEL36 1 1 read-write OUTSEL37 OUTSEL37 9 1 read-write OUTSEL38 OUTSEL38 17 1 read-write OUTSEL39 OUTSEL39 25 1 read-write UPDN36 UPDN36 2 1 read-write UPDN37 UPDN37 10 1 read-write UPDN38 UPDN38 18 1 read-write UPDN39 UPDN39 26 1 read-write TSPI Serial Peripheral Interface (TSPI) TSPI 0x0 0x0 0x24 registers n 0x100 0x4 registers n 0x104 0xFC reserved n 0x200 0x8 registers n 0x24 0xDC reserved n BR TSPI Baud Rate Generator Control Register 0x10 32 read-write n 0x0 0x0 BRCK BRCK 4 4 read-write BRS BRS 0 4 read-write CR0 TSPI Control Register 0 0x0 32 read-write n 0x0 0x0 SWRST SWRST 6 2 write-only TSPIE TSPIE 0 1 read-write CR1 TSPI Control Register 1 0x4 32 read-write n 0x0 0x0 CSSEL CSSEL 8 2 read-write FC FC 0 8 read-write INF INF 16 1 read-write MSTR MSTR 12 1 read-write TMMD TMMD 10 2 read-write TRGEN TRGEN 15 1 read-write TRXE TRXE 14 1 read-write TSPIMS TSPIMS 13 1 read-write CR2 TSPI Control Register 2 0x8 32 read-write n 0x0 0x0 DMARE DMARE 0 1 read-write DMATE DMATE 1 1 read-write INTERR INTERR 2 1 read-write INTRXFE INTRXFE 5 1 read-write INTRXWE INTRXWE 4 1 read-write INTTXFE INTTXFE 7 1 read-write INTTXWE INTTXWE 6 1 read-write RIL RIL 8 4 read-write RXDLY RXDLY 16 3 read-write TIDLE TIDLE 22 2 read-write TIL TIL 12 4 read-write TXDEMP TXDEMP 21 1 read-write CR3 TSPI Control Register 3 0xC 32 read-write n 0x0 0x0 RFFLLCLR RFFLLCLR 0 1 write-only TFEMPCLR TFEMPCLR 1 1 write-only DR TSPI Data Register 0x100 32 read-write n 0x0 0x0 TSPIDR TSPIDR 0 32 read-write ERR TSPI Parity Error Flag Register 0x204 32 read-write n 0x0 0x0 OVRERR OVRERR 1 1 read-write PERR PERR 0 1 read-write TRGERR TRGERR 3 1 read-write UDRERR UDRERR 2 1 read-write FMTR0 TSPI Format Control Register 0 0x14 32 read-write n 0x0 0x0 CKPHA CKPHA 15 1 read-write CKPOL CKPOL 14 1 read-write CS0POL CS0POL 16 1 read-write CS1POL CS1POL 17 1 read-write CS2POL CS2POL 18 1 read-write CS3POL CS3POL 19 1 read-write CSINT CSINT 10 4 read-write CSSCKDL CSSCKDL 4 4 read-write DIR DIR 31 1 read-write FINT FINT 20 4 read-write FL FL 24 6 read-write SCKCSDL SCKCSDL 0 4 read-write FMTR1 TSPI Format Control Register 1 0x18 32 read-write n 0x0 0x0 EHOLD EHOLD 4 3 read-write VPE VPE 1 1 read-write VPM VPM 0 1 read-write SECTCR0 TSPI Sector Mode Control Register 0 0x1C 32 read-write n 0x0 0x0 SECT SECT 0 1 read-write SECTCR1 TSPI Sector Mode Control Register 1 0x20 32 read-write n 0x0 0x0 SECTL0 SECTL0 0 6 read-write SECTL1 SECTL1 8 6 read-write SECTL2 SECTL2 16 6 read-write SECTL3 SECTL3 24 6 read-write SR TSPI Status Register 0x200 32 read-write n 0x0 0x0 INTRXFF INTRXFF 5 1 read-write INTTXWF INTTXWF 21 1 read-write RFFLL RFFLL 4 1 read-only RLVL RLVL 0 4 read-only RXEND RXEND 6 1 read-write RXRUN RXRUN 7 1 read-only TFEMP TFEMP 20 1 read-only TLVL TLVL 16 4 read-only TSPISUE TSPISUE 31 1 read-only TXEND TXEND 22 1 read-write TXRUN TXRUN 23 1 read-only UART0 Asynchronous Serial Communication Circuit (UART) UART0 0x0 0x0 0x28 registers n BRD UART Baud Rate Register 0x10 32 read-write n 0x0 0x0 BRK BRK 16 6 read-write BRN BRN 0 16 read-write KEN KEN 23 1 read-write CLK UART Clock Control Register 0xC 32 read-write n 0x0 0x0 PRSEL PRSEL 4 4 read-write CR0 UART Control Register 0 0x4 32 read-write n 0x0 0x0 CTSE CTSE 10 1 read-write DIR DIR 5 1 read-write EVEN EVEN 3 1 read-write HBSEN HBSEN 16 1 read-write HBSMD HBSMD 17 1 read-write HBSST HBSST 18 1 read-write IV IV 6 1 read-write LPB LPB 15 1 read-write NF NF 12 3 read-write PE PE 2 1 read-write RTSE RTSE 9 1 read-write SBLEN SBLEN 4 1 read-write SM SM 0 2 read-write WU WU 8 1 read-write CR1 UART Control Register 1 0x8 32 read-write n 0x0 0x0 DMARE DMARE 0 1 read-write DMATE DMATE 1 1 read-write INTERR INTERR 2 1 read-write INTRXFE INTRXFE 5 1 read-write INTRXWE INTRXWE 4 1 read-write INTTXFE INTTXFE 7 1 read-write INTTXWE INTTXWE 6 1 read-write RIL RIL 8 3 read-write TIL TIL 12 3 read-write DR UART Data Register 0x18 32 read-write n 0x0 0x0 BERR BERR 16 1 read-only DR DR 0 9 read-write FERR FERR 17 1 read-only PERR PERR 18 1 read-only ERR UART Error Register 0x24 32 read-write n 0x0 0x0 BERR BERR 0 1 read-write FERR FERR 1 1 read-write OVRERR OVRERR 3 1 read-write PERR PERR 2 1 read-write TRGERR TRGERR 4 1 read-write FIFOCLR UART FIFO Clear Register 0x20 32 write-only n 0x0 0x0 RFCLR RFCLR 0 1 write-only TFCLR TFCLR 1 1 write-only SR UART Status Register 0x1C 32 read-write n 0x0 0x0 RLVL RLVL 0 4 read-only RXEND RXEND 6 1 read-write RXFF RXFF 5 1 read-write RXRUN RXRUN 7 1 read-only SUE SUE 31 1 read-only TLVL TLVL 8 4 read-only TXEND TXEND 14 1 read-write TXFF TXFF 13 1 read-write TXRUN TXRUN 15 1 read-only SWRST UART Software Reset Register 0x0 32 read-write n 0x0 0x0 SWRST SWRST 0 2 write-only SWRSTF SWRSTF 7 1 read-only TRANS UART Transfer Enable Register 0x14 32 read-write n 0x0 0x0 BK BK 3 1 read-write RXE RXE 0 1 read-write TXE TXE 1 1 read-write TXTRG TXTRG 2 1 read-write UART1 Asynchronous Serial Communication Circuit (UART) UART0 0x0 0x0 0x28 registers n BRD UART Baud Rate Register 0x10 32 read-write n 0x0 0x0 BRK BRK 16 6 read-write BRN BRN 0 16 read-write KEN KEN 23 1 read-write CLK UART Clock Control Register 0xC 32 read-write n 0x0 0x0 PRSEL PRSEL 4 4 read-write CR0 UART Control Register 0 0x4 32 read-write n 0x0 0x0 CTSE CTSE 10 1 read-write DIR DIR 5 1 read-write EVEN EVEN 3 1 read-write HBSEN HBSEN 16 1 read-write HBSMD HBSMD 17 1 read-write HBSST HBSST 18 1 read-write IV IV 6 1 read-write LPB LPB 15 1 read-write NF NF 12 3 read-write PE PE 2 1 read-write RTSE RTSE 9 1 read-write SBLEN SBLEN 4 1 read-write SM SM 0 2 read-write WU WU 8 1 read-write CR1 UART Control Register 1 0x8 32 read-write n 0x0 0x0 DMARE DMARE 0 1 read-write DMATE DMATE 1 1 read-write INTERR INTERR 2 1 read-write INTRXFE INTRXFE 5 1 read-write INTRXWE INTRXWE 4 1 read-write INTTXFE INTTXFE 7 1 read-write INTTXWE INTTXWE 6 1 read-write RIL RIL 8 3 read-write TIL TIL 12 3 read-write DR UART Data Register 0x18 32 read-write n 0x0 0x0 BERR BERR 16 1 read-only DR DR 0 9 read-write FERR FERR 17 1 read-only PERR PERR 18 1 read-only ERR UART Error Register 0x24 32 read-write n 0x0 0x0 BERR BERR 0 1 read-write FERR FERR 1 1 read-write OVRERR OVRERR 3 1 read-write PERR PERR 2 1 read-write TRGERR TRGERR 4 1 read-write FIFOCLR UART FIFO Clear Register 0x20 32 write-only n 0x0 0x0 RFCLR RFCLR 0 1 write-only TFCLR TFCLR 1 1 write-only SR UART Status Register 0x1C 32 read-write n 0x0 0x0 RLVL RLVL 0 4 read-only RXEND RXEND 6 1 read-write RXFF RXFF 5 1 read-write RXRUN RXRUN 7 1 read-only SUE SUE 31 1 read-only TLVL TLVL 8 4 read-only TXEND TXEND 14 1 read-write TXFF TXFF 13 1 read-write TXRUN TXRUN 15 1 read-only SWRST UART Software Reset Register 0x0 32 read-write n 0x0 0x0 SWRST SWRST 0 2 write-only SWRSTF SWRSTF 7 1 read-only TRANS UART Transfer Enable Register 0x14 32 read-write n 0x0 0x0 BK BK 3 1 read-write RXE RXE 0 1 read-write TXE TXE 1 1 read-write TXTRG TXTRG 2 1 read-write UART2 Asynchronous Serial Communication Circuit (UART) UART0 0x0 0x0 0x28 registers n BRD UART Baud Rate Register 0x10 32 read-write n 0x0 0x0 BRK BRK 16 6 read-write BRN BRN 0 16 read-write KEN KEN 23 1 read-write CLK UART Clock Control Register 0xC 32 read-write n 0x0 0x0 PRSEL PRSEL 4 4 read-write CR0 UART Control Register 0 0x4 32 read-write n 0x0 0x0 CTSE CTSE 10 1 read-write DIR DIR 5 1 read-write EVEN EVEN 3 1 read-write HBSEN HBSEN 16 1 read-write HBSMD HBSMD 17 1 read-write HBSST HBSST 18 1 read-write IV IV 6 1 read-write LPB LPB 15 1 read-write NF NF 12 3 read-write PE PE 2 1 read-write RTSE RTSE 9 1 read-write SBLEN SBLEN 4 1 read-write SM SM 0 2 read-write WU WU 8 1 read-write CR1 UART Control Register 1 0x8 32 read-write n 0x0 0x0 DMARE DMARE 0 1 read-write DMATE DMATE 1 1 read-write INTERR INTERR 2 1 read-write INTRXFE INTRXFE 5 1 read-write INTRXWE INTRXWE 4 1 read-write INTTXFE INTTXFE 7 1 read-write INTTXWE INTTXWE 6 1 read-write RIL RIL 8 3 read-write TIL TIL 12 3 read-write DR UART Data Register 0x18 32 read-write n 0x0 0x0 BERR BERR 16 1 read-only DR DR 0 9 read-write FERR FERR 17 1 read-only PERR PERR 18 1 read-only ERR UART Error Register 0x24 32 read-write n 0x0 0x0 BERR BERR 0 1 read-write FERR FERR 1 1 read-write OVRERR OVRERR 3 1 read-write PERR PERR 2 1 read-write TRGERR TRGERR 4 1 read-write FIFOCLR UART FIFO Clear Register 0x20 32 write-only n 0x0 0x0 RFCLR RFCLR 0 1 write-only TFCLR TFCLR 1 1 write-only SR UART Status Register 0x1C 32 read-write n 0x0 0x0 RLVL RLVL 0 4 read-only RXEND RXEND 6 1 read-write RXFF RXFF 5 1 read-write RXRUN RXRUN 7 1 read-only SUE SUE 31 1 read-only TLVL TLVL 8 4 read-only TXEND TXEND 14 1 read-write TXFF TXFF 13 1 read-write TXRUN TXRUN 15 1 read-only SWRST UART Software Reset Register 0x0 32 read-write n 0x0 0x0 SWRST SWRST 0 2 write-only SWRSTF SWRSTF 7 1 read-only TRANS UART Transfer Enable Register 0x14 32 read-write n 0x0 0x0 BK BK 3 1 read-write RXE RXE 0 1 read-write TXE TXE 1 1 read-write TXTRG TXTRG 2 1 read-write VE Advanced Vector Engine Plus (A-VE+) VE 0x0 0x0 0x28 registers n 0x178 0x24 registers n 0x19C 0x20 reserved n 0x1BC 0x8C registers n 0x28 0x4 reserved n 0x2C 0xB0 registers n 0xDC 0x9C reserved n ACTSCH Operation schedule selection 0xC 32 read-write n 0x0 0x0 VACT VACT 0 4 read-write CIDKG PI controlled d-axis coefficient range setting 0x1C0 32 read-write n 0x0 0x0 CIDKIG CIDKIG 0 8 read-write CIDKPG CIDKPG 8 8 read-write CIDKI Integral coefficient for PI control of d-axis 0x6C 32 read-write n 0x0 0x0 CIDKI CIDKI 0 16 read-write CIDKP Proportional coefficient for PI control of d-axis 0x70 32 read-write n 0x0 0x0 CIDKP CIDKP 0 16 read-write CIQKG PI controlled q-axis coefficient range setting 0x1C4 32 read-write n 0x0 0x0 CIQKIG CIQKIG 0 8 read-write CIQKPG CIQKPG 8 8 read-write CIQKI Integral coefficient for PI control of q-axis 0x74 32 read-write n 0x0 0x0 CIQKI CIQKI 0 16 read-write CIQKP Proportional coefficient for PI control of q-axis 0x78 32 read-write n 0x0 0x0 CIQKP CIQKP 0 16 read-write CLD Motor q-axis inductance 0x1D8 32 read-write n 0x0 0x0 CLD CLD 0 16 read-write CLG Motor inductance range setting 0x1E8 32 read-write n 0x0 0x0 CLG CLG 0 3 read-write CLQ Motor d-axis inductance 0x1DC 32 read-write n 0x0 0x0 CLQ CLQ 0 16 read-write CMPU PMD control_ CMPU setting 0x17C 32 read-write n 0x0 0x0 VCMPU VCMPU 0 16 read-write CMPV PMD control_ CMPV setting 0x180 32 read-write n 0x0 0x0 VCMPV VCMPV 0 16 read-write CMPW PMD control_ CMPW setting 0x184 32 read-write n 0x0 0x0 VCMPW VCMPW 0 16 read-write COMPEND VE forced termination 0x1C 32 write-only n 0x0 0x0 VCEND VCEND 0 1 write-only COS Cosine value at THETA for output conversion (Q15 data) 0xA0 32 read-write n 0x0 0x0 COS COS 0 16 read-write COSM Previous cosine value for input processing (Q15 data) 0xA8 32 read-write n 0x0 0x0 COSM COSM 0 16 read-write CPHI Motor interlinkage magnetic flux 0x1D4 32 read-write n 0x0 0x0 CPHI CPHI 0 16 read-write CPHIG Motor magnetic flux range setting 0x1E4 32 read-write n 0x0 0x0 CPHIG CPHIG 0 3 read-write CPURUNTRG CPU start trigger selection 0x4 32 write-only n 0x0 0x0 VCPURT VCPURT 0 1 write-only CR Motor resistance value 0x1E0 32 read-write n 0x0 0x0 CR CR 0 16 read-write CRG Motor resistance range setting 0x1EC 32 read-write n 0x0 0x0 CRG CRG 0 3 read-write DELTA Declination angle 0x1D0 32 read-write n 0x0 0x0 DELTA DELTA 0 16 read-write DTC Dead time compensation 0x1F8 32 read-write n 0x0 0x0 DTC DTC 0 16 read-write DTCS Dead time compensation control _ status 0x200 32 read-write n 0x0 0x0 IASTS IASTS 0 3 read-write IBSTS IBSTS 4 3 read-write ICSTS ICSTS 8 3 read-write EMGRS PMD control_ EMG return (EMGCR_EMGRS_) 0x198 32 write-only n 0x0 0x0 EMGRS EMGRS 0 1 write-only EN VE enable_disable 0x0 32 read-write n 0x0 0x0 VEEN VEEN 0 1 read-write ERRDET Error detection 0x20 32 read-only n 0x0 0x0 VERRD VERRD 0 1 read-only ERRINTEN Error interrupt enable_disable 0x18 32 read-write n 0x0 0x0 INTTEN INTTEN 2 1 read-write VERREN VERREN 0 1 read-write FMODE Flow control 0x4C 32 read-write n 0x0 0x0 C2PEN C2PEN 0 1 read-write CCVMD CCVMD 13 1 read-write CRCEN CRCEN 8 1 read-write IAPLMD IAPLMD 5 1 read-write IBPLMD IBPLMD 6 1 read-write ICPLMD ICPLMD 7 1 read-write IDMODE IDMODE 2 2 read-write IDQSEL IDQSEL 4 1 read-write MREGDIS MREGDIS 9 1 read-write PHCVDIS PHCVDIS 12 1 read-write SPWMEN SPWMEN 1 1 read-write SPWMMD SPWMMD 14 2 read-write VSLIMMD VSLIMMD 10 2 read-write FPWMCHG Switching speed (for 2-phase modulation and shift PWM) 0x8C 32 read-write n 0x0 0x0 FPWMCHG FPWMCHG 0 16 read-write HYS Hysteresis width for current discrimination 0x1FC 32 read-write n 0x0 0x0 HYS HYS 0 16 read-write HYS2 The second threshold value for determining the current polarity 0x210 32 read-write n 0x0 0x0 HYS2 HYS2 0 16 read-write IA A-phase current 0x230 32 read-write n 0x0 0x0 IA IA 0 32 read-write IAADC AD conversion result of a-phase current 0xC4 32 read-write n 0x0 0x0 IAADC IAADC 0 16 read-write IALPHA ALPHA-phase current 0x228 32 read-write n 0x0 0x0 IALPHA IALPHA 0 32 read-write IAO AD conversion result of a-phase zero-current 0xB8 32 read-write n 0x0 0x0 IAO IAO 0 16 read-write IB B-phase current 0x234 32 read-write n 0x0 0x0 IB IB 0 32 read-write IBADC AD conversion result of b-phase current 0xC8 32 read-write n 0x0 0x0 IBADC IBADC 0 16 read-write IBETA BETA-phase current 0x22C 32 read-write n 0x0 0x0 IBETA IBETA 0 32 read-write IBO AD conversion result of b-phase zero-current 0xBC 32 read-write n 0x0 0x0 IBO IBO 0 16 read-write IC C-phase current 0x238 32 read-write n 0x0 0x0 IC IC 0 32 read-write ICADC AD conversion result of c-phase current 0xCC 32 read-write n 0x0 0x0 ICADC ICADC 0 16 read-write ICO AD conversion result of c-phase zero-current 0xC0 32 read-write n 0x0 0x0 ICO ICO 0 16 read-write ID d-axis current (current _A_ _ maximum current * 2^31) 0xD4 32 read-write n 0x0 0x0 ID ID 0 32 read-write IDREF d-axis reference value (current _A_ _ maximum current * 2^15) 0x5C 32 read-write n 0x0 0x0 IDREF IDREF 0 16 read-write IQ q-axis current (current _A_ _ maximum current * 2^31) 0xD8 32 read-write n 0x0 0x0 IQ IQ 0 32 read-write IQREF q-axis reference value (current _A_ _ maximum current * 2^15) 0x60 32 read-write n 0x0 0x0 IQREF IQREF 0 16 read-write MCTLF Status flags 0x44 32 read-write n 0x0 0x0 LAVF LAVF 0 1 read-write LAVFM LAVFM 1 1 read-write LVTF LVTF 2 1 read-write PIDOVF PIDOVF 8 1 read-write PIQOVF PIQOVF 9 1 read-write PLSLF PLSLF 4 1 read-write PLSLFM PLSLFM 5 1 read-write PWMOVF PWMOVF 11 1 read-write SFT2ST SFT2ST 14 1 read-write SFT2STM SFT2STM 15 1 read-write VSOVF VSOVF 10 1 read-write MINPLS Minimum pulse width 0x94 32 read-write n 0x0 0x0 MINPLS MINPLS 0 16 read-write MODE Task control mode 0x48 32 read-write n 0x0 0x0 ATANMD ATANMD 5 2 read-write AWUMD AWUMD 8 2 read-write CLPEN CLPEN 7 1 read-write IPDEN IPDEN 15 1 read-write NICEN NICEN 11 1 read-write OCRMD OCRMD 2 2 read-write PMDDTCEN PMDDTCEN 14 1 read-write PVIEN PVIEN 0 1 read-write PWMBLEN PWMBLEN 12 1 read-write PWMFLEN PWMFLEN 13 1 read-write T5ECEN T5ECEN 10 1 read-write VDCSEL VDCSEL 4 1 read-write ZIEN ZIEN 1 1 read-write OMEGA Rotation speed (speed _Hz_ _ maximum speed * 2^15) setting 0x54 32 read-write n 0x0 0x0 OMEGA OMEGA 0 16 read-write OUTCR PMD control_ Output control (MDOUT) 0x188 32 read-write n 0x0 0x0 UOC UOC 0 2 read-write UPWM UPWM 6 1 read-write VOC VOC 2 2 read-write VPWM VPWM 7 1 read-write WOC WOC 4 2 read-write WPWM WPWM 8 1 read-write PIOLIM PI controlled output limit value setting 0x1BC 32 read-write n 0x0 0x0 PIOLIM PIOLIM 0 16 read-write PWMMAX PWM upper limit setting 0x204 32 read-write n 0x0 0x0 PWMMAX PWMMAX 0 16 read-write PWMMIN PWM lower limit setting 0x208 32 read-write n 0x0 0x0 PWMMIN PWMMIN 0 16 read-write PWMOFS SHIFT2 PWM Offset register 0x90 32 read-write n 0x0 0x0 PWMOFS PWMOFS 0 16 read-write REPTIME Schedule repeat count 0x10 32 read-write n 0x0 0x0 VREP VREP 0 4 read-write SCHTASKRUN Schedule executing flag_executing task 0x24 32 read-only n 0x0 0x0 VRSCH VRSCH 0 1 read-only VRTASK VRTASK 1 4 read-only SECTOR Sector information (0-11) 0xB0 32 read-write n 0x0 0x0 SECTOR SECTOR 0 4 read-write SECTORM Previous sector information for input processing (0-11) 0xB4 32 read-write n 0x0 0x0 SECTORM SECTORM 0 4 read-write SIN Sine value at THETA for output conversion (Q15 data) 0xA4 32 read-write n 0x0 0x0 SIN SIN 0 16 read-write SINM Previous sine value for input processing (Q15 data) 0xAC 32 read-write n 0x0 0x0 SINM SINM 0 16 read-write TADC ADC start wait setting 0x178 32 read-write n 0x0 0x0 TADC TADC 0 16 read-write TASKAPP Task selection 0x8 32 read-write n 0x0 0x0 VITASK VITASK 8 4 read-write VTASK VTASK 0 4 read-write THETA Motor phase (motor phase _deg_ _ 360 * 2^16) setting 0x58 32 read-write n 0x0 0x0 THETA THETA 0 16 read-write THTCLP Clipped phase value setting 0x20C 32 read-write n 0x0 0x0 THTCLP THTCLP 0 16 read-write TMPREG0 Temporary register 0x2C 32 read-write n 0x0 0x0 TMPREG0 TMPREG0 0 32 read-write TMPREG1 Temporary register 0x30 32 read-write n 0x0 0x0 TMPREG1 TMPREG1 0 32 read-write TMPREG2 Temporary register 0x34 32 read-write n 0x0 0x0 TMPREG2 TMPREG2 0 32 read-write TMPREG3 Temporary register 0x38 32 read-write n 0x0 0x0 TMPREG3 TMPREG3 0 32 read-write TMPREG4 Temporary register 0x3C 32 read-write n 0x0 0x0 TMPREG4 TMPREG4 0 32 read-write TMPREG5 Temporary register 0x40 32 read-write n 0x0 0x0 TMPREG5 TMPREG5 0 32 read-write TPWM PWM period rate (PWM period _s_ * maximum speed * 2^16) setting 0x50 32 read-write n 0x0 0x0 TPWM TPWM 0 16 read-write TRGCMP0 PMD control_ TRGCMP0 setting 0x18C 32 read-write n 0x0 0x0 VTRGCMP0 VTRGCMP0 0 16 read-write TRGCMP1 PMD control_ TRGCMP1 setting 0x190 32 read-write n 0x0 0x0 VTRGCMP1 VTRGCMP1 0 16 read-write TRGCRC Synchronizing trigger correction value 0x98 32 read-write n 0x0 0x0 TRGCRC TRGCRC 0 16 read-write TRGMODE Start trigger mode 0x14 32 read-write n 0x0 0x0 VTRG VTRG 0 2 read-write TRGSEL PMD control_ Trigger selection 0x194 32 read-write n 0x0 0x0 VTRGSEL VTRGSEL 0 3 read-write VALPHA ALPHA-phase voltage 0x214 32 read-write n 0x0 0x0 VALPHA VALPHA 0 32 read-write VBETA BETA-phase voltage 0x218 32 read-write n 0x0 0x0 VBETA VBETA 0 32 read-write VD d-axis voltage (voltage _V_ _ maximum voltage * 2^31) 0x64 32 read-write n 0x0 0x0 VD VD 0 32 read-write VDC DC supply voltage (voltage _V_ _ maximum voltage * 2^15) 0xD0 32 read-write n 0x0 0x0 VDC VDC 0 16 read-write VDCL Cosine value at THETA for output conversion (Q15 data) 0x9C 32 read-write n 0x0 0x0 VDCL VDCL 0 16 read-write VDCRC d-axis voltage correction value 0x240 32 read-write n 0x0 0x0 VDCRC VDCRC 0 16 read-write VDE Non-interference controlled d-axis voltage 0x1F0 32 read-write n 0x0 0x0 VDE VDE 0 16 read-write VDELTA VDQ Declination angle 0x23C 32 read-write n 0x0 0x0 VDELTA VDELTA 0 16 read-write VDIH Upper 32 bits of integral term (VDI ) of d-axis voltage 0x7C 32 read-write n 0x0 0x0 VDIH VDIH 0 32 read-write VDILH Lower 32 bits of integral term (VDI) of d-axis voltage 0x80 32 read-write n 0x0 0x0 VDILH VDILH 16 16 read-write VDQ Voltage scalar 0x1CC 32 read-write n 0x0 0x0 VDQ VDQ 0 16 read-write VDUTYA A-phase duty 0x21C 32 read-write n 0x0 0x0 VDUTYA VDUTYA 0 32 read-write VDUTYB B-phase duty 0x220 32 read-write n 0x0 0x0 VDUTYB VDUTYB 0 32 read-write VDUTYC C-phase duty 0x224 32 read-write n 0x0 0x0 VDUTYC VDUTYC 0 32 read-write VQ q-axis voltage (voltage _V_ _ maximum voltage * 2^31) 0x68 32 read-write n 0x0 0x0 VQ VQ 0 32 read-write VQCRC q-axis voltage correction value 0x244 32 read-write n 0x0 0x0 VQCRC VQCRC 0 16 read-write VQE Non-interference controlled q-axis voltage 0x1F4 32 read-write n 0x0 0x0 VQE VQE 0 16 read-write VQIH Upper 32 bits of integral term (VQI) of q-axis voltage 0x84 32 read-write n 0x0 0x0 VQIH VQIH 0 32 read-write VQILH Lower 32 bits of integral term (VQI) of q-axis voltage 0x88 32 read-write n 0x0 0x0 VQILH VQILH 16 16 read-write VSLIM Voltage scalar limits 0x1C8 32 read-write n 0x0 0x0 VSLIM VSLIM 0 16 read-write