Toshiba
TC3567C
2024.04.29
TC3567C
CM0
r0p0
little
true
true
4
false
8
32
BluetoothCounter
Bluetooth Counter
BluetoothCounter
0x0
0x0
0x100
registers
n
LLC_BC_LATCH_MA
Holding Master Bit Counter
0x20
32
read-only
n
0x0
0x0
BCntMa_Hold
Master bit counter value. Master slot counter counts up every 1 micro seconds. When this value is 624, this value becomes 0 and SCntMa_Hold value counts up on next count up timing. Before reading this value, please set 0 (or arbitrary value) to LLCntHold.
0
10
read-write
Reserved0
Do not change the values.
10
32
read-only
LLC_LLCNT_HOLD_EN
Hold Bluetooth counter
0xC
32
read-write
n
0x0
0x0
LLCntHold
When 0 (or arbitrary value) is set this register, the following registers will hold the values: LLC_BC_LATCH_MA:Master Bit Counter LLC_SC_LATCH_MA:Master Slot Counter Before accessing LLC_BC_LATCH_MA or LLC_SC_LATCH_MA, please set 0 (or arbitrary value) to this register.
0
1
read-write
Reserved0
Do not change the values.
1
32
read-write
LLC_SC_LATCH_MA
Holding Master Slot Counter
0x24
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
27
32
read-write
SCntMa_Hold
Master slot counter value. Master slot counter counts up every 1 slot (625 micro seconds). Before reading this value, please set 0 (or arbitrary value) to LLCntHold.
0
27
read-write
Clock
Clock Supply for SPI and PWM
Clock
0x0
0x0
0x100
registers
n
CG_CG_CTRL
ckgn config register
0x80
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
6
32
read-write
Reserved1
Do not change the values.
3
5
read-write
Reserved2
Do not change the values.
0
2
read-write
SoftReset
Soft-Reset control 1: Soft-Reset 0: No change
5
6
read-write
WdCountSTOP
Start or stop WDT counter 1: Stop counter 0: Start counter When set 1, WDT counter suspends. When set 0, WDT counter resumes. During the system state is low power mode, WDT does not count.
2
3
read-write
CG_CLK_CTRL
SPI Clock control
0x20
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
10
32
read-write
Reserved1
Do not change the values.
0
9
read-write
SPIClkEn
Enable SPI clock (R/W) 1: Enable clock 0: Disable clock (default)
9
10
read-write
CG_CLK_CTRL2
PWM Clock Control
0x24
32
read-write
n
0x0
0x0
PWM0ClkEn
Enable PWM ch 0 fast clock (R/W) 1: Enable clock 0: Disable clock (default)
0
1
read-write
PWM0SlpClkEn
Enable PWM ch 0 slow clock (R/W) 1: Enable clock 0: Disable clock (default)
4
5
read-write
PWM1ClkEn
Enable PWM ch 1 fast clock (R/W) 1: Enable clock 0: Disable clock (default)
1
2
read-write
PWM1SlpClkEn
Enable PWM ch 1 slow clock (R/W) 1: Enable clock 0: Disable clock (default)
5
6
read-write
PWM2ClkEn
Enable PWM ch 2 fast clock (R/W) 1: Enable clock 0: Disable clock (default)
2
3
read-write
PWM2SlpClkEn
Enable PWM ch 2 slow clock (R/W) 1: Enable clock 0: Disable clock (default)
6
7
read-write
PWM3ClkEn
Enable PWM ch 3 fast clock (R/W) 1: Enable clock 0: Disable clock (default)
3
4
read-write
PWM3SlpClkEn
Enable PWM ch 3 slow clock (R/W) 1: Enable clock 0: Disable clock (default)
7
8
read-write
Reserved0
Do not change the values.
8
32
read-write
CG_DIVNUM3
Division ration for PWM1 and PWM0 config
0x10
32
read-write
n
0x0
0x0
PWM0_DIVNUM
Division ratio of 26MHz clock to generate PWM0 clock. PWM0 clock ON/OFF can be set on CG_CLK_CTRL2 register. This value can be changed regardless of the clock ON/OFF. However, the output clock may be unstable right after the change of this register. division ratio = (this value + 1) * 2 default value is 0x000 (Divided by 2)
0
12
read-write
PWM1_DIVNUM
Division ratio of 26MHz clock to generate PWM1 clock. PWM1 clock ON/OFF can be set on CG_CLK_CTRL2 register. This value can be changed regardless of the clock ON/OFF. However, the output clock may be unstable right after the change of this register. division ratio = (this value + 1) * 2 default value is 0x000 (Divided by 2)
16
28
read-write
Reserved0
Do not change the values.
28
32
read-write
Reserved1
Do not change the values.
12
16
read-write
CG_DIVNUM4
Division ration for PWM3 and PWM2 config
0x14
32
read-write
n
0x0
0x0
PWM2_DIVNUM
Division ratio of 26MHz clock to generate PWM2 clock. PWM2 clock ON/OFF can be set on CG_CLK_CTRL2 register. This value can be changed regardless of the clock ON/OFF. However, the output clock may be unstable right after the change of this register. division ratio = (this value + 1) * 2 default value is 0x000 (Divided by 2)
0
12
read-write
PWM3_DIVNUM
Division ratio of 26MHz clock to generate PWM3 clock. PWM3 clock ON/OFF can be set on CG_CLK_CTRL2 register. This value can be changed regardless of the clock ON/OFF. However, the output clock may be unstable right after the change of this register. division ratio = (this value + 1) * 2 default value is 0x000 (Divided by 2)
16
28
read-write
Reserved0
Do not change the values.
28
32
read-write
Reserved1
Do not change the values.
12
16
read-write
CG_PWM_CTRL
PWM clock mode set
0x4
32
read-write
n
0x0
0x0
PWM0ClkSel
Select PWM0 clock 1: MAX 13 MHz (This division ratio can be changed in CG_DIVNUM4) 0: 32 kHz Please set disable to PWM0SlpClkEn and PWM0ClkEn before changing this register.
0
1
read-write
PWM1ClkSel
Select PWM1 clock 1: MAX 13 MHz (This division ratio can be changed in CG_DIVNUM4) 0: 32 kHz Please set disable to PWM1SlpClkEn and PWM1ClkEn before changing this register.
1
2
read-write
PWM2ClkSel
Select PWM2 clock 1: MAX 13 MHz (This division ratio can be changed in CG_DIVNUM4) 0: 32 kHz Please set disable to PWM2SlpClkEn and PWM2ClkEn before changing this register.
2
3
read-write
PWM3ClkSel
Select PWM3 clock 1: MAX 13 MHz (This division ratio can be changed in CG_DIVNUM4) 0: 32 kHz Please set disable to PWM3SlpClkEn and PWM3ClkEn before changing this register.
3
4
read-write
Reserved0
Do not change the values.
4
32
read-write
CG_WD_CURNT
Watchdog current register
0xA4
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
21
32
read-write
WDTCURNT
Watchdog current value When the system wakes up from low power mode, this value becomes WDINIT value.
0
21
read-write
CG_WD_INIT
Watchdog initial register
0xA0
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
21
32
read-write
WDINIT
Set initial value of WDT counter This value can be set from 0x1(30.5 micro seconds) to 0x1FFFFF.(64 seconds) Setting time is calculated as below: setting time = (this value) * 30.5 micro seconds When you update this value, please wait for more than 2 clocks of SleepClk(32kHz clock) since the previous change. When the system wakes up from low power mode, WDT counter is set this value.
0
21
read-write
DMAC
DMAC
DMAC
0x0
0x0
0x200
registers
n
DMA_ch0_Config
Channel0 Configuration Register
0x110
32
read-write
n
0x0
0x0
A
Check FIFO data of channel0 0: No data in FIFO 1: Data exists in FIFO
17
18
read-write
DestPeripheral
DMA destination peripheral number Min: 0000 Max: 1111 If the destination is Memory, this value is ignored.
6
10
read-write
E
Set channel enable 0: Disable 1: Enable After you set up the all DMA settings, set 1 to this register. When this value set disable during transfer, FIFO data of channel0 is erased. If you want to restart the transfer, please initialize all config of channel0 and restart the DMA. If you want to stop the transfer temporarily, please perform the following sequence: (1)Set 1 to register H, then DMA requirement stop. (2)Poll FIFO data until register A becomes 0 (FIFO if empty). (3)Set 0(disable) to this register, and write 0(disable) to register E.
0
1
read-write
FlowContrl
Transfer mode config. 000: Memory to Memory 001: Memory to Pripheral 010: Peripheral to Memory 011: Peripheral to Peripheral Other: Reserved Attention: If Memory to Memory is chosen, the transfer can be started to write 1 to E.
11
14
read-write
H
Halt DMA 0: No halt 1: Halt(Ignore DMA request)
18
19
read-write
IE
DMA error interrupt enable. 0: enable the interrupt 1: disable the interrupt
14
15
read-write
ITC
DMA done interrupt enable 0: enable the interrupt 1: disable the interrupt
15
16
read-write
L
Set bus lock transfer config 0: Forbid bus lock transfer 1: Allow bus lock transfer If bus lock transfer is allowed, specified burst size is transferred without releassing the bus.
16
17
read-write
Reserved0
Alywas set 0.
19
32
read-write
Reserved1
Always set 0.
10
11
read-write
Reserved2
Always set 0.
5
6
read-write
SrcPeripheral
DMA source peripheral config register Min: 0000 Max: 1111 If the source is Memory, this value is ignored.
1
5
read-write
DMA_ch0_Contrl
Channel0 Control Register
0x10C
32
read-write
n
0x0
0x0
DBSize
Set destination burst size 000: 1 beat 001: 4 beat 010: 8 beat 011: 16 beat 100: 32 beat 101: 64 beat 110: 128 beat 111: 256 beat
15
18
read-write
DI
Set increment config of destination address 0: Do not increment (The address is fixed) 1: Increment Increment timming changes according to DWidth. Each Increment timming is as follows: Bit width is 8bit: Increment every 1Byte Bit width is 16bit: Increment every 2Byte Bit width is 32bit: Increment every 4Byte
27
28
read-write
DWidth
Set destination bit width 000: 8bit (Byte) 001: 16bit (Half word) 010: 32bit (Word) Other: Reserved
21
24
read-write
I
Set interrupt enable of Terminal Count 0: Disable 1: Enable
31
32
read-write
Reserved0
Do not change the values.
28
31
read-write
Reserved1
Do not change the values.
24
26
read-write
SBSize
Set source burst size Same as DBSize
12
15
read-write
SI
Set increment config of source address 0: Do not increment (The address is fixed) 1: Increment Increment timming is the same as DI.
26
27
read-write
SWidth
Set source bit width Same as DWidth
18
21
read-write
TransferSize
Set the number of transfers This value is decremented on every DMA transfer. Read this value to know the number of left transfers. When DMA_ch_Config register [0] is enabled, this value can be read. The number of transfers is in unit of source bit width. Source bit width is 8bit: Set this register in unit of Byte. Source bit width is 16bit: Set this register in unit of Half word Source bit width is 32bit: Set this register in unit of Word Attention: If source bit width is smaller than destination bit width, you should be careful to set this. The following condition shall be satisfied: Source bit width * TransferSize = Destinetion bit width * N (N: integer)
0
12
read-write
DMA_ch0_Dest
Channel0 Destination Address Register
0x104
32
read-write
n
0x0
0x0
DestAddr
Set DMA destination address Please set this value when channel0 is disabled on DMA_ch0_Config register. Do not update this value while data are transferred by DMA. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch0_Link
Channel0 Linked ListItem Register
0x108
32
read-write
n
0x0
0x0
LLI
Set start address of next transfer information Please set a value of 0xFFFFFFF0 or less. When 0 is set, DMA channel will be disabled after the current DMA transfer completes. Set this register to use scatter/gather function. Scatter/gather is a function to execute DMA repeatedly according to informations which are pre-set on RAM. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch0_Source
Channel0 Source Address Register
0x100
32
read-write
n
0x0
0x0
SrcAddr
Set DMA source address Please set this value when channel0 is disabled on DMA_ch0_Config register. Do not update this value while data are transferred by DMA. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch1_Config
Channel1 Configuration Register
0x130
32
read-write
n
0x0
0x0
A
Check FIFO data of channel0 0: No data in FIFO 1: Data exists in FIFO
17
18
read-write
DestPeripheral
DMA destination peripheral number Min: 0000 Max: 1111 If the destination is Memory, this value is ignored.
6
10
read-write
E
Set channel enable 0: Disable 1: Enable After you set up the all DMA settings, set 1 to this register. When this value set disable during transfer, FIFO data of channel0 is erased. If you want to restart the transfer, please initialize all config of channel0 and restart the DMA. If you want to stop the transfer temporarily, please perform the following sequence: (1)Set 1 to register H, then DMA requirement stop. (2)Poll FIFO data until register A becomes 0 (FIFO if empty). (3)Set 0(disable) to this register, and write 0(disable) to register E.
0
1
read-write
FlowContrl
Transfer mode config. 000: Memory to Memory 001: Memory to Pripheral 010: Peripheral to Memory 011: Peripheral to Peripheral Other: Reserved Attention: If Memory to Memory is chosen, the transfer can be started to write 1 to E.
11
14
read-write
H
Halt DMA 0: No halt 1: Halt(Ignore DMA request)
18
19
read-write
IE
DMA error interrupt enable. 0: enable the interrupt 1: disable the interrupt
14
15
read-write
ITC
DMA done interrupt enable 0: enable the interrupt 1: disable the interrupt
15
16
read-write
L
Set bus lock transfer config 0: Forbid bus lock transfer 1: Allow bus lock transfer If bus lock transfer is allowed, specified burst size is transferred without releassing the bus.
16
17
read-write
Reserved0
Alywas set 0.
19
32
read-write
Reserved1
Always set 0.
10
11
read-write
Reserved2
Always set 0.
5
6
read-write
SrcPeripheral
DMA source peripheral config register Min: 0000 Max: 1111 If the source is Memory, this value is ignored.
1
5
read-write
DMA_ch1_Contrl
Channel1 Control Register
0x12C
32
read-write
n
0x0
0x0
DBSize
Set destination burst size 000: 1 beat 001: 4 beat 010: 8 beat 011: 16 beat 100: 32 beat 101: 64 beat 110: 128 beat 111: 256 beat
15
18
read-write
DI
Set increment config of destination address 0: Do not increment (The address is fixed) 1: Increment Increment timming changes according to DWidth. Each Increment timming is as follows: Bit width is 8bit: Increment every 1Byte Bit width is 16bit: Increment every 2Byte Bit width is 32bit: Increment every 4Byte
27
28
read-write
DWidth
Set destination bit width 000: 8bit (Byte) 001: 16bit (Half word) 010: 32bit (Word) Other: Reserved
21
24
read-write
I
Set interrupt enable of Terminal Count 0: Disable 1: Enable
31
32
read-write
Reserved0
Do not change the values.
28
31
read-write
Reserved1
Do not change the values.
24
26
read-write
SBSize
Set source burst size Same as DBSize
12
15
read-write
SI
Set increment config of source address 0: Do not increment (The address is fixed) 1: Increment Increment timming is the same as DI.
26
27
read-write
SWidth
Set source bit width Same as DWidth
18
21
read-write
TransferSize
Set the number of transfers This value is decremented on every DMA transfer. Read this value to know the number of left transfers. When DMA_ch_Config register [0] is enabled, this value can be read. The number of transfers is in unit of source bit width. Source bit width is 8bit: Set this register in unit of Byte. Source bit width is 16bit: Set this register in unit of Half word Source bit width is 32bit: Set this register in unit of Word Attention: If source bit width is smaller than destination bit width, you should be careful to set this. The following condition shall be satisfied: Source bit width * TransferSize = Destinetion bit width * N (N: integer)
0
12
read-write
DMA_ch1_Dest
Channel1 Destination Address Register
0x124
32
read-write
n
0x0
0x0
DestAddr
Set DMA destination address Please set this value when channel1 is disabled on DMA_ch1_Config register. Do not update this value while data are transferred by DMA. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch1_Link
Channel1 Linked ListItem Register
0x128
32
read-write
n
0x0
0x0
LLI
Set start address of next transfer information Please set a value of 0xFFFFFFF0 or less. When 0 is set, DMA channel will be disabled after the current DMA transfer completes. Set this register to use scatter/gather function. Scatter/gather is a function to execute DMA repeatedly according to informations which are pre-set on RAM. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch1_Source
Channel1 Source Address Register
0x120
32
read-write
n
0x0
0x0
SrcAddr
Set DMA source address Please set this value when channel1 is disabled on DMA_ch1_Config register. Do not update this value while data are transferred by DMA. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch2_Config
Channel2 Configuration Register
0x150
32
read-write
n
0x0
0x0
A
Check FIFO data of channel0 0: No data in FIFO 1: Data exists in FIFO
17
18
read-write
DestPeripheral
DMA destination peripheral number Min: 0000 Max: 1111 If the destination is Memory, this value is ignored.
6
10
read-write
E
Set channel enable 0: Disable 1: Enable After you set up the all DMA settings, set 1 to this register. When this value set disable during transfer, FIFO data of channel0 is erased. If you want to restart the transfer, please initialize all config of channel0 and restart the DMA. If you want to stop the transfer temporarily, please perform the following sequence: (1)Set 1 to register H, then DMA requirement stop. (2)Poll FIFO data until register A becomes 0 (FIFO if empty). (3)Set 0(disable) to this register, and write 0(disable) to register E.
0
1
read-write
FlowContrl
Transfer mode config. 000: Memory to Memory 001: Memory to Pripheral 010: Peripheral to Memory 011: Peripheral to Peripheral Other: Reserved Attention: If Memory to Memory is chosen, the transfer can be started to write 1 to E.
11
14
read-write
H
Halt DMA 0: No halt 1: Halt(Ignore DMA request)
18
19
read-write
IE
DMA error interrupt enable. 0: enable the interrupt 1: disable the interrupt
14
15
read-write
ITC
DMA done interrupt enable 0: enable the interrupt 1: disable the interrupt
15
16
read-write
L
Set bus lock transfer config 0: Forbid bus lock transfer 1: Allow bus lock transfer If bus lock transfer is allowed, specified burst size is transferred without releassing the bus.
16
17
read-write
Reserved0
Alywas set 0.
19
32
read-write
Reserved1
Always set 0.
10
11
read-write
Reserved2
Always set 0.
5
6
read-write
SrcPeripheral
DMA source peripheral config register Min: 0000 Max: 1111 If the source is Memory, this value is ignored.
1
5
read-write
DMA_ch2_Contrl
Channel2 Control Register
0x14C
32
read-write
n
0x0
0x0
DBSize
Set destination burst size 000: 1 beat 001: 4 beat 010: 8 beat 011: 16 beat 100: 32 beat 101: 64 beat 110: 128 beat 111: 256 beat
15
18
read-write
DI
Set increment config of destination address 0: Do not increment (The address is fixed) 1: Increment Increment timming changes according to DWidth. Each Increment timming is as follows: Bit width is 8bit: Increment every 1Byte Bit width is 16bit: Increment every 2Byte Bit width is 32bit: Increment every 4Byte
27
28
read-write
DWidth
Set destination bit width 000: 8bit (Byte) 001: 16bit (Half word) 010: 32bit (Word) Other: Reserved
21
24
read-write
I
Set interrupt enable of Terminal Count 0: Disable 1: Enable
31
32
read-write
Reserved0
Do not change the values.
28
31
read-write
Reserved1
Do not change the values.
24
26
read-write
SBSize
Set source burst size Same as DBSize
12
15
read-write
SI
Set increment config of source address 0: Do not increment (The address is fixed) 1: Increment Increment timming is the same as DI.
26
27
read-write
SWidth
Set source bit width Same as DWidth
18
21
read-write
TransferSize
Set the number of transfers This value is decremented on every DMA transfer. Read this value to know the number of left transfers. When DMA_ch_Config register [0] is enabled, this value can be read. The number of transfers is in unit of source bit width. Source bit width is 8bit: Set this register in unit of Byte. Source bit width is 16bit: Set this register in unit of Half word Source bit width is 32bit: Set this register in unit of Word Attention: If source bit width is smaller than destination bit width, you should be careful to set this. The following condition shall be satisfied: Source bit width * TransferSize = Destinetion bit width * N (N: integer)
0
12
read-write
DMA_ch2_Dest
Channel2 Destination Address Register
0x144
32
read-write
n
0x0
0x0
DestAddr
Set DMA destination address Please set this value when channel2 is disabled on DMA_ch2_Config register. Do not update this value while data are transferred by DMA. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch2_Link
Channel2 Linked ListItem Register
0x148
32
read-write
n
0x0
0x0
LLI
Set start address of next transfer information Please set a value of 0xFFFFFFF0 or less. When 0 is set, DMA channel will be disabled after the current DMA transfer completes. Set this register to use scatter/gather function. Scatter/gather is a function to execute DMA repeatedly according to informations which are pre-set on RAM. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch2_Source
Channel2 Source Address Register
0x140
32
read-write
n
0x0
0x0
SrcAddr
Set DMA source address Please set this value when channel2 is disabled on DMA_ch2_Config register. Do not update this value while data are transferred by DMA. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch3_Config
Channel3 Configuration Register
0x170
32
read-write
n
0x0
0x0
A
Check FIFO data of channel0 0: No data in FIFO 1: Data exists in FIFO
17
18
read-write
DestPeripheral
DMA destination peripheral number Min: 0000 Max: 1111 If the destination is Memory, this value is ignored.
6
10
read-write
E
Set channel enable 0: Disable 1: Enable After you set up the all DMA settings, set 1 to this register. When this value set disable during transfer, FIFO data of channel0 is erased. If you want to restart the transfer, please initialize all config of channel0 and restart the DMA. If you want to stop the transfer temporarily, please perform the following sequence: (1)Set 1 to register H, then DMA requirement stop. (2)Poll FIFO data until register A becomes 0 (FIFO if empty). (3)Set 0(disable) to this register, and write 0(disable) to register E.
0
1
read-write
FlowContrl
Transfer mode config. 000: Memory to Memory 001: Memory to Pripheral 010: Peripheral to Memory 011: Peripheral to Peripheral Other: Reserved Attention: If Memory to Memory is chosen, the transfer can be started to write 1 to E.
11
14
read-write
H
Halt DMA 0: No halt 1: Halt(Ignore DMA request)
18
19
read-write
IE
DMA error interrupt enable. 0: enable the interrupt 1: disable the interrupt
14
15
read-write
ITC
DMA done interrupt enable 0: enable the interrupt 1: disable the interrupt
15
16
read-write
L
Set bus lock transfer config 0: Forbid bus lock transfer 1: Allow bus lock transfer If bus lock transfer is allowed, specified burst size is transferred without releassing the bus.
16
17
read-write
Reserved0
Alywas set 0.
19
32
read-write
Reserved1
Always set 0.
10
11
read-write
Reserved2
Always set 0.
5
6
read-write
SrcPeripheral
DMA source peripheral config register Min: 0000 Max: 1111 If the source is Memory, this value is ignored.
1
5
read-write
DMA_ch3_Contrl
Channel3 Control Register
0x16C
32
read-write
n
0x0
0x0
DBSize
Set destination burst size 000: 1 beat 001: 4 beat 010: 8 beat 011: 16 beat 100: 32 beat 101: 64 beat 110: 128 beat 111: 256 beat
15
18
read-write
DI
Set increment config of destination address 0: Do not increment (The address is fixed) 1: Increment Increment timming changes according to DWidth. Each Increment timming is as follows: Bit width is 8bit: Increment every 1Byte Bit width is 16bit: Increment every 2Byte Bit width is 32bit: Increment every 4Byte
27
28
read-write
DWidth
Set destination bit width 000: 8bit (Byte) 001: 16bit (Half word) 010: 32bit (Word) Other: Reserved
21
24
read-write
I
Set interrupt enable of Terminal Count 0: Disable 1: Enable
31
32
read-write
Reserved0
Do not change the values.
28
31
read-write
Reserved1
Do not change the values.
24
26
read-write
SBSize
Set source burst size Same as DBSize
12
15
read-write
SI
Set increment config of source address 0: Do not increment (The address is fixed) 1: Increment Increment timming is the same as DI.
26
27
read-write
SWidth
Set source bit width Same as DWidth
18
21
read-write
TransferSize
Set the number of transfers This value is decremented on every DMA transfer. Read this value to know the number of left transfers. When DMA_ch_Config register [0] is enabled, this value can be read. The number of transfers is in unit of source bit width. Source bit width is 8bit: Set this register in unit of Byte. Source bit width is 16bit: Set this register in unit of Half word Source bit width is 32bit: Set this register in unit of Word Attention: If source bit width is smaller than destination bit width, you should be careful to set this. The following condition shall be satisfied: Source bit width * TransferSize = Destinetion bit width * N (N: integer)
0
12
read-write
DMA_ch3_Dest
Channel3 Destination Address Register
0x164
32
read-write
n
0x0
0x0
DestAddr
Set DMA destination address Please set this value when channel3 is disabled on DMA_ch3_Config register. Do not update this value while data are transferred by DMA. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch3_Link
Channel3 Linked ListItem Register
0x168
32
read-write
n
0x0
0x0
LLI
Set start address of next transfer information Please set a value of 0xFFFFFFF0 or less. When 0 is set, DMA channel will be disabled after the current DMA transfer completes. Set this register to use scatter/gather function. Scatter/gather is a function to execute DMA repeatedly according to informations which are pre-set on RAM. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch3_Source
Channel3 Source Address Register
0x160
32
read-write
n
0x0
0x0
SrcAddr
Set DMA source address Please set this value when channel3 is disabled on DMA_ch3_Config register. Do not update this value while data are transferred by DMA. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch4_Config
Channel4 Configuration Register
0x190
32
read-write
n
0x0
0x0
A
Check FIFO data of channel0 0: No data in FIFO 1: Data exists in FIFO
17
18
read-write
DestPeripheral
DMA destination peripheral number Min: 0000 Max: 1111 If the destination is Memory, this value is ignored.
6
10
read-write
E
Set channel enable 0: Disable 1: Enable After you set up the all DMA settings, set 1 to this register. When this value set disable during transfer, FIFO data of channel0 is erased. If you want to restart the transfer, please initialize all config of channel0 and restart the DMA. If you want to stop the transfer temporarily, please perform the following sequence: (1)Set 1 to register H, then DMA requirement stop. (2)Poll FIFO data until register A becomes 0 (FIFO if empty). (3)Set 0(disable) to this register, and write 0(disable) to register E.
0
1
read-write
FlowContrl
Transfer mode config. 000: Memory to Memory 001: Memory to Pripheral 010: Peripheral to Memory 011: Peripheral to Peripheral Other: Reserved Attention: If Memory to Memory is chosen, the transfer can be started to write 1 to E.
11
14
read-write
H
Halt DMA 0: No halt 1: Halt(Ignore DMA request)
18
19
read-write
IE
DMA error interrupt enable. 0: enable the interrupt 1: disable the interrupt
14
15
read-write
ITC
DMA done interrupt enable 0: enable the interrupt 1: disable the interrupt
15
16
read-write
L
Set bus lock transfer config 0: Forbid bus lock transfer 1: Allow bus lock transfer If bus lock transfer is allowed, specified burst size is transferred without releassing the bus.
16
17
read-write
Reserved0
Alywas set 0.
19
32
read-write
Reserved1
Always set 0.
10
11
read-write
Reserved2
Always set 0.
5
6
read-write
SrcPeripheral
DMA source peripheral config register Min: 0000 Max: 1111 If the source is Memory, this value is ignored.
1
5
read-write
DMA_ch4_Contrl
Channel4 Control Register
0x18C
32
read-write
n
0x0
0x0
DBSize
Set destination burst size 000: 1 beat 001: 4 beat 010: 8 beat 011: 16 beat 100: 32 beat 101: 64 beat 110: 128 beat 111: 256 beat
15
18
read-write
DI
Set increment config of destination address 0: Do not increment (The address is fixed) 1: Increment Increment timming changes according to DWidth. Each Increment timming is as follows: Bit width is 8bit: Increment every 1Byte Bit width is 16bit: Increment every 2Byte Bit width is 32bit: Increment every 4Byte
27
28
read-write
DWidth
Set destination bit width 000: 8bit (Byte) 001: 16bit (Half word) 010: 32bit (Word) Other: Reserved
21
24
read-write
I
Set interrupt enable of Terminal Count 0: Disable 1: Enable
31
32
read-write
Reserved0
Do not change the values.
28
31
read-write
Reserved1
Do not change the values.
24
26
read-write
SBSize
Set source burst size Same as DBSize
12
15
read-write
SI
Set increment config of source address 0: Do not increment (The address is fixed) 1: Increment Increment timming is the same as DI.
26
27
read-write
SWidth
Set source bit width Same as DWidth
18
21
read-write
TransferSize
Set the number of transfers This value is decremented on every DMA transfer. Read this value to know the number of left transfers. When DMA_ch_Config register [0] is enabled, this value can be read. The number of transfers is in unit of source bit width. Source bit width is 8bit: Set this register in unit of Byte. Source bit width is 16bit: Set this register in unit of Half word Source bit width is 32bit: Set this register in unit of Word Attention: If source bit width is smaller than destination bit width, you should be careful to set this. The following condition shall be satisfied: Source bit width * TransferSize = Destinetion bit width * N (N: integer)
0
12
read-write
DMA_ch4_Dest
Channel4 Destination Address Register
0x184
32
read-write
n
0x0
0x0
DestAddr
Set DMA destination address Please set this value when channel4 is disabled on DMA_ch4_Config register. Do not update this value while data are transferred by DMA. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch4_Link
Channel4 Linked ListItem Register
0x188
32
read-write
n
0x0
0x0
LLI
Set start address of next transfer information Please set a value of 0xFFFFFFF0 or less. When 0 is set, DMA channel will be disabled after the current DMA transfer completes. Set this register to use scatter/gather function. Scatter/gather is a function to execute DMA repeatedly according to informations which are pre-set on RAM. This address shall be 4-Byte aligned.
0
32
read-write
DMA_ch4_Source
Channel4 Source Address Register
0x180
32
read-write
n
0x0
0x0
SrcAddr
Set DMA source address Please set this value when channel4 is disabled on DMA_ch4_Config register. Do not update this value while data are transferred by DMA. This address shall be 4-Byte aligned.
0
32
read-write
DMA_Config_req
Configuration Register
0x30
32
read-write
n
0x0
0x0
E
Control DMA circuit 0: Halt 1: Active Set 1 to read/write DMAC registers.
0
1
read-write
Reserved0
Do not change the values.
1
32
read-write
DMA_Enable_ch
Enabled Channel Register
0x1C
32
read-only
n
0x0
0x0
EnabledChannel0
Enable/Disable DMAC ch0 0: Disable 1: Enable
0
1
read-only
EnabledChannel1
Enable/Disable DMAC ch1 0: Disable 1: Enable
1
2
read-only
EnabledChannel2
Enable/Disable DMAC ch2 0: Disable 1: Enable
2
3
read-only
EnabledChannel3
Enable/Disable DMAC ch3 0: Disable 1: Enable
3
4
read-only
EnabledChannel4
Enable/Disable DMAC ch4 0: Disable 1: Enable
4
5
read-only
Reserved0
Do not change the values.
5
32
read-only
DMA_Int_Err_Clr
Interrupt Error Clear Register
0x10
32
read-write
n
0x0
0x0
IntErrClr0
Clear DMAC ch0 DMA error interrupt 0: Invalid 1: Clear
0
1
read-write
IntErrClr1
Clear DMAC ch1 DMA error interrupt 0: Invalid 1: Clear
1
2
read-write
IntErrClr2
Clear DMAC ch2 DMA error interrupt 0: Invalid 1: Clear
2
3
read-write
IntErrClr3
Clear DMAC ch3 DMA error interrupt 0: Invalid 1: Clear
3
4
read-write
IntErrClr4
Clear DMAC ch4 DMA error interrupt 0: Invalid 1: Clear
4
5
read-write
Reserved0
Do not change the values.
10
32
read-write
DMA_Int_Err_Stat
Interrupt Error Status Register
0xC
32
read-only
n
0x0
0x0
IntErrStatus0
DMAC ch0 DMA error interrupt status 0: No interrupt 1: Interrupt asserted
0
1
read-only
IntErrStatus1
DMAC ch1 DMA error interrupt status 0: No interrupt 1: Interrupt asserted
1
2
read-only
IntErrStatus2
DMAC ch2 DMA error interrupt status 0: No interrupt 1: Interrupt asserted
2
3
read-only
IntErrStatus3
DMAC ch3 DMA error interrupt status 0: No interrupt 1: Interrupt asserted
3
4
read-only
IntErrStatus4
DMAC ch4 DMA error interrupt status 0: No interrupt 1: Interrupt asserted
4
5
read-only
Reserved0
Do not change the values.
5
32
read-only
DMA_Int_Stat
Interrupt Status Register
0x0
32
read-only
n
0x0
0x0
IntStatus0
DMAC ch0 interrupt status. 0: No interrupt 1: Interrupt asserted. Both DMA error and DMA done assert this bit.
0
1
read-only
IntStatus1
DMAC ch1 interrupt status. 0: No interrupt 1: Interrupt asserted. Both DMA error and DMA done assert this bit.
1
2
read-only
IntStatus2
DMAC ch2 interrupt status. 0: No interrupt 1: Interrupt asserted. Both DMA error and DMA done assert this bit.
2
3
read-only
IntStatus3
DMAC ch3 interrupt status. 0: No interrupt 1: Interrupt asserted. Both DMA error and DMA done assert this bit.
3
4
read-only
IntStatus4
DMAC ch4 interrupt status. 0: No interrupt 1: Interrupt asserted. Both DMA error and DMA done assert this bit.
4
5
read-only
Reserved0
Do not change the values.
5
32
read-only
DMA_Int_TemCo_Clr
Interrupt Terminal Count Clear Register
0x8
32
read-write
n
0x0
0x0
IntTCClear0
Clear DMAC ch0 DMA done interrupt. 0: Invalid 1: Clear
0
1
read-only
IntTCClear1
Clear DMAC ch1 DMA done interrupt. 0: Invalid 1: Clear
1
2
read-only
IntTCClear2
Clear DMAC ch2 DMA done interrupt. 0: Invalid 1: Clear
2
3
read-only
IntTCClear3
Clear DMAC ch3 DMA done interrupt. 0: Invalid 1: Clear
3
4
read-only
IntTCClear4
Clear DMAC ch4 DMA done interrupt. 0: Invalid 1: Clear
4
5
read-only
Reserved0
Do not change the values.
5
32
read-write
DMA_Int_TemCo_Stat
Interrupt Terminal Count Status Register
0x4
32
read-only
n
0x0
0x0
IntTCStatus0
DMAC ch0 interrupt status of DMA done. 0: No interrupt 1: Interrupt asserted.
0
1
read-only
IntTCStatus1
DMAC ch1 interrupt status of DMA done. 0: No interrupt 1: Interrupt asserted.
1
2
read-only
IntTCStatus2
DMAC ch2 interrupt status of DMA done. 0: No interrupt 1: Interrupt asserted.
2
3
read-only
IntTCStatus3
DMAC ch3 interrupt status of DMA done. 0: No interrupt 1: Interrupt asserted.
3
4
read-only
IntTCStatus4
DMAC ch4 interrupt status of DMA done. 0: No interrupt 1: Interrupt asserted.
4
5
read-only
Reserved0
Do not change the values.
5
32
read-only
DMA_RawInt_Err_Stat
Raw Interrupt Error Status Register
0x18
32
read-only
n
0x0
0x0
RawIntErrStatus0
Unmasked DMAC ch0 DMA error interrupt status 0: No interrupt 1: Interrupt asserted
0
1
read-only
RawIntErrStatus1
Unmasked DMAC ch1 DMA error interrupt status 0: No interrupt 1: Interrupt asserted
1
2
read-only
RawIntErrStatus2
Unmasked DMAC ch2 DMA error interrupt status 0: No interrupt 1: Interrupt asserted
2
3
read-only
RawIntErrStatus3
Unmasked DMAC ch3 DMA error interrupt status 0: No interrupt 1: Interrupt asserted
3
4
read-only
RawIntErrStatus4
Unmasked DMAC ch4 DMA error interrupt status 0: No interrupt 1: Interrupt asserted
4
5
read-only
Reserved0
Do not change the values.
5
32
read-only
DMA_RawInt_Tem_Stat
Raw Interrupt Terminal Count Status Register
0x14
32
read-only
n
0x0
0x0
RawIntTCStatus0
Unmasked DMAC ch0 DMA done interrupt status 0: No interrupt 1: Interrupt asserted
0
1
read-only
RawIntTCStatus1
Unmasked DMAC ch1 DMA done interrupt status 0: No interrupt 1: Interrupt asserted
1
2
read-only
RawIntTCStatus2
Unmasked DMAC ch2 DMA done interrupt status 0: No interrupt 1: Interrupt asserted
2
3
read-only
RawIntTCStatus3
Unmasked DMAC ch3 DMA done interrupt status 0: No interrupt 1: Interrupt asserted
3
4
read-only
RawIntTCStatus4
Unmasked DMAC ch4 DMA done interrupt status 0: No interrupt 1: Interrupt asserted
4
5
read-only
Reserved0
Do not change the values.
5
32
read-only
DMA_Soft_burst_req
Software Burtst Request Register
0x20
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
5
32
read-write
Reserved1
Do not change the values.
3
4
read-write
Reserved2
Do not change the values.
1
2
read-write
SoftBReq0
Set DMA burst request for peripheral number 0 0: Invalid request 1: Occur request
0
1
read-write
SoftBReq2
Set DMA burst request for peripheral number 2 0: Invalid request 1: Occur request
2
3
read-write
SoftBReq4
Set DMA burst request for peripheral number 4 0: Invalid request 1: Occur request
4
5
read-write
DMA_Soft_single_req
Software Single Request Register
0x24
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
6
32
read-write
Reserved1
Do not change the values.
4
5
read-write
Reserved2
Do not change the values.
2
3
read-write
Reserved3
Do not change the values.
0
1
read-write
SoftSReq1
Set DMA single request for peripheral number 1 0: Invalid request 1: Occur request
1
2
read-write
SoftSReq3
Set DMA single request for peripheral number 3 0: Invalid request 1: Occur request
3
4
read-write
SoftSReq5
Set DMA single request for peripheral number 5 0: Invalid request 1: Occur request
5
6
read-write
GPIO
General Purpose Input/Output
GPIO
0x0
0x0
0x500
registers
n
CFG0
GPIO0 config
0x300
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG1
GPIO1 config
0x304
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG10
GPIO10 config
0x328
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG11
GPIO11 config
0x32C
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG12
GPIO12 config
0x330
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG13
GPIO13 config
0x334
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG14
GPIO14 config
0x338
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG15
GPIO15 config
0x33C
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG16
GPIO16 config
0x340
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG17
GPIO17 config
0x344
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG18
GPIO18 config
0x348
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG19
GPIO19 config
0x34C
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG2
GPIO2 config
0x308
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG20
GPIO20 config
0x350
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG21
GPIO21 config
0x354
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG22
GPIO22 config
0x358
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG23
GPIO23 config
0x35C
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG24
GPIO24 config
0x360
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG25
GPIO25 config
0x364
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG26
GPIO26 config
0x368
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG27
GPIO27 config
0x36C
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG28
GPIO28 config
0x370
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG29
GPIO29 config
0x374
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG3
GPIO3 config
0x30C
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG30
GPIO30 config
0x378
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG31
GPIO31 config
0x37C
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG4
GPIO4 config
0x310
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG5
GPIO5 config
0x314
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG6
GPIO6 config
0x318
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG7
GPIO7 config
0x31C
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG8
GPIO8 config
0x320
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
CFG9
GPIO9 config
0x324
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
EDGECAPCLR
GPIO edge interrupt capture clear
0x488
32
read-write
n
0x0
0x0
GPIO0EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
0
1
read-write
GPIO10EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
10
11
read-write
GPIO11EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
11
12
read-write
GPIO12EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
12
13
read-write
GPIO13EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
13
14
read-write
GPIO14EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
14
15
read-write
GPIO15EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
15
16
read-write
GPIO16EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
16
17
read-write
GPIO17EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
17
18
read-write
GPIO18EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
18
19
read-write
GPIO19EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
19
20
read-write
GPIO1EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
1
2
read-write
GPIO20EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
20
21
read-write
GPIO21EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
21
22
read-write
GPIO22EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
22
23
read-write
GPIO23EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
23
24
read-write
GPIO24EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
24
25
read-write
GPIO25EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
25
26
read-write
GPIO26EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
26
27
read-write
GPIO27EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
27
28
read-write
GPIO28EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
28
29
read-write
GPIO29EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
29
30
read-write
GPIO2EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
2
3
read-write
GPIO30EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
30
31
read-write
GPIO31EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
31
32
read-write
GPIO3EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
3
4
read-write
GPIO4EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
4
5
read-write
GPIO5EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
5
6
read-write
GPIO6EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
6
7
read-write
GPIO7EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
7
8
read-write
GPIO8EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
8
9
read-write
GPIO9EdgeCapClr
Clear edge interrput capture on the GPIO. 1: Clear 0: Not clear
9
10
read-write
GPIOAB_EDGECAPCLR
GPIO edge interrupt capture clear
0x48C
32
read-write
n
0x0
0x0
GPIOAEdgeCapClr
Clear edge interrput capture on GPIOA. 1: Clear 0: Not clear
0
1
read-write
GPIOBEdgeCapClr
Clear edge interrput capture on GPIOB. 1: Clear 0: Not clear
1
2
read-write
GPIOAB_INT
GPIO interrupt read
0x484
32
read-write
n
0x0
0x0
GPIOAINT
Read interrupt on GPIOA. 1: Interrupted 0: Not interrupted
0
1
read-write
GPIOBINT
Read interrupt on GPIOB. 1: Interrupted 0: Not interrupted
1
2
read-write
GPIOAB_MUXCFG
GPIOAB multiplexer config
0x40C
32
read-write
n
0x0
0x0
GPIOABMuxCfg
1: SWD, 0: GPIO
0
1
read-write
GPIOA_CFG
GPIOA config
0x380
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
GPIOA_MON
GPIOA input monitor
0x80
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOA_OUT_EN
GPIOA output enable
0x280
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
GPIOB_CFG
GPIOB config
0x384
32
read-write
n
0x0
0x0
GPIODrvCtrl
GPIO0 drive control. To set GPIO drive settings. 00: 1 mA 01: 1.5 mA (default) 10: 2 mA 11: 4 mA Valid when the GPIO is set as output regardless of GPIOMuxCfg.
5
7
read-write
GPIOIntCfg
GPIO interrupt configuration (initial 00, R/W) Sets the polarity to use the GPIO as an external interrupt. 000: prohibit the interrupt. 001: detect rising edge 010: detect falling edge 011: detect both edges 100: detect high level 101: detect low level
0
3
read-write
GPIOPullUpOff
GIO pull-up resister off Turn on/off the internal pull up resiter. 1: Internal pull-up off 0: Internal pull-up on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
4
5
read-write
GppPullUpOff
GIO pull-down resister off Turn on/off the internal pull down resiter. 1: Internal pull-down off 0: Internal pull-down on GPIO0/3/4/9/10/14/15/20/21 are set as pull-up off. Others are set as pull-up on. When both GPIOPullDownOff = 0 and GPIOPullUpOff = 0 are to be set, the chip forces GPIOPullDownOff = 1 and GPIOPullUpOff = 0. Valid when the GPIO is set as input regardless of the GppMuxCfg.
3
4
read-write
GPIOB_MON
GPIOB input monitor
0x84
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOB_OUT_EN0
GPIOB output enable
0x284
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
GPIOMON0
GPIO0 input monitor
0x0
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON1
GPIO1 input monitor
0x4
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON10
GPIO10 input monitor
0x28
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON11
GPIO11 input monitor
0x2C
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON12
GPIO12 input monitor
0x30
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON13
GPIO13 input monitor
0x34
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON14
GPIO14 input monitor
0x38
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON15
GPIO15 input monitor
0x3C
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON16
GPIO16 input monitor
0x40
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON17
GPIO17 input monitor
0x44
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON18
GPIO18 input monitor
0x48
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON19
GPIO19 input monitor
0x4C
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON2
GPIO2 input monitor
0x8
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON20
GPIO20 input monitor
0x50
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON21
GPIO21 input monitor
0x54
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON22
GPIO22 input monitor
0x58
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON23
GPIO23 input monitor
0x5C
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON24
GPIO24 input monitor
0x60
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON25
GPIO25 input monitor
0x64
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON26
GPIO26 input monitor
0x68
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON27
GPIO27 input monitor
0x6C
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON28
GPIO28 input monitor
0x70
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON29
GPIO29 input monitor
0x74
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON3
GPIO3 input monitor
0xC
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON30
GPIO30 input monitor
0x78
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON31
GPIO31 input monitor
0x7C
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON4
GPIO4 input monitor
0x10
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON5
GPIO5 input monitor
0x14
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON6
GPIO6 input monitor
0x18
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON7
GPIO7 input monitor
0x1C
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON8
GPIO8 input monitor
0x20
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
GPIOMON9
GPIO9 input monitor
0x24
32
read-only
n
0x0
0x0
GPIOMon
GPIO input monitor data Monitors the input of GPIO 1: High input 0: Low input Not dependent on the GppOutEn or hte GppMuxCfg.
0
1
INT
GPIO interrupt read
0x480
32
read-only
n
0x0
0x0
GPIO31INT
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
31
32
read-only
GPIOINT0
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
0
1
read-only
GPIOINT1
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
1
2
read-only
GPIOINT10
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
10
11
read-only
GPIOINT11
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
11
12
read-only
GPIOINT12
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
12
13
read-only
GPIOINT13
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
13
14
read-only
GPIOINT14
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
14
15
read-only
GPIOINT15
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
15
16
read-only
GPIOINT16
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
16
17
read-only
GPIOINT17
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
17
18
read-only
GPIOINT18
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
18
19
read-only
GPIOINT19
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
19
20
read-only
GPIOINT2
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
2
3
read-only
GPIOINT20
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
20
21
read-only
GPIOINT21
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
21
22
read-only
GPIOINT22
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
22
23
read-only
GPIOINT23
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
23
24
read-only
GPIOINT24
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
24
25
read-only
GPIOINT25
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
25
26
read-only
GPIOINT26
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
26
27
read-only
GPIOINT27
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
27
28
read-only
GPIOINT28
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
28
29
read-only
GPIOINT29
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
29
30
read-only
GPIOINT3
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
3
4
read-only
GPIOINT30
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
30
31
read-only
GPIOINT4
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
4
5
read-only
GPIOINT5
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
5
6
read-only
GPIOINT6
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
6
7
read-only
GPIOINT7
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
7
8
read-only
GPIOINT8
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
8
9
read-only
GPIOINT9
Read interrupt on the GPIO. 1: Interrupted 0: Not interrupted
9
10
read-only
MON_WRAP
GPIO Input Monitor Wrap Register
0x4C0
32
read-only
n
0x0
0x0
GPIO0Mon
GPIO0 input monitor data Monitors the input of GPIO0 1: High input 0: Low input
0
1
read-only
GPIO10Mon
GPIO10 input monitor data Monitors the input of GPIO10 1: High input 0: Low input
10
11
read-only
GPIO11Mon
GPIO11 input monitor data Monitors the input of GPIO11 1: High input 0: Low input
11
12
read-only
GPIO12Mon
GPIO12 input monitor data Monitors the input of GPIO12 1: High input 0: Low input
12
13
read-only
GPIO13Mon
GPIO13 input monitor data Monitors the input of GPIO13 1: High input 0: Low input
13
14
read-only
GPIO14Mon
GPIO14 input monitor data Monitors the input of GPIO14 1: High input 0: Low input
14
15
read-only
GPIO15Mon
GPIO15 input monitor data Monitors the input of GPIO15 1: High input 0: Low input
15
16
read-only
GPIO16Mon
GPIO16 input monitor data Monitors the input of GPIO16 1: High input 0: Low input
16
17
read-only
GPIO17Mon
GPIO17 input monitor data Monitors the input of GPIO17 1: High input 0: Low input
17
18
read-only
GPIO18Mon
GPIO18 input monitor data Monitors the input of GPIO18 1: High input 0: Low input
18
19
read-only
GPIO19Mon
GPIO19 input monitor data Monitors the input of GPIO19 1: High input 0: Low input
19
20
read-only
GPIO1Mon
GPIO1 input monitor data Monitors the input of GPIO1 1: High input 0: Low input
1
2
read-only
GPIO20Mon
GPIO20 input monitor data Monitors the input of GPIO20 1: High input 0: Low input
20
21
read-only
GPIO21Mon
GPIO21 input monitor data Monitors the input of GPIO21 1: High input 0: Low input
21
22
read-only
GPIO22Mon
GPIO22 input monitor data Monitors the input of GPIO22 1: High input 0: Low input
22
23
read-only
GPIO23Mon
GPIO23 input monitor data Monitors the input of GPIO23 1: High input 0: Low input
23
24
read-only
GPIO24Mon
GPIO24 input monitor data Monitors the input of GPIO24 1: High input 0: Low input
24
25
read-only
GPIO25Mon
GPIO25 input monitor data Monitors the input of GPIO25 1: High input 0: Low input
25
26
read-only
GPIO26Mon
GPIO26 input monitor data Monitors the input of GPIO26 1: High input 0: Low input
26
27
read-only
GPIO27Mon
GPIO27 input monitor data Monitors the input of GPIO27 1: High input 0: Low input
27
28
read-only
GPIO28Mon
GPIO28 input monitor data Monitors the input of GPIO28 1: High input 0: Low input
28
29
read-only
GPIO29Mon
GPIO29 input monitor data Monitors the input of GPIO29 1: High input 0: Low input
29
30
read-only
GPIO2Mon
GPIO2 input monitor data Monitors the input of GPIO2 1: High input 0: Low input
2
3
read-only
GPIO30Mon
GPIO30 input monitor data Monitors the input of GPIO30 1: High input 0: Low input
30
31
read-only
GPIO31Mon
GPIO31 input monitor data Monitors the input of GPIO31 1: High input 0: Low input
31
32
read-only
GPIO3Mon
GPIO3 input monitor data Monitors the input of GPIO3 1: High input 0: Low input
3
4
read-only
GPIO4Mon
GPIO4 input monitor data Monitors the input of GPIO4 1: High input 0: Low input
4
5
read-only
GPIO5Mon
GPIO5 input monitor data Monitors the input of GPIO5 1: High input 0: Low input
5
6
read-only
GPIO6Mon
GPIO6 input monitor data Monitors the input of GPIO6 1: High input 0: Low input
6
7
read-only
GPIO7Mon
GPIO7 input monitor data Monitors the input of GPIO7 1: High input 0: Low input
7
8
read-only
GPIO8Mon
GPIO8 input monitor data Monitors the input of GPIO8 1: High input 0: Low input
8
9
read-only
GPIO9Mon
GPIO9 input monitor data Monitors the input of GPIO9 1: High input 0: Low input
9
10
read-only
MUXCFG_H
GPIO multiplexer config H
0x408
32
read-write
n
0x0
0x0
GPI15OMuxH
Bit 2 of GPIO multiplexer configuration.
15
16
read-write
GPI9OMuxH
Bit 2 of GPIO multiplexer configuration.
9
10
read-write
GPIO0MuxH
Bit 2 of GPIO multiplexer configuration.
0
1
read-write
GPIO10MuxH
Bit 2 of GPIO multiplexer configuration.
10
11
read-write
GPIO11MuxH
Bit 2 of GPIO multiplexer configuration.
11
12
read-write
GPIO12MuxH
Bit 2 of GPIO multiplexer configuration.
12
13
read-write
GPIO13MuxH
Bit 2 of GPIO multiplexer configuration.
13
14
read-write
GPIO14MuxH
Bit 2 of GPIO multiplexer configuration.
14
15
read-write
GPIO16MuxH
Bit 2 of GPIO multiplexer configuration.
16
17
read-write
GPIO17MuxH
Bit 2 of GPIO multiplexer configuration.
17
18
read-write
GPIO18MuxH
Bit 2 of GPIO multiplexer configuration.
18
19
read-write
GPIO19MuxH
Bit 2 of GPIO multiplexer configuration.
19
20
read-write
GPIO1MuxH
Bit 2 of GPIO multiplexer configuration.
1
2
read-write
GPIO20MuxH
Bit 2 of GPIO multiplexer configuration.
20
21
read-write
GPIO21MuxH
Bit 2 of GPIO multiplexer configuration.
21
22
read-write
GPIO22MuxH
Bit 2 of GPIO multiplexer configuration.
22
23
read-write
GPIO23MuxH
Bit 2 of GPIO multiplexer configuration.
23
24
read-write
GPIO24MuxH
Bit 2 of GPIO multiplexer configuration.
24
25
read-write
GPIO25MuxH
Bit 2 of GPIO multiplexer configuration.
25
26
read-write
GPIO26MuxH
Bit 2 of GPIO multiplexer configuration.
26
27
read-write
GPIO27MuxH
Bit 2 of GPIO multiplexer configuration.
27
28
read-write
GPIO28MuxH
Bit 2 of GPIO multiplexer configuration.
28
29
read-write
GPIO29MuxH
Bit 2 of GPIO multiplexer configuration.
29
30
read-write
GPIO2MuxH
Bit 2 of GPIO multiplexer configuration.
2
3
read-write
GPIO30MuxH
Bit 2 of GPIO multiplexer configuration.
30
31
read-write
GPIO31MuxH
Bit 2 of GPIO multiplexer configuration.
31
32
read-write
GPIO3MuxH
Bit 2 of GPIO multiplexer configuration.
3
4
read-write
GPIO4MuxH
Bit 2 of GPIO multiplexer configuration.
4
5
read-write
GPIO5MuxH
Bit 2 of GPIO multiplexer configuration.
5
6
read-write
GPIO6MuxH
Bit 2 of GPIO multiplexer configuration.
6
7
read-write
GPIO7MuxH
Bit 2 of GPIO multiplexer configuration.
7
8
read-write
GPIO8MuxH
Bit 2 of GPIO multiplexer configuration.
8
9
read-write
MUXCFG_L
GPIO multiplexer config L
0x400
32
read-write
n
0x0
0x0
GPI15OMuxL
Bit 0 of GPIO multiplexer configuration.
15
16
read-write
GPI9OMuxL
Bit 0 of GPIO multiplexer configuration.
9
10
read-write
GPIO0MuxL
Bit 0 of GPIO multiplexer configuration.
0
1
read-write
GPIO10MuxL
Bit 0 of GPIO multiplexer configuration.
10
11
read-write
GPIO11MuxL
Bit 0 of GPIO multiplexer configuration.
11
12
read-write
GPIO12MuxL
Bit 0 of GPIO multiplexer configuration.
12
13
read-write
GPIO13MuxL
Bit 0 of GPIO multiplexer configuration.
13
14
read-write
GPIO14MuxL
Bit 0 of GPIO multiplexer configuration.
14
15
read-write
GPIO16MuxL
Bit 0 of GPIO multiplexer configuration.
16
17
read-write
GPIO17MuxL
Bit 0 of GPIO multiplexer configuration.
17
18
read-write
GPIO18MuxL
Bit 0 of GPIO multiplexer configuration.
18
19
read-write
GPIO19MuxL
Bit 0 of GPIO multiplexer configuration.
19
20
read-write
GPIO1MuxL
Bit 0 of GPIO multiplexer configuration.
1
2
read-write
GPIO20MuxL
Bit 0 of GPIO multiplexer configuration.
20
21
read-write
GPIO21MuxL
Bit 0 of GPIO multiplexer configuration.
21
22
read-write
GPIO22MuxL
Bit 0 of GPIO multiplexer configuration.
22
23
read-write
GPIO23MuxL
Bit 0 of GPIO multiplexer configuration.
23
24
read-write
GPIO24MuxL
Bit 0 of GPIO multiplexer configuration.
24
25
read-write
GPIO25MuxL
Bit 0 of GPIO multiplexer configuration.
25
26
read-write
GPIO26MuxL
Bit 0 of GPIO multiplexer configuration.
26
27
read-write
GPIO27MuxL
Bit 0 of GPIO multiplexer configuration.
27
28
read-write
GPIO28MuxL
Bit 0 of GPIO multiplexer configuration.
28
29
read-write
GPIO29MuxL
Bit 0 of GPIO multiplexer configuration.
29
30
read-write
GPIO2MuxL
Bit 0 of GPIO multiplexer configuration.
2
3
read-write
GPIO30MuxL
Bit 0 of GPIO multiplexer configuration.
30
31
read-write
GPIO31MuxL
Bit 0 of GPIO multiplexer configuration.
31
32
read-write
GPIO3MuxL
Bit 0 of GPIO multiplexer configuration.
3
4
read-write
GPIO4MuxL
Bit 0 of GPIO multiplexer configuration.
4
5
read-write
GPIO5MuxL
Bit 0 of GPIO multiplexer configuration.
5
6
read-write
GPIO6MuxL
Bit 0 of GPIO multiplexer configuration.
6
7
read-write
GPIO7MuxL
Bit 0 of GPIO multiplexer configuration.
7
8
read-write
GPIO8MuxL
Bit 0 of GPIO multiplexer configuration.
8
9
read-write
MUXCFG_M
GPIO multiplexer config M
0x404
32
read-write
n
0x0
0x0
GPI15OMuxM
Bit 1 of GPIO multiplexer configuration.
15
16
read-write
GPI9OMuxM
Bit 1 of GPIO multiplexer configuration.
9
10
read-write
GPIO0MuxM
Bit 1 of GPIO multiplexer configuration.
0
1
read-write
GPIO10MuxM
Bit 1 of GPIO multiplexer configuration.
10
11
read-write
GPIO11MuxM
Bit 1 of GPIO multiplexer configuration.
11
12
read-write
GPIO12MuxM
Bit 1 of GPIO multiplexer configuration.
12
13
read-write
GPIO13MuxM
Bit 1 of GPIO multiplexer configuration.
13
14
read-write
GPIO14MuxM
Bit 1 of GPIO multiplexer configuration.
14
15
read-write
GPIO16MuxM
Bit 1 of GPIO multiplexer configuration.
16
17
read-write
GPIO17MuxM
Bit 1 of GPIO multiplexer configuration.
17
18
read-write
GPIO18MuxM
Bit 1 of GPIO multiplexer configuration.
18
19
read-write
GPIO19MuxM
Bit 1 of GPIO multiplexer configuration.
19
20
read-write
GPIO1MuxM
Bit 1 of GPIO multiplexer configuration.
1
2
read-write
GPIO20MuxM
Bit 1 of GPIO multiplexer configuration.
20
21
read-write
GPIO21MuxM
Bit 1 of GPIO multiplexer configuration.
21
22
read-write
GPIO22MuxM
Bit 1 of GPIO multiplexer configuration.
22
23
read-write
GPIO23MuxM
Bit 1 of GPIO multiplexer configuration.
23
24
read-write
GPIO24MuxM
Bit 1 of GPIO multiplexer configuration.
24
25
read-write
GPIO25MuxM
Bit 1 of GPIO multiplexer configuration.
25
26
read-write
GPIO26MuxM
Bit 1 of GPIO multiplexer configuration.
26
27
read-write
GPIO27MuxM
Bit 1 of GPIO multiplexer configuration.
27
28
read-write
GPIO28MuxM
Bit 1 of GPIO multiplexer configuration.
28
29
read-write
GPIO29MuxM
Bit 1 of GPIO multiplexer configuration.
29
30
read-write
GPIO2MuxM
Bit 1 of GPIO multiplexer configuration.
2
3
read-write
GPIO30MuxM
Bit 1 of GPIO multiplexer configuration.
30
31
read-write
GPIO31MuxM
Bit 1 of GPIO multiplexer configuration.
31
32
read-write
GPIO3MuxM
Bit 1 of GPIO multiplexer configuration.
3
4
read-write
GPIO4MuxM
Bit 1 of GPIO multiplexer configuration.
4
5
read-write
GPIO5MuxM
Bit 1 of GPIO multiplexer configuration.
5
6
read-write
GPIO6MuxM
Bit 1 of GPIO multiplexer configuration.
6
7
read-write
GPIO7MuxM
Bit 1 of GPIO multiplexer configuration.
7
8
read-write
GPIO8MuxM
Bit 1 of GPIO multiplexer configuration.
8
9
read-write
OBSMUXCFG
GPIO Observation function selection register
0x490
32
read-write
n
0x0
0x0
ObsMuxCfg
Always set 3.
0
1
read-write
Reserved0
Always set 0.
1
32
read-write
OUT0
GPIO0 output data
0x100
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT1
GPIO1 output data
0x104
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT10
GPIO10 output data
0x128
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT11
GPIO11 output data
0x12C
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT12
GPIO12 output data
0x130
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT13
GPIO13 output data
0x134
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT14
GPIO14 output data
0x138
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT15
GPIO15 output data
0x13C
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT16
GPIO16 output data
0x140
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT17
GPIO17 output data
0x144
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT18
GPIO18 output data
0x148
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT19
GPIO19 output data
0x14C
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT2
GPIO2 output data
0x108
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT20
GPIO20 output data
0x150
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT21
GPIO21 output data
0x154
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT22
GPIO22 output data
0x158
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT23
GPIO23 output data
0x15C
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT24
GPIO24 output data
0x160
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT25
GPIO25 output data
0x164
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT26
GPIO26 output data
0x168
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT27
GPIO27 output data
0x16C
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT28
GPIO28 output data
0x170
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT29
GPIO29 output data
0x174
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT3
GPIO3 output data
0x10C
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT30
GPIO30 output data
0x178
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT31
GPIO31 output data
0x17C
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT3A
GPIOA output data
0x180
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT4
GPIO4 output data
0x110
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT5
GPIO5 output data
0x114
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT6
GPIO6 output data
0x118
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT7
GPIO7 output data
0x11C
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT8
GPIO8 output data
0x120
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT9
GPIO9 output data
0x124
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUTB
GPIOB output data
0x184
32
read-write
n
0x0
0x0
GPIOOut
GPIO output data Set the output level of the GPIOX. 1: High output 0: Low output The value is output only when GPIOOutEnX = 1 and GPIOMuxCfgX = 0.
0
1
read-write
OUT_EN0
GPIO0 output enable
0x200
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN1
GPIO1 output enable
0x204
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN10
GPIO10 output enable
0x228
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN11
GPIO11 output enable
0x22C
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN12
GPIO12 output enable
0x230
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN13
GPIO13 output enable
0x234
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN14
GPIO14 output enable
0x238
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN15
GPIO15 output enable
0x23C
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN16
GPIO16 output enable
0x240
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN17
GPIO17 output enable
0x244
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN18
GPIO18 output enable
0x248
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN19
GPIO19 output enable
0x24C
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN2
GPIO2 output enable
0x208
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN20
GPIO20 output enable
0x250
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN21
GPIO21 output enable
0x254
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN22
GPIO22 output enable
0x258
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN23
GPIO23 output enable
0x25C
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN24
GPIO24 output enable
0x260
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN25
GPIO25 output enable
0x264
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN26
GPIO26 output enable
0x268
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN27
GPIO27 output enable
0x26C
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN28
GPIO28 output enable
0x270
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN29
GPIO29 output enable
0x274
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN3
GPIO3 output enable
0x20C
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN30
GPIO30 output enable
0x278
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN31
GPIO31 output enable
0x27C
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN4
GPIO4 output enable
0x210
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN5
GPIO5 output enable
0x214
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN6
GPIO6 output enable
0x218
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN7
GPIO7 output enable
0x21C
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN8
GPIO8 output enable
0x220
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN9
GPIO9 output enable
0x224
32
read-write
n
0x0
0x0
GPIOOutEn
GPIO output enable. Enables GPIO output. 1: output enable 0: output disable
0
1
read-write
OUT_EN_WRAP
GPIO Output Enable Wrap Register
0x4C8
32
read-write
n
0x0
0x0
GPIOOutEn0
GPIO0 output enable Enables GPIO0 output 1: Output enable 0: Output disable
0
1
read-write
GPIOOutEn1
GPIO1 output enable Enables GPIO1 output 1: Output enable 0: Output disable
1
2
read-write
GPIOOutEn10
GPIO10 output enable Enables GPIO10 output 1: Output enable 0: Output disable
10
11
read-write
GPIOOutEn11
GPIO11 output enable Enables GPIO11 output 1: Output enable 0: Output disable
11
12
read-write
GPIOOutEn12
GPIO12 output enable Enables GPIO12 output 1: Output enable 0: Output disable
12
13
read-write
GPIOOutEn13
GPIO13 output enable Enables GPIO13 output 1: Output enable 0: Output disable
13
14
read-write
GPIOOutEn14
GPIO14 output enable Enables GPIO14 output 1: Output enable 0: Output disable
14
15
read-write
GPIOOutEn15
GPIO15 output enable Enables GPIO15 output 1: Output enable 0: Output disable
15
16
read-write
GPIOOutEn16
GPIO16 output enable Enables GPIO16 output 1: Output enable 0: Output disable
16
17
read-write
GPIOOutEn17
GPIO17 output enable Enables GPIO17 output 1: Output enable 0: Output disable
17
18
read-write
GPIOOutEn18
GPIO18 output enable Enables GPIO18 output 1: Output enable 0: Output disable
18
19
read-write
GPIOOutEn19
GPIO19 output enable Enables GPIO19 output 1: Output enable 0: Output disable
19
20
read-write
GPIOOutEn2
GPIO2 output enable Enables GPIO2 output 1: Output enable 0: Output disable
2
3
read-write
GPIOOutEn20
GPIO20 output enable Enables GPIO20 output 1: Output enable 0: Output disable
20
21
read-write
GPIOOutEn21
GPIO21 output enable Enables GPIO21 output 1: Output enable 0: Output disable
21
22
read-write
GPIOOutEn22
GPIO22 output enable Enables GPIO22 output 1: Output enable 0: Output disable
22
23
read-write
GPIOOutEn23
GPIO23 output enable Enables GPIO23 output 1: Output enable 0: Output disable
23
24
read-write
GPIOOutEn24
GPIO24 output enable Enables GPIO24 output 1: Output enable 0: Output disable
24
25
read-write
GPIOOutEn25
GPIO25 output enable Enables GPIO25 output 1: Output enable 0: Output disable
25
26
read-write
GPIOOutEn26
GPIO26 output enable Enables GPIO26 output 1: Output enable 0: Output disable
26
27
read-write
GPIOOutEn27
GPIO27 output enable Enables GPIO27 output 1: Output enable 0: Output disable
27
28
read-write
GPIOOutEn28
GPIO28 output enable Enables GPIO28 output 1: Output enable 0: Output disable
28
29
read-write
GPIOOutEn29
GPIO29 output enable Enables GPIO29 output 1: Output enable 0: Output disable
29
30
read-write
GPIOOutEn3
GPIO3 output enable Enables GPIO3 output 1: Output enable 0: Output disable
3
4
read-write
GPIOOutEn30
GPIO30 output enable Enables GPIO30 output 1: Output enable 0: Output disable
30
31
read-write
GPIOOutEn31
GPIO31 output enable Enables GPIO31 output 1: Output enable 0: Output disable
31
32
read-write
GPIOOutEn4
GPIO4 output enable Enables GPIO4 output 1: Output enable 0: Output disable
4
5
read-write
GPIOOutEn5
GPIO5 output enable Enables GPIO5 output 1: Output enable 0: Output disable
5
6
read-write
GPIOOutEn6
GPIO6 output enable Enables GPIO6 output 1: Output enable 0: Output disable
6
7
read-write
GPIOOutEn7
GPIO7 output enable Enables GPIO7 output 1: Output enable 0: Output disable
7
8
read-write
GPIOOutEn8
GPIO8 output enable Enables GPIO8 output 1: Output enable 0: Output disable
8
9
read-write
GPIOOutEn9
GPIO9 output enable Enables GPIO9 output 1: Output enable 0: Output disable
9
10
read-write
OUT_WRAP
GPIO Output data Wrap Register
0x4C4
32
read-write
n
0x0
0x0
GPIO0Out
GPIO0 output data Set the output level of GPIO0 1: High output 0: Low output
0
1
read-write
GPIO10Out
GPIO10 output data Set the output level of GPIO10 1: High output 0: Low output
10
11
read-write
GPIO11Out
GPIO11 output data Set the output level of GPIO11 1: High output 0: Low output
11
12
read-write
GPIO12Out
GPIO12 output data Set the output level of GPIO12 1: High output 0: Low output
12
13
read-write
GPIO13Out
GPIO13 output data Set the output level of GPIO13 1: High output 0: Low output
13
14
read-write
GPIO14Out
GPIO14 output data Set the output level of GPIO14 1: High output 0: Low output
14
15
read-write
GPIO15Out
GPIO15 output data Set the output level of GPIO15 1: High output 0: Low output
15
16
read-write
GPIO16Out
GPIO16 output data Set the output level of GPIO16 1: High output 0: Low output
16
17
read-write
GPIO17Out
GPIO17 output data Set the output level of GPIO17 1: High output 0: Low output
17
18
read-write
GPIO18Out
GPIO18 output data Set the output level of GPIO18 1: High output 0: Low output
18
19
read-write
GPIO19Out
GPIO19 output data Set the output level of GPIO19 1: High output 0: Low output
19
20
read-write
GPIO1Out
GPIO1 output data Set the output level of GPIO1 1: High output 0: Low output
1
2
read-write
GPIO20Out
GPIO20 output data Set the output level of GPIO20 1: High output 0: Low output
20
21
read-write
GPIO21Out
GPIO21 output data Set the output level of GPIO21 1: High output 0: Low output
21
22
read-write
GPIO22Out
GPIO22 output data Set the output level of GPIO22 1: High output 0: Low output
22
23
read-write
GPIO23Out
GPIO23 output data Set the output level of GPIO23 1: High output 0: Low output
23
24
read-write
GPIO24Out
GPIO24 output data Set the output level of GPIO24 1: High output 0: Low output
24
25
read-write
GPIO25Out
GPIO25 output data Set the output level of GPIO25 1: High output 0: Low output
25
26
read-write
GPIO26Out
GPIO26 output data Set the output level of GPIO26 1: High output 0: Low output
26
27
read-write
GPIO27Out
GPIO27 output data Set the output level of GPIO27 1: High output 0: Low output
27
28
read-write
GPIO28Out
GPIO28 output data Set the output level of GPIO28 1: High output 0: Low output
28
29
read-write
GPIO29Out
GPIO29 output data Set the output level of GPIO29 1: High output 0: Low output
29
30
read-write
GPIO2Out
GPIO2 output data Set the output level of GPIO2 1: High output 0: Low output
2
3
read-write
GPIO30Out
GPIO30 output data Set the output level of GPIO30 1: High output 0: Low output
30
31
read-write
GPIO31Out
GPIO31 output data Set the output level of GPIO31 1: High output 0: Low output
31
32
read-write
GPIO3Out
GPIO3 output data Set the output level of GPIO3 1: High output 0: Low output
3
4
read-write
GPIO4Out
GPIO4 output data Set the output level of GPIO4 1: High output 0: Low output
4
5
read-write
GPIO5Out
GPIO5 output data Set the output level of GPIO5 1: High output 0: Low output
5
6
read-write
GPIO6Out
GPIO6 output data Set the output level of GPIO6 1: High output 0: Low output
6
7
read-write
GPIO7Out
GPIO7 output data Set the output level of GPIO7 1: High output 0: Low output
7
8
read-write
GPIO8Out
GPIO8 output data Set the output level of GPIO8 1: High output 0: Low output
8
9
read-write
GPIO9Out
GPIO9 output data Set the output level of GPIO9 1: High output 0: Low output
9
10
read-write
PowerManagement
Power Management (GPIO, RTC)
PowerManagement
0x0
0x0
0x200
registers
n
PMU_DD_DVSSEL
DCDC DVS control register
0xE8
32
read-only
n
0x0
0x0
val
Do not change this value.
0
32
read-only
PMU_IOSTANDBYX
GPIO input standby
0x78
32
read-write
n
0x0
0x0
GPIO0nputStandbyRelease
Input standby release on GPIO0 1: Release standby 0: Standby
0
1
read-write
GPIO10nputStandbyRelease
Input standby release on GPIO10 1: Release standby 0: Standby
10
11
read-write
GPIO11nputStandbyRelease
Input standby release on GPIO11 1: Release standby 0: Standby
11
12
read-write
GPIO12nputStandbyRelease
Input standby release on GPIO12 1: Release standby 0: Standby
12
13
read-write
GPIO13nputStandbyRelease
Input standby release on GPIO13 1: Release standby 0: Standby
13
14
read-write
GPIO14nputStandbyRelease
Input standby release on GPIO14 1: Release standby 0: Standby
14
15
read-write
GPIO15nputStandbyRelease
Input standby release on GPIO15 1: Release standby 0: Standby
15
16
read-write
GPIO16nputStandbyRelease
Input standby release on GPIO16 1: Release standby 0: Standby
16
17
read-write
GPIO17nputStandbyRelease
Input standby release on GPIO17 1: Release standby 0: Standby
17
18
read-write
GPIO18nputStandbyRelease
Input standby release on GPIO18 1: Release standby 0: Standby
18
19
read-write
GPIO19nputStandbyRelease
Input standby release on GPIO19 1: Release standby 0: Standby
19
20
read-write
GPIO1nputStandbyRelease
Input standby release on GPIO1 1: Release standby 0: Standby
1
2
read-write
GPIO20nputStandbyRelease
Input standby release on GPIO20 1: Release standby 0: Standby
20
21
read-write
GPIO21nputStandbyRelease
Input standby release on GPIO21 1: Release standby 0: Standby
21
22
read-write
GPIO22nputStandbyRelease
Input standby release on GPIO22 1: Release standby 0: Standby
22
23
read-write
GPIO23nputStandbyRelease
Input standby release on GPIO23 1: Release standby 0: Standby
23
24
read-write
GPIO24nputStandbyRelease
Input standby release on GPIO24 1: Release standby 0: Standby
24
25
read-write
GPIO25nputStandbyRelease
Input standby release on GPIO25 1: Release standby 0: Standby
25
26
read-write
GPIO26nputStandbyRelease
Input standby release on GPIO26 1: Release standby 0: Standby
26
27
read-write
GPIO27nputStandbyRelease
Input standby release on GPIO27 1: Release standby 0: Standby
27
28
read-write
GPIO28nputStandbyRelease
Input standby release on GPIO28 1: Release standby 0: Standby
28
29
read-write
GPIO29nputStandbyRelease
Input standby release on GPIO29 1: Release standby 0: Standby
29
30
read-write
GPIO2nputStandbyRelease
Input standby release on GPIO2 1: Release standby 0: Standby
2
3
read-write
GPIO30nputStandbyRelease
Input standby release on GPIO30 1: Release standby 0: Standby
30
31
read-write
GPIO31nputStandbyRelease
Input standby release on GPIO31 1: Release standby 0: Standby
31
32
read-write
GPIO3nputStandbyRelease
Input standby release on GPIO3 1: Release standby 0: Standby
3
4
read-write
GPIO4nputStandbyRelease
Input standby release on GPIO4 1: Release standby 0: Standby
4
5
read-write
GPIO5nputStandbyRelease
Input standby release on GPIO5 1: Release standby 0: Standby
5
6
read-write
GPIO6nputStandbyRelease
Input standby release on GPIO6 1: Release standby 0: Standby
6
7
read-write
GPIO7nputStandbyRelease
Input standby release on GPIO7 1: Release standby 0: Standby
7
8
read-write
GPIO8nputStandbyRelease
Input standby release on GPIO8 1: Release standby 0: Standby
8
9
read-write
GPIO9nputStandbyRelease
Input standby release on GPIO9 1: Release standby 0: Standby
9
10
read-write
PMU_LVDDISABLE
LVD config register
0x6C
32
read-write
n
0x0
0x0
LVDDISABLE
LVD config 1: Disable LVD 0: Enable LVD
0
1
read-write
Reserved0
Do not change the values.
1
32
read-write
PMU_OSC32K_TRIMIN
OSC32K trimming register
0x11C
32
read-write
n
0x0
0x0
FREQTUNE_OSC32K
Freqency tune value.
16
21
read-write
Reserved0
Do not change the values.
21
32
read-write
Reserved1
Reserved. Since this bits are regulated during the chip manufacturing, do not change value. (Use read-modify-write).
0
16
read-write
PMU_RTCWAKEUPCFG
RTC wakeup config register
0x5C
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
1
32
read-write
RTCWAKEUPEN
RTC wakeup config 1: Enable wakeup by RTC 0: Disable wakeup by RTC
0
1
read-write
PMU_RTC_ADJUST1S
RTC adjust register
0xCC
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
9
32
read-write
Reserved1
Do not change the values.
0
8
read-write
SCUT
1 Hz short cut When this register set 1, PMU_RTC_TIME and PMU_RTC_DAY setting is enabled after 16 clock of Sleep Clock. When this register is written, this register is cleared after 2 clock of Sleep Clock. After this register is cleared, you can set value to this register.
8
9
read-write
PMU_RTC_CNTCFG
RTC count cnofig register
0xD8
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
1
32
read-write
RTCNTCFG
Set RTC config 1: Enable RTC config 0: Disable RTC config
0
1
read-write
PMU_RTC_DAY
RTC date register
0xB4
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
21
24
read-write
Reserved1
Do not change the values.
3
16
read-write
RTCMONTH
RTC date config of month (Binary Coded Decimal)
16
21
read-write
RTCWEEK
RTC date config of week (Binary Coded Decimal)
0
3
read-write
RTCYEAR
RTC date config of year (Binary Coded Decimal)
24
32
read-write
PMU_RTC_INTCLR
RTC interrupt clear register
0xD0
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
1
32
read-write
RTCINTclr
Clear RTC interrupt 1: Clear 0: Don't care
0
1
read-write
PMU_RTC_INTEN
RTC interrupt enable register
0xD4
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
1
32
read-write
RTCINTEN
Enable RTC interrupt 1: Enable interrupt request 0: Disable interrupt request
0
1
read-write
PMU_RTC_PAGER
RTC control config register
0xB8
32
read-write
n
0x0
0x0
ENAALM
Set alarm config 0: Disable 1: Enable
2
3
read-write
ENATMR
Set clock config 0: Disable 1: Enable
3
4
read-write
INTENA
Set interrupt config 0: Disabel 1: Enable
7
8
read-write
PAGE
Set Page config 0: Choose Page0 1: Choose Page1
0
1
read-write
Reserved0
Do not change the values.
8
32
read-write
Reserved1
Always set 0.
4
7
read-write
Reserved2
Do not change the values.
1
2
read-write
PMU_RTC_RESTR
RTC reset register
0xBC
32
read-write
n
0x0
0x0
Reserved0
Always set 0b0000_0000_1100_0001_0000_0000_11
6
32
read-write
Reserved1
Do not change the values.
0
4
read-write
RSTALM
Reset alarm 0: Not reset 1: Reset If you wan to reset an alarm, please set 1 to this value and wait to become 0.
4
5
read-write
RSTTMR
Reset clock 0: Not reset 1: Reset If you wan to reset a clock, please set 1 to this value and wait to become 0.
5
6
read-write
PMU_RTC_TIME
RTC time register
0xB0
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
30
32
read-write
Reserved1
Do not change the values.
22
24
read-write
Reserved2
Do not change the values.
15
16
read-write
Reserved3
Do not change the values.
7
8
read-write
RTCDAYSET
RTC time config of day (Binary Coded Decimal) Min: 1 Max: 31
24
30
read-write
RTCHOURSET
RTC time config of hour (Binary Coded Decimal) Min: 0 Max: 23
16
22
read-write
RTCMINUTESET
RTC time config of minute (Binary Coded Decimal) Min: 0 Max: 59
8
15
read-write
RTCSECONDSET
RTC time config of second (Binary Coded Decimal) Min: 0 Max: 59
0
7
read-write
PMU_RTC_TIME2
RTC time register2
0xC4
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
30
32
read-write
Reserved1
Do not change the values.
22
24
read-write
Reserved2
Do not change the values.
15
16
read-write
Reserved3
Do not change the values.
0
8
read-write
RTCDAYSET
RTC time config of day (Binary Coded Decimal) Min: 1 Max: 31
24
30
read-write
RTCHOURSET
RTC time config of hour (Binary Coded Decimal) Min: 0 Max: 23
16
22
read-write
RTCMINUTESET
RTC time config of minute (Binary Coded Decimal) Min: 0 Max: 59
8
15
read-write
PMU_XOSC_TRIMIN
XOSC trimming register
0x118
32
read-write
n
0x0
0x0
Reserved0
Reserved. Since this bits are regulated during the chip manufacturing, do not change value. (Use read-modify-write).
11
32
read-write
Reserved1
Reserved. Since this bits are regulated during the chip manufacturing, do not change value. (Use read-modify-write).
0
4
read-write
XO_FREQ_TUNE
Frequency tune value.
4
11
read-write
PWM
Pulse Width Modulation
PWM
0x0
0x0
0x400
registers
n
CYCLE_CH0
PWM CH0 cycle set
0x8
32
read-write
n
0x0
0x0
cycle
Cycle count register determines the PWM output period. 0 to 4095 (0x000 to 0xFFF)
0
12
read-write
CYCLE_CH1
PWM CH1 cycle set
0x108
32
read-write
n
0x0
0x0
cycle
Cycle count register determines the PWM output period. 0 to 4095 (0x000 to 0xFFF)
0
12
read-write
CYCLE_CH2
PWM CH2 cycle set
0x208
32
read-write
n
0x0
0x0
cycle
Cycle count register determines the PWM output period. 0 to 4095 (0x000 to 0xFFF)
0
12
read-write
CYCLE_CH3
PWM CH3 cycle set
0x308
32
read-write
n
0x0
0x0
cycle
Cycle count register determines the PWM output period. 0 to 4095 (0x000 to 0xFFF)
0
12
read-write
DUTY_CH0
PWM CH0 duty set
0xC
32
read-write
n
0x0
0x0
Duty
Determines the duty ratio. 0 to 4095 (0x000 to 0xFFF) duty ratio = (this value)/(cycle + 1)
0
12
read-write
DUTY_CH1
PWM CH1 duty set
0x10C
32
read-write
n
0x0
0x0
Duty
Determines the duty ratio. 0 to 4095 (0x000 to 0xFFF) duty ratio = (this value)/(cycle + 1)
0
12
read-write
DUTY_CH2
PWM CH2 duty set
0x20C
32
read-write
n
0x0
0x0
Duty
Determines the duty ratio. 0 to 4095 (0x000 to 0xFFF) duty ratio = (this value)/(cycle + 1)
0
12
read-write
DUTY_CH3
PWM CH3 duty set
0x30C
32
read-write
n
0x0
0x0
Duty
Determines the duty ratio. 0 to 4095 (0x000 to 0xFFF) duty ratio = (this value)/(cycle + 1)
0
12
read-write
INTCLR_CH0
PWM CH0 interrupt clear
0x18
32
read-write
n
0x0
0x0
IntClr
PWM interrupt clear register (initial 0, W) Writeing 1 to this register clears the interrupt status.
0
1
read-write
INTCLR_CH1
PWM CH1 interrupt clear
0x118
32
read-write
n
0x0
0x0
IntClr
PWM interrupt clear register (initial 0, W) Writeing 1 to this register clears the interrupt status.
0
1
read-write
INTCLR_CH2
PWM CH2 interrupt clear
0x218
32
read-write
n
0x0
0x0
IntClr
PWM interrupt clear register (initial 0, W) Writeing 1 to this register clears the interrupt status.
0
1
read-write
INTCLR_CH3
PWM CH3 interrupt clear
0x318
32
read-write
n
0x0
0x0
IntClr
PWM interrupt clear register (initial 0, W) Writeing 1 to this register clears the interrupt status.
0
1
read-write
PATTERN_CH0
PWM CH0 output mask set
0x4
32
read-write
n
0x0
0x0
Rhythm_Pat
PWM is output during the time this defines. 1 bit corresponds to 50 ms. 0: Output mask ON (No PWM output) 1: Output mask OFF (PWM output) This has no effect when 1-s timer is OFF.
0
20
read-write
PATTERN_CH1
PWM CH1 output mask set
0x104
32
read-write
n
0x0
0x0
Rhythm_Pat
PWM is output during the time this defines. 1 bit corresponds to 50 ms. 0: Output mask ON (No PWM output) 1: Output mask OFF (PWM output) This has no effect when 1-s timer is OFF.
0
20
read-write
PATTERN_CH2
PWM CH2 output mask set
0x204
32
read-write
n
0x0
0x0
Rhythm_Pat
PWM is output during the time this defines. 1 bit corresponds to 50 ms. 0: Output mask ON (No PWM output) 1: Output mask OFF (PWM output) This has no effect when 1-s timer is OFF.
0
20
read-write
PATTERN_CH3
PWM CH3 output mask set
0x304
32
read-write
n
0x0
0x0
Rhythm_Pat
PWM is output during the time this defines. 1 bit corresponds to 50 ms. 0: Output mask ON (No PWM output) 1: Output mask OFF (PWM output) This has no effect when 1-s timer is OFF.
0
20
read-write
PCTRL_CH0
PWM CH0 enable control
0x0
32
read-write
n
0x0
0x0
ENABLE
PWM channel enable (R/W) 0: Stop (default) 1: Start Please set cycle and duty before this is set to start.
0
1
read-write
IntMask
PWM interrupt mask (R/W) 0: Interrupt output enabled 1: Interrupt disabled (default)
3
4
read-write
Pol
PWM output polarity control (R/W) 0: Polarity inversion OFF (default) 1: Polarity inversion ON
2
3
read-write
unit_en
1-s timer enable (R/W) 0: Timer OFF (default) 1: Timer ON Please set this off before unit_starvalue is to be changed. When this is off, rhythm settings has no effect.
1
2
read-write
PCTRL_CH1
PWM CH1 enable control
0x100
32
read-write
n
0x0
0x0
ENABLE
PWM channel enable (R/W) 0: Stop (default) 1: Start Please set cycle and duty before this is set to start.
0
1
read-write
IntMask
PWM interrupt mask (R/W) 0: Interrupt output enabled 1: Interrupt disabled (default)
3
4
read-write
Pol
PWM output polarity control (R/W) 0: Polarity inversion OFF (default) 1: Polarity inversion ON
2
3
read-write
unit_en
1-s timer enable (R/W) 0: Timer OFF (default) 1: Timer ON Please set this off before unit_starvalue is to be changed. When this is off, rhythm settings has no effect.
1
2
read-write
PCTRL_CH2
PWM CH2 enable control
0x200
32
read-write
n
0x0
0x0
ENABLE
PWM channel enable (R/W) 0: Stop (default) 1: Start Please set cycle and duty before this is set to start.
0
1
read-write
IntMask
PWM interrupt mask (R/W) 0: Interrupt output enabled 1: Interrupt disabled (default)
3
4
read-write
Pol
PWM output polarity control (R/W) 0: Polarity inversion OFF (default) 1: Polarity inversion ON
2
3
read-write
unit_en
1-s timer enable (R/W) 0: Timer OFF (default) 1: Timer ON Please set this off before unit_starvalue is to be changed. When this is off, rhythm settings has no effect.
1
2
read-write
PCTRL_CH3
PWM CH3 enable control
0x300
32
read-write
n
0x0
0x0
ENABLE
PWM channel enable (R/W) 0: Stop (default) 1: Start Please set cycle and duty before this is set to start.
0
1
read-write
IntMask
PWM interrupt mask (R/W) 0: Interrupt output enabled 1: Interrupt disabled (default)
3
4
read-write
Pol
PWM output polarity control (R/W) 0: Polarity inversion OFF (default) 1: Polarity inversion ON
2
3
read-write
unit_en
1-s timer enable (R/W) 0: Timer OFF (default) 1: Timer ON Please set this off before unit_starvalue is to be changed. When this is off, rhythm settings has no effect.
1
2
read-write
STATE_CH0
PWM CH0 status
0x14
32
read-write
n
0x0
0x0
Int_state
INT status 0: Not interrupted 1: Interrupted This is cleared when INTClr bit 0 is set to 1.
0
1
read-write
Pwm_state
Cycle counter status 0: ON 1: Idle
1
2
read-write
Timer_state
1-s timer status 0: ON 1: Idle
2
3
read-write
STATE_CH1
PWM CH1 status
0x114
32
read-write
n
0x0
0x0
Int_state
INT status 0: Not interrupted 1: Interrupted This is cleared when INTClr bit 0 is set to 1.
0
1
read-write
Pwm_state
Cycle counter status 0: ON 1: Idle
1
2
read-write
Timer_state
1-s timer status 0: ON 1: Idle
2
3
read-write
STATE_CH2
PWM CH2 status
0x214
32
read-write
n
0x0
0x0
Int_state
INT status 0: Not interrupted 1: Interrupted This is cleared when INTClr bit 0 is set to 1.
0
1
read-write
Pwm_state
Cycle counter status 0: ON 1: Idle
1
2
read-write
Timer_state
1-s timer status 0: ON 1: Idle
2
3
read-write
STATE_CH3
PWM CH3 status
0x314
32
read-write
n
0x0
0x0
Int_state
INT status 0: Not interrupted 1: Interrupted This is cleared when INTClr bit 0 is set to 1.
0
1
read-write
Pwm_state
Cycle counter status 0: ON 1: Idle
1
2
read-write
Timer_state
1-s timer status 0: ON 1: Idle
2
3
read-write
UNIT_CH0
PWM CH0 rhythm counter period set
0x10
32
read-write
n
0x0
0x0
Unit_startvalue
Counter value setting to count 50 ms 0x0665 for 32.768 kHz (default) 0x9EB0F for 13 MHz Before to change this value, please make sure that PCTRL[1] unit_en = 0, STATE[2] Timer_state = 1, Pwm_state = 1.
0
20
read-write
UNIT_CH1
PWM CH1 rhythm counter period set
0x110
32
read-write
n
0x0
0x0
Unit_startvalue
Counter value setting to count 50 ms 0x0665 for 32.768 kHz (default) 0x9EB0F for 13 MHz Before to change this value, please make sure that PCTRL[1] unit_en = 0, STATE[2] Timer_state = 1, Pwm_state = 1.
0
20
read-write
UNIT_CH2
PWM CH2 rhythm counter period set
0x210
32
read-write
n
0x0
0x0
Unit_startvalue
Counter value setting to count 50 ms 0x0665 for 32.768 kHz (default) 0x9EB0F for 13 MHz Before to change this value, please make sure that PCTRL[1] unit_en = 0, STATE[2] Timer_state = 1, Pwm_state = 1.
0
20
read-write
UNIT_CH3
PWM CH3 rhythm counter period set
0x310
32
read-write
n
0x0
0x0
Unit_startvalue
Counter value setting to count 50 ms 0x0665 for 32.768 kHz (default) 0x9EB0F for 13 MHz Before to change this value, please make sure that PCTRL[1] unit_en = 0, STATE[2] Timer_state = 1, Pwm_state = 1.
0
20
read-write
SPI
Serial Peripheral Interface(Master/Slave)
SPI
0x0
0x0
0x30
registers
n
CONTROL
SPI control
0x0
32
read-write
n
0x0
0x0
SETACT
Set operation mode (R/W) 0: Configuration mode 1: Active mode (default)
1
2
read-write
SLAVE
Set master/slave mode (R/W) 0: Master mode (default) 1: Slave mode
31
32
read-write
SPCSEN0
Enable CS (R/W) 0: Disable 1: Enable (default)
8
9
read-write
SPCSPL0
Set CS polarity (R/W) 0: Low active (default) 1: High active
12
13
read-write
SPDIR
Specify LSB/MSB first (R/W) 0: MSB first (default) 1: LSB first
7
8
read-write
SPSCKPH
Specify serial clock phase (R/W) 0: Sampling at the first edge (default) 1: Sampling at the second edge
5
6
read-write
SPSCKPL
Specify serial clock polarity (R/W) 0: Sampling at high (default) 1: Sampling at low
6
7
read-write
INTCONTROL
SPI intrrupt control
0x10
32
read-write
n
0x0
0x0
RXCLR
Clear RX FIFO (R/W) 0: Do not clear (default) 1: Clear After claer, this register becomes 0.
20
21
read-write
TXCLR
Clear TX FIFO (R/W) 0: Do not clear (default) 1: Clear After claer, this register becomes 0.
12
13
read-write
INTSTATUS
SPI interrupt status
0x14
32
read-write
n
0x0
0x0
RXEMP
Read the status of RX FIFO (R) 0: RX FIFO is empty. 1: RX FIFO is not empty.
9
10
read-only
RXNUM
Read deta length in RX FIFO (R) 0000: 0 (default) 0001: 1 ... 0111: 7 1000: 8 Others: Don't care
28
32
read-only
SIFACT
Read the status of serial interface (R) 0: Idle (default) 1: Operating
11
12
read-only
TXFUL
Read the status of TX FIFO (R) 0: TX FIFO is full. 1: TX FIFO is not full.
8
9
read-only
TXNUM
Read deta length in TX FIFO (R) 0000: 0 (default) 0001: 1 ... 0111: 7 1000: 8 Others: Don't care
24
28
read-only
RXDATA
SPI RX Data
0xC
32
read-only
n
0x0
0x0
RX
Get RX data (R) When data is 24 bit length, [31:24] = 0x00 (default). When data is 16 bit length, [31:16] = 0x0000. When data is 8 bit length, [31:8] = 0x000000.
0
32
read-only
TIMINGCONTROL
SPI timing control
0x4
32
read-write
n
0x0
0x0
BASE
Set frequency devisor (R/W) 0: Not allowed 1-255: Allowed f_SPI = 13/(devisor x 2) MHz e.g. when devisor = 1, f_SPI = 6.5 MHz.
8
16
read-write
TIMINGCONTROL2
SPI timing control
0x20
32
read-write
n
0x0
0x0
ADDSPLDLY
Add sampling delay of RX data (R/W) 01: 1 clk delay (fixed)
16
18
read-write
TXDATA
SPI TX data
0x8
32
read-write
n
0x0
0x0
BYTE
Set transfer byte length (R/W) 00: 1 byte (default) 01: 2 bytes 10: 3 bytes (valid for read) 11: 4 bytes (valid for read)
16
18
read-write
CMD
Set transfer command (R/W) 0: Write (default) 1: Read
18
19
read-write
CONT
Set continuous transfer (R/W) 0: Deassert CS per word (default) 1: Keep CS between words
19
20
read-write
LEN
Default value is zero. When CMD is write (bit[18] = 0), set TX options (R/W). bit[31:26] Reserved bit[25] SPI DO polarity (0: L, 1: H) bit[24] SPI DO output status (0: keep the last data, 1: output H/L set at bit 25) When CMD is read (bit[18] = 1), set RX data length (R/W). bit[31:24] RX data length (unit is defined at bit[17:16])
24
32
read-write
TX
Set TX data (R/W) Default value is zero.
0
16
read-write
WRBIT
Set valid TX bit length (R/W) 0x0: The setting at bit[17:16] is applied (default). 0x1: 1 bit 0x2: 2 bit ... 0xF: 15 bit
20
24
read-write
TXRXLENGTH
SPI Data Langth
0x2C
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
13
32
read-write
Reserved1
Do not change the values.
5
8
read-write
RxLEN
Set the length of Rx data length 00-02: Forbidden. 03: 4bit 04: 5bit ... 1E:31bit 1F:32bit
8
13
read-write
TxLEN
Set the length of Tx data length 00-02: Forbidden 03: 4bit 04: 5bit ... 1E: 31bit 1F: 32bit
0
5
read-write
TimerBCG
Timer (BCTimer, GTimer)
TimerBCG
0x0
0x0
0x200
registers
n
TIM_BCTIMER_A
Bit Clock Timer A control
0x8
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
16
32
read-only
TimA
Start Value Timer A Set the initial value of Timer A.
0
16
read-write
TIM_BCTIMER_A_RD
Bit Clock Timer A read
0x14
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
16
32
read-only
TimARd
Current Value of Timer A
0
16
read-write
TIM_BCTIMER_B
Bit Clock Timer B control
0xC
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
16
32
read-only
TimB
Start Value Timer B Set the initial value of Timer B.
0
16
read-write
TIM_BCTIMER_B_RD
Bit Clock Timer B read
0x18
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
16
32
read-only
TimBRd
Current Value of Timer B
0
16
read-write
TIM_BCTIMER_C
Bit Clock Timer C control
0x10
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
16
32
read-only
TimC
Start Value Timer C Set the initial value of Timer C.
0
16
read-write
TIM_BCTIMER_CTRL
Bit Clock Timer Control
0x0
32
read-write
n
0x0
0x0
AEn
Enable autoreload feature for timer A 0: Stop when Timer A gets 0. 1: Reload the initial value when Timer A gets 0.
0
1
read-write
BEn
Enable autoreload feature for timer B 0: Stop when Timer B gets 0. 1: Reload the initial value when Timer B gets 0.
1
2
read-write
CEn
Enable autoreload feature for timer C 0: Stop when Timer C gets 0. 1: Reload the initial value when Timer C gets 0.
2
3
read-write
INTM1
Timer A Interrupt mask 0: the interrupt is not masked 1: the interutpt is masked
8
9
read-write
INTMB
Timer B Interrupt mask 0: the interrupt is not masked 1: the interutpt is masked
9
10
read-write
INTMC
Timer C Interrupt mask 0: the interrupt is not masked 1: the interutpt is masked
10
11
read-write
Reserved0
Do not change the values.
11
32
read-only
Reserved1
Reserved.
3
8
read-only
TIM_BCTIMER_C_RD
Bit Clock Timer C read
0x1C
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
16
32
read-only
TimCRd
Current Value of Timer C
0
16
read-write
TIM_BCTIMER_STAT
Bit Clock Timer Status
0x4
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
3
32
read-only
TimerAInt
Interrupt from Timer A 0: No interrupt from Timer A. 1: Interrupt from Timer A exist.
0
1
read-write
TimerBInt
Interrupt from Timer B 0: No interrupt from Timer B. 1: Interrupt from Timer B exist.
1
2
read-write
TimerCInt
Interrupt from Timer C 0: No interrupt from Timer C. 1: Interrupt from Timer C exist.
2
3
read-write
TIM_GTIMER_A
Timer Initial Value
0x108
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
16
32
read-only
TimARd
Start Value of TimerA.
0
16
read-write
TIM_GTIMER_A_RD
Timer Value read
0x114
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
16
32
read-write
TimerARd
Current Value of Timer A.
0
16
read-write
TIM_GTIMER_CTRL
Timer Control
0x100
32
read-write
n
0x0
0x0
AEn
Enable auto reload feature for Timer A
0
1
read-write
INTMA
Timer A Interrupt mask 0: the interrupt is not masked 1: the interutpt is masked
8
9
read-write
PRESCALERVAL
Settings for frequency divider of TimerSCLK to generate timer clock. 0x000 : No divide 0x001 : 1/2 0x002 : 1/3 ........ 0x3ff : 1/1024
16
26
read-write
Reserved0
Do not change the values.
26
32
read-only
Reserved1
Do not change the values.
9
16
read-only
Reserved2
Do not change the values.
1
8
read-only
TIM_GTIMER_STAT
Timer Status
0x104
32
read-write
n
0x0
0x0
Reserved0
Do not change the values.
1
32
read-write
TimerAInt
Interrutp bit from Timer A 0: No interrupt from Timer A. 1: Interrupt from Timer A exist.
0
1
read-write