UniStar. CX32L003 2024.05.06 ARM 32-bit Cortex-M0 Microcontroller based device, CPU clock up to 24MHz, etc. CM0+ r2p1 little 2 false 8 32 ADC ADC Register ADC 0x0 0x0 0x54 registers n ADC 24 CR0 ADC Config Register 0 0x0 32 read-write n 0x0 0x0 ADCEN ADC Enable 0 1 read-write 0 disabled 0 1 enabled 1 CLKSEL ADC Clock Select 4 3 read-write SAM ADC Sample Circle Select 11 1 read-write SEL ADC Channel Select 8 3 read-write START Start Control 1 1 read-write 0 ADC Stop 0 1 ADC Run 1 STATERST ADC Continue Convert Status Control 15 1 read-write CR1 ADC Config Register 1 0x4 32 read-write n 0x0 0x0 CT Convect mode Select 10 1 read-write HTCMP High threshold Compare Control 13 1 read-write LTCMP Low threshold Compare Control 12 1 read-write RACC_CLR Convect Result register Clear 15 1 read-write RACC_EN Convect Result Auto ADD 11 1 read-write REGCMP Area Compare Control 14 1 read-write TRIGS0 ADC Convect Auto Triger 0 0 5 read-write TRIGS1 ADC Convect Auto Triger 1 5 5 read-write CR2 ADC Config Register2 0x8 32 read-write n 0x0 0x0 ADCCN ADC Continue Convect Times Config 8 8 read-write CHEN ADC Continue Convect Channel 7-0 Enable 0 8 read-write Circle_Mode ADC Convect Rounte Mode Select 16 1 read-write HT Compare High Threshold 0x34 32 read-write n 0x0 0x0 HT ADC Convect Result Compare High threshold 0 12 read-only INTCLR Interrupt Clear Register 0x48 32 read-write n 0x0 0x0 ADCICLR Reload value to use for 10ms timing 0 8 read-only CONT_INTC No Ref 11 1 read-only 0 Ref Clk available 0 1 Ref Clk not available 1 HHT_INTC No Ref 9 1 read-only 0 Ref Clk available 0 1 Ref Clk not available 1 LLT_INTC Clock Skew 8 1 read-only REG_INTC No Ref 10 1 read-only 0 Ref Clk available 0 1 Ref Clk not available 1 INTEN Interrupt Enable Register 0x44 32 read-write n 0x0 0x0 ADCXIEN ADC Channel 7~0 Interrupt Mask Config 0 8 read-only CONT_IEN ADC 11 1 read-only 0 Disable 0 1 Enable 1 HHT_IEN HHT 9 1 read-only 0 Disable 0 1 Enable 1 LLT_IEN ADC Convect Result 8 1 read-only 0 disable 0 1 enable 1 REG_IEN ADC 10 1 read-only 0 Disable 0 1 Enable 1 LT Compare Low Threshold 0x38 32 read-write n 0x0 0x0 LT Convect Result Compare Low Threshold 0 12 read-only MSKINTSR Interrupt Status Register Behind mask 0x50 32 read-write n 0x0 0x0 ADCMIS Reload value to use for 10ms timing 0 8 read-only CONT_MIF No Ref 11 1 read-only 0 Ref Clk available 0 1 Ref Clk not available 1 HHT_MIF No Ref 9 1 read-only 0 No comment 0 1 No comment 1 LLT_MIF Clock Skew 8 1 read-only 0 10ms calibration value is exact 0 1 10ms calibration value is inexact, because of the clock frequency 1 REG_MIF No Ref 10 1 read-only 0 Ref Clk available 0 1 Ref Clk not available 1 RAWINTSR Interrupt Status Register before mask 0x4C 32 read-write n 0x0 0x0 ADCRIS Reload value to use for 10ms timing 0 8 read-only CONT_INTF CON 11 1 read-only 0 Ref Clk available 0 1 Ref Clk not available 1 HHT_INTF HHT 9 1 read-only 0 Ref Clk available 0 1 Ref Clk not available 1 LLT_INTF LLT 8 1 read-only 0 No comment 0 1 No comment 1 REG_INTF REG 10 1 read-only 0 Ref Clk available 0 1 Ref Clk not available 1 RESULT Channel Result Register 0x2C 32 read-write n 0x0 0x0 RESULT Result 0 12 read-only RESULT0 Channel 0 Result Register 0xC 32 read-write n 0x0 0x0 Result0 ADC Channel 0 Result 0 12 read-only RESULT1 Channel 1 Result Register 0x10 32 read-write n 0x0 0x0 Result1 Channel 1 Result 0 24 read-only RESULT2 Channel 2 Result Register 0x14 32 read-write n 0x0 0x0 Result2 Channel 2 Result 0 12 read-only RESULT3 Channel 3 Result Register 0x18 32 read-write n 0x0 0x0 Result3 ADC Channel 3 Result 0 12 read-only RESULT4 Channel 4 Result Register 0x1C 32 read-write n 0x0 0x0 Result4 Channel 4 Result 0 12 read-only RESULT5 Channel 5 Result Register 0x20 32 read-write n 0x0 0x0 Result5 Channel 5 Result 0 12 read-only RESULT6 Channel 6 Result Register 0x24 32 read-write n 0x0 0x0 Result6 Channel 6 Result 0 12 read-only RESULT7 Channel 7 Result Register 0x28 32 read-write n 0x0 0x0 Result7 Channel 7 Result 0 12 read-only RESULT_ACC Channel Result accumulate 0x30 32 read-write n 0x0 0x0 HT Convect Result Compare High Therashold 0 12 read-only AWK Auto wake AWK 0x0 0x0 0x18 registers n AWK 28 CR Auto Wake Timer Control Register 0x0 32 read-write n 0x0 0x0 AWKEN ADC_ Start Control 4 1 read-write DIVSEL ADC Enable 0 4 read-write HXPRSC ADC Channel Select 8 15 read-write TCLKSEL ADC Clock Select 5 2 read-write INTCLR Auto Wake Interrupt Clear Register 0xC 32 read-write n 0x0 0x0 INTCLR ADC Channel 0 Result 0 1 write-only RLOAD Auto Wake Timer ReLoad Data Register 0x4 32 read-write n 0x0 0x0 RLDVAL ADC Convect Auto Triger 0 0 8 read-write SR Auto Wake Timer Status Register 0x8 32 read-write n 0x0 0x0 AWUF ADC Continue Convect Channel 7-0 Enable 0 1 read-only BEEP BEEP BEEP 0x0 0x0 0x4 registers n CSR BEEP Control Status Register 0x0 32 read-write n 0x0 0x0 BEEPDIV ADC Enable 0 12 read-write BEEPEN ADC Channel Select 18 1 read-write BEEPSEL ADC_ Start Control 16 2 read-write CLKSEL ADC Clock Select 20 2 read-write CLKTRIM CLK_TRIM CLKTRIM 0x0 0x0 0x1C registers n CLKTRIM 31 CALCNT CAL 0xC 32 read-write n 0x0 0x0 CALCNT ADC_Channel 5 Result 0 32 read-only CALCON Count Overtime Config Register 0x18 32 read-write n 0x0 0x0 CALOVCNT ADC_Channel 2 Result 0 16 read-write CR Config Register 0x0 32 read-write n 0x0 0x0 CALCLK_SEL ADC Clock Select 4 2 read-write CLKEN ADC Continue Convert Status Control 8 1 read-write IE ADC Sample Circle Select 7 1 read-write MON_EN ADC Channel Select 6 1 read-write REFCLK_SEL ADC_ Start Control 1 3 read-write TRIM_START ADC Enable 0 1 read-write ICLR Interrupt Flag Clear Register 0x14 32 read-write n 0x0 0x0 HXT_FAULT_CLR ADC_Channel 1 Result 3 1 write-only LXT_FAULT_CLR ADC_Channel 1 Result 2 1 write-only IFR Interrupt Flag Register 0x10 32 read-write n 0x0 0x0 CALCNT_OVF ADC Channel 0 Result 1 1 read-only HXT_FAULT ADC Channel 0 Result 3 1 read-only LXT_FAULT ADC Channel 0 Result 2 1 read-only STOP ADC Channel 0 Result 0 1 read-only REFCNT Reference Count Register 0x8 32 read-write n 0x0 0x0 REFCNT ADC Continue Convect Channel 7-0 Enable 0 32 read-only REFCON Reference Count Orignal Config Register 0x4 32 read-write n 0x0 0x0 RCNTVAL ADC Convect Auto Triger 0 0 32 read-write CRC CRC_Register CRC 0x0 0x0 0x100 registers n DATA CRC Data Register 0x80 128 read-write n 0x0 0x0 CRC_DATA CRC 0 32 read-write RESULT RESULT_Register 0x4 32 read-write n 0x0 0x0 FLAG flag 16 1 read-write RESULT Result 0 16 read-write DBG Debug MCU DBG 0x0 0x0 0x4 registers n APBFX Mode Control Register 0x0 32 read-write n 0x0 0x0 BEEPDBGSTOP No comment 8 1 read-write IWDGDBGSTOP No comment 9 1 read-write KEY No comment 16 16 read-write LPTIMDBGSTOP No comment 2 1 read-write PCADBGSTOP No comment 4 1 read-write RTCDBGSTOP No comment 6 1 read-write TIM10DBGSTOP No comment 0 1 read-write TIM11DBGSTOP No comment 1 1 read-write TIM1DBGSTOP No comment 5 1 read-write TIM2DBGSTOP No comment 11 1 read-write WWDGDBGSTOP No comment 10 1 read-write FLASH Flash Controller FLASH 0x0 0x0 0x1C registers n FLASH 4 BYPASS 0X5A5A-0XA5A5 sequence Register 0xC 32 read-write n 0x0 0x0 BYPASSSEQ Reload value to use for 10ms timing 0 16 write-only CR Control Register 0x0 32 read-write n 0x0 0x0 BUSY BUSY FLAG 2 1 read-only IE IE 3 2 read-write OP Flash Operation Mode 0 2 read-write ICLR Interrupt Flag Clear Register 0x8 32 read-write n 0x0 0x0 ICLR0 ICLR0 0 1 write-only ICLR1 ICLR1 1 1 write-only IFR Interrupt flag Register 0x4 32 read-write n 0x0 0x0 IF0 IF0 0 1 read-only IF1 IF1 1 1 read-only ISPCON Flash ISP Control register 0x18 32 read-write n 0x0 0x0 ISP_CON ISP Function Config 0 1 read-write SLOCK0 Sector Write Protect Register0 0x10 32 read-write n 0x0 0x0 SLOCK0_0 SLOCK0 0 1 read-write SLOCK0_1 SLOCK0 1 1 read-write SLOCK0_10 SLOCK0 10 1 read-write SLOCK0_11 SLOCK0 11 1 read-write SLOCK0_12 SLOCK0 12 1 read-write SLOCK0_13 SLOCK0 13 1 read-write SLOCK0_14 SLOCK0 14 1 read-write SLOCK0_15 SLOCK0 15 1 read-write SLOCK0_16 SLOCK0 16 1 read-write SLOCK0_17 SLOCK0 17 1 read-write SLOCK0_18 SLOCK0 18 1 read-write SLOCK0_19 SLOCK0 19 1 read-write SLOCK0_2 SLOCK0 2 1 read-write SLOCK0_20 SLOCK0 20 1 read-write SLOCK0_21 SLOCK0 21 1 read-write SLOCK0_22 SLOCK0 22 1 read-write SLOCK0_23 SLOCK0 23 1 read-write SLOCK0_24 SLOCK0 24 1 read-write SLOCK0_25 SLOCK0 25 1 read-write SLOCK0_26 SLOCK0 26 1 read-write SLOCK0_27 SLOCK0 27 1 read-write SLOCK0_28 SLOCK0 28 1 read-write SLOCK0_29 SLOCK0 29 1 read-write SLOCK0_3 SLOCK0 3 1 read-write SLOCK0_30 SLOCK0 30 1 read-write SLOCK0_31 SLOCK0 31 1 read-write SLOCK0_4 SLOCK0 4 1 read-write SLOCK0_5 SLOCK0 5 1 read-write SLOCK0_6 SLOCK0 6 1 read-write SLOCK0_7 SLOCK0 7 1 read-write SLOCK0_8 SLOCK0 8 1 read-write SLOCK0_9 SLOCK0 9 1 read-write SLOCK1 Sector Write Protect Register1 0x14 32 read-write n 0x0 0x0 SLOCK1_0 SLOCK1 0 1 read-write SLOCK1_1 SLOCK1 1 1 read-write SLOCK1_10 SLOCK1 10 1 read-write SLOCK1_11 SLOCK1 11 1 read-write SLOCK1_12 SLOCK1 12 1 read-write SLOCK1_13 SLOCK1 13 1 read-write SLOCK1_14 SLOCK1 14 1 read-write SLOCK1_15 SLOCK1 15 1 read-write SLOCK1_16 SLOCK1 16 1 read-write SLOCK1_17 SLOCK1 17 1 read-write SLOCK1_18 SLOCK1 18 1 read-write SLOCK1_19 SLOCK1 19 1 read-write SLOCK1_2 SLOCK1 2 1 read-write SLOCK1_20 SLOCK1 20 1 read-write SLOCK1_21 SLOCK1 21 1 read-write SLOCK1_22 SLOCK1 22 1 read-write SLOCK1_23 SLOCK1 23 1 read-write SLOCK1_24 SLOCK1 24 1 read-write SLOCK1_25 SLOCK1 25 1 read-write SLOCK1_26 SLOCK1 26 1 read-write SLOCK1_27 SLOCK1 27 1 read-write SLOCK1_28 SLOCK1 28 1 read-write SLOCK1_29 SLOCK1 29 1 read-write SLOCK1_3 SLOCK1 3 1 read-write SLOCK1_30 SLOCK1 30 1 read-write SLOCK1_31 SLOCK1 31 1 read-write SLOCK1_4 SLOCK1 4 1 read-write SLOCK1_5 SLOCK1 5 1 read-write SLOCK1_6 SLOCK1 6 1 read-write SLOCK1_7 SLOCK1 7 1 read-write SLOCK1_8 SLOCK1 8 1 read-write SLOCK1_9 SLOCK1 9 1 read-write GPIOA GPIOA register list GPIO 0x0 0x0 0x4C registers n GPIOA 0 AFR Multiplex Function Register 0x48 32 read-write n 0x0 0x0 PxAFR0 PA AFR 0 4 read-write PxAFR1 PA AFR 4 4 read-write PxAFR2 PA AFR 8 4 read-write PxAFR3 PA AFR 12 4 read-write PxAFR4 PA AFR 16 4 read-write PxAFR5 PA AFR 20 4 read-write PxAFR6 PA AFR 24 4 read-write PxAFR7 PA AFR 28 4 read-write DBCLKCR Input Debounce clock Config register 0x38 32 read-write n 0x0 0x0 DBCLKEN DB 4 1 read-write DBCLK_DIV DB CLK 0 4 read-write DIRCR Input Output model Register 0x0 32 read-write n 0x0 0x0 PxDIR0 PA DIR0 0 1 read-write PxDIR1 PA DIR1 1 1 read-write PxDIR2 PA DIR2 2 1 read-write PxDIR3 PA DIR3 3 1 read-write PxDIR4 PA DIR4 4 1 read-write PxDIR5 PA DIR5 5 1 read-write PxDIR6 PA DIR6 6 1 read-write PxDIR7 PA DIR7 7 1 read-write DRVCR Driver Strength Config 0x44 32 read-write n 0x0 0x0 PxDRV0 PADRV 0 1 read-write PxDRV1 PADRV 1 1 read-write PxDRV2 PADRV 2 1 read-write PxDRV3 PADRV 3 1 read-write PxDRV4 PADRV 4 1 read-write PxDRV5 PADRV 5 1 read-write PxDRV6 PADRV 6 1 read-write PxDRV7 PADRV 7 1 read-write IDR Input Data Register 0xC 32 read-write n 0x0 0x0 PxID0 PA Input Value 0 1 read-write PxID1 PA Input Value 1 1 read-write PxID2 PA Input Value 2 1 read-write PxID3 PA Input Value 3 1 read-write PxID4 PA Input Value 4 1 read-write PxID5 PA Input Value 5 1 read-write PxID6 PA Input Value 6 1 read-write PxID7 PA Input Value 7 1 read-write INDBEN Input Debounce and synchronous Enable Register 0x34 32 read-write n 0x0 0x0 PxDIDB Reload value to use for 10ms timing 0 8 read-write SYNC_EN enable 8 1 read-write INTANY Edge Trigger Interrupt Register 0x28 32 read-write n 0x0 0x0 PxIANY0 PA IANY 0 1 read-write PxIANY1 PA IANY 1 1 read-write PxIANY2 PA IANY 2 1 read-write PxIANY3 PA IANY 3 1 read-write PxIANY4 PA IANY 4 1 read-write PxIANY5 PA IANY 5 1 read-write PxIANY6 PA IANY 6 1 read-write PxIANY7 PA IANY 7 1 read-write INTCLR Interrupt Clear Register 0x1C 32 read-write n 0x0 0x0 PxICLR0 PA ICLR0 0 1 write-only PxICLR1 PA ICLR 1 1 write-only PxICLR2 PA ICLR 2 1 write-only PxICLR3 PA ICLR 3 1 write-only PxICLR4 PA ICLR 4 1 write-only PxICLR5 PA ICLR 5 1 write-only PxICLR6 PA ICLR 6 1 write-only PxICLR7 PA ICLR 7 1 write-only INTEN Inerrupt Enable Register 0x10 32 read-write n 0x0 0x0 PxIEN0 PA Interrupt Enable 0 1 read-write PxIEN1 PA Interrupt Enable 1 1 read-write PxIEN2 PA Interrupt Enable 2 1 read-write PxIEN3 PA Interrupt Enable 3 1 read-write PxIEN4 PA Interrupt Enable 4 1 read-write PxIEN5 PA Interrupt Enable 5 1 read-write PxIEN6 PA Interrupt Enable 6 1 read-write PxIEN7 PA Interrupt Enable 7 1 read-write INTPOLCR Interrupt Sytle Value Register 0x24 32 read-write n 0x0 0x0 PxIVAL0 PA Interrupt Value 0 1 read-write PxIVAL1 PA Interrupt Value 1 1 read-write PxIVAL2 PA Interrupt Value 2 1 read-write PxIVAL3 PA Interrupt Value 3 1 read-write PxIVAL4 PA Interrupt Value 4 1 read-write PxIVAL5 PA Interrupt Value 5 1 read-write PxIVAL6 PA Interrupt Value 6 1 read-write PxIVAL7 PA Interrupt Value 7 1 read-write INTTYPCR Interrupt Style Register 0x20 32 read-write n 0x0 0x0 PxITYPE0 PA Interrupt type 0 1 read-write PxITYPE1 PA Interrupt type 1 1 read-write PxITYPE2 PA Interrupt type 2 1 read-write PxITYPE3 PA Interrupt type 3 1 read-write PxITYPE4 PA Interrupt type 4 1 read-write PxITYPE5 PA Interrupt type 5 1 read-write PxITYPE6 PA Interrupt type 6 1 read-write PxITYPE7 PA Interrupt type 7 1 read-write MSKINTSR Interrupt Status Register 0x18 32 read-write n 0x0 0x0 PxMIS0 PA MIS0 0 1 read-only PxMIS1 PA MIS1 1 1 read-only PxMIS2 PA MIS2 2 1 read-only PxMIS3 PA MIS 3 1 read-only PxMIS4 PA MIS 4 1 read-only PxMIS5 PA MIS 5 1 read-only PxMIS6 PA MIS 6 1 read-only PxMIS7 PA MIS 7 1 read-only ODCLR Output Clear Register 0x30 32 read-write n 0x0 0x0 PxODCLR0 PAODCLR 0 1 write-only PxODCLR1 PAODCLR 1 1 write-only PxODCLR2 PAODCLR 2 1 write-only PxODCLR3 PAODCLR 3 1 write-only PxODCLR4 PAODCLR 4 1 write-only PxODCLR5 PAODCLR 5 1 write-only PxODCLR6 PAODCLR 6 1 write-only PxODCLR7 PAODCLR 7 1 write-only ODR Output Data Register 0x8 32 read-write n 0x0 0x0 PxOD0 PA Output Value Config 0 1 read-write PxOD1 PA Output Value Config 1 1 read-write PxOD2 PA Output Value Config 2 1 read-write PxOD3 PA Output Value Config 3 1 read-write PxOD4 PA Output Value Config 4 1 read-write PxOD5 PA Output Value Config 5 1 read-write PxOD6 PA Output Value Config 6 1 read-write PxOD7 PA Output Value Config 7 1 read-write ODSET Output Setting Register 0x2C 32 read-write n 0x0 0x0 PxODSET0 PA Output Setting bit 0 1 write-only PxODSET1 PA Output Setting bit 1 1 write-only PxODSET2 PA Output Setting bit 2 1 write-only PxODSET3 PA Output Setting bit 3 1 write-only PxODSET4 PA Output Setting bit 4 1 write-only PxODSET5 PA Output Setting bit 5 1 write-only PxODSET6 PA Output Setting bit 6 1 write-only PxODSET7 PA Output Setting bit 7 1 write-only OTYPER Output Type register 0x4 32 read-write n 0x0 0x0 PxOTYP0 PA Output Type0 0 1 read-write PxOTYP1 PA Output Type1 1 1 read-write PxOTYP2 PA Output Type2 2 1 read-write PxOTYP3 PA Output Type3 3 1 read-write PxOTYP4 PA Output Type4 4 1 read-write PxOTYP5 PA Output Type5 5 1 read-write PxOTYP6 PA Output Type6 6 1 read-write PxOTYP7 PA Output Type7 7 1 read-write PUPDR PullUp and PullDown Register 0x3C 32 read-write n 0x0 0x0 PxPUPD0 PA PullUP PullDown 0 2 read-write PxPUPD1 PA PullUP PullDown 2 2 read-write PxPUPD2 PA PullUP PullDown 4 2 read-write PxPUPD3 PA PullUP PullDown 6 2 read-write PxPUPD4 PA PullUP PullDown 8 2 read-write PxPUPD5 PA PullUP PullDown 10 2 read-write PxPUPD6 PA PullUP PullDown 12 2 read-write PxPUPD7 PA PullUP PullDown 14 2 read-write RAWINTST Interrupt Raw Status register 0x14 32 read-write n 0x0 0x0 PxRIS0 PA RIS 0 1 read-only PxRIS1 PA RIS 1 1 read-only PxRIS2 PA RIS 2 1 read-only PxRIS3 PA RIS 3 1 read-only PxRIS4 PA RIS 4 1 read-only PxRIS5 PA RIS 5 1 read-only PxRIS6 PA RIS 6 1 read-only PxRIS7 PA RIS 7 1 read-only SLEWCR Voltage Convertion Speed Control 0x40 32 read-write n 0x0 0x0 PASR0 PA 0 1 read-write PxSR1 PA 1 1 read-write PxSR2 PA 2 1 read-write PxSR3 PA 3 1 read-write PxSR4 PA 4 1 read-write PxSR5 PA 5 1 read-write PxSR6 PA 6 1 read-write PxSR7 PA 7 1 read-write GPIOB GPIOA register list GPIO 0x0 0x0 0x4C registers n GPIOB GPIOB global interrupt 1 AFR Multiplex Function Register 0x48 32 read-write n 0x0 0x0 PxAFR0 PA AFR 0 4 read-write PxAFR1 PA AFR 4 4 read-write PxAFR2 PA AFR 8 4 read-write PxAFR3 PA AFR 12 4 read-write PxAFR4 PA AFR 16 4 read-write PxAFR5 PA AFR 20 4 read-write PxAFR6 PA AFR 24 4 read-write PxAFR7 PA AFR 28 4 read-write DBCLKCR Input Debounce clock Config register 0x38 32 read-write n 0x0 0x0 DBCLKEN DB 4 1 read-write DBCLK_DIV DB CLK 0 4 read-write DIRCR Input Output model Register 0x0 32 read-write n 0x0 0x0 PxDIR0 PA DIR0 0 1 read-write PxDIR1 PA DIR1 1 1 read-write PxDIR2 PA DIR2 2 1 read-write PxDIR3 PA DIR3 3 1 read-write PxDIR4 PA DIR4 4 1 read-write PxDIR5 PA DIR5 5 1 read-write PxDIR6 PA DIR6 6 1 read-write PxDIR7 PA DIR7 7 1 read-write DRVCR Driver Strength Config 0x44 32 read-write n 0x0 0x0 PxDRV0 PADRV 0 1 read-write PxDRV1 PADRV 1 1 read-write PxDRV2 PADRV 2 1 read-write PxDRV3 PADRV 3 1 read-write PxDRV4 PADRV 4 1 read-write PxDRV5 PADRV 5 1 read-write PxDRV6 PADRV 6 1 read-write PxDRV7 PADRV 7 1 read-write IDR Input Data Register 0xC 32 read-write n 0x0 0x0 PxID0 PA Input Value 0 1 read-write PxID1 PA Input Value 1 1 read-write PxID2 PA Input Value 2 1 read-write PxID3 PA Input Value 3 1 read-write PxID4 PA Input Value 4 1 read-write PxID5 PA Input Value 5 1 read-write PxID6 PA Input Value 6 1 read-write PxID7 PA Input Value 7 1 read-write INDBEN Input Debounce and synchronous Enable Register 0x34 32 read-write n 0x0 0x0 PxDIDB Reload value to use for 10ms timing 0 8 read-write SYNC_EN enable 8 1 read-write INTANY Edge Trigger Interrupt Register 0x28 32 read-write n 0x0 0x0 PxIANY0 PA IANY 0 1 read-write PxIANY1 PA IANY 1 1 read-write PxIANY2 PA IANY 2 1 read-write PxIANY3 PA IANY 3 1 read-write PxIANY4 PA IANY 4 1 read-write PxIANY5 PA IANY 5 1 read-write PxIANY6 PA IANY 6 1 read-write PxIANY7 PA IANY 7 1 read-write INTCLR Interrupt Clear Register 0x1C 32 read-write n 0x0 0x0 PxICLR0 PA ICLR0 0 1 write-only PxICLR1 PA ICLR 1 1 write-only PxICLR2 PA ICLR 2 1 write-only PxICLR3 PA ICLR 3 1 write-only PxICLR4 PA ICLR 4 1 write-only PxICLR5 PA ICLR 5 1 write-only PxICLR6 PA ICLR 6 1 write-only PxICLR7 PA ICLR 7 1 write-only INTEN Inerrupt Enable Register 0x10 32 read-write n 0x0 0x0 PxIEN0 PA Interrupt Enable 0 1 read-write PxIEN1 PA Interrupt Enable 1 1 read-write PxIEN2 PA Interrupt Enable 2 1 read-write PxIEN3 PA Interrupt Enable 3 1 read-write PxIEN4 PA Interrupt Enable 4 1 read-write PxIEN5 PA Interrupt Enable 5 1 read-write PxIEN6 PA Interrupt Enable 6 1 read-write PxIEN7 PA Interrupt Enable 7 1 read-write INTPOLCR Interrupt Sytle Value Register 0x24 32 read-write n 0x0 0x0 PxIVAL0 PA Interrupt Value 0 1 read-write PxIVAL1 PA Interrupt Value 1 1 read-write PxIVAL2 PA Interrupt Value 2 1 read-write PxIVAL3 PA Interrupt Value 3 1 read-write PxIVAL4 PA Interrupt Value 4 1 read-write PxIVAL5 PA Interrupt Value 5 1 read-write PxIVAL6 PA Interrupt Value 6 1 read-write PxIVAL7 PA Interrupt Value 7 1 read-write INTTYPCR Interrupt Style Register 0x20 32 read-write n 0x0 0x0 PxITYPE0 PA Interrupt type 0 1 read-write PxITYPE1 PA Interrupt type 1 1 read-write PxITYPE2 PA Interrupt type 2 1 read-write PxITYPE3 PA Interrupt type 3 1 read-write PxITYPE4 PA Interrupt type 4 1 read-write PxITYPE5 PA Interrupt type 5 1 read-write PxITYPE6 PA Interrupt type 6 1 read-write PxITYPE7 PA Interrupt type 7 1 read-write MSKINTSR Interrupt Status Register 0x18 32 read-write n 0x0 0x0 PxMIS0 PA MIS0 0 1 read-only PxMIS1 PA MIS1 1 1 read-only PxMIS2 PA MIS2 2 1 read-only PxMIS3 PA MIS 3 1 read-only PxMIS4 PA MIS 4 1 read-only PxMIS5 PA MIS 5 1 read-only PxMIS6 PA MIS 6 1 read-only PxMIS7 PA MIS 7 1 read-only ODCLR Output Clear Register 0x30 32 read-write n 0x0 0x0 PxODCLR0 PAODCLR 0 1 write-only PxODCLR1 PAODCLR 1 1 write-only PxODCLR2 PAODCLR 2 1 write-only PxODCLR3 PAODCLR 3 1 write-only PxODCLR4 PAODCLR 4 1 write-only PxODCLR5 PAODCLR 5 1 write-only PxODCLR6 PAODCLR 6 1 write-only PxODCLR7 PAODCLR 7 1 write-only ODR Output Data Register 0x8 32 read-write n 0x0 0x0 PxOD0 PA Output Value Config 0 1 read-write PxOD1 PA Output Value Config 1 1 read-write PxOD2 PA Output Value Config 2 1 read-write PxOD3 PA Output Value Config 3 1 read-write PxOD4 PA Output Value Config 4 1 read-write PxOD5 PA Output Value Config 5 1 read-write PxOD6 PA Output Value Config 6 1 read-write PxOD7 PA Output Value Config 7 1 read-write ODSET Output Setting Register 0x2C 32 read-write n 0x0 0x0 PxODSET0 PA Output Setting bit 0 1 write-only PxODSET1 PA Output Setting bit 1 1 write-only PxODSET2 PA Output Setting bit 2 1 write-only PxODSET3 PA Output Setting bit 3 1 write-only PxODSET4 PA Output Setting bit 4 1 write-only PxODSET5 PA Output Setting bit 5 1 write-only PxODSET6 PA Output Setting bit 6 1 write-only PxODSET7 PA Output Setting bit 7 1 write-only OTYPER Output Type register 0x4 32 read-write n 0x0 0x0 PxOTYP0 PA Output Type0 0 1 read-write PxOTYP1 PA Output Type1 1 1 read-write PxOTYP2 PA Output Type2 2 1 read-write PxOTYP3 PA Output Type3 3 1 read-write PxOTYP4 PA Output Type4 4 1 read-write PxOTYP5 PA Output Type5 5 1 read-write PxOTYP6 PA Output Type6 6 1 read-write PxOTYP7 PA Output Type7 7 1 read-write PUPDR PullUp and PullDown Register 0x3C 32 read-write n 0x0 0x0 PxPUPD0 PA PullUP PullDown 0 2 read-write PxPUPD1 PA PullUP PullDown 2 2 read-write PxPUPD2 PA PullUP PullDown 4 2 read-write PxPUPD3 PA PullUP PullDown 6 2 read-write PxPUPD4 PA PullUP PullDown 8 2 read-write PxPUPD5 PA PullUP PullDown 10 2 read-write PxPUPD6 PA PullUP PullDown 12 2 read-write PxPUPD7 PA PullUP PullDown 14 2 read-write RAWINTST Interrupt Raw Status register 0x14 32 read-write n 0x0 0x0 PxRIS0 PA RIS 0 1 read-only PxRIS1 PA RIS 1 1 read-only PxRIS2 PA RIS 2 1 read-only PxRIS3 PA RIS 3 1 read-only PxRIS4 PA RIS 4 1 read-only PxRIS5 PA RIS 5 1 read-only PxRIS6 PA RIS 6 1 read-only PxRIS7 PA RIS 7 1 read-only SLEWCR Voltage Convertion Speed Control 0x40 32 read-write n 0x0 0x0 PASR0 PA 0 1 read-write PxSR1 PA 1 1 read-write PxSR2 PA 2 1 read-write PxSR3 PA 3 1 read-write PxSR4 PA 4 1 read-write PxSR5 PA 5 1 read-write PxSR6 PA 6 1 read-write PxSR7 PA 7 1 read-write GPIOC GPIOA register list GPIO 0x0 0x0 0x4C registers n GPIOC GPIOC global interrupt 2 AFR Multiplex Function Register 0x48 32 read-write n 0x0 0x0 PxAFR0 PA AFR 0 4 read-write PxAFR1 PA AFR 4 4 read-write PxAFR2 PA AFR 8 4 read-write PxAFR3 PA AFR 12 4 read-write PxAFR4 PA AFR 16 4 read-write PxAFR5 PA AFR 20 4 read-write PxAFR6 PA AFR 24 4 read-write PxAFR7 PA AFR 28 4 read-write DBCLKCR Input Debounce clock Config register 0x38 32 read-write n 0x0 0x0 DBCLKEN DB 4 1 read-write DBCLK_DIV DB CLK 0 4 read-write DIRCR Input Output model Register 0x0 32 read-write n 0x0 0x0 PxDIR0 PA DIR0 0 1 read-write PxDIR1 PA DIR1 1 1 read-write PxDIR2 PA DIR2 2 1 read-write PxDIR3 PA DIR3 3 1 read-write PxDIR4 PA DIR4 4 1 read-write PxDIR5 PA DIR5 5 1 read-write PxDIR6 PA DIR6 6 1 read-write PxDIR7 PA DIR7 7 1 read-write DRVCR Driver Strength Config 0x44 32 read-write n 0x0 0x0 PxDRV0 PADRV 0 1 read-write PxDRV1 PADRV 1 1 read-write PxDRV2 PADRV 2 1 read-write PxDRV3 PADRV 3 1 read-write PxDRV4 PADRV 4 1 read-write PxDRV5 PADRV 5 1 read-write PxDRV6 PADRV 6 1 read-write PxDRV7 PADRV 7 1 read-write IDR Input Data Register 0xC 32 read-write n 0x0 0x0 PxID0 PA Input Value 0 1 read-write PxID1 PA Input Value 1 1 read-write PxID2 PA Input Value 2 1 read-write PxID3 PA Input Value 3 1 read-write PxID4 PA Input Value 4 1 read-write PxID5 PA Input Value 5 1 read-write PxID6 PA Input Value 6 1 read-write PxID7 PA Input Value 7 1 read-write INDBEN Input Debounce and synchronous Enable Register 0x34 32 read-write n 0x0 0x0 PxDIDB Reload value to use for 10ms timing 0 8 read-write SYNC_EN enable 8 1 read-write INTANY Edge Trigger Interrupt Register 0x28 32 read-write n 0x0 0x0 PxIANY0 PA IANY 0 1 read-write PxIANY1 PA IANY 1 1 read-write PxIANY2 PA IANY 2 1 read-write PxIANY3 PA IANY 3 1 read-write PxIANY4 PA IANY 4 1 read-write PxIANY5 PA IANY 5 1 read-write PxIANY6 PA IANY 6 1 read-write PxIANY7 PA IANY 7 1 read-write INTCLR Interrupt Clear Register 0x1C 32 read-write n 0x0 0x0 PxICLR0 PA ICLR0 0 1 write-only PxICLR1 PA ICLR 1 1 write-only PxICLR2 PA ICLR 2 1 write-only PxICLR3 PA ICLR 3 1 write-only PxICLR4 PA ICLR 4 1 write-only PxICLR5 PA ICLR 5 1 write-only PxICLR6 PA ICLR 6 1 write-only PxICLR7 PA ICLR 7 1 write-only INTEN Inerrupt Enable Register 0x10 32 read-write n 0x0 0x0 PxIEN0 PA Interrupt Enable 0 1 read-write PxIEN1 PA Interrupt Enable 1 1 read-write PxIEN2 PA Interrupt Enable 2 1 read-write PxIEN3 PA Interrupt Enable 3 1 read-write PxIEN4 PA Interrupt Enable 4 1 read-write PxIEN5 PA Interrupt Enable 5 1 read-write PxIEN6 PA Interrupt Enable 6 1 read-write PxIEN7 PA Interrupt Enable 7 1 read-write INTPOLCR Interrupt Sytle Value Register 0x24 32 read-write n 0x0 0x0 PxIVAL0 PA Interrupt Value 0 1 read-write PxIVAL1 PA Interrupt Value 1 1 read-write PxIVAL2 PA Interrupt Value 2 1 read-write PxIVAL3 PA Interrupt Value 3 1 read-write PxIVAL4 PA Interrupt Value 4 1 read-write PxIVAL5 PA Interrupt Value 5 1 read-write PxIVAL6 PA Interrupt Value 6 1 read-write PxIVAL7 PA Interrupt Value 7 1 read-write INTTYPCR Interrupt Style Register 0x20 32 read-write n 0x0 0x0 PxITYPE0 PA Interrupt type 0 1 read-write PxITYPE1 PA Interrupt type 1 1 read-write PxITYPE2 PA Interrupt type 2 1 read-write PxITYPE3 PA Interrupt type 3 1 read-write PxITYPE4 PA Interrupt type 4 1 read-write PxITYPE5 PA Interrupt type 5 1 read-write PxITYPE6 PA Interrupt type 6 1 read-write PxITYPE7 PA Interrupt type 7 1 read-write MSKINTSR Interrupt Status Register 0x18 32 read-write n 0x0 0x0 PxMIS0 PA MIS0 0 1 read-only PxMIS1 PA MIS1 1 1 read-only PxMIS2 PA MIS2 2 1 read-only PxMIS3 PA MIS 3 1 read-only PxMIS4 PA MIS 4 1 read-only PxMIS5 PA MIS 5 1 read-only PxMIS6 PA MIS 6 1 read-only PxMIS7 PA MIS 7 1 read-only ODCLR Output Clear Register 0x30 32 read-write n 0x0 0x0 PxODCLR0 PAODCLR 0 1 write-only PxODCLR1 PAODCLR 1 1 write-only PxODCLR2 PAODCLR 2 1 write-only PxODCLR3 PAODCLR 3 1 write-only PxODCLR4 PAODCLR 4 1 write-only PxODCLR5 PAODCLR 5 1 write-only PxODCLR6 PAODCLR 6 1 write-only PxODCLR7 PAODCLR 7 1 write-only ODR Output Data Register 0x8 32 read-write n 0x0 0x0 PxOD0 PA Output Value Config 0 1 read-write PxOD1 PA Output Value Config 1 1 read-write PxOD2 PA Output Value Config 2 1 read-write PxOD3 PA Output Value Config 3 1 read-write PxOD4 PA Output Value Config 4 1 read-write PxOD5 PA Output Value Config 5 1 read-write PxOD6 PA Output Value Config 6 1 read-write PxOD7 PA Output Value Config 7 1 read-write ODSET Output Setting Register 0x2C 32 read-write n 0x0 0x0 PxODSET0 PA Output Setting bit 0 1 write-only PxODSET1 PA Output Setting bit 1 1 write-only PxODSET2 PA Output Setting bit 2 1 write-only PxODSET3 PA Output Setting bit 3 1 write-only PxODSET4 PA Output Setting bit 4 1 write-only PxODSET5 PA Output Setting bit 5 1 write-only PxODSET6 PA Output Setting bit 6 1 write-only PxODSET7 PA Output Setting bit 7 1 write-only OTYPER Output Type register 0x4 32 read-write n 0x0 0x0 PxOTYP0 PA Output Type0 0 1 read-write PxOTYP1 PA Output Type1 1 1 read-write PxOTYP2 PA Output Type2 2 1 read-write PxOTYP3 PA Output Type3 3 1 read-write PxOTYP4 PA Output Type4 4 1 read-write PxOTYP5 PA Output Type5 5 1 read-write PxOTYP6 PA Output Type6 6 1 read-write PxOTYP7 PA Output Type7 7 1 read-write PUPDR PullUp and PullDown Register 0x3C 32 read-write n 0x0 0x0 PxPUPD0 PA PullUP PullDown 0 2 read-write PxPUPD1 PA PullUP PullDown 2 2 read-write PxPUPD2 PA PullUP PullDown 4 2 read-write PxPUPD3 PA PullUP PullDown 6 2 read-write PxPUPD4 PA PullUP PullDown 8 2 read-write PxPUPD5 PA PullUP PullDown 10 2 read-write PxPUPD6 PA PullUP PullDown 12 2 read-write PxPUPD7 PA PullUP PullDown 14 2 read-write RAWINTST Interrupt Raw Status register 0x14 32 read-write n 0x0 0x0 PxRIS0 PA RIS 0 1 read-only PxRIS1 PA RIS 1 1 read-only PxRIS2 PA RIS 2 1 read-only PxRIS3 PA RIS 3 1 read-only PxRIS4 PA RIS 4 1 read-only PxRIS5 PA RIS 5 1 read-only PxRIS6 PA RIS 6 1 read-only PxRIS7 PA RIS 7 1 read-only SLEWCR Voltage Convertion Speed Control 0x40 32 read-write n 0x0 0x0 PASR0 PA 0 1 read-write PxSR1 PA 1 1 read-write PxSR2 PA 2 1 read-write PxSR3 PA 3 1 read-write PxSR4 PA 4 1 read-write PxSR5 PA 5 1 read-write PxSR6 PA 6 1 read-write PxSR7 PA 7 1 read-write GPIOD GPIOA register list GPIO 0x0 0x0 0x4C registers n GPIOD GPIOD global interrupt 3 AFR Multiplex Function Register 0x48 32 read-write n 0x0 0x0 PxAFR0 PA AFR 0 4 read-write PxAFR1 PA AFR 4 4 read-write PxAFR2 PA AFR 8 4 read-write PxAFR3 PA AFR 12 4 read-write PxAFR4 PA AFR 16 4 read-write PxAFR5 PA AFR 20 4 read-write PxAFR6 PA AFR 24 4 read-write PxAFR7 PA AFR 28 4 read-write DBCLKCR Input Debounce clock Config register 0x38 32 read-write n 0x0 0x0 DBCLKEN DB 4 1 read-write DBCLK_DIV DB CLK 0 4 read-write DIRCR Input Output model Register 0x0 32 read-write n 0x0 0x0 PxDIR0 PA DIR0 0 1 read-write PxDIR1 PA DIR1 1 1 read-write PxDIR2 PA DIR2 2 1 read-write PxDIR3 PA DIR3 3 1 read-write PxDIR4 PA DIR4 4 1 read-write PxDIR5 PA DIR5 5 1 read-write PxDIR6 PA DIR6 6 1 read-write PxDIR7 PA DIR7 7 1 read-write DRVCR Driver Strength Config 0x44 32 read-write n 0x0 0x0 PxDRV0 PADRV 0 1 read-write PxDRV1 PADRV 1 1 read-write PxDRV2 PADRV 2 1 read-write PxDRV3 PADRV 3 1 read-write PxDRV4 PADRV 4 1 read-write PxDRV5 PADRV 5 1 read-write PxDRV6 PADRV 6 1 read-write PxDRV7 PADRV 7 1 read-write IDR Input Data Register 0xC 32 read-write n 0x0 0x0 PxID0 PA Input Value 0 1 read-write PxID1 PA Input Value 1 1 read-write PxID2 PA Input Value 2 1 read-write PxID3 PA Input Value 3 1 read-write PxID4 PA Input Value 4 1 read-write PxID5 PA Input Value 5 1 read-write PxID6 PA Input Value 6 1 read-write PxID7 PA Input Value 7 1 read-write INDBEN Input Debounce and synchronous Enable Register 0x34 32 read-write n 0x0 0x0 PxDIDB Reload value to use for 10ms timing 0 8 read-write SYNC_EN enable 8 1 read-write INTANY Edge Trigger Interrupt Register 0x28 32 read-write n 0x0 0x0 PxIANY0 PA IANY 0 1 read-write PxIANY1 PA IANY 1 1 read-write PxIANY2 PA IANY 2 1 read-write PxIANY3 PA IANY 3 1 read-write PxIANY4 PA IANY 4 1 read-write PxIANY5 PA IANY 5 1 read-write PxIANY6 PA IANY 6 1 read-write PxIANY7 PA IANY 7 1 read-write INTCLR Interrupt Clear Register 0x1C 32 read-write n 0x0 0x0 PxICLR0 PA ICLR0 0 1 write-only PxICLR1 PA ICLR 1 1 write-only PxICLR2 PA ICLR 2 1 write-only PxICLR3 PA ICLR 3 1 write-only PxICLR4 PA ICLR 4 1 write-only PxICLR5 PA ICLR 5 1 write-only PxICLR6 PA ICLR 6 1 write-only PxICLR7 PA ICLR 7 1 write-only INTEN Inerrupt Enable Register 0x10 32 read-write n 0x0 0x0 PxIEN0 PA Interrupt Enable 0 1 read-write PxIEN1 PA Interrupt Enable 1 1 read-write PxIEN2 PA Interrupt Enable 2 1 read-write PxIEN3 PA Interrupt Enable 3 1 read-write PxIEN4 PA Interrupt Enable 4 1 read-write PxIEN5 PA Interrupt Enable 5 1 read-write PxIEN6 PA Interrupt Enable 6 1 read-write PxIEN7 PA Interrupt Enable 7 1 read-write INTPOLCR Interrupt Sytle Value Register 0x24 32 read-write n 0x0 0x0 PxIVAL0 PA Interrupt Value 0 1 read-write PxIVAL1 PA Interrupt Value 1 1 read-write PxIVAL2 PA Interrupt Value 2 1 read-write PxIVAL3 PA Interrupt Value 3 1 read-write PxIVAL4 PA Interrupt Value 4 1 read-write PxIVAL5 PA Interrupt Value 5 1 read-write PxIVAL6 PA Interrupt Value 6 1 read-write PxIVAL7 PA Interrupt Value 7 1 read-write INTTYPCR Interrupt Style Register 0x20 32 read-write n 0x0 0x0 PxITYPE0 PA Interrupt type 0 1 read-write PxITYPE1 PA Interrupt type 1 1 read-write PxITYPE2 PA Interrupt type 2 1 read-write PxITYPE3 PA Interrupt type 3 1 read-write PxITYPE4 PA Interrupt type 4 1 read-write PxITYPE5 PA Interrupt type 5 1 read-write PxITYPE6 PA Interrupt type 6 1 read-write PxITYPE7 PA Interrupt type 7 1 read-write MSKINTSR Interrupt Status Register 0x18 32 read-write n 0x0 0x0 PxMIS0 PA MIS0 0 1 read-only PxMIS1 PA MIS1 1 1 read-only PxMIS2 PA MIS2 2 1 read-only PxMIS3 PA MIS 3 1 read-only PxMIS4 PA MIS 4 1 read-only PxMIS5 PA MIS 5 1 read-only PxMIS6 PA MIS 6 1 read-only PxMIS7 PA MIS 7 1 read-only ODCLR Output Clear Register 0x30 32 read-write n 0x0 0x0 PxODCLR0 PAODCLR 0 1 write-only PxODCLR1 PAODCLR 1 1 write-only PxODCLR2 PAODCLR 2 1 write-only PxODCLR3 PAODCLR 3 1 write-only PxODCLR4 PAODCLR 4 1 write-only PxODCLR5 PAODCLR 5 1 write-only PxODCLR6 PAODCLR 6 1 write-only PxODCLR7 PAODCLR 7 1 write-only ODR Output Data Register 0x8 32 read-write n 0x0 0x0 PxOD0 PA Output Value Config 0 1 read-write PxOD1 PA Output Value Config 1 1 read-write PxOD2 PA Output Value Config 2 1 read-write PxOD3 PA Output Value Config 3 1 read-write PxOD4 PA Output Value Config 4 1 read-write PxOD5 PA Output Value Config 5 1 read-write PxOD6 PA Output Value Config 6 1 read-write PxOD7 PA Output Value Config 7 1 read-write ODSET Output Setting Register 0x2C 32 read-write n 0x0 0x0 PxODSET0 PA Output Setting bit 0 1 write-only PxODSET1 PA Output Setting bit 1 1 write-only PxODSET2 PA Output Setting bit 2 1 write-only PxODSET3 PA Output Setting bit 3 1 write-only PxODSET4 PA Output Setting bit 4 1 write-only PxODSET5 PA Output Setting bit 5 1 write-only PxODSET6 PA Output Setting bit 6 1 write-only PxODSET7 PA Output Setting bit 7 1 write-only OTYPER Output Type register 0x4 32 read-write n 0x0 0x0 PxOTYP0 PA Output Type0 0 1 read-write PxOTYP1 PA Output Type1 1 1 read-write PxOTYP2 PA Output Type2 2 1 read-write PxOTYP3 PA Output Type3 3 1 read-write PxOTYP4 PA Output Type4 4 1 read-write PxOTYP5 PA Output Type5 5 1 read-write PxOTYP6 PA Output Type6 6 1 read-write PxOTYP7 PA Output Type7 7 1 read-write PUPDR PullUp and PullDown Register 0x3C 32 read-write n 0x0 0x0 PxPUPD0 PA PullUP PullDown 0 2 read-write PxPUPD1 PA PullUP PullDown 2 2 read-write PxPUPD2 PA PullUP PullDown 4 2 read-write PxPUPD3 PA PullUP PullDown 6 2 read-write PxPUPD4 PA PullUP PullDown 8 2 read-write PxPUPD5 PA PullUP PullDown 10 2 read-write PxPUPD6 PA PullUP PullDown 12 2 read-write PxPUPD7 PA PullUP PullDown 14 2 read-write RAWINTST Interrupt Raw Status register 0x14 32 read-write n 0x0 0x0 PxRIS0 PA RIS 0 1 read-only PxRIS1 PA RIS 1 1 read-only PxRIS2 PA RIS 2 1 read-only PxRIS3 PA RIS 3 1 read-only PxRIS4 PA RIS 4 1 read-only PxRIS5 PA RIS 5 1 read-only PxRIS6 PA RIS 6 1 read-only PxRIS7 PA RIS 7 1 read-only SLEWCR Voltage Convertion Speed Control 0x40 32 read-write n 0x0 0x0 PASR0 PA 0 1 read-write PxSR1 PA 1 1 read-write PxSR2 PA 2 1 read-write PxSR3 PA 3 1 read-write PxSR4 PA 4 1 read-write PxSR5 PA 5 1 read-write PxSR6 PA 6 1 read-write PxSR7 PA 7 1 read-write I2C I2C Register I2C 0x0 0x0 0x20 registers n I2C 12 ADDR I2C Address Register 0x8 32 read-write n 0x0 0x0 GC Current value 0 1 read-write I2CADR Current value 1 7 read-write BAUDCR Baud Control Register 0x14 32 read-write n 0x0 0x0 TM Reload value to use for 10ms timing 0 8 read-only CR I2C Config Register 0x0 32 read-write n 0x0 0x0 AA Generate Tick Interrupt 2 1 read-write ENS SysTick counted to zero 6 1 read-write H1M Enable SysTick Timer 0 1 read-write SI Source to count from 3 1 read-write STA SysTick counted to zero 5 1 read-write STO SysTick counted to zero 4 1 read-write DATA Data 0x4 32 read-write n 0x0 0x0 DAT Value to auto reload SysTick after reaching zero 0 8 read-write SR I2C Status register 0xC 32 read-write n 0x0 0x0 I2CSTA Reload value to use for 10ms timing 0 8 read-write TIMRUN I2C Baund Count Enable 0x10 32 read-write n 0x0 0x0 TME Reload value to use for 10ms timing 0 1 read-write IWDG Independ Watch Dog IWDG 0x0 0x0 0x1C registers n IWDG 23 CFGR IWDG Config Register 0x4 32 read-write n 0x0 0x0 IWDGINTMSK ADC Convect Auto Triger 1 1 1 read-write IWDGMODE ADC Convect Auto Triger 0 0 1 read-write IWDGRUNF ADC_Convect mode Select 2 1 read-only CMDCR IWDG Control Command Register 0x0 32 read-write n 0x0 0x0 CMD ADC Enable 0 8 read-write CNTVAL Count Value 0xC 32 read-write n 0x0 0x0 IWDGCNT ADC Channel 0 Result 0 20 read-only INTCLR IWDG Interrupt Status Register 0x14 32 read-write n 0x0 0x0 IWDGINTCLR ADC Channel 3 Result 0 1 write-only RLOAD Count ReLoad Register 0x8 32 read-write n 0x0 0x0 IWDGRLOAD ADC Continue Convect Channel 7-0 Enable 0 20 read-write SR IWDG Interrupt Status Register 0x10 32 read-write n 0x0 0x0 IWDGOVF ADC_Channel 1 Result 0 1 read-only UNLOCK IWDG register Writer Protect 0x18 32 read-write n 0x0 0x0 IWDGREN ADC Channel 3 Result 0 1 read-write LPTIM Low Power Timer LPTIM 0x0 0x0 0x18 registers n LPTIM 16 BGLOAD LPTIM Circle reload Register 0x14 32 read-write n 0x0 0x0 BGLOAD ADC Channel 3 Result 0 16 read-write CNTVAL Low Power Count Read_Only Register 0x0 32 read-write n 0x0 0x0 LPT_CNT ADC Enable 0 1 read-only CR LPTIM Control Register 0x4 32 read-write n 0x0 0x0 CT_SEL ADC_Convect mode Select 2 1 read-write GATE_EN ADC_High threshold Compare Control 6 1 read-write GATE_P ADC_Area Compare Control 7 1 read-write INT_EN ADC_Convect Result register Clear 8 1 read-write MODE ADC Convect Auto Triger 1 1 1 read-write TCK_EN ADC_Convect Result register Clear 9 1 read-write TCK_SEL ADC_Low threshold Compare Control 4 2 read-write TIM_RUN ADC Convect Auto Triger 0 0 1 read-write TOG_EN ADC_Convect Result Auto ADD 3 1 read-write WT_FLAG ADC_Convect Result register Clear 16 1 read-write INTCLR LPTIM Interrupt Clear Register 0x10 32 read-write n 0x0 0x0 ICLR ADC_Channel 1 Result 0 1 write-only INTSR LPTIM Interrupt Status 0xC 32 read-write n 0x0 0x0 INTF interrupt flag 0 1 read-only LOAD LPTIM Reload Register 0x8 32 read-write n 0x0 0x0 LOAD ADC Continue Convect Channel 7-0 Enable 0 16 read-write LPUART Low Power UART Register LPUART 0x0 0x0 0x20 registers n LPUART 8 BAUDCR UART0_ Baud Control Register 0x18 32 read-write n 0x0 0x0 BRG Reload value to use for 10ms timing 0 16 read-write SELF_BRG Clock Skew 16 1 read-write INTCLR UART0 Interruput flag Clear Register 0x14 32 read-write n 0x0 0x0 FECLR No Ref 2 1 write-only RICLR Reload value to use for 10ms timing 0 1 write-only TICLR Clock Skew 1 1 write-only INTSR UART0_Interrupt flag Status Register 0x10 32 read-write n 0x0 0x0 FE No Ref 2 1 read-only RI Reload value to use for 10ms timing 0 1 read-only TI Clock Skew 1 1 read-only SADDR UART0_Address Register 0x8 32 read-write n 0x0 0x0 SADDR Current value 0 8 read-write SADEN UART0_Address Mask Register 0xC 32 read-write n 0x0 0x0 SADEN Reload value to use for 10ms timing 0 8 read-write SBUF Data BUFF 0x0 32 read-write n 0x0 0x0 SBUF Value to auto reload SysTick after reaching zero 0 8 read-write SCON Low Power UART Control Register 0x4 32 read-write n 0x0 0x0 DBAUD SysTick counted to zero 9 1 read-write EN SysTick counted to zero 16 1 read-write LPMODE SysTick counted to zero 10 1 read-write PRSC SysTick counted to zero 13 3 read-write RB8 Source to count from 2 1 read-write REN SysTick counted to zero 4 1 read-write RIEN Enable SysTick Timer 0 1 read-write SCLKSEL SysTick counted to zero 11 2 read-write SM0_SM1 SysTick counted to zero 6 1 read-write SM2 SysTick counted to zero 5 1 read-write TB8 SysTick counted to zero 3 1 read-write TEEN SysTick counted to zero 8 1 read-write TIEN Generate Tick Interrupt 1 1 read-write LVD LVD LVD 0x0 0x0 0x8 registers n LVD 25 CR Control Register 0x0 32 read-write n 0x0 0x0 ACT No comment 6 1 read-write DIV_SEL No comment 0 2 read-write FALLINTEN No comment 12 1 read-write FLTCLK_SEL No comment 8 2 read-write FLTEN No comment 7 1 read-write FLT_NUM No comment 16 16 read-write HIGHINTEN No comment 14 1 read-write INT_EN No comment 15 1 read-write LVDEN No comment 5 1 read-write RISEINTEN No comment 13 1 read-write SR LVD Status 0x4 32 read-write n 0x0 0x0 INTF No comment 0 1 read-write OWIRE One Wire OWIRE 0x0 0x0 0x34 registers n OneWire 29 BITRATECNT 1-Wire Bit Rate Design Count 0x10 32 read-write n 0x0 0x0 BITRATECNT ADC_Channel 1 Result 0 12 read-write CMD 1_Wire Bus Operate Command Register 0x24 32 read-write n 0x0 0x0 CMD ADC_Channel 4 Result 0 2 read-write CR 1-Wire Model Control Register 0x0 32 read-write n 0x0 0x0 CLKDIV ADC Enable 0 2 read-write EN ADC Clock Select 5 1 read-write MSBFIRST ADC Channel Select 6 1 read-write RDMODE ADC Sample Circle Select 7 1 read-write SIZE ADC_ Start Control 4 1 read-write DATA 1_Wire Data Register 0x20 32 read-write n 0x0 0x0 DRVCNT ADC Channel 3 Result 0 8 read-write DRVCNT 1-Wire Main Read/Write Pull0 0x14 32 read-write n 0x0 0x0 DRVCNT ADC_Channel 2 Result 0 9 read-write INTCLR 1-Wire Interrupt Status Clean Register 0x30 32 read-write n 0x0 0x0 ACKERRCLR ADC_Convect Result Compare High Therashold 0 1 write-only INTDONCECLR ADC_Convect Result Compare High Therashold 1 1 write-only RXDONECLR ADC_Convect Result Compare High Therashold 3 1 write-only TXDONECLR ADC_Convect Result Compare High Therashold 2 1 write-only INTEN 1-Wire Interrupt Enable Register 0x28 32 read-write n 0x0 0x0 ACKERREN ADC_Channel 7 Result 0 1 read-write INITEN ADC_Channel 7 Result 1 1 read-write RXDONEEN ADC_Channel 7 Result 3 1 read-write TXDONEEN ADC_Channel 7 Result 2 1 read-write NFCR 1-Wire Input EndPoint Control 0x4 32 read-write n 0x0 0x0 NFDIV ADC Convect Auto Triger 0 0 2 read-write NFEN ADC Convect Auto Triger 1 4 1 read-write PRESCNT 1-Wire Device Presence Pulse Count Register 0xC 32 read-write n 0x0 0x0 PRESCNT ADC Channel 0 Result 0 13 read-write RDSMPCNT 1-Wire Main Read Sample Time Setting 0x18 32 read-write n 0x0 0x0 RDSMPCNT ADC_Channel 5 Result 0 9 read-write RECCNT 1-Wire Recover Time Count 0x1C 32 read-write n 0x0 0x0 RECCNT ADC_Channel 6 Result 0 11 read-write RSTCNT 1-Wire Master Reset Pulse Count register 0x8 32 read-write n 0x0 0x0 RSTCNT ADC Continue Convect Channel 7-0 Enable 0 16 read-write SR 1-Wire Status Register 0x2C 32 read-write n 0x0 0x0 ACKERR ADC_ Result 0 1 read-only INITDONE ADC_ Result 1 1 read-only RXDONE ADC_ Result 3 1 read-only TXDONE ADC_ Result 2 1 read-only PCA PCA PCA 0x0 0x0 0x74 registers n PCA 21 CCAP0 PCA Capture/Compare Model0 16 bits Register 0x60 32 read-write n 0x0 0x0 CCAP0 Reload value to use for 10ms timing 0 16 read-write CCAP0H PCA Capture/Compare Model0 High 8 bits Register 0x34 32 read-write n 0x0 0x0 CCAP0 ADC_Channel 7 Result 8 8 read-write CCAP0L PCA Capture/Compare Model0 Low 8 bits Register 0x30 32 read-write n 0x0 0x0 CCAP0 ADC_Channel 6 Result 0 8 read-write CCAP1 PCA Capture/Compare Model 1 16 bits Register 0x64 32 read-write n 0x0 0x0 CCAP1 Reload value to use for 10ms timing 0 16 read-write CCAP1H PCA Capture/Compare Model 1 High 8 bits Register 0x3C 32 read-write n 0x0 0x0 CCAP1 ADC_Convect Result Compare High Therashold 8 8 read-write CCAP1L PCA Capture/Compare Model 1 Low 8 bits Register 0x38 32 read-write n 0x0 0x0 CCAP1 ADC_ Result 0 8 read-write CCAP2 PCA Capture/Compare Model 2 16 bits Register 0x68 32 read-write n 0x0 0x0 CCAP2 Reload value to use for 10ms timing 0 16 read-write CCAP2H PCA Capture/Compare Model 2 High 8 bits Register 0x44 32 read-write n 0x0 0x0 CCAP2 ADC_Convect Result Compare Low Threshold 0 8 read-write CCAP2L PCA Capture/Compare Model 2 Low 8 bits Register 0x40 32 read-write n 0x0 0x0 CCAP2 ADC Convect Result Compare High threshold 0 8 read-only CCAP3 PCA Capture/Compare Model 3 16 bits Register 0x6C 32 read-write n 0x0 0x0 CCAP3 Reload value to use for 10ms timing 0 15 read-write CCAP3H PCA Capture/Compare Model 3 High 8 bits Register 0x4C 32 read-write n 0x0 0x0 CCAP3 Reload value to use for 10ms timing 8 8 read-write CCAP3L PCA Capture/Compare Model 3 Low 8 bits Register 0x48 32 read-write n 0x0 0x0 CCAP3 ADC Channel 7~0 Interrupt Mask Config 0 8 read-write CCAP4 PCA Capture/Compare Model 4 16 bits Register 0x70 32 read-write n 0x0 0x0 CCAP4 Reload value to use for 10ms timing 0 16 read-write CCAP4H PCA Capture/Compare Model 4 High 8 bits Register 0x54 32 read-write n 0x0 0x0 CCAP4 Reload value to use for 10ms timing 8 8 read-write CCAP4L PCA Capture/Compare Model 4 Low 8 bits Register 0x50 32 read-write n 0x0 0x0 CCAP4 Reload value to use for 10ms timing 0 8 read-write CCAPM0 PCA Captuer/Compare Model 0 Mode Register 0x10 32 read-write n 0x0 0x0 CAPN ADC_Channel 1 Result 4 1 read-write CAPP ADC_Channel 1 Result 5 1 read-write CCIE ADC_Channel 1 Result 0 1 read-write ECOM ADC_Channel 1 Result 6 1 read-write MAT ADC_Channel 1 Result 3 1 read-write PWM ADC_Channel 1 Result 1 1 read-write TOG ADC_Channel 1 Result 2 1 read-write CCAPM1 PCA Captuer/Compare Model 0 Mode Register 0x14 32 read-write n 0x0 0x0 CAPN ADC_Channel 1 Result 4 1 read-write CAPP ADC_Channel 1 Result 5 1 read-write CCIE ADC_Channel 1 Result 0 1 read-write ECOM ADC_Channel 1 Result 6 1 read-write MAT ADC_Channel 1 Result 3 1 read-write PWM ADC_Channel 1 Result 1 1 read-write TOG ADC_Channel 1 Result 2 1 read-write CCAPM2 PCA Captuer/Compare Model 0 Mode Register 0x18 32 read-write n 0x0 0x0 CAPN ADC_Channel 1 Result 4 1 read-write CAPP ADC_Channel 1 Result 5 1 read-write CCIE ADC_Channel 1 Result 0 1 read-write ECOM ADC_Channel 1 Result 6 1 read-write MAT ADC_Channel 1 Result 3 1 read-write PWM ADC_Channel 1 Result 1 1 read-write TOG ADC_Channel 1 Result 2 1 read-write CCAPM3 PCA Captuer/Compare Model 0 Mode Register 0x1C 32 read-write n 0x0 0x0 CAPN ADC_Channel 1 Result 4 1 read-write CAPP ADC_Channel 1 Result 5 1 read-write CCIE ADC_Channel 1 Result 0 1 read-write ECOM ADC_Channel 1 Result 6 1 read-write MAT ADC_Channel 1 Result 3 1 read-write PWM ADC_Channel 1 Result 1 1 read-write TOG ADC_Channel 1 Result 2 1 read-write CCAPM4 PCA Captuer/Compare Model 0 Mode Register 0x20 32 read-write n 0x0 0x0 CAPN ADC_Channel 1 Result 4 1 read-write CAPP ADC_Channel 1 Result 5 1 read-write CCIE ADC_Channel 1 Result 0 1 read-write ECOM ADC_Channel 1 Result 6 1 read-write MAT ADC_Channel 1 Result 3 1 read-write PWM ADC_Channel 1 Result 1 1 read-write TOG ADC_Channel 1 Result 2 1 read-write CCAPO PCA EndPoint Output Control Register 0x58 32 read-write n 0x0 0x0 CCAPO0 Reload value to use for 10ms timing 0 1 read-write CCAPO1 Reload value to use for 10ms timing 1 1 read-write CCAPO2 Reload value to use for 10ms timing 2 1 read-write CCAPO3 Reload value to use for 10ms timing 3 1 read-write CCAPO4 Reload value to use for 10ms timing 4 1 read-write CNT PCA Count Register 0x8 32 read-write n 0x0 0x0 CNT PCA counter value 0 8 read-write CR Control Register 0x0 32 read-write n 0x0 0x0 CCF0 ADC Enable 0 1 read-write CCF1 ADC_ Start Control 1 1 read-write CCF2 ADC Clock Select 2 1 read-write CCF3 ADC Channel Select 3 1 read-write CCF4 ADC Sample Circle Select 4 1 read-write CF ADC Continue Convert Status Control 7 1 read-write CR ADC Continue Convert Status Control 6 1 read-write INTCLR PCA Interrupt Clear Register 0xC 32 read-write n 0x0 0x0 CCF0 ADC Channel 0 Result 0 1 read-write CCF1 ADC Channel 0 Result 1 1 read-write CCF2 ADC Channel 0 Result 2 1 read-write CCF3 ADC Channel 0 Result 3 1 read-write CCF4 ADC Channel 0 Result 4 1 read-write CF ADC Channel 0 Result 7 1 read-write MOD Mode Register 0x4 32 read-write n 0x0 0x0 CFIE ADC Convect Auto Triger 0 0 1 read-write CIDL ADC_Convect mode Select 7 1 read-write CPS ADC Convect Auto Triger 1 1 3 read-write POCR PCA EndPoint Output Control Register 0x5C 32 read-write n 0x0 0x0 POE0 Reload value to use for 10ms timing 0 1 read-write POE1 Reload value to use for 10ms timing 1 1 read-write POE2 Reload value to use for 10ms timing 2 1 read-write POE3 Reload value to use for 10ms timing 3 1 read-write POE4 Reload value to use for 10ms timing 4 1 read-write POINV0 Reload value to use for 10ms timing 8 1 read-write POINV1 Reload value to use for 10ms timing 9 1 read-write POINV2 Reload value to use for 10ms timing 10 1 read-write POINV3 Reload value to use for 10ms timing 11 1 read-write POINV4 Reload value to use for 10ms timing 12 1 read-write RCC System RCC RCC 0x0 0x0 0x64 registers n HCLKDIV AHB CLK Prescale 0x0 32 read-write n 0x0 0x0 AHBCKDIV System HCLK Prescale 0 8 read-write HCLKEN AHB Peripheral Model Clk Enable 0x8 32 read-write n 0x0 0x0 CRCCKEN CRC CLK Enable 4 1 read-write FLASHCKEN Flash CLK Enable 8 1 read-write GPIOACKEN GPIOA CLK Enable 0 1 read-write GPIOBCKEN GPIOB CLK Enable 1 1 read-write GPIOCCKEN GPIOC CLK Enable 2 1 read-write GPIODCKEN GPIOD CLK Enable 3 1 read-write HIRCCR HIRC Control 0x28 32 read-write n 0x0 0x0 HIRCRDY HIRC RDY 12 1 read-only HIRCTRIM HIRCTRIM 0 12 read-write KEY KEY 16 16 write-only HXTCR HXT Control 0x2C 32 read-write n 0x0 0x0 HXTDRV DRV 0 3 read-write HXTRDY HXT Ready 6 1 read-write HXTSTARTUP TIME 4 2 read-write IRQLATENCY M0 IRQ Delay 0x38 32 read-write n 0x0 0x0 IRQLATENCY IRQ 0 8 read-write LIRCCR LIRC Control 0x30 32 read-write n 0x0 0x0 KEY KEY 16 16 write-only LIRCRDY FLG 12 1 read-only LIRCSTARTUP TIME 10 2 read-write LIRCTRIM TRIM 0 9 read-write LXTCR LXT Control 0x34 32 read-write n 0x0 0x0 KEY KEY 16 16 write-only LXTAON ON 10 1 read-write LXTBYP BYP 9 1 read-write LXTDRV DRV 0 4 read-write LXTEN EN 8 1 read-write LXTPORT PORT 11 1 read-write LXTRDY RDY 6 1 read-write LXTSTARTUP TIMER 4 2 read-write MCOCR Clock Output Control Register 0x10 32 read-write n 0x0 0x0 MCODIV FCLK Prescale 0 8 read-write MCOEN MCO Enable 12 1 read-write 0 Disable 0 1 Enable 1 MCOSEL Clock Output Source Select 8 3 read-write PCLKDIV APB CLK Prescale 0x4 32 read-write n 0x0 0x0 APBCKDIV System PCLK Prescale 0 8 read-write PCLKEN APB Peripheral Model CLK Enable 0xC 32 read-write n 0x0 0x0 ADCCKEN ADC Clk Enable 13 1 read-write 0 Disable 0 1 Enable 1 AWKCKEN ADC Clk Enable 14 1 read-write 0 Disable 0 1 Enable 1 BASETIMCKEN BASE timer clk enable 6 1 read-write 0 Disable 0 1 Enable 1 BEEPCKEN BEEP CLK Enable 19 1 read-write 0 Disable 0 1 Enable 1 CLKCTRIMCKEN CLKTRIM CLK Enable 16 1 read-write 0 Disable 0 1 Enable 1 DBGCKEN DBG CLK Enable 20 1 read-write 0 Disable 0 1 Enable 1 I2CCKEN I2C CK Enable 2 1 read-write 0 Disable 0 1 Enable 1 IWDGCKEN IWDG CLK Enable 17 1 read-write 0 Disable 0 1 Enable 1 LPTIMCKEN LPTIMCKEN 5 1 read-write 0 Disable 0 1 Enable 1 LPUARTCKEN LPUART CLK Enable 3 1 read-write 0 Disable 0 1 Enable 1 LVDVCCKEN LVD VC CLK Enable 18 1 read-write 0 Disable 0 1 Enable 1 OWIRECKEN 1-WIRE Clk Enable 9 1 read-write 0 Disable 0 1 Enable 1 PCACKEN PCA Clk Enable 8 1 read-write 0 Disable 0 1 Enable 1 RTCCKEN RTC Clk Enable 15 1 read-write 0 Disable 0 1 Enable 1 SPICKEN SPI CLK Enable 4 1 read-write 0 Disable 0 1 Enable 1 SYSCONCKEN System Control CLK Enable 7 1 read-write 0 Disable 0 1 Enable 1 TIM1CKEN TIM1 Clk Enable 10 1 read-write 0 Disable 0 1 Enable 1 TIM2CKEN TIM2 Clk Enable 11 1 read-write 0 Disable 0 1 Enable 1 UART0CKEN UART0 CLK Enable 0 1 read-write 0 Disable 0 1 Enable 1 UART1CKEN UART1 CLK Enable 1 1 read-write 0 Disable 0 1 Enable 1 WWDGCKEN WWDG Clk Enable 12 1 read-write 0 Disable 0 1 Enable 1 PERIRST Peripheral Model Control 0x44 32 read-write n 0x0 0x0 ADCRST RST 13 1 read-write AWKRST RST 14 1 read-write BASETIMRST RST 6 1 read-write BEEPRST RST 19 1 read-write CLKTRIMRST RST 16 1 read-write CRCRST RST 28 1 read-write DBGRST RST 20 1 read-write GPIOARST RST 24 1 read-write GPIOBRST RST 25 1 read-write GPIOCRST RST 26 1 read-write GPIODRST RST 27 1 read-write I2CRST RST 2 1 read-write LPTIMRST RST 5 1 read-write LPUARTRST RST 3 1 read-write LVDVCRST RST 18 1 read-write OWIRERST RST 9 1 read-write PCARST RST 8 1 read-write SPIRST RST 4 1 read-write SYSCONRST RST 7 1 read-write TIM1RST RST 10 1 read-write TIM2RST RST 11 1 read-write UART0RST RST 0 1 read-write UART1RST RST 1 1 read-write WWDGRST RST 12 1 read-write RSTCR System Reset Control 0x18 32 read-write n 0x0 0x0 CPURST CUP Reset 1 1 read-write 0 Normal 0 1 Reset CPU 1 MCURST RESET 0 1 read-write 0 Normal 0 1 Reset MCU 1 RSTKEY KEY 2 30 read-write RSTSR Reset Status 0x1C 32 read-write n 0x0 0x0 CPURST CPU reset 1 1 read-write 0 No CPU Reset Happen 0 1 CPU Reset Happen 1 IWDGRST IWDG RST FLAG 3 1 read-write 0 No IWDG RST HAPPEN 0 1 WWDG RST HAPPEN 1 LOCKUPRST LOCKUP RST FLAG 6 1 read-write 0 NO LOCKUP RST 0 1 LOCKUP RST 1 LVDRST LVD RST FLAG 4 1 read-write 0 NO LVD RST 0 1 LVD RST 1 MCURST MCU Reset Flag 0 1 read-write PADRST PAD RST FLAG 7 1 read-write 0 NO PAD RST 0 1 PAD RST 1 PORRST POR RST FLAG 5 1 read-write 0 NO VCore POR RST 0 1 VCore POR RST 1 SFTRST Software RST FLAG 8 1 read-write 0 NO SFT RST 0 1 SFT RST 1 WWDGRST WWDG RST FLAG 2 1 read-write 0 No WWDG RST 0 1 WWDG RST 1 RTCRST RTC Control 0x48 32 read-write n 0x0 0x0 KEY KEY 16 16 write-only RTCRST RTC RST 0 1 read-write STICKCR SysTick Timer Circle Adjust 0x3C 32 read-write n 0x0 0x0 NOREF No Ref 25 1 read-write SKEW Clock Skew 24 1 read-write STCALIB Systick 0 24 read-write SWDIOCR Endpoint Function Select 0x40 32 read-write n 0x0 0x0 KEY KEY 16 16 write-only SWDPORT PORT 0 1 read-write SYSCLKCR CLK Setting 0x20 32 read-write n 0x0 0x0 CLKFAILEN CLK FAIL Enable 8 1 read-write HIRCEN HIRC Enable 0 1 read-write HXTBYP HXT Bypass 5 1 read-write HXTEN HXT Enable 1 1 read-write HXTPORT HXT Port Function Config 6 1 read-write KEY KEY 16 16 write-only LIRCEN LIRC Enable 2 1 read-write WKBYHIRC XX 15 1 read-write SYSCLKSEL System Clock Select 0x24 32 read-write n 0x0 0x0 CLKSW System Clock Source Select 0 4 read-write KEY KEY 16 16 write-only UNLOCK Register Protect 0x60 32 read-write n 0x0 0x0 KEY KEY 1 31 write-only UNLOCK UNLOCK 0 1 read-write RTC RTC RTC 0x0 0x0 0x2C registers n RTC 30 ALM1DATE ALM 0x14 32 read-write n 0x0 0x0 ALCEN ADC_Channel 2 Result 15 1 read-write ALDAY ADC_Channel 2 Result 0 6 read-write ALMDAYEN ADC_Channel 2 Result 28 1 read-write ALMHOUREN ADC_Channel 2 Result 26 1 read-write ALMMINEN ADC_Channel 2 Result 25 1 read-write ALMMONEN ADC_Channel 2 Result 29 1 read-write ALMONTH ADC_Channel 2 Result 8 5 read-write ALMSECEN ADC_Channel 2 Result 24 1 read-write ALMWEEKEN ADC_Channel 2 Result 27 1 read-write ALMYEAREN ADC_Channel 2 Result 30 1 read-write ALYEAR ADC_Channel 2 Result 16 8 read-write ALM1TIME ALM 0x10 32 read-write n 0x0 0x0 ALH20_PA ADC_Channel 1 Result 21 1 read-write ALHOUR19 ADC_Channel 1 Result 16 5 read-write ALMIN ADC_Channel 1 Result 8 7 read-write ALSEC ADC_Channel 1 Result 0 7 read-write ALWEEK ADC_Channel 1 Result 24 3 read-write ALM2PRD ALM PR 0x18 32 read-write n 0x0 0x0 ALM2PR_CNT ADC_Channel 5 Result 0 4 read-write CLKCR CLKCR 0x4 32 read-write n 0x0 0x0 HXTDIV ADC Convect Auto Triger 0 0 10 read-write RTCCKEN ADC_Convect mode Select 20 1 read-write RTCCKSEL ADC Convect Auto Triger 1 16 2 read-write CLKTRIM CAL 0x1C 32 read-write n 0x0 0x0 MODE_1_0 ADC_Channel 6 Result 8 1 read-write TRIM ADC_Channel 6 Result 0 8 read-write CR CR 0x0 32 read-write n 0x0 0x0 ALM1EN ADC Sample Circle Select 6 1 read-write ALM1_INTEN ADC Channel Select 4 1 read-write ALM2_INTEN ADC Channel Select 5 1 read-write BYPSHAD ADC Enable 0 1 read-write FMT ADC Clock Select 2 1 read-write RTC1HZOE ADC_ Start Control 1 1 read-write START ADC Continue Convert Status Control 8 1 read-write DATE DATE 0xC 32 read-write n 0x0 0x0 CEN ADC Channel 0 Result 15 1 read-write DAY ADC Channel 0 Result 0 6 read-write MONTH ADC Channel 0 Result 8 5 read-write YEAR ADC Channel 0 Result 16 8 read-write INTCLR Status Clean 0x24 32 read-write n 0x0 0x0 ALM1_CLR ADC_Channel 4 Result 4 1 write-only ALM2_CLR ADC_Channel 4 Result 5 1 write-only ISR Init 0x20 32 read-write n 0x0 0x0 ALM1_F ADC Channel 3 Result 4 1 read-write ALM2_F ADC Channel 3 Result 5 1 read-write RSF ADC Channel 3 Result 2 1 read-write WAIT ADC Channel 3 Result 0 1 read-write WAITF ADC Channel 3 Result 1 1 read-write TIME TIME 0x8 32 read-write n 0x0 0x0 H20_PA ADC Convect Rounte Mode Select 21 1 read-write HOUR19 ADC Convect Rounte Mode Select 16 5 read-write MIN ADC Continue Convect Times Config 8 7 read-write SEC ADC Continue Convect Channel 7-0 Enable 0 6 read-write WEEK ADC Convect Rounte Mode Select 24 3 read-write WPR RTC 0x28 32 read-write n 0x0 0x0 WPR ADC_Channel 7 Result 0 8 write-only SPI SPI Register SPI 0x0 0x0 0x20 registers n SPI 10 CR SPI Config Register 0x0 32 read-write n 0x0 0x0 CPHA Generate Tick Interrupt 2 1 read-write CPOL Source to count from 3 1 read-write MSTR SysTick counted to zero 4 1 read-write SPEN SysTick counted to zero 6 1 read-write SPR0 Enable SysTick Timer 0 1 read-write SPR1 Generate Tick Interrupt 1 1 read-write SPR2 SysTick counted to zero 7 1 read-write DATA I2C Data register 0xC 32 read-write n 0x0 0x0 SPDATA Reload value to use for 10ms timing 0 8 read-write SR SPI Status Register 0x8 32 read-write n 0x0 0x0 MDF Current value 4 1 read-only SPIF Current value 7 1 read-only SSERR Current value 5 1 read-only WCOL Current value 6 1 read-only SSN SPI CHIP SELECT CONFIG 0x4 32 read-write n 0x0 0x0 SSN Value to auto reload SysTick after reaching zero 0 1 read-write SYSCON system control config SYSCON 0x0 0x0 0x54 registers n CFGR0 System Control setting regist 0 0x0 32 read-write n 0x0 0x0 DBGDLSP_DIS Allow Debug Enter DeepSleep Mode 1 1 read-write KEY KEY 16 16 read-write LOCKUPEN LOCKUP 0 1 read-write PCACR PCA Capture channel source select 0xC 32 read-write n 0x0 0x0 PCA_CAP0_SEL PAC Channel 0 2 read-write PCA_CAP1_SEL PAC 2 2 read-write PCA_CAP2_SEL PCA_CHANNEL 4 2 read-write PCA_CAP3_SEL PCA_CHANNEL 6 2 read-write PCA_CAP4_SEL PCA_CHANNEL 8 2 read-write PORTCR PORT control register 0x8 32 read-write n 0x0 0x0 LPTIM_GATE_SEL LPTIM GATE 8 2 read-write SPINCS_SEL SLAVE 0 4 read-write TIM10_GATE_SEL TIMER10 GATE 4 2 read-write TIM11_GATE_SEL TIMER11 GATE 6 2 read-write PORTINTCR PORT INTERRUPT MODE SETTING 0x4 32 read-write n 0x0 0x0 KEY KEY 16 16 write-only PADDLSPCON PADDLSP 1 1 read-write PADINTSEL Endpoint Interrupt Mode Select 0 1 read-write TIM1CR TIM1 Channel Source Select 0x10 32 read-write n 0x0 0x0 CLKFAILBRKEN Channel 22 1 read-write DSLPBRKEN Channel 21 1 read-write TIM1BRKOUTCFG Channel 20 1 read-write TIM1CH1IN_SEL Source 0 3 read-write TIM1CH2IN_SEL Source 4 3 read-write TIM1CH3IN_SEL Channel 8 3 read-write TIM1CH4IN_SEL Channel 12 3 read-write TIM1ETR_SEL Channel 16 4 read-write TIM2CR TIM2 Channel Source Select 0x14 32 read-write n 0x0 0x0 TIM2CH1IN_SEL Source 0 3 read-write TIM2CH2IN_SEL Channel 4 3 read-write TIM2CH3IN_SEL SOURCE 8 3 read-write TIM2CH4IN_SEL SOURCE 12 3 read-write TIM2ETR_SEL SOURCE 16 4 read-write UNLOCK Syscon Register Write Enable 0x50 32 read-write n 0x0 0x0 KEY KEY 1 31 write-only UNLOCK read_write 0 1 read-only TIM1 Advance Timer 1 ADVTIM 0x0 0x0 0x48 registers n TIM1 18 ARR TIM1 Auto Load Register 0x2C 32 read-write n 0x0 0x0 ARR ADC_ Result 0 16 read-write BDTR TIM1 Brush and DEAD Register 0x44 32 read-write n 0x0 0x0 AOE CON 14 1 read-write BKE CON 12 1 read-write BKP CON 13 1 read-write DTG Reload value to use for 10ms timing 0 8 read-write LOCK LLT 8 2 read-write MOE CON 15 1 read-write OSSI HHT 10 1 read-write OSSR REG 11 1 read-write CCER TIM1 Captuer/Compare Enable Register 0x20 32 read-write n 0x0 0x0 CC1E ADC_Channel 5 Result 0 1 read-write CC1NE ADC_Channel 5 Result 2 1 read-write CC1NP ADC_Channel 5 Result 3 1 read-write CC1P ADC_Channel 5 Result 1 1 read-write CC2E ADC_Channel 5 Result 4 1 read-write CC2NE ADC_Channel 5 Result 6 1 read-write CC2NP ADC_Channel 5 Result 7 1 read-write CC2P ADC_Channel 5 Result 5 1 read-write CC3E ADC_Channel 5 Result 8 1 read-write CC3NE ADC_Channel 5 Result 10 1 read-write CC3NP ADC_Channel 5 Result 11 1 read-write CC3P ADC_Channel 5 Result 9 1 read-write CC4E ADC_Channel 5 Result 12 1 read-write CC4P ADC_Channel 5 Result 13 1 read-write CCMR1 TIM1 Capture/Compare Mode Register 1 0x18 32 read-write n 0x0 0x0 CC1S ADC Channel 3 Result 0 2 read-write CC2S ADC Channel 3 Result 8 2 read-write OC1CE ADC Channel 3 Result 7 1 read-write OC1FE ADC Channel 3 Result 2 1 read-write OC1M ADC Channel 3 Result 4 3 read-write OC1PE ADC Channel 3 Result 3 1 read-write OC2CE ADC Channel 3 Result 15 1 read-write OC2FE ADC Channel 3 Result 10 1 read-write OC2M ADC Channel 3 Result 12 3 read-write OC2PE ADC Channel 3 Result 11 1 read-write CCMR2 TIM1 Capture/Compare Mode Register 2 0x1C 32 read-write n 0x0 0x0 CC3S ADC_Channel 4 Result 0 2 read-only CC4S ADC_Channel 4 Result 8 2 read-only OC3CE ADC_Channel 4 Result 7 1 read-only OC3FE ADC_Channel 4 Result 2 1 read-only OC3M ADC_Channel 4 Result 4 3 read-only OC3PE ADC_Channel 4 Result 3 1 read-only OC4CE ADC_Channel 4 Result 15 1 read-only OC4FE ADC_Channel 4 Result 10 1 read-only OC4M ADC_Channel 4 Result 12 3 read-only OC4PE ADC_Channel 4 Result 11 1 read-only CCR1 Captuer/Compare Register1 0x34 32 read-write n 0x0 0x0 CCR1 ADC Convect Result Compare High threshold 0 16 read-write CCR2 Capture/Compare Register2 0x38 32 read-write n 0x0 0x0 CCR2 ADC_Convect Result Compare Low Threshold 0 16 read-only CCR3 Capture/Compare Register3 0x3C 32 read-write n 0x0 0x0 CCR3 ADC Channel 7~0 Interrupt Mask Config 0 16 read-write CCR4 TIM1 Capture/Compare Register4 0x40 32 read-write n 0x0 0x0 CCR4 Reload value to use for 10ms timing 0 16 read-write CNT TIM1 Count 0x24 32 read-write n 0x0 0x0 CNT ADC_Channel 6 Result 0 16 read-only CR1 TIM1 Control Register1 0x0 32 read-write n 0x0 0x0 ARPE Auto 7 1 read-write CEN Enable 0 1 read-write CKD Auto 8 2 read-write CMS Center 5 2 read-write DIR Direction 4 1 read-write OPM One Pulse Mode 3 1 read-write UDIS Update Disable 1 1 read-write URS Update Request Source 2 1 read-write CR2 TIM1 Control Register 2 0x4 32 read-write n 0x0 0x0 CCPC ADC Convect Auto Triger 0 0 1 read-write CCUS ADC Convect Auto Triger 1 2 1 read-write MMS ADC_Convect mode Select 4 3 read-write OIS1 ADC_Low threshold Compare Control 8 1 read-write OIS1N ADC_High threshold Compare Control 9 1 read-write OIS2 ADC_Area Compare Control 10 1 read-write OIS2N ADC_Convect Result register Clear 11 1 read-write OIS3 ADC_Convect Result register Clear 12 1 read-write OIS3N ADC_Convect Result register Clear 13 1 read-write OIS4 ADC_Convect Result register Clear 14 1 read-write TI1S ADC_Convect Result Auto ADD 7 1 read-write DIER TIM1 Interrupt Enable Register 0xC 32 read-write n 0x0 0x0 BIE ADC Channel 0 Result 7 1 read-write CC1IE ADC Channel 0 Result 1 1 read-write CC2IE ADC Channel 0 Result 2 1 read-write CC3IE ADC Channel 0 Result 3 1 read-write CC4IE ADC Channel 0 Result 4 1 read-write COMIE ADC Channel 0 Result 5 1 read-write TIE ADC Channel 0 Result 6 1 read-write UIE ADC Channel 0 Result 0 1 read-write EGR TIM1 Event Trig Register 0x14 32 read-write n 0x0 0x0 BG ADC_Channel 2 Result 7 1 write-only CC1G ADC_Channel 2 Result 1 1 write-only CC2G ADC_Channel 2 Result 2 1 write-only CC3G ADC_Channel 2 Result 3 1 write-only CC4G ADC_Channel 2 Result 4 1 write-only COMG ADC_Channel 2 Result 5 1 write-only TG ADC_Channel 2 Result 6 1 write-only UG ADC_Channel 2 Result 0 1 write-only PSC TIM1 Prescale Register 0x28 32 read-write n 0x0 0x0 PSC ADC_Channel 7 Result 0 16 read-write RCR TIM1 Repeate Count Register 0x30 32 read-write n 0x0 0x0 REP ADC_Convect Result Compare High Therashold 0 8 read-write SMCR TIM1 Slave mode Control Register 0x8 32 read-write n 0x0 0x0 ECE ADC Convect Rounte Mode Select 14 1 read-write ETF ADC Convect Rounte Mode Select 8 4 read-write ETP ADC Convect Rounte Mode Select 15 1 read-write ETPS ADC Convect Rounte Mode Select 12 2 read-write MSM ADC Convect Rounte Mode Select 7 1 read-write SMS ADC Continue Convect Channel 7-0 Enable 0 3 read-write TS ADC Continue Convect Times Config 4 3 read-write SR TIM1 Status Register 0x10 32 read-write n 0x0 0x0 BIF ADC_Channel 1 Result 7 1 read-write CC1IF ADC_Channel 1 Result 1 1 read-write CC1OF ADC_Channel 1 Result 9 1 read-write CC2IF ADC_Channel 1 Result 2 1 read-write CC2OF ADC_Channel 1 Result 10 1 read-write CC3IF ADC_Channel 1 Result 3 1 read-write CC3OF ADC_Channel 1 Result 11 1 read-write CC4IF ADC_Channel 1 Result 4 1 read-write CC4OF ADC_Channel 1 Result 12 1 read-write COMIF ADC_Channel 1 Result 5 1 read-write TIF ADC_Channel 1 Result 6 1 read-write UIF ADC_Channel 1 Result 0 1 read-write TIM10 BASE_TIMER 0 BASETIM 0x0 0x0 0x1C registers n TIM10 14 BGLOAD 32Bits Circles Reload Register 0x18 32 read-write n 0x0 0x0 BGLOAD ADC Channel 3 Result 0 32 read-write CNT Read Count Register，Only Read 0x8 32 read-write n 0x0 0x0 CNT ADC Continue Convect Channel 7-0 Enable 0 32 read-only CR TIM10 Control Register 0x0 32 read-write n 0x0 0x0 CT_SEL ADC Continue Convert Status Control 8 1 read-write GATE_EN ADC Continue Convert Status Control 10 1 read-write GATE_P ADC Continue Convert Status Control 11 1 read-write INTEN ADC Channel Select 5 1 read-write MODE ADC Sample Circle Select 6 1 read-write ONESHOT ADC_ Start Control 3 1 read-write TMR_PRSC ADC Enable 0 3 read-write TMR_SIZE ADC Clock Select 4 1 read-write TOG_EN ADC Continue Convert Status Control 9 1 read-write TR ADC Continue Convert Status Control 7 1 read-write INTCLR Interrupt Clear Register 0x14 32 read-write n 0x0 0x0 INTCLR ADC_Channel 2 Result 0 1 write-only LOAD 32bits Auto Load Register 0x4 32 read-write n 0x0 0x0 LOAD ADC Convect Auto Triger 0 0 32 read-write MSKINTSR Read Interrupt Register 0x10 32 read-write n 0x0 0x0 TF ADC_Channel 1 Result 0 1 read-only RAWINTSR READ Orignal Interrupt Register 0xC 32 read-write n 0x0 0x0 RIS ADC Channel 0 Result 0 1 read-only TIM11 BASE_TIMER 0 BASETIM 0x0 0x0 0x1C registers n TIM11 TIM11 global interrupt 15 BGLOAD 32Bits Circles Reload Register 0x18 32 read-write n 0x0 0x0 BGLOAD ADC Channel 3 Result 0 32 read-write CNT Read Count Register，Only Read 0x8 32 read-write n 0x0 0x0 CNT ADC Continue Convect Channel 7-0 Enable 0 32 read-only CR TIM10 Control Register 0x0 32 read-write n 0x0 0x0 CT_SEL ADC Continue Convert Status Control 8 1 read-write GATE_EN ADC Continue Convert Status Control 10 1 read-write GATE_P ADC Continue Convert Status Control 11 1 read-write INTEN ADC Channel Select 5 1 read-write MODE ADC Sample Circle Select 6 1 read-write ONESHOT ADC_ Start Control 3 1 read-write TMR_PRSC ADC Enable 0 3 read-write TMR_SIZE ADC Clock Select 4 1 read-write TOG_EN ADC Continue Convert Status Control 9 1 read-write TR ADC Continue Convert Status Control 7 1 read-write INTCLR Interrupt Clear Register 0x14 32 read-write n 0x0 0x0 INTCLR ADC_Channel 2 Result 0 1 write-only LOAD 32bits Auto Load Register 0x4 32 read-write n 0x0 0x0 LOAD ADC Convect Auto Triger 0 0 32 read-write MSKINTSR Read Interrupt Register 0x10 32 read-write n 0x0 0x0 TF ADC_Channel 1 Result 0 1 read-only RAWINTSR READ Orignal Interrupt Register 0xC 32 read-write n 0x0 0x0 RIS ADC Channel 0 Result 0 1 read-only TIM2 Advance Timer 1 ADVTIM 0x0 0x0 0x48 registers n TIM2 TIM2 global interrupt 19 ARR TIM1 Auto Load Register 0x2C 32 read-write n 0x0 0x0 ARR ADC_ Result 0 16 read-write BDTR TIM1 Brush and DEAD Register 0x44 32 read-write n 0x0 0x0 AOE CON 14 1 read-write BKE CON 12 1 read-write BKP CON 13 1 read-write DTG Reload value to use for 10ms timing 0 8 read-write LOCK LLT 8 2 read-write MOE CON 15 1 read-write OSSI HHT 10 1 read-write OSSR REG 11 1 read-write CCER TIM1 Captuer/Compare Enable Register 0x20 32 read-write n 0x0 0x0 CC1E ADC_Channel 5 Result 0 1 read-write CC1NE ADC_Channel 5 Result 2 1 read-write CC1NP ADC_Channel 5 Result 3 1 read-write CC1P ADC_Channel 5 Result 1 1 read-write CC2E ADC_Channel 5 Result 4 1 read-write CC2NE ADC_Channel 5 Result 6 1 read-write CC2NP ADC_Channel 5 Result 7 1 read-write CC2P ADC_Channel 5 Result 5 1 read-write CC3E ADC_Channel 5 Result 8 1 read-write CC3NE ADC_Channel 5 Result 10 1 read-write CC3NP ADC_Channel 5 Result 11 1 read-write CC3P ADC_Channel 5 Result 9 1 read-write CC4E ADC_Channel 5 Result 12 1 read-write CC4P ADC_Channel 5 Result 13 1 read-write CCMR1 TIM1 Capture/Compare Mode Register 1 0x18 32 read-write n 0x0 0x0 CC1S ADC Channel 3 Result 0 2 read-write CC2S ADC Channel 3 Result 8 2 read-write OC1CE ADC Channel 3 Result 7 1 read-write OC1FE ADC Channel 3 Result 2 1 read-write OC1M ADC Channel 3 Result 4 3 read-write OC1PE ADC Channel 3 Result 3 1 read-write OC2CE ADC Channel 3 Result 15 1 read-write OC2FE ADC Channel 3 Result 10 1 read-write OC2M ADC Channel 3 Result 12 3 read-write OC2PE ADC Channel 3 Result 11 1 read-write CCMR2 TIM1 Capture/Compare Mode Register 2 0x1C 32 read-write n 0x0 0x0 CC3S ADC_Channel 4 Result 0 2 read-only CC4S ADC_Channel 4 Result 8 2 read-only OC3CE ADC_Channel 4 Result 7 1 read-only OC3FE ADC_Channel 4 Result 2 1 read-only OC3M ADC_Channel 4 Result 4 3 read-only OC3PE ADC_Channel 4 Result 3 1 read-only OC4CE ADC_Channel 4 Result 15 1 read-only OC4FE ADC_Channel 4 Result 10 1 read-only OC4M ADC_Channel 4 Result 12 3 read-only OC4PE ADC_Channel 4 Result 11 1 read-only CCR1 Captuer/Compare Register1 0x34 32 read-write n 0x0 0x0 CCR1 ADC Convect Result Compare High threshold 0 16 read-write CCR2 Capture/Compare Register2 0x38 32 read-write n 0x0 0x0 CCR2 ADC_Convect Result Compare Low Threshold 0 16 read-only CCR3 Capture/Compare Register3 0x3C 32 read-write n 0x0 0x0 CCR3 ADC Channel 7~0 Interrupt Mask Config 0 16 read-write CCR4 TIM1 Capture/Compare Register4 0x40 32 read-write n 0x0 0x0 CCR4 Reload value to use for 10ms timing 0 16 read-write CNT TIM1 Count 0x24 32 read-write n 0x0 0x0 CNT ADC_Channel 6 Result 0 16 read-only CR1 TIM1 Control Register1 0x0 32 read-write n 0x0 0x0 ARPE Auto 7 1 read-write CEN Enable 0 1 read-write CKD Auto 8 2 read-write CMS Center 5 2 read-write DIR Direction 4 1 read-write OPM One Pulse Mode 3 1 read-write UDIS Update Disable 1 1 read-write URS Update Request Source 2 1 read-write CR2 TIM1 Control Register 2 0x4 32 read-write n 0x0 0x0 CCPC ADC Convect Auto Triger 0 0 1 read-write CCUS ADC Convect Auto Triger 1 2 1 read-write MMS ADC_Convect mode Select 4 3 read-write OIS1 ADC_Low threshold Compare Control 8 1 read-write OIS1N ADC_High threshold Compare Control 9 1 read-write OIS2 ADC_Area Compare Control 10 1 read-write OIS2N ADC_Convect Result register Clear 11 1 read-write OIS3 ADC_Convect Result register Clear 12 1 read-write OIS3N ADC_Convect Result register Clear 13 1 read-write OIS4 ADC_Convect Result register Clear 14 1 read-write TI1S ADC_Convect Result Auto ADD 7 1 read-write DIER TIM1 Interrupt Enable Register 0xC 32 read-write n 0x0 0x0 BIE ADC Channel 0 Result 7 1 read-write CC1IE ADC Channel 0 Result 1 1 read-write CC2IE ADC Channel 0 Result 2 1 read-write CC3IE ADC Channel 0 Result 3 1 read-write CC4IE ADC Channel 0 Result 4 1 read-write COMIE ADC Channel 0 Result 5 1 read-write TIE ADC Channel 0 Result 6 1 read-write UIE ADC Channel 0 Result 0 1 read-write EGR TIM1 Event Trig Register 0x14 32 read-write n 0x0 0x0 BG ADC_Channel 2 Result 7 1 write-only CC1G ADC_Channel 2 Result 1 1 write-only CC2G ADC_Channel 2 Result 2 1 write-only CC3G ADC_Channel 2 Result 3 1 write-only CC4G ADC_Channel 2 Result 4 1 write-only COMG ADC_Channel 2 Result 5 1 write-only TG ADC_Channel 2 Result 6 1 write-only UG ADC_Channel 2 Result 0 1 write-only PSC TIM1 Prescale Register 0x28 32 read-write n 0x0 0x0 PSC ADC_Channel 7 Result 0 16 read-write RCR TIM1 Repeate Count Register 0x30 32 read-write n 0x0 0x0 REP ADC_Convect Result Compare High Therashold 0 8 read-write SMCR TIM1 Slave mode Control Register 0x8 32 read-write n 0x0 0x0 ECE ADC Convect Rounte Mode Select 14 1 read-write ETF ADC Convect Rounte Mode Select 8 4 read-write ETP ADC Convect Rounte Mode Select 15 1 read-write ETPS ADC Convect Rounte Mode Select 12 2 read-write MSM ADC Convect Rounte Mode Select 7 1 read-write SMS ADC Continue Convect Channel 7-0 Enable 0 3 read-write TS ADC Continue Convect Times Config 4 3 read-write SR TIM1 Status Register 0x10 32 read-write n 0x0 0x0 BIF ADC_Channel 1 Result 7 1 read-write CC1IF ADC_Channel 1 Result 1 1 read-write CC1OF ADC_Channel 1 Result 9 1 read-write CC2IF ADC_Channel 1 Result 2 1 read-write CC2OF ADC_Channel 1 Result 10 1 read-write CC3IF ADC_Channel 1 Result 3 1 read-write CC3OF ADC_Channel 1 Result 11 1 read-write CC4IF ADC_Channel 1 Result 4 1 read-write CC4OF ADC_Channel 1 Result 12 1 read-write COMIF ADC_Channel 1 Result 5 1 read-write TIF ADC_Channel 1 Result 6 1 read-write UIF ADC_Channel 1 Result 0 1 read-write UART0 UART Register UART 0x0 0x0 0x20 registers n UART0 6 BAUDCR Baud Control Register 0x18 32 read-write n 0x0 0x0 BRG Reload value to use for 10ms timing 0 16 read-only NOREF No Ref 31 1 read-only 0 Ref Clk available 0 1 Ref Clk not available 1 SELF_BRG Clock Skew 16 1 read-only INTCLR UART0 Interruput flag Clear Register 0x14 32 read-write n 0x0 0x0 FECLR No Ref 2 1 write-only RICLR Reload value to use for 10ms timing 0 1 write-only TICLR Clock Skew 1 1 write-only INTSR Interrupt flag Status Register 0x10 32 read-write n 0x0 0x0 FE No Ref 2 1 read-only RI Reload value to use for 10ms timing 0 1 read-only TI Clock Skew 1 1 read-only IRDACR UART0 IrDA Control Register 0x1C 32 read-write n 0x0 0x0 IREN Clock Skew 8 1 read-only IRLPMODE No Ref 11 1 read-write IRRXINV No Ref 10 1 read-write IRTXINV No Ref 9 1 read-write PSC Reload value to use for 10ms timing 0 8 read-write SADDR Address Register 0x8 32 read-write n 0x0 0x0 SADDR Current value 0 8 read-write SADEN Address Mask Register 0xC 32 read-write n 0x0 0x0 SADEN Reload value to use for 10ms timing 0 8 read-only SBUF Data BUFF 0x4 32 read-write n 0x0 0x0 SBUF Baudrate gennerate register 0 8 read-write SCON UART1 Control Register 0x0 32 read-write n 0x0 0x0 DBAUD Baudrate double 9 1 read-write RB8 Multi-communication bit 2 1 read-write REN Transmit and Receive Enable 4 1 read-write RIEN Receive Interrupt 0 1 read-write SM0_SM1 UART mode control 6 2 read-write SM2 UART multi-communication 5 1 read-write TB8 Multi-communication bit 3 1 read-write TIEN Transmit Interrupt 1 1 read-write UART1 UART Register UART 0x0 0x0 0x20 registers n UART1 UART1 global interrupt 7 BAUDCR Baud Control Register 0x18 32 read-write n 0x0 0x0 BRG Reload value to use for 10ms timing 0 16 read-only NOREF No Ref 31 1 read-only 0 Ref Clk available 0 1 Ref Clk not available 1 SELF_BRG Clock Skew 16 1 read-only INTCLR UART0 Interruput flag Clear Register 0x14 32 read-write n 0x0 0x0 FECLR No Ref 2 1 write-only RICLR Reload value to use for 10ms timing 0 1 write-only TICLR Clock Skew 1 1 write-only INTSR Interrupt flag Status Register 0x10 32 read-write n 0x0 0x0 FE No Ref 2 1 read-only RI Reload value to use for 10ms timing 0 1 read-only TI Clock Skew 1 1 read-only IRDACR UART0 IrDA Control Register 0x1C 32 read-write n 0x0 0x0 IREN Clock Skew 8 1 read-only IRLPMODE No Ref 11 1 read-write IRRXINV No Ref 10 1 read-write IRTXINV No Ref 9 1 read-write PSC Reload value to use for 10ms timing 0 8 read-write SADDR Address Register 0x8 32 read-write n 0x0 0x0 SADDR Current value 0 8 read-write SADEN Address Mask Register 0xC 32 read-write n 0x0 0x0 SADEN Reload value to use for 10ms timing 0 8 read-only SBUF Data BUFF 0x4 32 read-write n 0x0 0x0 SBUF Baudrate gennerate register 0 8 read-write SCON UART1 Control Register 0x0 32 read-write n 0x0 0x0 DBAUD Baudrate double 9 1 read-write RB8 Multi-communication bit 2 1 read-write REN Transmit and Receive Enable 4 1 read-write RIEN Receive Interrupt 0 1 read-write SM0_SM1 UART mode control 6 2 read-write SM2 UART multi-communication 5 1 read-write TB8 Multi-communication bit 3 1 read-write TIEN Transmit Interrupt 1 1 read-write VC VC VC 0x0 0x0 0x10 registers n VC 26 CR0 VC Control 0 0x0 32 read-write n 0x0 0x0 NINSEL No Comment 2 2 read-write PINSEL No Comment 0 2 read-write V25DIV No Comment 4 2 read-write V25DIV_EN No Comment 6 1 read-write CR1 VC Control 1 0x4 32 read-write n 0x0 0x0 FALLINTEN No Comment 12 1 read-write FLTEN No Comment 8 1 read-write FLT_NUM No Comment 16 16 read-write HIGHINTEN No Comment 14 1 read-write INT_EN No Comment 15 1 read-write RISEINTEN No Comment 13 1 read-write VCEN No Comment 0 1 read-write VC_FLTCLK_SEL No Comment 2 2 read-write OUTCFG VC Output Config 0x8 32 read-write n 0x0 0x0 INV_PAD No comment 18 1 read-write INV_PCA No Comment 6 1 read-write INV_TIMX No Comment 0 1 read-write INV_TM1CH1 No Comment 9 1 read-write INV_TM1CH2 No comment 11 1 read-write INV_TM1CH3 No comment 13 1 read-write INV_TM1CH4 No comment 15 1 read-write LPTIMEXT_EN No Comment 5 1 read-write LPTIM_EN No Comment 4 1 read-write PCACAP0_EN No Comment 7 1 read-write PCAECI_EN No Comment 8 1 read-write TIM0_EN No Comment 1 1 read-write TIM1CH3_EN No comment 14 1 read-write TIM1_EN No Comment 2 1 read-write TM1BKE No comment 17 1 read-write TM1CH1_EN No Comment 10 1 read-write TM1CH2_EN No comment 12 1 read-write TM1CH3_EN No comment 16 1 read-write SR VC Status Register 0xC 32 read-write n 0x0 0x0 INTF No comment 0 1 read-write VC_FLOUT No comment 1 1 read-only WWDG Independ Watch Dog WWDG 0x0 0x0 0x18 registers n WWDG 22 CNTVAL Count Value 0x14 32 read-write n 0x0 0x0 WWDGCNT ADC Channel 0 Result 0 8 read-only CR IWDG Config Register 0x4 32 read-write n 0x0 0x0 PRSC ADC Convect Auto Triger 1 8 20 read-write WINCMP ADC Convect Auto Triger 0 0 8 read-write WWDGEN ADC_Convect mode Select 28 1 read-write INTCLR WWDG Interrupt Status Register 0x10 32 read-write n 0x0 0x0 INTCLR ADC Channel 3 Result 0 1 write-only INTEN Count ReLoad Register 0x8 32 read-write n 0x0 0x0 WWDGIEN ADC Continue Convect Channel 7-0 Enable 0 1 read-write RLOAD Count ReLoad Register 0x0 32 read-write n 0x0 0x0 RLOAD ADC Enable 0 8 read-write SR WWDG Interrupt Status Register 0xC 32 read-write n 0x0 0x0 WWDGIF ADC_Channel 1 Result 0 1 read-only