WCH CH592SFR 2025.05.09 WCH wireless MCU CH59x Family Support, Drivers RISC-V r0p0 little 2 false 8 32 SYS System Control Register SystemControl 0x40001000 0x0 0x400 registers n TMR0 TMR0_IRQHandler 16 GPIO_A GPIOA_IRQHandler 17 GPIO_B GPIOB_IRQHandler 18 SPI0 SPI0_IRQHandler 19 BLEB BB_IRQHandler 20 BLEL LLE_IRQHandler 21 USB USB_IRQHandler 22 TMR1 TMR1_IRQHandler 24 TMR2 TMR2_IRQHandler 25 UART0 UART0_IRQHandler 26 UART1 UART1_IRQHandler 27 RTC RTC_IRQHandler 28 ADC ADC_IRQHandler 29 I2C I2C_IRQHandler 30 PWMX PWMX_IRQHandler 31 TMR3 TMR3_IRQHandler 32 UART2 UART2_IRQHandler 33 UART3 UART3_IRQHandler 34 WDOG_BAT WDOG_BAT_IRQHandler 35 R32_CLK_SYS_CFG RWA, system clock configuration, SAM 0x8 32 Read or Write under safe Accessing mode n 0x140005 0xFFFFFFFF RB_CLK_PLL_DIV RWA, output clock divider from PLL or CK32M 0 5 Read or Write under safe Accessing mode RB_CLK_SYS_MOD RWA, system clock source mode: 00=divided from 32MHz 6 2 Read or Write under safe Accessing mode