ChipSelect

• Chips by feature
• Chips by Vendor
• about
• login

Vendor Web: MediaTek

download svd file

All devices of this Vendor

Name : MT7697

Flash : 65536 kB

Flash bank : 0x4000000 Bytes @ 0x10000000

RAM : 256 kB

RAM : 0x00040000 Bytes @ 0x00040000

Architecture

Architecture : CM4 (CM4)

revision : r0p1

endian : little

Memory Protection Unit (MPU) : available

Floating Point Unit (FPU) : available

Number of relevant bits in Interrupt priority : 2

Peripherals

name : APB2
description : APB bridge 1 (synchronous to CM4)
base address : 0x0

name : CONFIG_CM4
description : System Configuration for CM4
base address : 0x0

name : CONFIG_CM4_AON
description : System configuration for CM4 in TOP_AON domain
base address : 0x0

name : DMA_CM4
description : generic DMA engine for CM4
base address : 0x0

name : GPT_CM4
description : General Purpose Timer for CM4
base address : 0x0

name : NVIC
description : Packet Switch engine memory
base address : 0x0

name : PSE
description : Packet Switch engine memory
base address : 0x0

name : RTC
description : Real Time Clock for CM4
base address : 0x0

name : SEC_TOP_CM4
description : JTAG security for CM4
base address : 0x0

name : SYSRAM_CM4
description : Tightly Coupled RAM for CM4
base address : 0x0

name : TCM_RAM0
description : Tightly Coupled RAM for CM4
base address : 0x0

name : TCM_RAM1
description : Tightly Coupled RAM for CM4
base address : 0x0

name : TCM_RAM2
description : Tightly Coupled RAM for CM4
base address : 0x0

name : TCM_RAM3
description : Tightly Coupled RAM for CM4
base address : 0x0

name : TCM_RAM4
description : Tightly Coupled RAM for CM4
base address : 0x0

name : TOP_CFG_AON_CM4
description : TOP_AON configuration
base address : 0x0

name : UART1
description : UART 1 for CM4
base address : 0x0

name : UART2
description : UART 2 for CM4
base address : 0x0

name : UART_DSN
description : UART for CM4 debug
base address : 0x0

name : WDT_CM4
description : Watchdog Timer for CM4
base address : 0x0