Name : RS1xxxx
description : RS1xxxx Cortex-M4 MCU
Architecture : CM4 (CM4)
revision : r0p1
endian : little
Memory Protection Unit (MPU) : available
Floating Point Unit (FPU) : available
Number of relevant bits in Interrupt priority : 6
name : AUX_ADC_DAC_COMP
description : The ADC-DAC Controller works on a ADC with a resolution of 12bits at 10Maga sample per second when ADC reference Voltage is greater than 2.8v or 5Maga sample per second when ADC reference Voltage is less than 2.8v.
base address : 0x0
Interrupt (7) COMP2
Interrupt (8) COMP1
Interrupt (11) ADC
name : CAN
description : The DCAN is a standalone CAN (Controller Area Network) controller widely used in automotive and industrial applications.
base address : 0x0
Interrupt (66) CAN1
name : CCI
description : CCI module helps external memories and peripherals to communicate with internal AHB bus with less number of pins
base address : 0x0
Interrupt (71) CCI
name : CRC
description : CRC is used in all wireless communication as a first data integrity check
base address : 0x0
name : CT0
description : Configurable timer is used in counting clocks, events and states with reference clock external clock and system clock
base address : 0x0
Interrupt (34) CT
name : CT1
description : Configurable timer is used in counting clocks, events and states with reference clock external clock and system clock
base address : 0x0
Interrupt (34) CT
name : CT2
description : Configurable timer is used in counting clocks, events and states with reference clock external clock and system clock
base address : 0x0
Interrupt (34) CT
name : CT3
description : Configurable timer is used in counting clocks, events and states with reference clock external clock and system clock
base address : 0x0
Interrupt (34) CT
name : CTS
description : The capacitive touch sensor (CTS) controller is used to detect the position of the touch from the user on the capacitive touch screen
base address : 0x0
Interrupt (6) CTS
name : CT_MUX_REG
description : Configurable timer is used in counting clocks, events and states with reference clock external clock and system clock
base address : 0x0
name : EFUSE
description : The EFUSE controller is used to provide an interface to one time program memory (EFUSE macro) to perform write and read operations
base address : 0x0
name : EGPIO
description : ENHANCED GENERAL PERPOSE INPUT/OUTPUT
base address : 0x0
Interrupt (50) EGPIO_GROUP_0
Interrupt (51) EGPIO_GROUP_1
Interrupt (52) EGPIO_PIN_0
Interrupt (53) EGPIO_PIN_1
Interrupt (54) EGPIO_PIN_2
Interrupt (55) EGPIO_PIN_3
Interrupt (56) EGPIO_PIN_4
Interrupt (57) EGPIO_PIN_5
Interrupt (58) EGPIO_PIN_6
Interrupt (59) EGPIO_PIN_7
name : EGPIO1
description : ENHANCED GENERAL PERPOSE INPUT/OUTPUT
base address : 0x0
Interrupt (18) ULP_EGPIO_PIN
Interrupt (19) ULP_EGPIO_GROUP
name : ETH
description : The Ethernet Controller enables a host to transmit and receive data over Ethernet
base address : 0x0
name : FIM
description : FIM support fixed point Multiplications implemented through programmable shifting.
base address : 0x0
Interrupt (17) FIM
name : GPDMA_C
description : GPDMAC (dma controller) is an AMBA complaint peripheral unit supports 8-channels
base address : 0x0
name : GPDMA_G
description : GPDMA is an AMBA complaint peripheral unit supports 8-channels
base address : 0x0
Interrupt (31) GPDMA
name : GPIO_25_30_CONFIG_REG
description : Host gpio use as general gpio mode
base address : 0x0
name : GPIO_TIMESTAMP
description : The Block is used for capturing the Timestamp of GPIO signal going high from SLEEP to Active state
base address : 0x0
name : GSPI0
description : GSPI, or Generic SPI, is a module which has been derived from QSPI. GSPI can act only as a master
base address : 0x0
Interrupt (46) GSPI0
name : HWRNG
description : Random numbers generated are 16-bit random numbers and are generated using either the True random number generator or the Pseudo random number generator.
base address : 0x0
name : I2C0
description : Inter Integrated Circuit(I2C) is programmable control bus that provides support for the communications link between integrated circuits in a system
base address : 0x0
Interrupt (42) I2C0
name : I2C1
description : Inter Integrated Circuit(I2C) is programmable control bus that provides support for the communications link between integrated circuits in a system
base address : 0x0
Interrupt (61) I2C1
name : I2S0
description : I2S(Inter-IC Sound) is transferring two-channel digital audio data from one IC device to another
base address : 0x0
Interrupt (43) I2S0
name : I2S1
description : I2S(Inter-IC Sound) is transferring two-channel digital audio data from one IC device to another
base address : 0x0
Interrupt (12) I2S1
name : IR
description : IR Decoder are used for the decoding the external ir sensor input.
base address : 0x0
Interrupt (15) IR
name : MCPWM
description : The Motor Control PWM (MCPWM) controller is used to generate a periodic pulse waveform, which is useful in motor control and power control applications
base address : 0x0
Interrupt (48) MCPWM
name : MCUHP_CLOCK
description : MCU HP (High Performance) domain contains the Cortex-M4F Processor, FPU, Debugger, MCU High Speed Interfaces, MCU HP Peripherals, MCU HP DMA and MCU/SZP shareable Interfaces
base address : 0x0
Interrupt (69) MCUHP_CLOCK
name : MCUHP_MISC_CLOCK
description : MCU HP (High Performance) domain contains the Cortex-M4F Processor, FPU, Debugger, MCU High Speed Interfaces, MCU HP Peripherals, MCU HP DMA and MCU/SZP shareable Interfaces
base address : 0x0
name : MCUULP_CLOCK
description : The MCU ULP (Ultra Low Power) domain contains the MCU ULP AHB Inter-Connect-Matrix, MCU ULP Peripherals and the direct AHB Interface with the Processor. This section describes the different clock sources possible for each peripheral and the AHB/APB Interfaces.
base address : 0x0
name : MCU_ULP_VBAT_CLOCK
description : The MCU ULP VBAT domain contains the MCU ULP VBAT Peripherals. This section describes the different clock sources possible for each peripheral.
base address : 0x0
name : MCU_WDT
description : A dedicated window watch dog timer for MCU applications
base address : 0x0
Interrupt (20) NPSS_TO_MCU_WDT_INTR
name : OPAMP
description : The opamps top consists of 3 general purpose Operational Amplifiers (OPAMP) offering rail-to-rail inputs and outputs
base address : 0x0
name : POWER_DOMAINS
description : All the Applications, High Speed Interfaces and Peripherals are segregated into multiple power domains to achieve lower current consumption when they are inactive. At reset, all the domains are powered ON.
base address : 0x0
name : QEI
description : The Quadrature Encoder Interface (QEI) module provides the interface to incremental encoders for obtaining mechanical position data
base address : 0x0
Interrupt (49) QEI
name : RTC
description : The MCU RTC acts as RTC with time in seconds, minutes, hours, days, months, years and centuries
base address : 0x0
Interrupt (29) MCU_RTC
name : SHMIC
description : The SD or SDIO or MMC Host Controller (SMIHC) is compatible with Standard SD Host 3.0 and eMMC5.0 Specification. The SMIHC supports three key interfaces (SD memory, SDIO and eMMC)
base address : 0x0
name : SIO
description : SERIAL GENERAL PERPOSE INPUT/OUTPUT
base address : 0x0
Interrupt (37) SIO
name : SLEEP_FSM
description : This is explain the Sleep FSM registers.
base address : 0x0
name : SSIMaster
description : Synchronous Serial Interface(SSI)
base address : 0x0
Interrupt (47) SSIMaster
name : SSISlave
description : Synchronous Serial Interface(SSI)
base address : 0x0
Interrupt (44) SSISlave
name : TEMPERATURE_SENSOR
description : The temperature sensor is used to read the temperature by using APB registers, which is access through direct to ULPSS system.
base address : 0x0
name : TIMEPERIOD_CALIBRATION
description : In this the time periods of 32KHz RC clock, 32KHz RO clock and 32KHz XTAL clock can be calibrated
base address : 0x0
name : TIMERS
description : TIMER can be used to generate various timing events for the software
base address : 0x0
Interrupt (2) TIMER0
Interrupt (3) TIMER1
Interrupt (4) TIMER2
Interrupt (5) TIMER3
name : UART0
description : Universal Asynchronous Receiver/Transmitter is for serial communication with peripherals, modems and datasets
base address : 0x0
Interrupt (38) USART1
name : UART1
description : Universal Asynchronous Receiver/Transmitter is for serial communication with peripherals, modems and datasets
base address : 0x0
Interrupt (39) USART2
name : UART2
description : Universal Asynchronous Receiver/Transmitter is for serial communication with peripherals, modems and datasets
base address : 0x0
Interrupt (38) USART1
name : UDMA0
description : DMA Performs data transfers along with Addresses and control information
base address : 0x0
Interrupt (33) UDMA0
name : UDMA1
description : DMA Performs data transfers along with Addresses and control information
base address : 0x0
Interrupt (10) UDMA1
name : ULP_I2C
description : Inter Integrated Circuit(I2C) is programmable control bus that provides support for the communications link between integrated circuits in a system
base address : 0x0
Interrupt (13) I2C2
name : ULP_SSI
description : Synchronous Serial Interface(SSI)
base address : 0x0
Interrupt (16) ULP_SSI
name : ULTRA_LOW_POWER_DOMAINS
description : This is explain the Ultra low power domains peripherals registers.
base address : 0x0
name : USBHS
description : The Universal Serial Bus (USB) is a cable bus that supports data exchange between a host computer and a wide range of simultaneously accessible peripherals
base address : 0x0
Interrupt (73) USB
name : USRT0
description : Universal Asynchronous Receiver/Transmitter is for serial communication with peripherals, modems and datasets
base address : 0x0
Interrupt (38) USART1
name : VAD
description : VAD (Voice-Activity-Detection) is an hardware accelerator to detect voice activity on the samples provided by the Processor
base address : 0x0
Interrupt (0) VAD_INTR_PING
Interrupt (1) VAD_INTR_PONG
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