\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
DCMI control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CAPTURE : CAPTURE
bits : 0 - 0 (1 bit)
CM : CM
bits : 1 - 1 (1 bit)
CROP : CROP
bits : 2 - 2 (1 bit)
JPEG : JPEG
bits : 3 - 3 (1 bit)
ESS : ESS
bits : 4 - 4 (1 bit)
PCKPOL : PCKPOL
bits : 5 - 5 (1 bit)
HSPOL : HSPOL
bits : 6 - 6 (1 bit)
VSPOL : VSPOL
bits : 7 - 7 (1 bit)
FCRC : FCRC
bits : 8 - 9 (2 bit)
EDM : EDM
bits : 10 - 11 (2 bit)
ENABLE : ENABLE
bits : 14 - 14 (1 bit)
BSM : BSM
bits : 16 - 17 (2 bit)
OEBS : OEBS
bits : 18 - 18 (1 bit)
LSM : LSM
bits : 19 - 19 (1 bit)
OELS : OELS
bits : 20 - 20 (1 bit)
This DCMI_MIS register is a read-only register. When read, it returns the current masked status value (depending on the value in DCMI_IER) of the corresponding interrupt. A bit in this register is set if the corresponding enable bit in DCMI_IER is set and the corresponding bit in DCMI_RIS is set.
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FRAME_MIS : FRAME_MIS
bits : 0 - 0 (1 bit)
OVR_MIS : OVR_MIS
bits : 1 - 1 (1 bit)
ERR_MIS : ERR_MIS
bits : 2 - 2 (1 bit)
VSYNC_MIS : VSYNC_MIS
bits : 3 - 3 (1 bit)
LINE_MIS : LINE_MIS
bits : 4 - 4 (1 bit)
The DCMI_ICR register is write-only.
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
FRAME_ISC : FRAME_ISC
bits : 0 - 0 (1 bit)
OVR_ISC : OVR_ISC
bits : 1 - 1 (1 bit)
ERR_ISC : ERR_ISC
bits : 2 - 2 (1 bit)
VSYNC_ISC : VSYNC_ISC
bits : 3 - 3 (1 bit)
LINE_ISC : LINE_ISC
bits : 4 - 4 (1 bit)
DCMI embedded synchronization code register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FSC : FSC
bits : 0 - 7 (8 bit)
LSC : LSC
bits : 8 - 15 (8 bit)
LEC : LEC
bits : 16 - 23 (8 bit)
FEC : FEC
bits : 24 - 31 (8 bit)
DCMI embedded synchronization unmask register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FSU : FSU
bits : 0 - 7 (8 bit)
LSU : LSU
bits : 8 - 15 (8 bit)
LEU : LEU
bits : 16 - 23 (8 bit)
FEU : FEU
bits : 24 - 31 (8 bit)
DCMI crop window start
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HOFFCNT : HOFFCNT
bits : 0 - 13 (14 bit)
VST : VST
bits : 16 - 28 (13 bit)
DCMI crop window size
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CAPCNT : CAPCNT
bits : 0 - 13 (14 bit)
VLINE : VLINE
bits : 16 - 29 (14 bit)
DCMI data register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Byte0 : Byte0
bits : 0 - 7 (8 bit)
Byte1 : Byte1
bits : 8 - 15 (8 bit)
Byte2 : Byte2
bits : 16 - 23 (8 bit)
Byte3 : Byte3
bits : 24 - 31 (8 bit)
DCMI status register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
HSYNC : HSYNC
bits : 0 - 0 (1 bit)
VSYNC : VSYNC
bits : 1 - 1 (1 bit)
FNE : FNE
bits : 2 - 2 (1 bit)
DCMI_RIS gives the raw interrupt status and is accessible in read only. When read, this register returns the status of the corresponding interrupt before masking with the DCMI_IER register value.
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FRAME_RIS : FRAME_RIS
bits : 0 - 0 (1 bit)
OVR_RIS : OVR_RIS
bits : 1 - 1 (1 bit)
ERR_RIS : ERR_RIS
bits : 2 - 2 (1 bit)
VSYNC_RIS : VSYNC_RIS
bits : 3 - 3 (1 bit)
LINE_RIS : LINE_RIS
bits : 4 - 4 (1 bit)
The DCMI_IER register is used to enable interrupts. When one of the DCMI_IER bits is set, the corresponding interrupt is enabled. This register is accessible in both read and write.
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FRAME_IE : FRAME_IE
bits : 0 - 0 (1 bit)
OVR_IE : OVR_IE
bits : 1 - 1 (1 bit)
ERR_IE : ERR_IE
bits : 2 - 2 (1 bit)
VSYNC_IE : VSYNC_IE
bits : 3 - 3 (1 bit)
LINE_IE : LINE_IE
bits : 4 - 4 (1 bit)
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