\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
HSEM i1terrupt enable register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ISE : ISE
bits : 0 - 31 (32 bit)
HSEM i1terrupt clear register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ISC : ISC
bits : 0 - 31 (32 bit)
HSEM i1terrupt status register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ISF : ISF
bits : 0 - 31 (32 bit)
HSEM i1terrupt status register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MISF : MISF
bits : 0 - 31 (32 bit)
HSEM i2terrupt enable register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ISE : ISE
bits : 0 - 31 (32 bit)
HSEM i2terrupt clear register
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ISC : ISC
bits : 0 - 31 (32 bit)
HSEM i2terrupt status register
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ISF : ISF
bits : 0 - 31 (32 bit)
HSEM i2terrupt status register
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MISF : MISF
bits : 0 - 31 (32 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
COREID : COREID
bits : 8 - 11 (4 bit)
KEY : KEY
bits : 16 - 31 (16 bit)
HSEM interrupt clear register
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEY : KEY
bits : 16 - 31 (16 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
HSEM hardware configuration register 2
address_offset : 0x3EC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MASTERID1 : MASTERID1
bits : 0 - 3 (4 bit)
MASTERID2 : MASTERID2
bits : 4 - 7 (4 bit)
MASTERID3 : MASTERID3
bits : 8 - 11 (4 bit)
MASTERID4 : MASTERID4
bits : 12 - 15 (4 bit)
HSEM hardware configuration register 1
address_offset : 0x3F0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
NBSEM : NBSEM
bits : 0 - 7 (8 bit)
NBINT : NBINT
bits : 8 - 11 (4 bit)
HSEM IP version register
address_offset : 0x3F4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MINREV : MINREV
bits : 0 - 3 (4 bit)
MAJREV : MAJREV
bits : 4 - 7 (4 bit)
HSEM IP identification register
address_offset : 0x3F8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IPID : IPID
bits : 0 - 31 (32 bit)
HSEM size identification register
address_offset : 0x3FC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SID : SID
bits : 0 - 31 (32 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
The HSEM_Rx shall be used to perform a 2-step Write lock and Read back. Only Write accesses with authorized AHB bus master IDs are granted. Write accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
Accesses the same physical bits as HSEM_Rx. The HSEM_RLRx shall be used to perform a 1-step Read lock. Only Read accesses with authorized AHB bus master IDs are granted. Read accesses with unauthorized AHB bus master IDs are discarded.
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : PROCID
bits : 0 - 7 (8 bit)
COREID : COREID
bits : 8 - 11 (4 bit)
LOCK : LOCK
bits : 31 - 31 (1 bit)
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