\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
RNG control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RNGEN : RNGEN
bits : 2 - 2 (1 bit)
IE : IE
bits : 3 - 3 (1 bit)
CED : CED
bits : 5 - 5 (1 bit)
RNG hardware configuration register
address_offset : 0x3F0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RNG version register
address_offset : 0x3F4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MINREV : MINREV
bits : 0 - 3 (4 bit)
MAJREV : MAJREV
bits : 4 - 7 (4 bit)
RNG identification register
address_offset : 0x3F8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ID : ID
bits : 0 - 31 (32 bit)
RNG size ID register
address_offset : 0x3FC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SID : SID
bits : 0 - 31 (32 bit)
RNG status register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DRDY : DRDY
bits : 0 - 0 (1 bit)
access : read-only
CECS : CECS
bits : 1 - 1 (1 bit)
access : read-only
SECS : SECS
bits : 2 - 2 (1 bit)
access : read-only
CEIS : CEIS
bits : 5 - 5 (1 bit)
access : read-write
SEIS : SEIS
bits : 6 - 6 (1 bit)
access : read-write
The RNG_DR register is a read-only register.
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RNDATA : RNDATA
bits : 0 - 31 (32 bit)
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