FLASH_ACR (ACR)

FLASH_OPTKEYR (OPTKEYR)

FLASH_PDKEY1R (PDKEY1R)

FLASH_PDKEY2R (PDKEY2R)

FLASH_NSSR (NSSR)

FLASH_SECSR (SECSR)

FLASH_NSCR (NSCR)

FLASH_SECCR (SECCR)

FLASH_ECCR (ECCR)

FLASH_OPSR (OPSR)

FLASH_OPTR (OPTR)

FLASH_NSBOOTADD0R (NSBOOTADD0R)

FLASH_NSBOOTADD1R (NSBOOTADD1R)

FLASH_SECBOOTADD0R (SECBOOTADD0R)

FLASH_SECWM1R1 (SECWM1R1)

FLASH_SECWM1R2 (SECWM1R2)

FLASH_WRP1AR (WRP1AR)

FLASH_WRP1BR (WRP1BR)

FLASH_SECWM2R1 (SECWM2R1)

FLASH_SECWM2R2 (SECWM2R2)

FLASH_WRP2AR (WRP2AR)

FLASH_WRP2BR (WRP2BR)

FLASH_OEM1KEYR1 (OEM1KEYR1)

FLASH_OEM1KEYR2 (OEM1KEYR2)

FLASH_OEM2KEYR1 (OEM2KEYR1)

FLASH_OEM2KEYR2 (OEM2KEYR2)

FLASH_NSKEYR (NSKEYR)

FLASH_SEC1BBR1 (SEC1BBR1)

FLASH_SEC1BBR2 (SEC1BBR2)

FLASH_SEC1BBR3 (SEC1BBR3)

FLASH_SEC1BBR4 (SEC1BBR4)

FLASH_SEC2BBR1 (SEC2BBR1)

FLASH_SEC2BBR2 (SEC2BBR2)

FLASH_SEC2BBR3 (SEC2BBR3)

FLASH_SEC2BBR4 (SEC2BBR4)

FLASH_SECKEYR (SECKEYR)

FLASH_SECHDPCR (SECHDPCR)

FLASH_PRIVCFGR (PRIVCFGR)

FLASH_PRIV1BBR1 (PRIV1BBR1)

FLASH_PRIV1BBR2 (PRIV1BBR2)

FLASH_PRIV1BBR3 (PRIV1BBR3)

FLASH_PRIV1BBR4 (PRIV1BBR4)

FLASH_PRIV2BBR1 (PRIV2BBR1)

FLASH_PRIV2BBR2 (PRIV2BBR2)

FLASH_PRIV2BBR3 (PRIV2BBR3)

FLASH_PRIV2BBR4 (PRIV2BBR4)

LATENCY : Latency These bits represent the ratio between the HCLK (AHB clock) period and the Flash memory access time. ...
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PRFTEN : Prefetch enable This bit enables the prefetch buffer in the embedded Flash memory.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

LPM : Low-power read mode This bit puts the Flash memory in low-power read mode.
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PDREQ1 : Bank 1 power-down mode request This bit is write-protected with FLASH_PDKEY1R. This bit requests bank 1 to enter power-down mode. When bank 1 enters power-down mode, this bit is cleared by hardware and the PDKEY1R is locked.
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PDREQ2 : Bank 2 power-down mode request This bit is write-protected with FLASH_PDKEY2R. This bit requests bank 2 to enter power-down mode. When bank 2 enters power-down mode, this bit is cleared by hardware and the PDKEY2R is locked.
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SLEEP_PD : Flash memory power-down mode during Sleep mode This bit determines whether the Flash memory is in power-down mode or Idle mode when the device is in Sleep mode. The Flash must not be put in power-down while a program or an erase operation is on-going.
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OPTKEY : Option byte key
bits : 0 - 31 (32 bit)
access : write-only

PDKEY1 : Bank 1 power-down key
bits : 0 - 31 (32 bit)
access : write-only

PDKEY2 : Bank 2 power-down key
bits : 0 - 31 (32 bit)
access : write-only

EOP : Non-secure end of operation
bits : 0 - 0 (1 bit)
access : read-write

OPERR : Non-secure operation error
bits : 1 - 1 (1 bit)
access : read-write

PROGERR : Non-secure programming error This bit is set by hardware when a non-secure quad-word address to be programmed contains a value different from all 1 before programming, except if the data to write is all 0. This bit is cleared by writing 1.
bits : 3 - 3 (1 bit)
access : read-write

WRPERR : Non-secure write protection error This bit is set by hardware when an non-secure address to be erased/programmed belongs to a write-protected part (by WRP, HDP or RDP level 1) of the Flash memory. This bit is cleared by writing 1. Refer to for full conditions of error flag setting.
bits : 4 - 4 (1 bit)
access : read-write

PGAERR : Non-secure programming alignment error This bit is set by hardware when the first word to be programmed is not aligned with a quad-word address, or the second, third or forth word does not belong to the same quad-word address. This bit is cleared by writing 1.
bits : 5 - 5 (1 bit)
access : read-write

SIZERR : Non-secure size error This bit is set by hardware when the size of the access is a byte or half-word during a non-secure program sequence. Only quad-word programming is allowed by means of successive word accesses. This bit is cleared by writing 1.
bits : 6 - 6 (1 bit)
access : read-write

PGSERR : Non-secure programming sequence error This bit is set by hardware when programming sequence is not correct. It is cleared by writing 1. Refer to for full conditions of error flag setting.
bits : 7 - 7 (1 bit)
access : read-write

OPTWERR : Option write error This bit is set by hardware when the options bytes are written with an invalid configuration. It is cleared by writing 1. Refer to for full conditions of error flag setting.
bits : 13 - 13 (1 bit)
access : read-write

BSY : Non-secure busy This indicates that a Flash memory secure or non-secure operation is in progress. This bit is set at the beginning of a Flash operation and reset when the operation finishes or when an error occurs.
bits : 16 - 16 (1 bit)
access : read-only

WDW : Non-secure wait data to write This bit indicates that the Flash memory write buffer has been written by a secure or non-secure operation. It is set when the first data is stored in the buffer and cleared when the write is performed in the Flash memory.
bits : 17 - 17 (1 bit)
access : read-only

OEM1LOCK : OEM1 lock This bit indicates that the OEM1 RDP key read during the OBL is not virgin. When set, the OEM1 RDP lock mechanism is active.
bits : 18 - 18 (1 bit)
access : read-only

OEM2LOCK : OEM2 lock This bit indicates that the OEM2 RDP key read during the OBL is not virgin. When set, the OEM2 RDP lock mechanism is active.
bits : 19 - 19 (1 bit)
access : read-only

PD1 : Bank 1 in power-down mode This bit indicates that the Flash memory bank 1 is in power-down state. It is reset when bank 1 is in normal mode or being awaken.
bits : 20 - 20 (1 bit)
access : read-only

PD2 : Bank 2 in power-down mode This bit indicates that the Flash memory bank 2 is in power-down state. It is reset when bank 2 is in normal mode or being awaken.
bits : 21 - 21 (1 bit)
access : read-only

EOP : Secure end of operation This bit is set by hardware when one or more Flash memory secure operation (program/erase) has been completed successfully. This bit is set only if the secure end of operation interrupts are enabled (EOPIE = 1 in FLASH_SECCR). This bit is cleared by writing 1.
bits : 0 - 0 (1 bit)
access : read-write

OPERR : Secure operation error This bit is set by hardware when a Flash memory secure operation (program/erase) completes unsuccessfully. This bit is set only if secure error interrupts are enabled (SECERRIE = 1). This bit is cleared by writing 1.
bits : 1 - 1 (1 bit)
access : read-write

PROGERR : Secure programming error This bit is set by hardware when a secure quad-word address to be programmed contains a value different from all 1 before programming, except if the data to write is all 0. This bit is cleared by writing 1.
bits : 3 - 3 (1 bit)
access : read-write

WRPERR : Secure write protection error This bit is set by hardware when an secure address to be erased/programmed belongs to a write-protected part (by WRP, PCROP, HDP or RDP level 1) of the Flash memory.This bit is cleared by writing 1. Refer to for full conditions of error flag setting.
bits : 4 - 4 (1 bit)
access : read-write

PGAERR : Secure programming alignment error This bit is set by hardware when the first word to be programmed is not aligned with a quad-word address, or the second, third or forth word does not belong to the same quad-word address.This bit is cleared by writing 1.
bits : 5 - 5 (1 bit)
access : read-write

SIZERR : Secure size error This bit is set by hardware when the size of the access is a byte or half-word during a secure program sequence. Only quad-word programming is allowed by means of successive word accesses.This bit is cleared by writing 1.
bits : 6 - 6 (1 bit)
access : read-write

PGSERR : Secure programming sequence error This bit is set by hardware when programming sequence is not correct. It is cleared by writing 1. Refer to for full conditions of error flag setting.
bits : 7 - 7 (1 bit)
access : read-write

BSY : Secure busy This bit indicates that a Flash memory secure or non-secure operation is in progress. This is set on the beginning of a Flash operation and reset when the operation finishes or when an error occurs.
bits : 16 - 16 (1 bit)
access : read-only

WDW : Secure wait data to write This bit indicates that the Flash memory write buffer has been written by a secure or non-secure operation. It is set when the first data is stored in the buffer and cleared when the write is performed in the Flash memory.
bits : 17 - 17 (1 bit)
access : read-only

PG : Non-secure programming
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PER : Non-secure page erase
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

MER1 : Non-secure bank 1 mass erase This bit triggers the bank 1 non-secure mass erase (all bank 1 user pages) when set.
bits : 2 - 2 (1 bit)
access : read-write

PNB : Non-secure page number selection These bits select the page to erase. ...
bits : 3 - 9 (7 bit)
access : read-write

BKER : Non-secure bank selection for page erase
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BWR : Non-secure burst write programming mode When set, this bit selects the burst write programming mode.
bits : 14 - 14 (1 bit)
access : read-write

MER2 : Non-secure bank 2 mass erase This bit triggers the bank 2 non-secure mass erase (all bank 2 user pages) when set.
bits : 15 - 15 (1 bit)
access : read-write

STRT : Non-secure start This bit triggers a non-secure erase operation when set. If MER1, MER2 and PER bits are reset and the STRT bit is set, the PGSERR bit in FLASH_NSSR is set (this condition is forbidden). This bit is set only by software and is cleared when the BSY bit is cleared in FLASH_NSSR.
bits : 16 - 16 (1 bit)
access : read-write

OPTSTRT : Options modification start This bit triggers an options operation when set. It can not be written if OPTLOCK bit is set. This bit is set only by software, and is cleared when the BSY bit is cleared in FLASH_NSSR.
bits : 17 - 17 (1 bit)
access : read-write

EOPIE : Non-secure end of operation interrupt enable This bit enables the interrupt generation when the EOP bit in the FLASH_NSSR is set to 1.
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ERRIE : Non-secure error interrupt enable This bit enables the interrupt generation when the OPERR bit in the FLASH_NSSR is set to 1.
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OBL_LAUNCH : Force the option byte loading When set to 1, this bit forces the option byte reloading. This bit is cleared only when the option byte loading is complete. It cannot be written if OPTLOCK is set.
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OPTLOCK : Option lock This bit is set only. When set, all bits concerning user options in FLASH_NSCR register are locked. This bit is cleared by hardware after detecting the unlock sequence. The LOCK bit in the FLASH_NSCR must be cleared before doing the unlock sequence for OPTLOCK bit. In case of an unsuccessful unlock operation, this bit remains set until the next reset.
bits : 30 - 30 (1 bit)
access : read-write

LOCK : Non-secure lock This bit is set only. When set, the FLASH_NSCR register is locked. It is cleared by hardware after detecting the unlock sequence in FLASH_NSKEYR register. In case of an unsuccessful unlock operation, this bit remains set until the next system reset.
bits : 31 - 31 (1 bit)
access : read-write

PG : Secure programming
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PER : Secure page erase
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

MER1 : Secure bank 1 mass erase This bit triggers the bank 1 secure mass erase (all bank 1 user pages) when set.
bits : 2 - 2 (1 bit)
access : read-write

PNB : Secure page number selection These bits select the page to erase: ...
bits : 3 - 9 (7 bit)
access : read-write

BKER : Secure bank selection for page erase
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BWR : Secure burst write programming mode When set, this bit selects the burst write programming mode.
bits : 14 - 14 (1 bit)
access : read-write

MER2 : Secure bank 2 mass erase This bit triggers the bank 2 secure mass erase (all bank 2 user pages) when set.
bits : 15 - 15 (1 bit)
access : read-write

STRT : Secure start This bit triggers a secure erase operation when set. If MER1, MER2 and PER bits are reset and the STRT bit is set, the PGSERR in the FLASH_SECSR is set (this condition is forbidden). This bit is set only by software and is cleared when the BSY bit is cleared in FLASH_SECSR.
bits : 16 - 16 (1 bit)
access : read-write

EOPIE : Secure End of operation interrupt enable This bit enables the interrupt generation when the EOP bit in the FLASH_SECSR is set to 1.
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ERRIE : Secure error interrupt enable
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RDERRIE : Secure PCROP read error interrupt enable
bits : 26 - 26 (1 bit)
access : read-write

INV : Flash memory security state invert This bit inverts the Flash memory security state.
bits : 29 - 29 (1 bit)
access : read-write

LOCK : Secure lock This bit is set only. When set, the FLASH_SECCR register is locked. It is cleared by hardware after detecting the unlock sequence in FLASH_SECKEYR register. In case of an unsuccessful unlock operation, this bit remains set until the next system reset.
bits : 31 - 31 (1 bit)
access : read-write

ADDR_ECC : ECC fail address
bits : 0 - 19 (20 bit)
access : read-only

BK_ECC : ECC fail bank
bits : 21 - 21 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

SYSF_ECC : System Flash memory ECC fail This bit indicates that the ECC error correction or double ECC error detection is located in the system Flash memory.
bits : 22 - 22 (1 bit)
access : read-only

ECCIE : ECC correction interrupt enable This bit enables the interrupt generation when the ECCC bit in the FLASH_ECCR register is set.
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ECCC : ECC correction This bit is set by hardware when one ECC error has been detected and corrected (only if ECCC and ECCD were previously cleared). An interrupt is generated if ECCIE is set. This bit is cleared by writing 1.
bits : 30 - 30 (1 bit)
access : read-write

ECCD : ECC detection This bit is set by hardware when two ECC errors have been detected (only if ECCC and ECCD were previously cleared). When this bit is set, a NMI is generated. This bit is cleared by writing 1.
bits : 31 - 31 (1 bit)
access : read-write

ADDR_OP : Interrupted operation address This field indicates which address in the Flash memory was accessed when reset occurred. The address is given by bank from address 0x0 0000 to 0xF FFF0.
bits : 0 - 19 (20 bit)
access : read-only

BK_OP : Interrupted operation bank This bit indicates which Flash memory bank was accessed when reset occurred
bits : 21 - 21 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

SYSF_OP : Operation in system Flash memory interrupted This bit indicates that the reset occurred during an operation in the system Flash memory.
bits : 22 - 22 (1 bit)
access : read-only

CODE_OP : Flash memory operation code This field indicates which Flash memory operation has been interrupted by a system reset:
bits : 29 - 31 (3 bit)
access : read-only

Enumeration:

End of enumeration elements list.

RDP : Readout protection level Others: Level 1 (memories readout protection active) Note: Refer to for more details.
bits : 0 - 7 (8 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BOR_LEV : BOR reset level These bits contain the VDD supply level threshold that activates/releases the reset.
bits : 8 - 10 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

nRST_STOP : Reset generation in Stop mode
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

nRST_STDBY : Reset generation in Standby mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

nRST_SHDW : Reset generation in Shutdown mode
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SRAM1345_RST : SRAM1, SRAM3 and SRAM4 erase upon system reset
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IWDG_SW : Independent watchdog selection
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IWDG_STOP : Independent watchdog counter freeze in Stop mode
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IWDG_STDBY : Independent watchdog counter freeze in Standby mode
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WWDG_SW : Window watchdog selection
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SWAP_BANK : Swap banks
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DUALBANK : Dual-bank on 1-Mbyte and 512-Kbyte Flash memory devices
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BKPRAM_ECC : Backup RAM ECC detection and correction enable
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SRAM3_ECC : SRAM3 ECC detection and correction enable
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SRAM2_ECC : SRAM2 ECC detection and correction enable
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SRAM2_RST : SRAM2 erase when system reset
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

nSWBOOT0 : Software BOOT0
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

nBOOT0 : nBOOT0 option bit
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA15_PUPEN : PA15 pull-up enable
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IO_VDD_HSLV : High-speed IO at low VDD voltage configuration bit This bit can be set only with VDD below 2.5V
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IO_VDDIO2_HSLV : High-speed IO at low VDDIO2 voltage configuration bit This bit can be set only with VDDIO2 below 2.5 V.
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TZEN : Global TrustZone security enable
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

NSBOOTADD0 : Non-secure boot base address 0 The non-secure boot memory address can be programmed to any address in the valid address range with a granularity of 128 bytes. These bits correspond to address [31:7]. The NSBOOTADD0 option bytes are selected following the BOOT0 pin or nSWBOOT0 state. Examples: NSBOOTADD0[24:0] = 0x0100000: Boot from non-secure Flash memory (0x0800 0000) NSBOOTADD0[24:0] = 0x017F200: Boot from system memory bootloader (0x0BF9 0000) NSBOOTADD0[24:0] = 0x0400000: Boot from non-secure SRAM1 on S-Bus (0x2000 0000)
bits : 7 - 31 (25 bit)
access : read-write

NSBOOTADD1 : Non-secure boot address 1 The non-secure boot memory address can be programmed to any address in the valid address range with a granularity of 128 bytes. These bits correspond to address [31:7]. The NSBOOTADD0 option bytes are selected following the BOOT0 pin or nSWBOOT0 state. Examples: NSBOOTADD1[24:0] = 0x0100000: Boot from non-secure Flash memory (0x0800 0000) NSBOOTADD1[24:0] = 0x017F200: Boot from system memory bootloader (0x0BF9 0000) NSBOOTADD1[24:0] = 0x0400000: Boot from non-secure SRAM1 on S-Bus (0x2000 0000)
bits : 7 - 31 (25 bit)
access : read-write

BOOT_LOCK : Boot lock When set, the boot is always forced to base address value programmed in SECBOOTADD0[24:0] option bytes whatever the boot selection option. When set, this bit can only be cleared by an RDP at level 0.
bits : 0 - 0 (1 bit)
access : read-write

SECBOOTADD0 : Secure boot base address 0 The secure boot memory address can be programmed to any address in the valid address range with a granularity of 128 bytes. This bits correspond to address [31:7] The SECBOOTADD0 option bytes are selected following the BOOT0 pin or nSWBOOT0 state. Examples: SECBOOTADD0[24:0] = 0x018 0000: Boot from secure Flash memory (0x0C00 0000) SECBOOTADD0[24:0] = 0x01F F000: Boot from RSS (0x0FF8 0000) SECBOOTADD0[24:0] = 0x060 0000: Boot from secure SRAM1 on S-Bus (0x3000 0000)
bits : 7 - 31 (25 bit)
access : read-write

SECWM1_PSTRT : Start page of first secure area This field contains the first page of the secure area in bank 1.
bits : 0 - 6 (7 bit)
access : read-write

SECWM1_PEND : End page of first secure area This field contains the last page of the secure area in bank 1.
bits : 16 - 22 (7 bit)
access : read-write

HDP1_PEND : End page of first hide protection area This field contains the last page of the HDP area in bank 1.
bits : 16 - 22 (7 bit)
access : read-write

HDP1EN : Hide protection first area enable
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WRP1A_PSTRT : bank 1 WPR first area A start page This field contains the first page of the first WPR area for bank 1.
bits : 0 - 6 (7 bit)
access : read-write

WRP1A_PEND : Bank 1 WPR first area A end page This field contains the last page of the first WPR area in bank 1.
bits : 16 - 22 (7 bit)
access : read-write

UNLOCK : Bank 1 WPR first area A unlock
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WRP1B_PSTRT : Bank 1 WRP second area B start page This field contains the first page of the second WRP area for bank 1.
bits : 0 - 6 (7 bit)
access : read-write

WRP1B_PEND : Bank 1 WRP second area B end page This field contains the last page of the second WRP area in bank 1.
bits : 16 - 22 (7 bit)
access : read-write

UNLOCK : Bank 1 WPR second area B unlock
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SECWM2_PSTRT : Start page of second secure area This field contains the first page of the secure area in bank 2.
bits : 0 - 6 (7 bit)
access : read-write

SECWM2_PEND : End page of second secure area This field contains the last page of the secure area in bank 2.
bits : 16 - 22 (7 bit)
access : read-write

HDP2_PEND : End page of hide protection second area HDP2_PEND contains the last page of the HDP area in bank 2.
bits : 16 - 22 (7 bit)
access : read-write

HDP2EN : Hide protection second area enable
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WRP2A_PSTRT : Bank 2 WPR first area A start page This field contains the first page of the first WRP area for bank 2.
bits : 0 - 6 (7 bit)
access : read-write

WRP2A_PEND : Bank 2 WPR first area A end page This field contains the last page of the first WRP area in bank 2.
bits : 16 - 22 (7 bit)
access : read-write

UNLOCK : Bank 2 WPR first area A unlock
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WRP2B_PSTRT : Bank 2 WPR second area B start page This field contains the first page of the second WRP area for bank 2.
bits : 0 - 6 (7 bit)
access : read-write

WRP2B_PEND : Bank 2 WPR second area B end page This field contains the last page of the second WRP area in bank 2.
bits : 16 - 22 (7 bit)
access : read-write

UNLOCK : Bank 2 WPR second area B unlock
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OEM1KEY : OEM1 least significant bytes key
bits : 0 - 31 (32 bit)
access : write-only

OEM1KEY : OEM1 most significant bytes key
bits : 0 - 31 (32 bit)
access : write-only

OEM2KEY : OEM2 least significant bytes key
bits : 0 - 31 (32 bit)
access : write-only

OEM2KEY : OEM2 most significant bytes key
bits : 0 - 31 (32 bit)
access : write-only

NSKEY : Flash memory non-secure key
bits : 0 - 31 (32 bit)
access : write-only

SEC1BB0 : page secure/non-secure attribution
bits : 0 - 0 (1 bit)
access : read-write

SEC1BB1 : page secure/non-secure attribution
bits : 1 - 1 (1 bit)
access : read-write

SEC1BB2 : page secure/non-secure attribution
bits : 2 - 2 (1 bit)
access : read-write

SEC1BB3 : page secure/non-secure attribution
bits : 3 - 3 (1 bit)
access : read-write

SEC1BB4 : page secure/non-secure attribution
bits : 4 - 4 (1 bit)
access : read-write

SEC1BB5 : page secure/non-secure attribution
bits : 5 - 5 (1 bit)
access : read-write

SEC1BB6 : page secure/non-secure attribution
bits : 6 - 6 (1 bit)
access : read-write

SEC1BB7 : page secure/non-secure attribution
bits : 7 - 7 (1 bit)
access : read-write

SEC1BB8 : page secure/non-secure attribution
bits : 8 - 8 (1 bit)
access : read-write

SEC1BB9 : page secure/non-secure attribution
bits : 9 - 9 (1 bit)
access : read-write

SEC1BB10 : page secure/non-secure attribution
bits : 10 - 10 (1 bit)
access : read-write

SEC1BB11 : page secure/non-secure attribution
bits : 11 - 11 (1 bit)
access : read-write

SEC1BB12 : page secure/non-secure attribution
bits : 12 - 12 (1 bit)
access : read-write

SEC1BB13 : page secure/non-secure attribution
bits : 13 - 13 (1 bit)
access : read-write

SEC1BB14 : page secure/non-secure attribution
bits : 14 - 14 (1 bit)
access : read-write

SEC1BB15 : page secure/non-secure attribution
bits : 15 - 15 (1 bit)
access : read-write

SEC1BB16 : page secure/non-secure attribution
bits : 16 - 16 (1 bit)
access : read-write

SEC1BB17 : page secure/non-secure attribution
bits : 17 - 17 (1 bit)
access : read-write

SEC1BB18 : page secure/non-secure attribution
bits : 18 - 18 (1 bit)
access : read-write

SEC1BB19 : page secure/non-secure attribution
bits : 19 - 19 (1 bit)
access : read-write

SEC1BB20 : page secure/non-secure attribution
bits : 20 - 20 (1 bit)
access : read-write

SEC1BB21 : page secure/non-secure attribution
bits : 21 - 21 (1 bit)
access : read-write

SEC1BB22 : page secure/non-secure attribution
bits : 22 - 22 (1 bit)
access : read-write

SEC1BB23 : page secure/non-secure attribution
bits : 23 - 23 (1 bit)
access : read-write

SEC1BB24 : page secure/non-secure attribution
bits : 24 - 24 (1 bit)
access : read-write

SEC1BB25 : page secure/non-secure attribution
bits : 25 - 25 (1 bit)
access : read-write

SEC1BB26 : page secure/non-secure attribution
bits : 26 - 26 (1 bit)
access : read-write

SEC1BB27 : page secure/non-secure attribution
bits : 27 - 27 (1 bit)
access : read-write

SEC1BB28 : page secure/non-secure attribution
bits : 28 - 28 (1 bit)
access : read-write

SEC1BB29 : page secure/non-secure attribution
bits : 29 - 29 (1 bit)
access : read-write

SEC1BB30 : page secure/non-secure attribution
bits : 30 - 30 (1 bit)
access : read-write

SEC1BB31 : page secure/non-secure attribution
bits : 31 - 31 (1 bit)
access : read-write

SEC1BB0 : page secure/non-secure attribution
bits : 0 - 0 (1 bit)
access : read-write

SEC1BB1 : page secure/non-secure attribution
bits : 1 - 1 (1 bit)
access : read-write

SEC1BB2 : page secure/non-secure attribution
bits : 2 - 2 (1 bit)
access : read-write

SEC1BB3 : page secure/non-secure attribution
bits : 3 - 3 (1 bit)
access : read-write

SEC1BB4 : page secure/non-secure attribution
bits : 4 - 4 (1 bit)
access : read-write

SEC1BB5 : page secure/non-secure attribution
bits : 5 - 5 (1 bit)
access : read-write

SEC1BB6 : page secure/non-secure attribution
bits : 6 - 6 (1 bit)
access : read-write

SEC1BB7 : page secure/non-secure attribution
bits : 7 - 7 (1 bit)
access : read-write

SEC1BB8 : page secure/non-secure attribution
bits : 8 - 8 (1 bit)
access : read-write

SEC1BB9 : page secure/non-secure attribution
bits : 9 - 9 (1 bit)
access : read-write

SEC1BB10 : page secure/non-secure attribution
bits : 10 - 10 (1 bit)
access : read-write

SEC1BB11 : page secure/non-secure attribution
bits : 11 - 11 (1 bit)
access : read-write

SEC1BB12 : page secure/non-secure attribution
bits : 12 - 12 (1 bit)
access : read-write

SEC1BB13 : page secure/non-secure attribution
bits : 13 - 13 (1 bit)
access : read-write

SEC1BB14 : page secure/non-secure attribution
bits : 14 - 14 (1 bit)
access : read-write

SEC1BB15 : page secure/non-secure attribution
bits : 15 - 15 (1 bit)
access : read-write

SEC1BB16 : page secure/non-secure attribution
bits : 16 - 16 (1 bit)
access : read-write

SEC1BB17 : page secure/non-secure attribution
bits : 17 - 17 (1 bit)
access : read-write

SEC1BB18 : page secure/non-secure attribution
bits : 18 - 18 (1 bit)
access : read-write

SEC1BB19 : page secure/non-secure attribution
bits : 19 - 19 (1 bit)
access : read-write

SEC1BB20 : page secure/non-secure attribution
bits : 20 - 20 (1 bit)
access : read-write

SEC1BB21 : page secure/non-secure attribution
bits : 21 - 21 (1 bit)
access : read-write

SEC1BB22 : page secure/non-secure attribution
bits : 22 - 22 (1 bit)
access : read-write

SEC1BB23 : page secure/non-secure attribution
bits : 23 - 23 (1 bit)
access : read-write

SEC1BB24 : page secure/non-secure attribution
bits : 24 - 24 (1 bit)
access : read-write

SEC1BB25 : page secure/non-secure attribution
bits : 25 - 25 (1 bit)
access : read-write

SEC1BB26 : page secure/non-secure attribution
bits : 26 - 26 (1 bit)
access : read-write

SEC1BB27 : page secure/non-secure attribution
bits : 27 - 27 (1 bit)
access : read-write

SEC1BB28 : page secure/non-secure attribution
bits : 28 - 28 (1 bit)
access : read-write

SEC1BB29 : page secure/non-secure attribution
bits : 29 - 29 (1 bit)
access : read-write

SEC1BB30 : page secure/non-secure attribution
bits : 30 - 30 (1 bit)
access : read-write

SEC1BB31 : page secure/non-secure attribution
bits : 31 - 31 (1 bit)
access : read-write

SEC1BB0 : page secure/non-secure attribution
bits : 0 - 0 (1 bit)
access : read-write

SEC1BB1 : page secure/non-secure attribution
bits : 1 - 1 (1 bit)
access : read-write

SEC1BB2 : page secure/non-secure attribution
bits : 2 - 2 (1 bit)
access : read-write

SEC1BB3 : page secure/non-secure attribution
bits : 3 - 3 (1 bit)
access : read-write

SEC1BB4 : page secure/non-secure attribution
bits : 4 - 4 (1 bit)
access : read-write

SEC1BB5 : page secure/non-secure attribution
bits : 5 - 5 (1 bit)
access : read-write

SEC1BB6 : page secure/non-secure attribution
bits : 6 - 6 (1 bit)
access : read-write

SEC1BB7 : page secure/non-secure attribution
bits : 7 - 7 (1 bit)
access : read-write

SEC1BB8 : page secure/non-secure attribution
bits : 8 - 8 (1 bit)
access : read-write

SEC1BB9 : page secure/non-secure attribution
bits : 9 - 9 (1 bit)
access : read-write

SEC1BB10 : page secure/non-secure attribution
bits : 10 - 10 (1 bit)
access : read-write

SEC1BB11 : page secure/non-secure attribution
bits : 11 - 11 (1 bit)
access : read-write

SEC1BB12 : page secure/non-secure attribution
bits : 12 - 12 (1 bit)
access : read-write

SEC1BB13 : page secure/non-secure attribution
bits : 13 - 13 (1 bit)
access : read-write

SEC1BB14 : page secure/non-secure attribution
bits : 14 - 14 (1 bit)
access : read-write

SEC1BB15 : page secure/non-secure attribution
bits : 15 - 15 (1 bit)
access : read-write

SEC1BB16 : page secure/non-secure attribution
bits : 16 - 16 (1 bit)
access : read-write

SEC1BB17 : page secure/non-secure attribution
bits : 17 - 17 (1 bit)
access : read-write

SEC1BB18 : page secure/non-secure attribution
bits : 18 - 18 (1 bit)
access : read-write

SEC1BB19 : page secure/non-secure attribution
bits : 19 - 19 (1 bit)
access : read-write

SEC1BB20 : page secure/non-secure attribution
bits : 20 - 20 (1 bit)
access : read-write

SEC1BB21 : page secure/non-secure attribution
bits : 21 - 21 (1 bit)
access : read-write

SEC1BB22 : page secure/non-secure attribution
bits : 22 - 22 (1 bit)
access : read-write

SEC1BB23 : page secure/non-secure attribution
bits : 23 - 23 (1 bit)
access : read-write

SEC1BB24 : page secure/non-secure attribution
bits : 24 - 24 (1 bit)
access : read-write

SEC1BB25 : page secure/non-secure attribution
bits : 25 - 25 (1 bit)
access : read-write

SEC1BB26 : page secure/non-secure attribution
bits : 26 - 26 (1 bit)
access : read-write

SEC1BB27 : page secure/non-secure attribution
bits : 27 - 27 (1 bit)
access : read-write

SEC1BB28 : page secure/non-secure attribution
bits : 28 - 28 (1 bit)
access : read-write

SEC1BB29 : page secure/non-secure attribution
bits : 29 - 29 (1 bit)
access : read-write

SEC1BB30 : page secure/non-secure attribution
bits : 30 - 30 (1 bit)
access : read-write

SEC1BB31 : page secure/non-secure attribution
bits : 31 - 31 (1 bit)
access : read-write

SEC1BB0 : page secure/non-secure attribution
bits : 0 - 0 (1 bit)
access : read-write

SEC1BB1 : page secure/non-secure attribution
bits : 1 - 1 (1 bit)
access : read-write

SEC1BB2 : page secure/non-secure attribution
bits : 2 - 2 (1 bit)
access : read-write

SEC1BB3 : page secure/non-secure attribution
bits : 3 - 3 (1 bit)
access : read-write

SEC1BB4 : page secure/non-secure attribution
bits : 4 - 4 (1 bit)
access : read-write

SEC1BB5 : page secure/non-secure attribution
bits : 5 - 5 (1 bit)
access : read-write

SEC1BB6 : page secure/non-secure attribution
bits : 6 - 6 (1 bit)
access : read-write

SEC1BB7 : page secure/non-secure attribution
bits : 7 - 7 (1 bit)
access : read-write

SEC1BB8 : page secure/non-secure attribution
bits : 8 - 8 (1 bit)
access : read-write

SEC1BB9 : page secure/non-secure attribution
bits : 9 - 9 (1 bit)
access : read-write

SEC1BB10 : page secure/non-secure attribution
bits : 10 - 10 (1 bit)
access : read-write

SEC1BB11 : page secure/non-secure attribution
bits : 11 - 11 (1 bit)
access : read-write

SEC1BB12 : page secure/non-secure attribution
bits : 12 - 12 (1 bit)
access : read-write

SEC1BB13 : page secure/non-secure attribution
bits : 13 - 13 (1 bit)
access : read-write

SEC1BB14 : page secure/non-secure attribution
bits : 14 - 14 (1 bit)
access : read-write

SEC1BB15 : page secure/non-secure attribution
bits : 15 - 15 (1 bit)
access : read-write

SEC1BB16 : page secure/non-secure attribution
bits : 16 - 16 (1 bit)
access : read-write

SEC1BB17 : page secure/non-secure attribution
bits : 17 - 17 (1 bit)
access : read-write

SEC1BB18 : page secure/non-secure attribution
bits : 18 - 18 (1 bit)
access : read-write

SEC1BB19 : page secure/non-secure attribution
bits : 19 - 19 (1 bit)
access : read-write

SEC1BB20 : page secure/non-secure attribution
bits : 20 - 20 (1 bit)
access : read-write

SEC1BB21 : page secure/non-secure attribution
bits : 21 - 21 (1 bit)
access : read-write

SEC1BB22 : page secure/non-secure attribution
bits : 22 - 22 (1 bit)
access : read-write

SEC1BB23 : page secure/non-secure attribution
bits : 23 - 23 (1 bit)
access : read-write

SEC1BB24 : page secure/non-secure attribution
bits : 24 - 24 (1 bit)
access : read-write

SEC1BB25 : page secure/non-secure attribution
bits : 25 - 25 (1 bit)
access : read-write

SEC1BB26 : page secure/non-secure attribution
bits : 26 - 26 (1 bit)
access : read-write

SEC1BB27 : page secure/non-secure attribution
bits : 27 - 27 (1 bit)
access : read-write

SEC1BB28 : page secure/non-secure attribution
bits : 28 - 28 (1 bit)
access : read-write

SEC1BB29 : page secure/non-secure attribution
bits : 29 - 29 (1 bit)
access : read-write

SEC1BB30 : page secure/non-secure attribution
bits : 30 - 30 (1 bit)
access : read-write

SEC1BB31 : page secure/non-secure attribution
bits : 31 - 31 (1 bit)
access : read-write

SEC2BB0 : page secure/non-secure attribution
bits : 0 - 0 (1 bit)
access : read-write

SEC2BB1 : page secure/non-secure attribution
bits : 1 - 1 (1 bit)
access : read-write

SEC2BB2 : page secure/non-secure attribution
bits : 2 - 2 (1 bit)
access : read-write

SEC2BB3 : page secure/non-secure attribution
bits : 3 - 3 (1 bit)
access : read-write

SEC2BB4 : page secure/non-secure attribution
bits : 4 - 4 (1 bit)
access : read-write

SEC2BB5 : page secure/non-secure attribution
bits : 5 - 5 (1 bit)
access : read-write

SEC2BB6 : page secure/non-secure attribution
bits : 6 - 6 (1 bit)
access : read-write

SEC2BB7 : page secure/non-secure attribution
bits : 7 - 7 (1 bit)
access : read-write

SEC2BB8 : page secure/non-secure attribution
bits : 8 - 8 (1 bit)
access : read-write

SEC2BB9 : page secure/non-secure attribution
bits : 9 - 9 (1 bit)
access : read-write

SEC2BB10 : page secure/non-secure attribution
bits : 10 - 10 (1 bit)
access : read-write

SEC2BB11 : page secure/non-secure attribution
bits : 11 - 11 (1 bit)
access : read-write

SEC2BB12 : page secure/non-secure attribution
bits : 12 - 12 (1 bit)
access : read-write

SEC2BB13 : page secure/non-secure attribution
bits : 13 - 13 (1 bit)
access : read-write

SEC2BB14 : page secure/non-secure attribution
bits : 14 - 14 (1 bit)
access : read-write

SEC2BB15 : page secure/non-secure attribution
bits : 15 - 15 (1 bit)
access : read-write

SEC2BB16 : page secure/non-secure attribution
bits : 16 - 16 (1 bit)
access : read-write

SEC2BB17 : page secure/non-secure attribution
bits : 17 - 17 (1 bit)
access : read-write

SEC2BB18 : page secure/non-secure attribution
bits : 18 - 18 (1 bit)
access : read-write

SEC2BB19 : page secure/non-secure attribution
bits : 19 - 19 (1 bit)
access : read-write

SEC2BB20 : page secure/non-secure attribution
bits : 20 - 20 (1 bit)
access : read-write

SEC2BB21 : page secure/non-secure attribution
bits : 21 - 21 (1 bit)
access : read-write

SEC2BB22 : page secure/non-secure attribution
bits : 22 - 22 (1 bit)
access : read-write

SEC2BB23 : page secure/non-secure attribution
bits : 23 - 23 (1 bit)
access : read-write

SEC2BB24 : page secure/non-secure attribution
bits : 24 - 24 (1 bit)
access : read-write

SEC2BB25 : page secure/non-secure attribution
bits : 25 - 25 (1 bit)
access : read-write

SEC2BB26 : page secure/non-secure attribution
bits : 26 - 26 (1 bit)
access : read-write

SEC2BB27 : page secure/non-secure attribution
bits : 27 - 27 (1 bit)
access : read-write

SEC2BB28 : page secure/non-secure attribution
bits : 28 - 28 (1 bit)
access : read-write

SEC2BB29 : page secure/non-secure attribution
bits : 29 - 29 (1 bit)
access : read-write

SEC2BB30 : page secure/non-secure attribution
bits : 30 - 30 (1 bit)
access : read-write

SEC2BB31 : page secure/non-secure attribution
bits : 31 - 31 (1 bit)
access : read-write

SEC2BB0 : page secure/non-secure attribution
bits : 0 - 0 (1 bit)
access : read-write

SEC2BB1 : page secure/non-secure attribution
bits : 1 - 1 (1 bit)
access : read-write

SEC2BB2 : page secure/non-secure attribution
bits : 2 - 2 (1 bit)
access : read-write

SEC2BB3 : page secure/non-secure attribution
bits : 3 - 3 (1 bit)
access : read-write

SEC2BB4 : page secure/non-secure attribution
bits : 4 - 4 (1 bit)
access : read-write

SEC2BB5 : page secure/non-secure attribution
bits : 5 - 5 (1 bit)
access : read-write

SEC2BB6 : page secure/non-secure attribution
bits : 6 - 6 (1 bit)
access : read-write

SEC2BB7 : page secure/non-secure attribution
bits : 7 - 7 (1 bit)
access : read-write

SEC2BB8 : page secure/non-secure attribution
bits : 8 - 8 (1 bit)
access : read-write

SEC2BB9 : page secure/non-secure attribution
bits : 9 - 9 (1 bit)
access : read-write

SEC2BB10 : page secure/non-secure attribution
bits : 10 - 10 (1 bit)
access : read-write

SEC2BB11 : page secure/non-secure attribution
bits : 11 - 11 (1 bit)
access : read-write

SEC2BB12 : page secure/non-secure attribution
bits : 12 - 12 (1 bit)
access : read-write

SEC2BB13 : page secure/non-secure attribution
bits : 13 - 13 (1 bit)
access : read-write

SEC2BB14 : page secure/non-secure attribution
bits : 14 - 14 (1 bit)
access : read-write

SEC2BB15 : page secure/non-secure attribution
bits : 15 - 15 (1 bit)
access : read-write

SEC2BB16 : page secure/non-secure attribution
bits : 16 - 16 (1 bit)
access : read-write

SEC2BB17 : page secure/non-secure attribution
bits : 17 - 17 (1 bit)
access : read-write

SEC2BB18 : page secure/non-secure attribution
bits : 18 - 18 (1 bit)
access : read-write

SEC2BB19 : page secure/non-secure attribution
bits : 19 - 19 (1 bit)
access : read-write

SEC2BB20 : page secure/non-secure attribution
bits : 20 - 20 (1 bit)
access : read-write

SEC2BB21 : page secure/non-secure attribution
bits : 21 - 21 (1 bit)
access : read-write

SEC2BB22 : page secure/non-secure attribution
bits : 22 - 22 (1 bit)
access : read-write

SEC2BB23 : page secure/non-secure attribution
bits : 23 - 23 (1 bit)
access : read-write

SEC2BB24 : page secure/non-secure attribution
bits : 24 - 24 (1 bit)
access : read-write

SEC2BB25 : page secure/non-secure attribution
bits : 25 - 25 (1 bit)
access : read-write

SEC2BB26 : page secure/non-secure attribution
bits : 26 - 26 (1 bit)
access : read-write

SEC2BB27 : page secure/non-secure attribution
bits : 27 - 27 (1 bit)
access : read-write

SEC2BB28 : page secure/non-secure attribution
bits : 28 - 28 (1 bit)
access : read-write

SEC2BB29 : page secure/non-secure attribution
bits : 29 - 29 (1 bit)
access : read-write

SEC2BB30 : page secure/non-secure attribution
bits : 30 - 30 (1 bit)
access : read-write

SEC2BB31 : page secure/non-secure attribution
bits : 31 - 31 (1 bit)
access : read-write