\n

GPIO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

MODER

IDR

ODR

BSRR

LCKR

AFRL

BRR

HSLVR

SECCFGR

OTYPER

OSPEEDR

PUPDR


MODER

GPIO port mode register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODER MODER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 MODE6 MODE7 MODE8 MODE9 MODE10 MODE11 MODE12 MODE13 MODE14 MODE15

MODE0 : Port x configuration bits (y = 0..15)
bits : 0 - 1 (2 bit)

MODE1 : Port x configuration bits (y = 0..15)
bits : 2 - 3 (2 bit)

MODE2 : Port x configuration bits (y = 0..15)
bits : 4 - 5 (2 bit)

MODE3 : Port x configuration bits (y = 0..15)
bits : 6 - 7 (2 bit)

MODE4 : Port x configuration bits (y = 0..15)
bits : 8 - 9 (2 bit)

MODE5 : Port x configuration bits (y = 0..15)
bits : 10 - 11 (2 bit)

MODE6 : Port x configuration bits (y = 0..15)
bits : 12 - 13 (2 bit)

MODE7 : Port x configuration bits (y = 0..15)
bits : 14 - 15 (2 bit)

MODE8 : Port x configuration bits (y = 0..15)
bits : 16 - 17 (2 bit)

MODE9 : Port x configuration bits (y = 0..15)
bits : 18 - 19 (2 bit)

MODE10 : Port x configuration bits (y = 0..15)
bits : 20 - 21 (2 bit)

MODE11 : Port x configuration bits (y = 0..15)
bits : 22 - 23 (2 bit)

MODE12 : Port x configuration bits (y = 0..15)
bits : 24 - 25 (2 bit)

MODE13 : Port x configuration bits (y = 0..15)
bits : 26 - 27 (2 bit)

MODE14 : Port x configuration bits (y = 0..15)
bits : 28 - 29 (2 bit)

MODE15 : Port x configuration bits (y = 0..15)
bits : 30 - 31 (2 bit)


IDR

GPIO port input data register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IDR IDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7

ID0 : Port input data (y = 0..7)
bits : 0 - 0 (1 bit)

ID1 : Port input data (y = 0..7)
bits : 1 - 1 (1 bit)

ID2 : Port input data (y = 0..7)
bits : 2 - 2 (1 bit)

ID3 : Port input data (y = 0..7)
bits : 3 - 3 (1 bit)

ID4 : Port input data (y = 0..7)
bits : 4 - 4 (1 bit)

ID5 : Port input data (y = 0..7)
bits : 5 - 5 (1 bit)

ID6 : Port input data (y = 0..7)
bits : 6 - 6 (1 bit)

ID7 : Port input data (y = 0..7)
bits : 7 - 7 (1 bit)


ODR

GPIO port output data register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODR ODR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OD0 OD1 OD2 OD3 OD4 OD5 OD6 OD7

OD0 : Port output data (y = 0..7)
bits : 0 - 0 (1 bit)

OD1 : Port output data (y = 0..7)
bits : 1 - 1 (1 bit)

OD2 : Port output data (y = 0..7)
bits : 2 - 2 (1 bit)

OD3 : Port output data (y = 0..7)
bits : 3 - 3 (1 bit)

OD4 : Port output data (y = 0..7)
bits : 4 - 4 (1 bit)

OD5 : Port output data (y = 0..7)
bits : 5 - 5 (1 bit)

OD6 : Port output data (y = 0..7)
bits : 6 - 6 (1 bit)

OD7 : Port output data (y = 0..7)
bits : 7 - 7 (1 bit)


BSRR

GPIO port bit set/reset register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BSRR BSRR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BS0 BS1 BS2 BS3 BS4 BS5 BS6 BS7 BR0 BR1 BR2 BR3 BR4 BR5 BR6 BR7

BS0 : Port x set bit y (y= 0..7)
bits : 0 - 0 (1 bit)

BS1 : Port x set bit y (y= 0..7)
bits : 1 - 1 (1 bit)

BS2 : Port x set bit y (y= 0..7)
bits : 2 - 2 (1 bit)

BS3 : Port x set bit y (y= 0..7)
bits : 3 - 3 (1 bit)

BS4 : Port x set bit y (y= 0..7)
bits : 4 - 4 (1 bit)

BS5 : Port x set bit y (y= 0..7)
bits : 5 - 5 (1 bit)

BS6 : Port x set bit y (y= 0..7)
bits : 6 - 6 (1 bit)

BS7 : Port x set bit y (y= 0..7)
bits : 7 - 7 (1 bit)

BR0 : Port x set bit y (y= 0..7)
bits : 16 - 16 (1 bit)

BR1 : Port x reset bit y (y = 0..7)
bits : 17 - 17 (1 bit)

BR2 : Port x reset bit y (y = 0..7)
bits : 18 - 18 (1 bit)

BR3 : Port x reset bit y (y = 0..7)
bits : 19 - 19 (1 bit)

BR4 : Port x reset bit y (y = 0..7)
bits : 20 - 20 (1 bit)

BR5 : Port x reset bit y (y = 0..7)
bits : 21 - 21 (1 bit)

BR6 : Port x reset bit y (y = 0..7)
bits : 22 - 22 (1 bit)

BR7 : Port x reset bit y (y = 0..7)
bits : 23 - 23 (1 bit)


LCKR

GPIO port configuration lock register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LCKR LCKR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LCK0 LCK1 LCK2 LCK3 LCK4 LCK5 LCK6 LCK7 LCKK

LCK0 : Port x lock bit y (y= 0..15)
bits : 0 - 0 (1 bit)

LCK1 : Port x lock bit y (y= 0..15)
bits : 1 - 1 (1 bit)

LCK2 : Port x lock bit y (y= 0..15)
bits : 2 - 2 (1 bit)

LCK3 : Port x lock bit y (y= 0..15)
bits : 3 - 3 (1 bit)

LCK4 : Port x lock bit y (y= 0..15)
bits : 4 - 4 (1 bit)

LCK5 : Port x lock bit y (y= 0..15)
bits : 5 - 5 (1 bit)

LCK6 : Port x lock bit y (y= 0..15)
bits : 6 - 6 (1 bit)

LCK7 : Port x lock bit y (y= 0..15)
bits : 7 - 7 (1 bit)

LCKK : Lock key
bits : 16 - 16 (1 bit)


AFRL

GPIO alternate function low register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AFRL AFRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AFSEL0 AFSEL1 AFSEL2 AFSEL3 AFSEL4 AFSEL5 AFSEL6 AFSEL7

AFSEL0 : Alternate function selection for port x bit y (y = 0..7)
bits : 0 - 3 (4 bit)

AFSEL1 : Alternate function selection for port x bit y (y = 0..7)
bits : 4 - 7 (4 bit)

AFSEL2 : Alternate function selection for port x bit y (y = 0..7)
bits : 8 - 11 (4 bit)

AFSEL3 : Alternate function selection for port x bit y (y = 0..7)
bits : 12 - 15 (4 bit)

AFSEL4 : Alternate function selection for port x bit y (y = 0..7)
bits : 16 - 19 (4 bit)

AFSEL5 : Alternate function selection for port x bit y (y = 0..7)
bits : 20 - 23 (4 bit)

AFSEL6 : Alternate function selection for port x bit y (y = 0..7)
bits : 24 - 27 (4 bit)

AFSEL7 : Alternate function selection for port x bit y (y = 0..7)
bits : 28 - 31 (4 bit)


BRR

GPIO port bit reset register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BRR BRR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BR0 BR1 BR2 BR3 BR4 BR5 BR6 BR7

BR0 : Port x reset IO pin y
bits : 0 - 0 (1 bit)

BR1 : Port x reset IO pin y
bits : 1 - 1 (1 bit)

BR2 : Port x reset IO pin y
bits : 2 - 2 (1 bit)

BR3 : Port x reset IO pin y
bits : 3 - 3 (1 bit)

BR4 : Port x reset IO pin y
bits : 4 - 4 (1 bit)

BR5 : Port x reset IO pin y
bits : 5 - 5 (1 bit)

BR6 : Port x reset IO pin y
bits : 6 - 6 (1 bit)

BR7 : Port x reset IO pin y
bits : 7 - 7 (1 bit)


HSLVR

GPIO high-speed low-voltage register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HSLVR HSLVR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HSLV0 HSLV1 HSLV2 HSLV3 HSLV4 HSLV5 HSLV6 HSLV7

HSLV0 : Port x high-speed low-voltage configuration (y= 7 to 0)
bits : 0 - 0 (1 bit)

HSLV1 : Port x high-speed low-voltage configuration (y= 7 to 0)
bits : 1 - 1 (1 bit)

HSLV2 : Port x high-speed low-voltage configuration (y= 7 to 0)
bits : 2 - 2 (1 bit)

HSLV3 : Port x high-speed low-voltage configuration (y= 7 to 0)
bits : 3 - 3 (1 bit)

HSLV4 : Port x high-speed low-voltage configuration (y= 7 to 0)
bits : 4 - 4 (1 bit)

HSLV5 : Port x high-speed low-voltage configuration (y= 7 to 0)
bits : 5 - 5 (1 bit)

HSLV6 : Port x high-speed low-voltage configuration (y= 7 to 0)
bits : 6 - 6 (1 bit)

HSLV7 : Port x high-speed low-voltage configuration (y= 7 to 0)
bits : 7 - 7 (1 bit)


SECCFGR

GPIO secure configuration register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

SECCFGR SECCFGR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SEC0 SEC1 SEC2 SEC3 SEC4 SEC5 SEC6 SEC7

SEC0 : I/O pin of Port x secure bit enable
bits : 0 - 0 (1 bit)

SEC1 : I/O pin of Port x secure bit enable
bits : 1 - 1 (1 bit)

SEC2 : I/O pin of Port x secure bit enable
bits : 2 - 2 (1 bit)

SEC3 : I/O pin of Port x secure bit enable
bits : 3 - 3 (1 bit)

SEC4 : I/O pin of Port x secure bit enable
bits : 4 - 4 (1 bit)

SEC5 : I/O pin of Port x secure bit enable
bits : 5 - 5 (1 bit)

SEC6 : I/O pin of Port x secure bit enable
bits : 6 - 6 (1 bit)

SEC7 : I/O pin of Port x secure bit enable
bits : 7 - 7 (1 bit)


OTYPER

GPIO port output type register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OTYPER OTYPER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OT0 OT1 OT2 OT3 OT4 OT5 OT6 OT7 OT8 OT9 OT10 OT11 OT12 OT13 OT14 OT15

OT0 : Port x configuration bits (y = 0..15)
bits : 0 - 0 (1 bit)

OT1 : Port x configuration bits (y = 0..15)
bits : 1 - 1 (1 bit)

OT2 : Port x configuration bits (y = 0..15)
bits : 2 - 2 (1 bit)

OT3 : Port x configuration bits (y = 0..15)
bits : 3 - 3 (1 bit)

OT4 : Port x configuration bits (y = 0..15)
bits : 4 - 4 (1 bit)

OT5 : Port x configuration bits (y = 0..15)
bits : 5 - 5 (1 bit)

OT6 : Port x configuration bits (y = 0..15)
bits : 6 - 6 (1 bit)

OT7 : Port x configuration bits (y = 0..15)
bits : 7 - 7 (1 bit)

OT8 : Port x configuration bits (y = 0..15)
bits : 8 - 8 (1 bit)

OT9 : Port x configuration bits (y = 0..15)
bits : 9 - 9 (1 bit)

OT10 : Port x configuration bits (y = 0..15)
bits : 10 - 10 (1 bit)

OT11 : Port x configuration bits (y = 0..15)
bits : 11 - 11 (1 bit)

OT12 : Port x configuration bits (y = 0..15)
bits : 12 - 12 (1 bit)

OT13 : Port x configuration bits (y = 0..15)
bits : 13 - 13 (1 bit)

OT14 : Port x configuration bits (y = 0..15)
bits : 14 - 14 (1 bit)

OT15 : Port x configuration bits (y = 0..15)
bits : 15 - 15 (1 bit)


OSPEEDR

GPIO port output speed register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSPEEDR OSPEEDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OSPEED0 OSPEED1 OSPEED2 OSPEED3 OSPEED4 OSPEED5 OSPEED6 OSPEED7

OSPEED0 : Port x configuration bits (y =7 .. 0)
bits : 0 - 1 (2 bit)

OSPEED1 : Port x configuration bits (y =7 .. 0)
bits : 2 - 3 (2 bit)

OSPEED2 : Port x configuration bits (y =7 .. 0)
bits : 4 - 5 (2 bit)

OSPEED3 : Port x configuration bits (y =7 .. 0)
bits : 6 - 7 (2 bit)

OSPEED4 : Port x configuration bits (y =7 .. 0)
bits : 8 - 9 (2 bit)

OSPEED5 : Port x configuration bits (y =7 .. 0)
bits : 10 - 11 (2 bit)

OSPEED6 : Port x configuration bits (y =7 .. 0)
bits : 12 - 13 (2 bit)

OSPEED7 : Port x configuration bits (y =7 .. 0)
bits : 14 - 15 (2 bit)


PUPDR

GPIO port pull-up/pull-down register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUPDR PUPDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PUPD0 PUPD1 PUPD2 PUPD3 PUPD4 PUPD5 PUPD6 PUPD7

PUPD0 : Port x configuration bits (y =7 .. 0)
bits : 0 - 1 (2 bit)

PUPD1 : Port x configuration bits (y =7 .. 0)
bits : 2 - 3 (2 bit)

PUPD2 : Port x configuration bits (y =7 .. 0)
bits : 4 - 5 (2 bit)

PUPD3 : Port x configuration bits (y =7 .. 0)
bits : 6 - 7 (2 bit)

PUPD4 : Port x configuration bits (y =7 .. 0)
bits : 8 - 9 (2 bit)

PUPD5 : Port x configuration bits (y =7 .. 0)
bits : 10 - 11 (2 bit)

PUPD6 : Port x configuration bits (y =7 .. 0)
bits : 12 - 13 (2 bit)

PUPD7 : Port x configuration bits (y =7 .. 0)
bits : 14 - 15 (2 bit)



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.