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GTZC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

IER1

SR1

SR2

SR3

SR4

FCR1

FCR2

FCR3

FCR4

IER2

IER3

IER4


IER1

TZIC interrupt enable register 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IER1 IER1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM2IE TIM3IE TIM4IE TIM5IE TIM6IE TIM7IE WWDGIE IWDGIE SPI2IE USART2IE USART3IE USART4IE UART5IE I2C1IE I2C2IE CRSIE I2C4IE LPTIM2IE FDCAN1IE UCPD1IE

TIM2IE : TIM2IE
bits : 0 - 0 (1 bit)

TIM3IE : TIM3IE
bits : 1 - 1 (1 bit)

TIM4IE : TIM4IE
bits : 2 - 2 (1 bit)

TIM5IE : TIM5IE
bits : 3 - 3 (1 bit)

TIM6IE : TIM6IE
bits : 4 - 4 (1 bit)

TIM7IE : TIM7IE
bits : 5 - 5 (1 bit)

WWDGIE : WWDGIE
bits : 6 - 6 (1 bit)

IWDGIE : IWDGIE
bits : 7 - 7 (1 bit)

SPI2IE : SPI2IE
bits : 8 - 8 (1 bit)

USART2IE : illegal access interrupt enable for USART2
bits : 9 - 9 (1 bit)

USART3IE : illegal access interrupt enable for USART3
bits : 10 - 10 (1 bit)

USART4IE : illegal access interrupt enable for UART4
bits : 11 - 11 (1 bit)

UART5IE : illegal access interrupt enable for UART5
bits : 12 - 12 (1 bit)

I2C1IE : illegal access interrupt enable for I2C1
bits : 13 - 13 (1 bit)

I2C2IE : illegal access interrupt enable for I2C2
bits : 14 - 14 (1 bit)

CRSIE : illegal access interrupt enable for CRS
bits : 15 - 15 (1 bit)

I2C4IE : illegal access interrupt enable for I2C4
bits : 16 - 16 (1 bit)

LPTIM2IE : illegal access interrupt enable for LPTIM2
bits : 17 - 17 (1 bit)

FDCAN1IE : illegal access interrupt enable for FDCAN1
bits : 18 - 18 (1 bit)

UCPD1IE : illegal access interrupt enable for UCPD1
bits : 19 - 19 (1 bit)


SR1

TZIC status register 1
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SR1 SR1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM2F TIM3F TIM4F TIM5F TIM6F TIM7F WWDGF IWDGF SPI2F USART2F USART3F UART4F UART5F I2C1F I2C2F CRSF I2C4F LPTIM2F FDCAN1F UCPD1F

TIM2F : illegal access flag for TIM2
bits : 0 - 0 (1 bit)

TIM3F : illegal access flag for TIM3
bits : 1 - 1 (1 bit)

TIM4F : illegal access flag for TIM4
bits : 2 - 2 (1 bit)

TIM5F : illegal access flag for TIM5
bits : 3 - 3 (1 bit)

TIM6F : illegal access flag for TIM6
bits : 4 - 4 (1 bit)

TIM7F : illegal access flag for TIM7
bits : 5 - 5 (1 bit)

WWDGF : illegal access flag for WWDG
bits : 6 - 6 (1 bit)

IWDGF : illegal access flag for IWDG
bits : 7 - 7 (1 bit)

SPI2F : illegal access flag for SPI2
bits : 8 - 8 (1 bit)

USART2F : illegal access flag for USART2
bits : 9 - 9 (1 bit)

USART3F : illegal access flag for USART3
bits : 10 - 10 (1 bit)

UART4F : illegal access flag for UART4
bits : 11 - 11 (1 bit)

UART5F : illegal access flag for UART5
bits : 12 - 12 (1 bit)

I2C1F : illegal access flag for I2C1
bits : 13 - 13 (1 bit)

I2C2F : illegal access flag for I2C2
bits : 14 - 14 (1 bit)

CRSF : illegal access flag for CRS
bits : 15 - 15 (1 bit)

I2C4F : illegal access flag for I2C4
bits : 16 - 16 (1 bit)

LPTIM2F : illegal access flag for LPTIM2
bits : 17 - 17 (1 bit)

FDCAN1F : illegal access flag for FDCAN1
bits : 18 - 18 (1 bit)

UCPD1F : illegal access flag for UCPD1
bits : 19 - 19 (1 bit)


SR2

TZIC status register 2
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SR2 SR2 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM1F SPI1F TIM8F USART1F TIM15F TIM16F TIM17F SAI1F SAI2F

TIM1F : illegal access flag for TIM1
bits : 0 - 0 (1 bit)

SPI1F : illegal access flag for SPI1
bits : 1 - 1 (1 bit)

TIM8F : illegal access flag for TIM8
bits : 2 - 2 (1 bit)

USART1F : illegal access flag for USART1
bits : 3 - 3 (1 bit)

TIM15F : illegal access flag for TIM5
bits : 4 - 4 (1 bit)

TIM16F : illegal access flag for TIM6
bits : 5 - 5 (1 bit)

TIM17F : illegal access flag for TIM7
bits : 6 - 6 (1 bit)

SAI1F : illegal access flag for SAI1
bits : 7 - 7 (1 bit)

SAI2F : illegal access flag for SAI2
bits : 8 - 8 (1 bit)


SR3

TZIC status register 3
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SR3 SR3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MDF1F CORDICF FMACF CRCF TSCF DMA2DF ICACHEF DCACHEF ADC1F DCMIF OTGFSF AESF HASHF RNGF PKAF SAESF OCTOSPIMF SDMMC1F SDMMC2F FSMCF OCTOSPI1F OCTOSPI2F RAMCFGF

MDF1F : illegal access flag for MDF1
bits : 0 - 0 (1 bit)

CORDICF : illegal access flag for CORDIC
bits : 1 - 1 (1 bit)

FMACF : illegal access flag for FMAC
bits : 2 - 2 (1 bit)

CRCF : illegal access flag for CRC
bits : 3 - 3 (1 bit)

TSCF : illegal access flag for TSC
bits : 4 - 4 (1 bit)

DMA2DF : illegal access flag for register of DMA2D
bits : 5 - 5 (1 bit)

ICACHEF : illegal access flag for ICACHE registers
bits : 6 - 6 (1 bit)

DCACHEF : illegal access flag for DCACHE registers
bits : 7 - 7 (1 bit)

ADC1F : illegal access flag for ADC1
bits : 8 - 8 (1 bit)

DCMIF : illegal access flag for DCMI
bits : 9 - 9 (1 bit)

OTGFSF : illegal access flag for OTG_FS
bits : 10 - 10 (1 bit)

AESF : illegal access flag for AES
bits : 11 - 11 (1 bit)

HASHF : illegal access flag for HASH
bits : 12 - 12 (1 bit)

RNGF : illegal access flag for RNG
bits : 13 - 13 (1 bit)

PKAF : illegal access flag for PKA
bits : 14 - 14 (1 bit)

SAESF : illegal access flag for SAES
bits : 15 - 15 (1 bit)

OCTOSPIMF : illegal access flag for OCTOSPIM
bits : 16 - 16 (1 bit)

SDMMC1F : illegal access flag for SDMMC2
bits : 17 - 17 (1 bit)

SDMMC2F : illegal access flag for SDMMC1
bits : 18 - 18 (1 bit)

FSMCF : illegal access flag for FSMC registers
bits : 19 - 19 (1 bit)

OCTOSPI1F : illegal access flag for OCTOSPI1 registers
bits : 20 - 20 (1 bit)

OCTOSPI2F : illegal access flag for OCTOSPI2 registers
bits : 21 - 21 (1 bit)

RAMCFGF : illegal access flag for RAMCFG
bits : 22 - 22 (1 bit)


SR4

TZIC status register 4
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SR4 SR4 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPDMA1F FLASHF FLASH_REGF OTFDEC1F OTFDEC2F TZSC1F TZIC1F OCTOSPI1_MEMF FSMC_MEMF BKPSRAMF OCTOSPI2_MEMF SRAM1F MPCBB1_REGF SRAM2F MPCBB2_REGF SRAM3F MPCBB3_REGF

GPDMA1F : illegal access flag for GPDMA1
bits : 0 - 0 (1 bit)

FLASHF : illegal access flag for FLASH memory
bits : 1 - 1 (1 bit)

FLASH_REGF : illegal access flag for FLASH registers
bits : 2 - 2 (1 bit)

OTFDEC1F : illegal access flag for OTFDEC1
bits : 3 - 3 (1 bit)

OTFDEC2F : illegal access flag for OTFDEC2
bits : 4 - 4 (1 bit)

TZSC1F : illegal access flag for GTZC1 TZSC registers
bits : 14 - 14 (1 bit)

TZIC1F : illegal access flag for GTZC1 TZIC registers
bits : 15 - 15 (1 bit)

OCTOSPI1_MEMF : illegal access flag for MPCWM1 (OCTOSPI1) memory bank
bits : 16 - 16 (1 bit)

FSMC_MEMF : illegal access flag for MPCWM2 (FSMC NAND) and MPCWM3 (FSMC NOR)
bits : 17 - 17 (1 bit)

BKPSRAMF : illegal access flag for MPCWM3 (BKPSRAM) memory bank
bits : 18 - 18 (1 bit)

OCTOSPI2_MEMF : illegal access flag for OCTOSPI2 memory bank
bits : 19 - 19 (1 bit)

SRAM1F : illegal access flag for SRAM1
bits : 24 - 24 (1 bit)

MPCBB1_REGF : illegal access flag for MPCBB1 registers
bits : 25 - 25 (1 bit)

SRAM2F : illegal access flag for SRAM2
bits : 26 - 26 (1 bit)

MPCBB2_REGF : illegal access flag for MPCBB2 registers
bits : 27 - 27 (1 bit)

SRAM3F : illegal access flag for SRAM3
bits : 28 - 28 (1 bit)

MPCBB3_REGF : illegal access flag for MPCBB3 registers
bits : 29 - 29 (1 bit)


FCR1

TZIC flag clear register 1
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FCR1 FCR1 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTIM2F CTIM3F CTIM4F CTIM5F CTIM6F CTIM7F CWWDGF CIWDGF CSPI2F CUSART2F CUSART3F CUART4F CUART5F CI2C1F CI2C2F CCRSF CI2C4F CLPTIM2F CFDCAN1F CUCPD1F

CTIM2F : clear the illegal access flag for TIM2
bits : 0 - 0 (1 bit)

CTIM3F : clear the illegal access flag for TIM3
bits : 1 - 1 (1 bit)

CTIM4F : clear the illegal access flag for TIM4
bits : 2 - 2 (1 bit)

CTIM5F : clear the illegal access flag for TIM5
bits : 3 - 3 (1 bit)

CTIM6F : clear the illegal access flag for TIM6
bits : 4 - 4 (1 bit)

CTIM7F : clear the illegal access flag for TIM7
bits : 5 - 5 (1 bit)

CWWDGF : clear the illegal access flag for WWDG
bits : 6 - 6 (1 bit)

CIWDGF : clear the illegal access flag for IWDG
bits : 7 - 7 (1 bit)

CSPI2F : clear the illegal access flag for SPI2
bits : 8 - 8 (1 bit)

CUSART2F : clear the illegal access flag for USART2
bits : 9 - 9 (1 bit)

CUSART3F : clear the illegal access flag for USART3
bits : 10 - 10 (1 bit)

CUART4F : clear the illegal access flag for UART4
bits : 11 - 11 (1 bit)

CUART5F : clear the illegal access flag for UART5
bits : 12 - 12 (1 bit)

CI2C1F : clear the illegal access flag for I2C1
bits : 13 - 13 (1 bit)

CI2C2F : clear the illegal access flag for I2C2
bits : 14 - 14 (1 bit)

CCRSF : clear the illegal access flag for CRS
bits : 15 - 15 (1 bit)

CI2C4F : clear the illegal access flag for I2C4
bits : 16 - 16 (1 bit)

CLPTIM2F : clear the illegal access flag for LPTIM2
bits : 17 - 17 (1 bit)

CFDCAN1F : clear the illegal access flag for FDCAN1
bits : 18 - 18 (1 bit)

CUCPD1F : clear the illegal access flag for UCPD1
bits : 19 - 19 (1 bit)


FCR2

TZIC flag clear register 2
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FCR2 FCR2 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTIM1F CSPI1F CTIM8F CUSART1F CTIM15F CTIM16F CTIM17F CSAI1F CSAI2F

CTIM1F : clear the illegal access flag for TIM1
bits : 0 - 0 (1 bit)

CSPI1F : clear the illegal access flag for SPI1
bits : 1 - 1 (1 bit)

CTIM8F : clear the illegal access flag for TIM8
bits : 2 - 2 (1 bit)

CUSART1F : clear the illegal access flag for USART1
bits : 3 - 3 (1 bit)

CTIM15F : clear the illegal access flag for TIM5
bits : 4 - 4 (1 bit)

CTIM16F : clear the illegal access flag for TIM6
bits : 5 - 5 (1 bit)

CTIM17F : clear the illegal access flag for TIM7
bits : 6 - 6 (1 bit)

CSAI1F : clear the illegal access flag for SAI1
bits : 7 - 7 (1 bit)

CSAI2F : clear the illegal access flag for SAI2
bits : 8 - 8 (1 bit)


FCR3

TZIC flag clear register 3
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FCR3 FCR3 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CMDF1F CCORDICF CFMACF CCRCF CTSCF CDMA2DF CICACHEF CDCACHEF CADC1F CDCMIF COTGFSF CAESF CHASHF CRNGF CPKAF CSAESF COCTOSPIMF CSDMMC1F CSDMMC2F CFSMCF COCTOSPI1F COCTOSPI2F CRAMCFGF

CMDF1F : clear the illegal access flag for MDF1
bits : 0 - 0 (1 bit)

CCORDICF : clear the illegal access flag for CORDIC
bits : 1 - 1 (1 bit)

CFMACF : clear the illegal access flag for FMAC
bits : 2 - 2 (1 bit)

CCRCF : clear the illegal access flag for CRC
bits : 3 - 3 (1 bit)

CTSCF : clear the illegal access flag for TSC
bits : 4 - 4 (1 bit)

CDMA2DF : clear the illegal access flag for register of DMA2D
bits : 5 - 5 (1 bit)

CICACHEF : clear the illegal access flag for ICACHE registers
bits : 6 - 6 (1 bit)

CDCACHEF : clear the illegal access flag for DCACHE registers
bits : 7 - 7 (1 bit)

CADC1F : clear the illegal access flag for ADC1
bits : 8 - 8 (1 bit)

CDCMIF : clear the illegal access flag for DCMI
bits : 9 - 9 (1 bit)

COTGFSF : clear the illegal access flag for OTG_FS
bits : 10 - 10 (1 bit)

CAESF : clear the illegal access flag for AES
bits : 11 - 11 (1 bit)

CHASHF : clear the illegal access flag for HASH
bits : 12 - 12 (1 bit)

CRNGF : clear the illegal access flag for RNG
bits : 13 - 13 (1 bit)

CPKAF : clear the illegal access flag for PKA
bits : 14 - 14 (1 bit)

CSAESF : clear the illegal access flag for SAES
bits : 15 - 15 (1 bit)

COCTOSPIMF : clear the illegal access flag for OCTOSPIM
bits : 16 - 16 (1 bit)

CSDMMC1F : clear the illegal access flag for SDMMC2
bits : 17 - 17 (1 bit)

CSDMMC2F : clear the illegal access flag for SDMMC1
bits : 18 - 18 (1 bit)

CFSMCF : clear the illegal access flag for FSMC registers
bits : 19 - 19 (1 bit)

COCTOSPI1F : clear the illegal access flag for OCTOSPI1 registers
bits : 20 - 20 (1 bit)

COCTOSPI2F : clear the illegal access flag for OCTOSPI2 registers
bits : 21 - 21 (1 bit)

CRAMCFGF : clear the illegal access flag for RAMCFG
bits : 22 - 22 (1 bit)


FCR4

TZIC flag clear register 3
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

FCR4 FCR4 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CGPDMA1F CFLASHF CFLASH_REGF COTFDEC1F COTFDEC2F CTZSC1F CTZIC1F COCTOSPI1_MEMF CFSMC_MEMF CBKPSRAMF COCTOSPI2_MEMF CSRAM1F CMPCBB1_REGF CSRAM2F CMPCBB2_REGF CSRAM3F CMPCBB3_REGF

CGPDMA1F : clear the illegal access flag for GPDMA1
bits : 0 - 0 (1 bit)

CFLASHF : clear the illegal access flag for FLASH memory
bits : 1 - 1 (1 bit)

CFLASH_REGF : clear the illegal access flag for FLASH registers
bits : 2 - 2 (1 bit)

COTFDEC1F : clear the illegal access flag for OTFDEC1
bits : 3 - 3 (1 bit)

COTFDEC2F : clear the illegal access flag for OTFDEC2
bits : 4 - 4 (1 bit)

CTZSC1F : clear the illegal access flag for GTZC1 TZSC registers
bits : 14 - 14 (1 bit)

CTZIC1F : clear the illegal access flag for GTZC1 TZIC registers
bits : 15 - 15 (1 bit)

COCTOSPI1_MEMF : clear the illegal access flag for MPCWM1 (OCTOSPI1) memory bank
bits : 16 - 16 (1 bit)

CFSMC_MEMF : clear the illegal access flag for MPCWM2 (FSMC NAND) and MPCWM3
bits : 17 - 17 (1 bit)

CBKPSRAMF : clear the illegal access flag for MPCWM3 (BKPSRAM) memory bank
bits : 18 - 18 (1 bit)

COCTOSPI2_MEMF : clear the illegal access flag for OCTOSPI2 memory bank
bits : 19 - 19 (1 bit)

CSRAM1F : clear the illegal access flag for SRAM1
bits : 24 - 24 (1 bit)

CMPCBB1_REGF : clear the illegal access flag for MPCBB1 registers
bits : 25 - 25 (1 bit)

CSRAM2F : clear the illegal access flag for SRAM2
bits : 26 - 26 (1 bit)

CMPCBB2_REGF : clear the illegal access flag for MPCBB2 registers
bits : 27 - 27 (1 bit)

CSRAM3F : clear the illegal access flag for SRAM3
bits : 28 - 28 (1 bit)

CMPCBB3_REGF : clear the illegal access flag for MPCBB3 registers
bits : 29 - 29 (1 bit)


IER2

TZIC interrupt enable register 2
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IER2 IER2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIM1IE SPI1IE TIM8IE USART1IE TIM15IE TIM16IE TIM17IE SAI1IE SAI2IE

TIM1IE : illegal access interrupt enable for TIM1
bits : 0 - 0 (1 bit)

SPI1IE : illegal access interrupt enable for SPI1
bits : 1 - 1 (1 bit)

TIM8IE : illegal access interrupt enable for TIM8
bits : 2 - 2 (1 bit)

USART1IE : illegal access interrupt enable for USART1
bits : 3 - 3 (1 bit)

TIM15IE : illegal access interrupt enable for TIM5
bits : 4 - 4 (1 bit)

TIM16IE : illegal access interrupt enable for TIM6
bits : 5 - 5 (1 bit)

TIM17IE : illegal access interrupt enable for TIM7
bits : 6 - 6 (1 bit)

SAI1IE : illegal access interrupt enable for SAI1
bits : 7 - 7 (1 bit)

SAI2IE : illegal access interrupt enable for SAI2
bits : 8 - 8 (1 bit)


IER3

TZIC interrupt enable register 3
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IER3 IER3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MDF1IE CORDICIE FMACIE CRCIE TSCIE DMA2DIE ICACHEIE DCACHEIE ADC1IE DCMIIE OTGFSIE AESIE HASHIE RNGIE PKAIE SAESIE OCTOSPIMIE SDMMC1IE SDMMC2IE FSMCIE OCTOSPI1IE OCTOSPI2IE RAMCFGIE

MDF1IE : illegal access interrupt enable for MDF1
bits : 0 - 0 (1 bit)

CORDICIE : illegal access interrupt enable for CORDIC
bits : 1 - 1 (1 bit)

FMACIE : illegal access interrupt enable for FMAC
bits : 2 - 2 (1 bit)

CRCIE : illegal access interrupt enable for CRC
bits : 3 - 3 (1 bit)

TSCIE : illegal access interrupt enable for TSC
bits : 4 - 4 (1 bit)

DMA2DIE : illegal access interrupt enable for register of DMA2D
bits : 5 - 5 (1 bit)

ICACHEIE : illegal access interrupt enable for ICACHE registers
bits : 6 - 6 (1 bit)

DCACHEIE : illegal access interrupt enable for DCACHE registers
bits : 7 - 7 (1 bit)

ADC1IE : illegal access interrupt enable for ADC1
bits : 8 - 8 (1 bit)

DCMIIE : illegal access interrupt enable for DCMI
bits : 9 - 9 (1 bit)

OTGFSIE : illegal access interrupt enable for OTG_FS
bits : 10 - 10 (1 bit)

AESIE : illegal access interrupt enable for AES
bits : 11 - 11 (1 bit)

HASHIE : illegal access interrupt enable for HASH
bits : 12 - 12 (1 bit)

RNGIE : illegal access interrupt enable for RNG
bits : 13 - 13 (1 bit)

PKAIE : illegal access interrupt enable for PKA
bits : 14 - 14 (1 bit)

SAESIE : illegal access interrupt enable for SAES
bits : 15 - 15 (1 bit)

OCTOSPIMIE : illegal access interrupt enable for OCTOSPIM
bits : 16 - 16 (1 bit)

SDMMC1IE : illegal access interrupt enable for SDMMC2
bits : 17 - 17 (1 bit)

SDMMC2IE : illegal access interrupt enable for SDMMC1
bits : 18 - 18 (1 bit)

FSMCIE : illegal access interrupt enable for FSMC registers
bits : 19 - 19 (1 bit)

OCTOSPI1IE : illegal access interrupt enable for OCTOSPI1 registers
bits : 20 - 20 (1 bit)

OCTOSPI2IE : illegal access interrupt enable for OCTOSPI2 registers
bits : 21 - 21 (1 bit)

RAMCFGIE : illegal access interrupt enable for RAMCFG
bits : 22 - 22 (1 bit)


IER4

TZIC interrupt enable register 4
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IER4 IER4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPDMA1IE FLASHIE FLASH_REGIE OTFDEC1IE OTFDEC2IE TZSC1IE TZIC1IE OCTOSPI1_MEMIE FSMC_MEMIE BKPSRAMIE OCTOSPI2_MEMIE SRAM1IE MPCBB1_REGIE SRAM2IE MPCBB2_REGIE SRAM3IE MPCBB3_REGIE

GPDMA1IE : illegal access interrupt enable for GPDMA1
bits : 0 - 0 (1 bit)

FLASHIE : illegal access interrupt enable for FLASH memory
bits : 1 - 1 (1 bit)

FLASH_REGIE : illegal access interrupt enable for FLASH registers
bits : 2 - 2 (1 bit)

OTFDEC1IE : illegal access interrupt enable for OTFDEC1
bits : 3 - 3 (1 bit)

OTFDEC2IE : illegal access interrupt enable for OTFDEC2
bits : 4 - 4 (1 bit)

TZSC1IE : illegal access interrupt enable for GTZC1 TZSC registers
bits : 14 - 14 (1 bit)

TZIC1IE : illegal access interrupt enable for GTZC1 TZIC registers
bits : 15 - 15 (1 bit)

OCTOSPI1_MEMIE : illegal access interrupt enable for MPCWM1 (OCTOSPI1) memory bank
bits : 16 - 16 (1 bit)

FSMC_MEMIE : illegal access interrupt enable for MPCWM2 (FSMC NAND) and MPCWM3
bits : 17 - 17 (1 bit)

BKPSRAMIE : illegal access interrupt enable for MPCWM3 (BKPSRAM) memory bank
bits : 18 - 18 (1 bit)

OCTOSPI2_MEMIE : illegal access interrupt enable for OCTOSPI2 memory bank
bits : 19 - 19 (1 bit)

SRAM1IE : illegal access interrupt enable for SRAM1
bits : 24 - 24 (1 bit)

MPCBB1_REGIE : illegal access interrupt enable for MPCBB1 registers
bits : 25 - 25 (1 bit)

SRAM2IE : illegal access interrupt enable for SRAM2
bits : 26 - 26 (1 bit)

MPCBB2_REGIE : illegal access interrupt enable for MPCBB2 registers
bits : 27 - 27 (1 bit)

SRAM3IE : illegal access interrupt enable for SRAM3
bits : 28 - 28 (1 bit)

MPCBB3_REGIE : illegal access interrupt enable for MPCBB3 registers
bits : 29 - 29 (1 bit)



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