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GTZC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

TZSC_CR

TZSC_SECCFGR1

TZSC_PRIVCFGR1


TZSC_CR

TZSC control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TZSC_CR TZSC_CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LCK

LCK : lock the configuration of GTZC1_TZSC_SECCFGRx and GTZC1_TZSC_PRIVCFGRx registers until next reset
bits : 0 - 0 (1 bit)


TZSC_SECCFGR1

TZSC secure configuration register 1
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TZSC_SECCFGR1 TZSC_SECCFGR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SPI3SEC LPUART1SEC I2C3SEC LPTIM1SEC LPTIM3SEC LPTIM4SEC OPAMPSEC COMPSEC ADC4SEC VREFBUFSEC DAC1SEC ADF1SEC

SPI3SEC : secure access mode for SPI3
bits : 0 - 0 (1 bit)

LPUART1SEC : secure access mode for LPUART1
bits : 1 - 1 (1 bit)

I2C3SEC : secure access mode for I2C3
bits : 2 - 2 (1 bit)

LPTIM1SEC : secure access mode for LPTIM1
bits : 3 - 3 (1 bit)

LPTIM3SEC : secure access mode for LPTIM3
bits : 4 - 4 (1 bit)

LPTIM4SEC : secure access mode for LPTIM4
bits : 5 - 5 (1 bit)

OPAMPSEC : secure access mode for OPAMP
bits : 6 - 6 (1 bit)

COMPSEC : secure access mode for COMP
bits : 7 - 7 (1 bit)

ADC4SEC : secure access mode for ADC4
bits : 8 - 8 (1 bit)

VREFBUFSEC : secure access mode for VREFBUF
bits : 9 - 9 (1 bit)

DAC1SEC : secure access mode for DAC1
bits : 11 - 11 (1 bit)

ADF1SEC : secure access mode for ADF1
bits : 12 - 12 (1 bit)


TZSC_PRIVCFGR1

TZSC privilege configuration register 1
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TZSC_PRIVCFGR1 TZSC_PRIVCFGR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SPI3PRIV LPUART1PRIV I2C3PRIV LPTIM1PRIV LPTIM3PRIV LPTIM4PRIV OPAMPPRIV COMPPRIV ADC4PRIV VREFBUFPRIV DAC1PRIV ADF1PRIV

SPI3PRIV : privileged access mode for SPI3
bits : 0 - 0 (1 bit)

LPUART1PRIV : privileged access mode for LPUART1
bits : 1 - 1 (1 bit)

I2C3PRIV : privileged access mode for I2C3
bits : 2 - 2 (1 bit)

LPTIM1PRIV : privileged access mode for LPTIM1
bits : 3 - 3 (1 bit)

LPTIM3PRIV : privileged access mode for LPTIM3
bits : 4 - 4 (1 bit)

LPTIM4PRIV : privileged access mode for LPTIM4
bits : 5 - 5 (1 bit)

OPAMPPRIV : privileged access mode for OPAMP
bits : 6 - 6 (1 bit)

COMPPRIV : privileged access mode for COMP
bits : 7 - 7 (1 bit)

ADC4PRIV : privileged access mode for ADC4
bits : 8 - 8 (1 bit)

VREFBUFPRIV : privileged access mode for VREFBUF
bits : 9 - 9 (1 bit)

DAC1PRIV : privileged access mode for DAC1
bits : 11 - 11 (1 bit)

ADF1PRIV : privileged access mode for ADF1
bits : 12 - 12 (1 bit)



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