\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
VREFBUF control and status register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENVR : ENVR
bits : 0 - 0 (1 bit)
access : read-write
HIZ : HIZ
bits : 1 - 1 (1 bit)
access : read-write
VRR : VRR
bits : 3 - 3 (1 bit)
access : read-only
VRS : VRS
bits : 4 - 6 (3 bit)
access : read-write
VREFBUF calibration control register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TRIM : TRIM
bits : 0 - 5 (6 bit)
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