\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
FMAC X1 Buffer Configuration register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
X1_BASE : Base address of X1 buffer
bits : 0 - 7 (8 bit)
X1_BUF_SIZE : Allocated size of X1 buffer in 16-bit words
bits : 8 - 15 (8 bit)
FULL_WM : Watermark for buffer full flag
bits : 24 - 25 (2 bit)
FMAC Control register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RIEN : Enable read interrupt
bits : 0 - 0 (1 bit)
WIEN : Enable write interrupt
bits : 1 - 1 (1 bit)
OVFLIEN : Enable overflow error interrupts
bits : 2 - 2 (1 bit)
UNFLIEN : Enable underflow error interrupts
bits : 3 - 3 (1 bit)
SATIEN : Enable saturation error interrupts
bits : 4 - 4 (1 bit)
DMAREN : Enable DMA read channel requests
bits : 8 - 8 (1 bit)
DMAWEN : Enable DMA write channel requests
bits : 9 - 9 (1 bit)
CLIPEN : Enable clipping
bits : 15 - 15 (1 bit)
RESET : Reset FMAC unit
bits : 16 - 16 (1 bit)
FMAC Status register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
YEMPTY : Y buffer empty flag
bits : 0 - 0 (1 bit)
X1FULL : X1 buffer full flag
bits : 1 - 1 (1 bit)
OVFL : Overflow error flag
bits : 8 - 8 (1 bit)
UNFL : Underflow error flag
bits : 9 - 9 (1 bit)
SAT : Saturation error flag
bits : 10 - 10 (1 bit)
FMAC Write Data register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
WDATA : Write data
bits : 0 - 15 (16 bit)
FMAC Read Data register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RDATA : Read data
bits : 0 - 15 (16 bit)
FMAC X2 Buffer Configuration register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
X2_BASE : Base address of X2 buffer
bits : 0 - 7 (8 bit)
X2_BUF_SIZE : Size of X2 buffer in 16-bit words
bits : 8 - 15 (8 bit)
FMAC Y Buffer Configuration register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Y_BASE : Base address of Y buffer
bits : 0 - 7 (8 bit)
Y_BUF_SIZE : Size of Y buffer in 16-bit words
bits : 8 - 15 (8 bit)
EMPTY_WM : Watermark for buffer empty flag
bits : 24 - 25 (2 bit)
FMAC Parameter register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P : Input parameter P
bits : 0 - 7 (8 bit)
Q : Input parameter Q
bits : 8 - 15 (8 bit)
R : Input parameter R
bits : 16 - 23 (8 bit)
FUNC : Function
bits : 24 - 30 (7 bit)
START : Enable execution
bits : 31 - 31 (1 bit)
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