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OPAMP

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

OPAMP1_CSR

OPAMP2_CRS

OPAMP2_OTR

OPAMP2_LPOTR

OPAMP1_OTR

OPAMP1_LPOTR


OPAMP1_CSR

OPAMP1 control/status register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP1_CSR OPAMP1_CSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPAEN OPALPM OPAMODE PGA_GAIN VM_SEL VP_SEL CALON CALSEL USERTRIM CALOUT OPAHSM

OPAEN : Operational amplifier Enable
bits : 0 - 0 (1 bit)

OPALPM : OPALPM
bits : 1 - 1 (1 bit)

OPAMODE : OPAMODE
bits : 2 - 3 (2 bit)

PGA_GAIN : USERTRIM
bits : 4 - 5 (2 bit)

VM_SEL : VM_SEL
bits : 8 - 9 (2 bit)

VP_SEL : VP_SEL
bits : 10 - 10 (1 bit)

CALON : CALON
bits : 12 - 12 (1 bit)

CALSEL : CALSEL
bits : 13 - 13 (1 bit)

USERTRIM : USERTRIM
bits : 14 - 14 (1 bit)

CALOUT : CALOUT
bits : 15 - 15 (1 bit)

OPAHSM : OPAHSM
bits : 30 - 30 (1 bit)


OPAMP2_CRS

control/status register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP2_CRS OPAMP2_CRS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPAEN OPALPM OPAMODE PGA_GAIN VM_SEL VP_SEL CALON CALSEL USERTRIM CALOUT OPAHSM

OPAEN : OPAEN
bits : 0 - 0 (1 bit)
access : read-write

OPALPM : OPALPM
bits : 1 - 1 (1 bit)
access : read-write

OPAMODE : OPAMODE
bits : 2 - 3 (2 bit)
access : read-write

PGA_GAIN : PGA_GAIN
bits : 4 - 5 (2 bit)
access : read-write

VM_SEL : VM_SEL
bits : 8 - 9 (2 bit)
access : read-write

VP_SEL : VP_SEL
bits : 10 - 10 (1 bit)
access : read-write

CALON : CALON
bits : 12 - 12 (1 bit)
access : read-write

CALSEL : CALSEL
bits : 13 - 13 (1 bit)
access : read-write

USERTRIM : USERTRIM
bits : 14 - 14 (1 bit)
access : read-write

CALOUT : CALOUT
bits : 15 - 15 (1 bit)
access : read-only

OPAHSM : OPAHSM
bits : 30 - 30 (1 bit)
access : read-write


OPAMP2_OTR

offset trimming register in normal mode
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP2_OTR OPAMP2_OTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIMOFFSETN TRIMOFFSETP

TRIMOFFSETN : TRIMOFFSETN
bits : 0 - 4 (5 bit)

TRIMOFFSETP : TRIMOFFSETP
bits : 8 - 12 (5 bit)


OPAMP2_LPOTR

offset trimming register in low-power mode
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP2_LPOTR OPAMP2_LPOTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIMLPOFFSETN TRIMLPOFFSETP

TRIMLPOFFSETN : TRIMLPOFFSETN
bits : 0 - 4 (5 bit)

TRIMLPOFFSETP : TRIMLPOFFSETP
bits : 8 - 12 (5 bit)


OPAMP1_OTR

offset trimming register in normal mode
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP1_OTR OPAMP1_OTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIMOFFSETN TRIMOFFSETP

TRIMOFFSETN : TRIMOFFSETN
bits : 0 - 4 (5 bit)

TRIMOFFSETP : TRIMOFFSETP
bits : 8 - 12 (5 bit)


OPAMP1_LPOTR

offset trimming register in low-power mode
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP1_LPOTR OPAMP1_LPOTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIMLPOFFSETN TRIMLPOFFSETP

TRIMLPOFFSETN : TRIMLPOFFSETN
bits : 0 - 4 (5 bit)

TRIMLPOFFSETP : TRIMLPOFFSETP
bits : 8 - 12 (5 bit)



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