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GPIO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

MODER

IDR

ODR

BSRR

LCKR

AFRL

AFRH

BRR

OTYPER

OSPEEDR

PUPDR


MODER

GPIO port mode register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODER MODER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODER0 MODER1 MODER3

MODER0 : Port x configuration bits (y = 0..15)
bits : 0 - 1 (2 bit)

MODER1 : Port x configuration bits (y = 0..15)
bits : 2 - 3 (2 bit)

MODER3 : Port x configuration bits (y = 0..15)
bits : 6 - 7 (2 bit)


IDR

GPIO port input data register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IDR IDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IDR0 IDR1 IDR3

IDR0 : Port input data (y = 0..15)
bits : 0 - 0 (1 bit)

IDR1 : Port input data (y = 0..15)
bits : 1 - 1 (1 bit)

IDR3 : Port input data (y = 0..15)
bits : 3 - 3 (1 bit)


ODR

GPIO port output data register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ODR ODR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ODR0 ODR1 ODR3

ODR0 : Port output data (y = 0..15)
bits : 0 - 0 (1 bit)

ODR1 : Port output data (y = 0..15)
bits : 1 - 1 (1 bit)

ODR3 : Port output data (y = 0..15)
bits : 3 - 3 (1 bit)


BSRR

GPIO port bit set/reset register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BSRR BSRR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BS0 BS1 BS3 BR0 BR1 BR3

BS0 : Port x set bit y (y= 0..15)
bits : 0 - 0 (1 bit)

BS1 : Port x set bit y (y= 0..15)
bits : 1 - 1 (1 bit)

BS3 : Port x set bit y (y= 0..15)
bits : 3 - 3 (1 bit)

BR0 : Port x set bit y (y= 0..15)
bits : 16 - 16 (1 bit)

BR1 : Port x reset bit y (y = 0..15)
bits : 17 - 17 (1 bit)

BR3 : Port x reset bit y (y = 0..15)
bits : 19 - 19 (1 bit)


LCKR

GPIO port configuration lock register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LCKR LCKR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LCK0 LCK1 LCK3 LCKK

LCK0 : Port x lock bit y (y= 0..15)
bits : 0 - 0 (1 bit)

LCK1 : Port x lock bit y (y= 0..15)
bits : 1 - 1 (1 bit)

LCK3 : Port x lock bit y (y= 0..15)
bits : 3 - 3 (1 bit)

LCKK : Port x lock bit y (y= 0..15)
bits : 16 - 16 (1 bit)


AFRL

GPIO alternate function low register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AFRL AFRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AFSEL0 AFSEL1 AFSEL3

AFSEL0 : Alternate function selection for port x bit y (y = 0..7)
bits : 0 - 3 (4 bit)

AFSEL1 : Alternate function selection for port x bit y (y = 0..7)
bits : 4 - 7 (4 bit)

AFSEL3 : Alternate function selection for port x bit y (y = 0..7)
bits : 12 - 15 (4 bit)


AFRH

GPIO alternate function high register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AFRH AFRH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AFSEL8 AFSEL9 AFSEL10 AFSEL11 AFSEL12 AFSEL13 AFSEL14 AFSEL15

AFSEL8 : Alternate function selection for port x bit y (y = 8..15)
bits : 0 - 3 (4 bit)

AFSEL9 : Alternate function selection for port x bit y (y = 8..15)
bits : 4 - 7 (4 bit)

AFSEL10 : Alternate function selection for port x bit y (y = 8..15)
bits : 8 - 11 (4 bit)

AFSEL11 : Alternate function selection for port x bit y (y = 8..15)
bits : 12 - 15 (4 bit)

AFSEL12 : Alternate function selection for port x bit y (y = 8..15)
bits : 16 - 19 (4 bit)

AFSEL13 : Alternate function selection for port x bit y (y = 8..15)
bits : 20 - 23 (4 bit)

AFSEL14 : Alternate function selection for port x bit y (y = 8..15)
bits : 24 - 27 (4 bit)

AFSEL15 : Alternate function selection for port x bit y (y = 8..15)
bits : 28 - 31 (4 bit)


BRR

port bit reset register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BRR BRR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BR0 BR1 BR3

BR0 : Port Reset bit
bits : 0 - 0 (1 bit)

BR1 : Port Reset bit
bits : 1 - 1 (1 bit)

BR3 : Port Reset bit
bits : 3 - 3 (1 bit)


OTYPER

GPIO port output type register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OTYPER OTYPER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OT0 OT1 OT3

OT0 : Port x configuration bits (y = 0..15)
bits : 0 - 0 (1 bit)

OT1 : Port x configuration bits (y = 0..15)
bits : 1 - 1 (1 bit)

OT3 : Port x configuration bits (y = 0..15)
bits : 3 - 3 (1 bit)


OSPEEDR

GPIO port output speed register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSPEEDR OSPEEDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OSPEEDR0 OSPEEDR1 OSPEEDR3

OSPEEDR0 : Port x configuration bits (y = 0..15)
bits : 0 - 1 (2 bit)

OSPEEDR1 : Port x configuration bits (y = 0..15)
bits : 2 - 3 (2 bit)

OSPEEDR3 : Port x configuration bits (y = 0..15)
bits : 6 - 7 (2 bit)


PUPDR

GPIO port pull-up/pull-down register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUPDR PUPDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PUPDR0 PUPDR1 PUPDR3

PUPDR0 : Port x configuration bits (y = 0..15)
bits : 0 - 1 (2 bit)

PUPDR1 : Port x configuration bits (y = 0..15)
bits : 2 - 3 (2 bit)

PUPDR3 : Port x configuration bits (y = 0..15)
bits : 6 - 7 (2 bit)



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