\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
TIM16/TIM17 control register 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CEN : Counter enable
bits : 0 - 0 (1 bit)
UDIS : Update disable
bits : 1 - 1 (1 bit)
URS : Update request source
bits : 2 - 2 (1 bit)
OPM : One pulse mode
bits : 3 - 3 (1 bit)
ARPE : Auto-reload preload enable
bits : 7 - 7 (1 bit)
CKD : Clock division
bits : 8 - 9 (2 bit)
UIFREMAP : UIF status bit remapping
bits : 11 - 11 (1 bit)
TIM16/TIM17 status register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UIF : Update interrupt flag
bits : 0 - 0 (1 bit)
CC1IF : Capture/Compare 1 interrupt flag
bits : 1 - 1 (1 bit)
COMIF : COM interrupt flag
bits : 5 - 5 (1 bit)
BIF : Break interrupt flag
bits : 7 - 7 (1 bit)
CC1OF : Capture/Compare 1 overcapture flag
bits : 9 - 9 (1 bit)
TIM16/TIM17 event generation register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
UG : Update generation
bits : 0 - 0 (1 bit)
CC1G : Capture/Compare 1 generation
bits : 1 - 1 (1 bit)
COMG : Capture/Compare control update generation
bits : 5 - 5 (1 bit)
BG : Break generation
bits : 7 - 7 (1 bit)
TIM16/TIM17 capture/compare mode register 1
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CC1S : CC1S
bits : 0 - 1 (2 bit)
OC1FE : OC1FE
bits : 2 - 2 (1 bit)
OC1PE : OC1PE
bits : 3 - 3 (1 bit)
OC1M : OC1M
bits : 4 - 6 (3 bit)
OC1M_3 : OC1M
bits : 16 - 16 (1 bit)
TIM16/TIM17 capture/compare mode register 1
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : CCMR1_Output
reset_Mask : 0x0
CC1S : CC1S
bits : 0 - 1 (2 bit)
IC1PSC : IC1PSC
bits : 2 - 3 (2 bit)
IC1F : IC1F
bits : 4 - 7 (4 bit)
TIM16/TIM17 capture/compare enable register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CC1E : Capture/Compare 1 output enable
bits : 0 - 0 (1 bit)
CC1P : Capture/Compare 1 output polarity
bits : 1 - 1 (1 bit)
CC1NE : Capture/Compare 1 complementary output enable
bits : 2 - 2 (1 bit)
CC1NP : Capture/Compare 1 complementary output polarity
bits : 3 - 3 (1 bit)
TIM16/TIM17 counter
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT : CNT
bits : 0 - 15 (16 bit)
access : read-write
UIFCPYorRes : UIF Copy
bits : 31 - 31 (1 bit)
access : read-only
TIM16/TIM17 prescaler
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PSC : Prescaler value
bits : 0 - 15 (16 bit)
TIM16/TIM17 auto-reload register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ARR : Auto-reload value
bits : 0 - 15 (16 bit)
TIM16/TIM17 repetition counter register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REP : Repetition counter value
bits : 0 - 7 (8 bit)
TIM16/TIM17 capture/compare register 1
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCR1 : Capture/Compare 1 value
bits : 0 - 15 (16 bit)
TIM16/TIM17 control register 2
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCPC : CCPC
bits : 0 - 0 (1 bit)
CCUS : CCUS
bits : 2 - 2 (1 bit)
CCDS : CCDS
bits : 3 - 3 (1 bit)
OIS1 : OIS1
bits : 8 - 8 (1 bit)
OIS1N : OIS1N
bits : 9 - 9 (1 bit)
TIM16/TIM17 break and dead-time register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DT : Dead-time generator setup
bits : 0 - 7 (8 bit)
LOCK : Lock configuration
bits : 8 - 9 (2 bit)
OSSI : Off-state selection for Idle mode
bits : 10 - 10 (1 bit)
OSSR : Off-state selection for Run mode
bits : 11 - 11 (1 bit)
BKE : Break enable
bits : 12 - 12 (1 bit)
BKP : Break polarity
bits : 13 - 13 (1 bit)
AOE : Automatic output enable
bits : 14 - 14 (1 bit)
MOE : Main output enable
bits : 15 - 15 (1 bit)
BKF : Break filter
bits : 16 - 19 (4 bit)
BKDSRM : Break Disarm
bits : 26 - 26 (1 bit)
BKBID : Break Bidirectional
bits : 28 - 28 (1 bit)
TIM16/TIM17 DMA control register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DBA : DMA base address
bits : 0 - 4 (5 bit)
DBL : DMA burst length
bits : 8 - 12 (5 bit)
TIM16/TIM17 DMA address for full transfer
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAB : DMA register for burst accesses
bits : 0 - 15 (16 bit)
TIM17 option register 1
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TI1_RMP : Timer 17 input 1 connection
bits : 0 - 1 (2 bit)
TIM17 alternate function register 1
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BKINE : BRK BKIN input enable
bits : 0 - 0 (1 bit)
BKCMP1E : BRK COMP1 enable
bits : 1 - 1 (1 bit)
BKCMP2E : BRK COMP2 enable
bits : 2 - 2 (1 bit)
BKINP : BRK BKIN input polarity
bits : 9 - 9 (1 bit)
BKCMP1P : BRK COMP1 input polarity
bits : 10 - 10 (1 bit)
BKCMP2P : BRK COMP2 input polarity
bits : 11 - 11 (1 bit)
TIM17 input selection register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TISEL : TISEL
bits : 0 - 3 (4 bit)
TIM16/TIM17 DMA/interrupt enable register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
UIE : Update interrupt enable
bits : 0 - 0 (1 bit)
CC1IE : Capture/Compare 1 interrupt enable
bits : 1 - 1 (1 bit)
COMIE : COM interrupt enable
bits : 5 - 5 (1 bit)
BIE : Break interrupt enable
bits : 7 - 7 (1 bit)
UDE : Update DMA request enable
bits : 8 - 8 (1 bit)
CC1DE : Capture/Compare 1 DMA request enable
bits : 9 - 9 (1 bit)
COMDE : COM DMA request enable
bits : 13 - 13 (1 bit)
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